Fairchild Semiconductor 74LVTH244SJX, 74LVTH244SJ, 74LVTH244MTCX, 74LVTH244MTC, 74LVTH244MSAX Datasheet
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© 1999 Fairchild Semiconductor Corporation DS500154 www.fairchildsemi.com
July 1999
Revised August 1999
74LVT244 •74LVTH244 Low Voltage Octal Buffer/Line Driver with 3-STATE Outputs
74LVT244 •74LVTH244
Low Voltage Octal Buffer/Line Driver
with 3-STATE Outputs
General Description
The LVT244 and LVTH244 are octal buffers and line drivers
designed to be employed as memory address drivers,
clock drivers and bus oriented transmitters or receivers
which provide improved PC boa rd den sity.
The LVTH244 data inputs include bush old, eliminati ng the
need for external pull-up resistors to hold unused inputs.
These octal buffers and line drivers are designed for lowvoltage (3.3V) V
CC
applications, but wit h the capability to
provide a TTL interface to a 5V environment. The LVT244
and LVTH244 are fabricated with an advanced BiCMOS
technology to achieve h igh speed operation similar to 5V
ABT while maintaining low power dissipation.
Features
■ Input and output interface capability to systems at
5V V
CC
■ Bushold data inputs eliminate the need for external
pull-up resistors to hold unused inputs (74LVTH244),
also available without bushold feat ure (74LVT244)
■ Live insertion/extraction per mitt ed
■ Power Up/Down high impedance provides glitch-free
bus loading
■ Outputs source/sink −32 mA/+64 mA
■ Functionally compatible with the 74 series 244
■ Latch-up performance exceeds 500 mA
Ordering Code:
Device also available in Tape and Reel. Specify by appending s uffix let te r “X” to the ordering code.
Logic Symbol
IEEE/IEC
Order Number Package Number Package Description
74LVT244WM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
74LVT244SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74LVT244MSA MSA20 20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide
74LVT244MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74LVTH244WM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
74LVTH244SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74LVTH244MSA MSA20 20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide
74LVTH244MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
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74LVT244 •74LVTH244
Connection Diagram Pin Descriptions
Truth Tables
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance
Pin Names Description
OE
1
, OE
2
3-STATE Output
Enable Inputs
I
0–I7
Inputs
O
0–O7
Output
Inputs Outputs
OE
1
I
n
(Pins 12, 14, 16, 18)
LL L
LH H
HX Z
Inputs Outputs
OE
2
I
n
(Pins 3, 5, 7, 9)
LL L
LH H
HX Z
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74LVT244 •74LVTH244
Absolute Maximum Ratings(Note 1)
Recommended Operating Conditions
Note 1: Absolute Maximum continuous ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions
beyond those indica te d m ay adversely affect dev ic e reliability. Functional operation under absolute maxim um rated conditions is not imp lied.
Note 2: I
O
Absolute Maximum Rating must be observed.
Symbol Parameter Value Conditions Units
V
CC
Supply Voltage −0.5 to +4.6 V
V
I
DC Input Voltage −0.5 to +7.0 V
V
O
DC Output Voltage −0.5 to +7.0 Output in 3-STATE V
−0.5 to +7.0 Output in HIGH or LOW State (Note 2) V
I
IK
DC Input Diode Current −50 VI < GND mA
I
OK
DC Output Diode Current −50 VO < GND mA
I
O
DC Output Current 64 VO > VCCOutput at HIGH State
mA
128 V
O
> VCCOutput at LOW State
I
CC
DC Supply Current per Supply Pin ±64 mA
I
GND
DC Ground Current per Ground Pin ±128 mA
T
STG
Storage Temperature −65 to +150 °C
Symbol Parameter Min Max Units
V
CC
Supply Voltage 2.7 3.6 V
V
I
Input Voltage 0 5.5 V
I
OH
HIGH-Level Output Current −32
mA
I
OL
LOW-Level Output Current 64
T
A
Free-Air Operating Temperature −40 85 °C
∆t/∆V Input Edge Rate, V
IN
= 0.8V–2.0V, VCC = 3.0V 0 10 ns/V
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