Fairchild Semiconductor 74ACT16244SSCX, 74ACT16244SSC, 74ACT16244MTDX, 74ACT16244MTD Datasheet
© 1999 Fairchild Semiconductor Corporation DS500295 www.fairchildsemi.com
August 1999
Revised October 1999
74ACT16244 16-Bit Buffer/Line Driver with 3-STATE Outputs
74ACT16244
16-Bit Buffer/Line Driver with 3-STATE Outputs
General Description
The ACT16244 contains si xteen non-inve rting buffers with
3-STATE ou tputs designed to be employed as a memo ry
and address driver, clock driver, or bus oriented transmitter/receiver. The device is nibble controll ed. Each nibble
has separate 3-STATE control inputs which can be shorted
together for full 16-bit operation.
Features
■ Separate control logic for each byte and nibble
■ 16-bit version of the ACT244
■ Outputs source/sink 24 mA
■ TTL-compatible inputs
Ordering Code:
Device also available in Tape and Reel. Specify by appending s uffix let te r “X” to the ordering code.
Logic Symbol
Pin Description
Connection Diagram
FACT is a trade m ark of F airchild Semicondu ctor Corporation.
Order Number Package Number Package Description
74ACT16244SSC MS48A 48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300” Wide
74ACT16244MTD MTD48 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Pin Names Description
OE
n
Output Enable Input (Active LOW)
I
0–I15
Inputs
O
0–O15
Outputs
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74ACT16244
Functional Description
The ACT16244 contain s sixteen non- inverting buffers wi th
3-STATE st andard outputs. The device is nibble (4 bits)
controlled with each nib bl e f unct ioni n g ide ntica l ly, but independent of the other. The control pins can be shorted
together to obtain full 16-bit operation. The 3-STATE ou t-
puts are controlle d by an Output Enable (OEn) input for
each nibble. When OE
n
is LOW, the outputs are in 2-state
mode. When OE
n
is HIGH, the outputs are in the high
impedance mode, but this does not interfere with enteri ng
new data into the inputs.
Truth Tables
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance
Logic Diagram
Inputs Outputs
OE
1
I0–I
3
O0–O
3
LL L
LH H
HX Z
Inputs Outputs
OE
2
I4–I
7
O4–O
7
LL L
LH H
HX Z
Inputs Outputs
OE
3
I8–I
11
O8–O
11
LL L
LH H
HX Z
Inputs Outputs
OE
4
I12–I
15
O12–O
15
LL L
LH H
HX Z
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74ACT16244
Absolute Maximum Ratings(Note 1) Recommended Operating
Conditions
Note 1: Absolute maximum ratings are those values beyond which damage
to the device may occur. The databook specifications should be met, without exception to ensure that the system design is reliable over its power
supply, temperature, and ou tput/inp ut load ing vari ables. Fairchild does n ot
recommend operat ion of FACT circuits outside da t abook specifications.
DC Electrical Characteristics
Note 2: All outputs loaded; thresholds assoc iated with output under t es t .
Note 3: Maximum test duration 2.0 ms; one output loaded at a time.
Supply Voltage (VCC) −0.5V to +7.0V
DC Input Diode Current (I
IK
)
V
I
= − 0.5V −20 mA
V
I
= VCC + 0.5V +20 mA
DC Output Diode Current (I
OK
)
V
O
= −0.5V −20 mA
V
O
= VCC + 0.5V +20 mA
DC Output Voltage (V
O
) −0.5V to VCC + 0.5V
DC Output Source/Sink Current (I
O
) ±50 mA
DC V
CC
or Ground Current
per Output Pin ±50 mA
Junction Temperature +140°C
Storage Temperature −65°C to +150°C
Supply Voltage (V
CC
) 4.5V to 5.5V
Input Voltage (V
I
)0V to V
CC
Output Voltage (VO)0V to V
CC
Operating Temperature (TA) −40°C to +85°C
Minimum Input Edge Rate (∆V/∆t) 125 mV/ns
V
IN
from 0.8V to 2.0V
V
CC
@ 4.5V, 5.5V
Symbol Parameter
V
CC
TA = +25°C
TA = −40°C to +85°C
Units Conditions
(V) Typ Guaranteed Limits
V
IH
Minimum HIGH Input Voltage 4.5 1.5 2.0 2.0
V
V
OUT
= 0.1V
5.5 1.5 2.0 2.0 or VCC − 0.1V
V
IL
Maximum LOW Input Voltage 4.5 1.5 0.8 0.8
V
V
OUT
= 0.1V
5.5 1.5 0.8 0.8 or VCC − 0.1V
V
OH
Minimum HIGH Output Voltage 4.5 4.49 4.4 4.4
VI
OUT
= −50 µA
5.5 5.49 5.4 5.4
VIN = VIL or V
IH
4.5 3.86 3.76 V IOH = −24 mA
5.5 4.86 4.76 IOH = −24 mA (Note 2)
V
OL
Maximum LOW Output Voltage 4.5 0.001 0.1 0.1
VI
OUT
= 50 µA
5.5 0.001 0.1 0.1
VIN = VIL or V
IH
4.5 0.36 0.44 V IOH = 24 mA
5.5 0.36 0.44 IOH = 24 mA (Note 2)
I
OZ
Maximum 3-STATE Leakage Current 5.5 ± 0.5 ± 5.0 µAVI = VIL, V
IH
VO = VCC, GND
I
IN
Maximum Input Leakage Current 5.5 ± 0.1 ± 1.0 µAVI = VCC, GND
I
CCT
Maximum ICC/Input 5.5 0.6 1.5 mA VI = VCC −2.1V
I
CC
Max Quiescent Supply Current 5.5 8.0 80.0 µAVIN = VCC or GND
I
OLD
Minimum Dynamic
5.5
75 mA V
OLD
= 1.65V Max
I
OHD
Output Current (Note 3) −75 mA V
OHD
= 3.85V Min
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