EM MICROELECTRONIC EM4450, EM4550 User Manual

EM MICROELECTRONIC - MARIN SA
EM4450 EM4550
1 KBit Read/Write Contactless Identification Device
Description
The EM4450/4550 is a CMOS integrated circuit intended for use in electronic Read/Write RF Transponders. The difference between EM4450 and EM4550 is that EM4550 are bumped and has megapads for the two coils. The chip contains 1 KBit of EEPROM which can be configured by the user, allowing a write inhibited area, a read protected area, and a read area output continuously at power on. The memory can be secured by using the 32 bit password for all write and read protected operations. The password can be updated, but never read. The fixed code serial number and device identification are laser programmed making every chip unique.
The EM4450/4550 will transmit data to the transceiver by modulating the amplitude of the electromagnetic field, and receive data and commands in a similar way. Simple commands will enable to write EEPROM, to update the password, to read a specific memory area, and to reset the logic.
The coil of the tuned circuit is the only external component required, all remaining functions are integrated in the chip.
Features
1 KBit of EEPROM organized in 32 words of 32 bits
32 bit Device Serial Number (Read Only Laser ROM)
32 bit Device Identification (Read Only Laser ROM)
Power-On-Reset sequence
Power Check for EEPROM write operation
User defined Read Memory Area at Power On
User defined Write Inhibited Memory Area
User defined Read Protected Memory Area
Data Transmission performed by Amplitude Modulation
Two Data Rate Options 2 KBd (Opt64) or 4 KBd (Opt32)
Bit Period = 64 or 32 periods of field frequency
170 pF ± 2% on chip Resonant Capacitor
-40 to +85°C Temperature range
100 to 150 kHz Field Frequency range
On chip Rectifier and Voltage Limiter
No external supply buffer capacitance needed due to
low power consumption
Available in chip form for mass production and PCB and
CID package for samples.
Typical Operating Configuration
Coil2
L
EM4450
Coil1
Typical value of inductance at 125 kHz is 9.6 mH
Applications
Ticketing
Automotive Immobilizer with rolling code
High Security Hands Free Access Control
Industrial automation with portable database
Manufacturing automation
Prepayment Devices
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Fig.1
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Block Diagram
EM4450 EM4550
coil2
coil1
System Principle
Modulator Encoder
+V
AC/DC
C
r
converter
Clo ck
Ex t r ac t o r
Data
Ex t r ac t o r
Voltage
Regu lato r
C
s
Sequencer
Command
Po w e r
Control
Dec oder
ROM
EEPROM
Res et
Write Enable
Control
Logic
Fig. 2
Data to be sent
to transponder
Osc illator
Dat a
Dec od er
Data rece ive d
from
transponder
Sig nal on
Tr ansceiver coi l
Sig nal on
Tr ansponder coil
RF Carrier
Transceiver
Mo du la to r
Antenna
Filte r &
Gain
Driv er
RECEIVE M ODE
Data
Demodulator
Transponder
Coil 1
EM4450
Sig nal on
Tr ansponder coi l
Sig nal on
Transceiver coil
RF Carrier
Coil 2
READ M ODE
Data
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EM4450
pp
EM4550
Absolute Maximum Ratings
Parameter Symbol Conditions
Maximum AC peak Current induced on COIL1 and COIL2 Power Supply Maximum Voltage other pads Minimum Voltage other pads Storage temperature T Electrostatic discharge maximum to MIL-STD-883C method 3015
Stresses above these listed maximum ratings may cause permanent damages to the device. Exposure beyond specified operating conditions may affect device reliability or cause malfunction.
Handling Procedures
This device has built-in protection against high static voltages or electric fields; however, anti-static precautions must be taken as for any other CMOS component. Unless otherwise specified, proper operation can only occur when all terminal voltages are kept within the voltage range. Unused inputs must always be tied to a defined logic voltage level.
I
V V V
V
COIL
DD
max
min
store
ESD
± 30 mA
-0.3 to 3.5 V +0.3V
V
DD
VSS-0.3V
-55 to +125°C
2000V
Operating Conditions
Parameter Symbol Min Max Unit
Operating Temperature T Maximum coil current I AC Voltage on Coil V Supply Frequency f
COIL
-40 +85 °C
op
coil
100 150 kHz
coil
10 mA
note 1
V
note 1: Maximum voltage is defined by forcing 10mA on Coil1 - Coil2.
Electrical Characteristics
VDD =2.5V, VSS =0V , f
Parameter Symbol Conditions Min Typ Max Unit
Supply Voltage V Minimum EEPROM write voltage Power Check EEPROM write I Supply current / read I Suppy current / write I
Modulator ON voltage drop V
Monoflop T Resonance Capacitor C Powercheck level V Power On Reset level high V Clock extractor input min. Clock extractor input max. EEPROM data endurance N EEPROM retention T
= 125 kHz Sine wave , V
coil
DD
V
DDee
PWcheck
rd
wr
ON
mono
PWcheck
prh
V
clkmin
V
clkmax
cy
ret
r
V
Max. Voltage to detect modulation stop
Top = 55°C after 100'000 cycles (note 2) 10 years
= 1Vpp , Top = 25°C , unless otherwise specified
coil
2.3 3.2 V
2V
VDD = 2.8V 32
Read Mode 3
Write mode (VDD = 2.8V) 22
(COIL1 - VSS)
V
(COIL1 - VSS)
& V
(COIL2 - VSS) Icoil
& V
(COIL2 - VSS) Icoil
= 100µA
= 5 mA
0.50
2.50
35 85
166.6 170 173.4 pF
22.7V
Rising Supply 1 1.5 V
Minimum Voltage for Clock Extraction
0.25 25
Erase all / Write all at VDD = 3.5 V 100'000 cycles
V
mV
µA µA µA
V V
µs
pp
pp
note 2: Based on 1000 hours at 150°C
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EM4450 EM4550
Timing Characteristics
VDD =2.5V, VSS=0V , f All timings are derived from the field frequency and are specified as a number of RF periods..
Parameter Symbol Conditions Value Unit
Option : 64 clocks per bit Read Bit Period t LIW/ACK/NACK pattern duration t Read 1 Word Duration t Processing Pause Time t Write Access Time t Initialization Time t EEPROM write time t Option : 32 clocks per bit Read Bit Period t LIW/ACK/NACK pattern duration t Read 1 Word Duration t Processing Pause Time t Write Access Time t Initialization Time t EEPROM write time t
RF periods represent periods of the carrier frequency emitted by the transceiver unit. For example, if 125 kHz is used : The Read bit period (Opt64) would be : 1/125'000*64 = 512 µs, and the time to read 1 word : 1/125'000*3200 = 25.6 ms. The Read bit period (Opt32) would be : 1/125'000*32 = 256 µs, and the time to read 1 word : 1/125'000*1600 = 12.8 ms.
= 125 kHz Sine wave, V
coil
Opt64
rdb
patt
rdw
pp
wa
init
wee
Opt32
rdb
patt
rdw
pp
wa
init
wee
= 1Vpp , Top = 25°C unless otherwise specified
coil
64 RF periods
320 RF periods
including LIW 3200 RF periods
64 RF periods 64 RF periods
2112 RF periods
VDD = 3V 3200 RF periods
32 RF periods
160 RF periods
including LIW 1600 RF periods
32 RF periods 32 RF periods
1056 RF periods
VDD = 3V 2624 RF periods
ATTENTION Due to amplitude modulation of the coil-signal, the clock-extractor may miss clocks or add spurious clocks close to the edges of the RF-envelope. This desynchronisation will not be larger than ±3 clocks per bit and must be taken into account when developing reader software.
Functional Description
General
The EM4450/4550 is supplied by means of an electromagnetic field induced on the attached coil. The AC voltage is rectified in order to provide a DC internal supply voltage. When the DC voltage crosses the Power-On level, the chip enters the Standard Read Mode and sends data continuously. The data to be sent in this mode is user defined by storing the first and last addresses to be output. When the last address is sent, the chip will continue with the first address until the transceiver sends a request. In the read mode, a Listen Window (LIW) is generated before each word. During this time, the EM4450/4550 will turn to the Receive Mode (RM) if it receives a valid RM pattern. The chip then expects a valid command.
Mode of Operation
Po w e r - On
Ini t
Standard
Ge t Comma n d
Read Mode
Execute Command
Rec eiv e
Mode
request ?
YESNO
Login
Write Word
Write Password
Selective Read
Send w ord
Reset
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EM4450 EM4550
Memory Organisation
The 1024 bit EEPROM is organised in 32 words of 32 bits. The first three words are assigned to the Password, the Protection word, and the Control word. In order to write one of these three words, it is necessary to send the valid password. At fabrication, the EM4450/4550 comes with all bits of the password programmed to a logic "0". The Password cannot be read out. The memory contains two extra words of Laser ROM. These words are laser programmed during fabrication for every chip, are unique and cannot be altered.
Memory Map
Bit 0 ------------------------------ Bit 31
Word 0 PASSWORD EE
1
PROTECTION WORD EE 0 – 7 First Word Read 0 – 7 First Word Read Protected
CONTROL WORD EE 8 – 15 Last Word Read 8 – 15 Last Word Read Protected
3
928 Bits of USER 17 Read After Write On/Off 24 – 31 Last Word Write Inhibited
EEPROM 18 – 31 User available
31 32 DEVICE SERIAL NUMBER Laser Write Only – No Read Access 33 DEVICE IDENTIFICATION Laser On means bit set to logic '1'
EE 16 Password Check On/Off 16 – 23 First Word Write Inhibited
Control Word Protection Word
Password
Device Identification Word &
Off means bit set to logic '0'
Serial Number Word
Laser Programmed – Read only
Fig.5
Standard Read Mode
After a Power-On-Reset and upon completion of a command, the chip will execute the Standard Read Mode, in which it will send data continuously, word by word from the memory section defined between the First Word Read (FWR) and Last Word Read (LWR). When the last word is output, the chip will continue with the first word until the transceiver sends a request. If FWR and LWR are the same, the same word will be sent repetitively. The Listen Window (LIW) is generated before each word to check if the transceiver is sending data. The LIW has a duration of 320 (160 opt 32) periods of the RF field. FWR and LWR have to be programmed as valid addresses (FWR LWR and 33). The words sent by the EM4450/4550 comprise 32 data bits and parity bits. The parity bits are not stored in the EEPROM, but generated while the message is sent as described below. The parity is even for rows and columns, meaning that the total number of "1's" is even (including the parity bit).
Word organisation (Words 0 to 33)
First bit output
D0 D1 D2 D3 D4 D5 D6 D7 P0
D8 D9 D10 D11 D12 D13 D14 D15 P1
D16 D17 D18 D19 D20 D21 D22 D23 P2
D24 D25 D26 D27 D28 D29 D30 D31 P3
PC0 PC1 PC2 PC3 PC4 PC5 PC6 PC7 0
Column Even Partiy
Data Row Even Parity
Last bit output
logic '0'
Fig. 6
When a word is read protected, the output will consist of 45 bits set to logic "0". The password has to be used to output correctly a read protected memory area.
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