Denon AVR-1802, AVR-882 Schematic

For U.S.A., Canada, Europe,
Asia, China, Hong Kong &
Taiwan R.O.C. model

SERVICE MANUAL

Hi-Fi Component

MODEL

AVR-1802/882

AV SURROUND RECEIVER



 Some illustrations using in this service manual are slightly different from the actual set.



14-14, AKASAKA 4-CHOME, MINATO-KU, TOKYO 107-8011 JAPAN

Telephone: [phone]

X0117 1174 NC 0109

AVR-1802/882

SAFETY PRECAUTIONS

The following check should be performed for the continued protection of the customer and service technician.

LEAKAGE CURRENT CHECK

Before returning the unit to the customer, make sure you make either (1) a leakage current check or (2) a line to
chassis resistance check. If the leakage current exceeds 0.5 milliamps, or if the resistance from chassis to either side
of the power cord is less than 460 kohms, the unit is defective.

SPECIFICATIONS



 Audio section



Power amplifier

Rated output: Front: 80W + 80W (8Ω/ohms, 20Hz ~20kHz with 0.08% T.H.D)

Center: 80W (8Ω/ohms, 20Hz ~20kHz with 0.08% T.H.D)

Surround: 80W + 80W (8Ω/ohms, 20Hz ~20kHz with 0.08% T.H.D)

Output terminals: Front: A or B 6 to 16Ω/ohms

Center/Surround: 6 to 16Ω/ohms

Analog

LINE input - PRE OUT
Input Sensitivity/input impedance: 200mV/47kΩ/kohms
Frequency response: 10Hz~100kHz: + 1, −3dB (TONE DEFEAT ON)
S/N ratio: 100dB (IHF-A weighted) (TONE DEFEAT ON)

115W + 115W (6Ω/ohms, 1kHz with 0.7% T.H.D) (U.S.A., Canada & Europe Models)
130W + 130W (6Ω/ohms, EIAJ) (Asia Model)

115W (6Ω/ohms, 1kHz with 0.7% T.H.D) (U.S.A., Canada & Europe Models)
130W (6Ω/ohms, EIAJ) (Asia Model)

115W + 115W (6Ω/ohms, 1kHz with 0.7% T.H.D) (U.S.A., Canada & Europe Models)
130W + 130W (6Ω/ohms, EIAJ) (Asia Model)

A + B 12 to 16Ω/ohms



 Video section



Standard video jacks

Input/output level and impedance: 1Vp-p, 75Ω/ohms
Frequency response: 5Hz~10MHz  +1, −3dB

S-video jacks

Input/output level and impedance: Y (brightness) signal  1Vp-p, 75Ω/ohms

Frequency response: 5Hz~10MHz  +1, −3dB



 Tuner section



Receiving range: [FM] (note: µV at 75Ω/ohms, 0dBf =1x10
U.S.A. & Canada Models 87.50MHz~107.90MHz 520kHz~1710kHz
Europe &
Asia (for China) Models 87.50MHz~108.00MHz 522kHz~1611kHz
Asia (for Multiple voltage) Models 87.50MHz~107.90MHz (0.2MHz steps) 520kHz~1710kHz (10kHz steps)

Usable sensitivity: 1.0 µV (11.2dBf) 18 µV
50dB quieting sensitivity: MONO 1.6 µV (15.3dBf)

S/N ratio: MONO 80dB (IHF-A weighted)

Total harmonic distortion: MONO 0.15% (1kHz)



 General



Power supply:
U.S.A., Canada Models AC120V, 60Hz
Europe Model AC230V, 50Hz
Asia (for Multiple voltage) Model AC115/230V, 50/60Hz

Asia (for China) Model AC220V, 50Hz

Power consumption: 4.5A (U.S.A. & Canada model), 230W (Europe & Asia model)
Maximum external dimensions: 434 (W) × 171 (H) × 417 (D)mm (17-3/32” × 6-47/64” × 16-7/16”)
Mass: 10.9kg (24lbs 0.5 oz)



 Remote control unit (RC-897)



Batteries: R6P/AA Type(two batteries)
External dimensions: 54 (W) × 172.5 (H) × 29 (D)mm (2-1/8” × 6-51/64” × 1-9/64”)
Mass: 120g (Approx. 4.2 oz) (including batteries)

* For purposes of improvement, specifications and design are subject to change without notice.

C (color) signal  0.286Vp-p, 75Ω/ohms

-15

W) [AM]

87.50MHz~108.00MHz (0.05MHz steps) 522kHz~1611kHz (9kHz steps)

STEREO 23 µV (38.5dBf)

STEREO 75dB (IHF-A weighted)

STEREO 0.3% (1kHz)

2

DISASSEMBLY

(To reassemble reverse disassenbly)

Top Cover

Remove 6 screws
in the arrow direction.

1

and 3 screws 2, detach the Top Cover

AVR-1802/882

Top Cover

2

1

1

Front Panel

3

1. Remove 2 screws

2. Remove 4 screws

3. Detach the Front Panel in the arrow direction.

.
.

4

Front Panel

Rear Panel

1. Remove cord bushing

2. Remove 36 screw

3. Detach the Rear Panel in the arrow direction.

from the Rear Panel.

5

.

6

3

3

4

5

Rear Panel

6

6

6

3

ADJUSTMENT

Tuner Section

CONNECTION DIAGRAM OF MEASURING INSTRUMENTS



 FM



T402 T403

R471

IC402

AVR-1802/882

STEREO
MODULATOR

VR402

TUNER B'D

FM ALIGNMENT

Alignment

Step



 AM



Item

Center

1

Adjustment

2Distortion

3 Repeat Steps 1 and 2

4 Signal Level

Tuning

Frequency

Setting

98.1MHz

(98.0MHz)

98.1MHz

(98.0MHz)

98.1MHz

(98.0MHz)

Type Frequency

FM SSG 98.1MHz 60dB

FM SSG 98.1MHz 60dB

FM SSG 98.1MHz 20dB

Input Output Adjustment

Input
Level

Modulation Coupling Type Connect to Points Adjust to

µ

Mono

µ

1kHz 100%

OFF

µ

75ohm

Antenna
Terminal

Antenna
Terminal

Antenna
Terminal

FM SSG

Digital
Voltmeter

Digital

Vol tmete r
Distortion

Meter

Light “TUNED” on

Ter m i nal (L )

FL Display

R471 T402

Output

T403

VR402

50mV

±

Minimum

Distortion

+14

20

dB

−10

AM ALIGNMENT

Step

1 Signal Level

Alignment

Item

Frequency Input

999 (1000)

kHz

AM SSG

T402 T403

R471

IC402

VR401

TUNER B’D

Output Adjustment

Type Connect to Points Adjust to



VR401

Light “TUNED” on

FL Display

Remarks

SSG OUTPUT
74dBµ (EMF)

4

AVR-1802/882

Audio Section

Idling Current

Required measurement equipment : DC Voltmeter

Preparation

(1) Avoid direct blow from an air conditioner or an electric fan, and adjust the unit at normal room tempereture

15 °C ~ 30 °C (59 °F ~ 86 °F).

(2) Presetting

● POWER (Power sourse switch) → OFF

● SPEAKER (Speaker terminal) → No load (Do not connect speaker, dummy resistor, etc.)

Adjustment

(1) Remove top cover and set VR101, VR102, VR103, VR104, VR105 on Amp. Unit at full counterclockwise ( )

position.

(2) Connect DC Voltmeter to test points (FRONT-Lch: TP104, FRONT-Rch: TP105, CENTER ch: TP103,

SURROUND-Lch: TP101, SURROUND-Rch: TP102).

(3) Connect power cord to AC Line, and turn power switch "ON".

(4) Presetting. MASTER VOLUME : "---" counterclockwise (

MODE : 5CH STEREO
FUNCTION : CD

(5) Within 2 minutes after the power on, turn VR101 clockwise (

DC.

(6) After 10 minutes from the preset above, turn VR101 to set the voltage to 2.5 mV ±0.5 mV DC.

(7) Adjust the Variable Resistors of other channels in the same way.

min.)

) to adjust the TEST POINT voltage to 1.5 mV ±0.5 mV

5

8

76

5

4

3

2

1

A

B

C

D

E

AVR-1802/882

6

LEVEL DIAGRAM

SEMICONDUCTORS



 ICs



CS493263-CL
(AU: IC812)

A0,SCCLK

DATA7,EMAD7,GPIO7

DATA6,EMAD6,GPIO6

DATA5,EMAD5,GPIO5

DATA4,EMAD4,GPIO4

DGND2

DATA3,EMAD3,GPIO3

DATA2,EMAD2,GPIO2

DATA1,EMAD1,GPIO1

DATA0,EMAD0,GPIO0

AVR-1802/882

A1,SCDIN

RD,R/W,EMOE,GPIO11

WR,DS,EMWR,GPIO10

AUDATA3,XMT958

DGND1

VD1

MCLK

SCLK

LRCLK

AUDATA0

AUDATA1

44

56

21 22

ABOOT,INTREQ

1234

SDATAN1

EXTMEM,GPIO8

7

8

9

10

11

VD2

12

13

14

15

16

17

18 19 20

CS

404142

43

39

AUDATA2

38

DC

37

DD

RESET

36

AGND

35

34

VA

FILT1

33

FILT2

32

CLKSEL

31

CLKIN

30

CMPREQ,LRCLKN2

29

282726252423

VD3

DGND3

LRCLKN1

CMPCLK,SCLKN2

SCLKN1,STCCLK2

CS493263-CL Terminal Function

Pin
No.

Pin Name

SCDIO,SCDOUT,PSEL,GPIO9

CMPDAT,SDATAN2,RCV958

Function

1 VD1 Digital positive supply
2 DGND1 Digital supply ground
3 AUDATA3, XMT958 SPDIF transmitter output, Digital audio output 3
4 WR, DS, EMWR, GPIO10 Host write strobe or host data strobe or external memory write enable or general purpose input & output number 10
5 RD, R/W, EMOE, GPIO11

Host parallel output enable or host parallel R/W or external memory output enable or general purpose input & output number11
6 A1, SCDIN Host address bit one or SPI serial control data input
7 A0, SCCLK Host parallel address bit zero or serial control port clock
8 DATA7, EMAD7, GPIO7
9 DATA6, EMAD6, GPIO6

10 DATA5, EMAD5, GPIO5
11 DATA4, EMAD4, GPIO4
12 VD2 Digital positive supply
13 DGND2 Digital supply ground
14 DATA3, EMAD3, GPIO3
15 DATA2, EMAD2, GPIO2
16 DATA1, EMAD1, GPIO1
17 DATA0, EMAD0, GPIO0
18 CS Host parallel chip select, host serial SPI chip select
19 SCDIO, SCDOUT, PSEL, GPIO9 Serial control port data input and output, parallel port type select
20 INTREQ, ABOOT Control port interrupt request, automatic boot enable
21 EXTMEM, GPIO8 External memory chip select or general purpose input & output number 8
22 SDATAN1 PCM audio data input number one
23 VD3 Digital positive supply
24 DGND3 Digital supply ground
25 SCLKN1, STCCLK2 PCM audio input bit clock
26 LRCLKN1 PCM audio input sample rate clock
27 CMPDAT, SDATAN2, RCV958 PCM audio data input number two
28 CMPCLK, SCLKN2 PCM audio input bit clock
29 CMPREQ, LRCLKN2 PCM audio input sample rate clock
30 CLKIN Master clock input
31 CLKSEL DSP clock select
32 FILT2 Phase locked loop filter
33 FILT1 Phase locked loop filter
34 VA Analog positive supply
35 AGND Analog supply ground
36 RESET Master reset input
37 DD Reserved
38 DC Reserved
39 AUDATA2 Digital audio output 2
40 AUDATA1 Digital audio output 1
41 AUDATA0 Digital audio output 0
42 LRCLK Audio output sample rate clock
43 SCLK Audio output bit clock
44 MCLK Audio master clock

7

AVR-1802/882

LC89055W (IC810)

LC89055W Terminal Function

Pin
No.

1 DISEL I Data input terminal (select input pin of DIN0, DIN1)
2 DOUT O Input bi-phase data through output terminal
3 DIN0 I Amp built-in coaxial/optical input correspond data input terminal
4 DIN1 I Amp built-in coaxial/optical input correspond data input terminal
5 DIN2 I Optical input correspond data input terminal
6 DGND Digital GND
7 DVDD Digital power supply
8 R I VCO gain control input terminal

9 VIN I VCO free-run frequency setting input terminal
10 LPF O PLL loop filter setting terminal
11 AVDD Analog power supply
12 AGND Analog GND
13 CKOUT O Clock output terminal (256fs, 384fs, 512fs, X’tal osc., VCO free-run osc.)
14 BCK O 64fs clock output terminal
15 LRCK O fs clock output terminal (L: Rch, H: Lch, I2S: Reverse)
16 DATAO O Data output terminal
17 XSTATE O Input data detecting result output terminal
18 DGND Digital GND
19 DVDD Digital power supply
20 XMCK O X’tal osc. clock output terminal (24.576MHz or 12.288MHz)
21 XOUT O X’tal osc. connection output terminal
22 XIN I X’tal osc. connection input terminal, external signal input possible (24.576MHz or 12.288MHz)
23 EMPHA O Emphasis information output terminal of channel status
24 AUDIO O Bit1 output terminal of channel status
25 CSFLAG O Top 40bit revise flag output terminal of channel status
26 F0/P0/C0 O Input fs cal. sig. out/data type out/input word inf. output terminal
27 F1/P1/C1 O Input fs cal. sig. out/data type out/input word inf. output terminal
28 F2/P2/C2 O Input fs cal. sig. out/data type out/input word inf. output terminal
29 VF/P3/C3 O Validity flag out/data type out/input word inf. output terminal
30 DVDD Digital power supply
31 DGND Digital GND
32 AUTO O Non PCM burst data transfer detect sig. output terminal
33 BPSYNC O Non PCM burst data preamble Pa, Pb, Pc, Pd sync sig. output terminal
34 ERROR O PLL lock error, data error flag output terminal
35 DO O CPU/IFD read data output terminal
36 DI I CPU I/F write data input terminal
37 CE I CPU I/F chip enable input terminal
38 CL I CPU I/F chip enable input terminal
39 XSEL I Frequency select input pin of XIN X’tal osc. (24.576MHz or 12.288MHz)
40 MODE0 I Mode setting input terminal
41 MODE1 I Mode setting input terminal
42 DGND Digital GND
43 DVDD Digital power supply
44 DOSEL0 I Data output format select input terminal
45 DOSEL1 I Data output format select input terminal
46 CKSEL0 I Output clock select input terminal
47 CKSEL1 I Output clock select input terminal
48 XMODE I Reset input terminal

 For latch-up countermeasure, set digital (DVDD) and analog (AVDD) power on/off in the same timing.

Pin Name FunctionI/O

8

AK4527BVQ (IC813)

AVR-1802/882

SDOS

SMUTE

BI CK

LRCK

SDT I 1

SDT I 2

SDT I 3

SDT O

DAUX

DF S

I2C

L0OP1

L0OP0/SDA/CDTI

DI F 0/ C SN

P/ S

MCL K

DI F1/ SCL / CCL K

39

38

13 14

NC

41

AK4527BVQ

15

DZ FE

TV DD

40

Top View

16 17 18

PDN

DV SS

DV DD

444342

1
2
3
4
5
6
7
8
9

10

11

12

DZF1

AV SS

37

36

192021

NC

TST

VREFH

AV DD

VCOM

35

34

33

DZ F 2/ OV F

32

RI N +

31

RI N –

30

LIN+

29

LIN–

28

ROUT1

27

LOUT1

26

ROUT2

25

LOUT2

24

ROUT3

23

LOUT3

22

CAD1

ADI F

CAD0

AK4527BVQ Terminal Function

Pin

Pin Name I/O Function

No.

1 SDOS I SDTO source select pin, L: Internal ADC output, H: DAUX input
2 I2C I Serial control mode select pin, L: 3-core serial, H: I2C bus
3 SMUTE I Soft mute pin, H: Soft mute start, L: Release
4 BICK I Audio serial data clock pin
5 LRCK I Input channel clock pin
6 SDTI1 I DAC1 audio serial data input pin
7 SDTI2 I DAC2 audio serial data input pin
8 SDTI3 I DAC3 audio serial data input pin

9 SDTO O Audio serial data output pin
10 DAUX I Auxiliary audio serial data input pin
11 DFS I Double speed sampling mode pin, L: Normal, H: Double
12 NC  No Connect, No internal bonding
13 DZFE I Zero input detect enable pin
14 TVDD  Power pin for output buffer, 2.7V~5.5V
15 DVDD  Digital power pin, 4.5V~5.5V
16 DVss  Digital GND pin, 0V
17 PDN I Power down & reset pin, L: Powered-down and register initialized, Reset with PDN when switching CAD0-1
18 TST I Test pin, connected to DVSS
19 NC  No Connect, No internal bonding
20 ADIF I Analog Input Format Select pin
21 CAD1 I Chip address-1 pin
22 CAD0 I Chip address-0 pin
23 LOUT3 O DAC3L channel analog out pin
24 ROUT3 O DAC3R channel analog out pin
25 LOUT2 O DAC2L channel analog out pin
26 ROUT2 O DAC2R channel analog out pin
27 LOUT1 O DAC1L channel analog out pin
28 ROUT1 O DAC1R channel analog out pin
29 LIN- I L-ch analog inverted input pin
30 LIN+ I L-ch analog non-inverted input pin
31 RIN- I R-ch analog inverted input pin
32 RIN+ I R-ch analog non-inverted input pin
33 DZF2/OVF O 0 input detect 2 pin/Analog input overflow detect pin
34 VCOM O Common V-out pin, AVDD/2, connect large capacitor to avoid noise
35 VREFH I Ref. V input pin, AVDD
36 AVDD  Analog GND pin, 4.5V~5.5V
37 AVss  Analog GND pin, 0V
38 DZF1 O 0 input detect pin, H: Input data of G1 is 8192 times “0” in a raw or RSTN bit “0”, L: When P/S= “0”
39 MCLK I Master clock input pin
40 P/S I Parallel/Serial select pin, L: Serial control

DIF0 I Audio data I/F format 0 pin (parallel control)

41

CSN I Chip select pin (3-wire serial control), connect to DVDD when I
DIFI I Audio data I/F format 1 pin (parallel control)

42

SCL/CCLK I Control data clock pin (serial control), I
LOOP0 I Loop back mode 0 pin (parallel control), effects digital loop back ADC to all DAC

43

SDA/CDTI I/O Control data input pin (serial control), I

2

C=”L”: CCLK (3-wire serial), I2C=”H”: SCL (I2C bus)

2

C=”L”: CCTI (3-wire serial), I2C=”H” SDA (I2C bus)

44 LOOP1 I Loop back mode 1 pin, from SDT1 to all DAC

2

C bus control

9

AVR-1802/882

1

2

3

4

5

6

7

8

18

17

16

15

14

13

12

11

Q3

VDD

OE

Q7

Q8

Q11

Q10

Q9

Q6

VSS

DATA

CLOCK

LCK

Q0

Q1

Q2

9

10

Q4

Q5

CONTROL CIRCUIT

12-bit SHIFT RESISTER

12-bit STRAGE RESISTER

OUTPUT BUFFER (OPEN DRAIN)

BU2090F (IC302, 602)

1

MM74LCX244 (IC818,819)

RC1117S25T (IC820)
RC1117S33ST (IC811)

2

3

2

ADJ/GND

OUT

IN

MM74HC151 (IC832)

V

OUT

FRONT VIEW

LA1266 (IC402)

10

4

1

3

8

19

15

17

18

14

21

22





5

11









2

  

6



7



23







24


 

 

16





 

12

20

  





 

9

13

    





20

19

18

17

16

15

14

13

12

9

8

7

5

6

1

21

LA3401 (IC403)

22






  




 















 !"#  !"





$





%

2

3

4



   


 






 

 

 


%

10

11

LC72131 (IC401)

#

&!

&

#



#

'#(

)

#*

*

#)

(

#'



#

#&

#! ##











#

&



'

 #

 







 

 

 &

 

++

 

TDA7330BD (IC202)

TOP VIEW

POR

MUXIN

TM

V

REF

FSEL

COMP

T2

FILOUT

V

CC

GND

ARI

T1

QUAL

T3

RDDA

T4

RDCL

OSCOUT

T57

OSCIN

1

2

3

4

5

6

7

8

9

10

20

19

18

17

16

15

14

13

12

11

124

12 13

1

2

3

4

5

6

7

8

20

19

18

16

15

14

13

I3

VCC

OE2

O2

I5

O0

I4

O1

I6

OE

I0

O4

I1

O5

I2

O6

912

O7

O3

10

11

GND

I7

TOP VIEW

D4

D5

D6

D7

A

B

D2

D1

D0

Y

W

S

D3

C

4

5

6

7

A

B

C

Vcc

15

14

13

12

11

10

9

16

2

3

4

5

6

7

8

1

2

1

0

Y

W

ST ROBE

GND

3

DATA

INPUTS

OUTPUTS

DATA

INPUTS

DATA

SELECT

TOP VIEW

17

10

AVR-1802/882

LC75721E (IC301)

G7 G8G9

G10

G11

AA8/G12

AA7/G13

AA6/G14

AA5/G15

AA4/G16

AA3

AA2

48 33

49

DI
CL
CE

RES

V

DD

OSCI

OSCO

Vss

TEST

V

FL

G1
G2
G3
G4
G5
G6

64

AM 1

AM 2

AM 3

AM 4

AM 5

AM 6

AM 7

AM 8

AM 9

AM 10

AM 11

AM 12

BA7626 (IC601, 651, 652)

Monitor OUT

GND

IN5

GND

IN4

CTL E

IN3

CTL D

1

2

3

4

5

6

7

8

LOGIC

LOGIC

16

15

6dB

14

13

12

6dB

11

10

9

AA1

AM35

AM34

AM 13

AM 14

IN1

CTL A

V OUT1

Vcc

IN2

CTL B

V OUT2

CTL C

KIC9164AN (IC203)

LC75721E Terminal Function

AM33

32

AM 17
AM 18
AM 19
AM 20
AM 21
AM 22
AM 23
AM 24
AM 25
AM 26
AM 27
AM 28
AM 29
AM 30
AM 31
AM 32

17

161

AM 15

AM 16

ABE

LL

HL

LH

Symbol

DD

V
V

SS

V

FL

DI
CL
CE

OSCI
OSCO

RES
AM1~AM35

AA1~AA3
AA4/G16

AA5/G15
AA6/G14
AA7/G13
AA8/G12

G1~G11
TEST

MONITOR OUT

*

*

*

Power terminal +5V
Power terminal GND
Power terminal FL drive
Serial data transfer terminal
DI: Data

CL: Clock
CE: Chip enable

External CR connecting terminal

System reset terminal

Anode output terminal

Anode/Grid output terminal

Grid output terminal
LSI test terminal

IN 1

IN 2

IN 3

HH L IN 4

HHH IN 5

Note 1: * mark means that feasible for either H or L.
Note 2: Each input terminal is provided with sink chip clamp (BA7625).
Each input terminal takes 20kohm at the end (BA7626).

Function

SS

V

1

L-S1

2

L-S2

3

L-S3

4

5

L-S4

L-COM1

6

7

L-S5

L-S6

8

L-COM2

9

10

L-S7

L-S8

11

12

L-COM3

13

ST

GND

14 15

C D E V OUT 1 C D E V OUT 2

LL

HL

LH

HH L IN 4

HHH IN 5

¾

*

IN 2

*

IN 3

*

LL

HL

LH

*

*

*

HH L IN 4

HHH IN 5

IN 1

¾

IN 3

28

27

26

25

24

23

22

21

20

19

18

17

16

DD

V
R-S1

R-S2

R-S3

R-S4

R-COM1

R-S5

R-S6

R-COM2

R-S7

R-S8

R-COM3

DATA

CK

27W201 (IC807)

Vpp
A16
A15
A12

Vss

1

2

3

4

5

A7

6

A6

7

A5

8

A4

9

A3

10

A2
A1

11

A0

12

13

Q

0

14

1

Q

15

Q

2

16

32

31

30

29

28

27

26

25

24

23

22

21

20

19

18

17

SN74LV00APW (IC822)

1

GND

1A

1B

2

1Y

3

2A

4

2B

5

6

2Y

7

14

13

12

11

10

9

8

Vcc
P
A17
A14
A13
A8
A9
A11
G
A10

E
Q

Q

Q
Q
Q

Vcc

4B

4A

4Y

3B

3A

3Y

NJM2068DD

CCVPP

V

18

A0-A17

P

E

7

6

5

4

3

G

VSS

8

74HCU04 (IC803)

1

1A

1Y

2A

2Y

3A

3Y

GND

2

3

4

5

6

7

14

13

12

11

10

9

8

(IC205~210, 551, 702~704, 814~816)
BA4510F (IC805~806)
NJM2068MD (IC814~816)

Q

0-Q7

A OUTPUT

A –INPUT

A+INPUT

1

2

3

V

4

KIA78R05PI (IC653)

Vcc

6A

6Y

5A

5Y

4A

4Y

3

2

1

Vin

1

4

V

8

B OUTPUT

7

6

B –INPUT

B +INPUT

5

Specific IC

3

GND

2

Vo

Vadj

4

11

AVR-1802/882

SN74LV4040 (IC831)

##

)

'

*



&
#







#

&


'

)

*
(



#

#*

#)

#'

#

12

##

#!

Q

&

Q

R

D

!

TC9184AP (IC552)

R

Terminal Function


#!



(





!

Q

Q

D



           





"

(  )  *& $  * )  *
!(! + )*&$*)*
"(,&-
( !  + .& .   *  / &-   0 & 
(  .& . !  +  *  / &-  0 & 

#&

R

D

#

2

BASS+

!
!

Q

Q

1

VSS

#$

%&

##

VDD

16

'

!

GND

78

Level shift

KIA7805AP (IC104)
KIA7815AP (IC101)
NJM7805FA(S) (IC103, 829)

FRONT

VIEW

Input

GND

Output

MM74LCX574
(IC808, 809)

20 1

V

13 8
12 9
11 10

15

19 2
18 3
17 4
16 5
15 6
14 7

Q
Q
Q
Q

Q
Q
Q
Q
CP

BASS+

CC

0

1

2

3

4

5

6

7

OE

0

D

1

D

2

D

3

D

4

D

5

D

6

D

7

D

GND

DATA

CK

STB

9

10

NJM7915FA (IC102)

FRONT

VIEW

Input

GND

Output

MM74HCT244
(IC828, 830)

1G

0

1A

0

2Y

1

1A

1

2Y

2

1A

2

2Y

3

1A

3

2Y

GND

IC PROTECTOR



20 1
19 2
18 3
17 4
16 5
15 6

14 7
13 8
12 9
11 10

ICP-N15 (IC105)

FRONT VIEW

V

CC

2G

0

1Y

0

2A

1

1Y

1

2A

2

1Y

2

2A

3

1Y

3

2A

16

1

OPTICAL



INPUT
GP1FA502RZ (IC817)

Vcc

Vout

GND

IR SENSOR



NJL64H380A(RMC301)

FRONT VIEW

ND

OUT

Vcc

BASS-

8

COM

TREBLE-

TREBLE+

4

5

6

Analog switch

Ladder resister

13 bit latch circuit

13 bit latch circuit

Code
detect
circuit

20 bit Shift register circuit

Analog switch

Ladder resister

3

Analog switch

Analog switch

14

BASS-

Ladder resister

COM

13

12

TREBLE-

11

TREBLE+

Ladder resister



POSISTOR

P43T7D330BW16

FRONT VIEW

OUTPUT
GP1FA502TZ(IC801, 802, 803)

V

CC

V

OUT

GND

Vin

Vcc

GND

 ./- 0 1  0 1 20 233.4  $0 1/4/3$4

.3.3$4

PD

ABLC

B.P.F

DRIVE

IC

22kohm

V

CC

Vin

GND

V

CC

V

OUT

GND

12

2SC1740S
2SC3199Y
KSA916Y
KSA992F
KSC1845F
KTA1266Y
KTA1268BL
KTC2874B
KTC3198Y
KTC3200BL

2SC2412K
KTC3880S

DTA114EK
DTA114YK
DTA144EK
DTC114EK
DTC114YK
DTC144EK

TOP

VIEW

E

B

C

TOP

VIEW

E

B

C

FRONT

VIEW

B

C

E

TOP VIEW

KDS160MTZJ3.3B
MTZJ5.1B
MTZJ5.6B
MTZJ6.8B
MTZJ7.5A
MTZJ7.5B
MTZJ11B
MTZJ18B
MTZJ20B

1N4007
1SS133

B

C

E

R1

R2

B

C

E

R1

R2

2SK117

FRONT

VIEW

S

G

D

DTA114ES
DTC114TS
DTC114YS
DTC144ES

FRONT

VIEW

B

C

E

DTA Series

DTC Series

DTA114EK

DTA114YK

R1

10kohm /W

R2

10kohm /W

DTA144EK

47kohm /W 47kohm /W

10kohm /W

47kohm /W

DTA114ES

10kohm /W 10kohm /W

DTC114EK

DTC114YK

10kohm /W 10kohm /W

DTC144EK

R1

R2

47kohm /W 47kohm /W

10kohm /W 47kohm /W

DTC144ES

47kohm /W 47kohm /W

DTC114YS

10kohm /W 47kohm /W

DTC114TS

10kohm /W¾

TOP VIEW

HL-50RDRF4T



TRANSISTORS



DIODES (LED included)

TOP VIEW

KBPC604

AVR-1802/882

13

16-st-42GNK (FL301)

S38

S14

S9

S1

S2

S3

S4

S5

S12

S13

S7

S15

S6

S10

S11

G1

G1

G2

G3

G4

G5

G6

G7

G16

G15 G13

G12

G10

G9

F2F1

1

58

G14

G11

G8

G2~G16

12345

6

78910111213141516171819

23 24 25

26

27 28 29 30 31 32 33 34

F1 F1 S1 S2 S3

S4

S5 S6 S7 S8 S9 S10 S11 S12 S13 S14 S15

S16 S17

20

21 22

35 36 37 38 39 40

41 42 43 44 45

46

47 48 49 50 51 52 53 54 55 56 57

S18

S19 S20 S21 S22 S23 S24 S25 S26 S27 S28 S29 S30 S31 S32 S33 S34 S35 S36 S37 S38

G16 G15 G14 G13 G12 G11 G10 G9 G8 G7 G6 G5 G4 G3 G2 G1 F2 F2

58

S13

S14
S15

S16
S17
S18

S19
S20
S21
S22
S23
S24

G1 G2 G3 G4 G5 G6 G7 G8 G9 G10 G11 G12 G13 G14 G15

G16

S38

S36
S37
S38

- 2

DBS

TV

- 1

VDP

TAPE

/

/(DVD)

/(MD)

AUXDVD

MD

V.AUX

TUNER

- 2

- 3

CD

-

1

PHONO

VCR

REC

MULTI

STEREO

AUTO

TUNED

RDS

CH

S1
S2
S3
S4
S5
S6
S7
S8
S9

S10
S11
S12

S1
S2
S3
S4
S5
S6
S7

S9

S10
S11
S12

S1
S2

S3
S4
S5
S6
S7
S8
S9

S10
S11
S12

S13
S14

S15
S16
S17

S18

S19

S20

S21
S22
S23
S24

S13
S14
S15

S25

S26
S27

S28
S29
S30
S31
S32
S33
S34
S35

S25
S26
S27

S28
S29
S30
S31

S32
S33

S34
S35

G2~G16

G1

G2~G16

G1

G2~G16

G1

G2~G16

G1

DIGITAL

PRO LOGIC

S1

S6

S11

S16

S21

S26

S31

S2

S7

S12

S17

S22

S27

S32

S3

S8

S13

S18

S23

S28

S33

S4

S9

S14

S19

S24

S29

S34

S5

S10

S15

S20

S25

S30

S35

TUNED

RDS

STEREO

AUTO

REC

MULTI

PHONO

VCR

CD

-

1

TUNER

-2-

3 V.AUX

AUXMDDVD /

/

TAPE

VDP TV

-1-

2

/

DBS

PRO LOGIC

DIGITAL

DIGITAL

ANALOG

TUNED

RDS

STEREO

AUTO

REC

MULTI

PHONO

VCR

CD

-

1

TUNER

-2-

3

V.AUX

AUX

MD

DVD /

/

TAPE

VDP

TV

-1-

2

/

DBS

CH

CH

PRO LOGIC

DIGITAL

DIGITAL

ANALOG



FL DISPLAY

Pin Assignment

F1, F2 : Filament
G1~G16 : Grid
S1~S38 : Anode

PIN NO.
CONNECTION

PIN NO.
CONNECTION

PIN NO.
CONNECTION

Anode & Grid Assignment

AVR-1802/882

14

1

5

1

9

1

5

1

5

1

6

13

1

20

1

12

1

11

1 7

1 6

1 6

1 5

1 9

1 5

8

76

5

4

3

2

A

B

C

D

E

AVR-1802/882

15

COMPONENT SIDE

MAIN P.W.B. Ass'y (for U.S.A. , Canada, Europe & China Models)

1

PRINTED WIRING BOARDS

1

21

22 42

8

76

5

4

3

2

1

A

B

C

D

E

AVR-1802/882

16

FOIL SIDE

MAIN P.W.B. Ass'y (for U.S.A. , Canada, Europe & China Models)

1

5

1

9

1

5

1

5

1

6

13

120

1

12

1

11

1 7

1 6

1 6

1 5

1 9

1 5

8

76

5

4

3

2

1

A

B

C

D

E

AVR-1802/882

17

COMPONENT SIDE

MAIN P.W.B. Ass'y (for Asia, Hong Kong & Taiwan R.O.C. Models)