DELL QAR10 Schematics
A
B
C
D
E
1 1
2 2
COMPALCONFIDENTIAL
MODELNAME:
PCBNO:
LA‐7933P
BOMP/N:
GPIOMAP:
QAR10
4319FV31L01
E4VCGPIOmaprev1.1
Vans17
REV:0.2(X01)
2011.11.11
@:NopopComponent
CONN@:ConnectorComponent
PXDP@:PCHXDPComponent
3 3
MBType
TPMEN/TCMDIS
TPMDIS/TCMEN
TPMDIS/TCMDIS
4 4
BOMP/N
1@
2@
2@
3@
3@
4@
DELL CONFIDENTIAL/PROPRIETARY
MB PCB
MB PCB
PartNumber
PartNumber
DAA00002U00
DAA00002U00
Description
Description
PCB0MFLA‐7933PREV0MB
PCB0MFLA‐7933PREV0MB
A
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
B
C
D
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Cover Sheet
Cover Sheet
Cover Sheet
LA-7933
LA-7933
LA-7933
165Friday, November 11, 2011
165Friday, November 11, 2011
165Friday, November 11, 2011
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B
C
D
E
EDPPanel
Conn
P.30
PEGx16Gen3
LVDSPanel
Conn
1 1
P.28
DP1.2
Conn
P.29
CRTConn
P.31
HDMI1.4a
Conn
P.33
2 2
IntelLewisville
82579LM
LANswitch
PI3L720ZHEX
DockingLAN
IEEE1394
+
3 3
Cardreader
RJ45
SDXC1394
OnI/Oboard
LVDSMUX
TS3DV20812R
DockingRGB
DP/HDMIMUX
DockingDPPort1 DockingDPPort2
P.36
P.36
P.37
P.27
DPRedriver
PS8330B
P.29
CRTswitch
MAX14885
P.31
PS8336B
P.33
PCIE/SATAMUX
PI2DBS212
P.42 P.42
MiniCard‐4
FlashCard
P.42
LVDS(DIS)
LVDS
DP(DIS)
CRT(DIS)
CRT
DP(DIS)
ExpressCard
P.43
OnI/Oboard
DP
MiniCard‐3
PP
SMSCSIO
ECE5048
DP_D
LVDS
DP_A
MXMConn.
CRT
TYPEB
DP_C
DP_B
PCIEBUS
MiniCard‐2
WLAN/WiGi
P.41
USBPort4 USBPort5USBPort10
BCBUS
P.46
P.16
MiniCard‐1
WWAN
ChinaTCM1.2
SSX44B
DiscreteTPM
AT97SC3204
SMSCKBC
Port1Port2Port5Port3Port6Port7Port8 SATAPort2
P.41
P.40
P.40
MEC5055
SIMCard
P.41
FreeFallSensor
LNG3DMTR
CurrentMonitor
4 4
EMC1701
P.34
P.26
Thermal
GUARDIANIII
EMC4002
P.25
A
SATAPort5
USB2.0Port8
DAI
RGB
LAN
USB3.0Port3
LPC
DockingDP
DockingDP
TPCONN KBCONN
OnI/Oboard
E‐Dock
P.44
B
Intel
IvyBridge
Processorr
rPGA989Socket
35WDualCore
45WQuadCore
55WQCExtremeEdition
FDIx8 DMIx4gen2
LVDS
Intel
CRT
PantherPoint
PCH
BGA989Balls
SPI
LPCBUS
P.47
P.48
C
(DDRIII) Memory Bus
1.5V DDRIII 1333 /1600 /1866MHz (Overclocking)
SATA3.0Repeater
PS8520B
P.6~11
SATAPort0
SATAPort1
SATAPort3
SATA3.0
SATA2.0
USB3.0
USB2.0
HDAudio
P.17~24
W25X64ZE
P.17
64M 4K sector
W25Q32BV
P.17
32M 4K sector
AudioCodec
92HD93
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
D
SATAPort4
USBPort0
USBPort1
USB3.0Repeater
USB3.0Repeater
USBPort2
USBPort6
USBPort11
USBPort12
USBPort13
USBPort7
HeadPhoneJack
ArrayMICJack
Int.Speaker
PS8710B
PS8710B
USB2.0Conn
LeftSide
USB2.0Conn
LeftSide
DigitalCamera
OnI/Oboard
DDRIII‐DIMMX4
P.12~15BANK0,1,2,3,4,5,6,7
1stHDDConn.
P.34
2ndHDDConn.
ODDConn.
USB/eSATAConn.
USBPort9
USB3.0Conn
RightSide
P.39
USB3.0Conn
RightSide
P.39 P.39
BT4.0+LE
Touchscreen
BRCM5882
TPM1.2
P.48
P.28
P.28
USBCharger
OnI/Oboard
TDA8034HN
SmartCard
FP_USB
Fingerprint
CONN
OnUSHmodule
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
Block Diagram
Block Diagram
Block Diagram
LA-7933
LA-7933
LA-7933
E
RFID
P.39
P.34
P.34
P.35
P.38
265Monday, November 07, 2011
265Monday, November 07, 2011
265Monday, November 07, 2011
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POWER STATES
State
S0 (Full ON) / M0
D D
S3 (Suspend to RAM) / M1
S4 (Suspend to DISK) / M1 ON ON OFF
S5 (SOFT OFF) / M1 ON ON OFFLOW LOW HIGHLOW
S3 (Suspend to RAM) / M-OFF
S4 (Suspend to DISK) / M-OFF
S5 (SOFT OFF) / M-OFF
Signal
SLP
SLP
S3#
S4#
HIGH HIGH HIGH
HIGH
LOW HIGH HIGH HIGH ON ON ON OFF
LOW
LOW HIGH HIGHLOW
LOW
LOW HIGH HIGH HIGH LOW ON ONOFF OFF OFF
LOW LOW LOW LOW ON OFF OFF OFF OFF
LOW LOW LOW LOW LOW ON OFF OFF OFF OFF
SLP
S5#
HIGH
S4
STATE#
SLP
M#
HIGH
HIGH
ALWAYS
PLANE
ON
M
PLANE
ON
SUS
RUN
PLANE
PLANE
ON ON ON
OFF
OFF
CLOCKS
OFF
OFF
OFF
PCH
PM TABLE
+15V_ALW
+5V_ALW
C C
State
S0
S3
S5 S4/AC
power
plane
+3.3V_ALW_PCH
+3.3V_RTC_LDO
ON
ON
+3.3V_SUS
+1.5V_MEM
ON ON
ON
OFF
+5V_RUN
+3.3V_RUN
+1.8V_RUN
+1.5V_RUN
+0.75V_DDR_VTT
+VCC_CORE
+1.05V_RUN_VTT
+1.05V_RUN
OFFON
OFF
+3.3V_M +3.3V_M
+1.05V_M
ON
ON
ON
+1.05V_M
(M-OFF)
ON
OFF
OFF
USH
USB PORT#
0
1
2
3
4
5
6
7
8
9
10
11
12
13
0
1
JUSB1 (Ext Right Side)
JUSB2 (Ext Right Side)
IO Board- JUSB1 (Ext Left Side)
Docking USB3.0
WLAN
WWAN
IO Board- JUSB2 (Ext Left Side)
USH
Docking USB 2.0
ESATA
Express Card
BT 4.0
Carmera
Touch Screen
DESTINATION
BIO
NA
S5 S4/AC don't exist
B B
A A
Stack up
OFFOFF
OFF
OFFOFF
SATA
SATA 0
SATA 1
SATA 2
SATA 3
SATA 4
SATA 5
DESTINATION
HDD 1
HDD 2
NVRAM
ODD
ESATA
Dock
PCI EXPRESS
Lane 1
Lane 2
Lane 3
DESTINATION
MINI CARD-1 WWAN
MINI CARD-2 WLAN
Express Card
Lane 4
Lane 5
MINI CARD-3 (Pink Panther)
Lane 6 NVRAM Card
Lane 7
10/100/1G LOM
Lane 8 Cardreader
NA
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
Index and Config.
Index and Config.
Index and Config.
LA-7933
LA-7933
LA-7933
365Monday, November 07, 2011
365Monday, November 07, 2011
365Monday, November 07, 2011
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PCH_ALW_ON
Docking
D D
ADAPTER
BATTERY
+PWR_SRC
EN_INVPWR
RUN_GFX_ON
1.05V_0.8V_PWROK
CHARGER
C C
SIO_SLP_S4#
RT8207
(PU201)
SIO_SLP_A#
TPS51212
(PU401)
+1.05V_M
CPU_VTT_ON
TPS51212
(PU501)
+1.05V_RUN_VTT
TP0610K
(PQ4)
FDC654P
(Q21)
SI4835DDY
(Q186)
ISL95836
(PU702)
TPS4021
(PU1201)
+PWR_SRC_S
+BL_PWR_SRC
+MXM_PWR_SRC
+VCC_CORE
+VCC_GFXCORE
+12V
ALWON
RT8205
(PU101)
+3.3V_ALW
+5V_ALW
SIO_SLP_S3#
SIO_SLP_S3#
1.05V_VTTPWRGD
EN_LCDPWR
MODC_EN
SIO_SLP_S3#
ESATA_USB_PWR_EN#
PCH_ALW_ON
RUN_GFX_ON
DMN3030
(Q51)
SYN470
(PU301)
TPS51461
FDC655B
(Q12)
SI3456DDV
(Q30)
SI3456DDV
(Q27)
SSM3K7002FU
(QH4)
SI4800BDY
(Q76)
TPS2560
(U45)
TPS2560
(U48)
+EDPVDD
+5V_MOD
+5V_HDD
PWR_SHARE_EN#
USB_SIDE_EN#
+5V_RUN
+1.8V_RUN
+VCC_SA(PU601)
Pop option
Pop option
+5V_USB_PWR1
+5V_USB_PWR2
+5V_ESATA_PWR
+5V_ALW_PCH
+5V_MXM
+5V_RUN
+5V_RUN
+V_DDR_REF
B B
+0.75V_DDR_VTT
+1.5V_MEM
SIO_SLP_S3#
AO4728L
(QC3)
SIO_SLP_S3#
SI4164
(Q63)
+1.05V_RUN
NVRAM_PWR_EN
SI3456DDV
(Q46)
MCARD_WWAN_PWREN
SI3456DDV
(Q40)
MCARD_MISC_PWREN
SI3456DDV
(Q44)
AUX_EN_WOWL
SI3456DDV
(Q38)
PCH_ALW_ON
SI3456DDV
(Q49)
SIO_SLP_S4#
SI3456DDV
(Q54)
SIO_SLP_LAN#
SI3456DDV
(Q34)
+3.3V_LAN+3.3V_SUS
SIO_SLP_A#
SI3456DDV
(Q58)
+3.3V_M
RUN_GFX_ON
SI4800BDY
(Q25)
+3V_MXM
SIO_SLP_S3#
DMN3030
(Q56)
+3.3V_RUN
SIO_SLP_S3#
SYN470D
(PU302)
+1.5V_RUN
MXM_ENVDD
ENVDD_PCH
LCD_VCC_TEST_EN
SI3456DDV
(Q18)
+LCDVDD
+1.5V_CPU_VDDQ
A A
+3.3V_PCIE_NVM
+3.3V_PCIE_WWAN
+3.3V_PCIE_FLASH
+3.3V_WLAN
+3.3V_ALW_PCH
+1.05V_M
Pop option
+3.3V_M
Pop option
LDO of 82579
(U31)
+1.0V_LAN
CCD_OFF
PMV65XP
(Q24)
+CAMERA_VDD
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Power Rail
Power Rail
Power Rail
1
LA-7933
LA-7933
LA-7933
465Monday, November 07, 2011
465Monday, November 07, 2011
465Monday, November 07, 2011
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0.2
SMBUS Address [0x9a]
5
H14
C9
MEM_SMBCLK
MEM_SMBDATA
PCH
D D
3A
C C
E14M16
SML1_SMBDATA
SML1_SMBCLK
B6A5
3A
C6
G8
1A
1A
1B
1B
B4
A3
B5
A4
LAN_SMBCLK
LAN_SMBDATA
2.2K
2.2K
DOCK_SMB_CLK
DOCK_SMB_DAT
LCD_SMBCLK
LCD_SMDATA
+3.3V_ALW_PCH
2.2K
2.2K
2.2K
2.2K
4
2.2K
2.2K
2.2K
2.2K
+3.3V_ALW_PCH
+3.3V_LAN
28
31
LOM
+3.3V_ALW
+3.3V_ALW
2N7002
2N7002
SMBUS Address [C8]
127
129
DOCKING
3
4
Current Monitor
3
SMBUS Address
APR_EC: 0x48
SPR_EC: 0x70
MSLICE_EC: 0x72
USB: 0x59
AUDIO: 0x34
SLICE_BATTERY: 0x17
SLICE_CHARGER: 0x13
202
200
200
200
200
53
51
202
202
202
53
51
2
DIMMA
DIMMB
DIMMC
SMBUS Address [A0h]
A0h --> 1010 0000
SMBUS Address [A4h]
A4h --> 1010 0100
SMBUS Address [A4h]
A4h --> 1010 0100
1
DIMMD
SMBUS Address [TBD]
XDP1
XDP2
30
32
WWAN
SMBUS Address [TBD]
SMBUS Address [TBD]
14
13
2.2K
2.2K
G Sensor
+3.3V_RUN
SMBUS Address [TBD]
2.2K
eDP Panel
KBC
A56
1C1CB59
PBAT_SMBCLK
PBAT_SMBDAT
2.2K
2.2K
+3.3V_ALW
100 ohm
100 ohm
7
6
BATTERY
CONN
SMBUS Address [0x16]
SMBUS Address
SMB_ADM1032: 0x98
SMB_DIAG_DUMP: 0x04
SMB_DIAG_DUMP2: 0x05
SMB_BLACKTOP: 0x60
A50
B53
USH_SMBCLK
USH_SMBDAT
1E
1E
2.2K
+3.3V_ALW
M9
L9
USH
SMBUS Address [0xa4]
2.2K
B B
MEC 5055
A49
B52
CARD_SMBCLK
CARD_SMBDAT
2B
2B
2.2K
2.2K
B50
A47
CHARGER_SMBCLK
CHARGER_SMBDAT
1G
1G
2.2K
2.2K
B7
A7
BAY_SMBDAT
BAY_SMBCLK
2D
2D
2.2K
2.2K
B49
A A
2A
2A
DAI_GPU_R3P_SMBCLK
B48
DAI_GPU_R3P_SMBDAT
2.2K
+3.3V_ALW
+3.3V_ALW
+3.3V_RUN
+3.3V_RUN
10
9
7
8
Charger
8
9
Express card
SMBUS Address [0x12]
MXM
SMBUS Address [0x30]
SMBUS Address [TBD]
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SMBUS Bolck Diagram
SMBUS Bolck Diagram
SMBUS Bolck Diagram
LA-7933
LA-7933
LA-7933
565Monday, November 07, 2011
565Monday, November 07, 2011
565Monday, November 07, 2011
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PEG_CRX_GTX_C_P[0..15]
PEG_CRX_GTX_C_N[0..15]
JCPU1A
D D
C C
B B
DMI_CRX_PTX_N0<19>
DMI_CRX_PTX_N1<19>
DMI_CRX_PTX_N2<19>
DMI_CRX_PTX_N3<19>
DMI_CRX_PTX_P0<19>
DMI_CRX_PTX_P1<19>
DMI_CRX_PTX_P2<19>
DMI_CRX_PTX_P3<19>
DMI_CTX_PRX_N0<19>
DMI_CTX_PRX_N1<19>
DMI_CTX_PRX_N2<19>
DMI_CTX_PRX_N3<19>
DMI_CTX_PRX_P0<19>
DMI_CTX_PRX_P1<19>
DMI_CTX_PRX_P2<19>
DMI_CTX_PRX_P3<19>
FDI_CTX_PRX_N0<19>
FDI_CTX_PRX_N1<19>
FDI_CTX_PRX_N2<19>
FDI_CTX_PRX_N3<19>
FDI_CTX_PRX_N4<19>
FDI_CTX_PRX_N5<19>
FDI_CTX_PRX_N6<19>
FDI_CTX_PRX_N7<19>
FDI_CTX_PRX_P0<19>
FDI_CTX_PRX_P1<19>
FDI_CTX_PRX_P2<19>
FDI_CTX_PRX_P3<19>
FDI_CTX_PRX_P4<19>
FDI_CTX_PRX_P5<19>
FDI_CTX_PRX_P6<19>
FDI_CTX_PRX_P7<19>
FDI_FSYNC0<19>
FDI_FSYNC1<19>
FDI_INT<19>
FDI_LSYNC0<19>
FDI_LSYNC1<19>
(1)EDP_COMPIOuse4miltracetoRC1
(2)EDP_ICOMPOuse12miltoRC1
DMI_CRX_PTX_N0
DMI_CRX_PTX_N1
DMI_CRX_PTX_N2
DMI_CRX_PTX_N3
DMI_CRX_PTX_P0
DMI_CRX_PTX_P1
DMI_CRX_PTX_P2
DMI_CRX_PTX_P3
DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3
DMI_CTX_PRX_P0
DMI_CTX_PRX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_P3
FDI_CTX_PRX_N0
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N5
FDI_CTX_PRX_N6
FDI_CTX_PRX_N7
FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P4
FDI_CTX_PRX_P5
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7
FDI_FSYNC0
FDI_FSYNC1
FDI_INT
FDI_LSYNC0
FDI_LSYNC1
EDP_COMP
JCPU1A
B27
DMI_RX#[0]
B25
DMI_RX#[1]
A25
DMI_RX#[2]
B24
DMI_RX#[3]
B28
DMI_RX[0]
B26
DMI_RX[1]
A24
DMI_RX[2]
B23
DMI_RX[3]
G21
DMI_TX#[0]
E22
DMI_TX#[1]
F21
DMI_TX#[2]
D21
DMI_TX#[3]
G22
DMI_TX[0]
D22
DMI_TX[1]
F20
DMI_TX[2]
C21
DMI_TX[3]
A21
FDI0_TX#[0]
H19
FDI0_TX#[1]
E19
FDI0_TX#[2]
F18
FDI0_TX#[3]
B21
FDI1_TX#[0]
C20
FDI1_TX#[1]
D18
FDI1_TX#[2]
E17
FDI1_TX#[3]
A22
FDI0_TX[0]
G19
FDI0_TX[1]
E20
FDI0_TX[2]
G18
FDI0_TX[3]
B20
FDI1_TX[0]
C19
FDI1_TX[1]
D19
FDI1_TX[2]
F17
FDI1_TX[3]
J18
FDI0_FSYNC
J17
FDI1_FSYNC
H20
FDI_INT
J19
FDI0_LSYNC
H17
FDI1_LSYNC
A18
eDP_COMPIO
A17
eDP_ICOMPO
B16
eDP_HPD#
C15
eDP_AUX
D15
eDP_AUX#
C17
eDP_TX[0]
F16
eDP_TX[1]
C16
eDP_TX[2]
G15
eDP_TX[3]
C18
eDP_TX#[0]
E16
eDP_TX#[1]
D16
eDP_TX#[2]
F15
eDP_TX#[3]
TYCO_2134146-3_IVYBRIDGE~D
TYCO_2134146-3_IVYBRIDGE~D
DMI
DMI
Intel(R) FDI
Intel(R) FDI
eDP
eDP
PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
PEG_RX#[0]
PEG_RX#[1]
PEG_RX#[2]
PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]
PEG_RX#[9]
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]
PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]
PEG_RX[9]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]
PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9]
PEG_TX#[10]
PEG_TX#[11]
PEG_TX#[12]
PCI EXPRESS* - GRAPHICS
PCI EXPRESS* - GRAPHICS
PEG_TX#[13]
PEG_TX#[14]
PEG_TX#[15]
PEG_TX[0]
PEG_TX[1]
PEG_TX[2]
PEG_TX[3]
PEG_TX[4]
PEG_TX[5]
PEG_TX[6]
PEG_TX[7]
PEG_TX[8]
PEG_TX[9]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]
PEG_COMP
J22
J21
H22
PEG_CRX_GTX_N0
K33
PEG_CRX_GTX_N1
M35
PEG_CRX_GTX_N2
L34
PEG_CRX_GTX_N3
J35
PEG_CRX_GTX_N4
J32
PEG_CRX_GTX_N5
H34
PEG_CRX_GTX_N6
H31
PEG_CRX_GTX_N7
G33
PEG_CRX_GTX_N8
G30
PEG_CRX_GTX_N9
F35
PEG_CRX_GTX_N10
E34
PEG_CRX_GTX_N11
E32
PEG_CRX_GTX_N12
D33
PEG_CRX_GTX_N13
D31
PEG_CRX_GTX_N14
B33
PEG_CRX_GTX_N15
C32
PEG_CRX_GTX_P0
J33
PEG_CRX_GTX_P1
L35
PEG_CRX_GTX_P2
K34
PEG_CRX_GTX_P3
H35
PEG_CRX_GTX_P4
H32
PEG_CRX_GTX_P5
G34
PEG_CRX_GTX_P6
G31
PEG_CRX_GTX_P7
F33
PEG_CRX_GTX_P8
F30
PEG_CRX_GTX_P9
E35
PEG_CRX_GTX_P10
E33
PEG_CRX_GTX_P11
F32
PEG_CRX_GTX_P12
D34
PEG_CRX_GTX_P13
E31
PEG_CRX_GTX_P14
C33
PEG_CRX_GTX_P15
B32
PEG_CTX_GRX_C_N0
M29
PEG_CTX_GRX_C_N1
M32
PEG_CTX_GRX_C_N2
M31
PEG_CTX_GRX_C_N3
L32
PEG_CTX_GRX_C_N4
L29
PEG_CTX_GRX_C_N5
K31
PEG_CTX_GRX_C_N6
K28
PEG_CTX_GRX_C_N7
J30
PEG_CTX_GRX_C_N8
J28
PEG_CTX_GRX_C_N9
H29
PEG_CTX_GRX_C_N10
G27
PEG_CTX_GRX_C_N11
E29
PEG_CTX_GRX_C_N12
F27
PEG_CTX_GRX_C_N13
D28
PEG_CTX_GRX_C_N14
F26
PEG_CTX_GRX_C_N15
E25
PEG_CTX_GRX_C_P0
M28
PEG_CTX_GRX_C_P1
M33
PEG_CTX_GRX_C_P2
M30
PEG_CTX_GRX_C_P3
L31
PEG_CTX_GRX_C_P4
L28
PEG_CTX_GRX_C_P5
K30
PEG_CTX_GRX_C_P6
K27
PEG_CTX_GRX_C_P7
J29
PEG_CTX_GRX_C_P8
J27
PEG_CTX_GRX_C_P9
H28
PEG_CTX_GRX_C_P10
G28
PEG_CTX_GRX_C_P11
E28
PEG_CTX_GRX_C_P12
F28
PEG_CTX_GRX_C_P13
D27
PEG_CTX_GRX_C_P14
E26
PEG_CTX_GRX_C_P15
D25
PEG_CTX_GRX_P[0..15]
PEG_CTX_GRX_N[0..15]
CC1 0.22U_0402_16V7K~DCC1 0.22U_0402_16V7K~D
12
CC2 0.22U_0402_16V7K~DCC2 0.22U_0402_16V7K~D
12
CC3 0.22U_0402_16V7K~DCC3 0.22U_0402_16V7K~D
12
CC4 0.22U_0402_16V7K~DCC4 0.22U_0402_16V7K~D
12
CC5 0.22U_0402_16V7K~DCC5 0.22U_0402_16V7K~D
12
CC6 0.22U_0402_16V7K~DCC6 0.22U_0402_16V7K~D
12
CC7 0.22U_0402_16V7K~DCC7 0.22U_0402_16V7K~D
12
CC8 0.22U_0402_16V7K~DCC8 0.22U_0402_16V7K~D
12
CC9 0.22U_0402_16V7K~DCC9 0.22U_0402_16V7K~D
12
CC10 0.22U_0402_16V7K~DCC10 0.22U_0402_16V7K~D
12
CC11 0.22U_0402_16V7K~DCC11 0.22U_0402_16V7K~D
12
CC12 0.22U_0402_16V7K~DCC12 0.22U_0402_16V7K~D
12
CC13 0.22U_0402_16V7K~DCC13 0.22U_0402_16V7K~D
12
CC14 0.22U_0402_16V7K~DCC14 0.22U_0402_16V7K~D
12
CC15 0.22U_0402_16V7K~DCC15 0.22U_0402_16V7K~D
12
CC16 0.22U_0402_16V7K~DCC16 0.22U_0402_16V7K~D
12
CC17 0.22U_0402_16V7K~DCC17 0.22U_0402_16V7K~D
12
CC18 0.22U_0402_16V7K~DCC18 0.22U_0402_16V7K~D
12
CC19 0.22U_0402_16V7K~DCC19 0.22U_0402_16V7K~D
12
CC20 0.22U_0402_16V7K~DCC20 0.22U_0402_16V7K~D
12
CC21 0.22U_0402_16V7K~DCC21 0.22U_0402_16V7K~D
12
CC22 0.22U_0402_16V7K~DCC22 0.22U_0402_16V7K~D
12
CC23 0.22U_0402_16V7K~DCC23 0.22U_0402_16V7K~D
12
CC24 0.22U_0402_16V7K~DCC24 0.22U_0402_16V7K~D
12
CC25 0.22U_0402_16V7K~DCC25 0.22U_0402_16V7K~D
12
CC26 0.22U_0402_16V7K~DCC26 0.22U_0402_16V7K~D
12
CC27 0.22U_0402_16V7K~DCC27 0.22U_0402_16V7K~D
12
CC28 0.22U_0402_16V7K~DCC28 0.22U_0402_16V7K~D
12
CC29 0.22U_0402_16V7K~DCC29 0.22U_0402_16V7K~D
12
CC30 0.22U_0402_16V7K~DCC30 0.22U_0402_16V7K~D
12
CC31 0.22U_0402_16V7K~DCC31 0.22U_0402_16V7K~D
12
CC32 0.22U_0402_16V7K~DCC32 0.22U_0402_16V7K~D
12
CC33 0.22U_0402_16V7K~DCC33 0.22U_0402_16V7K~D
12
CC34 0.22U_0402_16V7K~DCC34 0.22U_0402_16V7K~D
12
CC35 0.22U_0402_16V7K~DCC35 0.22U_0402_16V7K~D
12
CC36 0.22U_0402_16V7K~DCC36 0.22U_0402_16V7K~D
12
CC37 0.22U_0402_16V7K~DCC37 0.22U_0402_16V7K~D
12
CC38 0.22U_0402_16V7K~DCC38 0.22U_0402_16V7K~D
12
CC39 0.22U_0402_16V7K~DCC39 0.22U_0402_16V7K~D
12
CC40 0.22U_0402_16V7K~DCC40 0.22U_0402_16V7K~D
12
CC41 0.22U_0402_16V7K~DCC41 0.22U_0402_16V7K~D
12
CC42 0.22U_0402_16V7K~DCC42 0.22U_0402_16V7K~D
12
CC43 0.22U_0402_16V7K~DCC43 0.22U_0402_16V7K~D
12
CC44 0.22U_0402_16V7K~DCC44 0.22U_0402_16V7K~D
12
CC45 0.22U_0402_16V7K~DCC45 0.22U_0402_16V7K~D
12
CC46 0.22U_0402_16V7K~DCC46 0.22U_0402_16V7K~D
12
CC47 0.22U_0402_16V7K~DCC47 0.22U_0402_16V7K~D
12
CC48 0.22U_0402_16V7K~DCC48 0.22U_0402_16V7K~D
12
CC49 0.22U_0402_16V7K~DCC49 0.22U_0402_16V7K~D
12
CC50 0.22U_0402_16V7K~DCC50 0.22U_0402_16V7K~D
12
CC51 0.22U_0402_16V7K~DCC51 0.22U_0402_16V7K~D
12
CC52 0.22U_0402_16V7K~DCC52 0.22U_0402_16V7K~D
12
CC53 0.22U_0402_16V7K~DCC53 0.22U_0402_16V7K~D
12
CC54 0.22U_0402_16V7K~DCC54 0.22U_0402_16V7K~D
12
CC55 0.22U_0402_16V7K~DCC55 0.22U_0402_16V7K~D
12
CC56 0.22U_0402_16V7K~DCC56 0.22U_0402_16V7K~D
12
CC57 0.22U_0402_16V7K~DCC57 0.22U_0402_16V7K~D
12
CC58 0.22U_0402_16V7K~DCC58 0.22U_0402_16V7K~D
12
CC59 0.22U_0402_16V7K~DCC59 0.22U_0402_16V7K~D
12
CC60 0.22U_0402_16V7K~DCC60 0.22U_0402_16V7K~D
12
CC61 0.22U_0402_16V7K~DCC61 0.22U_0402_16V7K~D
12
CC62 0.22U_0402_16V7K~DCC62 0.22U_0402_16V7K~D
12
CC63 0.22U_0402_16V7K~DCC63 0.22U_0402_16V7K~D
12
CC64 0.22U_0402_16V7K~DCC64 0.22U_0402_16V7K~D
12
PEG_CRX_GTX_C_P[0..15] <16>
PEG_CRX_GTX_C_N[0..15] <16>
PEG_CTX_GRX_P[0..15] <16>
PEG_CTX_GRX_N[0..15] <16>
PEG_CRX_GTX_C_N0
PEG_CRX_GTX_C_N1
PEG_CRX_GTX_C_N2
PEG_CRX_GTX_C_N3
PEG_CRX_GTX_C_N4
PEG_CRX_GTX_C_N5
PEG_CRX_GTX_C_N6
PEG_CRX_GTX_C_N7
PEG_CRX_GTX_C_N8
PEG_CRX_GTX_C_N9
PEG_CRX_GTX_C_N10
PEG_CRX_GTX_C_N11
PEG_CRX_GTX_C_N12
PEG_CRX_GTX_C_N13
PEG_CRX_GTX_C_N14
PEG_CRX_GTX_C_N15
PEG_CRX_GTX_C_P0
PEG_CRX_GTX_C_P1
PEG_CRX_GTX_C_P2
PEG_CRX_GTX_C_P3
PEG_CRX_GTX_C_P4
PEG_CRX_GTX_C_P5
PEG_CRX_GTX_C_P6
PEG_CRX_GTX_C_P7
PEG_CRX_GTX_C_P8
PEG_CRX_GTX_C_P9
PEG_CRX_GTX_C_P10
PEG_CRX_GTX_C_P11
PEG_CRX_GTX_C_P12
PEG_CRX_GTX_C_P13
PEG_CRX_GTX_C_P14
PEG_CRX_GTX_C_P15
PEG_CTX_GRX_N0
PEG_CTX_GRX_N1
PEG_CTX_GRX_N2
PEG_CTX_GRX_N3
PEG_CTX_GRX_N4
PEG_CTX_GRX_N5
PEG_CTX_GRX_N6
PEG_CTX_GRX_N7
PEG_CTX_GRX_N8
PEG_CTX_GRX_N9
PEG_CTX_GRX_N10
PEG_CTX_GRX_N11
PEG_CTX_GRX_N12
PEG_CTX_GRX_N13
PEG_CTX_GRX_N14
PEG_CTX_GRX_N15
PEG_CTX_GRX_P0
PEG_CTX_GRX_P1
PEG_CTX_GRX_P2
PEG_CTX_GRX_P3
PEG_CTX_GRX_P4
PEG_CTX_GRX_P5
PEG_CTX_GRX_P6
PEG_CTX_GRX_P7
PEG_CTX_GRX_P8
PEG_CTX_GRX_P9
PEG_CTX_GRX_P10
PEG_CTX_GRX_P11
PEG_CTX_GRX_P12
PEG_CTX_GRX_P13
PEG_CTX_GRX_P14
PEG_CTX_GRX_P15
JCPU1I
JCPU1I
T35
VSS161
T34
VSS162
T33
VSS163
T32
VSS164
T31
VSS165
T30
VSS166
T29
VSS167
T28
VSS168
T27
VSS169
T26
VSS170
P9
VSS171
P8
VSS172
P6
VSS173
P5
VSS174
P3
VSS175
P2
VSS176
N35
VSS177
N34
VSS178
N33
VSS179
N32
VSS180
N31
VSS181
N30
VSS182
N29
VSS183
N28
VSS184
N27
VSS185
N26
VSS186
M34
VSS187
L33
VSS188
L30
VSS189
L27
VSS190
L9
VSS191
L8
VSS192
L6
VSS193
L5
VSS194
L4
VSS195
L3
VSS196
L2
VSS197
L1
VSS198
K35
VSS199
K32
VSS200
K29
VSS201
K26
VSS202
J34
VSS203
J31
VSS204
H33
VSS205
H30
VSS206
H27
VSS207
H24
VSS208
H21
VSS209
H18
VSS210
H15
VSS211
H13
VSS212
H10
VSS213
H9
VSS214
H8
VSS215
H7
VSS216
H6
VSS217
H5
VSS218
H4
VSS219
H3
VSS220
H2
VSS221
H1
VSS222
G35
VSS223
G32
VSS224
G29
VSS225
G26
VSS226
G23
VSS227
G20
VSS228
G17
VSS229
G11
VSS230
F34
VSS231
F31
VSS232
F29
VSS233
VSS
VSS
VSS234
VSS235
VSS236
VSS237
VSS238
VSS239
VSS240
VSS241
VSS242
VSS243
VSS244
VSS245
VSS246
VSS247
VSS248
VSS249
VSS250
VSS251
VSS252
VSS253
VSS254
VSS255
VSS256
VSS257
VSS258
VSS259
VSS260
VSS261
VSS262
VSS263
VSS264
VSS265
VSS266
VSS267
VSS268
VSS269
VSS270
VSS271
VSS272
VSS273
VSS274
VSS275
VSS276
VSS277
VSS278
VSS279
VSS280
VSS281
VSS282
VSS283
VSS284
VSS285
F22
F19
E30
E27
E24
E21
E18
E15
E13
E10
E9
E8
E7
E6
E5
E4
E3
E2
E1
D35
D32
D29
D26
D20
D17
C34
C31
C28
C27
C25
C23
C10
C1
B22
B19
B17
B15
B13
B11
B9
B8
B7
B5
B3
B2
A35
A32
A29
A26
A23
A20
A3
LInkCIS
TYCO_2134146-3_IVYBRIDGE~D
+1.05V_RUN_VTT +1.05V_RUN_VTT
EDP_COMP
RC1 24.9_0402_1%~DRC1 24.9_0402_1%~D
eDPCompensation
eDP_COMPIOandICOMPOsignalsshouldbeshortednear
ballsandroutedwithtypicalimpedance<25mohms
A A
12
PEGCompensation
1 2
RC2 24.9_0402_1%~DRC2 24.9_0402_1%~D
PEG_ICOMPIandRCOMPOsignals
shouldbeshortedandroutedwith
‐maxlength=500mils
‐typicalimpedance=43mohms
PEG_ICOMPOsignalsshouldberoutedwith
‐maxlength=500mils
‐typicalimpedance=14.5mohms
PEG_COMP
TYCO_2134146-3_IVYBRIDGE~D
LInkCIS
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
Ivy Bridge (1/6)
Ivy Bridge (1/6)
Ivy Bridge (1/6)
LA-7933
LA-7933
LA-7933
665Monday, November 07, 2011
665Monday, November 07, 2011
665Monday, November 07, 2011
1
0.2
0.2
0.2
of
of
of
5
4
3
2
1
FollowDGRev0.71SM_DRAMPWROKtopology
+3.3V_ALW_PCH
RUNPWROK<46,47>
D D
PM_DRAM_PWRGD<19>
+3.3V_ALW_PCH
+1.05V_RUN_VTT
1 2
RC6 200_0402_5%~DRC6 200_0402_5%~D
1 2
RC14 56_0402_5%~D@RC14 56_0402_5%~D@
1 2
RC15 49.9_0402_1%~D@RC15 49.9_0402_1%~D@
1 2
RC16 62_0402_5%~DRC16 62_0402_5%~D
1
2
H_THERMTRIP#
H_CATERR#
H_PROCHOT#
CC65
CC65
1 2
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
5
P
B
4
O
A
G
UC1
UC1
74AHC1G09GW_TSSOP5~D
74AHC1G09GW_TSSOP5~D
3
RUN_ON_CPU1.5VS3#<11,50>
AvoidPower_SRCtracenoise
couplingeffecttoCPU
C C
B B
A A
H_PROCHOT#
220P_0402_50V7K~D
220P_0402_50V7K~D
CC92
CC92
12
PlaceCC92nearCPU
H_CPUPWRGD<21>
BufferedresettoCPU
PCH_PLTRST#<17,20>
CPU_DETECT#<46>
H_CATERR#
PECI_EC<47>
H_PROCHOT#_R
H_PROCHOT#<26,47,58,60>
H_THERMTRIP#<25>
1 2
RC22 56_0402_5%~DRC22 56_0402_5%~D
PlaceRC22nearCPU
RC24 0_0402_5%~DRC24 0_0402_5%~D
H_PM_SYNC<19>
RC27 0_0402_5%~DRC27 0_0402_5%~D
1 2
1 2
+3.3V_RUN
1
NC
2
A
5
P
G
3
H_THERMTRIP#_R
H_PM_SYNC
H_CPUPWRGD_R
VDDPWRGOOD_R
PCH_PLTRST#_R
1
2
PCH_PLTRST#_BUF
4
Y
UC2
UC2
SN74LVC1G07DCKR_SC70-5~D
SN74LVC1G07DCKR_SC70-5~D
Opendrainbuffer
5
+1.5V_CPU_VDDQ
12
RC4
RC4
200_0402_5%~D
200_0402_5%~D
VDDPWRGOOD
39_0402_5%~D
39_0402_5%~D
12
@RC7
@
RC7
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
@
@
13
D
D
QC1
QC1
2
G
G
S
S
JCPU1B
JCPU1B
C26
PROC_SELECT#
AN34
SKTOCC#
AL33
CATERR#
AN33
PECI
AL32
PROCHOT#
AN32
THERMTRIP#
AM34
PM_SYNC
AP33
UNCOREPWRGOOD
V8
SM_DRAMPWROK
AR33
RESET#
TYCO_2134146-3_IVYBRIDGE~D
TYCO_2134146-3_IVYBRIDGE~D
1 2
RC5 130_0402_5%~DRC5 130_0402_5%~D
VDDPWRGOOD_R
MISCTHERMALPWR MANAGEMENT
MISCTHERMALPWR MANAGEMENT
CLOCKS
CLOCKS
DDR3
MISC
DDR3
MISC
JTAG & BPM
JTAG & BPM
LInkCIS
BCLK
BCLK#
DPLL_REF_CLK
DPLL_REF_CLK#
SM_DRAMRST#
SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]
PRDY#
PREQ#
TMS
TRST#
TDO
DBR#
BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]
TCK
TDI
A28
A27
A16
A15
R8
AK1
A5
A4
AP29
AP27
AR26
AR27
AP30
AR28
AP26
XDP_DBRESET#_R
AL35
AT28
AR29
AR30
AT30
AP32
AR31
AT31
AR32
CPU_DMI
RC17 0_0402_5%~DRC17 0_0402_5%~D
CPU_DMI#
RC18 0_0402_5%~DRC18 0_0402_5%~D
CPU_DPLL
RC19 1K_0402_1%~DRC19 1K_0402_1%~D
CPU_DPLL#
RC20 1K_0402_1%~DRC20 1K_0402_1%~D
DDR3_DRAMRST#_CPU
SM_RCOMP0
SM_RCOMP1
SM_RCOMP2
XDP_PRDY#
XDP_PREQ#
XDP_TCLK
XDP_TMS
XDP_TRST#
XDP_TDI_R
XDP_TDO_R
XDP_OBS0_R
XDP_OBS1_R
XDP_OBS2_R
XDP_OBS3_R
XDP_OBS4_R
XDP_OBS5_R
XDP_OBS6_R
XDP_OBS7_R
+3.3V_ALW_PCH
1 2
RC3 1K_0402_5%~D@RC3 1K_0402_5%~D@
+1.05V_RUN_VTT
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
1
CC66
CC66
2
2
PlacenearJXDP1
1 2
1 2
1 2
1 2
4.99K_0402_1%~D
4.99K_0402_1%~D
12
RC23
RC23
DDR_HVREF_RST_PCH<18>
DDR_HVREF_RST_GATE<47>
RC28 0_0402_5%~DRC28 0_0402_5%~D
1 2
T73PAD~D @T73PAD~D @
T74PAD~D @T74PAD~D @
T75PAD~D @T75PAD~D @
T76PAD~D @T76PAD~D @
T77PAD~D @T77PAD~D @
T78PAD~D @T78PAD~D @
T79PAD~D @T79PAD~D @
T80PAD~D @T80PAD~D @
SYS_PWROK_XDP
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
CC67
CC67
CLK_CPU_DMI <18>
CLK_CPU_DMI# <18>H_SNB_IVB#<21>
+1.05V_RUN_VTT
D
S
D
S
13
QC2
QC2
G
G
BSS138W-7-F_SOT323-3~D
BSS138W-7-F_SOT323-3~D
2
1
CC68
CC68
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
2
RC25 0_0402_5%~DRC25 0_0402_5%~D
1 2
RC26 0_0402_5%~D@RC26 0_0402_5%~D@
1 2
XDP_DBRESET# <17,19>
H_CPUPWRGD H_CPUPWRGD_XDP
SIO_PWRBTN#_R<17,19>
CFG0<9>
SYS_PWROK<19,46>
DDR3_DRAMRST# <12>
DDR_HVREF_RST
RC33 0_0402_5%~DRC33 0_0402_5%~D
XDP_TDO_R XDP_TDO
RC37 0_0402_5%~DRC37 0_0402_5%~D
RC8 1K_0402_5%~DRC8 1K_0402_5%~D
1 2
RC9 0_0402_5%~DRC9 0_0402_5%~D
1 2
RC10 1K_0402_5%~DRC10 1K_0402_5%~D
1 2
RC11 0_0402_5%~D@RC11 0_0402_5%~D@
1 2
1 2
1 2
DDR_HVREF_RST <12>
XDP_PREQ#
XDP_PRDY#
CFD_PWRBTN#_XDP
XDP_HOOK2
SYS_PWROK_XDP
CLK_XDP
CLK_XDP#
XDP_RST#_R
XDP_DBRESET#
XDP_TDO
XDP_TRST#
XDP_TDI
XDP_TMS
XDP_TCLK
XDP_RST#_R
CLK_XDP
CLK_XDP#
CLK_XDP_ITP<9>
CLK_XDP_ITP#<9>
XDP_TDIXDP_TDI_R
+1.05V_RUN_VTT
JXDP1
JXDP1
1
OBSFN_A0
2
OBSFN_A1
3
GND
4
OBSDATA_A[0]
5
OBSDATA_A[1]
6
GND
7
OBSDATA_A[2]
8
OBSDATA_A[3]
9
GND
10
HOOK0
11
HOOK1
12
HOOK2
13
HOOK3
14
HOOK4
15
HOOK5
16
VCCOBS_AB
17
HOOK6
18
HOOK7
19
GND
20
TDO
21
TRSTn
22
TDI
23
TMS
TCK124GND
25
GND
26
TCK0
MOLEX_52435-2671
MOLEX_52435-2671
CONN@
CONN@
RC21 1K_0402_5%~DRC21 1K_0402_5%~D
RH1 0_0402_5%~DRH1 0_0402_5%~D
RH2 0_0402_5%~DRH2 0_0402_5%~D
RH3 0_0402_5%~D@RH3 0_0402_5%~D@
RH4 0_0402_5%~D@RH4 0_0402_5%~D@
12
1 2
1 2
1 2
1 2
PU/PDforJTAGsignals
XDP_DBRESET#
XDP_TMS
XDP_TDI_R
XDP_PREQ#
XDP_TDO
XDP_TCLK
XDP_TRST#
1 2
1 2
1 2
1 2
1 2
1 2
1 2
27
28
GND
PLTRST_XDP# <20>
CLK_CPU_ITP <18>
CLK_CPU_ITP# <18>
+3.3V_RUN
RC301K_0402_5%~D RC301K_0402_5%~D
+1.05V_RUN_VTT
RC3851_0402_1%~D RC3851_0402_1%~D
RC4151_0402_1%~D RC4151_0402_1%~D
RC4251_0402_1%~D @RC4251_0402_1%~D @
RC4351_0402_1%~D RC4351_0402_1%~D
RC4451_0402_1%~D RC4451_0402_1%~D
RC4551_0402_1%~D RC4551_0402_1%~D
Maxlength=500mils
+1.05V_RUN_VTT
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
CC69
CC69
75_0402_1%~D
75_0402_1%~D
12
RC49
RC49
H_CPUPWRGD
1 2
RC4610K_0402_5%~D RC4610K_0402_5%~D
AvoidstubinthePWRGDpath
Tracewidth=15mils
SM_RCOMP2
SM_RCOMP1
SM_RCOMP0
1 2
1 2
1 2
RC47200_0402_1%~D RC47200_0402_1%~D
RC4825.5_0402_1%~D RC4825.5_0402_1%~D
RC50140_0402_1%~D RC50140_0402_1%~D
whileplacingresistorsRC27&RC46
PCH_PLTRST#_R
1 2
RC51 43_0402_5%~DRC51 43_0402_5%~D
4
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
Ivy Bridge (2/6)
Ivy Bridge (2/6)
Ivy Bridge (2/6)
LA-7933
LA-7933
LA-7933
1
765Tuesday, November 08, 2011
765Tuesday, November 08, 2011
765Tuesday, November 08, 2011
of
of
of
0.2
0.2
0.2
5
D D
JCPU1C
JCPU1C
4
3
JCPU1D
JCPU1D
2
1
DDR_A_D[0..63]<12,13>
C C
B B
DDR_A_BS0<12,13>
DDR_A_BS1<12,13>
DDR_A_BS2<12,13>
DDR_A_CAS#<12,13>
DDR_A_RAS#<12,13>
DDR_A_WE#<12,13>
DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63
DDR_A_BS0
DDR_A_BS1
DDR_A_BS2
DDR_A_CAS#
DDR_A_RAS#
DDR_A_WE#
AP11
AN11
AL12
AM12
AM11
AL11
AP12
AN12
AJ14
AH14
AL15
AK15
AL14
AK14
AJ15
AH15
AE10
AF10
F10
G10
N10
M10
AG6
AG5
AK6
AK5
AH5
AH6
AJ5
AJ6
AJ8
AK8
AJ9
AK9
AH8
AH9
AL9
AL8
AE8
AD9
AF9
C5
D5
D3
D2
D6
C6
C2
C3
F8
G9
F9
F7
G8
G7
K4
K5
K1
J1
J5
J4
J2
K2
M8
N8
N7
M9
N9
M7
V6
SA_DQ[0]
SA_DQ[1]
SA_DQ[2]
SA_DQ[3]
SA_DQ[4]
SA_DQ[5]
SA_DQ[6]
SA_DQ[7]
SA_DQ[8]
SA_DQ[9]
SA_DQ[10]
SA_DQ[11]
SA_DQ[12]
SA_DQ[13]
SA_DQ[14]
SA_DQ[15]
SA_DQ[16]
SA_DQ[17]
SA_DQ[18]
SA_DQ[19]
SA_DQ[20]
SA_DQ[21]
SA_DQ[22]
SA_DQ[23]
SA_DQ[24]
SA_DQ[25]
SA_DQ[26]
SA_DQ[27]
SA_DQ[28]
SA_DQ[29]
SA_DQ[30]
SA_DQ[31]
SA_DQ[32]
SA_DQ[33]
SA_DQ[34]
SA_DQ[35]
SA_DQ[36]
SA_DQ[37]
SA_DQ[38]
SA_DQ[39]
SA_DQ[40]
SA_DQ[41]
SA_DQ[42]
SA_DQ[43]
SA_DQ[44]
SA_DQ[45]
SA_DQ[46]
SA_DQ[47]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]
SA_BS[0]
SA_BS[1]
SA_BS[2]
SA_CAS#
SA_RAS#
SA_WE#
DDR SYSTEM MEMORY A
DDR SYSTEM MEMORY A
SA_CK[0]
SA_CLK#[0]
SA_CKE[0]
SA_CK[1]
SA_CLK#[1]
SA_CKE[1]
SA_CK[2]
SA_CLK#[2]
SA_CKE[2]
SA_CK[3]
SA_CLK#[3]
SA_CKE[3]
SA_CS#[0]
SA_CS#[1]
SA_CS#[2]
SA_CS#[3]
SA_ODT[0]
SA_ODT[1]
SA_ODT[2]
SA_ODT[3]
SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]
SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]
SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]
SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]
AB6
AA6
V9
AA5
AB5
V10
AB4
AA4
W9
AB3
AA3
W10
AK3
AL3
AG1
AH1
AH3
AG3
AG2
AH2
C4
G6
J3
M6
AL6
AM8
AR12
AM15
D4
F6
K3
N6
AL5
AM9
AR11
AM14
AD10
W1
W2
W7
V3
V2
W3
W6
V1
W5
AD8
V4
W4
AF8
V5
V7
M_CLK_DDR#0
DDR_CKE0_DIMM2
M_CLK_DDR1
M_CLK_DDR#1
DDR_CKE1_DIMM2
M_CLK_DDR4
M_CLK_DDR#4
DDR_CKE4_DIMM1
M_CLK_DDR5
M_CLK_DDR#5
DDR_CKE5_DIMM1
DDR_CS0_DIMM2#
DDR_CS1_DIMM2#
DDR_CS4_DIMM1#
DDR_CS5_DIMM1#
M_ODT0
M_ODT4
M_ODT5
DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7
DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7
DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_MA14
DDR_A_MA15
M_CLK_DDR0 <13>
M_CLK_DDR#0 <13>
DDR_CKE0_DIMM2 <13>
M_CLK_DDR1 <13>
M_CLK_DDR#1 <13>
DDR_CKE1_DIMM2 <13>
M_CLK_DDR4 <12>
M_CLK_DDR#4 <12>
DDR_CKE4_DIMM1 <12>
M_CLK_DDR5 <12>
M_CLK_DDR#5 <12>
DDR_CKE5_DIMM1 <12>
DDR_CS0_DIMM2# <13>
DDR_CS1_DIMM2# <13>
DDR_CS4_DIMM1# <12>
DDR_CS5_DIMM1# <12>
M_ODT0 <13>
M_ODT1 <13>
M_ODT4 <12>
M_ODT5 <12>
DDR_A_DQS#[0..7] <12,13>
DDR_A_DQS[0..7] <12,13>
DDR_A_MA[0..15] <12,13>
DDR_B_D[0..63]<14,15>
DDR_B_BS0<14,15>
DDR_B_BS1<14,15>
DDR_B_BS2<14,15>
DDR_B_CAS#<14,15>
DDR_B_RAS#<14,15>
DDR_B_WE#<14,15>
DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63
DDR_B_BS0
DDR_B_BS1
DDR_B_BS2
DDR_B_CAS#
DDR_B_RAS#
DDR_B_WE#
AM5
AM6
AR3
AN3
AN2
AN1
AN9
AN8
AR6
AR5
AR9
AJ11
AH11
AR8
AJ12
AH12
AT11
AN14
AR14
AT14
AT12
AN15
AR15
AT15
AA10
C9
SB_DQ[0]
A7
SB_DQ[1]
D10
SB_DQ[2]
C8
SB_DQ[3]
A9
SB_DQ[4]
A8
SB_DQ[5]
D9
SB_DQ[6]
D8
SB_DQ[7]
G4
SB_DQ[8]
F4
SB_DQ[9]
F1
SB_DQ[10]
G1
SB_DQ[11]
G5
SB_DQ[12]
F5
SB_DQ[13]
F2
SB_DQ[14]
G2
SB_DQ[15]
J7
SB_DQ[16]
J8
SB_DQ[17]
K10
SB_DQ[18]
K9
SB_DQ[19]
J9
SB_DQ[20]
J10
SB_DQ[21]
K8
SB_DQ[22]
K7
SB_DQ[23]
M5
SB_DQ[24]
N4
SB_DQ[25]
N2
SB_DQ[26]
N1
SB_DQ[27]
M4
SB_DQ[28]
N5
SB_DQ[29]
M2
SB_DQ[30]
M1
SB_DQ[31]
SB_DQ[32]
SB_DQ[33]
SB_DQ[34]
AP3
SB_DQ[35]
SB_DQ[36]
SB_DQ[37]
SB_DQ[38]
AP2
SB_DQ[39]
AP5
SB_DQ[40]
SB_DQ[41]
AT5
SB_DQ[42]
AT6
SB_DQ[43]
AP6
SB_DQ[44]
SB_DQ[45]
SB_DQ[46]
SB_DQ[47]
SB_DQ[48]
SB_DQ[49]
AT8
SB_DQ[50]
AT9
SB_DQ[51]
SB_DQ[52]
SB_DQ[53]
SB_DQ[54]
SB_DQ[55]
SB_DQ[56]
SB_DQ[57]
SB_DQ[58]
SB_DQ[59]
SB_DQ[60]
SB_DQ[61]
SB_DQ[62]
SB_DQ[63]
AA9
SB_BS[0]
AA7
SB_BS[1]
R6
SB_BS[2]
SB_CAS#
AB8
SB_RAS#
AB9
SB_WE#
SB_CK[0]
SB_CLK#[0]
SB_CKE[0]
SB_CK[1]
SB_CLK#[1]
SB_CKE[1]
SB_CK[2]
SB_CLK#[2]
SB_CKE[2]
SB_CK[3]
SB_CLK#[3]
SB_CKE[3]
SB_CS#[0]
SB_CS#[1]
SB_CS#[2]
SB_CS#[3]
SB_ODT[0]
SB_ODT[1]
SB_ODT[2]
SB_ODT[3]
SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]
SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]
DDR SYSTEM MEMORY B
DDR SYSTEM MEMORY B
SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]
SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]
M_CLK_DDR0
AE2
AD2
R9
AE1
AD1
R10
AB2
AA2
T9
AA1
AB1
T10
AD3
AE3
AD6
AE6
AE4
AD4
AD5
AE5
D7
F3
K6
N3
AN5
AP9
AK12
AP15
C7
G3
J6
M3
AN6
AP8
AK11
AP14
AA8
T7
R7
T6
T2
T4
T3
R2
T5
R3
AB7
R1
T1
AB10
R5
R4
M_CLK_DDR2
M_CLK_DDR#2
DDR_CKE2_DIMM4
M_CLK_DDR3
M_CLK_DDR#3
DDR_CKE3_DIMM4
M_CLK_DDR6
M_CLK_DDR#6
DDR_CKE6_DIMM3
M_CLK_DDR7
M_CLK_DDR#7
DDR_CKE7_DIMM3
DDR_CS2_DIMM4#
DDR_CS3_DIMM4#
DDR_CS6_DIMM3#
DDR_CS7_DIMM3#
M_ODT2
M_ODT3M_ODT1
M_ODT6
M_ODT7
DDR_B_DQS#0
DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#5
DDR_B_DQS#6
DDR_B_DQS#7
DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7
DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
DDR_B_MA14
DDR_B_MA15
M_CLK_DDR2 <15>
M_CLK_DDR#2 <15>
DDR_CKE2_DIMM4 <15>
M_CLK_DDR3 <15>
M_CLK_DDR#3 <15>
DDR_CKE3_DIMM4 <15>
M_CLK_DDR6 <14>
M_CLK_DDR#6 <14>
DDR_CKE6_DIMM3 <14>
M_CLK_DDR7 <14>
M_CLK_DDR#7 <14>
DDR_CKE7_DIMM3 <14>
DDR_CS2_DIMM4# <15>
DDR_CS3_DIMM4# <15>
DDR_CS6_DIMM3# <14>
DDR_CS7_DIMM3# <14>
M_ODT2 <15>
M_ODT3 <15>
M_ODT6 <14>
M_ODT7 <14>
DDR_B_DQS#[0..7] <14,15>
DDR_B_DQS[0..7] <14,15>
DDR_B_MA[0..15] <14,15>
TYCO_2134146-3_IVYBRIDGE~D
TYCO_2134146-3_IVYBRIDGE~D
TYCO_2134146-3_IVYBRIDGE~D
TYCO_2134146-3_IVYBRIDGE~D
LInkCIS LInkCIS
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
Ivy Bridge (3/6)
Ivy Bridge (3/6)
Ivy Bridge (3/6)
LA-7933
LA-7933
LA-7933
865Monday, November 07, 2011
865Monday, November 07, 2011
865Monday, November 07, 2011
1
0.2
0.2
0.2
of
of
of
5
4
3
2
1
CFGStrapsforProcessor
CFG2
D D
JCPU1E
JCPU1E
T1 PAD~D@T1 PAD~D@
T2 PAD~D@T2 PAD~D@
T3 PAD~D@T3 PAD~D@
T4 PAD~D@T4 PAD~D@
T5 PAD~D@T5 PAD~D@
T6 PAD~D@T6 PAD~D@
T8 PAD~D@T8 PAD~D@
T10 PAD~D@T10 PAD~D@
T12 PAD~D@T12 PAD~D@
T14 PAD~D@T14 PAD~D@
T15 PAD~D@T15 PAD~D@
T16 PAD~D@T16 PAD~D@
T17 PAD~D@T17 PAD~D@
T19 PAD~D@T19 PAD~D@
T20 PAD~D@T20 PAD~D@
T21 PAD~D@T21 PAD~D@
T22 PAD~D@T22 PAD~D@
T23 PAD~D@T23 PAD~D@
T28 PAD~D@T28 PAD~D@
T30 PAD~D@T30 PAD~D@
T32 PAD~D@T32 PAD~D@
T34 PAD~D@T34 PAD~D@
T36 PAD~D@T36 PAD~D@
T42 PAD~D@T42 PAD~D@
T44 PAD~D@T44 PAD~D@
CLK_XDP_ITP <7>
CLK_XDP_ITP# <7>
T50 PAD~D@T50 PAD~D@
T51 PAD~D@T51 PAD~D@
T52 PAD~D@T52 PAD~D@
T53 PAD~D@T53 PAD~D@
RSVD28
RSVD29
RSVD30
RSVD31
RSVD32
RSVD33
RSVD34
RSVD35
RSVD37
RSVD38
RSVD39
RSVD40
RSVD51
RSVD52
BCLK_ITP
BCLK_ITP#
KEY
AH27
AH26
L7
AG7
AE7
AK2
W8
AT26
AM33
AJ27
T8
J16
H16
G16
AR35
AT34
AT33
AP35
AR34
B34
A33
A34
B35
C35
AJ32
AK32
AN35
AM35
AT2
AT1
AR1
B1
CFG0<7>
T60 PAD~D@T60 PAD~D@
T55 PAD~D@T55 PAD~D@
T64 PAD~D@T64 PAD~D@
T68 PAD~D@T68 PAD~D@
T69 PAD~D@T69 PAD~D@
T70 PAD~D@T70 PAD~D@
T7 PAD~D@T7 PAD~D@
+VCC_GFXCORE
1 2
+VCC_CORE
RC59 49.9_0402_1%~D@RC59 49.9_0402_1%~D@
RC61 49.9_0402_1%~D@RC61 49.9_0402_1%~D@
RC54 49.9_0402_1%~D@RC54 49.9_0402_1%~D@
RC56 49.9_0402_1%~D@RC56 49.9_0402_1%~D@
1 2
1 2
1 2
C C
B B
VAXG_VAL_SENSE
12
RC55
@RC55
@
100_0402_1%~D
100_0402_1%~D
VSSAXG_VAL_SENSE
VCC_VAL_SNESE
12
@RC60
@
100_0402_1%~D
100_0402_1%~D
VSS_VAL_SNESE
T9 PAD~D@T9 PAD~D@
T11 PAD~D@T11 PAD~D@
T13 PAD~D@T13 PAD~D@
T71 PAD~D@T71 PAD~D@
T72 PAD~D@T72 PAD~D@
T18PAD~D @T18PAD~D @
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
VAXG_VAL_SENSE
VSSAXG_VAL_SENSE
VCC_VAL_SNESE
VSS_VAL_SNESE
T24PAD~D @T24PAD~D @
T25PAD~D @T25PAD~D @
T26PAD~D @T26PAD~D @
T27PAD~D @T27PAD~D @
T29PAD~D @T29PAD~D @
T31PAD~D @T31PAD~D @
T33PAD~D @T33PAD~D @
T35PAD~D @T35PAD~D @
T37PAD~D @T37PAD~D @RC60
T38PAD~D @T38PAD~D @
T39PAD~D @T39PAD~D @
T40PAD~D @T40PAD~D @
T41PAD~D @T41PAD~D @
T43PAD~D @T43PAD~D @
T45PAD~D @T45PAD~D @
T46PAD~D @T46PAD~D @
T47PAD~D @T47PAD~D @
T48PAD~D @T48PAD~D @
T49PAD~D @T49PAD~D @
AK28
CFG[0]
AK29
CFG[1]
AL26
CFG[2]
AL27
CFG[3]
AK26
CFG[4]
AL29
CFG[5]
AL30
CFG[6]
AM31
CFG[7]
AM32
CFG[8]
AM30
CFG[9]
AM28
CFG[10]
AM26
CFG[11]
AN28
CFG[12]
AN31
CFG[13]
AN26
CFG[14]
AM27
CFG[15]
AK31
CFG[16]
AN29
CFG[17]
AJ31
VAXG_VAL_SENSE
AH31
VSSAXG_VAL_SENSE
AJ33
VCC_VAL_SENSE
AH33
VSS_VAL_SENSE
AJ26
RSVD5
F25
RSVD8
F24
RSVD9
F23
RSVD10
D24
RSVD11
G25
RSVD12
G24
RSVD13
E23
RSVD14
D23
RSVD15
C30
RSVD16
A31
RSVD17
B30
RSVD18
B29
RSVD19
D30
RSVD20
B31
RSVD21
A30
RSVD22
C29
RSVD23
J20
RSVD24
B18
RSVD25
J15
RSVD27
TYCO_2134146-3_IVYBRIDGE~D
TYCO_2134146-3_IVYBRIDGE~D
CFG
CFG
VCC_DIE_SENSE
VSS_DIE_SENSE
RSVD_NCTF1
RSVD_NCTF2
RSVD_NCTF3
RSVD_NCTF4
RSVD_NCTF5
RSVD_NCTF6
RSVD_NCTF7
RSVD_NCTF8
RESERVED
RESERVED
RSVD_NCTF9
RSVD_NCTF10
RSVD_NCTF11
RSVD_NCTF12
RSVD_NCTF13
PEGStaticLaneReversal‐CFG2isforthe16x
CFG2
CFG4
1:Disabled;NoPhysicalDisplayPort
CFG4
attachedtoEmbeddedDisplayPort
0:Enabled;AnexternalDisplayPortdeviceis
connectedtotheEmbeddedDisplayPort
CFG6
CFG5
11:(Default)x16‐Device1functions1and2disabled
10:x8,x8‐Device1function1enabled;function2
CFG[6:5]
disabled
01:Reserved‐(Device1function1disabled;function
2enabled)
00:x8,x4,x4‐Device1functions1and2enabled
LInkCIS
1K_0402_5%~D
1K_0402_5%~D
12
@RC52
@
RC52
1:(Default)NormalOperation;Lane#
definitionmatchessocketpinmapdefinition
0:LaneReversed
1K_0402_5%~D
1K_0402_5%~D
12
@
@
RC53
RC53
DisplayPortPresenceStrap
1K_0402_5%~D
1K_0402_5%~D
1K_0402_5%~D
1K_0402_5%~D
12
12
@RC57
@
@RC58
@
RC57
RC58
PCIEPortBifurcationStraps
CFG7
1K_0402_5%~D
1K_0402_5%~D
12
@RC62
@
RC62
PEGDEFERTRAINING
1:(Default)PEGTrainimmediately
followingxxRESETBdeassertion
CFG7
0:PEGWaitforBIOSfortraining
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
Ivy Bridge (4/6)
Ivy Bridge (4/6)
Ivy Bridge (4/6)
LA-7933
LA-7933
LA-7933
965Monday, November 07, 2011
965Monday, November 07, 2011
965Monday, November 07, 2011
1
0.2
0.2
0.2
of
of
of
5
JCPU1F
JCPU1F
4
POWER
POWER
3
2
1
+VCC_CORE
97A
AG35
VCC1
AG34
VCC2
AG33
VCC3
AG32
D D
C C
B B
A A
AG31
AG30
AG29
AG28
AG27
AG26
AF35
AF34
AF33
AF32
AF31
AF30
AF29
AF28
AF27
AF26
AD35
AD34
AD33
AD32
AD31
AD30
AD29
AD28
AD27
AD26
AC35
AC34
AC33
AC32
AC31
AC30
AC29
AC28
AC27
AC26
AA35
AA34
AA33
AA32
AA31
AA30
AA29
AA28
AA27
AA26
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
Y35
VCC51
Y34
VCC52
Y33
VCC53
Y32
VCC54
Y31
VCC55
Y30
VCC56
Y29
VCC57
Y28
VCC58
Y27
VCC59
Y26
VCC60
V35
VCC61
V34
VCC62
V33
VCC63
V32
VCC64
V31
VCC65
V30
VCC66
V29
VCC67
V28
VCC68
V27
VCC69
V26
VCC70
U35
VCC71
U34
VCC72
U33
VCC73
U32
VCC74
U31
VCC75
U30
VCC76
U29
VCC77
U28
VCC78
U27
VCC79
U26
VCC80
R35
VCC81
R34
VCC82
R33
VCC83
R32
VCC84
R31
VCC85
R30
VCC86
R29
VCC87
R28
VCC88
R27
VCC89
R26
VCC90
P35
VCC91
P34
VCC92
P33
VCC93
P32
VCC94
P31
VCC95
P30
VCC96
P29
VCC97
P28
VCC98
P27
VCC99
P26
VCC100
CORE SUPPLY
CORE SUPPLY
SENSE LINES SVID
SENSE LINES SVID
VCCIO1
VCCIO2
VCCIO3
VCCIO4
VCCIO5
VCCIO6
VCCIO7
VCCIO8
VCCIO9
VCCIO10
VCCIO11
VCCIO12
VCCIO13
VCCIO14
VCCIO15
VCCIO16
VCCIO17
VCCIO18
VCCIO19
VCCIO20
VCCIO21
VCCIO22
VCCIO23
VCCIO24
VCCIO25
VCCIO26
VCCIO27
VCCIO28
VCCIO29
VCCIO30
VCCIO31
VCCIO32
PEG AND DDR
PEG AND DDR
VCCIO33
VCCIO34
VCCIO35
VCCIO36
VCCIO37
VCCIO38
VCCIO39
VCCIO40
VIDALERT#
VIDSCLK
VIDSOUT
VCC_SENSE
VSS_SENSE
VCCIO_SENSE
VSS_SENSE_VCCIO
8.5A
AH13
AH10
AG10
AC10
Y10
U10
P10
L10
J14
J13
J12
J11
H14
H12
H11
G14
G13
G12
F14
F13
F12
F11
E14
E12
E11
D14
D13
D12
D11
C14
C13
C12
C11
B14
B12
A14
A13
A12
A11
J23
AJ29
AJ30
AJ28
AJ35
AJ34
B10
A10
+1.05V_RUN_VTT
H_CPU_SVIDALRT#
VIDSCLK
VIDSOUT
VCCSENSE_R
VSSSENSE_R
+1.05V_RUN_VTT
VIDSCLK <58>
PlaceRC68,RC69nearCPU
RC68 0_0402_5%~DRC68 0_0402_5%~D
1 2
RC69 0_0402_5%~DRC69 0_0402_5%~D
10_0402_1%~D
10_0402_1%~D
12
1 2
RC72
RC72
12
RC7010_0402_1%~D RC7010_0402_1%~D
H_CPU_SVIDALRT#
130_0402_1%~D
130_0402_1%~D
12
RC65
RC65
VIDSOUT <58>
RC66
@RC66
@
1 2
100_0402_1%~D
100_0402_1%~D
+1.05V_RUN_VTT
VTT_SENSE <56>
VSSIO_SENSE_R <56>
+1.05V_RUN_VTT
75_0402_1%~D
75_0402_1%~D
12
1 2
RC64 43_0402_5%~DRC64 43_0402_5%~D
Note:PlacethePUresistorsclosetoCPU
RC63closetoCPU300‐1500mils
CADNote:PlacethePUresistorsclosetoCPU
RC65closetoCPU300‐1500mils
+VCC_CORE
100_0402_1%~D
100_0402_1%~D
12
RC67
RC67
VCCSENSE <58>
100_0402_1%~D
100_0402_1%~D
12
RC71
RC71
VSSSENSE <58>
RC63
RC63
VIDALERT_N <58>
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
TYCO_2134146-3_IVYBRIDGE~D
TYCO_2134146-3_IVYBRIDGE~D
LInkCIS
5
4
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
Ivy Bridge (5/6)
Ivy Bridge (5/6)
Ivy Bridge (5/6)
LA-7933
LA-7933
LA-7933
10 65Monday, November 07, 2011
10 65Monday, November 07, 2011
10 65Monday, November 07, 2011
1
0.2
0.2
0.2
of
of
of
5
4
3
2
1
+3.3V_ALW2
100K_0402_5%~D
100K_0402_5%~D
12
RC76
RC76
D D
RUN_ON_CPU1.5VS3#
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
RC82 0_0402_5%~D@RC82 0_0402_5%~D@
SIO_SLP_S3#<19,34,45,46,50,54>
CPU1.5V_S3_GATE<47>
C C
B B
+DIMM0_1_VREF_CPU
1 2
RC87 1K_0402_5%~D@RC87 1K_0402_5%~D@
1 2
RC88 1K_0402_5%~D@RC88 1K_0402_5%~D@
A A
+DIMM0_1_CA_CPU
+1.8V_RUN
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
2
1 2
RC83 0_0402_5%~DRC83 0_0402_5%~D
1 2
+VCC_GFXCORE
330U_D2_2.5VM_R6M~D
330U_D2_2.5VM_R6M~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CC89
CC89
1
1
+
+
CC90
CC90
2
2
CC88
CC88
1
2
33A
1.5A
CC91
CC91
AT24
AT23
AT21
AT20
AT18
AT17
AR24
AR23
AR21
AR20
AR18
AR17
AP24
AP23
AP21
AP20
AP18
AP17
AN24
AN23
AN21
AN20
AN18
AN17
AM24
AM23
AM21
AM20
AM18
AM17
AL24
AL23
AL21
AL20
AL18
AL17
AK24
AK23
AK21
AK20
AK18
AK17
AJ24
AJ23
AJ21
AJ20
AJ18
AJ17
AH24
AH23
AH21
AH20
AH18
AH17
B6
A6
A2
61
QC5A
QC5A
2
POWER
JCPU1G
JCPU1G
VAXG1
VAXG2
VAXG3
VAXG4
VAXG5
VAXG6
VAXG7
VAXG8
VAXG9
VAXG10
VAXG11
VAXG12
VAXG13
VAXG14
VAXG15
VAXG16
VAXG17
VAXG18
VAXG19
VAXG20
VAXG21
VAXG22
VAXG23
VAXG24
VAXG25
VAXG26
VAXG27
VAXG28
VAXG29
VAXG30
VAXG31
VAXG32
VAXG33
VAXG34
VAXG35
VAXG36
VAXG37
VAXG38
VAXG39
VAXG40
VAXG41
VAXG42
VAXG43
VAXG44
VAXG45
VAXG46
VAXG47
VAXG48
VAXG49
VAXG50
VAXG51
VAXG52
VAXG53
VAXG54
VCCPLL1
VCCPLL2
VCCPLL3
TYCO_2134146-3_IVYBRIDGE~D
TYCO_2134146-3_IVYBRIDGE~D
POWER
GRAPHICS
GRAPHICS
1.8V RAIL
1.8V RAIL
+PWR_SRC_S
100K_0402_5%~D
100K_0402_5%~D
RC73
RC73
5
RUN_ON_CPU1.5VS3# <7,50>
VAXG_SENSE
VSSAXG_SENSE
SENSE
LINES
SENSE
LINES
SA_DIMM_VREFDQ
SB_DIMM_VREFDQ
VREFMISC
VREFMISC
DDR3 -1.5V RAILS
DDR3 -1.5V RAILS
SA RAIL
SA RAIL
VCCSA_SENSE
VCCSA_VID[0]
VCCSA_VID[1]
LInkCIS
5
4
+1.5V_CPU_VDDQSource
+1.5V_MEM +1.5V_CPU_VDDQ
12
RUN_ON_CPU1.5VS3
3
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
QC5B
QC5B
4
+VCC_GFXCORE
AK35
AK34
AL1
SM_VREF
B4
D1
AF7
VDDQ1
AF4
VDDQ2
AF1
VDDQ3
AC7
VDDQ4
AC4
VDDQ5
AC1
VDDQ6
Y7
VDDQ7
Y4
VDDQ8
Y1
VDDQ9
U7
VDDQ10
U4
VDDQ11
U1
VDDQ12
P7
VDDQ13
P4
VDDQ14
P1
VDDQ15
6A
M27
VCCSA1
M26
VCCSA2
L26
VCCSA3
J26
VCCSA4
J25
VCCSA5
J24
VCCSA6
H26
VCCSA7
H25
VCCSA8
H23
C22
C24
A19
VCCIO_SEL
QC3
QC3
AO4728L_SO8~D
AO4728L_SO8~D
8
7
6
5
330K_0402_1%~D
330K_0402_1%~D
12
RC79
RC79
100_0402_1%~D
100_0402_1%~D
12
RC84
RC84
100_0402_1%~D
100_0402_1%~D
12
RC86
RC86
+V_SM_VREF_CNT
+DIMM0_1_VREF_CPU
+DIMM0_1_CA_CPU
Checkingagain
5A
VCCP_PWRCTRL_R
4
0.1U_0603_50V7K~D
0.1U_0603_50V7K~D
1
CC71
CC71
2
RC85
@RC85
@
1 2
100_0402_1%~D
100_0402_1%~D
+DIMM0_1_VREF_CPU
+DIMM0_1_CA_CPU
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CC75
CC75
1
1
2
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CC83
CC83
1
1
2
2
RC89 0_0402_5%~D@RC89 0_0402_5%~D@
CC80
CC80
+V_DDR_SMREF
1K_0402_1%~D
1K_0402_1%~D
12
@
@
RC78
RC78
1K_0402_1%~D
1K_0402_1%~D
12
@
@
RC80
RC80
RUN_ON_CPU1.5VS3
CC72 0.1U_0402_10V7K~DCC72 0.1U_0402_10V7K~D
CC73 0.1U_0402_10V7K~DCC73 0.1U_0402_10V7K~D
CC74 0.1U_0402_10V7K~DCC74 0.1U_0402_10V7K~D
330U_D2_2VM_R6M~D
330U_D2_2VM_R6M~D
CC82 0.1U_0402_10V7K~DCC82 0.1U_0402_10V7K~D
CC81
CC81
1
+
+
2
1 2
RC74 0_0402_5%~D@RC74 0_0402_5%~D@
QC4
@QC4
@
NTR4503NT1G_SOT23-3~D
NTR4503NT1G_SOT23-3~D
1
3
2
12
12
12
12
+1.5V_CPU_VDDQ
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CC79
CC79
1
1
2
2
330U_D2_2VM_R6M~D
330U_D2_2VM_R6M~D
1
CC87
CC87
+
+
2
VCCSA_SENSE <57>
VCCSA_VID_0 <57>
VCCSA_VID_1 <57>
VCCP_PWRCTRL <56>
+1.5V_MEM
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
2
10U_0805_6.3V6M~D
10U_0805_6.3V6M~D
3
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CC76
CC76
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CC84
CC84
1 2
20K_0402_5%~D
20K_0402_5%~D
12
1
@
@
RC77
RC77
CC70
CC70
2
VCC_AXG_SENSE <58>
VSS_AXG_SENSE <58>
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CC78
CC78
CC77
CC77
1
1
2
2
+VCC_SA
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
@
@
CC86
CC86
CC85
CC85
1
1
2
2
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
+1.5V_CPU_VDDQ
1K_0402_1%~D
1K_0402_1%~D
12
1K_0402_1%~D
1K_0402_1%~D
12
6A
+1.5V_MEM
2
RC75
RC75
+V_SM_VREF_CNT
RC81
RC81
JCPU1H
JCPU1H
AT35
VSS1
AT32
VSS2
AT29
VSS3
AT27
VSS4
AT25
VSS5
AT22
VSS6
AT19
VSS7
AT16
VSS8
AT13
VSS9
AT10
VSS10
AT7
VSS11
AT4
VSS12
AT3
VSS13
AR25
VSS14
AR22
VSS15
AR19
VSS16
AR16
VSS17
AR13
VSS18
AR10
VSS19
AR7
VSS20
AR4
VSS21
AR2
VSS22
AP34
VSS23
AP31
VSS24
AP28
VSS25
AP25
VSS26
AP22
VSS27
AP19
VSS28
AP16
VSS29
AP13
VSS30
AP10
VSS31
AP7
VSS32
AP4
VSS33
AP1
VSS34
AN30
VSS35
AN27
VSS36
AN25
VSS37
AN22
VSS38
AN19
VSS39
AN16
VSS40
AN13
VSS41
AN10
VSS42
AN7
VSS43
AN4
VSS44
AM29
VSS45
AM25
VSS46
AM22
VSS47
AM19
VSS48
AM16
VSS49
AM13
VSS50
AM10
VSS51
AM7
VSS52
AM4
VSS53
AM3
VSS54
AM2
VSS55
AM1
VSS56
AL34
VSS57
AL31
VSS58
AL28
VSS59
AL25
VSS60
AL22
VSS61
AL19
VSS62
AL16
VSS63
AL13
VSS64
AL10
VSS65
AL7
VSS66
AL4
VSS67
AL2
VSS68
AK33
VSS69
AK30
VSS70
AK27
VSS71
AK25
VSS72
AK22
VSS73
AK19
VSS74
AK16
VSS75
AK13
VSS76
AK10
VSS77
AK7
VSS78
AK4
VSS79
AJ25
VSS80
TYCO_2134146-3_IVYBRIDGE~D
TYCO_2134146-3_IVYBRIDGE~D
VSS
VSS
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
AJ22
AJ19
AJ16
AJ13
AJ10
AJ7
AJ4
AJ3
AJ2
AJ1
AH35
AH34
AH32
AH30
AH29
AH28
AH25
AH22
AH19
AH16
AH7
AH4
AG9
AG8
AG4
AF6
AF5
AF3
AF2
AE35
AE34
AE33
AE32
AE31
AE30
AE29
AE28
AE27
AE26
AE9
AD7
AC9
AC8
AC6
AC5
AC3
AC2
AB35
AB34
AB33
AB32
AB31
AB30
AB29
AB28
AB27
AB26
Y9
Y8
Y6
Y5
Y3
Y2
W35
W34
W33
W32
W31
W30
W29
W28
W27
W26
U9
U8
U6
U5
U3
U2
LInkCIS
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
Ivy Bridge (6/6)
Ivy Bridge (6/6)
Ivy Bridge (6/6)
LA-7933
LA-7933
LA-7933
11 65Monday, November 07, 2011
11 65Monday, November 07, 2011
11 65Monday, November 07, 2011
1
0.2
0.2
0.2
of
of
of
5
AllVREFtracesshould
have10miltracewidth
PopulateRD1,De‐PopulateRD2forIntelDDR3
VREFDQmultiplemethodsM1
PopulateRD2,De‐PopulateRD1forIntelDDR3
VREFDQmultiplemethodsM3
D D
DDR_A_DQS#[0..7]<8,13>
DDR_A_DQS[0..7]<8,13>
DDR_A_D[0..63]<8,13>
DDR_A_MA[0..15]<8,13>
+1.5V_MEM
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
1
CD2
CD2
2
2
+1.5V_MEM
C C
B B
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CD8
CD8
CD7
CD7
1
1
2
2
LayoutNote:
PlacenearJDIMM1.203,204
+0.75V_DDR_VTT
1
1
CD3
CD3
CD4
CD4
2
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CD10
CD10
CD9
CD9
1
1
2
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
1
CD17
CD17
CD18
CD18
2
2
DIMMSelect
SA1
SA0
0
DIMM2
DIMM4
DIMM1 0
*
A A
DIMM3
0
0
1
1
1
1
+V_DDR_REFA_M3
+V_DDR_REF
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CD5
CD5
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CD11
CD11
CD19
CD19
+3.3V_RUN
10U_0603_6.3V6M~D
330U_SX_2VY~D
330U_SX_2VY~D
@CD13
@
1
CD12
CD12
CD13
CD14
1
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CD20
CD20
2
1 2
1 2
CD14
1
+
+
2
2
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
@RD9
@
RD8
RD8
RD9
1 2
DIMM1_SA0
DIMM1_SA1
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
RD13
RD13
@RD12
@
RD12
1 2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
2
4
1 2
RD1 0_0402_5%~DRD1 0_0402_5%~D
1 2
RD2 0_0402_5%~DRD2 0_0402_5%~D
+3.3V_RUN
1
2
1
2
DDR_CKE4_DIMM1<8>
M_CLK_DDR4<8>
M_CLK_DDR#4<8>
DDR_CS5_DIMM1#<8>
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
CD21
CD21
2
+DIMM1_VREF_DQ
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
CD1
CD1
CD6
CD6
2
DDR_A_BS2<8,13>
DDR_A_BS0<8,13>
DDR_A_WE#<8,13>
DDR_A_CAS#<8,13>
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
+0.75V_DDR_VTT
CD22
CD22
3
JDIMM1RevTypeH=9.2
+1.5V_MEM
DDR_A_D0
DDR_A_D1
DDR_A_D6
DDR_A_D7
DDR_A_D12
DDR_A_D13
DDR_A_DQS#1
DDR_A_DQS1
DDR_A_D10
DDR_A_D11
DDR_A_D20 DDR_A_D16
DDR_A_D21
DDR_A_DQS#2
DDR_A_DQS2
DDR_A_D18
DDR_A_D19
DDR_A_D29
DDR_A_D26
DDR_A_D27
DDR_A_BS2
DDR_A_MA12
DDR_A_MA9
DDR_A_MA8
DDR_A_MA5
DDR_A_MA3
DDR_A_MA1
M_CLK_DDR4
M_CLK_DDR#4
DDR_A_MA10
DDR_A_BS0
DDR_A_WE#
DDR_A_CAS#
DDR_A_MA13
DDR_A_D36
DDR_A_D37
DDR_A_DQS#4
DDR_A_DQS4
DDR_A_D34
DDR_A_D39
DDR_A_D41 DDR_A_D40
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D52
DDR_A_D53 DDR_A_D49
DDR_A_DQS#6
DDR_A_DQS6
DDR_A_D50
DDR_A_D51
DDR_A_D60
DDR_A_D56
DDR_A_D62
DDR_A_D63
DIMM1_SA0
DIMM1_SA1
JDIMM1
JDIMM1
VREF_DQ1VSS1
3
VSS2
5
DQ0
7
DQ1
VSS49DQS#0
11
DM0
13
VSS5
15
DQ2
17
DQ3
19
VSS7
21
DQ8
23
DQ9
VSS925VSS10
27
DQS#1
DQS129RESET#
VSS1131VSS12
33
DQ10
35
DQ11
VSS1337VSS14
39
DQ16
41
DQ17
VSS1543VSS16
45
DQS#2
DQS247VSS17
VSS1849DQ22
51
DQ18
DQ1953VSS19
VSS2055DQ28
57
DQ24
DQ2559VSS21
VSS2261DQS#3
63
DM3
VSS2365VSS24
67
DQ26
69
DQ27
VSS2571VSS26
73
CKE0
75
VDD1
77
NC1
79
BA2
81
VDD3
A12/BC#83A11
85
A9
87
VDD5
89
A8
91
A5
93
VDD7
95
A3
97
A1
VDD999VDD10
101
CK0
103
CK0#
105
VDD11
107
A10/AP
109
BA0
111
VDD13
113
WE#
115
CAS#
117
VDD15
119
A13
121
S1#
123
VDD17
125
NCTEST
127
VSS27
129
DQ32
131
DQ33
133
VSS29
135
DQS#4
137
DQS4
139
VSS32
141
DQ34
143
DQ35
145
VSS34
147
DQ40
149
DQ41
151
VSS36
153
DM5
155
VSS37
157
DQ42
159
DQ43
161
VSS39
163
DQ48
165
DQ49
167
VSS41
169
DQS#6
171
DQS6
173
VSS44
175
DQ50
177
DQ51
179
VSS46
181
DQ56
183
DQ57
185
VSS48
187
DM7
189
VSS49
191
DQ58
193
DQ59
195
VSS51
197
SA0
199
VDDSPD
201
SA1
203
VTT1
205
G1
TYCO_2-2013311-1
TYCO_2-2013311-1
VREF_CA
LinkCISOK
VSS3
DQS0
VSS6
VSS8
DQ12
DQ13
DQ14
DQ15
DQ20
DQ21
DQ23
DQ29
DQS3
DQ30
DQ31
CKE1
VDD2
VDD4
VDD6
VDD8
CK1#
VDD12
RAS#
VDD14
ODT0
VDD16
ODT1
VDD18
VSS28
DQ36
DQ37
VSS30
VSS31
DQ38
DQ39
VSS33
DQ44
DQ45
VSS35
DQS#5
DQS5
VSS38
DQ46
DQ47
VSS40
DQ52
DQ53
VSS42
VSS43
DQ54
DQ55
VSS45
DQ60
DQ61
VSS47
DQS#7
DQS7
VSS50
DQ62
DQ63
VSS52
EVENT#
VTT2
+1.5V_MEM
2
4
DQ4
6
DQ5
8
10
12
14
16
DQ6
18
DQ7
20
22
24
26
28
DM1
30
32
34
36
38
40
42
44
46
DM2
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
A15
80
A14
82
84
86
A7
88
90
A6
92
A4
94
96
A2
98
A0
100
102
CK1
104
106
108
BA1
110
112
114
S0#
116
118
120
122
NC2
124
126
128
130
132
134
136
DM4
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
DM6
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
SDA
202
SCL
204
206
G2
DDR_A_D4
DDR_A_D5
DDR_A_DQS#0
DDR_A_DQS0
DDR_A_D2
DDR_A_D3
DDR_A_D8
DDR_A_D9
DDR3_DRAMRST#_R
DDR_A_D14
DDR_A_D15
DDR_A_D17
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25DDR_A_D28
DDR_A_DQS#3
DDR_A_DQS3
DDR_A_D30
DDR_A_D31
DDR_A_MA15
DDR_A_MA14
DDR_A_MA11
DDR_A_MA7
DDR_A_MA6
DDR_A_MA4
DDR_A_MA2
DDR_A_MA0
M_CLK_DDR5
M_CLK_DDR#5
DDR_A_BS1
DDR_A_RAS#
M_ODT4
M_ODT5
DDR_A_D32
DDR_A_D33
DDR_A_D38
DDR_A_D35
DDR_A_D44
DDR_A_DQS#5
DDR_A_DQS5
DDR_A_D42
DDR_A_D43
DDR_A_D48
DDR_A_D54
DDR_A_D55
DDR_A_D61
DDR_A_D57
DDR_A_DQS#7
DDR_A_DQS7
DDR_A_D58
DDR_A_D59
DIMM1_SMBDAT
DIMM1_SMBCLK
+0.75V_DDR_VTT
DDR_CKE5_DIMM1 <8>
M_CLK_DDR5 <8>
M_CLK_DDR#5 <8>
DDR_A_BS1 <8,13>
DDR_A_RAS# <8,13>
DDR_CS4_DIMM1# <8>
M_ODT4 <8>
M_ODT5 <8>
RD10 0_0402_5%~DRD10 0_0402_5%~D
1 2
RD11 0_0402_5%~DRD11 0_0402_5%~D
1 2
+DIMM1_VREF_CA
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
1
2
2
DDR3_DRAMRST#_R<13,14,15> DDR3_DRAMRST# <7>
+DIMM0_1_VREF_CPU
DDR_HVREF_RST<7>
+DIMM0_1_CA_CPU
M3Circuit(ProcessorGeneratedSO‐DIMMVREF_DQ)
1 2
RD7 0_0402_5%~DRD7 0_0402_5%~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
CD15
CD15
CD16
CD16
1
2
DDR_XDP_WAN_SMBDAT <13,14,15,17,18,34,41>
DDR_XDP_WAN_SMBCLK <13,14,15,17,18,34,41>
CPU JDIMM1
JDIMM2 JDIMM4
1 2
RD3 1K_0402_1%~DRD3 1K_0402_1%~D
RD5 0_0402_5%~D@RD5 0_0402_5%~D@
1 2
S
S
G
G
2
RD6 0_0402_5%~D@RD6 0_0402_5%~D@
1 2
S
S
G
G
DDR_HVREF_RST
+V_DDR_REF
2
JDIMM3
+1.5V_MEM
1K_0402_1%~D
1K_0402_1%~D
12
RD4
RD4
D
D
13
QD1
QD1
BSS138-G_SOT23-3
BSS138-G_SOT23-3
D
D
13
QD2
QD2
BSS138-G_SOT23-3
BSS138-G_SOT23-3
1
TopSide
BottomSide
+V_DDR_REFA_M3
+V_DDR_REFB_M3
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
DDRIII-SODIMM SLOT1
DDRIII-SODIMM SLOT1
DDRIII-SODIMM SLOT1
LA-7933
LA-7933
LA-7933
12 65Monday, November 07, 2011
12 65Monday, November 07, 2011
12 65Monday, November 07, 2011
1
0.2
0.2
0.2
of
of
of
5
4
3
2
1
AllVREFtracesshould
have10miltracewidth
+V_DDR_REFA_M3
DDR_A_DQS#[0..7]<8,12>
DDR_A_DQS[0..7]<8,12>
D D
C C
DDR_A_D[0..63]<8,12>
DDR_A_MA[0..15]<8,12>
+1.5V_MEM
1
2
+1.5V_MEM
1
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CD29
CD29
1
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CD25
CD25
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CD26
CD26
2
CD30
CD30
1
2
1U_0402_6.3V6K~D
1
1
CD27
CD27
CD28
CD28
2
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CD31
CD31
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CD33
CD33
CD32
CD32
1
1
1
2
2
2
+V_DDR_REF
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
330U_SX_2VY~D
330U_SX_2VY~D
@CD35
@
1
CD34
CD34
CD35
1
+
+
2
2
RD14 0_0402_5%~DRD14 0_0402_5%~D
RD15 0_0402_5%~DRD15 0_0402_5%~D
CD36
CD36
1 2
1 2
LayoutNote:
PlacenearJDIMM2.Pin203,204
+0.75V_DDR_VTT
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
1
2
B B
DIMMSelect
SA0
0
DIMM2
*
A A
0
DIMM4
1
DIMM1 0
1
DIMM3
SA1
CD38
CD38
CD37
CD37
2
+3.3V_RUN
0
1
1
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CD39
CD39
2
10K_0402_5%~D
10K_0402_5%~D
RD17
RD17
1 2
10K_0402_5%~D
10K_0402_5%~D
RD19
RD19
1 2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
2
10K_0402_5%~D
10K_0402_5%~D
@
@
1 2
1 2
CD40
CD40
@
@
RD18
RD18
DIMM2_SA0
DIMM2_SA1
10K_0402_5%~D
10K_0402_5%~D
RD20
RD20
+3.3V_RUN
1
2
+DIMM2_VREF_DQ
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
CD24
CD24
1
1
CD23
CD23
2
2
DDR_CKE0_DIMM2<8>
DDR_A_BS2<8,12>
M_CLK_DDR0<8>
M_CLK_DDR#0<8>
DDR_A_BS0<8,12>
DDR_A_WE#<8,12>
DDR_A_CAS#<8,12>
DDR_CS1_DIMM2#<8>
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
1
+0.75V_DDR_VTT +0.75V_DDR_VTT
CD43
CD43
CD44
CD44
2
JDIMM2RevTypeH=5.2
VSS3
DQS#0
DQS0
VSS6
VSS8
DQ12
DQ13
VSS10
DQ14
DQ15
DQ20
DQ21
DQ23
DQ29
DQS3
DQ30
DQ31
CKE1
VDD2
VDD4
VDD6
VDD8
CK1#
VDD12
RAS#
VDD14
ODT0
VDD16
ODT1
VDD18
VSS28
DQ36
DQ37
VSS30
VSS31
DQ38
DQ39
VSS33
DQ44
DQ45
VSS35
DQS#5
DQS5
VSS38
DQ46
DQ47
VSS40
DQ52
DQ53
VSS42
VSS43
DQ54
DQ55
VSS45
DQ60
DQ61
VSS47
DQS#7
DQS7
VSS50
DQ62
DQ63
VSS52
VTT2
DQ4
DQ5
DQ6
DQ7
DM1
DM2
CK1
BA1
NC2
DM4
DM6
SDA
SCL
+1.5V_MEM
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
A15
80
A14
82
84
A11
86
A7
88
90
A6
92
A4
94
96
A2
98
A0
100
102
104
106
108
110
112
114
S0#
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
206
G2
DDR_A_D0
DDR_A_D1
DDR_A_DQS#0
DDR_A_DQS0
DDR_A_D6
DDR_A_D7
DDR_A_D12
DDR_A_D13
DDR_A_D11
DDR_A_D20
DDR_A_D21
DDR_A_D18
DDR_A_D19
DDR_A_D28
DDR_A_D29
DDR_A_DQS#3
DDR_A_DQS3
DDR_A_D26
DDR_A_D27DDR_A_D31
DDR_A_MA15
DDR_A_MA14
DDR_A_MA11
DDR_A_MA7
DDR_A_MA6
DDR_A_MA4
DDR_A_MA2
DDR_A_MA0
M_CLK_DDR1
M_CLK_DDR#1
DDR_A_BS1
DDR_A_RAS#
M_ODT0DDR_A_CAS#
M_ODT1
DDR_A_D36
DDR_A_D37
DDR_A_D34
DDR_A_D39
DDR_A_D41
DDR_A_D45
DDR_A_DQS#5
DDR_A_DQS5
DDR_A_D46
DDR_A_D47
DDR_A_D52
DDR_A_D53
DDR_A_D50
DDR_A_D51
DDR_A_D60
DDR_A_DQS#7
DDR_A_DQS7
DDR_A_D62
DDR_A_D63
DIMM2_SMBDAT
DIMM2_SMBCLK
+1.5V_MEM
DDR_A_D4
DDR_A_D5
DDR_A_D2
DDR_A_D3
DDR_A_D8
DDR_A_D9
DDR_A_DQS#1
DDR_A_DQS1
DDR_A_D14 DDR_A_D10
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_DQS#2
DDR_A_DQS2
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D30
DDR_A_BS2
DDR_A_MA12
DDR_A_MA9
DDR_A_MA8
DDR_A_MA5
DDR_A_MA3
DDR_A_MA1
M_CLK_DDR0
M_CLK_DDR#0
DDR_A_MA10
DDR_A_BS0
DDR_A_WE#
DDR_A_MA13
DDR_A_D32
DDR_A_D33
DDR_A_DQS#4
DDR_A_DQS4
DDR_A_D38
DDR_A_D35
DDR_A_D44
DDR_A_D40
DDR_A_D42
DDR_A_D43
DDR_A_D48
DDR_A_D49
DDR_A_DQS#6
DDR_A_DQS6
DDR_A_D54
DDR_A_D55
DDR_A_D61 DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DIMM2_SA0
DIMM2_SA1
JDIMM2
JDIMM2
VREF_DQ1VSS1
3
VSS2
5
DQ0
7
DQ1
9
VSS4
11
DM0
13
VSS5
15
DQ2
17
DQ3
19
VSS7
21
DQ8
23
DQ9
25
VSS9
27
DQS#1
DQS129RESET#
VSS1131VSS12
33
DQ10
35
DQ11
VSS1337VSS14
39
DQ16
41
DQ17
VSS1543VSS16
45
DQS#2
DQS247VSS17
VSS1849DQ22
51
DQ18
DQ1953VSS19
VSS2055DQ28
57
DQ24
DQ2559VSS21
VSS2261DQS#3
63
DM3
VSS2365VSS24
67
DQ26
69
DQ27
VSS2571VSS26
73
CKE0
75
VDD1
77
NC1
79
BA2
81
VDD3
83
A12/BC#
85
A9
87
VDD5
89
A8
91
A5
93
VDD7
95
A3
97
A1
VDD999VDD10
101
CK0
103
CK0#
105
VDD11
107
A10/AP
109
BA0
111
VDD13
113
WE#
115
CAS#
117
VDD15
119
A13
121
S1#
123
VDD17
125
NCTEST
127
VSS27
129
DQ32
131
DQ33
133
VSS29
135
DQS#4
137
DQS4
139
VSS32
141
DQ34
143
DQ35
145
VSS34
147
DQ40
149
DQ41
151
VSS36
153
DM5
155
VSS37
157
DQ42
159
DQ43
161
VSS39
163
DQ48
165
DQ49
167
VSS41
169
DQS#6
171
DQS6
173
VSS44
175
DQ50
177
DQ51
179
VSS46
181
DQ56
183
DQ57
185
VSS48
187
DM7
189
VSS49
191
DQ58
193
DQ59
195
VSS51
197
SA0
199
VDDSPD
201
SA1
203
VTT1
205
G1
TYCO_2-2013290-1
TYCO_2-2013290-1
VREF_CA
EVENT#
LInkCIS
DDR3_DRAMRST#_R <12,14,15>
DDR_CKE1_DIMM2 <8>
M_CLK_DDR1 <8>
M_CLK_DDR#1 <8>
DDR_A_BS1 <8,12>
DDR_A_RAS# <8,12>
DDR_CS0_DIMM2# <8>
M_ODT0 <8>
M_ODT1 <8>
RD21 0_0402_5%~DRD21 0_0402_5%~D
1 2
RD22 0_0402_5%~DRD22 0_0402_5%~D
1 2
+DIMM2_VREF_CA
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
1
2
CPU
JDIMM2
1 2
RD16 0_0402_5%~DRD16 0_0402_5%~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
CD41
CD41
CD42
CD42
1
2
DDR_XDP_WAN_SMBDAT <12,14,15,17,18,34,41>
DDR_XDP_WAN_SMBCLK <12,14,15,17,18,34,41>
JDIMM1
+V_DDR_REF
JDIMM3
JDIMM4
TopSide
BottomSide
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
DDRIII-SODIMM SLOT2
DDRIII-SODIMM SLOT2
DDRIII-SODIMM SLOT2
LA-7933
LA-7933
LA-7933
1
13 65Monday, November 07, 2011
13 65Monday, November 07, 2011
13 65Monday, November 07, 2011
0.2
0.2
0.2
of
of
of
5
DDR_B_DQS#[0..7]<8,15>
DDR_B_DQS[0..7]<8,15>
DDR_B_D[0..63]<8,15>
D D
C C
DDR_B_MA[0..15]<8,15>
+1.5V_MEM
1
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CD51
CD51
+1.5V_MEM
1
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CD52
CD52
1
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CD50
CD50
1
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CD53
CD53
1
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
1
CD48
CD46
CD46
CD48
CD47
CD47
2
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CD55
CD55
CD54
CD54
1
1
2
2
+V_DDR_REFB_M3
+V_DDR_REF
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
330U_SX_2VY~D
330U_SX_2VY~D
@CD57
@
1
CD58
CD58
CD57
CD56
CD56
1
+
+
2
2
LayoutNote:
PlacenearJDIMM3.Pin203,204
+0.75V_DDR_VTT
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CD59
CD59
2
B B
DIMMSelect
SA0
0
DIMM2
0
DIMM4
1
DIMM1 0
1
DIMM3
*
A A
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
2
SA1
0
1
1
1U_0402_6.3V6K~D
1
1
CD60
CD60
CD61
CD61
CD62
CD62
2
2
+3.3V_RUN
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
RD27
RD27
RD26
RD26
1 2
1 2
DIMM3_SA0
DIMM3_SA1
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
@RD28
@
@RD29
@
RD29
RD28
1 2
1 2
4
AllVREFtracesshould
have10miltracewidth
1 2
RD23 0_0402_5%~DRD23 0_0402_5%~D
1 2
RD24 0_0402_5%~DRD24 0_0402_5%~D
+DIMM3_VREF_DQ
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
CD49
CD49
1
2
DDR_CKE6_DIMM3<8>
DDR_B_BS2<8,15>
M_CLK_DDR6<8>
M_CLK_DDR#6<8>
DDR_B_BS0<8,15>
DDR_B_WE#<8,15>
DDR_B_CAS#<8,15>
DDR_CS7_DIMM3#<8>
+3.3V_RUN
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
CD65
CD65
2
3
JDIMM3RevTypeH=5.2
JDIMM3
JDIMM3
VREF_DQ1VSS1
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
DDR_B_D5 DDR_B_D4
DDR_B_D1
CD45
CD45
1
2
DDR_B_D7
DDR_B_D3
DDR_B_D9
DDR_B_DQS#1
DDR_B_DQS1
DDR_B_D14
DDR_B_D15
DDR_B_D20
DDR_B_D21
DDR_B_DQS#2
DDR_B_DQS2
DDR_B_D18
DDR_B_D19
DDR_B_D28
DDR_B_D24
DDR_B_D30
DDR_B_D31 DDR_B_D27
DDR_B_BS2
DDR_B_MA12
DDR_B_MA9
DDR_B_MA8
DDR_B_MA5
DDR_B_MA3
DDR_B_MA1
M_CLK_DDR6
M_CLK_DDR#6
DDR_B_MA10
DDR_B_BS0
DDR_B_WE#
DDR_B_CAS#
DDR_B_MA13
DDR_B_D36
DDR_B_D37
DDR_B_DQS#4
DDR_B_DQS4
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D46 DDR_B_D42
DDR_B_D47
DDR_B_D52
DDR_B_D53
DDR_B_DQS#6
DDR_B_DQS6
DDR_B_D50
DDR_B_D51
DDR_B_D61
DDR_B_D62 DDR_B_D58
DDR_B_D63
DIMM3_SA0
DIMM3_SA1
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
+0.75V_DDR_VTT
1
CD66
CD66
2
3
VSS2
5
DQ0
7
DQ1
VSS49DQS#0
11
DM0
13
VSS5
15
DQ2
17
DQ3
19
VSS7
21
DQ8
23
DQ9
VSS925VSS10
27
DQS#1
DQS129RESET#
VSS1131VSS12
33
DQ10
35
DQ11
VSS1337VSS14
39
DQ16
41
DQ17
VSS1543VSS16
45
DQS#2
DQS247VSS17
49
VSS18
51
DQ18
DQ1953VSS19
55
VSS20
57
DQ24
DQ2559VSS21
VSS2261DQS#3
63
DM3
VSS2365VSS24
67
DQ26
69
DQ27
VSS2571VSS26
73
CKE0
75
VDD1
77
NC1
79
BA2
81
VDD3
A12/BC#83A11
85
A9
87
VDD5
89
A8
91
A5
93
VDD7
95
A3
97
A1
VDD999VDD10
101
CK0
103
CK0#
105
VDD11
107
A10/AP
109
BA0
111
VDD13
113
WE#
115
CAS#
117
VDD15
119
A13
121
S1#
123
VDD17
125
NCTEST
127
VSS27
129
DQ32
131
DQ33
133
VSS29
135
DQS#4
137
DQS4
139
VSS32
141
DQ34
143
DQ35
145
VSS34
147
DQ40
149
DQ41
151
VSS36
153
DM5
155
VSS37
157
DQ42
159
DQ43
161
VSS39
163
DQ48
165
DQ49
167
VSS41
169
DQS#6
171
DQS6
173
VSS44
175
DQ50
177
DQ51
179
VSS46
181
DQ56
183
DQ57
185
VSS48
187
DM7
189
VSS49
191
DQ58
193
DQ59
195
VSS51
197
SA0
199
VDDSPD
201
SA1
203
VTT1
205
G1
TYCO_2-2013290-1
TYCO_2-2013290-1
LInkCIS
DQ4
DQ5
VSS3
DQS0
VSS6
DQ6
DQ7
VSS8
DQ12
DQ13
DM1
DQ14
DQ15
DQ20
DQ21
DM2
DQ22
DQ23
DQ28
DQ29
DQS3
DQ30
DQ31
CKE1
VDD2
VDD4
VDD6
VDD8
CK1
CK1#
VDD12
RAS#
VDD14
ODT0
VDD16
ODT1
NC2
VDD18
VREF_CA
VSS28
DQ36
DQ37
VSS30
DM4
VSS31
DQ38
DQ39
VSS33
DQ44
DQ45
VSS35
DQS#5
DQS5
VSS38
DQ46
DQ47
VSS40
DQ52
DQ53
VSS42
DM6
VSS43
DQ54
DQ55
VSS45
DQ60
DQ61
VSS47
DQS#7
DQS7
VSS50
DQ62
DQ63
VSS52
EVENT#
SDA
SCL
VTT2
A15
A14
A7
A6
A4
A2
A0
BA1
S0#
G2
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
206
+1.5V_MEM+1.5V_MEM
DDR_B_D0
DDR_B_DQS#0
DDR_B_DQS0
DDR_B_D2
DDR_B_D6
DDR_B_D8DDR_B_D13
DDR_B_D12
DDR3_DRAMRST#_R
DDR_B_D10
DDR_B_D11
DDR_B_D16
DDR_B_D17
DDR_B_D22
DDR_B_D23
DDR_B_D25
DDR_B_D29
DDR_B_DQS#3
DDR_B_DQS3
DDR_B_D26
DDR_B_MA15
DDR_B_MA14
DDR_B_MA11
DDR_B_MA7
DDR_B_MA6
DDR_B_MA4
DDR_B_MA2
DDR_B_MA0
M_CLK_DDR7
M_CLK_DDR#7
DDR_B_BS1
DDR_B_RAS#
M_ODT6
M_ODT7
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D44
DDR_B_D45
DDR_B_DQS#5
DDR_B_DQS5
DDR_B_D43
DDR_B_D48
DDR_B_D49
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57DDR_B_D60
DDR_B_DQS#7
DDR_B_DQS7
DDR_B_D59
DIMM3_SMBDAT
DIMM3_SMBCLK
+0.75V_DDR_VTT
2
DDR3_DRAMRST#_R <12,13,15>
DDR_CKE7_DIMM3 <8>
M_CLK_DDR7 <8>
M_CLK_DDR#7 <8>
DDR_B_BS1 <8,15>
DDR_B_RAS# <8,15>
DDR_CS6_DIMM3# <8>
M_ODT6 <8>
M_ODT7 <8>
RD30 0_0402_5%~DRD30 0_0402_5%~D
RD31 0_0402_5%~DRD31 0_0402_5%~D
1 2
1 2
+DIMM3_VREF_CA
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
CD63
CD63
1
2
CPU
JDIMM2
1 2
RD25 0_0402_5%~DRD25 0_0402_5%~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
CD64
CD64
1
2
DDR_XDP_WAN_SMBDAT <12,13,15,17,18,34,41>
DDR_XDP_WAN_SMBCLK <12,13,15,17,18,34,41>
JDIMM1
+V_DDR_REF
JDIMM3
JDIMM4
1
TopSide
BottomSide
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
DDRIII-SODIMM SLOT3
DDRIII-SODIMM SLOT3
DDRIII-SODIMM SLOT3
LA-7933
LA-7933
LA-7933
1
14 65Monday, November 07, 2011
14 65Monday, November 07, 2011
14 65Monday, November 07, 2011
0.2
0.2
0.2
of
of
of
5
DDR_B_DQS#[0..7]<8,14>
DDR_B_DQS[0..7]<8,14>
DDR_B_D[0..63]<8,14>
DDR_B_MA[0..15]<8,14>
D D
+1.5V_MEM
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
1
CD71
CD71
CD70
CD70
2
2
+1.5V_MEM
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
2
C C
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CD73
CD73
CD75
CD75
CD74
CD74
1
1
2
1
2
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
1
CD72
CD72
CD69
CD69
2
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CD77
CD77
CD78
CD76
CD76
CD78
1
1
2
2
+V_DDR_REFB_M3
+V_DDR_REF
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
330U_SX_2VY~D
330U_SX_2VY~D
@CD79
@
1
CD80
CD80
CD79
1
+
+
2
2
LayoutNote:
PlacenearJDIMM4.Pin203,204
+0.75V_DDR_VTT
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
2
CD83
CD83
+3.3V_RUN
1U_0402_6.3V6K~D
1
CD84
CD84
2
10K_0402_5%~D
10K_0402_5%~D
@
@
RD35
RD35
1 2
10K_0402_5%~D
10K_0402_5%~D
RD37
RD37
1 2
10K_0402_5%~D
10K_0402_5%~D
RD36
RD36
1 2
DIMM4_SA0
DIMM4_SA1
10K_0402_5%~D
10K_0402_5%~D
@
@
RD38
RD38
1 2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
1
2
B B
CD82
CD82
CD81
CD81
2
DIMMSelect
SA1
SA0
0
DIMM2
DIMM4
*
DIMM1 0
DIMM3
A A
0
0
1
1
1
1
4
AllVREFtracesshould
have10miltracewidth
1 2
RD32 0_0402_5%~DRD32 0_0402_5%~D
1 2
RD33 0_0402_5%~DRD33 0_0402_5%~D
+DIMM4_VREF_DQ
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
CD67
CD67
1
1
2
2
DDR_CKE2_DIMM4<8>
DDR_B_BS2<8,14>
M_CLK_DDR2<8>
M_CLK_DDR#2<8>
DDR_B_BS0<8,14>
DDR_B_WE#<8,14>
DDR_B_CAS#<8,14>
DDR_CS3_DIMM4#<8>
+3.3V_RUN
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
CD87
CD87
2
3
JDIMM4STDTypeH=5.2
JDIMM4
JDIMM4
VREF_DQ1VSS1
3
DDR_B_D0
DDR_B_D4
CD68
CD68
DDR_B_D2
DDR_B_D6
DDR_B_D8
DDR_B_D12 DDR_B_D9
DDR_B_DQS#1
DDR_B_DQS1
DDR_B_D10
DDR_B_D11
DDR_B_D16
DDR_B_D17
DDR_B_DQS#2
DDR_B_DQS2
DDR_B_D22
DDR_B_D23
DDR_B_D29
DDR_B_D26
DDR_B_D27
DDR_B_BS2
DDR_B_MA12
DDR_B_MA9
DDR_B_MA8
DDR_B_MA5
DDR_B_MA3
DDR_B_MA1
M_CLK_DDR2
M_CLK_DDR#2
DDR_B_MA10
DDR_B_BS0
DDR_B_WE#
DDR_B_CAS#
DDR_B_MA13
DDR_B_D32
DDR_B_D33
DDR_B_DQS#4
DDR_B_DQS4
DDR_B_D34
DDR_B_D35
DDR_B_D44
DDR_B_D45
DDR_B_D42
DDR_B_D43
DDR_B_D48
DDR_B_D49
DDR_B_DQS#6
DDR_B_DQS6
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DIMM4_SA0
DIMM4_SA1
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
+0.75V_DDR_VTT
1
CD88
CD88
2
VSS2
5
DQ0
7
DQ1
VSS49DQS#0
11
DM0
13
VSS5
15
DQ2
17
DQ3
19
VSS7
21
DQ8
23
DQ9
25
VSS9
27
DQS#1
DQS129RESET#
VSS1131VSS12
33
DQ10
35
DQ11
VSS1337VSS14
39
DQ16
41
DQ17
VSS1543VSS16
45
DQS#2
DQS247VSS17
VSS1849DQ22
51
DQ18
DQ1953VSS19
VSS2055DQ28
57
DQ24
DQ2559VSS21
VSS2261DQS#3
63
DM3
VSS2365VSS24
67
DQ26
69
DQ27
VSS2571VSS26
73
CKE0
75
VDD1
77
NC1
79
BA2
81
VDD3
A12/BC#83A11
85
A9
87
VDD5
89
A8
91
A5
93
VDD7
95
A3
97
A1
VDD999VDD10
101
CK0
103
CK0#
105
VDD11
107
A10/AP
109
BA0
111
VDD13
113
WE#
115
CAS#
117
VDD15
119
A13
121
S1#
123
VDD17
125
NCTEST
127
VSS27
129
DQ32
131
DQ33
133
VSS29
135
DQS#4
137
DQS4
139
VSS32
141
DQ34
143
DQ35
145
VSS34
147
DQ40
149
DQ41
151
VSS36
153
DM5
155
VSS37
157
DQ42
159
DQ43
161
VSS39
163
DQ48
165
DQ49
167
VSS41
169
DQS#6
171
DQS6
173
VSS44
175
DQ50
177
DQ51
179
VSS46
181
DQ56
183
DQ57
185
VSS48
187
DM7
189
VSS49
191
DQ58
193
DQ59
195
VSS51
197
SA0
199
VDDSPD
201
SA1
203
VTT1
205
G1
TYCO_2-2013289-1~D
TYCO_2-2013289-1~D
LInkCIS
VSS3
DQS0
VSS6
VSS8
DQ12
DQ13
VSS10
DQ14
DQ15
DQ20
DQ21
DQ23
DQ29
DQS3
DQ30
DQ31
CKE1
VDD2
VDD4
VDD6
VDD8
CK1#
VDD12
RAS#
VDD14
ODT0
VDD16
ODT1
VDD18
VREF_CA
VSS28
DQ36
DQ37
VSS30
VSS31
DQ38
DQ39
VSS33
DQ44
DQ45
VSS35
DQS#5
DQS5
VSS38
DQ46
DQ47
VSS40
DQ52
DQ53
VSS42
VSS43
DQ54
DQ55
VSS45
DQ60
DQ61
VSS47
DQS#7
DQS7
VSS50
DQ62
DQ63
VSS52
EVENT#
VTT2
DQ4
DQ5
DQ6
DQ7
DM1
DM2
CK1
NC2
DM4
DM6
SDA
SCL
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
A15
80
A14
82
84
86
A7
88
90
A6
92
A4
94
96
A2
98
A0
100
102
104
106
108
BA1
110
112
114
S0#
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
206
G2
+1.5V_MEM+1.5V_MEM
DDR_B_D5
DDR_B_D1
DDR_B_DQS#0
DDR_B_DQS0
DDR_B_D7
DDR_B_D3
DDR_B_D13
DDR3_DRAMRST#_R
DDR_B_D14
DDR_B_D15
DDR_B_D20
DDR_B_D21
DDR_B_D18
DDR_B_D19
DDR_B_D28
DDR_B_D24DDR_B_D25
DDR_B_DQS#3
DDR_B_DQS3
DDR_B_D30
DDR_B_D31
DDR_B_MA15
DDR_B_MA14
DDR_B_MA11
DDR_B_MA7
DDR_B_MA6
DDR_B_MA4
DDR_B_MA2
DDR_B_MA0
M_CLK_DDR3
M_CLK_DDR#3
DDR_B_BS1
DDR_B_RAS#
M_ODT2
M_ODT3
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_DQS#5
DDR_B_DQS5
DDR_B_D46
DDR_B_D47
DDR_B_D52
DDR_B_D53
DDR_B_D50
DDR_B_D51
DDR_B_D60
DDR_B_D61
DDR_B_DQS#7
DDR_B_DQS7
DDR_B_D62
DDR_B_D63
DIMM4_SMBDAT
DIMM4_SMBCLK
+0.75V_DDR_VTT
2
DDR3_DRAMRST#_R <12,13,14>
DDR_CKE3_DIMM4 <8>
M_CLK_DDR3 <8>
M_CLK_DDR#3 <8>
DDR_B_BS1 <8,14>
DDR_B_RAS# <8,14>
DDR_CS2_DIMM4# <8>
M_ODT2 <8>
M_ODT3 <8>
RD39 0_0402_5%~DRD39 0_0402_5%~D
RD40 0_0402_5%~DRD40 0_0402_5%~D
1 2
1 2
+DIMM4_VREF_CA
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
CD85
CD85
1
2
CPU
1 2
RD34 0_0402_5%~DRD34 0_0402_5%~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
CD86
CD86
1
2
DDR_XDP_WAN_SMBDAT <12,13,14,17,18,34,41>
DDR_XDP_WAN_SMBCLK <12,13,14,17,18,34,41>
JDIMM2
JDIMM1
+V_DDR_REF
1
JDIMM3
JDIMM4
TopSide
BottomSide
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
DDRIII-SODIMM SLOT4
DDRIII-SODIMM SLOT4
DDRIII-SODIMM SLOT4
LA-7933
LA-7933
LA-7933
1
15 65Monday, November 07, 2011
15 65Monday, November 07, 2011
15 65Monday, November 07, 2011
0.2
0.2
0.2
of
of
of
5
PEG_CRX_GTX_C_P[0..15]<6>
PEG_CRX_GTX_C_N[0..15]<6>
PEG_CTX_GRX_P[0..15]<6>
PEG_CTX_GRX_N[0..15]<6>
D D
PEG_CRX_GTX_C_P[0..15]
PEG_CRX_GTX_C_N[0..15]
PEG_CTX_GRX_P[0..15]
PEG_CTX_GRX_N[0..15]
4
+3.3V_MXM
MXM_CRT_DDC_DAT
1 2
R3 4.3K_0402_5%@R3 4.3K_0402_5%@
MXM_CRT_DDC_CLK
1 2
R5 4.3K_0402_5%@R5 4.3K_0402_5%@
DGPU_PWR_GOOD
1 2
R8 10K_0402_5%~DR8 10K_0402_5%~D
MXM_CLK_REQ#
1 2
R7 10K_0402_5%~DR7 10K_0402_5%~D
MXM_ALERT#
3
+3.3V_MXM
10K_0402_5%~DR410K_0402_5%~D
12
R4
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
2
+3.3V_MXM
+3.3V_MXM
4.7K_0402_5%~D
4.7K_0402_5%~D
4.7K_0402_5%~D
4.7K_0402_5%~D
12
12
@
@
@
@
R2
R2
R1
R1
G
G
2
13
DGPU_ALERT# <46>
D
S
D
S
Q5
Q5
GPU_SMBDAT_R
GPU_SMBCLK_R
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
2
Q295A
Q295A
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
354
Q295B
Q295B
61
GPU_SMBDAT <47>
GPU_SMBCLK <47>
1
+MXM_PWR_SRC
+5V_MXM
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
0.1U_0402_16V4Z~DC70.1U_0402_16V4Z~D
C328
C328
1
1
C7
2
+5V_MXM
2
100mil(2.5A, 5VIA)
R1970 0_0402_5%~DR1970 0_0402_5%~D
1 2
R1971 0_0402_5%~D@ R1971 0_0402_5%~D@
1 2
MXM_ENVDD<28>
MXM_PANEL_BKEN<28>
C C
B B
A A
MXM_BIA_PWM<28>
MXM_LVDS_DDC_DAT<27>
MXM_LVDS_DDC_CLK<27>
PEG_CRX_GTX_C_N15
PEG_CRX_GTX_C_P15
PEG_CRX_GTX_C_N14
PEG_CRX_GTX_C_P14
PEG_CRX_GTX_C_N13
PEG_CRX_GTX_C_P13
PEG_CRX_GTX_C_N12
PEG_CRX_GTX_C_P12
PEG_CRX_GTX_C_N11
PEG_CRX_GTX_C_P11
PEG_CRX_GTX_C_N10
PEG_CRX_GTX_C_P10
PEG_CRX_GTX_C_N9
PEG_CRX_GTX_C_P9
PEG_CRX_GTX_C_N8
PEG_CRX_GTX_C_P8
PEG_CRX_GTX_C_N7
PEG_CRX_GTX_C_P7
PEG_CRX_GTX_C_N6
PEG_CRX_GTX_C_P6
PEG_CRX_GTX_C_N5
PEG_CRX_GTX_C_P5
PEG_CRX_GTX_C_N4
PEG_CRX_GTX_C_P4
PEG_CRX_GTX_C_N3
PEG_CRX_GTX_C_P3
+3.3V_MXM +3.3V_ALW +3.3V_RUN
2.2K_0402_5%~D
2.2K_0402_5%~D
12
R38
R38
DGPU_PEX_RST#
MXM_DPC_HPD
RB751VM-40TE-17_SOD323-2~D
RB751VM-40TE-17_SOD323-2~D
MXM_MB_DP_HPD
RB751VM-40TE-17_SOD323-2~D
RB751VM-40TE-17_SOD323-2~D
MXM_DPB_HPD
RB751VM-40TE-17_SOD323-2~D
RB751VM-40TE-17_SOD323-2~D
5
4
O
2 1
2 1
2 1
D7
D7
D8
D8
D18
D18
1
PWR_SRC
3
PWR_SRC
5
PWR_SRC
7
PWR_SRC
9
PWR_SRC
11
PWR_SRC
13
PWR_SRC
15
PWR_SRC
17
PWR_SRC
19
GND
21
GND
23
GND
25
GND
27
GND
29
GND
31
GND
33
GND
35
GND
37
5V
39
5V
41
5V
43
5V
45
5V
47
GND
49
GND
51
GND
53
GND
55
PEX_STD_SW#
57
VGA_DISABLE#
59
PNL_PWR_EN
61
PNL_BL_EN
63
PNL_BL_PWM
65
HDMI_CEC
67
DVI_HPD
69
LVDS_DDC_DAT
71
LVDS_DDC_CLK
73
GND
75
OEM
77
OEM
79
OEM
81
OEM
83
GND
85
PEX_RX15#
87
PEX_RX15
89
GND
91
PEX_RX14#
93
PEX_RX14
95
GND
97
PEX_RX13#
99
PEX_RX13
101
GND
103
PEX_RX12#
105
PEX_RX12
107
GND
109
PEX_RX11#
111
PEX_RX11
113
GND
115
PEX_RX10#
117
PEX_RX10
119
GND
121
PEX_RX9#
123
PEX_RX9
125
GND
127
PEX_RX8#
129
PEX_RX8
131
GND
133
PEX_RX7#
135
PEX_RX7
137
GND
139
PEX_RX6#
141
PEX_RX6
143
GND
145
PEX_RX5#
147
PEX_RX5
149
GND
151
PEX_RX4#
153
PEX_RX4
155
GND
157
PEX_RX3#
159
PEX_RX3
161
GND
JAE_MM70-314-310B1-1-R300
JAE_MM70-314-310B1-1-R300
C90
C90
1 2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
5
1
P
B
2
A
G
U16
U16
3
74AHC1G09GW_TSSOP5~D
74AHC1G09GW_TSSOP5~D
JMXM1A
CONN@
JMXM1A
CONN@
E1 E2
E1 E2
E3 E4
E3 E4
LInkCIS
100K_0402_5%~D
100K_0402_5%~D
12
R36
R36
MXM_DP_HDMI_HPD <46>
2
PWR_SRC
4
PWR_SRC
6
PWR_SRC
8
PWR_SRC
10
PWR_SRC
12
PWR_SRC
14
PWR_SRC
16
PWR_SRC
18
PWR_SRC
20
GND
22
GND
24
GND
26
GND
28
GND
30
GND
32
GND
34
GND
36
GND
38
PRSNT_R#
40
WAKE#
42
PWR_GOOD
44
PWR_EN
46
RSVD
48
RSVD
50
RSVD
52
RSVD
54
PWR_LEVEL
56
TH_OVERT#
58
TH_ALERT#
60
TH_PWM
62
GPIO0
64
GPIO1
66
GPIO2
68
SMB_DAT
70
SMB_CLK
72
GND
74
OEM
76
OEM
78
OEM
80
OEM
82
GND
84
PEX_TX15#
86
PEX_TX15
88
GND
90
PEX_TX14#
92
PEX_TX14
94
GND
96
PEX_TX13#
98
PEX_TX13
100
GND
102
PEX_TX12#
104
PEX_TX12
106
GND
108
PEX_TX11#
110
PEX_TX11
112
GND
114
PEX_TX10#
116
PEX_TX10
118
GND
120
PEX_TX9#
122
PEX_TX9
124
GND
126
PEX_TX8#
128
PEX_TX8
130
GND
132
PEX_TX7#
134
PEX_TX7
136
GND
138
PEX_TX6#
140
PEX_TX6
142
GND
144
PEX_TX5#
146
PEX_TX5
148
GND
150
PEX_TX4#
152
PEX_TX4
154
GND
156
PEX_TX3#
158
PEX_TX3
160
GND
DGPU_HOLD_RST# <21>
PLTRST_GPU# <20>
DYN_TURB_GPU_PWR_ALRT#<26,47>
R1972 0_0402_5%~D@ R1972 0_0402_5%~D@
DGPU_PWR_GOOD
400mil(10A)
680P_0603_50V7K~DC3680P_0603_50V7K~D
10U_1206_25V6M~DC210U_1206_25V6M~D
1
1
C3
C2
2
2
1 2
MXM_PWR_LEVEL
MXM_OVERT#
MXM_ALERT#
GPU_SMBDAT_R
GPU_SMBCLK_R
SYSTEM
PEG_CTX_GRX_N15
PEG_CTX_GRX_P15
PEG_CTX_GRX_N14
PEG_CTX_GRX_P14
PEG_CTX_GRX_N13
PEG_CTX_GRX_P13
PEG_CTX_GRX_N12
PEG_CTX_GRX_P12
PEG_CTX_GRX_N11
PEG_CTX_GRX_P11
PEG_CTX_GRX_N10
PEG_CTX_GRX_P10
PEG_CTX_GRX_N9
PEG_CTX_GRX_P9
PEG_CTX_GRX_N8
PEG_CTX_GRX_P8
PEG_CTX_GRX_N7
PEG_CTX_GRX_P7
PEG_CTX_GRX_N6
PEG_CTX_GRX_P6
PEG_CTX_GRX_N5
PEG_CTX_GRX_P5
PEG_CTX_GRX_N4
PEG_CTX_GRX_P4
PEG_CTX_GRX_N3
PEG_CTX_GRX_P3
MXM_DPB_HPD_GATE
100K_0402_5%~D
100K_0402_5%~D
@R758
@
12
R758
MXM_PWR_LEVEL
@ D19
@
RB751VM-40TE-17_SOD323-2~D
RB751VM-40TE-17_SOD323-2~D
4
+MXM_PWR_SRC
68P_0402_50V8J~DC468P_0402_50V8J~D
1
C4
2
R19760_0402_5%~D R19760_0402_5%~D
12
4
O
D19
21
JMXM1B
CONN@JMXM1B
CONN@
163
C91
C91
DGPU_PWR_GOOD
DGPU_PWR_EN
U8
U8
GND
165
PEX_RX2#
167
PEX_RX2
169
GND
171
PEX_RX1#
173
PEX_RX1
175
GND
177
PEX_RX0#
179
PEX_RX0
181
GND
183
PEX_REFCLK#
185
PEX_REFCLK
187
GND
189
RSVD
191
RSVD
193
RSVD
195
RSVD
197
RSVD
199
LVDS_UCLK#
201
LVDS_UCLK
203
GND
205
LVDS_UTX3#
207
LVDS_UTX3
209
GND
211
LVDS_UTX2#
213
LVDS_UTX2
215
GND
217
LVDS_UTX1#
219
LVDS_UTX1
221
GND
223
LVDS_UTX0#
225
LVDS_UTX0
227
GND
229
DP_C_L0#
231
DP_C_L0
233
GND
235
DP_C_L1#
237
DP_C_L1
239
GND
241
DP_C_L2#
243
DP_C_L2
245
GND
247
DP_C_L3#
249
DP_C_L3
251
GND
253
DP_C_AUX#
255
DP_C_AUX
257
RSVD
259
RSVD
261
RSVD
263
RSVD
265
RSVD
267
RSVD
269
RSVD
271
RSVD
273
RSVD
275
RSVD
277
RSVD
279
RSVD
281
GND
283
DP_A_L0#
285
DP_A_L0
287
GND
289
DP_A_L1#
291
DP_A_L1
293
GND
295
DP_A_L2#
297
DP_A_L2
299
GND
301
DP_A_L3#
303
DP_A_L3
305
GND
307
DP_A_AUX#
309
DP_A_AUX
310
PRSNT_L#
311
GND
JAE_MM70-314-310B1-1-R300
JAE_MM70-314-310B1-1-R300
LInkCIS
MXM_MB_DP_HPD_GATE
2
PEX_CLK_REQ#
VGA_DDC_DAT
VGA_DDC_CLK
VGA_VSYNC
VGA_HSYNC
VGA_GREEN
LVDS_LCLK#
LVDS_LTX3#
LVDS_LTX2#
LVDS_LTX1#
LVDS_LTX0#
100K_0402_5%~D
100K_0402_5%~D
12
@R60
@
R60
PEX_TX2#
PEX_TX2
PEX_TX1#
PEX_TX1
PEX_TX0#
PEX_TX0
PEX_RST#
VGA_RED
VGA_BLUE
LVDS_LCLK
LVDS_LTX3
LVDS_LTX2
LVDS_LTX1
LVDS_LTX0
DP_D_L0#
DP_D_L0
DP_D_L1#
DP_D_L1
DP_D_L2#
DP_D_L2
DP_D_L3#
DP_D_L3
DP_D_AUX#
DP_D_AUX
DP_C_HPD
DP_D_HPD
RSVD
RSVD
RSVD
DP_B_L0#
DP_B_L0
DP_B_L1#
DP_B_L1
DP_B_L2#
DP_B_L2
DP_B_L3#
DP_B_L3
DP_B_AUX#
DP_B_AUX
DP_B_HPD
DP_A_HPD
MXM_OVERT#
0.1U_0603_25V7K~DC10.1U_0603_25V7K~D
1
C1
2
MXM_LVDS_BCLK-<27>
MXM_PRESENTR# <21>
PCIE_WAKE# <41,42,45,47>
DGPU_PWR_EN <46>
MXM_PIN80 <41>
LVDS
(Upper/even)
HDMI/DockingDP
MUX
MXM_LVDS_BCLK+<27>
MXM_DPC_AUX#<33>
MXM_DPC_AUX<33>
MBDP
MXM_MB_DP_AUX#<29>
MXM_MB_DP_AUX<29>
MXM_PRESENTL#<21>
+3.3V_MXM
C96
C96
1 2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
5
DGPU_PWROK DGPU_PWROK DGPU_PWROK
1
P
IN1
2
IN2
G
U14
U14
3
SN74AHC1G08DCKR_SC70-5
SN74AHC1G08DCKR_SC70-5
+3.3V_ALW
100K_0402_5%~D
100K_0402_5%~D
12
R37
R37
4
O
C92
C92
1 2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
5
1
P
B
2
A
G
U17
U17
3
74AHC1G09GW_TSSOP5~D
74AHC1G09GW_TSSOP5~D
MXM_DPC_HPD_GATE
ACAV_IN <25,47,60,61>
GPU_PWR_LEVEL <46>
3
+3.3V_MXM +3.3V_MXM
4
O
100K_0402_5%~D
100K_0402_5%~D
@R519
@
R519
1 2
DGPU_PWROK<21,46>
PEG_CRX_GTX_C_N2
PEG_CRX_GTX_C_P2
PEG_CRX_GTX_C_N1
PEG_CRX_GTX_C_P1
PEG_CRX_GTX_C_N0
PEG_CRX_GTX_C_P0
CLK_PCIE_VGA#<18>
CLK_PCIE_VGA<18>
MXM_LVDS_B2-<27>
MXM_LVDS_B2+<27>
MXM_LVDS_B1-<27>
MXM_LVDS_B1+<27>
MXM_LVDS_B0-<27>
MXM_LVDS_B0+<27>
MXM_DPC_N0<33>
MXM_DPC_P0<33>
MXM_DPC_N1<33>
MXM_DPC_P1<33>
MXM_DPC_N2<33>
MXM_DPC_P2<33>
MXM_DPC_N3<33>
MXM_DPC_P3<33>
MXM_MB_DP_N0<29>
MXM_MB_DP_P0<29>
MXM_MB_DP_N1<29>
MXM_MB_DP_P1<29>
MXM_MB_DP_N2<29>
MXM_MB_DP_P2<29>
MXM_MB_DP_N3<29>
MXM_MB_DP_P3<29>
5
P
IN1
IN2
G
3
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
CLK_PCIE_VGA#
CLK_PCIE_VGA
MXM_LVDS_BCLKMXM_LVDS_BCLK+
MXM_LVDS_B2MXM_LVDS_B2+
MXM_LVDS_B1MXM_LVDS_B1+
MXM_LVDS_B0MXM_LVDS_B0+
MXM_DPC_N0
MXM_DPC_P0
MXM_DPC_N1
MXM_DPC_P1
MXM_DPC_N2
MXM_DPC_P2
MXM_DPC_N3
MXM_DPC_P3
MXM_DPC_AUX#
MXM_DPC_AUX
MXM_MB_DP_N0
MXM_MB_DP_P0
MXM_MB_DP_N1
MXM_MB_DP_P1
MXM_MB_DP_N2
MXM_MB_DP_P2
MXM_MB_DP_N3
MXM_MB_DP_P3
MXM_MB_DP_AUX#
MXM_MB_DP_AUX
MXM_PRESENTL#
C95
C95
1 2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
2
U25
U25
SN74AHC1G08DCKR_SC70-5
SN74AHC1G08DCKR_SC70-5
4
+3.3V_RUN+3.3V_MXM
1 2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
5
1
P
IN1
O
2
IN2
G
3
SN74AHC1G08DCKR_SC70-5
SN74AHC1G08DCKR_SC70-5
162
GND
164
166
168
GND
170
172
174
GND
176
178
180
GND
182
184
186
188
190
192
194
GND
196
198
200
202
GND
204
206
208
GND
210
212
214
GND
216
218
220
GND
222
224
226
GND
228
230
232
GND
234
236
238
GND
240
242
244
GND
246
248
250
GND
252
254
256
GND
258
260
262
264
266
268
270
272
GND
274
276
278
GND
280
282
284
GND
286
288
290
GND
292
294
296
GND
298
300
302
304
306
3V3
308
3V3
312
GND
4
O
PEG_CTX_GRX_N2
PEG_CTX_GRX_P2
PEG_CTX_GRX_N1
PEG_CTX_GRX_P1
PEG_CTX_GRX_N0
PEG_CTX_GRX_P0
MXM_CLK_REQ#
DGPU_PEX_RST#
MXM_CRT_VSYNC
MXM_CRT_HSYNC
MXM_CRT_RED
MXM_CRT_GRN
MXM_CRT_BLU
MXM_LVDS_ACLKMXM_LVDS_ACLK+
MXM_LVDS_A2MXM_LVDS_A2+
MXM_LVDS_A1MXM_LVDS_A1+
MXM_LVDS_A0MXM_LVDS_A0+
MXM_EDP_TX0-
MXM_EDP_TX0+
MXM_EDP_TX1MXM_EDP_TX1+
MXM_EDP_TX2MXM_EDP_TX2+
MXM_EDP_TX3MXM_EDP_TX3+
MXM_EDP_AUXMXM_EDP_AUX+
MXM_DPC_HPD_GATE
MXM_EDP_HPD
MXM_DPB_N0
MXM_DPB_P0
MXM_DPB_N1
MXM_DPB_P1
MXM_DPB_N2
MXM_DPB_P2
MXM_DPB_N3
MXM_DPB_P3
MXM_DPB_AUX#
MXM_DPB_AUX
MXM_DPB_HPD_GATE
MXM_MB_DP_HPD_GATE
+3.3V_MXM
C94
C94
1 2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
5
1
P
IN1
2
IN2
G
U27
U27
3
SN74AHC1G08DCKR_SC70-5
SN74AHC1G08DCKR_SC70-5
+3.3V_MXM
10K_0402_5%~D
10K_0402_5%~D
12
R10
R10
G
G
2
S
S
Q4
Q4
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
MXM_CRT_DDC_DAT <31>
+3.3V_MXM
40mil(1A)
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
C332
C332
2
+3.3V_ALW
13
D
D
0.1U_0402_16V4Z~DC80.1U_0402_16V4Z~D
1
C8
2
MXM_MB_DP_HPD <29>MXM_DPC_HPD <33>MXM_DPB_HPD <44>
10K_0402_5%~D
10K_0402_5%~D
12
R11
R11
MXM_CRT_DDC_CLK <31>
MXM_CRT_VSYNC <31>
MXM_CRT_HSYNC <31>
MXM_CRT_RED <31>
MXM_CRT_GRN <31>
MXM_CRT_BLU <31>
MXM_LVDS_ACLK- <27>
MXM_LVDS_ACLK+ <27>
MXM_LVDS_A2- <27>
MXM_LVDS_A2+ <27>
MXM_LVDS_A1- <27>
MXM_LVDS_A1+ <27>
MXM_LVDS_A0- <27>
MXM_LVDS_A0+ <27>
MXM_EDP_TX0- <30>
MXM_EDP_TX0+ <30>
MXM_EDP_TX1- <30>
MXM_EDP_TX1+ <30>
MXM_EDP_TX2- <30>
MXM_EDP_TX2+ <30>
MXM_EDP_TX3- <30>
MXM_EDP_TX3+ <30>
MXM_EDP_AUX- <30>
MXM_EDP_AUX+ <30>
MXM_EDP_HPD <30>
MXM_DPB_N0 <44>
MXM_DPB_P0 <44>
MXM_DPB_N1 <44>
MXM_DPB_P1 <44>
MXM_DPB_N2 <44>
MXM_DPB_P2 <44>
MXM_DPB_N3 <44>
MXM_DPB_P3 <44>
MXM_DPB_AUX# <32>
MXM_DPB_AUX <32>
DGPU_THERMTRIP# <25>
CRT
LVDS
(Lower/odd)
eDP
DockingDPport2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
MXM
MXM
MXM
LA-7933
LA-7933
LA-7933
1
16 65Monday, November 07, 2011
16 65Monday, November 07, 2011
16 65Monday, November 07, 2011
of
of
of
0.2
0.2
0.2
5
+3.3V_ALW_PCH
12
RH66
RH66
1K_0402_1%~D
1K_0402_1%~D
PCH_AZ_SYNC
12
RH282
@RH282
D D
PCH_AZ_SYNCissampled
attherisingedgeofRSMRST#pin.
SosignalshouldbePUtotheALWAYSrail.
C C
B B
A A
@
100K_0402_5%~D
100K_0402_5%~D
+RTC_CELL
12
RH38
RH38
330K_0402_1%~D
330K_0402_1%~D
PCH_INTVRMEN
12
RH39
@RH39
@
330K_0402_1%~D
330K_0402_1%~D
INTVRMEN‐IntegratedSUS
1.1VVRMEnable
High‐EnableInternalVRs
Low‐EnableExternalVRs
CMOS_CLR1
ME_CLR1
Shunt ClearMERTCRegisters
Open
PCH_AZ_CODEC_SDOUT<45>
PCH_AZ_CODEC_SYNC<45>
PCH_AZ_CODEC_BITCLK<45>
SPI_PCH_CS0# SPI_PCH_CS0#_R
SPI_PCH_DIN SPI_DIN64
SPI_WP#_SEL<46>
CMOSsetting
Shunt ClearCMOS
Open
KeepCMOS
TPMsetting
KeepMERTCRegisters
PCH_AZ_CODEC_RST#<45>
1 2
R963 47_0402_5%~DR963 47_0402_5%~D
1 2
R894 33_0402_5%~DR894 33_0402_5%~D
1 2
R898 0_0402_5%~D@R898 0_0402_5%~D@
5
+RTC_CELL
1
1
@
@
ME1 SHORT PADS~D
ME1 SHORT PADS~D
1 2
CH5 1U_0402_6.3V6K~DCH5 1U_0402_6.3V6K~D
RH29 33_0402_5%~DRH29 33_0402_5%~D
RH27 33_0402_5%~DRH27 33_0402_5%~D
RH41 33_0402_5%~DRH41 33_0402_5%~D
RH25 33_0402_5%~DRH25 33_0402_5%~D
27P_0402_50V8J~D
27P_0402_50V8J~D
@CH101
@
1
CH101
2
R890
R890
3.3K_0402_5%~D
3.3K_0402_5%~D
SPI_WP#_SEL_R
USB_OC0#_R<20>
USB_OC1#_R<20>
USB_OC2#<20>
USB_OC3#<20,45>
USB_OC4#_R<20>
USB_OC5#<20>
USB_OC6#<20>
SIO_EXT_SMI#<20,47>
SLP_ME_CSW_DEV#<21,46>
PCH_GPIO35<21>
PCH_GPIO36<21>
PCH_GPIO37<21>
PCH_GPIO16<21>
TEMP_ALERT#<21,46>
PCH_GPIO15<21>
SIO_EXT_SCI#_R<21>
PCH_RSMRST#_Q<19,48>
RH22 20K_0402_5%~DRH22 20K_0402_5%~D
1 2
RH23 20K_0402_5%~DRH23 20K_0402_5%~D
1 2
RH11 1M_0402_5%~DRH11 1M_0402_5%~D
1 2
2
2
+3.3V_ALW_PCH
0_0603_5%~D
0_0603_5%~D
12
RH288
RH288
+3.3V_ALW_PCH_JTAG
PCH_AZ_SDOUT
1 2
PCH_AZ_SYNC_Q
1 2
PCH_AZ_RST#
1 2
PCH_AZ_BITCLK
1 2
1 2
RH31 1M_0402_5%~DRH31 1M_0402_5%~D
12
200MILSO8
64MbFlashROM 200MILSO8
U52
U52
1
/CS
2
DO
3
/WP
GND4DIO
W25Q64CVSSIG_SO8~D
W25Q64CVSSIG_SO8~D
4
USB_OC0#_R
USB_OC1#_R
USB_OC2#
USB_OC3#
USB_OC4#_R
USB_OC5#
USB_OC6#
SIO_EXT_SMI#
SLP_ME_CSW_DEV#
PCH_GPIO35
HDD_DET#_R
BBS_BIT0_R
PCH_GPIO36
PCH_GPIO37
PCH_GPIO16
TEMP_ALERT#
PCH_GPIO15
SIO_EXT_SCI#_R
PCH_RSMRST#_Q RSMRST#_XDP
RH51 33_0402_5%~DPXDP@ RH51 33_0402_5%~DPXDP@
RH7 33_0402_5%~DPXDP@ RH7 33_0402_5%~DPXDP@
RH16 33_0402_5%~DPXDP@ RH16 33_0402_5%~DPXDP@
RH5 33_0402_5%~DPXDP@ RH5 33_0402_5%~DPXDP@
RH6 33_0402_5%~DPXDP@ RH6 33_0402_5%~DPXDP@
RH14 33_0402_5%~DPXDP@ RH14 33_0402_5%~DPXDP@
RH8 33_0402_5%~DPXDP@ RH8 33_0402_5%~DPXDP@
RH9 33_0402_5%~DPXDP@ RH9 33_0402_5%~DPXDP@
RH10 33_0402_5%~DPXDP@ RH10 33_0402_5%~DPXDP@
RH12 33_0402_5%~DPXDP@ RH12 33_0402_5%~DPXDP@
RH13 33_0402_5%~DPXDP@ RH13 33_0402_5%~DPXDP@
RH26 33_0402_5%~DPXDP@ RH26 33_0402_5%~DPXDP@
RH20 33_0402_5%~DPXDP@ RH20 33_0402_5%~DPXDP@
RH34 33_0402_5%~DPXDP@ RH34 33_0402_5%~DPXDP@
RH17 33_0402_5%~DPXDP@ RH17 33_0402_5%~DPXDP@
RH18 33_0402_5%~DPXDP@ RH18 33_0402_5%~DPXDP@
RH19 33_0402_5%~DPXDP@ RH19 33_0402_5%~DPXDP@
RH53 33_0402_5%~DPXDP@ RH53 33_0402_5%~DPXDP@
RH24 1K_0402_1%~DPXDP@ RH24 1K_0402_1%~DPXDP@
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
Crystal EA.
CH2
CH2
18P_0402_50V8J~D
18P_0402_50V8J~D
12
12
YH1
YH1
32.768KHZ_12.5PF_Q13FC1350000~D
CH3
CH3
18P_0402_50V8J~D
18P_0402_50V8J~D
1
1
@
@
CMOS1 SHORT PADS~D
CMOS1 SHORT PADS~D
1 2
CH4
CH4
CMOSplacenearDIMM
INTELHDA_SYNCisolationcircuit
+3.3V_SPI
8
VCC
7
/HOLD
SPI_CLK64
6
CLK
SPI_DO64
5
4
32.768KHZ_12.5PF_Q13FC1350000~D
PCH_RTCX2_R PCH_RTCX2
12
2
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
+3.3V_ALW_PCH
ME_FWP<46>
RH59 51_0402_1%~DRH59 51_0402_1%~D
RH44 200_0402_1%~DRH44 200_0402_1%~D
RH45 200_0402_1%~DRH45 200_0402_1%~D
RH43 200_0402_1%~DRH43 200_0402_1%~D
+5V_RUN
G
G
2
S
S
QH7
QH7
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
3.3K_0402_5%~D
3.3K_0402_5%~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
12
R891
R891
1 2
R899 33_0402_5%~DR899 33_0402_5%~D
1 2
R901 33_0402_5%~DR901 33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
@
@
R910
R910
1 2
1
2
1 2
RH286 0_0402_5%~DRH286 0_0402_5%~D
PCH_AZ_CODEC_SDIN0<45>
1 2
RH287 1K_0402_1%~D@ RH287 1K_0402_1%~D@
1 2
RH50 1K_0402_1%~DRH50 1K_0402_1%~D
12
12
12
12
13
D
D
C787
C787
1 2
SPI_HOLD#
SPI_PCH_CLK
SPI_PCH_DO
SPI_CLK64 SPI_CLK32
10P_0402_50V8J~D
10P_0402_50V8J~D
C761
C761
100_0402_1%~D
100_0402_1%~D
12
RH48
RH48
PCH_AZ_SYNCPCH_AZ_SYNC_Q
@
@
3
XDP_FN0
XDP_FN1
XDP_FN2
XDP_FN3
XDP_FN4
XDP_FN5
XDP_FN6
XDP_FN7
XDP_FN8
XDP_FN9
XDP_FN10
XDP_FN11
XDP_FN12
XDP_FN13
XDP_FN14
XDP_FN15
XDP_FN16
XDP_FN17
DDR_XDP_WAN_SMBDAT<12,13,14,15,18,34,41>
DDR_XDP_WAN_SMBCLK<12,13,14,15,18,34,41>
PCH_RTCX1
12
RH15
RH15
10M_0402_5%~D
10M_0402_5%~D
PCH_RTCRST#
SRTCRST#
INTRUDER#
PCH_INTVRMEN
PCH_AZ_BITCLK
PCH_AZ_SYNC
SPKR<45>
PCH_AZ_RST#
PCH_AZ_CODEC_SDIN0
PCH_AZ_SDOUT
PCH_GPIO33
PCH_JTAG_TCK
PCH_JTAG_TMS
PCH_JTAG_TDI
PCH_JTAG_TDO
100_0402_1%~D
100_0402_1%~D
100_0402_1%~D
100_0402_1%~D
12
12
RH49
RH49
RH47
RH47
PCH_SPI_CLK
PCH_SPI_CS0#
PCH_SPI_CS1#
PCH_SPI_DO
PCH_SPI_DIN
SPI_PCH_CS1# SPI_PCH_CS1#_R
1 2
R936 47_0402_5%~DR936 47_0402_5%~D
SPI_PCH_DIN SPI_DIN32
1 2
R895 33_0402_5%~DR895 33_0402_5%~D
SPI_WP#_SEL_R
3
1.05V_0.8V_PWROK<47,58>
SIO_PWRBTN#_R<7,19>
UH4A
UH4A
A20
RTCX1
C20
RTCX2
D20
RTCRST#
G22
SRTCRST#
K22
INTRUDER#
C17
INTVRMEN
N34
HDA_BCLK
L34
HDA_SYNC
T10
SPKR
K34
HDA_RST#
E34
HDA_SDIN0
G34
HDA_SDIN1
C34
HDA_SDIN2
A34
HDA_SDIN3
A36
HDA_SDO
C36
HDA_DOCK_EN# / GPIO33
N32
HDA_DOCK_RST# / GPIO13
J3
JTAG_TCK
H7
JTAG_TMS
K5
JTAG_TDI
H1
JTAG_TDO
T3
SPI_CLK
Y14
SPI_CS0#
T1
SPI_CS1#
V4
SPI_MOSI
U3
SPI_MISO
BD82PPSM-QNHN-A0_BGA989~D
BD82PPSM-QNHN-A0_BGA989~D
32MbFlashROM
1
2
3
4
+3.3V_ALW_PCH
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
PXDP@ CH1
PXDP@
1
CH1
2
PXDP@
PXDP@
RH283 1K_0402_1%~D
RH283 1K_0402_1%~D
1 2
1 2
RH21 0_0402_5%~D
RH21 0_0402_5%~D
PXDP@
PXDP@
RH284 0_0402_5%~DPXDP@RH284 0_0402_5%~DPXDP@
1 2
1 2
RH285 0_0402_5%~D
RH285 0_0402_5%~D
PXDP@
PXDP@
LPC
LPC
RTCIHDA
RTCIHDA
SATA
SATA
JTAG
JTAG
SATA0GP / GPIO21
SPI
SPI
SATA1GP / GPIO19
U53
U53
CS#
VCC
DO
HOLD#
WP#
CLK
GND
DI
W25Q32BVSSIG_SO8~D
W25Q32BVSSIG_SO8~D
1.05V_0.8V_PWROK_R
PCH_PWRBTN#_XDP
DDR_XDP_WAN_SMBDAT_R2
DDR_XDP_WAN_SMBCLK_R2
FWH0 / LAD0
FWH1 / LAD1
FWH2 / LAD2
FWH3 / LAD3
FWH4 / LFRAME#
LDRQ0#
LDRQ1# / GPIO23
SERIRQ
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
SATA1RXN
SATA1RXP
SATA 6G
SATA 6G
SATA1TXN
SATA1TXP
SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP
SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP
SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP
SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP
SATAICOMPO
SATAICOMPI
SATA3RCOMPO
SATA3COMPI
SATA3RBIAS
SATALED#
+3.3V_SPI
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
8
7
6
5
SPI_DO32
33_0402_5%~D
33_0402_5%~D
@
@
R913
R913
10P_0402_50V8J~D
10P_0402_50V8J~D
1 2
1
@
@
C764
C764
2
2
+3.3V_ALW_PCH
XDP_FN0
XDP_FN1
XDP_FN2
XDP_FN3
XDP_FN4
XDP_FN5
XDP_FN6
XDP_FN7
LPC_LAD0
C38
LPC_LAD1
A38
LPC_LAD2
B37
LPC_LAD3
C37
LPC_LFRAME#
D36
E36
LPC_LDRQ1#
K36
IRQ_SERIRQ
V5
AM3
AM1
AP7
AP5
AM10
AM8
AP11
AP10
AD7
AD5
AH5
AH4
AB8
AB10
AF3
AF1
Y7
Y5
AD3
AD1
Y3
Y1
AB3
AB1
Y11
SATA_COMP
Y10
AB12
AB13
AH1
P3
V14
P1
SATA3_COMP
RBIAS_SATA3
SATA_ACT#
HDD_DET#_R
BBS_BIT0_R
PCH_PLTRST#<7,20>
RH40 37.4_0402_1%~DRH40 37.4_0402_1%~D
RH42 49.9_0402_1%~DRH42 49.9_0402_1%~D
RH46 750_0402_1%~DRH46 750_0402_1%~D
BBS_BIT0‐BIOSBOOTSTRAPBIT0
C788
C788
1 2
SPI_HOLD#
SPI_PCH_CLKSPI_CLK32
1 2
R897 33_0402_5%~DR897 33_0402_5%~D
SPI_PCH_DO
1 2
R900 33_0402_5%~DR900 33_0402_5%~D
2
JXDP2
JXDP2
1
GND0
3
OBSFN_A0
5
OBSFN_A1
7
GND2
9
OBSDATA_A0
11
OBSDATA_A1
13
GND4
15
OBSDATA_A2
17
OBSDATA_A3
19
GND6
21
OBSFN_B0
23
OBSFN_B1
25
GND8
27
OBSDATA_B0
29
OBSDATA_B1
31
GND10
33
OBSDATA_B2
35
OBSDATA_B3
37
GND12
39
PWRGOOD/HOOK0
41
HOOK1
43
VCC_OBS_AB
45
HOOK2
47
HOOK3
49
GND14
51
SDA
53
SCL
55
TCK1
57
TCK0
59
GND16
SAMTE_BSH-030-01-L-D-A CONN@
SAMTE_BSH-030-01-L-D-A CONN@
LPC_LAD0 <40,42,46,47>
LPC_LAD1 <40,42,46,47>
LPC_LAD2 <40,42,46,47>
LPC_LAD3 <40,42,46,47>
LPC_LFRAME# <40,42,46,47>
LPC_LDRQ1# <46>
IRQ_SERIRQ <40,46,47>
PSATA_PRX_DTX_N0_C <34>
PSATA_PRX_DTX_P0_C <34>
PSATA_PTX_DRX_N0_C <34>
PSATA_PTX_DRX_P0_C <34>
SATA_PRX_DTX_N1_C <34>
SATA_PRX_DTX_P1_C <34>
SATA_PTX_DRX_N1_C <34>
SATA_PTX_DRX_P1_C <34>
SATA_NVRAM_PRX_DTX_N2_C <42>
SATA_NVRAM_PRX_DTX_P2_C <42>
SATA_NVRAM_PTX_DRX_N2_C <42>
SATA_NVRAM_PTX_DRX_P2_C <42>
SATA_ODD_PRX_DTX_N3_C <35>
SATA_ODD_PRX_DTX_P3_C <35>
SATA_ODD_PTX_DRX_N3_C <35>
SATA_ODD_PTX_DRX_P3_C <35>
ESATA_PRX_DTX_N4_C <38>
ESATA_PRX_DTX_P4_C <38>
ESATA_PTX_DRX_N4_C <38>
ESATA_PTX_DRX_P4_C <38>
SATA_PRX_DKTX_N5_C <44>
SATA_PRX_DKTX_P5_C <44>
SATA_PTX_DKRX_N5_C <44>
SATA_PTX_DKRX_P5_C <44>
1 2
1 2
1 2
SATA_ACT# <49>
1 2
RH290 0_0402_5%~DRH290 0_0402_5%~D
D
S
D
S
1 3
QH1
QH1
BSS138W-7-F_SOT323-3~D
BSS138W-7-F_SOT323-3~D
G
G
2
+3.3V_SPI
DELL CONFIDENTIAL/PROPRIETARY
1
2
GND1
XDP_FN16
4
OBSFN_C0
OBSFN_C1
OBSDATA_C0
OBSDATA_C1
OBSDATA_C2
OBSDATA_C3
OBSFN_D0
OBSFN_D1
OBSDATA_D0
OBSDATA_D1
OBSDATA_D2
OBSDATA_D3
ITPCLK/HOOK4
ITPCLK#/HOOK5
VCC_OBS_CD
RESET#/HOOK6
DBR#/HOOK7
GND3
GND5
GND7
GND9
GND11
GND13
GND15
TRST#
GND17
XDP_FN17
6
8
XDP_FN8
10
XDP_FN9
12
14
XDP_FN10
16
XDP_FN11
18
20
22
24
26
XDP_FN12
28
XDP_FN13
30
32
XDP_FN14
34
XDP_FN15
36
38
40
42
44
46
48
50
52
TD0
54
56
TDI
58
TMS
60
PCH_GPIO33
IRQ_SERIRQ
BBS_BIT0_R
HDD1_DET#
SPKR
RSMRST#_XDP
XDP_DBRESET#
PCH_JTAG_TDO
PCH_JTAG_TDI
PCH_JTAG_TMSPCH_JTAG_TCK
NoRebootStrap
SPKR
+3.3V_ALW_PCH
XDP_DBRESET# <7,19>
1 2
RH355100K_0402_5%~D RH355100K_0402_5%~D
1 2
RH288.2K_0402_5%~D RH288.2K_0402_5%~D
1 2
RH524.7K_0402_5%~D RH524.7K_0402_5%~D
1 2
RH3010K_0402_5%~D RH3010K_0402_5%~D
1 2
RH3510K_0402_5%~D @RH3510K_0402_5%~D @
Low=Default
High=NoReboot
+3.3V_RUN
+3.3V_RUN
HDD1
HDD2
NVRAM
ODD
E‐SATA
+1.05V_RUN
+1.05V_RUN
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
DOCK
HDD1_DET# <34>
HDD2_DET# <34>
SPI_PCH_CS1#
12
PCH_SPI_CS1#
RH3450_0402_5%~D RH3450_0402_5%~D
SPI_PCH_DO
12
PCH_SPI_DO
RH3460_0402_5%~D RH3460_0402_5%~D
SPI_PCH_DIN
12
PCH_SPI_DIN
RH3470_0402_5%~D RH3470_0402_5%~D
SPI_PCH_CLK
12
PCH_SPI_CLK
RH3480_0402_5%~D RH3480_0402_5%~D
SPI_PCH_CS0#
12
PCH_SPI_CS0#
RH3490_0402_5%~D RH3490_0402_5%~D
+3.3V_M
12
RH3500_0402_5%~D RH3500_0402_5%~D
HRS_FH12-16S-0P5SH(55)~D
HRS_FH12-16S-0P5SH(55)~D
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
PCH (1/8)
PCH (1/8)
PCH (1/8)
LA-7933
LA-7933
LA-7933
1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
CONN@
CONN@
17 65Monday, November 07, 2011
17 65Monday, November 07, 2011
17 65Monday, November 07, 2011
JSPI1
JSPI1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
G1
G2
0.2
0.2
0.2
of
of
of
5
D D
PCIE_PRX_WANTX_N1<41>
WWAN (Mini Card 1)--->
WLAN (Mini Card 2)--->
EXPRESS Card--->
PP (Mini Card 3)--->
NVRAM (Mini Card 4)--->
C C
10/100/1G LAN --->
MMI --->
WWAN (Mini Card 1)--->
10/100/1G LAN --->
MMI --->
B B
PP (Mini Card 3)--->
Express card--->
WLAN (Mini Card 2)--->
NVRAM (Mini Card 4)--->
A A
PCIEREQpowerrail:
PCIE_PRX_WANTX_P1<41>
PCIE_PTX_WANRX_N1<41>
PCIE_PTX_WANRX_P1<41>
PCIE_PRX_WLANTX_N2<41>
PCIE_PRX_WLANTX_P2<41>
PCIE_PTX_WLANRX_N2<41>
PCIE_PTX_WLANRX_P2<41>
PCIE_PRX_EXPTX_N3<45>
PCIE_PRX_EXPTX_P3<45>
PCIE_PTX_EXPRX_N3<45>
PCIE_PTX_EXPRX_P3<45>
PCIE_PRX_WPANTX_N5<42>
PCIE_PRX_WPANTX_P5<42>
PCIE_PTX_WPANRX_N5<42>
PCIE_PTX_WPANRX_P5<42>
PCIE_PRX_NVRTX_N6<42>
PCIE_PRX_NVRTX_P6<42>
PCIE_PTX_NVRRX_N6<42>
PCIE_PTX_NVRRX_P6<42>
PCIE_PRX_GLANTX_N7<36>
PCIE_PRX_GLANTX_P7<36>
PCIE_PTX_GLANRX_N7<36>
PCIE_PTX_GLANRX_P7<36>
PCIE_PRX_MMITX_N8<45>
PCIE_PRX_MMITX_P8<45>
PCIE_PTX_MMIRX_N8<45>
PCIE_PTX_MMIRX_P8<45>
CLK_PCIE_MINI1#<41>
CLK_PCIE_MINI1<41>
+3.3V_ALW_PCH
MINI1CLK_REQ#<41>
CLK_PCIE_LAN#<36>
CLK_PCIE_LAN<36>
LANCLK_REQ#<36>
CLK_PCIE_CARD#<45>
CLK_PCIE_CARD<45>
+3.3V_RUN
CARDCLK_REQ#<45>
CLK_PCIE_MINI3#<42>
CLK_PCIE_MINI3<42>
+3.3V_ALW_PCH
MINI3CLK_REQ#<42>
CLK_PCIE_EXP#<45>
CLK_PCIE_EXP<45>
+3.3V_ALW_PCH
EXPCLK_REQ#<45>
CLK_PCIE_MINI2#<41>
CLK_PCIE_MINI2<41>
+3.3V_ALW_PCH
MINI2CLK_REQ#<41>
+3.3V_ALW_PCH
+3.3V_ALW_PCH
CLK_PCIE_NVR#<42>
CLK_PCIE_NVR<42>
+3.3V_ALW_PCH
NVRCLK_REQ#<42>
CLK_CPU_ITP#<7>
CLK_CPU_ITP<7>
PCIE_PRX_WANTX_N1
PCIE_PRX_WANTX_P1
PCIE_PTX_WANRX_N1
PCIE_PTX_WANRX_P1
PCIE_PRX_WLANTX_N2
PCIE_PRX_WLANTX_P2
PCIE_PTX_WLANRX_N2
PCIE_PTX_WLANRX_P2
PCIE_PRX_EXPTX_N3
PCIE_PRX_EXPTX_P3
PCIE_PTX_EXPRX_N3
PCIE_PTX_EXPRX_P3
PCIE_PRX_WPANTX_N5
PCIE_PRX_WPANTX_P5
PCIE_PTX_WPANRX_N5
PCIE_PTX_WPANRX_P5
PCIE_PRX_NVRTX_N6
PCIE_PRX_NVRTX_P6
PCIE_PTX_NVRRX_N6
PCIE_PTX_NVRRX_P6
PCIE_PRX_GLANTX_N7
PCIE_PRX_GLANTX_P7
PCIE_PTX_GLANRX_N7
PCIE_PTX_GLANRX_P7
PCIE_PRX_MMITX_N8
PCIE_PRX_MMITX_P8
PCIE_PTX_MMIRX_N8
PCIE_PTX_MMIRX_P8
RH307 0_0402_5%~DRH307 0_0402_5%~D
RH308 0_0402_5%~DRH308 0_0402_5%~D
RH81 10K_0402_5%~DRH81 10K_0402_5%~D
RH82 0_0402_5%~DRH82 0_0402_5%~D
RH83 0_0402_5%~DRH83 0_0402_5%~D
RH85 0_0402_5%~DRH85 0_0402_5%~D
RH86 0_0402_5%~DRH86 0_0402_5%~D
RH87 10K_0402_5%~DRH87 10K_0402_5%~D
1 2
RH88 0_0402_5%~DRH88 0_0402_5%~D
RH90 0_0402_5%~DRH90 0_0402_5%~D
RH152 10K_0402_5%~DRH152 10K_0402_5%~D
RH92 0_0402_5%~DRH92 0_0402_5%~D
RH93 0_0402_5%~DRH93 0_0402_5%~D
RH94 10K_0402_5%~DRH94 10K_0402_5%~D
RH95 0_0402_5%~DRH95 0_0402_5%~D
RH96 0_0402_5%~DRH96 0_0402_5%~D
RH97 10K_0402_5%~DRH97 10K_0402_5%~D
RH98 10K_0402_5%~DRH98 10K_0402_5%~D
1 2
RH101 10K_0402_5%~DRH101 10K_0402_5%~D
1 2
RH310 0_0402_5%~DRH310 0_0402_5%~D
RH312 0_0402_5%~DRH312 0_0402_5%~D
RH106 10K_0402_5%~DRH106 10K_0402_5%~D
RH280 0_0402_5%~DRH280 0_0402_5%~D
RH281 0_0402_5%~DRH281 0_0402_5%~D
Suspend:034567
Core:12
5
4
MEM_SMBCLK
MEM_SMBDATA
BG34
BJ34
AV32
AU32
BE34
BF34
BB32
AY32
BG36
BJ36
AV34
AU34
BF36
BE36
AY34
BB34
BG37
BH37
AY36
BB36
BJ38
BG38
AU36
AV36
BG40
BJ40
AY40
BB40
BE38
BC38
AW38
AY38
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
4
PCIE_MINI1#
PCIE_MINI1
MINI1CLK_REQ#
PCIE_LAN#
PCIE_LAN
LANCLK_REQ#
PCIE_CARD#
PCIE_CARD
CARDCLK_REQ#
PCIE_MINI3#
PCIE_MINI3
MINI3CLK_REQ#
PCIE_EXP#
PCIE_EXP
EXPCLK_REQ#
PCIE_MINI2#
PCIE_MINI2
MINI2CLK_REQ#
PEG_B_CLKRQ#
PCIECLKRQ6#
PCIE_NVR#
PCIE_NVR
NVRCLK_REQ#
CLK_BCLK_ITP#
CLK_BCLK_ITP
AB49
AB47
AA48
AA47
AB42
AB40
AK14
AK13
+3.3V_RUN
6 1
5
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
UH4B
UH4B
PERN1
PERP1
PETN1
PETP1
PERN2
PERP2
PETN2
PETP2
PERN3
PERP3
PETN3
PETP3
PERN4
PERP4
PETN4
PETP4
PERN5
PERP5
PETN5
PETP5
PERN6
PERP6
PETN6
PETP6
PERN7
PERP7
PETN7
PETP7
PERN8
PERP8
PETN8
PETP8
Y40
CLKOUT_PCIE0N
Y39
CLKOUT_PCIE0P
J2
PCIECLKRQ0# / GPIO73
CLKOUT_PCIE1N
CLKOUT_PCIE1P
M1
PCIECLKRQ1# / GPIO18
CLKOUT_PCIE2N
CLKOUT_PCIE2P
V10
PCIECLKRQ2# / GPIO20
Y37
CLKOUT_PCIE3N
Y36
CLKOUT_PCIE3P
A8
PCIECLKRQ3# / GPIO25
Y43
CLKOUT_PCIE4N
Y45
CLKOUT_PCIE4P
L12
PCIECLKRQ4# / GPIO26
V45
CLKOUT_PCIE5N
V46
CLKOUT_PCIE5P
L14
PCIECLKRQ5# / GPIO44
CLKOUT_PEG_B_N
CLKOUT_PEG_B_P
E6
PEG_B_CLKRQ# / GPIO56
V40
CLKOUT_PCIE6N
V42
CLKOUT_PCIE6P
T13
PCIECLKRQ6# / GPIO45
V38
CLKOUT_PCIE7N
V37
CLKOUT_PCIE7P
K12
PCIECLKRQ7# / GPIO46
CLKOUT_ITPXDP_N
CLKOUT_ITPXDP_P
BD82PPSM-QNHN-A0_BGA989~D
BD82PPSM-QNHN-A0_BGA989~D
4
QH5B
QH5B
2
QH5A
QH5A
PCI-E*
PCI-E*
3
DDR_XDP_WAN_SMBCLK <12,13,14,15,17,34,41>
DDR_XDP_WAN_SMBDAT <12,13,14,15,17,34,41>
PCH_SMB_ALERT#
SMBCLK
SMBDATA
SML0CLK
SML0DATA
CL_CLK1
CL_DATA1
CL_RST1#
REFCLK14IN
XTAL25_IN
E12
H14
C9
A12
C8
G12
C13
E14
M16
M7
T11
P10
M10
AB37
AB38
AV22
AU22
AM12
AM13
BF18
BE18
BJ30
BG30
G24
E24
AK7
AK5
K45
H45
V47
V49
Y47
K43
F47
H47
K49
MEM_SMBCLK
MEM_SMBDATA
DDR_HVREF_RST_PCH
LAN_SMBCLK
LAN_SMBDATA
PCH_GPIO74
SML1_SMBCLK
SML1_SMBDATA
PCH_CL_CLK1
PCH_CL_DATA1
PCH_CL_RST1#
GFX_CLK_REQ#
CLK_PCIE_VGA#
CLK_PCIE_VGA
CLK_CPU_DMI#
CLK_CPU_DMI
CLK_BUF_DMI#
CLK_BUF_DMI
CLK_BUF_BCLK
CLK_BUF_BCLK
CLK_BUF_DOT96#
CLK_BUF_DOT96
CLK_BUF_CKSSCD#
CLK_BUF_CKSSCD
CLK_PCH_14M
CLK_PCI_LOOPBACK
XTAL25_IN
XTAL25_OUT
XCLK_RCOMP
PCI_TPM_TCM
SIO_14M
CLK_80H
JETWAY_14M
RH100 90.9_0402_1%~DRH100 90.9_0402_1%~D
RH311 22_0402_5%~DRH311 22_0402_5%~D
RH313 22_0402_5%~DRH313 22_0402_5%~D
RH314 22_0402_5%~DRH314 22_0402_5%~D
RH315 22_0402_5%~D@RH315 22_0402_5%~D@
SMBALERT# / GPIO11
SML0ALERT# / GPIO60
SMBUSController
SMBUSController
SML1ALERT# / PCHHOT# / GPIO74
CLOCKS
CLOCKS
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
SML1DATA / GPIO75
Link
Link
PEG_A_CLKRQ# / GPIO47
CLKIN_PCILOOPBACK
CLKOUTFLEX0 / GPIO64
CLKOUTFLEX1 / GPIO65
CLKOUTFLEX2 / GPIO66
CLKOUTFLEX3 / GPIO67
FLEX CLOCKS
FLEX CLOCKS
3
SML1CLK / GPIO58
CLKOUT_PEG_A_N
CLKOUT_PEG_A_P
CLKOUT_DMI_N
CLKOUT_DMI_P
CLKOUT_DP_N
CLKOUT_DP_P
CLKIN_DMI_N
CLKIN_DMI_P
CLKIN_GND1_N
CLKIN_GND1_P
CLKIN_DOT_96N
CLKIN_DOT_96P
CLKIN_SATA_N
CLKIN_SATA_P
XTAL25_OUT
XCLK_RCOMP
2
DDR_HVREF_RST_PCH <7>
LAN_SMBCLK <36>
LAN_SMBDATA <36>
SML1_SMBCLK <47>
SML1_SMBDATA <47>
PCH_CL_CLK1 <41>
PCH_CL_DATA1 <41>
PCH_CL_RST1# <41>
CLK_PCIE_VGA# <16>
CLK_PCIE_VGA <16>
CLK_CPU_DMI# <7>
CLK_CPU_DMI <7>
CLK_PCI_LOOPBACK <20>
1 2
12
12
12
12
2
+3.3V_ALW_PCH
RUN_GFX_ON<46,50>
CLOCKTERMINATIONforFCIMandneedclosetoPCH
+1.05V_RUN
CLK_PCI_TPM_TCM <40>
CLK_SIO_14M <46>
PCLK_80H <42>
JETWAY_CLK14M <40>
DELL CONFIDENTIAL/PROPRIETARY
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
1
SML1_SMBCLK
SML1_SMBDATA
DDR_HVREF_RST_PCH
PCH_GPIO74
MEM_SMBCLK
MEM_SMBDATA
PCH_SMB_ALERT#
LAN_SMBCLK
LAN_SMBDATA
RH80
RH80
10K_0402_5%~D
10K_0402_5%~D
CLK_BUF_DMI#
CLK_BUF_DMI
CLK_BUF_BCLK
CLK_BUF_DOT96#
CLK_BUF_DOT96
CLK_BUF_CKSSCD#
CLK_BUF_CKSSCD
CLK_PCH_14M
12
RH99
RH99
1M_0402_5%~D
1M_0402_5%~D
25MHZ_10PF_Q22FA2380049900~D
25MHZ_10PF_Q22FA2380049900~D
10P_0402_50V8J~D
10P_0402_50V8J~D
2
CH18
CH18
1
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
1 2
1 2
1 2
1 2
1 2
1 2
1 2
12
13
D
D
2
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
G
G
S
S
1 2
RH74 10K_0402_5%~DRH74 10K_0402_5%~D
1 2
RH75 10K_0402_5%~DRH75 10K_0402_5%~D
1 2
RH91 10K_0402_5%~DRH91 10K_0402_5%~D
1 2
RH76 10K_0402_5%~DRH76 10K_0402_5%~D
1 2
RH77 10K_0402_5%~DRH77 10K_0402_5%~D
1 2
RH78 10K_0402_5%~DRH78 10K_0402_5%~D
1 2
RH79 10K_0402_5%~DRH79 10K_0402_5%~D
1 2
RH183 10K_0402_5%~DRH183 10K_0402_5%~D
RH309 0_0402_5%~DRH309 0_0402_5%~D
YH2
YH2
3
OUT
4
GND
GND
PCH (2/8)
PCH (2/8)
PCH (2/8)
LA-7933
LA-7933
LA-7933
1
12
RH2982.2K_0402_5%~D RH2982.2K_0402_5%~D
12
RH2992.2K_0402_5%~D RH2992.2K_0402_5%~D
RH3001K_0402_1%~D RH3001K_0402_1%~D
RH30110K_0402_5%~D RH30110K_0402_5%~D
RH3022.2K_0402_5%~D RH3022.2K_0402_5%~D
RH3032.2K_0402_5%~D RH3032.2K_0402_5%~D
RH30410K_0402_5%~D RH30410K_0402_5%~D
RH3052.2K_0402_5%~D RH3052.2K_0402_5%~D
RH3062.2K_0402_5%~D RH3062.2K_0402_5%~D
GFX_CLK_REQ#
QH2
QH2
12
1
IN
2
+3.3V_ALW_PCH
+3.3V_LAN
Crystal EA.
10P_0402_50V8J~D
10P_0402_50V8J~D
2
CH19
CH19
1
18 65Monday, November 07, 2011
18 65Monday, November 07, 2011
18 65Monday, November 07, 2011
of
of
of
0.2
0.2
0.2
5
+3.3V_ALW_PCH
1 2
RH318 10K_0402_5%~D@RH318 10K_0402_5%~D@
1 2
RH144 10K_0402_5%~DRH144 10K_0402_5%~D
1 2
RH142 10K_0402_5%~DRH142 10K_0402_5%~D
1 2
D D
RH319 10K_0402_5%~D@RH319 10K_0402_5%~D@
1 2
RH140 10K_0402_5%~DRH140 10K_0402_5%~D
+3.3V_RUN
1 2
RH137 8.2K_0402_5%~DRH137 8.2K_0402_5%~D
1 2
RH138 8.2K_0402_5%~D@RH138 8.2K_0402_5%~D@
SUS_STAT#/LPCPD#
ME_SUS_PWR_ACK
PCH_PCIE_WAKE#
SIO_SLP_LAN#
PCH_RI# PCH_CRT_DDC_CLK
CLKRUN#
ME_RESET#
XDP_DBRESET#<7,17>
4
RH359 0_0402_5%~DRH359 0_0402_5%~D
1 2
+3.3V_RUN
1
ME_RESET#
RH141 8.2K_0402_5%~D@RH141 8.2K_0402_5%~D@
12
PCH_DPWROK PCH_RSMRST#_R
2
1 2
RH113 0_0402_5%~DRH113 0_0402_5%~D
1 2
RH321 0_0402_5%~D@ RH321 0_0402_5%~D@
CH99
@CH99
@
1 2
5
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
P
B
4
O
A
G
UC3
@UC3
@
74AHC1G09GW_TSSOP5~D
74AHC1G09GW_TSSOP5~D
3
SYS_PWROKRESET_OUT#
SYS_RESET#
3
+RTC_CELL
330K_0402_1%~D
330K_0402_1%~D
RH127
RH127
DSWODVREN‐OnDieDSWVREnable
Enabled(DEFAULT)
330K_0402_1%~D
330K_0402_1%~D
@RH129
@
RH129
1 2
DSWODVREN
1 2
HIGH:RH127STUFFED,
RH129UNSTUFFED
Disabled
LOW:RH129STUFFED,
RH127UNSTUFFED
2
MAX14885EETLhasinternal3KPUfor
PCH_CRT_DDC_CLKandPCH_CRT_DDC_DAT
PCH_CRT_DDC_DAT
1 2
12
1
+3.3V_RUN
RH3172.2K_0402_5%~D @RH3172.2K_0402_5%~D @
RH3162.2K_0402_5%~D @RH3162.2K_0402_5%~D @
ME_SUS_PWR_ACK_R SUSACK#_R
UH4C
UH4C
BC24
DMI0RXN
BE20
DMI1RXN
BG18
DMI2RXN
BG20
DMI3RXN
BE24
DMI0RXP
BC20
DMI1RXP
BJ18
DMI2RXP
BJ20
DMI3RXP
AW24
DMI0TXN
AW20
DMI1TXN
BB18
DMI2TXN
AV18
DMI3TXN
AY24
DMI0TXP
AY20
DMI1TXP
AY18
DMI2TXP
AU18
DMI3TXP
BJ24
DMI_ZCOMP
BG25
DMI_IRCOMP
BH21
DMI2RBIAS
C12
SUSACK#
K3
SYS_RESET#
P12
SYS_PWROK
L22
PWROK
L10
APWROK
B13
DRAMPWROK
C21
RSMRST#
K16
SUSWARN#/SUSPWRDNACK/GPIO30
E20
PWRBTN#
H20
ACPRESENT / GPIO31
E10
BATLOW# / GPIO72
A10
RI#
BD82PPSM-QNHN-A0_BGA989~D
BD82PPSM-QNHN-A0_BGA989~D
4
+3.3V_ALW2
5
P
B
O
A
G
TC7SH08FU_SSOP5~D
TC7SH08FU_SSOP5~D
3
1 2
DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3
DMI_CTX_PRX_P0
DMI_CTX_PRX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_P3
DMI_CRX_PTX_N0
DMI_CRX_PTX_N1
DMI_CRX_PTX_N2
DMI_CRX_PTX_N3
DMI_CRX_PTX_P0
DMI_CRX_PTX_P1
DMI_CRX_PTX_P2
DMI_CRX_PTX_P3
DMI_COMP_R
RBIAS_CPY
SUSACK#_R
SYS_RESET#
SYS_PWROK_R
PCH_PWROK
PM_APWROK_R
PM_DRAM_PWRGD_R
PCH_RSMRST#_R
ME_SUS_PWR_ACK_R
SIO_PWRBTN#_R
AC_PRESENT
PCH_BATLOW#
PCH_RI#
CH100
CH100
1 2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
PM_APWROK_R
4
UC4
UC4
DMI_CTX_PRX_N0<6>
DMI_CTX_PRX_N1<6>
DMI_CTX_PRX_N2<6>
DMI_CTX_PRX_N3<6>
DMI_CTX_PRX_P0<6>
DMI_CTX_PRX_P1<6>
DMI_CTX_PRX_P2<6>
C C
SUSACK#<46> PCH_DPWROK <46>
PM_DRAM_PWRGD<7>
PCH_RSMRST#_Q<17,48>
ME_SUS_PWR_ACK<47>
SIO_PWRBTN#_R<7,17>
SIO_PWRBTN#<47>
PM_APWROK<47>
SYS_PWROK<7,46>
RESET_OUT#<47>
AC_PRESENT<47>
+3.3V_ALW_PCH
B B
A A
DMI_CTX_PRX_P3<6>
DMI_CRX_PTX_N0<6>
DMI_CRX_PTX_N1<6>
DMI_CRX_PTX_N2<6>
DMI_CRX_PTX_N3<6>
DMI_CRX_PTX_P0<6>
DMI_CRX_PTX_P1<6>
DMI_CRX_PTX_P2<6>
DMI_CRX_PTX_P3<6>
+1.05V_RUN
1 2
RH111 49.9_0402_1%~DRH111 49.9_0402_1%~D
1 2
RH112 750_0402_1%~DRH112 750_0402_1%~D
1 2
RH114 0_0402_5%~D@RH114 0_0402_5%~D@
1 2
RH116 0_0402_5%~DRH116 0_0402_5%~D
1 2
RH117 0_0402_5%~DRH117 0_0402_5%~D
1 2
RH320 0_0402_5%~DRH320 0_0402_5%~D
1 2
RH120 0_0402_5%~DRH120 0_0402_5%~D
1 2
RH121 0_0402_5%~DRH121 0_0402_5%~D
1 2
RH122 0_0402_5%~DRH122 0_0402_5%~D
1 2
RH139 8.2K_0402_5%~DRH139 8.2K_0402_5%~D
SIO_SLP_A#
1
2
RH118 0_0402_5%~D@ RH118 0_0402_5%~D@
5
1 2
RH323 0_0402_5%~DRH323 0_0402_5%~D
FDI_CTX_PRX_N0
BJ14
FDI_RXN0
FDI_RXN1
FDI_RXN2
FDI_RXN3
FDI_RXN4
FDI_RXN5
FDI_RXN6
FDI_RXN7
FDI_RXP0
FDI_RXP1
FDI_RXP2
FDI_RXP3
FDI_RXP4
FDI_RXP5
FDI_RXP6
DMI
DMI
System Power Management
System Power Management
FDI_RXP7
FDI
FDI
FDI_INT
FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1
DSWVRMEN
DPWROK
WAKE#
CLKRUN# / GPIO32
SUS_STAT# / GPIO61
SUSCLK / GPIO62
SLP_S5# / GPIO63
SLP_S4#
SLP_S3#
SLP_A#
SLP_SUS#
PMSYNCH
SLP_LAN# / GPIO29
AY14
BE14
BH13
BC12
BJ12
BG10
BG9
BG14
BB14
BF14
BG13
BE12
BG12
BJ10
BH9
AW16
AV12
BC10
AV14
BB10
A18
E22
B9
N3
G8
N14
D10
H4
F4
G10
G16
AP14
K14
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N5
FDI_CTX_PRX_N6
FDI_CTX_PRX_N7
FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P4
FDI_CTX_PRX_P5
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7
FDI_INT
FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1
DSWODVREN
PCH_DPWROK
PCH_PCIE_WAKE#
CLKRUN#
SUS_STAT#/LPCPD#
SUSCLK
SIO_SLP_S5#
SIO_SLP_S4#
SIO_SLP_S3#
SIO_SLP_A#
SIO_SLP_SUS#
H_PM_SYNC
SIO_SLP_LAN#
FDI_CTX_PRX_N0 <6>
FDI_CTX_PRX_N1 <6>
FDI_CTX_PRX_N2 <6>
FDI_CTX_PRX_N3 <6>
FDI_CTX_PRX_N4 <6>
FDI_CTX_PRX_N5 <6>
FDI_CTX_PRX_N6 <6>
FDI_CTX_PRX_N7 <6>
FDI_CTX_PRX_P0 <6>
FDI_CTX_PRX_P1 <6>
FDI_CTX_PRX_P2 <6>
FDI_CTX_PRX_P3 <6>
FDI_CTX_PRX_P4 <6>
FDI_CTX_PRX_P5 <6>
FDI_CTX_PRX_P6 <6>
FDI_CTX_PRX_P7 <6>
FDI_INT <6>
FDI_FSYNC0 <6>
FDI_FSYNC1 <6>
FDI_LSYNC0 <6>
FDI_LSYNC1 <6>
PCH_PCIE_WAKE# <47>
CLKRUN# <40,46,47>
T56 PAD~D@ T56 PAD~D@
T57 PAD~D@ T57 PAD~D@
T58 PAD~D@ T58 PAD~D@
SIO_SLP_S5# <47>
T59 PAD~D@ T59 PAD~D@
SIO_SLP_S4# <46,50,53>
SIO_SLP_S3# <11,34,45,46,50,54>
SIO_SLP_A# <46,50,55>
T62 PAD~D@ T62 PAD~D@
SIO_SLP_SUS# <46>
T63 PAD~D@ T63 PAD~D@
H_PM_SYNC <7>
SIO_SLP_LAN# <36,46>
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
PCH_CRT_HSYNC<31>
PCH_CRT_VSYNC<31>
1 2
RH131 150_0402_1%~DRH131 150_0402_1%~D
1 2
RH132 150_0402_1%~DRH132 150_0402_1%~D
1 2
RH133 150_0402_1%~DRH133 150_0402_1%~D
1 2
RH134 100K_0402_5%~DRH134 100K_0402_5%~D
PANEL_BKEN_PCH<28>
ENVDD_PCH<28,46>
BIA_PWM_PCH<28>
LDDC_CLK_PCH<27>
LDDC_DATA_PCH<27>
Minimumspeacingof20milsforLVD_IBG
PCH_CRT_BLU
PCH_CRT_GRN
PCH_CRT_RED
ENVDD_PCH
RH344 2.37K_0402_1%~DRH344 2.37K_0402_1%~D
LCD_ACLK-_PCH<27>
LCD_ACLK+_PCH<27>
LCD_A0-_PCH<27>
LCD_A1-_PCH<27>
LCD_A2-_PCH<27>
LCD_A0+_PCH<27>
LCD_A1+_PCH<27>
LCD_A2+_PCH<27>
LCD_BCLK-_PCH<27>
LCD_BCLK+_PCH<27>
LCD_B0-_PCH<27>
LCD_B1-_PCH<27>
LCD_B2-_PCH<27>
LCD_B0+_PCH<27>
LCD_B1+_PCH<27>
LCD_B2+_PCH<27>
PCH_CRT_BLU<31>
PCH_CRT_GRN<31>
PCH_CRT_RED<31>
PCH_CRT_DDC_CLK<31>
PCH_CRT_DDC_DAT<31>
RH123 20_0402_1%~DRH123 20_0402_1%~D
RH124 20_0402_1%~DRH124 20_0402_1%~D
1 2
1 2
1 2
PANEL_BKEN_PCH
ENVDD_PCH
BIA_PWM_PCH
LDDC_CLK_PCH
LDDC_DATA_PCH
LVD_IBG
LCD_ACLK-_PCH
LCD_ACLK+_PCH
LCD_A0-_PCH
LCD_A1-_PCH
LCD_A2-_PCH
LCD_A0+_PCH
LCD_A1+_PCH
LCD_A2+_PCH
LCD_BCLK-_PCH
LCD_BCLK+_PCH
LCD_B0-_PCH
LCD_B1-_PCH
LCD_B2-_PCH
LCD_B0+_PCH
LCD_B1+_PCH
LCD_B2+_PCH
PCH_CRT_BLU
PCH_CRT_GRN
PCH_CRT_RED
PCH_CRT_DDC_CLK
PCH_CRT_DDC_DAT
CRT_IREF
1K_0402_0.5%~D
1K_0402_0.5%~D
12
RH126
RH126
2
HSYNC
VSYNC
UH4D
UH4D
J47
L_BKLTEN
M45
L_VDD_EN
P45
L_BKLTCTL
T40
L_DDC_CLK
K47
L_DDC_DATA
T45
L_CTRL_CLK
P39
L_CTRL_DATA
AF37
LVD_IBG
AF36
LVD_VBG
AE48
LVD_VREFH
AE47
LVD_VREFL
AK39
LVDSA_CLK#
AK40
LVDSA_CLK
AN48
LVDSA_DATA#0
AM47
LVDSA_DATA#1
AK47
LVDSA_DATA#2
AJ48
LVDSA_DATA#3
AN47
LVDSA_DATA0
AM49
LVDSA_DATA1
AK49
LVDSA_DATA2
AJ47
LVDSA_DATA3
AF40
LVDSB_CLK#
AF39
LVDSB_CLK
AH45
LVDSB_DATA#0
AH47
LVDSB_DATA#1
AF49
LVDSB_DATA#2
AF45
LVDSB_DATA#3
AH43
LVDSB_DATA0
AH49
LVDSB_DATA1
AF47
LVDSB_DATA2
AF43
LVDSB_DATA3
N48
CRT_BLUE
P49
CRT_GREEN
T49
CRT_RED
T39
CRT_DDC_CLK
M40
CRT_DDC_DATA
M47
CRT_HSYNC
M49
CRT_VSYNC
T43
DAC_IREF
T42
CRT_IRTN
BD82PPSM-QNHN-A0_BGA989~D
BD82PPSM-QNHN-A0_BGA989~D
LVDS
LVDS
CRT
CRT
SDVO_TVCLKINN
SDVO_TVCLKINP
SDVO_STALLN
SDVO_STALLP
SDVO_INTN
SDVO_INTP
SDVO_CTRLCLK
SDVO_CTRLDATA
DDPB_AUXN
DDPB_AUXP
DDPB_HPD
DDPB_0N
DDPB_0P
DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P
DDPC_CTRLCLK
DDPC_CTRLDATA
DDPC_AUXN
DDPC_AUXP
DDPC_HPD
DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P
Digital Display Interface
Digital Display Interface
DDPD_CTRLCLK
DDPD_CTRLDATA
DDPD_AUXN
DDPD_AUXP
DDPD_HPD
DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
PCH (3/8)
PCH (3/8)
PCH (3/8)
LA-7933
LA-7933
LA-7933
1
AP43
AP45
AM42
AM40
AP39
AP40
P38
M39
AT49
AT47
AT40
AV42
AV40
AV45
AV46
AU48
AU47
AV47
AV49
P46
P42
AP47
AP49
AT38
AY47
AY49
AY43
AY45
BA47
BA48
BB47
BB49
M43
M36
AT45
AT43
BH41
BB43
BB45
BF44
BE44
BF42
BE42
BJ42
BG42
0.2
0.2
19 65Monday, November 07, 2011
19 65Monday, November 07, 2011
19 65Monday, November 07, 2011
0.2
of
of
of
5
+3.3V_RUN
D D
C C
1K_0402_1%~D
1K_0402_1%~D
12
1 2
RH324 8.2K_0402_5%~DRH324 8.2K_0402_5%~D
1 2
RH325 8.2K_0402_5%~DRH325 8.2K_0402_5%~D
1 2
RH326 8.2K_0402_5%~DRH326 8.2K_0402_5%~D
1 2
RH329 8.2K_0402_5%~DRH329 8.2K_0402_5%~D
1 2
RH327 10K_0402_5%~DRH327 10K_0402_5%~D
1 2
RH330 10K_0402_5%~DRH330 10K_0402_5%~D
1 2
RH328 10K_0402_5%~DRH328 10K_0402_5%~D
1 2
RH332 10K_0402_5%~DRH332 10K_0402_5%~D
1 2
RH331 10K_0402_5%~DRH331 10K_0402_5%~D
1 2
RH340 10K_0402_5%~DRH340 10K_0402_5%~D
PCI_GNT3#
@RH333
@
RH333
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
PCI_REQ1#
LCD_CBL_DET#
PCH_GPIO54
PCH_GPIO3
CAM_MIC_CBL_DET#
PCH_GPIO52
A16swapoverrideStrap/Top‐Block
SwapOverridejumper
PCI_GNT#3
B B
Low=A16swap
High=Default
PLTRST_GPU#<16>
PLTRST_USH#<40>
PLTRST_MMI#<45>
PLTRST_XDP#<7>
PLTRST_LAN#<36>
RH343 0_0402_5%~DRH343 0_0402_5%~D
1 2
RH335 0_0402_5%~DRH335 0_0402_5%~D
1 2
RH336 0_0402_5%~DRH336 0_0402_5%~D
1 2
RH337 0_0402_5%~DRH337 0_0402_5%~D
1 2
RH338 0_0402_5%~DRH338 0_0402_5%~D
1 2
CLK_PCI_5048<46>
CLK_PCI_MEC<47>
CLK_PCI_DOCK<44>
CLK_PCI_LOOPBACK<18>
AvoidWWANnoiseaffectPCI3,3MCLK.
CLK_PCI_5048
CLK_PCI_MEC
CLK_PCI_DOCK
12P_0402_50V8J~D
12P_0402_50V8J~D
12P_0402_50V8J~D
12P_0402_50V8J~D
2
2
@
@
@
@
CH23
CH23
CH22
CH22
1
1
A A
5
12P_0402_50V8J~D
12P_0402_50V8J~D
2
1
PCH_PLTRST#<7,17>
CLK_PCI_LOOPBACK
12P_0402_50V8J~D
12P_0402_50V8J~D
2
@
@
CH21
CH21
1
@
@
CH20
CH20
RFrequest
+3.3V_RUN
1
B
2
A
5
P
G
3
CH102
CH102
1 2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
4
O
UH3
UH3
TC7SH08FU_SSOP5~D
TC7SH08FU_SSOP5~D
4
USB3RN1<39>
USB3RN2<39>
USB3RN4<44>
USB3RP1<39>
USB3RP2<39>
USB3RP4<44>
USB3TN1<39>
USB3TN2<39>
USB3TN4<44>
USB3TP1<39>
USB3TP2<39>
USB3TP4<44>
LCD_CBL_DET#<28>
CAM_MIC_CBL_DET#<28>
HDD_FALL_INT<34>
RH160 22_0402_5%~DRH160 22_0402_5%~D
RH102 22_0402_5%~DRH102 22_0402_5%~D
RH103 22_0402_5%~DRH103 22_0402_5%~D
RH105 22_0402_5%~DRH105 22_0402_5%~D
PCH_PLTRST#_EC <40,41,42,45,46,47>
4
1 2
RH334 0_0402_5%~DRH334 0_0402_5%~D
12
12
12
12
3
UH4E
UH4E
BG26
TP1
BJ26
TP2
BH25
TP3
BJ16
TP4
BG16
TP5
AH38
TP6
AH37
TP7
AK43
TP8
AK45
TP9
C18
TP10
N30
TP11
H3
TP12
AH12
TP13
AM4
TP14
AM5
TP15
Y13
TP16
K24
TP17
L24
TP18
AB46
TP19
AB45
TP20
B21
TP21
M20
TP22
AY16
TP23
BG46
TP24
BE28
USB3Rn1
BC30
USB3Rn2
BE32
USB3Rn3
BJ32
USB3Rn4
BC28
USB3Rp1
BE30
USB3Rp2
BF32
USB3Rp3
BG32
USB3Rp4
AV26
USB3Tn1
BB26
USB3Tn2
AU28
USB3Tn3
AY30
USB3Tn4
AU26
USB3TP1
AY26
USB3Tp2
AV28
USB3Tp3
AW30
USB3Tp4
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
PCI_REQ1#
PCH_GPIO52
PCH_GPIO54
BBS_BIT1
PCI_GNT3#
LCD_CBL_DET#
PCH_GPIO3
CAM_MIC_CBL_DET# USB_OC2#
FFS_PCH_INT
T104PAD~D @T104PAD~D @
PCH_PLTRST#
PCI_5048
PCI_MEC
PCI_DOCK
PCI_LOOPBACKOUT
K40
PIRQA#
K38
PIRQB#
H38
PIRQC#
G38
PIRQD#
C46
REQ1# / GPIO50
C44
REQ2# / GPIO52
E40
REQ3# / GPIO54
D47
GNT1# / GPIO51
E42
GNT2# / GPIO53
F46
GNT3# / GPIO55
G42
PIRQE# / GPIO2
G40
PIRQF# / GPIO3
C42
PIRQG# / GPIO4
D44
PIRQH# / GPIO5
K10
PME#
C6
PLTRST#
H49
CLKOUT_PCI0
H43
CLKOUT_PCI1
J48
CLKOUT_PCI2
K42
CLKOUT_PCI3
H40
CLKOUT_PCI4
BD82PPSM-QNHN-A0_BGA989~D
BD82PPSM-QNHN-A0_BGA989~D
RSVD
RSVD
USB30
USB30
PCI
PCI
USB
USB
OC0# / GPIO59
OC1# / GPIO40
OC2# / GPIO41
OC3# / GPIO42
OC4# / GPIO43
OC5# / GPIO9
OC6# / GPIO10
OC7# / GPIO14
RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
RSVD6
RSVD7
RSVD8
RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
RSVD17
RSVD18
RSVD19
RSVD20
RSVD21
RSVD22
RSVD23
RSVD24
RSVD25
RSVD26
RSVD27
RSVD28
RSVD29
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P
USBRBIAS#
USBRBIAS
AY7
AV7
AU3
BG4
AT10
BC8
AU2
AT4
AT3
AT1
AY3
AT5
AV3
AV1
BB1
BA3
BB5
BB3
BB7
BE8
BD4
BF6
AV5
AV10
AT8
AY5
BA2
AT12
BF3
USBP0-
C24
USBP0+
A24
USBP1-
C25
USBP1+
B25
USBP2-
C26
USBP2+
A26
USBP3-
K28
USBP3+
H28
USBP4-
E28
USBP4+
D28
USBP5-
C28
USBP5+
A28
USBP6-
C29
USBP6+
B29
USBP7-
N28
USBP7+
M28
USBP8-
L30
USBP8+
K30
USBP9-
G30
USBP9+
E30
USBP10-
C30
USBP10+
A30
USBP11-
L32
USBP11+
K32
USBP12-
G32
USBP12+
E32
USBP13-
C32
USBP13+
A32
USBRBIAS
C33
B33
A14
K20
B17
C16
L16
A16
D14
C14
USB_OC0#_R
USB_OC1#_R
USB_OC2#
USB_OC3#
USB_OC4#_R
USB_OC5#
USB_OC6#
1 2
Route single-end 50-ohms and max 500-mils length.
Minimum spacing to other signals: 15 mils
RH339 0_0402_5%~DRH339 0_0402_5%~D
RH341 0_0402_5%~DRH341 0_0402_5%~D
RH356 0_0402_5%~DRH356 0_0402_5%~D
SIO_EXT_SMI#
USBP0- <39>
USBP0+ <39>
USBP1- <39>
USBP1+ <39>
USBP2- <45>
USBP2+ <45>
USBP3- <44>
USBP3+ <44>
USBP4- <41>
USBP4+ <41>
USBP5- <41>
USBP5+ <41>
USBP6- <45>
USBP6+ <45>
USBP7- <40>
USBP7+ <40>
USBP8- <44>
USBP8+ <44>
USBP9- <38>
USBP9+ <38>
USBP10- <45>
USBP10+ <45>
USBP11- <48>
USBP11+ <48>
USBP12- <28>
USBP12+ <28>
USBP13- <28>
USBP13+ <28>
RH15122.6_0402_1%~D RH15122.6_0402_1%~D
1 2
1 2
1 2
2
----->Right Side
----->Right Side
----->Left Side
----->MLK DOCK
----->WLAN/WIMAX
----->WWAN/UWB
----->Left Side
----->USH
----->DOCK
----->ESATA
----->Express Card
----->Blue Tooth
----->Camera
----->LCD Touch
USB_OC0# <39>
USB_OC1# <45>
USB_OC2# <17>
USB_OC3# <17,45>
USB_OC4# <38>
USB_OC5# <17>
USB_OC6# <17>
SIO_EXT_SMI# <17,47>
USB_OC0#_R <17>
USB_OC1#_R <17>
USB_OC4#_R <17>
USB_OC0#_R
USB_OC1#_R
USB_OC3#
USB_OC4#_R
USB_OC5#
USB_OC6#
SIO_EXT_SMI#
BootBIOSStrap
BBS_BIT1 BootBIOSLocation
*
SATA_SLPD
(BBS_BIT0)
00 LPC
0 1 Reserved(NAND)
1 0 PCI
11 SPI
BBS_BIT1
12
RH342
@RH342
@
1K_0402_1%~D
1K_0402_1%~D
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
1
RPH1
RPH1
4 5
3 6
2 7
1 8
10K_1206_8P4R_5%~D
10K_1206_8P4R_5%~D
RPH2
RPH2
4 5
3 6
2 7
1 8
10K_1206_8P4R_5%~D
10K_1206_8P4R_5%~D
PCH (4/8)
PCH (4/8)
PCH (4/8)
LA-7933
LA-7933
LA-7933
1
+3.3V_ALW_PCH
20 65Monday, November 07, 2011
20 65Monday, November 07, 2011
20 65Monday, November 07, 2011
of
of
of
0.2
0.2
0.2
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