Page 1
A
B
C
D
E
1 1
2 2
COMPALCONFIDENTIAL
MODELNAME:
PCBNO:
LA‐7933P
BOMP/N:
GPIOMAP:
QAR10
4319FV31L01
E4VCGPIOmaprev1.1
Vans17
REV:0.2(X01)
2011.11.11
@:NopopComponent
CONN@:ConnectorComponent
PXDP@:PCHXDPComponent
3 3
MBType
TPMEN/TCMDIS
TPMDIS/TCMEN
TPMDIS/TCMDIS
4 4
BOMP/N
1@
2@
2@
3@
3@
4@
DELL CONFIDENTIAL/PROPRIETARY
MB PCB
MB PCB
PartNumber
PartNumber
DAA00002U00
DAA00002U00
Description
Description
PCB0MFLA‐7933PREV0MB
PCB0MFLA‐7933PREV0MB
A
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
B
C
D
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Cover Sheet
Cover Sheet
Cover Sheet
LA-7933
LA-7933
LA-7933
165Friday, November 11, 2011
165Friday, November 11, 2011
165Friday, November 11, 2011
E
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B
C
D
E
EDPPanel
Conn
P.30
PEGx16Gen3
LVDSPanel
Conn
1 1
P.28
DP1.2
Conn
P.29
CRTConn
P.31
HDMI1.4a
Conn
P.33
2 2
IntelLewisville
82579LM
LANswitch
PI3L720ZHEX
DockingLAN
IEEE1394
+
3 3
Cardreader
RJ45
SDXC1394
OnI/Oboard
LVDSMUX
TS3DV20812R
DockingRGB
DP/HDMIMUX
DockingDPPort1 DockingDPPort2
P.36
P.36
P.37
P.27
DPRedriver
PS8330B
P.29
CRTswitch
MAX14885
P.31
PS8336B
P.33
PCIE/SATAMUX
PI2DBS212
P.42 P.42
MiniCard‐4
FlashCard
P.42
LVDS(DIS)
LVDS
DP(DIS)
CRT(DIS)
CRT
DP(DIS)
ExpressCard
P.43
OnI/Oboard
DP
MiniCard‐3
PP
SMSCSIO
ECE5048
DP_D
LVDS
DP_A
MXMConn.
CRT
TYPEB
DP_C
DP_B
PCIEBUS
MiniCard‐2
WLAN/WiGi
P.41
USBPort4 USBPort5USBPort10
BCBUS
P.46
P.16
MiniCard‐1
WWAN
ChinaTCM1.2
SSX44B
DiscreteTPM
AT97SC3204
SMSCKBC
Port1Port2Port5Port3Port6Port7Port8 SATAPort2
P.41
P.40
P.40
MEC5055
SIMCard
P.41
FreeFallSensor
LNG3DMTR
CurrentMonitor
4 4
EMC1701
P.34
P.26
Thermal
GUARDIANIII
EMC4002
P.25
A
SATAPort5
USB2.0Port8
DAI
RGB
LAN
USB3.0Port3
LPC
DockingDP
DockingDP
TPCONN KBCONN
OnI/Oboard
E‐Dock
P.44
B
Intel
IvyBridge
Processorr
rPGA989Socket
35WDualCore
45WQuadCore
55WQCExtremeEdition
FDIx8 DMIx4gen2
LVDS
Intel
CRT
PantherPoint
PCH
BGA989Balls
SPI
LPCBUS
P.47
P.48
C
(DDRIII) Memory Bus
1.5V DDRIII 1333 /1600 /1866MHz (Overclocking)
SATA3.0Repeater
PS8520B
P.6~11
SATAPort0
SATAPort1
SATAPort3
SATA3.0
SATA2.0
USB3.0
USB2.0
HDAudio
P.17~24
W25X64ZE
P.17
64M 4K sector
W25Q32BV
P.17
32M 4K sector
AudioCodec
92HD93
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
D
SATAPort4
USBPort0
USBPort1
USB3.0Repeater
USB3.0Repeater
USBPort2
USBPort6
USBPort11
USBPort12
USBPort13
USBPort7
HeadPhoneJack
ArrayMICJack
Int.Speaker
PS8710B
PS8710B
USB2.0Conn
LeftSide
USB2.0Conn
LeftSide
DigitalCamera
OnI/Oboard
DDRIII‐DIMMX4
P.12~15BANK0,1,2,3,4,5,6,7
1stHDDConn.
P.34
2ndHDDConn.
ODDConn.
USB/eSATAConn.
USBPort9
USB3.0Conn
RightSide
P.39
USB3.0Conn
RightSide
P.39 P.39
BT4.0+LE
Touchscreen
BRCM5882
TPM1.2
P.48
P.28
P.28
USBCharger
OnI/Oboard
TDA8034HN
SmartCard
FP_USB
Fingerprint
CONN
OnUSHmodule
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
Block Diagram
Block Diagram
Block Diagram
LA-7933
LA-7933
LA-7933
E
RFID
P.39
P.34
P.34
P.35
P.38
265Monday, November 07, 2011
265Monday, November 07, 2011
265Monday, November 07, 2011
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POWER STATES
State
S0 (Full ON) / M0
D D
S3 (Suspend to RAM) / M1
S4 (Suspend to DISK) / M1 ON ON OFF
S5 (SOFT OFF) / M1 ON ON OFFLOW LOW HIGHLOW
S3 (Suspend to RAM) / M-OFF
S4 (Suspend to DISK) / M-OFF
S5 (SOFT OFF) / M-OFF
Signal
SLP
SLP
S3#
S4#
HIGH HIGH HIGH
HIGH
LOW HIGH HIGH HIGH ON ON ON OFF
LOW
LOW HIGH HIGHLOW
LOW
LOW HIGH HIGH HIGH LOW ON ONOFF OFF OFF
LOW LOW LOW LOW ON OFF OFF OFF OFF
LOW LOW LOW LOW LOW ON OFF OFF OFF OFF
SLP
S5#
HIGH
S4
STATE#
SLP
M#
HIGH
HIGH
ALWAYS
PLANE
ON
M
PLANE
ON
SUS
RUN
PLANE
PLANE
ON ON ON
OFF
OFF
CLOCKS
OFF
OFF
OFF
PCH
PM TABLE
+15V_ALW
+5V_ALW
C C
State
S0
S3
S5 S4/AC
power
plane
+3.3V_ALW_PCH
+3.3V_RTC_LDO
ON
ON
+3.3V_SUS
+1.5V_MEM
ON ON
ON
OFF
+5V_RUN
+3.3V_RUN
+1.8V_RUN
+1.5V_RUN
+0.75V_DDR_VTT
+VCC_CORE
+1.05V_RUN_VTT
+1.05V_RUN
OFFON
OFF
+3.3V_M +3.3V_M
+1.05V_M
ON
ON
ON
+1.05V_M
(M-OFF)
ON
OFF
OFF
USH
USB PORT#
0
1
2
3
4
5
6
7
8
9
10
11
12
13
0
1
JUSB1 (Ext Right Side)
JUSB2 (Ext Right Side)
IO Board- JUSB1 (Ext Left Side)
Docking USB3.0
WLAN
WWAN
IO Board- JUSB2 (Ext Left Side)
USH
Docking USB 2.0
ESATA
Express Card
BT 4.0
Carmera
Touch Screen
DESTINATION
BIO
NA
S5 S4/AC don't exist
B B
A A
Stack up
OFFOFF
OFF
OFFOFF
SATA
SATA 0
SATA 1
SATA 2
SATA 3
SATA 4
SATA 5
DESTINATION
HDD 1
HDD 2
NVRAM
ODD
ESATA
Dock
PCI EXPRESS
Lane 1
Lane 2
Lane 3
DESTINATION
MINI CARD-1 WWAN
MINI CARD-2 WLAN
Express Card
Lane 4
Lane 5
MINI CARD-3 (Pink Panther)
Lane 6 NVRAM Card
Lane 7
10/100/1G LOM
Lane 8 Cardreader
NA
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
Index and Config.
Index and Config.
Index and Config.
LA-7933
LA-7933
LA-7933
365Monday, November 07, 2011
365Monday, November 07, 2011
365Monday, November 07, 2011
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PCH_ALW_ON
Docking
D D
ADAPTER
BATTERY
+PWR_SRC
EN_INVPWR
RUN_GFX_ON
1.05V_0.8V_PWROK
CHARGER
C C
SIO_SLP_S4#
RT8207
(PU201)
SIO_SLP_A#
TPS51212
(PU401)
+1.05V_M
CPU_VTT_ON
TPS51212
(PU501)
+1.05V_RUN_VTT
TP0610K
(PQ4)
FDC654P
(Q21)
SI4835DDY
(Q186)
ISL95836
(PU702)
TPS4021
(PU1201)
+PWR_SRC_S
+BL_PWR_SRC
+MXM_PWR_SRC
+VCC_CORE
+VCC_GFXCORE
+12V
ALWON
RT8205
(PU101)
+3.3V_ALW
+5V_ALW
SIO_SLP_S3#
SIO_SLP_S3#
1.05V_VTTPWRGD
EN_LCDPWR
MODC_EN
SIO_SLP_S3#
ESATA_USB_PWR_EN#
PCH_ALW_ON
RUN_GFX_ON
DMN3030
(Q51)
SYN470
(PU301)
TPS51461
FDC655B
(Q12)
SI3456DDV
(Q30)
SI3456DDV
(Q27)
SSM3K7002FU
(QH4)
SI4800BDY
(Q76)
TPS2560
(U45)
TPS2560
(U48)
+EDPVDD
+5V_MOD
+5V_HDD
PWR_SHARE_EN#
USB_SIDE_EN#
+5V_RUN
+1.8V_RUN
+VCC_SA(PU601)
Pop option
Pop option
+5V_USB_PWR1
+5V_USB_PWR2
+5V_ESATA_PWR
+5V_ALW_PCH
+5V_MXM
+5V_RUN
+5V_RUN
+V_DDR_REF
B B
+0.75V_DDR_VTT
+1.5V_MEM
SIO_SLP_S3#
AO4728L
(QC3)
SIO_SLP_S3#
SI4164
(Q63)
+1.05V_RUN
NVRAM_PWR_EN
SI3456DDV
(Q46)
MCARD_WWAN_PWREN
SI3456DDV
(Q40)
MCARD_MISC_PWREN
SI3456DDV
(Q44)
AUX_EN_WOWL
SI3456DDV
(Q38)
PCH_ALW_ON
SI3456DDV
(Q49)
SIO_SLP_S4#
SI3456DDV
(Q54)
SIO_SLP_LAN#
SI3456DDV
(Q34)
+3.3V_LAN+3.3V_SUS
SIO_SLP_A#
SI3456DDV
(Q58)
+3.3V_M
RUN_GFX_ON
SI4800BDY
(Q25)
+3V_MXM
SIO_SLP_S3#
DMN3030
(Q56)
+3.3V_RUN
SIO_SLP_S3#
SYN470D
(PU302)
+1.5V_RUN
MXM_ENVDD
ENVDD_PCH
LCD_VCC_TEST_EN
SI3456DDV
(Q18)
+LCDVDD
+1.5V_CPU_VDDQ
A A
+3.3V_PCIE_NVM
+3.3V_PCIE_WWAN
+3.3V_PCIE_FLASH
+3.3V_WLAN
+3.3V_ALW_PCH
+1.05V_M
Pop option
+3.3V_M
Pop option
LDO of 82579
(U31)
+1.0V_LAN
CCD_OFF
PMV65XP
(Q24)
+CAMERA_VDD
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Power Rail
Power Rail
Power Rail
1
LA-7933
LA-7933
LA-7933
465Monday, November 07, 2011
465Monday, November 07, 2011
465Monday, November 07, 2011
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SMBUS Address [0x9a]
5
H14
C9
MEM_SMBCLK
MEM_SMBDATA
PCH
D D
3A
C C
E14M16
SML1_SMBDATA
SML1_SMBCLK
B6A5
3A
C6
G8
1A
1A
1B
1B
B4
A3
B5
A4
LAN_SMBCLK
LAN_SMBDATA
2.2K
2.2K
DOCK_SMB_CLK
DOCK_SMB_DAT
LCD_SMBCLK
LCD_SMDATA
+3.3V_ALW_PCH
2.2K
2.2K
2.2K
2.2K
4
2.2K
2.2K
2.2K
2.2K
+3.3V_ALW_PCH
+3.3V_LAN
28
31
LOM
+3.3V_ALW
+3.3V_ALW
2N7002
2N7002
SMBUS Address [C8]
127
129
DOCKING
3
4
Current Monitor
3
SMBUS Address
APR_EC: 0x48
SPR_EC: 0x70
MSLICE_EC: 0x72
USB: 0x59
AUDIO: 0x34
SLICE_BATTERY: 0x17
SLICE_CHARGER: 0x13
202
200
200
200
200
53
51
202
202
202
53
51
2
DIMMA
DIMMB
DIMMC
SMBUS Address [A0h]
A0h --> 1010 0000
SMBUS Address [A4h]
A4h --> 1010 0100
SMBUS Address [A4h]
A4h --> 1010 0100
1
DIMMD
SMBUS Address [TBD]
XDP1
XDP2
30
32
WWAN
SMBUS Address [TBD]
SMBUS Address [TBD]
14
13
2.2K
2.2K
G Sensor
+3.3V_RUN
SMBUS Address [TBD]
2.2K
eDP Panel
KBC
A56
1C1CB59
PBAT_SMBCLK
PBAT_SMBDAT
2.2K
2.2K
+3.3V_ALW
100 ohm
100 ohm
7
6
BATTERY
CONN
SMBUS Address [0x16]
SMBUS Address
SMB_ADM1032: 0x98
SMB_DIAG_DUMP: 0x04
SMB_DIAG_DUMP2: 0x05
SMB_BLACKTOP: 0x60
A50
B53
USH_SMBCLK
USH_SMBDAT
1E
1E
2.2K
+3.3V_ALW
M9
L9
USH
SMBUS Address [0xa4]
2.2K
B B
MEC 5055
A49
B52
CARD_SMBCLK
CARD_SMBDAT
2B
2B
2.2K
2.2K
B50
A47
CHARGER_SMBCLK
CHARGER_SMBDAT
1G
1G
2.2K
2.2K
B7
A7
BAY_SMBDAT
BAY_SMBCLK
2D
2D
2.2K
2.2K
B49
A A
2A
2A
DAI_GPU_R3P_SMBCLK
B48
DAI_GPU_R3P_SMBDAT
2.2K
+3.3V_ALW
+3.3V_ALW
+3.3V_RUN
+3.3V_RUN
10
9
7
8
Charger
8
9
Express card
SMBUS Address [0x12]
MXM
SMBUS Address [0x30]
SMBUS Address [TBD]
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SMBUS Bolck Diagram
SMBUS Bolck Diagram
SMBUS Bolck Diagram
LA-7933
LA-7933
LA-7933
565Monday, November 07, 2011
565Monday, November 07, 2011
565Monday, November 07, 2011
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PEG_CRX_GTX_C_P[0..15]
PEG_CRX_GTX_C_N[0..15]
JCPU1A
D D
C C
B B
DMI_CRX_PTX_N0<19>
DMI_CRX_PTX_N1<19>
DMI_CRX_PTX_N2<19>
DMI_CRX_PTX_N3<19>
DMI_CRX_PTX_P0<19>
DMI_CRX_PTX_P1<19>
DMI_CRX_PTX_P2<19>
DMI_CRX_PTX_P3<19>
DMI_CTX_PRX_N0<19>
DMI_CTX_PRX_N1<19>
DMI_CTX_PRX_N2<19>
DMI_CTX_PRX_N3<19>
DMI_CTX_PRX_P0<19>
DMI_CTX_PRX_P1<19>
DMI_CTX_PRX_P2<19>
DMI_CTX_PRX_P3<19>
FDI_CTX_PRX_N0<19>
FDI_CTX_PRX_N1<19>
FDI_CTX_PRX_N2<19>
FDI_CTX_PRX_N3<19>
FDI_CTX_PRX_N4<19>
FDI_CTX_PRX_N5<19>
FDI_CTX_PRX_N6<19>
FDI_CTX_PRX_N7<19>
FDI_CTX_PRX_P0<19>
FDI_CTX_PRX_P1<19>
FDI_CTX_PRX_P2<19>
FDI_CTX_PRX_P3<19>
FDI_CTX_PRX_P4<19>
FDI_CTX_PRX_P5<19>
FDI_CTX_PRX_P6<19>
FDI_CTX_PRX_P7<19>
FDI_FSYNC0<19>
FDI_FSYNC1<19>
FDI_INT<19>
FDI_LSYNC0<19>
FDI_LSYNC1<19>
(1)EDP_COMPIOuse4miltracetoRC1
(2)EDP_ICOMPOuse12miltoRC1
DMI_CRX_PTX_N0
DMI_CRX_PTX_N1
DMI_CRX_PTX_N2
DMI_CRX_PTX_N3
DMI_CRX_PTX_P0
DMI_CRX_PTX_P1
DMI_CRX_PTX_P2
DMI_CRX_PTX_P3
DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3
DMI_CTX_PRX_P0
DMI_CTX_PRX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_P3
FDI_CTX_PRX_N0
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N5
FDI_CTX_PRX_N6
FDI_CTX_PRX_N7
FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P4
FDI_CTX_PRX_P5
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7
FDI_FSYNC0
FDI_FSYNC1
FDI_INT
FDI_LSYNC0
FDI_LSYNC1
EDP_COMP
JCPU1A
B27
DMI_RX#[0]
B25
DMI_RX#[1]
A25
DMI_RX#[2]
B24
DMI_RX#[3]
B28
DMI_RX[0]
B26
DMI_RX[1]
A24
DMI_RX[2]
B23
DMI_RX[3]
G21
DMI_TX#[0]
E22
DMI_TX#[1]
F21
DMI_TX#[2]
D21
DMI_TX#[3]
G22
DMI_TX[0]
D22
DMI_TX[1]
F20
DMI_TX[2]
C21
DMI_TX[3]
A21
FDI0_TX#[0]
H19
FDI0_TX#[1]
E19
FDI0_TX#[2]
F18
FDI0_TX#[3]
B21
FDI1_TX#[0]
C20
FDI1_TX#[1]
D18
FDI1_TX#[2]
E17
FDI1_TX#[3]
A22
FDI0_TX[0]
G19
FDI0_TX[1]
E20
FDI0_TX[2]
G18
FDI0_TX[3]
B20
FDI1_TX[0]
C19
FDI1_TX[1]
D19
FDI1_TX[2]
F17
FDI1_TX[3]
J18
FDI0_FSYNC
J17
FDI1_FSYNC
H20
FDI_INT
J19
FDI0_LSYNC
H17
FDI1_LSYNC
A18
eDP_COMPIO
A17
eDP_ICOMPO
B16
eDP_HPD#
C15
eDP_AUX
D15
eDP_AUX#
C17
eDP_TX[0]
F16
eDP_TX[1]
C16
eDP_TX[2]
G15
eDP_TX[3]
C18
eDP_TX#[0]
E16
eDP_TX#[1]
D16
eDP_TX#[2]
F15
eDP_TX#[3]
TYCO_2134146-3_IVYBRIDGE~D
TYCO_2134146-3_IVYBRIDGE~D
DMI
DMI
Intel(R) FDI
Intel(R) FDI
eDP
eDP
PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
PEG_RX#[0]
PEG_RX#[1]
PEG_RX#[2]
PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]
PEG_RX#[9]
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]
PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]
PEG_RX[9]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]
PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9]
PEG_TX#[10]
PEG_TX#[11]
PEG_TX#[12]
PCI EXPRESS* - GRAPHICS
PCI EXPRESS* - GRAPHICS
PEG_TX#[13]
PEG_TX#[14]
PEG_TX#[15]
PEG_TX[0]
PEG_TX[1]
PEG_TX[2]
PEG_TX[3]
PEG_TX[4]
PEG_TX[5]
PEG_TX[6]
PEG_TX[7]
PEG_TX[8]
PEG_TX[9]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]
PEG_COMP
J22
J21
H22
PEG_CRX_GTX_N0
K33
PEG_CRX_GTX_N1
M35
PEG_CRX_GTX_N2
L34
PEG_CRX_GTX_N3
J35
PEG_CRX_GTX_N4
J32
PEG_CRX_GTX_N5
H34
PEG_CRX_GTX_N6
H31
PEG_CRX_GTX_N7
G33
PEG_CRX_GTX_N8
G30
PEG_CRX_GTX_N9
F35
PEG_CRX_GTX_N10
E34
PEG_CRX_GTX_N11
E32
PEG_CRX_GTX_N12
D33
PEG_CRX_GTX_N13
D31
PEG_CRX_GTX_N14
B33
PEG_CRX_GTX_N15
C32
PEG_CRX_GTX_P0
J33
PEG_CRX_GTX_P1
L35
PEG_CRX_GTX_P2
K34
PEG_CRX_GTX_P3
H35
PEG_CRX_GTX_P4
H32
PEG_CRX_GTX_P5
G34
PEG_CRX_GTX_P6
G31
PEG_CRX_GTX_P7
F33
PEG_CRX_GTX_P8
F30
PEG_CRX_GTX_P9
E35
PEG_CRX_GTX_P10
E33
PEG_CRX_GTX_P11
F32
PEG_CRX_GTX_P12
D34
PEG_CRX_GTX_P13
E31
PEG_CRX_GTX_P14
C33
PEG_CRX_GTX_P15
B32
PEG_CTX_GRX_C_N0
M29
PEG_CTX_GRX_C_N1
M32
PEG_CTX_GRX_C_N2
M31
PEG_CTX_GRX_C_N3
L32
PEG_CTX_GRX_C_N4
L29
PEG_CTX_GRX_C_N5
K31
PEG_CTX_GRX_C_N6
K28
PEG_CTX_GRX_C_N7
J30
PEG_CTX_GRX_C_N8
J28
PEG_CTX_GRX_C_N9
H29
PEG_CTX_GRX_C_N10
G27
PEG_CTX_GRX_C_N11
E29
PEG_CTX_GRX_C_N12
F27
PEG_CTX_GRX_C_N13
D28
PEG_CTX_GRX_C_N14
F26
PEG_CTX_GRX_C_N15
E25
PEG_CTX_GRX_C_P0
M28
PEG_CTX_GRX_C_P1
M33
PEG_CTX_GRX_C_P2
M30
PEG_CTX_GRX_C_P3
L31
PEG_CTX_GRX_C_P4
L28
PEG_CTX_GRX_C_P5
K30
PEG_CTX_GRX_C_P6
K27
PEG_CTX_GRX_C_P7
J29
PEG_CTX_GRX_C_P8
J27
PEG_CTX_GRX_C_P9
H28
PEG_CTX_GRX_C_P10
G28
PEG_CTX_GRX_C_P11
E28
PEG_CTX_GRX_C_P12
F28
PEG_CTX_GRX_C_P13
D27
PEG_CTX_GRX_C_P14
E26
PEG_CTX_GRX_C_P15
D25
PEG_CTX_GRX_P[0..15]
PEG_CTX_GRX_N[0..15]
CC1 0.22U_0402_16V7K~DCC1 0.22U_0402_16V7K~D
12
CC2 0.22U_0402_16V7K~DCC2 0.22U_0402_16V7K~D
12
CC3 0.22U_0402_16V7K~DCC3 0.22U_0402_16V7K~D
12
CC4 0.22U_0402_16V7K~DCC4 0.22U_0402_16V7K~D
12
CC5 0.22U_0402_16V7K~DCC5 0.22U_0402_16V7K~D
12
CC6 0.22U_0402_16V7K~DCC6 0.22U_0402_16V7K~D
12
CC7 0.22U_0402_16V7K~DCC7 0.22U_0402_16V7K~D
12
CC8 0.22U_0402_16V7K~DCC8 0.22U_0402_16V7K~D
12
CC9 0.22U_0402_16V7K~DCC9 0.22U_0402_16V7K~D
12
CC10 0.22U_0402_16V7K~DCC10 0.22U_0402_16V7K~D
12
CC11 0.22U_0402_16V7K~DCC11 0.22U_0402_16V7K~D
12
CC12 0.22U_0402_16V7K~DCC12 0.22U_0402_16V7K~D
12
CC13 0.22U_0402_16V7K~DCC13 0.22U_0402_16V7K~D
12
CC14 0.22U_0402_16V7K~DCC14 0.22U_0402_16V7K~D
12
CC15 0.22U_0402_16V7K~DCC15 0.22U_0402_16V7K~D
12
CC16 0.22U_0402_16V7K~DCC16 0.22U_0402_16V7K~D
12
CC17 0.22U_0402_16V7K~DCC17 0.22U_0402_16V7K~D
12
CC18 0.22U_0402_16V7K~DCC18 0.22U_0402_16V7K~D
12
CC19 0.22U_0402_16V7K~DCC19 0.22U_0402_16V7K~D
12
CC20 0.22U_0402_16V7K~DCC20 0.22U_0402_16V7K~D
12
CC21 0.22U_0402_16V7K~DCC21 0.22U_0402_16V7K~D
12
CC22 0.22U_0402_16V7K~DCC22 0.22U_0402_16V7K~D
12
CC23 0.22U_0402_16V7K~DCC23 0.22U_0402_16V7K~D
12
CC24 0.22U_0402_16V7K~DCC24 0.22U_0402_16V7K~D
12
CC25 0.22U_0402_16V7K~DCC25 0.22U_0402_16V7K~D
12
CC26 0.22U_0402_16V7K~DCC26 0.22U_0402_16V7K~D
12
CC27 0.22U_0402_16V7K~DCC27 0.22U_0402_16V7K~D
12
CC28 0.22U_0402_16V7K~DCC28 0.22U_0402_16V7K~D
12
CC29 0.22U_0402_16V7K~DCC29 0.22U_0402_16V7K~D
12
CC30 0.22U_0402_16V7K~DCC30 0.22U_0402_16V7K~D
12
CC31 0.22U_0402_16V7K~DCC31 0.22U_0402_16V7K~D
12
CC32 0.22U_0402_16V7K~DCC32 0.22U_0402_16V7K~D
12
CC33 0.22U_0402_16V7K~DCC33 0.22U_0402_16V7K~D
12
CC34 0.22U_0402_16V7K~DCC34 0.22U_0402_16V7K~D
12
CC35 0.22U_0402_16V7K~DCC35 0.22U_0402_16V7K~D
12
CC36 0.22U_0402_16V7K~DCC36 0.22U_0402_16V7K~D
12
CC37 0.22U_0402_16V7K~DCC37 0.22U_0402_16V7K~D
12
CC38 0.22U_0402_16V7K~DCC38 0.22U_0402_16V7K~D
12
CC39 0.22U_0402_16V7K~DCC39 0.22U_0402_16V7K~D
12
CC40 0.22U_0402_16V7K~DCC40 0.22U_0402_16V7K~D
12
CC41 0.22U_0402_16V7K~DCC41 0.22U_0402_16V7K~D
12
CC42 0.22U_0402_16V7K~DCC42 0.22U_0402_16V7K~D
12
CC43 0.22U_0402_16V7K~DCC43 0.22U_0402_16V7K~D
12
CC44 0.22U_0402_16V7K~DCC44 0.22U_0402_16V7K~D
12
CC45 0.22U_0402_16V7K~DCC45 0.22U_0402_16V7K~D
12
CC46 0.22U_0402_16V7K~DCC46 0.22U_0402_16V7K~D
12
CC47 0.22U_0402_16V7K~DCC47 0.22U_0402_16V7K~D
12
CC48 0.22U_0402_16V7K~DCC48 0.22U_0402_16V7K~D
12
CC49 0.22U_0402_16V7K~DCC49 0.22U_0402_16V7K~D
12
CC50 0.22U_0402_16V7K~DCC50 0.22U_0402_16V7K~D
12
CC51 0.22U_0402_16V7K~DCC51 0.22U_0402_16V7K~D
12
CC52 0.22U_0402_16V7K~DCC52 0.22U_0402_16V7K~D
12
CC53 0.22U_0402_16V7K~DCC53 0.22U_0402_16V7K~D
12
CC54 0.22U_0402_16V7K~DCC54 0.22U_0402_16V7K~D
12
CC55 0.22U_0402_16V7K~DCC55 0.22U_0402_16V7K~D
12
CC56 0.22U_0402_16V7K~DCC56 0.22U_0402_16V7K~D
12
CC57 0.22U_0402_16V7K~DCC57 0.22U_0402_16V7K~D
12
CC58 0.22U_0402_16V7K~DCC58 0.22U_0402_16V7K~D
12
CC59 0.22U_0402_16V7K~DCC59 0.22U_0402_16V7K~D
12
CC60 0.22U_0402_16V7K~DCC60 0.22U_0402_16V7K~D
12
CC61 0.22U_0402_16V7K~DCC61 0.22U_0402_16V7K~D
12
CC62 0.22U_0402_16V7K~DCC62 0.22U_0402_16V7K~D
12
CC63 0.22U_0402_16V7K~DCC63 0.22U_0402_16V7K~D
12
CC64 0.22U_0402_16V7K~DCC64 0.22U_0402_16V7K~D
12
PEG_CRX_GTX_C_P[0..15] <16>
PEG_CRX_GTX_C_N[0..15] <16>
PEG_CTX_GRX_P[0..15] <16>
PEG_CTX_GRX_N[0..15] <16>
PEG_CRX_GTX_C_N0
PEG_CRX_GTX_C_N1
PEG_CRX_GTX_C_N2
PEG_CRX_GTX_C_N3
PEG_CRX_GTX_C_N4
PEG_CRX_GTX_C_N5
PEG_CRX_GTX_C_N6
PEG_CRX_GTX_C_N7
PEG_CRX_GTX_C_N8
PEG_CRX_GTX_C_N9
PEG_CRX_GTX_C_N10
PEG_CRX_GTX_C_N11
PEG_CRX_GTX_C_N12
PEG_CRX_GTX_C_N13
PEG_CRX_GTX_C_N14
PEG_CRX_GTX_C_N15
PEG_CRX_GTX_C_P0
PEG_CRX_GTX_C_P1
PEG_CRX_GTX_C_P2
PEG_CRX_GTX_C_P3
PEG_CRX_GTX_C_P4
PEG_CRX_GTX_C_P5
PEG_CRX_GTX_C_P6
PEG_CRX_GTX_C_P7
PEG_CRX_GTX_C_P8
PEG_CRX_GTX_C_P9
PEG_CRX_GTX_C_P10
PEG_CRX_GTX_C_P11
PEG_CRX_GTX_C_P12
PEG_CRX_GTX_C_P13
PEG_CRX_GTX_C_P14
PEG_CRX_GTX_C_P15
PEG_CTX_GRX_N0
PEG_CTX_GRX_N1
PEG_CTX_GRX_N2
PEG_CTX_GRX_N3
PEG_CTX_GRX_N4
PEG_CTX_GRX_N5
PEG_CTX_GRX_N6
PEG_CTX_GRX_N7
PEG_CTX_GRX_N8
PEG_CTX_GRX_N9
PEG_CTX_GRX_N10
PEG_CTX_GRX_N11
PEG_CTX_GRX_N12
PEG_CTX_GRX_N13
PEG_CTX_GRX_N14
PEG_CTX_GRX_N15
PEG_CTX_GRX_P0
PEG_CTX_GRX_P1
PEG_CTX_GRX_P2
PEG_CTX_GRX_P3
PEG_CTX_GRX_P4
PEG_CTX_GRX_P5
PEG_CTX_GRX_P6
PEG_CTX_GRX_P7
PEG_CTX_GRX_P8
PEG_CTX_GRX_P9
PEG_CTX_GRX_P10
PEG_CTX_GRX_P11
PEG_CTX_GRX_P12
PEG_CTX_GRX_P13
PEG_CTX_GRX_P14
PEG_CTX_GRX_P15
JCPU1I
JCPU1I
T35
VSS161
T34
VSS162
T33
VSS163
T32
VSS164
T31
VSS165
T30
VSS166
T29
VSS167
T28
VSS168
T27
VSS169
T26
VSS170
P9
VSS171
P8
VSS172
P6
VSS173
P5
VSS174
P3
VSS175
P2
VSS176
N35
VSS177
N34
VSS178
N33
VSS179
N32
VSS180
N31
VSS181
N30
VSS182
N29
VSS183
N28
VSS184
N27
VSS185
N26
VSS186
M34
VSS187
L33
VSS188
L30
VSS189
L27
VSS190
L9
VSS191
L8
VSS192
L6
VSS193
L5
VSS194
L4
VSS195
L3
VSS196
L2
VSS197
L1
VSS198
K35
VSS199
K32
VSS200
K29
VSS201
K26
VSS202
J34
VSS203
J31
VSS204
H33
VSS205
H30
VSS206
H27
VSS207
H24
VSS208
H21
VSS209
H18
VSS210
H15
VSS211
H13
VSS212
H10
VSS213
H9
VSS214
H8
VSS215
H7
VSS216
H6
VSS217
H5
VSS218
H4
VSS219
H3
VSS220
H2
VSS221
H1
VSS222
G35
VSS223
G32
VSS224
G29
VSS225
G26
VSS226
G23
VSS227
G20
VSS228
G17
VSS229
G11
VSS230
F34
VSS231
F31
VSS232
F29
VSS233
VSS
VSS
VSS234
VSS235
VSS236
VSS237
VSS238
VSS239
VSS240
VSS241
VSS242
VSS243
VSS244
VSS245
VSS246
VSS247
VSS248
VSS249
VSS250
VSS251
VSS252
VSS253
VSS254
VSS255
VSS256
VSS257
VSS258
VSS259
VSS260
VSS261
VSS262
VSS263
VSS264
VSS265
VSS266
VSS267
VSS268
VSS269
VSS270
VSS271
VSS272
VSS273
VSS274
VSS275
VSS276
VSS277
VSS278
VSS279
VSS280
VSS281
VSS282
VSS283
VSS284
VSS285
F22
F19
E30
E27
E24
E21
E18
E15
E13
E10
E9
E8
E7
E6
E5
E4
E3
E2
E1
D35
D32
D29
D26
D20
D17
C34
C31
C28
C27
C25
C23
C10
C1
B22
B19
B17
B15
B13
B11
B9
B8
B7
B5
B3
B2
A35
A32
A29
A26
A23
A20
A3
LInkCIS
TYCO_2134146-3_IVYBRIDGE~D
+1.05V_RUN_VTT +1.05V_RUN_VTT
EDP_COMP
RC1 24.9_0402_1%~DRC1 24.9_0402_1%~D
eDPCompensation
eDP_COMPIOandICOMPOsignalsshouldbeshortednear
ballsandroutedwithtypicalimpedance<25mohms
A A
12
PEGCompensation
1 2
RC2 24.9_0402_1%~DRC2 24.9_0402_1%~D
PEG_ICOMPIandRCOMPOsignals
shouldbeshortedandroutedwith
‐maxlength=500mils
‐typicalimpedance=43mohms
PEG_ICOMPOsignalsshouldberoutedwith
‐maxlength=500mils
‐typicalimpedance=14.5mohms
PEG_COMP
TYCO_2134146-3_IVYBRIDGE~D
LInkCIS
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
Ivy Bridge (1/6)
Ivy Bridge (1/6)
Ivy Bridge (1/6)
LA-7933
LA-7933
LA-7933
665Monday, November 07, 2011
665Monday, November 07, 2011
665Monday, November 07, 2011
1
0.2
0.2
0.2
of
of
of
Page 7
5
4
3
2
1
FollowDGRev0.71SM_DRAMPWROKtopology
+3.3V_ALW_PCH
RUNPWROK<46,47>
D D
PM_DRAM_PWRGD<19>
+3.3V_ALW_PCH
+1.05V_RUN_VTT
1 2
RC6 200_0402_5%~DRC6 200_0402_5%~D
1 2
RC14 56_0402_5%~D@RC14 56_0402_5%~D@
1 2
RC15 49.9_0402_1%~D@RC15 49.9_0402_1%~D@
1 2
RC16 62_0402_5%~DRC16 62_0402_5%~D
1
2
H_THERMTRIP#
H_CATERR#
H_PROCHOT#
CC65
CC65
1 2
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
5
P
B
4
O
A
G
UC1
UC1
74AHC1G09GW_TSSOP5~D
74AHC1G09GW_TSSOP5~D
3
RUN_ON_CPU1.5VS3#<11,50>
AvoidPower_SRCtracenoise
couplingeffecttoCPU
C C
B B
A A
H_PROCHOT#
220P_0402_50V7K~D
220P_0402_50V7K~D
CC92
CC92
12
PlaceCC92nearCPU
H_CPUPWRGD<21>
BufferedresettoCPU
PCH_PLTRST#<17,20>
CPU_DETECT#<46>
H_CATERR#
PECI_EC<47>
H_PROCHOT#_R
H_PROCHOT#<26,47,58,60>
H_THERMTRIP#<25>
1 2
RC22 56_0402_5%~DRC22 56_0402_5%~D
PlaceRC22nearCPU
RC24 0_0402_5%~DRC24 0_0402_5%~D
H_PM_SYNC<19>
RC27 0_0402_5%~DRC27 0_0402_5%~D
1 2
1 2
+3.3V_RUN
1
NC
2
A
5
P
G
3
H_THERMTRIP#_R
H_PM_SYNC
H_CPUPWRGD_R
VDDPWRGOOD_R
PCH_PLTRST#_R
1
2
PCH_PLTRST#_BUF
4
Y
UC2
UC2
SN74LVC1G07DCKR_SC70-5~D
SN74LVC1G07DCKR_SC70-5~D
Opendrainbuffer
5
+1.5V_CPU_VDDQ
12
RC4
RC4
200_0402_5%~D
200_0402_5%~D
VDDPWRGOOD
39_0402_5%~D
39_0402_5%~D
12
@RC7
@
RC7
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
@
@
13
D
D
QC1
QC1
2
G
G
S
S
JCPU1B
JCPU1B
C26
PROC_SELECT#
AN34
SKTOCC#
AL33
CATERR#
AN33
PECI
AL32
PROCHOT#
AN32
THERMTRIP#
AM34
PM_SYNC
AP33
UNCOREPWRGOOD
V8
SM_DRAMPWROK
AR33
RESET#
TYCO_2134146-3_IVYBRIDGE~D
TYCO_2134146-3_IVYBRIDGE~D
1 2
RC5 130_0402_5%~DRC5 130_0402_5%~D
VDDPWRGOOD_R
MISCTHERMALPWR MANAGEMENT
MISCTHERMALPWR MANAGEMENT
CLOCKS
CLOCKS
DDR3
MISC
DDR3
MISC
JTAG & BPM
JTAG & BPM
LInkCIS
BCLK
BCLK#
DPLL_REF_CLK
DPLL_REF_CLK#
SM_DRAMRST#
SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]
PRDY#
PREQ#
TMS
TRST#
TDO
DBR#
BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]
TCK
TDI
A28
A27
A16
A15
R8
AK1
A5
A4
AP29
AP27
AR26
AR27
AP30
AR28
AP26
XDP_DBRESET#_R
AL35
AT28
AR29
AR30
AT30
AP32
AR31
AT31
AR32
CPU_DMI
RC17 0_0402_5%~DRC17 0_0402_5%~D
CPU_DMI#
RC18 0_0402_5%~DRC18 0_0402_5%~D
CPU_DPLL
RC19 1K_0402_1%~DRC19 1K_0402_1%~D
CPU_DPLL#
RC20 1K_0402_1%~DRC20 1K_0402_1%~D
DDR3_DRAMRST#_CPU
SM_RCOMP0
SM_RCOMP1
SM_RCOMP2
XDP_PRDY#
XDP_PREQ#
XDP_TCLK
XDP_TMS
XDP_TRST#
XDP_TDI_R
XDP_TDO_R
XDP_OBS0_R
XDP_OBS1_R
XDP_OBS2_R
XDP_OBS3_R
XDP_OBS4_R
XDP_OBS5_R
XDP_OBS6_R
XDP_OBS7_R
+3.3V_ALW_PCH
1 2
RC3 1K_0402_5%~D@RC3 1K_0402_5%~D@
+1.05V_RUN_VTT
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
1
CC66
CC66
2
2
PlacenearJXDP1
1 2
1 2
1 2
1 2
4.99K_0402_1%~D
4.99K_0402_1%~D
12
RC23
RC23
DDR_HVREF_RST_PCH<18>
DDR_HVREF_RST_GATE<47>
RC28 0_0402_5%~DRC28 0_0402_5%~D
1 2
T73PAD~D @T73PAD~D @
T74PAD~D @T74PAD~D @
T75PAD~D @T75PAD~D @
T76PAD~D @T76PAD~D @
T77PAD~D @T77PAD~D @
T78PAD~D @T78PAD~D @
T79PAD~D @T79PAD~D @
T80PAD~D @T80PAD~D @
SYS_PWROK_XDP
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
CC67
CC67
CLK_CPU_DMI <18>
CLK_CPU_DMI# <18>H_SNB_IVB#<21>
+1.05V_RUN_VTT
D
S
D
S
13
QC2
QC2
G
G
BSS138W-7-F_SOT323-3~D
BSS138W-7-F_SOT323-3~D
2
1
CC68
CC68
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
2
RC25 0_0402_5%~DRC25 0_0402_5%~D
1 2
RC26 0_0402_5%~D@RC26 0_0402_5%~D@
1 2
XDP_DBRESET# <17,19>
H_CPUPWRGD H_CPUPWRGD_XDP
SIO_PWRBTN#_R<17,19>
CFG0<9>
SYS_PWROK<19,46>
DDR3_DRAMRST# <12>
DDR_HVREF_RST
RC33 0_0402_5%~DRC33 0_0402_5%~D
XDP_TDO_R XDP_TDO
RC37 0_0402_5%~DRC37 0_0402_5%~D
RC8 1K_0402_5%~DRC8 1K_0402_5%~D
1 2
RC9 0_0402_5%~DRC9 0_0402_5%~D
1 2
RC10 1K_0402_5%~DRC10 1K_0402_5%~D
1 2
RC11 0_0402_5%~D@RC11 0_0402_5%~D@
1 2
1 2
1 2
DDR_HVREF_RST <12>
XDP_PREQ#
XDP_PRDY#
CFD_PWRBTN#_XDP
XDP_HOOK2
SYS_PWROK_XDP
CLK_XDP
CLK_XDP#
XDP_RST#_R
XDP_DBRESET#
XDP_TDO
XDP_TRST#
XDP_TDI
XDP_TMS
XDP_TCLK
XDP_RST#_R
CLK_XDP
CLK_XDP#
CLK_XDP_ITP<9>
CLK_XDP_ITP#<9>
XDP_TDIXDP_TDI_R
+1.05V_RUN_VTT
JXDP1
JXDP1
1
OBSFN_A0
2
OBSFN_A1
3
GND
4
OBSDATA_A[0]
5
OBSDATA_A[1]
6
GND
7
OBSDATA_A[2]
8
OBSDATA_A[3]
9
GND
10
HOOK0
11
HOOK1
12
HOOK2
13
HOOK3
14
HOOK4
15
HOOK5
16
VCCOBS_AB
17
HOOK6
18
HOOK7
19
GND
20
TDO
21
TRSTn
22
TDI
23
TMS
TCK124GND
25
GND
26
TCK0
MOLEX_52435-2671
MOLEX_52435-2671
CONN@
CONN@
RC21 1K_0402_5%~DRC21 1K_0402_5%~D
RH1 0_0402_5%~DRH1 0_0402_5%~D
RH2 0_0402_5%~DRH2 0_0402_5%~D
RH3 0_0402_5%~D@RH3 0_0402_5%~D@
RH4 0_0402_5%~D@RH4 0_0402_5%~D@
12
1 2
1 2
1 2
1 2
PU/PDforJTAGsignals
XDP_DBRESET#
XDP_TMS
XDP_TDI_R
XDP_PREQ#
XDP_TDO
XDP_TCLK
XDP_TRST#
1 2
1 2
1 2
1 2
1 2
1 2
1 2
27
28
GND
PLTRST_XDP# <20>
CLK_CPU_ITP <18>
CLK_CPU_ITP# <18>
+3.3V_RUN
RC301K_0402_5%~D RC301K_0402_5%~D
+1.05V_RUN_VTT
RC3851_0402_1%~D RC3851_0402_1%~D
RC4151_0402_1%~D RC4151_0402_1%~D
RC4251_0402_1%~D @RC4251_0402_1%~D @
RC4351_0402_1%~D RC4351_0402_1%~D
RC4451_0402_1%~D RC4451_0402_1%~D
RC4551_0402_1%~D RC4551_0402_1%~D
Maxlength=500mils
+1.05V_RUN_VTT
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
CC69
CC69
75_0402_1%~D
75_0402_1%~D
12
RC49
RC49
H_CPUPWRGD
1 2
RC4610K_0402_5%~D RC4610K_0402_5%~D
AvoidstubinthePWRGDpath
Tracewidth=15mils
SM_RCOMP2
SM_RCOMP1
SM_RCOMP0
1 2
1 2
1 2
RC47200_0402_1%~D RC47200_0402_1%~D
RC4825.5_0402_1%~D RC4825.5_0402_1%~D
RC50140_0402_1%~D RC50140_0402_1%~D
whileplacingresistorsRC27&RC46
PCH_PLTRST#_R
1 2
RC51 43_0402_5%~DRC51 43_0402_5%~D
4
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
Ivy Bridge (2/6)
Ivy Bridge (2/6)
Ivy Bridge (2/6)
LA-7933
LA-7933
LA-7933
1
765Tuesday, November 08, 2011
765Tuesday, November 08, 2011
765Tuesday, November 08, 2011
of
of
of
0.2
0.2
0.2
Page 8
5
D D
JCPU1C
JCPU1C
4
3
JCPU1D
JCPU1D
2
1
DDR_A_D[0..63]<12,13>
C C
B B
DDR_A_BS0<12,13>
DDR_A_BS1<12,13>
DDR_A_BS2<12,13>
DDR_A_CAS#<12,13>
DDR_A_RAS#<12,13>
DDR_A_WE#<12,13>
DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63
DDR_A_BS0
DDR_A_BS1
DDR_A_BS2
DDR_A_CAS#
DDR_A_RAS#
DDR_A_WE#
AP11
AN11
AL12
AM12
AM11
AL11
AP12
AN12
AJ14
AH14
AL15
AK15
AL14
AK14
AJ15
AH15
AE10
AF10
F10
G10
N10
M10
AG6
AG5
AK6
AK5
AH5
AH6
AJ5
AJ6
AJ8
AK8
AJ9
AK9
AH8
AH9
AL9
AL8
AE8
AD9
AF9
C5
D5
D3
D2
D6
C6
C2
C3
F8
G9
F9
F7
G8
G7
K4
K5
K1
J1
J5
J4
J2
K2
M8
N8
N7
M9
N9
M7
V6
SA_DQ[0]
SA_DQ[1]
SA_DQ[2]
SA_DQ[3]
SA_DQ[4]
SA_DQ[5]
SA_DQ[6]
SA_DQ[7]
SA_DQ[8]
SA_DQ[9]
SA_DQ[10]
SA_DQ[11]
SA_DQ[12]
SA_DQ[13]
SA_DQ[14]
SA_DQ[15]
SA_DQ[16]
SA_DQ[17]
SA_DQ[18]
SA_DQ[19]
SA_DQ[20]
SA_DQ[21]
SA_DQ[22]
SA_DQ[23]
SA_DQ[24]
SA_DQ[25]
SA_DQ[26]
SA_DQ[27]
SA_DQ[28]
SA_DQ[29]
SA_DQ[30]
SA_DQ[31]
SA_DQ[32]
SA_DQ[33]
SA_DQ[34]
SA_DQ[35]
SA_DQ[36]
SA_DQ[37]
SA_DQ[38]
SA_DQ[39]
SA_DQ[40]
SA_DQ[41]
SA_DQ[42]
SA_DQ[43]
SA_DQ[44]
SA_DQ[45]
SA_DQ[46]
SA_DQ[47]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]
SA_BS[0]
SA_BS[1]
SA_BS[2]
SA_CAS#
SA_RAS#
SA_WE#
DDR SYSTEM MEMORY A
DDR SYSTEM MEMORY A
SA_CK[0]
SA_CLK#[0]
SA_CKE[0]
SA_CK[1]
SA_CLK#[1]
SA_CKE[1]
SA_CK[2]
SA_CLK#[2]
SA_CKE[2]
SA_CK[3]
SA_CLK#[3]
SA_CKE[3]
SA_CS#[0]
SA_CS#[1]
SA_CS#[2]
SA_CS#[3]
SA_ODT[0]
SA_ODT[1]
SA_ODT[2]
SA_ODT[3]
SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]
SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]
SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]
SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]
AB6
AA6
V9
AA5
AB5
V10
AB4
AA4
W9
AB3
AA3
W10
AK3
AL3
AG1
AH1
AH3
AG3
AG2
AH2
C4
G6
J3
M6
AL6
AM8
AR12
AM15
D4
F6
K3
N6
AL5
AM9
AR11
AM14
AD10
W1
W2
W7
V3
V2
W3
W6
V1
W5
AD8
V4
W4
AF8
V5
V7
M_CLK_DDR#0
DDR_CKE0_DIMM2
M_CLK_DDR1
M_CLK_DDR#1
DDR_CKE1_DIMM2
M_CLK_DDR4
M_CLK_DDR#4
DDR_CKE4_DIMM1
M_CLK_DDR5
M_CLK_DDR#5
DDR_CKE5_DIMM1
DDR_CS0_DIMM2#
DDR_CS1_DIMM2#
DDR_CS4_DIMM1#
DDR_CS5_DIMM1#
M_ODT0
M_ODT4
M_ODT5
DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7
DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7
DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_MA14
DDR_A_MA15
M_CLK_DDR0 <13>
M_CLK_DDR#0 <13>
DDR_CKE0_DIMM2 <13>
M_CLK_DDR1 <13>
M_CLK_DDR#1 <13>
DDR_CKE1_DIMM2 <13>
M_CLK_DDR4 <12>
M_CLK_DDR#4 <12>
DDR_CKE4_DIMM1 <12>
M_CLK_DDR5 <12>
M_CLK_DDR#5 <12>
DDR_CKE5_DIMM1 <12>
DDR_CS0_DIMM2# <13>
DDR_CS1_DIMM2# <13>
DDR_CS4_DIMM1# <12>
DDR_CS5_DIMM1# <12>
M_ODT0 <13>
M_ODT1 <13>
M_ODT4 <12>
M_ODT5 <12>
DDR_A_DQS#[0..7] <12,13>
DDR_A_DQS[0..7] <12,13>
DDR_A_MA[0..15] <12,13>
DDR_B_D[0..63]<14,15>
DDR_B_BS0<14,15>
DDR_B_BS1<14,15>
DDR_B_BS2<14,15>
DDR_B_CAS#<14,15>
DDR_B_RAS#<14,15>
DDR_B_WE#<14,15>
DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63
DDR_B_BS0
DDR_B_BS1
DDR_B_BS2
DDR_B_CAS#
DDR_B_RAS#
DDR_B_WE#
AM5
AM6
AR3
AN3
AN2
AN1
AN9
AN8
AR6
AR5
AR9
AJ11
AH11
AR8
AJ12
AH12
AT11
AN14
AR14
AT14
AT12
AN15
AR15
AT15
AA10
C9
SB_DQ[0]
A7
SB_DQ[1]
D10
SB_DQ[2]
C8
SB_DQ[3]
A9
SB_DQ[4]
A8
SB_DQ[5]
D9
SB_DQ[6]
D8
SB_DQ[7]
G4
SB_DQ[8]
F4
SB_DQ[9]
F1
SB_DQ[10]
G1
SB_DQ[11]
G5
SB_DQ[12]
F5
SB_DQ[13]
F2
SB_DQ[14]
G2
SB_DQ[15]
J7
SB_DQ[16]
J8
SB_DQ[17]
K10
SB_DQ[18]
K9
SB_DQ[19]
J9
SB_DQ[20]
J10
SB_DQ[21]
K8
SB_DQ[22]
K7
SB_DQ[23]
M5
SB_DQ[24]
N4
SB_DQ[25]
N2
SB_DQ[26]
N1
SB_DQ[27]
M4
SB_DQ[28]
N5
SB_DQ[29]
M2
SB_DQ[30]
M1
SB_DQ[31]
SB_DQ[32]
SB_DQ[33]
SB_DQ[34]
AP3
SB_DQ[35]
SB_DQ[36]
SB_DQ[37]
SB_DQ[38]
AP2
SB_DQ[39]
AP5
SB_DQ[40]
SB_DQ[41]
AT5
SB_DQ[42]
AT6
SB_DQ[43]
AP6
SB_DQ[44]
SB_DQ[45]
SB_DQ[46]
SB_DQ[47]
SB_DQ[48]
SB_DQ[49]
AT8
SB_DQ[50]
AT9
SB_DQ[51]
SB_DQ[52]
SB_DQ[53]
SB_DQ[54]
SB_DQ[55]
SB_DQ[56]
SB_DQ[57]
SB_DQ[58]
SB_DQ[59]
SB_DQ[60]
SB_DQ[61]
SB_DQ[62]
SB_DQ[63]
AA9
SB_BS[0]
AA7
SB_BS[1]
R6
SB_BS[2]
SB_CAS#
AB8
SB_RAS#
AB9
SB_WE#
SB_CK[0]
SB_CLK#[0]
SB_CKE[0]
SB_CK[1]
SB_CLK#[1]
SB_CKE[1]
SB_CK[2]
SB_CLK#[2]
SB_CKE[2]
SB_CK[3]
SB_CLK#[3]
SB_CKE[3]
SB_CS#[0]
SB_CS#[1]
SB_CS#[2]
SB_CS#[3]
SB_ODT[0]
SB_ODT[1]
SB_ODT[2]
SB_ODT[3]
SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]
SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]
DDR SYSTEM MEMORY B
DDR SYSTEM MEMORY B
SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]
SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]
M_CLK_DDR0
AE2
AD2
R9
AE1
AD1
R10
AB2
AA2
T9
AA1
AB1
T10
AD3
AE3
AD6
AE6
AE4
AD4
AD5
AE5
D7
F3
K6
N3
AN5
AP9
AK12
AP15
C7
G3
J6
M3
AN6
AP8
AK11
AP14
AA8
T7
R7
T6
T2
T4
T3
R2
T5
R3
AB7
R1
T1
AB10
R5
R4
M_CLK_DDR2
M_CLK_DDR#2
DDR_CKE2_DIMM4
M_CLK_DDR3
M_CLK_DDR#3
DDR_CKE3_DIMM4
M_CLK_DDR6
M_CLK_DDR#6
DDR_CKE6_DIMM3
M_CLK_DDR7
M_CLK_DDR#7
DDR_CKE7_DIMM3
DDR_CS2_DIMM4#
DDR_CS3_DIMM4#
DDR_CS6_DIMM3#
DDR_CS7_DIMM3#
M_ODT2
M_ODT3M_ODT1
M_ODT6
M_ODT7
DDR_B_DQS#0
DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#5
DDR_B_DQS#6
DDR_B_DQS#7
DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7
DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
DDR_B_MA14
DDR_B_MA15
M_CLK_DDR2 <15>
M_CLK_DDR#2 <15>
DDR_CKE2_DIMM4 <15>
M_CLK_DDR3 <15>
M_CLK_DDR#3 <15>
DDR_CKE3_DIMM4 <15>
M_CLK_DDR6 <14>
M_CLK_DDR#6 <14>
DDR_CKE6_DIMM3 <14>
M_CLK_DDR7 <14>
M_CLK_DDR#7 <14>
DDR_CKE7_DIMM3 <14>
DDR_CS2_DIMM4# <15>
DDR_CS3_DIMM4# <15>
DDR_CS6_DIMM3# <14>
DDR_CS7_DIMM3# <14>
M_ODT2 <15>
M_ODT3 <15>
M_ODT6 <14>
M_ODT7 <14>
DDR_B_DQS#[0..7] <14,15>
DDR_B_DQS[0..7] <14,15>
DDR_B_MA[0..15] <14,15>
TYCO_2134146-3_IVYBRIDGE~D
TYCO_2134146-3_IVYBRIDGE~D
TYCO_2134146-3_IVYBRIDGE~D
TYCO_2134146-3_IVYBRIDGE~D
LInkCIS LInkCIS
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
Ivy Bridge (3/6)
Ivy Bridge (3/6)
Ivy Bridge (3/6)
LA-7933
LA-7933
LA-7933
865Monday, November 07, 2011
865Monday, November 07, 2011
865Monday, November 07, 2011
1
0.2
0.2
0.2
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of
of
Page 9
5
4
3
2
1
CFGStrapsforProcessor
CFG2
D D
JCPU1E
JCPU1E
T1 PAD~D@T1 PAD~D@
T2 PAD~D@T2 PAD~D@
T3 PAD~D@T3 PAD~D@
T4 PAD~D@T4 PAD~D@
T5 PAD~D@T5 PAD~D@
T6 PAD~D@T6 PAD~D@
T8 PAD~D@T8 PAD~D@
T10 PAD~D@T10 PAD~D@
T12 PAD~D@T12 PAD~D@
T14 PAD~D@T14 PAD~D@
T15 PAD~D@T15 PAD~D@
T16 PAD~D@T16 PAD~D@
T17 PAD~D@T17 PAD~D@
T19 PAD~D@T19 PAD~D@
T20 PAD~D@T20 PAD~D@
T21 PAD~D@T21 PAD~D@
T22 PAD~D@T22 PAD~D@
T23 PAD~D@T23 PAD~D@
T28 PAD~D@T28 PAD~D@
T30 PAD~D@T30 PAD~D@
T32 PAD~D@T32 PAD~D@
T34 PAD~D@T34 PAD~D@
T36 PAD~D@T36 PAD~D@
T42 PAD~D@T42 PAD~D@
T44 PAD~D@T44 PAD~D@
CLK_XDP_ITP <7>
CLK_XDP_ITP# <7>
T50 PAD~D@T50 PAD~D@
T51 PAD~D@T51 PAD~D@
T52 PAD~D@T52 PAD~D@
T53 PAD~D@T53 PAD~D@
RSVD28
RSVD29
RSVD30
RSVD31
RSVD32
RSVD33
RSVD34
RSVD35
RSVD37
RSVD38
RSVD39
RSVD40
RSVD51
RSVD52
BCLK_ITP
BCLK_ITP#
KEY
AH27
AH26
L7
AG7
AE7
AK2
W8
AT26
AM33
AJ27
T8
J16
H16
G16
AR35
AT34
AT33
AP35
AR34
B34
A33
A34
B35
C35
AJ32
AK32
AN35
AM35
AT2
AT1
AR1
B1
CFG0<7>
T60 PAD~D@T60 PAD~D@
T55 PAD~D@T55 PAD~D@
T64 PAD~D@T64 PAD~D@
T68 PAD~D@T68 PAD~D@
T69 PAD~D@T69 PAD~D@
T70 PAD~D@T70 PAD~D@
T7 PAD~D@T7 PAD~D@
+VCC_GFXCORE
1 2
+VCC_CORE
RC59 49.9_0402_1%~D@RC59 49.9_0402_1%~D@
RC61 49.9_0402_1%~D@RC61 49.9_0402_1%~D@
RC54 49.9_0402_1%~D@RC54 49.9_0402_1%~D@
RC56 49.9_0402_1%~D@RC56 49.9_0402_1%~D@
1 2
1 2
1 2
C C
B B
VAXG_VAL_SENSE
12
RC55
@RC55
@
100_0402_1%~D
100_0402_1%~D
VSSAXG_VAL_SENSE
VCC_VAL_SNESE
12
@RC60
@
100_0402_1%~D
100_0402_1%~D
VSS_VAL_SNESE
T9 PAD~D@T9 PAD~D@
T11 PAD~D@T11 PAD~D@
T13 PAD~D@T13 PAD~D@
T71 PAD~D@T71 PAD~D@
T72 PAD~D@T72 PAD~D@
T18PAD~D @T18PAD~D @
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
VAXG_VAL_SENSE
VSSAXG_VAL_SENSE
VCC_VAL_SNESE
VSS_VAL_SNESE
T24PAD~D @T24PAD~D @
T25PAD~D @T25PAD~D @
T26PAD~D @T26PAD~D @
T27PAD~D @T27PAD~D @
T29PAD~D @T29PAD~D @
T31PAD~D @T31PAD~D @
T33PAD~D @T33PAD~D @
T35PAD~D @T35PAD~D @
T37PAD~D @T37PAD~D @RC60
T38PAD~D @T38PAD~D @
T39PAD~D @T39PAD~D @
T40PAD~D @T40PAD~D @
T41PAD~D @T41PAD~D @
T43PAD~D @T43PAD~D @
T45PAD~D @T45PAD~D @
T46PAD~D @T46PAD~D @
T47PAD~D @T47PAD~D @
T48PAD~D @T48PAD~D @
T49PAD~D @T49PAD~D @
AK28
CFG[0]
AK29
CFG[1]
AL26
CFG[2]
AL27
CFG[3]
AK26
CFG[4]
AL29
CFG[5]
AL30
CFG[6]
AM31
CFG[7]
AM32
CFG[8]
AM30
CFG[9]
AM28
CFG[10]
AM26
CFG[11]
AN28
CFG[12]
AN31
CFG[13]
AN26
CFG[14]
AM27
CFG[15]
AK31
CFG[16]
AN29
CFG[17]
AJ31
VAXG_VAL_SENSE
AH31
VSSAXG_VAL_SENSE
AJ33
VCC_VAL_SENSE
AH33
VSS_VAL_SENSE
AJ26
RSVD5
F25
RSVD8
F24
RSVD9
F23
RSVD10
D24
RSVD11
G25
RSVD12
G24
RSVD13
E23
RSVD14
D23
RSVD15
C30
RSVD16
A31
RSVD17
B30
RSVD18
B29
RSVD19
D30
RSVD20
B31
RSVD21
A30
RSVD22
C29
RSVD23
J20
RSVD24
B18
RSVD25
J15
RSVD27
TYCO_2134146-3_IVYBRIDGE~D
TYCO_2134146-3_IVYBRIDGE~D
CFG
CFG
VCC_DIE_SENSE
VSS_DIE_SENSE
RSVD_NCTF1
RSVD_NCTF2
RSVD_NCTF3
RSVD_NCTF4
RSVD_NCTF5
RSVD_NCTF6
RSVD_NCTF7
RSVD_NCTF8
RESERVED
RESERVED
RSVD_NCTF9
RSVD_NCTF10
RSVD_NCTF11
RSVD_NCTF12
RSVD_NCTF13
PEGStaticLaneReversal‐CFG2isforthe16x
CFG2
CFG4
1:Disabled;NoPhysicalDisplayPort
CFG4
attachedtoEmbeddedDisplayPort
0:Enabled;AnexternalDisplayPortdeviceis
connectedtotheEmbeddedDisplayPort
CFG6
CFG5
11:(Default)x16‐Device1functions1and2disabled
10:x8,x8‐Device1function1enabled;function2
CFG[6:5]
disabled
01:Reserved‐(Device1function1disabled;function
2enabled)
00:x8,x4,x4‐Device1functions1and2enabled
LInkCIS
1K_0402_5%~D
1K_0402_5%~D
12
@RC52
@
RC52
1:(Default)NormalOperation;Lane#
definitionmatchessocketpinmapdefinition
0:LaneReversed
1K_0402_5%~D
1K_0402_5%~D
12
@
@
RC53
RC53
DisplayPortPresenceStrap
1K_0402_5%~D
1K_0402_5%~D
1K_0402_5%~D
1K_0402_5%~D
12
12
@RC57
@
@RC58
@
RC57
RC58
PCIEPortBifurcationStraps
CFG7
1K_0402_5%~D
1K_0402_5%~D
12
@RC62
@
RC62
PEGDEFERTRAINING
1:(Default)PEGTrainimmediately
followingxxRESETBdeassertion
CFG7
0:PEGWaitforBIOSfortraining
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
Ivy Bridge (4/6)
Ivy Bridge (4/6)
Ivy Bridge (4/6)
LA-7933
LA-7933
LA-7933
965Monday, November 07, 2011
965Monday, November 07, 2011
965Monday, November 07, 2011
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5
JCPU1F
JCPU1F
4
POWER
POWER
3
2
1
+VCC_CORE
97A
AG35
VCC1
AG34
VCC2
AG33
VCC3
AG32
D D
C C
B B
A A
AG31
AG30
AG29
AG28
AG27
AG26
AF35
AF34
AF33
AF32
AF31
AF30
AF29
AF28
AF27
AF26
AD35
AD34
AD33
AD32
AD31
AD30
AD29
AD28
AD27
AD26
AC35
AC34
AC33
AC32
AC31
AC30
AC29
AC28
AC27
AC26
AA35
AA34
AA33
AA32
AA31
AA30
AA29
AA28
AA27
AA26
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
Y35
VCC51
Y34
VCC52
Y33
VCC53
Y32
VCC54
Y31
VCC55
Y30
VCC56
Y29
VCC57
Y28
VCC58
Y27
VCC59
Y26
VCC60
V35
VCC61
V34
VCC62
V33
VCC63
V32
VCC64
V31
VCC65
V30
VCC66
V29
VCC67
V28
VCC68
V27
VCC69
V26
VCC70
U35
VCC71
U34
VCC72
U33
VCC73
U32
VCC74
U31
VCC75
U30
VCC76
U29
VCC77
U28
VCC78
U27
VCC79
U26
VCC80
R35
VCC81
R34
VCC82
R33
VCC83
R32
VCC84
R31
VCC85
R30
VCC86
R29
VCC87
R28
VCC88
R27
VCC89
R26
VCC90
P35
VCC91
P34
VCC92
P33
VCC93
P32
VCC94
P31
VCC95
P30
VCC96
P29
VCC97
P28
VCC98
P27
VCC99
P26
VCC100
CORE SUPPLY
CORE SUPPLY
SENSE LINES SVID
SENSE LINES SVID
VCCIO1
VCCIO2
VCCIO3
VCCIO4
VCCIO5
VCCIO6
VCCIO7
VCCIO8
VCCIO9
VCCIO10
VCCIO11
VCCIO12
VCCIO13
VCCIO14
VCCIO15
VCCIO16
VCCIO17
VCCIO18
VCCIO19
VCCIO20
VCCIO21
VCCIO22
VCCIO23
VCCIO24
VCCIO25
VCCIO26
VCCIO27
VCCIO28
VCCIO29
VCCIO30
VCCIO31
VCCIO32
PEG AND DDR
PEG AND DDR
VCCIO33
VCCIO34
VCCIO35
VCCIO36
VCCIO37
VCCIO38
VCCIO39
VCCIO40
VIDALERT#
VIDSCLK
VIDSOUT
VCC_SENSE
VSS_SENSE
VCCIO_SENSE
VSS_SENSE_VCCIO
8.5A
AH13
AH10
AG10
AC10
Y10
U10
P10
L10
J14
J13
J12
J11
H14
H12
H11
G14
G13
G12
F14
F13
F12
F11
E14
E12
E11
D14
D13
D12
D11
C14
C13
C12
C11
B14
B12
A14
A13
A12
A11
J23
AJ29
AJ30
AJ28
AJ35
AJ34
B10
A10
+1.05V_RUN_VTT
H_CPU_SVIDALRT#
VIDSCLK
VIDSOUT
VCCSENSE_R
VSSSENSE_R
+1.05V_RUN_VTT
VIDSCLK <58>
PlaceRC68,RC69nearCPU
RC68 0_0402_5%~DRC68 0_0402_5%~D
1 2
RC69 0_0402_5%~DRC69 0_0402_5%~D
10_0402_1%~D
10_0402_1%~D
12
1 2
RC72
RC72
12
RC7010_0402_1%~D RC7010_0402_1%~D
H_CPU_SVIDALRT#
130_0402_1%~D
130_0402_1%~D
12
RC65
RC65
VIDSOUT <58>
RC66
@RC66
@
1 2
100_0402_1%~D
100_0402_1%~D
+1.05V_RUN_VTT
VTT_SENSE <56>
VSSIO_SENSE_R <56>
+1.05V_RUN_VTT
75_0402_1%~D
75_0402_1%~D
12
1 2
RC64 43_0402_5%~DRC64 43_0402_5%~D
Note:PlacethePUresistorsclosetoCPU
RC63closetoCPU300‐1500mils
CADNote:PlacethePUresistorsclosetoCPU
RC65closetoCPU300‐1500mils
+VCC_CORE
100_0402_1%~D
100_0402_1%~D
12
RC67
RC67
VCCSENSE <58>
100_0402_1%~D
100_0402_1%~D
12
RC71
RC71
VSSSENSE <58>
RC63
RC63
VIDALERT_N <58>
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
TYCO_2134146-3_IVYBRIDGE~D
TYCO_2134146-3_IVYBRIDGE~D
LInkCIS
5
4
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
Ivy Bridge (5/6)
Ivy Bridge (5/6)
Ivy Bridge (5/6)
LA-7933
LA-7933
LA-7933
10 65Monday, November 07, 2011
10 65Monday, November 07, 2011
10 65Monday, November 07, 2011
1
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of
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5
4
3
2
1
+3.3V_ALW2
100K_0402_5%~D
100K_0402_5%~D
12
RC76
RC76
D D
RUN_ON_CPU1.5VS3#
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
RC82 0_0402_5%~D@RC82 0_0402_5%~D@
SIO_SLP_S3#<19,34,45,46,50,54>
CPU1.5V_S3_GATE<47>
C C
B B
+DIMM0_1_VREF_CPU
1 2
RC87 1K_0402_5%~D@RC87 1K_0402_5%~D@
1 2
RC88 1K_0402_5%~D@RC88 1K_0402_5%~D@
A A
+DIMM0_1_CA_CPU
+1.8V_RUN
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
2
1 2
RC83 0_0402_5%~DRC83 0_0402_5%~D
1 2
+VCC_GFXCORE
330U_D2_2.5VM_R6M~D
330U_D2_2.5VM_R6M~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CC89
CC89
1
1
+
+
CC90
CC90
2
2
CC88
CC88
1
2
33A
1.5A
CC91
CC91
AT24
AT23
AT21
AT20
AT18
AT17
AR24
AR23
AR21
AR20
AR18
AR17
AP24
AP23
AP21
AP20
AP18
AP17
AN24
AN23
AN21
AN20
AN18
AN17
AM24
AM23
AM21
AM20
AM18
AM17
AL24
AL23
AL21
AL20
AL18
AL17
AK24
AK23
AK21
AK20
AK18
AK17
AJ24
AJ23
AJ21
AJ20
AJ18
AJ17
AH24
AH23
AH21
AH20
AH18
AH17
B6
A6
A2
61
QC5A
QC5A
2
POWER
JCPU1G
JCPU1G
VAXG1
VAXG2
VAXG3
VAXG4
VAXG5
VAXG6
VAXG7
VAXG8
VAXG9
VAXG10
VAXG11
VAXG12
VAXG13
VAXG14
VAXG15
VAXG16
VAXG17
VAXG18
VAXG19
VAXG20
VAXG21
VAXG22
VAXG23
VAXG24
VAXG25
VAXG26
VAXG27
VAXG28
VAXG29
VAXG30
VAXG31
VAXG32
VAXG33
VAXG34
VAXG35
VAXG36
VAXG37
VAXG38
VAXG39
VAXG40
VAXG41
VAXG42
VAXG43
VAXG44
VAXG45
VAXG46
VAXG47
VAXG48
VAXG49
VAXG50
VAXG51
VAXG52
VAXG53
VAXG54
VCCPLL1
VCCPLL2
VCCPLL3
TYCO_2134146-3_IVYBRIDGE~D
TYCO_2134146-3_IVYBRIDGE~D
POWER
GRAPHICS
GRAPHICS
1.8V RAIL
1.8V RAIL
+PWR_SRC_S
100K_0402_5%~D
100K_0402_5%~D
RC73
RC73
5
RUN_ON_CPU1.5VS3# <7,50>
VAXG_SENSE
VSSAXG_SENSE
SENSE
LINES
SENSE
LINES
SA_DIMM_VREFDQ
SB_DIMM_VREFDQ
VREFMISC
VREFMISC
DDR3 -1.5V RAILS
DDR3 -1.5V RAILS
SA RAIL
SA RAIL
VCCSA_SENSE
VCCSA_VID[0]
VCCSA_VID[1]
LInkCIS
5
4
+1.5V_CPU_VDDQSource
+1.5V_MEM +1.5V_CPU_VDDQ
12
RUN_ON_CPU1.5VS3
3
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
QC5B
QC5B
4
+VCC_GFXCORE
AK35
AK34
AL1
SM_VREF
B4
D1
AF7
VDDQ1
AF4
VDDQ2
AF1
VDDQ3
AC7
VDDQ4
AC4
VDDQ5
AC1
VDDQ6
Y7
VDDQ7
Y4
VDDQ8
Y1
VDDQ9
U7
VDDQ10
U4
VDDQ11
U1
VDDQ12
P7
VDDQ13
P4
VDDQ14
P1
VDDQ15
6A
M27
VCCSA1
M26
VCCSA2
L26
VCCSA3
J26
VCCSA4
J25
VCCSA5
J24
VCCSA6
H26
VCCSA7
H25
VCCSA8
H23
C22
C24
A19
VCCIO_SEL
QC3
QC3
AO4728L_SO8~D
AO4728L_SO8~D
8
7
6
5
330K_0402_1%~D
330K_0402_1%~D
12
RC79
RC79
100_0402_1%~D
100_0402_1%~D
12
RC84
RC84
100_0402_1%~D
100_0402_1%~D
12
RC86
RC86
+V_SM_VREF_CNT
+DIMM0_1_VREF_CPU
+DIMM0_1_CA_CPU
Checkingagain
5A
VCCP_PWRCTRL_R
4
0.1U_0603_50V7K~D
0.1U_0603_50V7K~D
1
CC71
CC71
2
RC85
@RC85
@
1 2
100_0402_1%~D
100_0402_1%~D
+DIMM0_1_VREF_CPU
+DIMM0_1_CA_CPU
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CC75
CC75
1
1
2
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CC83
CC83
1
1
2
2
RC89 0_0402_5%~D@RC89 0_0402_5%~D@
CC80
CC80
+V_DDR_SMREF
1K_0402_1%~D
1K_0402_1%~D
12
@
@
RC78
RC78
1K_0402_1%~D
1K_0402_1%~D
12
@
@
RC80
RC80
RUN_ON_CPU1.5VS3
CC72 0.1U_0402_10V7K~DCC72 0.1U_0402_10V7K~D
CC73 0.1U_0402_10V7K~DCC73 0.1U_0402_10V7K~D
CC74 0.1U_0402_10V7K~DCC74 0.1U_0402_10V7K~D
330U_D2_2VM_R6M~D
330U_D2_2VM_R6M~D
CC82 0.1U_0402_10V7K~DCC82 0.1U_0402_10V7K~D
CC81
CC81
1
+
+
2
1 2
RC74 0_0402_5%~D@RC74 0_0402_5%~D@
QC4
@QC4
@
NTR4503NT1G_SOT23-3~D
NTR4503NT1G_SOT23-3~D
1
3
2
12
12
12
12
+1.5V_CPU_VDDQ
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CC79
CC79
1
1
2
2
330U_D2_2VM_R6M~D
330U_D2_2VM_R6M~D
1
CC87
CC87
+
+
2
VCCSA_SENSE <57>
VCCSA_VID_0 <57>
VCCSA_VID_1 <57>
VCCP_PWRCTRL <56>
+1.5V_MEM
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
2
10U_0805_6.3V6M~D
10U_0805_6.3V6M~D
3
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CC76
CC76
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CC84
CC84
1 2
20K_0402_5%~D
20K_0402_5%~D
12
1
@
@
RC77
RC77
CC70
CC70
2
VCC_AXG_SENSE <58>
VSS_AXG_SENSE <58>
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CC78
CC78
CC77
CC77
1
1
2
2
+VCC_SA
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
@
@
CC86
CC86
CC85
CC85
1
1
2
2
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
+1.5V_CPU_VDDQ
1K_0402_1%~D
1K_0402_1%~D
12
1K_0402_1%~D
1K_0402_1%~D
12
6A
+1.5V_MEM
2
RC75
RC75
+V_SM_VREF_CNT
RC81
RC81
JCPU1H
JCPU1H
AT35
VSS1
AT32
VSS2
AT29
VSS3
AT27
VSS4
AT25
VSS5
AT22
VSS6
AT19
VSS7
AT16
VSS8
AT13
VSS9
AT10
VSS10
AT7
VSS11
AT4
VSS12
AT3
VSS13
AR25
VSS14
AR22
VSS15
AR19
VSS16
AR16
VSS17
AR13
VSS18
AR10
VSS19
AR7
VSS20
AR4
VSS21
AR2
VSS22
AP34
VSS23
AP31
VSS24
AP28
VSS25
AP25
VSS26
AP22
VSS27
AP19
VSS28
AP16
VSS29
AP13
VSS30
AP10
VSS31
AP7
VSS32
AP4
VSS33
AP1
VSS34
AN30
VSS35
AN27
VSS36
AN25
VSS37
AN22
VSS38
AN19
VSS39
AN16
VSS40
AN13
VSS41
AN10
VSS42
AN7
VSS43
AN4
VSS44
AM29
VSS45
AM25
VSS46
AM22
VSS47
AM19
VSS48
AM16
VSS49
AM13
VSS50
AM10
VSS51
AM7
VSS52
AM4
VSS53
AM3
VSS54
AM2
VSS55
AM1
VSS56
AL34
VSS57
AL31
VSS58
AL28
VSS59
AL25
VSS60
AL22
VSS61
AL19
VSS62
AL16
VSS63
AL13
VSS64
AL10
VSS65
AL7
VSS66
AL4
VSS67
AL2
VSS68
AK33
VSS69
AK30
VSS70
AK27
VSS71
AK25
VSS72
AK22
VSS73
AK19
VSS74
AK16
VSS75
AK13
VSS76
AK10
VSS77
AK7
VSS78
AK4
VSS79
AJ25
VSS80
TYCO_2134146-3_IVYBRIDGE~D
TYCO_2134146-3_IVYBRIDGE~D
VSS
VSS
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
AJ22
AJ19
AJ16
AJ13
AJ10
AJ7
AJ4
AJ3
AJ2
AJ1
AH35
AH34
AH32
AH30
AH29
AH28
AH25
AH22
AH19
AH16
AH7
AH4
AG9
AG8
AG4
AF6
AF5
AF3
AF2
AE35
AE34
AE33
AE32
AE31
AE30
AE29
AE28
AE27
AE26
AE9
AD7
AC9
AC8
AC6
AC5
AC3
AC2
AB35
AB34
AB33
AB32
AB31
AB30
AB29
AB28
AB27
AB26
Y9
Y8
Y6
Y5
Y3
Y2
W35
W34
W33
W32
W31
W30
W29
W28
W27
W26
U9
U8
U6
U5
U3
U2
LInkCIS
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
Ivy Bridge (6/6)
Ivy Bridge (6/6)
Ivy Bridge (6/6)
LA-7933
LA-7933
LA-7933
11 65Monday, November 07, 2011
11 65Monday, November 07, 2011
11 65Monday, November 07, 2011
1
0.2
0.2
0.2
of
of
of
Page 12
5
AllVREFtracesshould
have10miltracewidth
PopulateRD1,De‐PopulateRD2forIntelDDR3
VREFDQmultiplemethodsM1
PopulateRD2,De‐PopulateRD1forIntelDDR3
VREFDQmultiplemethodsM3
D D
DDR_A_DQS#[0..7]<8,13>
DDR_A_DQS[0..7]<8,13>
DDR_A_D[0..63]<8,13>
DDR_A_MA[0..15]<8,13>
+1.5V_MEM
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
1
CD2
CD2
2
2
+1.5V_MEM
C C
B B
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CD8
CD8
CD7
CD7
1
1
2
2
LayoutNote:
PlacenearJDIMM1.203,204
+0.75V_DDR_VTT
1
1
CD3
CD3
CD4
CD4
2
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CD10
CD10
CD9
CD9
1
1
2
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
1
CD17
CD17
CD18
CD18
2
2
DIMMSelect
SA1
SA0
0
DIMM2
DIMM4
DIMM1 0
*
A A
DIMM3
0
0
1
1
1
1
+V_DDR_REFA_M3
+V_DDR_REF
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CD5
CD5
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CD11
CD11
CD19
CD19
+3.3V_RUN
10U_0603_6.3V6M~D
330U_SX_2VY~D
330U_SX_2VY~D
@CD13
@
1
CD12
CD12
CD13
CD14
1
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CD20
CD20
2
1 2
1 2
CD14
1
+
+
2
2
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
@RD9
@
RD8
RD8
RD9
1 2
DIMM1_SA0
DIMM1_SA1
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
RD13
RD13
@RD12
@
RD12
1 2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
2
4
1 2
RD1 0_0402_5%~DRD1 0_0402_5%~D
1 2
RD2 0_0402_5%~DRD2 0_0402_5%~D
+3.3V_RUN
1
2
1
2
DDR_CKE4_DIMM1<8>
M_CLK_DDR4<8>
M_CLK_DDR#4<8>
DDR_CS5_DIMM1#<8>
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
CD21
CD21
2
+DIMM1_VREF_DQ
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
CD1
CD1
CD6
CD6
2
DDR_A_BS2<8,13>
DDR_A_BS0<8,13>
DDR_A_WE#<8,13>
DDR_A_CAS#<8,13>
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
+0.75V_DDR_VTT
CD22
CD22
3
JDIMM1RevTypeH=9.2
+1.5V_MEM
DDR_A_D0
DDR_A_D1
DDR_A_D6
DDR_A_D7
DDR_A_D12
DDR_A_D13
DDR_A_DQS#1
DDR_A_DQS1
DDR_A_D10
DDR_A_D11
DDR_A_D20 DDR_A_D16
DDR_A_D21
DDR_A_DQS#2
DDR_A_DQS2
DDR_A_D18
DDR_A_D19
DDR_A_D29
DDR_A_D26
DDR_A_D27
DDR_A_BS2
DDR_A_MA12
DDR_A_MA9
DDR_A_MA8
DDR_A_MA5
DDR_A_MA3
DDR_A_MA1
M_CLK_DDR4
M_CLK_DDR#4
DDR_A_MA10
DDR_A_BS0
DDR_A_WE#
DDR_A_CAS#
DDR_A_MA13
DDR_A_D36
DDR_A_D37
DDR_A_DQS#4
DDR_A_DQS4
DDR_A_D34
DDR_A_D39
DDR_A_D41 DDR_A_D40
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D52
DDR_A_D53 DDR_A_D49
DDR_A_DQS#6
DDR_A_DQS6
DDR_A_D50
DDR_A_D51
DDR_A_D60
DDR_A_D56
DDR_A_D62
DDR_A_D63
DIMM1_SA0
DIMM1_SA1
JDIMM1
JDIMM1
VREF_DQ1VSS1
3
VSS2
5
DQ0
7
DQ1
VSS49DQS#0
11
DM0
13
VSS5
15
DQ2
17
DQ3
19
VSS7
21
DQ8
23
DQ9
VSS925VSS10
27
DQS#1
DQS129RESET#
VSS1131VSS12
33
DQ10
35
DQ11
VSS1337VSS14
39
DQ16
41
DQ17
VSS1543VSS16
45
DQS#2
DQS247VSS17
VSS1849DQ22
51
DQ18
DQ1953VSS19
VSS2055DQ28
57
DQ24
DQ2559VSS21
VSS2261DQS#3
63
DM3
VSS2365VSS24
67
DQ26
69
DQ27
VSS2571VSS26
73
CKE0
75
VDD1
77
NC1
79
BA2
81
VDD3
A12/BC#83A11
85
A9
87
VDD5
89
A8
91
A5
93
VDD7
95
A3
97
A1
VDD999VDD10
101
CK0
103
CK0#
105
VDD11
107
A10/AP
109
BA0
111
VDD13
113
WE#
115
CAS#
117
VDD15
119
A13
121
S1#
123
VDD17
125
NCTEST
127
VSS27
129
DQ32
131
DQ33
133
VSS29
135
DQS#4
137
DQS4
139
VSS32
141
DQ34
143
DQ35
145
VSS34
147
DQ40
149
DQ41
151
VSS36
153
DM5
155
VSS37
157
DQ42
159
DQ43
161
VSS39
163
DQ48
165
DQ49
167
VSS41
169
DQS#6
171
DQS6
173
VSS44
175
DQ50
177
DQ51
179
VSS46
181
DQ56
183
DQ57
185
VSS48
187
DM7
189
VSS49
191
DQ58
193
DQ59
195
VSS51
197
SA0
199
VDDSPD
201
SA1
203
VTT1
205
G1
TYCO_2-2013311-1
TYCO_2-2013311-1
VREF_CA
LinkCISOK
VSS3
DQS0
VSS6
VSS8
DQ12
DQ13
DQ14
DQ15
DQ20
DQ21
DQ23
DQ29
DQS3
DQ30
DQ31
CKE1
VDD2
VDD4
VDD6
VDD8
CK1#
VDD12
RAS#
VDD14
ODT0
VDD16
ODT1
VDD18
VSS28
DQ36
DQ37
VSS30
VSS31
DQ38
DQ39
VSS33
DQ44
DQ45
VSS35
DQS#5
DQS5
VSS38
DQ46
DQ47
VSS40
DQ52
DQ53
VSS42
VSS43
DQ54
DQ55
VSS45
DQ60
DQ61
VSS47
DQS#7
DQS7
VSS50
DQ62
DQ63
VSS52
EVENT#
VTT2
+1.5V_MEM
2
4
DQ4
6
DQ5
8
10
12
14
16
DQ6
18
DQ7
20
22
24
26
28
DM1
30
32
34
36
38
40
42
44
46
DM2
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
A15
80
A14
82
84
86
A7
88
90
A6
92
A4
94
96
A2
98
A0
100
102
CK1
104
106
108
BA1
110
112
114
S0#
116
118
120
122
NC2
124
126
128
130
132
134
136
DM4
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
DM6
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
SDA
202
SCL
204
206
G2
DDR_A_D4
DDR_A_D5
DDR_A_DQS#0
DDR_A_DQS0
DDR_A_D2
DDR_A_D3
DDR_A_D8
DDR_A_D9
DDR3_DRAMRST#_R
DDR_A_D14
DDR_A_D15
DDR_A_D17
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25DDR_A_D28
DDR_A_DQS#3
DDR_A_DQS3
DDR_A_D30
DDR_A_D31
DDR_A_MA15
DDR_A_MA14
DDR_A_MA11
DDR_A_MA7
DDR_A_MA6
DDR_A_MA4
DDR_A_MA2
DDR_A_MA0
M_CLK_DDR5
M_CLK_DDR#5
DDR_A_BS1
DDR_A_RAS#
M_ODT4
M_ODT5
DDR_A_D32
DDR_A_D33
DDR_A_D38
DDR_A_D35
DDR_A_D44
DDR_A_DQS#5
DDR_A_DQS5
DDR_A_D42
DDR_A_D43
DDR_A_D48
DDR_A_D54
DDR_A_D55
DDR_A_D61
DDR_A_D57
DDR_A_DQS#7
DDR_A_DQS7
DDR_A_D58
DDR_A_D59
DIMM1_SMBDAT
DIMM1_SMBCLK
+0.75V_DDR_VTT
DDR_CKE5_DIMM1 <8>
M_CLK_DDR5 <8>
M_CLK_DDR#5 <8>
DDR_A_BS1 <8,13>
DDR_A_RAS# <8,13>
DDR_CS4_DIMM1# <8>
M_ODT4 <8>
M_ODT5 <8>
RD10 0_0402_5%~DRD10 0_0402_5%~D
1 2
RD11 0_0402_5%~DRD11 0_0402_5%~D
1 2
+DIMM1_VREF_CA
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
1
2
2
DDR3_DRAMRST#_R<13,14,15> DDR3_DRAMRST# <7>
+DIMM0_1_VREF_CPU
DDR_HVREF_RST<7>
+DIMM0_1_CA_CPU
M3Circuit(ProcessorGeneratedSO‐DIMMVREF_DQ)
1 2
RD7 0_0402_5%~DRD7 0_0402_5%~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
CD15
CD15
CD16
CD16
1
2
DDR_XDP_WAN_SMBDAT <13,14,15,17,18,34,41>
DDR_XDP_WAN_SMBCLK <13,14,15,17,18,34,41>
CPU JDIMM1
JDIMM2 JDIMM4
1 2
RD3 1K_0402_1%~DRD3 1K_0402_1%~D
RD5 0_0402_5%~D@RD5 0_0402_5%~D@
1 2
S
S
G
G
2
RD6 0_0402_5%~D@RD6 0_0402_5%~D@
1 2
S
S
G
G
DDR_HVREF_RST
+V_DDR_REF
2
JDIMM3
+1.5V_MEM
1K_0402_1%~D
1K_0402_1%~D
12
RD4
RD4
D
D
13
QD1
QD1
BSS138-G_SOT23-3
BSS138-G_SOT23-3
D
D
13
QD2
QD2
BSS138-G_SOT23-3
BSS138-G_SOT23-3
1
TopSide
BottomSide
+V_DDR_REFA_M3
+V_DDR_REFB_M3
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
DDRIII-SODIMM SLOT1
DDRIII-SODIMM SLOT1
DDRIII-SODIMM SLOT1
LA-7933
LA-7933
LA-7933
12 65Monday, November 07, 2011
12 65Monday, November 07, 2011
12 65Monday, November 07, 2011
1
0.2
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of
of
Page 13
5
4
3
2
1
AllVREFtracesshould
have10miltracewidth
+V_DDR_REFA_M3
DDR_A_DQS#[0..7]<8,12>
DDR_A_DQS[0..7]<8,12>
D D
C C
DDR_A_D[0..63]<8,12>
DDR_A_MA[0..15]<8,12>
+1.5V_MEM
1
2
+1.5V_MEM
1
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CD29
CD29
1
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CD25
CD25
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CD26
CD26
2
CD30
CD30
1
2
1U_0402_6.3V6K~D
1
1
CD27
CD27
CD28
CD28
2
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CD31
CD31
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CD33
CD33
CD32
CD32
1
1
1
2
2
2
+V_DDR_REF
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
330U_SX_2VY~D
330U_SX_2VY~D
@CD35
@
1
CD34
CD34
CD35
1
+
+
2
2
RD14 0_0402_5%~DRD14 0_0402_5%~D
RD15 0_0402_5%~DRD15 0_0402_5%~D
CD36
CD36
1 2
1 2
LayoutNote:
PlacenearJDIMM2.Pin203,204
+0.75V_DDR_VTT
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
1
2
B B
DIMMSelect
SA0
0
DIMM2
*
A A
0
DIMM4
1
DIMM1 0
1
DIMM3
SA1
CD38
CD38
CD37
CD37
2
+3.3V_RUN
0
1
1
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CD39
CD39
2
10K_0402_5%~D
10K_0402_5%~D
RD17
RD17
1 2
10K_0402_5%~D
10K_0402_5%~D
RD19
RD19
1 2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
2
10K_0402_5%~D
10K_0402_5%~D
@
@
1 2
1 2
CD40
CD40
@
@
RD18
RD18
DIMM2_SA0
DIMM2_SA1
10K_0402_5%~D
10K_0402_5%~D
RD20
RD20
+3.3V_RUN
1
2
+DIMM2_VREF_DQ
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
CD24
CD24
1
1
CD23
CD23
2
2
DDR_CKE0_DIMM2<8>
DDR_A_BS2<8,12>
M_CLK_DDR0<8>
M_CLK_DDR#0<8>
DDR_A_BS0<8,12>
DDR_A_WE#<8,12>
DDR_A_CAS#<8,12>
DDR_CS1_DIMM2#<8>
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
1
+0.75V_DDR_VTT +0.75V_DDR_VTT
CD43
CD43
CD44
CD44
2
JDIMM2RevTypeH=5.2
VSS3
DQS#0
DQS0
VSS6
VSS8
DQ12
DQ13
VSS10
DQ14
DQ15
DQ20
DQ21
DQ23
DQ29
DQS3
DQ30
DQ31
CKE1
VDD2
VDD4
VDD6
VDD8
CK1#
VDD12
RAS#
VDD14
ODT0
VDD16
ODT1
VDD18
VSS28
DQ36
DQ37
VSS30
VSS31
DQ38
DQ39
VSS33
DQ44
DQ45
VSS35
DQS#5
DQS5
VSS38
DQ46
DQ47
VSS40
DQ52
DQ53
VSS42
VSS43
DQ54
DQ55
VSS45
DQ60
DQ61
VSS47
DQS#7
DQS7
VSS50
DQ62
DQ63
VSS52
VTT2
DQ4
DQ5
DQ6
DQ7
DM1
DM2
CK1
BA1
NC2
DM4
DM6
SDA
SCL
+1.5V_MEM
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
A15
80
A14
82
84
A11
86
A7
88
90
A6
92
A4
94
96
A2
98
A0
100
102
104
106
108
110
112
114
S0#
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
206
G2
DDR_A_D0
DDR_A_D1
DDR_A_DQS#0
DDR_A_DQS0
DDR_A_D6
DDR_A_D7
DDR_A_D12
DDR_A_D13
DDR_A_D11
DDR_A_D20
DDR_A_D21
DDR_A_D18
DDR_A_D19
DDR_A_D28
DDR_A_D29
DDR_A_DQS#3
DDR_A_DQS3
DDR_A_D26
DDR_A_D27DDR_A_D31
DDR_A_MA15
DDR_A_MA14
DDR_A_MA11
DDR_A_MA7
DDR_A_MA6
DDR_A_MA4
DDR_A_MA2
DDR_A_MA0
M_CLK_DDR1
M_CLK_DDR#1
DDR_A_BS1
DDR_A_RAS#
M_ODT0DDR_A_CAS#
M_ODT1
DDR_A_D36
DDR_A_D37
DDR_A_D34
DDR_A_D39
DDR_A_D41
DDR_A_D45
DDR_A_DQS#5
DDR_A_DQS5
DDR_A_D46
DDR_A_D47
DDR_A_D52
DDR_A_D53
DDR_A_D50
DDR_A_D51
DDR_A_D60
DDR_A_DQS#7
DDR_A_DQS7
DDR_A_D62
DDR_A_D63
DIMM2_SMBDAT
DIMM2_SMBCLK
+1.5V_MEM
DDR_A_D4
DDR_A_D5
DDR_A_D2
DDR_A_D3
DDR_A_D8
DDR_A_D9
DDR_A_DQS#1
DDR_A_DQS1
DDR_A_D14 DDR_A_D10
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_DQS#2
DDR_A_DQS2
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D30
DDR_A_BS2
DDR_A_MA12
DDR_A_MA9
DDR_A_MA8
DDR_A_MA5
DDR_A_MA3
DDR_A_MA1
M_CLK_DDR0
M_CLK_DDR#0
DDR_A_MA10
DDR_A_BS0
DDR_A_WE#
DDR_A_MA13
DDR_A_D32
DDR_A_D33
DDR_A_DQS#4
DDR_A_DQS4
DDR_A_D38
DDR_A_D35
DDR_A_D44
DDR_A_D40
DDR_A_D42
DDR_A_D43
DDR_A_D48
DDR_A_D49
DDR_A_DQS#6
DDR_A_DQS6
DDR_A_D54
DDR_A_D55
DDR_A_D61 DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DIMM2_SA0
DIMM2_SA1
JDIMM2
JDIMM2
VREF_DQ1VSS1
3
VSS2
5
DQ0
7
DQ1
9
VSS4
11
DM0
13
VSS5
15
DQ2
17
DQ3
19
VSS7
21
DQ8
23
DQ9
25
VSS9
27
DQS#1
DQS129RESET#
VSS1131VSS12
33
DQ10
35
DQ11
VSS1337VSS14
39
DQ16
41
DQ17
VSS1543VSS16
45
DQS#2
DQS247VSS17
VSS1849DQ22
51
DQ18
DQ1953VSS19
VSS2055DQ28
57
DQ24
DQ2559VSS21
VSS2261DQS#3
63
DM3
VSS2365VSS24
67
DQ26
69
DQ27
VSS2571VSS26
73
CKE0
75
VDD1
77
NC1
79
BA2
81
VDD3
83
A12/BC#
85
A9
87
VDD5
89
A8
91
A5
93
VDD7
95
A3
97
A1
VDD999VDD10
101
CK0
103
CK0#
105
VDD11
107
A10/AP
109
BA0
111
VDD13
113
WE#
115
CAS#
117
VDD15
119
A13
121
S1#
123
VDD17
125
NCTEST
127
VSS27
129
DQ32
131
DQ33
133
VSS29
135
DQS#4
137
DQS4
139
VSS32
141
DQ34
143
DQ35
145
VSS34
147
DQ40
149
DQ41
151
VSS36
153
DM5
155
VSS37
157
DQ42
159
DQ43
161
VSS39
163
DQ48
165
DQ49
167
VSS41
169
DQS#6
171
DQS6
173
VSS44
175
DQ50
177
DQ51
179
VSS46
181
DQ56
183
DQ57
185
VSS48
187
DM7
189
VSS49
191
DQ58
193
DQ59
195
VSS51
197
SA0
199
VDDSPD
201
SA1
203
VTT1
205
G1
TYCO_2-2013290-1
TYCO_2-2013290-1
VREF_CA
EVENT#
LInkCIS
DDR3_DRAMRST#_R <12,14,15>
DDR_CKE1_DIMM2 <8>
M_CLK_DDR1 <8>
M_CLK_DDR#1 <8>
DDR_A_BS1 <8,12>
DDR_A_RAS# <8,12>
DDR_CS0_DIMM2# <8>
M_ODT0 <8>
M_ODT1 <8>
RD21 0_0402_5%~DRD21 0_0402_5%~D
1 2
RD22 0_0402_5%~DRD22 0_0402_5%~D
1 2
+DIMM2_VREF_CA
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
1
2
CPU
JDIMM2
1 2
RD16 0_0402_5%~DRD16 0_0402_5%~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
CD41
CD41
CD42
CD42
1
2
DDR_XDP_WAN_SMBDAT <12,14,15,17,18,34,41>
DDR_XDP_WAN_SMBCLK <12,14,15,17,18,34,41>
JDIMM1
+V_DDR_REF
JDIMM3
JDIMM4
TopSide
BottomSide
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
DDRIII-SODIMM SLOT2
DDRIII-SODIMM SLOT2
DDRIII-SODIMM SLOT2
LA-7933
LA-7933
LA-7933
1
13 65Monday, November 07, 2011
13 65Monday, November 07, 2011
13 65Monday, November 07, 2011
0.2
0.2
0.2
of
of
of
Page 14
5
DDR_B_DQS#[0..7]<8,15>
DDR_B_DQS[0..7]<8,15>
DDR_B_D[0..63]<8,15>
D D
C C
DDR_B_MA[0..15]<8,15>
+1.5V_MEM
1
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CD51
CD51
+1.5V_MEM
1
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CD52
CD52
1
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CD50
CD50
1
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CD53
CD53
1
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
1
CD48
CD46
CD46
CD48
CD47
CD47
2
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CD55
CD55
CD54
CD54
1
1
2
2
+V_DDR_REFB_M3
+V_DDR_REF
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
330U_SX_2VY~D
330U_SX_2VY~D
@CD57
@
1
CD58
CD58
CD57
CD56
CD56
1
+
+
2
2
LayoutNote:
PlacenearJDIMM3.Pin203,204
+0.75V_DDR_VTT
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CD59
CD59
2
B B
DIMMSelect
SA0
0
DIMM2
0
DIMM4
1
DIMM1 0
1
DIMM3
*
A A
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
2
SA1
0
1
1
1U_0402_6.3V6K~D
1
1
CD60
CD60
CD61
CD61
CD62
CD62
2
2
+3.3V_RUN
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
RD27
RD27
RD26
RD26
1 2
1 2
DIMM3_SA0
DIMM3_SA1
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
@RD28
@
@RD29
@
RD29
RD28
1 2
1 2
4
AllVREFtracesshould
have10miltracewidth
1 2
RD23 0_0402_5%~DRD23 0_0402_5%~D
1 2
RD24 0_0402_5%~DRD24 0_0402_5%~D
+DIMM3_VREF_DQ
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
CD49
CD49
1
2
DDR_CKE6_DIMM3<8>
DDR_B_BS2<8,15>
M_CLK_DDR6<8>
M_CLK_DDR#6<8>
DDR_B_BS0<8,15>
DDR_B_WE#<8,15>
DDR_B_CAS#<8,15>
DDR_CS7_DIMM3#<8>
+3.3V_RUN
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
CD65
CD65
2
3
JDIMM3RevTypeH=5.2
JDIMM3
JDIMM3
VREF_DQ1VSS1
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
DDR_B_D5 DDR_B_D4
DDR_B_D1
CD45
CD45
1
2
DDR_B_D7
DDR_B_D3
DDR_B_D9
DDR_B_DQS#1
DDR_B_DQS1
DDR_B_D14
DDR_B_D15
DDR_B_D20
DDR_B_D21
DDR_B_DQS#2
DDR_B_DQS2
DDR_B_D18
DDR_B_D19
DDR_B_D28
DDR_B_D24
DDR_B_D30
DDR_B_D31 DDR_B_D27
DDR_B_BS2
DDR_B_MA12
DDR_B_MA9
DDR_B_MA8
DDR_B_MA5
DDR_B_MA3
DDR_B_MA1
M_CLK_DDR6
M_CLK_DDR#6
DDR_B_MA10
DDR_B_BS0
DDR_B_WE#
DDR_B_CAS#
DDR_B_MA13
DDR_B_D36
DDR_B_D37
DDR_B_DQS#4
DDR_B_DQS4
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D46 DDR_B_D42
DDR_B_D47
DDR_B_D52
DDR_B_D53
DDR_B_DQS#6
DDR_B_DQS6
DDR_B_D50
DDR_B_D51
DDR_B_D61
DDR_B_D62 DDR_B_D58
DDR_B_D63
DIMM3_SA0
DIMM3_SA1
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
+0.75V_DDR_VTT
1
CD66
CD66
2
3
VSS2
5
DQ0
7
DQ1
VSS49DQS#0
11
DM0
13
VSS5
15
DQ2
17
DQ3
19
VSS7
21
DQ8
23
DQ9
VSS925VSS10
27
DQS#1
DQS129RESET#
VSS1131VSS12
33
DQ10
35
DQ11
VSS1337VSS14
39
DQ16
41
DQ17
VSS1543VSS16
45
DQS#2
DQS247VSS17
49
VSS18
51
DQ18
DQ1953VSS19
55
VSS20
57
DQ24
DQ2559VSS21
VSS2261DQS#3
63
DM3
VSS2365VSS24
67
DQ26
69
DQ27
VSS2571VSS26
73
CKE0
75
VDD1
77
NC1
79
BA2
81
VDD3
A12/BC#83A11
85
A9
87
VDD5
89
A8
91
A5
93
VDD7
95
A3
97
A1
VDD999VDD10
101
CK0
103
CK0#
105
VDD11
107
A10/AP
109
BA0
111
VDD13
113
WE#
115
CAS#
117
VDD15
119
A13
121
S1#
123
VDD17
125
NCTEST
127
VSS27
129
DQ32
131
DQ33
133
VSS29
135
DQS#4
137
DQS4
139
VSS32
141
DQ34
143
DQ35
145
VSS34
147
DQ40
149
DQ41
151
VSS36
153
DM5
155
VSS37
157
DQ42
159
DQ43
161
VSS39
163
DQ48
165
DQ49
167
VSS41
169
DQS#6
171
DQS6
173
VSS44
175
DQ50
177
DQ51
179
VSS46
181
DQ56
183
DQ57
185
VSS48
187
DM7
189
VSS49
191
DQ58
193
DQ59
195
VSS51
197
SA0
199
VDDSPD
201
SA1
203
VTT1
205
G1
TYCO_2-2013290-1
TYCO_2-2013290-1
LInkCIS
DQ4
DQ5
VSS3
DQS0
VSS6
DQ6
DQ7
VSS8
DQ12
DQ13
DM1
DQ14
DQ15
DQ20
DQ21
DM2
DQ22
DQ23
DQ28
DQ29
DQS3
DQ30
DQ31
CKE1
VDD2
VDD4
VDD6
VDD8
CK1
CK1#
VDD12
RAS#
VDD14
ODT0
VDD16
ODT1
NC2
VDD18
VREF_CA
VSS28
DQ36
DQ37
VSS30
DM4
VSS31
DQ38
DQ39
VSS33
DQ44
DQ45
VSS35
DQS#5
DQS5
VSS38
DQ46
DQ47
VSS40
DQ52
DQ53
VSS42
DM6
VSS43
DQ54
DQ55
VSS45
DQ60
DQ61
VSS47
DQS#7
DQS7
VSS50
DQ62
DQ63
VSS52
EVENT#
SDA
SCL
VTT2
A15
A14
A7
A6
A4
A2
A0
BA1
S0#
G2
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
206
+1.5V_MEM+1.5V_MEM
DDR_B_D0
DDR_B_DQS#0
DDR_B_DQS0
DDR_B_D2
DDR_B_D6
DDR_B_D8DDR_B_D13
DDR_B_D12
DDR3_DRAMRST#_R
DDR_B_D10
DDR_B_D11
DDR_B_D16
DDR_B_D17
DDR_B_D22
DDR_B_D23
DDR_B_D25
DDR_B_D29
DDR_B_DQS#3
DDR_B_DQS3
DDR_B_D26
DDR_B_MA15
DDR_B_MA14
DDR_B_MA11
DDR_B_MA7
DDR_B_MA6
DDR_B_MA4
DDR_B_MA2
DDR_B_MA0
M_CLK_DDR7
M_CLK_DDR#7
DDR_B_BS1
DDR_B_RAS#
M_ODT6
M_ODT7
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D44
DDR_B_D45
DDR_B_DQS#5
DDR_B_DQS5
DDR_B_D43
DDR_B_D48
DDR_B_D49
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57DDR_B_D60
DDR_B_DQS#7
DDR_B_DQS7
DDR_B_D59
DIMM3_SMBDAT
DIMM3_SMBCLK
+0.75V_DDR_VTT
2
DDR3_DRAMRST#_R <12,13,15>
DDR_CKE7_DIMM3 <8>
M_CLK_DDR7 <8>
M_CLK_DDR#7 <8>
DDR_B_BS1 <8,15>
DDR_B_RAS# <8,15>
DDR_CS6_DIMM3# <8>
M_ODT6 <8>
M_ODT7 <8>
RD30 0_0402_5%~DRD30 0_0402_5%~D
RD31 0_0402_5%~DRD31 0_0402_5%~D
1 2
1 2
+DIMM3_VREF_CA
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
CD63
CD63
1
2
CPU
JDIMM2
1 2
RD25 0_0402_5%~DRD25 0_0402_5%~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
CD64
CD64
1
2
DDR_XDP_WAN_SMBDAT <12,13,15,17,18,34,41>
DDR_XDP_WAN_SMBCLK <12,13,15,17,18,34,41>
JDIMM1
+V_DDR_REF
JDIMM3
JDIMM4
1
TopSide
BottomSide
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
DDRIII-SODIMM SLOT3
DDRIII-SODIMM SLOT3
DDRIII-SODIMM SLOT3
LA-7933
LA-7933
LA-7933
1
14 65Monday, November 07, 2011
14 65Monday, November 07, 2011
14 65Monday, November 07, 2011
0.2
0.2
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of
of
Page 15
5
DDR_B_DQS#[0..7]<8,14>
DDR_B_DQS[0..7]<8,14>
DDR_B_D[0..63]<8,14>
DDR_B_MA[0..15]<8,14>
D D
+1.5V_MEM
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
1
CD71
CD71
CD70
CD70
2
2
+1.5V_MEM
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
2
C C
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CD73
CD73
CD75
CD75
CD74
CD74
1
1
2
1
2
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
1
CD72
CD72
CD69
CD69
2
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CD77
CD77
CD78
CD76
CD76
CD78
1
1
2
2
+V_DDR_REFB_M3
+V_DDR_REF
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
330U_SX_2VY~D
330U_SX_2VY~D
@CD79
@
1
CD80
CD80
CD79
1
+
+
2
2
LayoutNote:
PlacenearJDIMM4.Pin203,204
+0.75V_DDR_VTT
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
2
CD83
CD83
+3.3V_RUN
1U_0402_6.3V6K~D
1
CD84
CD84
2
10K_0402_5%~D
10K_0402_5%~D
@
@
RD35
RD35
1 2
10K_0402_5%~D
10K_0402_5%~D
RD37
RD37
1 2
10K_0402_5%~D
10K_0402_5%~D
RD36
RD36
1 2
DIMM4_SA0
DIMM4_SA1
10K_0402_5%~D
10K_0402_5%~D
@
@
RD38
RD38
1 2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
1
2
B B
CD82
CD82
CD81
CD81
2
DIMMSelect
SA1
SA0
0
DIMM2
DIMM4
*
DIMM1 0
DIMM3
A A
0
0
1
1
1
1
4
AllVREFtracesshould
have10miltracewidth
1 2
RD32 0_0402_5%~DRD32 0_0402_5%~D
1 2
RD33 0_0402_5%~DRD33 0_0402_5%~D
+DIMM4_VREF_DQ
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
CD67
CD67
1
1
2
2
DDR_CKE2_DIMM4<8>
DDR_B_BS2<8,14>
M_CLK_DDR2<8>
M_CLK_DDR#2<8>
DDR_B_BS0<8,14>
DDR_B_WE#<8,14>
DDR_B_CAS#<8,14>
DDR_CS3_DIMM4#<8>
+3.3V_RUN
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
CD87
CD87
2
3
JDIMM4STDTypeH=5.2
JDIMM4
JDIMM4
VREF_DQ1VSS1
3
DDR_B_D0
DDR_B_D4
CD68
CD68
DDR_B_D2
DDR_B_D6
DDR_B_D8
DDR_B_D12 DDR_B_D9
DDR_B_DQS#1
DDR_B_DQS1
DDR_B_D10
DDR_B_D11
DDR_B_D16
DDR_B_D17
DDR_B_DQS#2
DDR_B_DQS2
DDR_B_D22
DDR_B_D23
DDR_B_D29
DDR_B_D26
DDR_B_D27
DDR_B_BS2
DDR_B_MA12
DDR_B_MA9
DDR_B_MA8
DDR_B_MA5
DDR_B_MA3
DDR_B_MA1
M_CLK_DDR2
M_CLK_DDR#2
DDR_B_MA10
DDR_B_BS0
DDR_B_WE#
DDR_B_CAS#
DDR_B_MA13
DDR_B_D32
DDR_B_D33
DDR_B_DQS#4
DDR_B_DQS4
DDR_B_D34
DDR_B_D35
DDR_B_D44
DDR_B_D45
DDR_B_D42
DDR_B_D43
DDR_B_D48
DDR_B_D49
DDR_B_DQS#6
DDR_B_DQS6
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DIMM4_SA0
DIMM4_SA1
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
+0.75V_DDR_VTT
1
CD88
CD88
2
VSS2
5
DQ0
7
DQ1
VSS49DQS#0
11
DM0
13
VSS5
15
DQ2
17
DQ3
19
VSS7
21
DQ8
23
DQ9
25
VSS9
27
DQS#1
DQS129RESET#
VSS1131VSS12
33
DQ10
35
DQ11
VSS1337VSS14
39
DQ16
41
DQ17
VSS1543VSS16
45
DQS#2
DQS247VSS17
VSS1849DQ22
51
DQ18
DQ1953VSS19
VSS2055DQ28
57
DQ24
DQ2559VSS21
VSS2261DQS#3
63
DM3
VSS2365VSS24
67
DQ26
69
DQ27
VSS2571VSS26
73
CKE0
75
VDD1
77
NC1
79
BA2
81
VDD3
A12/BC#83A11
85
A9
87
VDD5
89
A8
91
A5
93
VDD7
95
A3
97
A1
VDD999VDD10
101
CK0
103
CK0#
105
VDD11
107
A10/AP
109
BA0
111
VDD13
113
WE#
115
CAS#
117
VDD15
119
A13
121
S1#
123
VDD17
125
NCTEST
127
VSS27
129
DQ32
131
DQ33
133
VSS29
135
DQS#4
137
DQS4
139
VSS32
141
DQ34
143
DQ35
145
VSS34
147
DQ40
149
DQ41
151
VSS36
153
DM5
155
VSS37
157
DQ42
159
DQ43
161
VSS39
163
DQ48
165
DQ49
167
VSS41
169
DQS#6
171
DQS6
173
VSS44
175
DQ50
177
DQ51
179
VSS46
181
DQ56
183
DQ57
185
VSS48
187
DM7
189
VSS49
191
DQ58
193
DQ59
195
VSS51
197
SA0
199
VDDSPD
201
SA1
203
VTT1
205
G1
TYCO_2-2013289-1~D
TYCO_2-2013289-1~D
LInkCIS
VSS3
DQS0
VSS6
VSS8
DQ12
DQ13
VSS10
DQ14
DQ15
DQ20
DQ21
DQ23
DQ29
DQS3
DQ30
DQ31
CKE1
VDD2
VDD4
VDD6
VDD8
CK1#
VDD12
RAS#
VDD14
ODT0
VDD16
ODT1
VDD18
VREF_CA
VSS28
DQ36
DQ37
VSS30
VSS31
DQ38
DQ39
VSS33
DQ44
DQ45
VSS35
DQS#5
DQS5
VSS38
DQ46
DQ47
VSS40
DQ52
DQ53
VSS42
VSS43
DQ54
DQ55
VSS45
DQ60
DQ61
VSS47
DQS#7
DQS7
VSS50
DQ62
DQ63
VSS52
EVENT#
VTT2
DQ4
DQ5
DQ6
DQ7
DM1
DM2
CK1
NC2
DM4
DM6
SDA
SCL
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
A15
80
A14
82
84
86
A7
88
90
A6
92
A4
94
96
A2
98
A0
100
102
104
106
108
BA1
110
112
114
S0#
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
206
G2
+1.5V_MEM+1.5V_MEM
DDR_B_D5
DDR_B_D1
DDR_B_DQS#0
DDR_B_DQS0
DDR_B_D7
DDR_B_D3
DDR_B_D13
DDR3_DRAMRST#_R
DDR_B_D14
DDR_B_D15
DDR_B_D20
DDR_B_D21
DDR_B_D18
DDR_B_D19
DDR_B_D28
DDR_B_D24DDR_B_D25
DDR_B_DQS#3
DDR_B_DQS3
DDR_B_D30
DDR_B_D31
DDR_B_MA15
DDR_B_MA14
DDR_B_MA11
DDR_B_MA7
DDR_B_MA6
DDR_B_MA4
DDR_B_MA2
DDR_B_MA0
M_CLK_DDR3
M_CLK_DDR#3
DDR_B_BS1
DDR_B_RAS#
M_ODT2
M_ODT3
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_DQS#5
DDR_B_DQS5
DDR_B_D46
DDR_B_D47
DDR_B_D52
DDR_B_D53
DDR_B_D50
DDR_B_D51
DDR_B_D60
DDR_B_D61
DDR_B_DQS#7
DDR_B_DQS7
DDR_B_D62
DDR_B_D63
DIMM4_SMBDAT
DIMM4_SMBCLK
+0.75V_DDR_VTT
2
DDR3_DRAMRST#_R <12,13,14>
DDR_CKE3_DIMM4 <8>
M_CLK_DDR3 <8>
M_CLK_DDR#3 <8>
DDR_B_BS1 <8,14>
DDR_B_RAS# <8,14>
DDR_CS2_DIMM4# <8>
M_ODT2 <8>
M_ODT3 <8>
RD39 0_0402_5%~DRD39 0_0402_5%~D
RD40 0_0402_5%~DRD40 0_0402_5%~D
1 2
1 2
+DIMM4_VREF_CA
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
CD85
CD85
1
2
CPU
1 2
RD34 0_0402_5%~DRD34 0_0402_5%~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
CD86
CD86
1
2
DDR_XDP_WAN_SMBDAT <12,13,14,17,18,34,41>
DDR_XDP_WAN_SMBCLK <12,13,14,17,18,34,41>
JDIMM2
JDIMM1
+V_DDR_REF
1
JDIMM3
JDIMM4
TopSide
BottomSide
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
DDRIII-SODIMM SLOT4
DDRIII-SODIMM SLOT4
DDRIII-SODIMM SLOT4
LA-7933
LA-7933
LA-7933
1
15 65Monday, November 07, 2011
15 65Monday, November 07, 2011
15 65Monday, November 07, 2011
0.2
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of
of
Page 16
5
PEG_CRX_GTX_C_P[0..15]<6>
PEG_CRX_GTX_C_N[0..15]<6>
PEG_CTX_GRX_P[0..15]<6>
PEG_CTX_GRX_N[0..15]<6>
D D
PEG_CRX_GTX_C_P[0..15]
PEG_CRX_GTX_C_N[0..15]
PEG_CTX_GRX_P[0..15]
PEG_CTX_GRX_N[0..15]
4
+3.3V_MXM
MXM_CRT_DDC_DAT
1 2
R3 4.3K_0402_5%@R3 4.3K_0402_5%@
MXM_CRT_DDC_CLK
1 2
R5 4.3K_0402_5%@R5 4.3K_0402_5%@
DGPU_PWR_GOOD
1 2
R8 10K_0402_5%~DR8 10K_0402_5%~D
MXM_CLK_REQ#
1 2
R7 10K_0402_5%~DR7 10K_0402_5%~D
MXM_ALERT#
3
+3.3V_MXM
10K_0402_5%~DR410K_0402_5%~D
12
R4
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
2
+3.3V_MXM
+3.3V_MXM
4.7K_0402_5%~D
4.7K_0402_5%~D
4.7K_0402_5%~D
4.7K_0402_5%~D
12
12
@
@
@
@
R2
R2
R1
R1
G
G
2
13
DGPU_ALERT# <46>
D
S
D
S
Q5
Q5
GPU_SMBDAT_R
GPU_SMBCLK_R
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
2
Q295A
Q295A
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
354
Q295B
Q295B
61
GPU_SMBDAT <47>
GPU_SMBCLK <47>
1
+MXM_PWR_SRC
+5V_MXM
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
0.1U_0402_16V4Z~DC70.1U_0402_16V4Z~D
C328
C328
1
1
C7
2
+5V_MXM
2
100mil(2.5A, 5VIA)
R1970 0_0402_5%~DR1970 0_0402_5%~D
1 2
R1971 0_0402_5%~D@ R1971 0_0402_5%~D@
1 2
MXM_ENVDD<28>
MXM_PANEL_BKEN<28>
C C
B B
A A
MXM_BIA_PWM<28>
MXM_LVDS_DDC_DAT<27>
MXM_LVDS_DDC_CLK<27>
PEG_CRX_GTX_C_N15
PEG_CRX_GTX_C_P15
PEG_CRX_GTX_C_N14
PEG_CRX_GTX_C_P14
PEG_CRX_GTX_C_N13
PEG_CRX_GTX_C_P13
PEG_CRX_GTX_C_N12
PEG_CRX_GTX_C_P12
PEG_CRX_GTX_C_N11
PEG_CRX_GTX_C_P11
PEG_CRX_GTX_C_N10
PEG_CRX_GTX_C_P10
PEG_CRX_GTX_C_N9
PEG_CRX_GTX_C_P9
PEG_CRX_GTX_C_N8
PEG_CRX_GTX_C_P8
PEG_CRX_GTX_C_N7
PEG_CRX_GTX_C_P7
PEG_CRX_GTX_C_N6
PEG_CRX_GTX_C_P6
PEG_CRX_GTX_C_N5
PEG_CRX_GTX_C_P5
PEG_CRX_GTX_C_N4
PEG_CRX_GTX_C_P4
PEG_CRX_GTX_C_N3
PEG_CRX_GTX_C_P3
+3.3V_MXM +3.3V_ALW +3.3V_RUN
2.2K_0402_5%~D
2.2K_0402_5%~D
12
R38
R38
DGPU_PEX_RST#
MXM_DPC_HPD
RB751VM-40TE-17_SOD323-2~D
RB751VM-40TE-17_SOD323-2~D
MXM_MB_DP_HPD
RB751VM-40TE-17_SOD323-2~D
RB751VM-40TE-17_SOD323-2~D
MXM_DPB_HPD
RB751VM-40TE-17_SOD323-2~D
RB751VM-40TE-17_SOD323-2~D
5
4
O
2 1
2 1
2 1
D7
D7
D8
D8
D18
D18
1
PWR_SRC
3
PWR_SRC
5
PWR_SRC
7
PWR_SRC
9
PWR_SRC
11
PWR_SRC
13
PWR_SRC
15
PWR_SRC
17
PWR_SRC
19
GND
21
GND
23
GND
25
GND
27
GND
29
GND
31
GND
33
GND
35
GND
37
5V
39
5V
41
5V
43
5V
45
5V
47
GND
49
GND
51
GND
53
GND
55
PEX_STD_SW#
57
VGA_DISABLE#
59
PNL_PWR_EN
61
PNL_BL_EN
63
PNL_BL_PWM
65
HDMI_CEC
67
DVI_HPD
69
LVDS_DDC_DAT
71
LVDS_DDC_CLK
73
GND
75
OEM
77
OEM
79
OEM
81
OEM
83
GND
85
PEX_RX15#
87
PEX_RX15
89
GND
91
PEX_RX14#
93
PEX_RX14
95
GND
97
PEX_RX13#
99
PEX_RX13
101
GND
103
PEX_RX12#
105
PEX_RX12
107
GND
109
PEX_RX11#
111
PEX_RX11
113
GND
115
PEX_RX10#
117
PEX_RX10
119
GND
121
PEX_RX9#
123
PEX_RX9
125
GND
127
PEX_RX8#
129
PEX_RX8
131
GND
133
PEX_RX7#
135
PEX_RX7
137
GND
139
PEX_RX6#
141
PEX_RX6
143
GND
145
PEX_RX5#
147
PEX_RX5
149
GND
151
PEX_RX4#
153
PEX_RX4
155
GND
157
PEX_RX3#
159
PEX_RX3
161
GND
JAE_MM70-314-310B1-1-R300
JAE_MM70-314-310B1-1-R300
C90
C90
1 2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
5
1
P
B
2
A
G
U16
U16
3
74AHC1G09GW_TSSOP5~D
74AHC1G09GW_TSSOP5~D
JMXM1A
CONN@
JMXM1A
CONN@
E1 E2
E1 E2
E3 E4
E3 E4
LInkCIS
100K_0402_5%~D
100K_0402_5%~D
12
R36
R36
MXM_DP_HDMI_HPD <46>
2
PWR_SRC
4
PWR_SRC
6
PWR_SRC
8
PWR_SRC
10
PWR_SRC
12
PWR_SRC
14
PWR_SRC
16
PWR_SRC
18
PWR_SRC
20
GND
22
GND
24
GND
26
GND
28
GND
30
GND
32
GND
34
GND
36
GND
38
PRSNT_R#
40
WAKE#
42
PWR_GOOD
44
PWR_EN
46
RSVD
48
RSVD
50
RSVD
52
RSVD
54
PWR_LEVEL
56
TH_OVERT#
58
TH_ALERT#
60
TH_PWM
62
GPIO0
64
GPIO1
66
GPIO2
68
SMB_DAT
70
SMB_CLK
72
GND
74
OEM
76
OEM
78
OEM
80
OEM
82
GND
84
PEX_TX15#
86
PEX_TX15
88
GND
90
PEX_TX14#
92
PEX_TX14
94
GND
96
PEX_TX13#
98
PEX_TX13
100
GND
102
PEX_TX12#
104
PEX_TX12
106
GND
108
PEX_TX11#
110
PEX_TX11
112
GND
114
PEX_TX10#
116
PEX_TX10
118
GND
120
PEX_TX9#
122
PEX_TX9
124
GND
126
PEX_TX8#
128
PEX_TX8
130
GND
132
PEX_TX7#
134
PEX_TX7
136
GND
138
PEX_TX6#
140
PEX_TX6
142
GND
144
PEX_TX5#
146
PEX_TX5
148
GND
150
PEX_TX4#
152
PEX_TX4
154
GND
156
PEX_TX3#
158
PEX_TX3
160
GND
DGPU_HOLD_RST# <21>
PLTRST_GPU# <20>
DYN_TURB_GPU_PWR_ALRT#<26,47>
R1972 0_0402_5%~D@ R1972 0_0402_5%~D@
DGPU_PWR_GOOD
400mil(10A)
680P_0603_50V7K~DC3680P_0603_50V7K~D
10U_1206_25V6M~DC210U_1206_25V6M~D
1
1
C3
C2
2
2
1 2
MXM_PWR_LEVEL
MXM_OVERT#
MXM_ALERT#
GPU_SMBDAT_R
GPU_SMBCLK_R
SYSTEM
PEG_CTX_GRX_N15
PEG_CTX_GRX_P15
PEG_CTX_GRX_N14
PEG_CTX_GRX_P14
PEG_CTX_GRX_N13
PEG_CTX_GRX_P13
PEG_CTX_GRX_N12
PEG_CTX_GRX_P12
PEG_CTX_GRX_N11
PEG_CTX_GRX_P11
PEG_CTX_GRX_N10
PEG_CTX_GRX_P10
PEG_CTX_GRX_N9
PEG_CTX_GRX_P9
PEG_CTX_GRX_N8
PEG_CTX_GRX_P8
PEG_CTX_GRX_N7
PEG_CTX_GRX_P7
PEG_CTX_GRX_N6
PEG_CTX_GRX_P6
PEG_CTX_GRX_N5
PEG_CTX_GRX_P5
PEG_CTX_GRX_N4
PEG_CTX_GRX_P4
PEG_CTX_GRX_N3
PEG_CTX_GRX_P3
MXM_DPB_HPD_GATE
100K_0402_5%~D
100K_0402_5%~D
@R758
@
12
R758
MXM_PWR_LEVEL
@ D19
@
RB751VM-40TE-17_SOD323-2~D
RB751VM-40TE-17_SOD323-2~D
4
+MXM_PWR_SRC
68P_0402_50V8J~DC468P_0402_50V8J~D
1
C4
2
R19760_0402_5%~D R19760_0402_5%~D
12
4
O
D19
21
JMXM1B
CONN@JMXM1B
CONN@
163
C91
C91
DGPU_PWR_GOOD
DGPU_PWR_EN
U8
U8
GND
165
PEX_RX2#
167
PEX_RX2
169
GND
171
PEX_RX1#
173
PEX_RX1
175
GND
177
PEX_RX0#
179
PEX_RX0
181
GND
183
PEX_REFCLK#
185
PEX_REFCLK
187
GND
189
RSVD
191
RSVD
193
RSVD
195
RSVD
197
RSVD
199
LVDS_UCLK#
201
LVDS_UCLK
203
GND
205
LVDS_UTX3#
207
LVDS_UTX3
209
GND
211
LVDS_UTX2#
213
LVDS_UTX2
215
GND
217
LVDS_UTX1#
219
LVDS_UTX1
221
GND
223
LVDS_UTX0#
225
LVDS_UTX0
227
GND
229
DP_C_L0#
231
DP_C_L0
233
GND
235
DP_C_L1#
237
DP_C_L1
239
GND
241
DP_C_L2#
243
DP_C_L2
245
GND
247
DP_C_L3#
249
DP_C_L3
251
GND
253
DP_C_AUX#
255
DP_C_AUX
257
RSVD
259
RSVD
261
RSVD
263
RSVD
265
RSVD
267
RSVD
269
RSVD
271
RSVD
273
RSVD
275
RSVD
277
RSVD
279
RSVD
281
GND
283
DP_A_L0#
285
DP_A_L0
287
GND
289
DP_A_L1#
291
DP_A_L1
293
GND
295
DP_A_L2#
297
DP_A_L2
299
GND
301
DP_A_L3#
303
DP_A_L3
305
GND
307
DP_A_AUX#
309
DP_A_AUX
310
PRSNT_L#
311
GND
JAE_MM70-314-310B1-1-R300
JAE_MM70-314-310B1-1-R300
LInkCIS
MXM_MB_DP_HPD_GATE
2
PEX_CLK_REQ#
VGA_DDC_DAT
VGA_DDC_CLK
VGA_VSYNC
VGA_HSYNC
VGA_GREEN
LVDS_LCLK#
LVDS_LTX3#
LVDS_LTX2#
LVDS_LTX1#
LVDS_LTX0#
100K_0402_5%~D
100K_0402_5%~D
12
@R60
@
R60
PEX_TX2#
PEX_TX2
PEX_TX1#
PEX_TX1
PEX_TX0#
PEX_TX0
PEX_RST#
VGA_RED
VGA_BLUE
LVDS_LCLK
LVDS_LTX3
LVDS_LTX2
LVDS_LTX1
LVDS_LTX0
DP_D_L0#
DP_D_L0
DP_D_L1#
DP_D_L1
DP_D_L2#
DP_D_L2
DP_D_L3#
DP_D_L3
DP_D_AUX#
DP_D_AUX
DP_C_HPD
DP_D_HPD
RSVD
RSVD
RSVD
DP_B_L0#
DP_B_L0
DP_B_L1#
DP_B_L1
DP_B_L2#
DP_B_L2
DP_B_L3#
DP_B_L3
DP_B_AUX#
DP_B_AUX
DP_B_HPD
DP_A_HPD
MXM_OVERT#
0.1U_0603_25V7K~DC10.1U_0603_25V7K~D
1
C1
2
MXM_LVDS_BCLK-<27>
MXM_PRESENTR# <21>
PCIE_WAKE# <41,42,45,47>
DGPU_PWR_EN <46>
MXM_PIN80 <41>
LVDS
(Upper/even)
HDMI/DockingDP
MUX
MXM_LVDS_BCLK+<27>
MXM_DPC_AUX#<33>
MXM_DPC_AUX<33>
MBDP
MXM_MB_DP_AUX#<29>
MXM_MB_DP_AUX<29>
MXM_PRESENTL#<21>
+3.3V_MXM
C96
C96
1 2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
5
DGPU_PWROK DGPU_PWROK DGPU_PWROK
1
P
IN1
2
IN2
G
U14
U14
3
SN74AHC1G08DCKR_SC70-5
SN74AHC1G08DCKR_SC70-5
+3.3V_ALW
100K_0402_5%~D
100K_0402_5%~D
12
R37
R37
4
O
C92
C92
1 2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
5
1
P
B
2
A
G
U17
U17
3
74AHC1G09GW_TSSOP5~D
74AHC1G09GW_TSSOP5~D
MXM_DPC_HPD_GATE
ACAV_IN <25,47,60,61>
GPU_PWR_LEVEL <46>
3
+3.3V_MXM +3.3V_MXM
4
O
100K_0402_5%~D
100K_0402_5%~D
@R519
@
R519
1 2
DGPU_PWROK<21,46>
PEG_CRX_GTX_C_N2
PEG_CRX_GTX_C_P2
PEG_CRX_GTX_C_N1
PEG_CRX_GTX_C_P1
PEG_CRX_GTX_C_N0
PEG_CRX_GTX_C_P0
CLK_PCIE_VGA#<18>
CLK_PCIE_VGA<18>
MXM_LVDS_B2-<27>
MXM_LVDS_B2+<27>
MXM_LVDS_B1-<27>
MXM_LVDS_B1+<27>
MXM_LVDS_B0-<27>
MXM_LVDS_B0+<27>
MXM_DPC_N0<33>
MXM_DPC_P0<33>
MXM_DPC_N1<33>
MXM_DPC_P1<33>
MXM_DPC_N2<33>
MXM_DPC_P2<33>
MXM_DPC_N3<33>
MXM_DPC_P3<33>
MXM_MB_DP_N0<29>
MXM_MB_DP_P0<29>
MXM_MB_DP_N1<29>
MXM_MB_DP_P1<29>
MXM_MB_DP_N2<29>
MXM_MB_DP_P2<29>
MXM_MB_DP_N3<29>
MXM_MB_DP_P3<29>
5
P
IN1
IN2
G
3
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
CLK_PCIE_VGA#
CLK_PCIE_VGA
MXM_LVDS_BCLKMXM_LVDS_BCLK+
MXM_LVDS_B2MXM_LVDS_B2+
MXM_LVDS_B1MXM_LVDS_B1+
MXM_LVDS_B0MXM_LVDS_B0+
MXM_DPC_N0
MXM_DPC_P0
MXM_DPC_N1
MXM_DPC_P1
MXM_DPC_N2
MXM_DPC_P2
MXM_DPC_N3
MXM_DPC_P3
MXM_DPC_AUX#
MXM_DPC_AUX
MXM_MB_DP_N0
MXM_MB_DP_P0
MXM_MB_DP_N1
MXM_MB_DP_P1
MXM_MB_DP_N2
MXM_MB_DP_P2
MXM_MB_DP_N3
MXM_MB_DP_P3
MXM_MB_DP_AUX#
MXM_MB_DP_AUX
MXM_PRESENTL#
C95
C95
1 2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
2
U25
U25
SN74AHC1G08DCKR_SC70-5
SN74AHC1G08DCKR_SC70-5
4
+3.3V_RUN+3.3V_MXM
1 2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
5
1
P
IN1
O
2
IN2
G
3
SN74AHC1G08DCKR_SC70-5
SN74AHC1G08DCKR_SC70-5
162
GND
164
166
168
GND
170
172
174
GND
176
178
180
GND
182
184
186
188
190
192
194
GND
196
198
200
202
GND
204
206
208
GND
210
212
214
GND
216
218
220
GND
222
224
226
GND
228
230
232
GND
234
236
238
GND
240
242
244
GND
246
248
250
GND
252
254
256
GND
258
260
262
264
266
268
270
272
GND
274
276
278
GND
280
282
284
GND
286
288
290
GND
292
294
296
GND
298
300
302
304
306
3V3
308
3V3
312
GND
4
O
PEG_CTX_GRX_N2
PEG_CTX_GRX_P2
PEG_CTX_GRX_N1
PEG_CTX_GRX_P1
PEG_CTX_GRX_N0
PEG_CTX_GRX_P0
MXM_CLK_REQ#
DGPU_PEX_RST#
MXM_CRT_VSYNC
MXM_CRT_HSYNC
MXM_CRT_RED
MXM_CRT_GRN
MXM_CRT_BLU
MXM_LVDS_ACLKMXM_LVDS_ACLK+
MXM_LVDS_A2MXM_LVDS_A2+
MXM_LVDS_A1MXM_LVDS_A1+
MXM_LVDS_A0MXM_LVDS_A0+
MXM_EDP_TX0-
MXM_EDP_TX0+
MXM_EDP_TX1MXM_EDP_TX1+
MXM_EDP_TX2MXM_EDP_TX2+
MXM_EDP_TX3MXM_EDP_TX3+
MXM_EDP_AUXMXM_EDP_AUX+
MXM_DPC_HPD_GATE
MXM_EDP_HPD
MXM_DPB_N0
MXM_DPB_P0
MXM_DPB_N1
MXM_DPB_P1
MXM_DPB_N2
MXM_DPB_P2
MXM_DPB_N3
MXM_DPB_P3
MXM_DPB_AUX#
MXM_DPB_AUX
MXM_DPB_HPD_GATE
MXM_MB_DP_HPD_GATE
+3.3V_MXM
C94
C94
1 2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
5
1
P
IN1
2
IN2
G
U27
U27
3
SN74AHC1G08DCKR_SC70-5
SN74AHC1G08DCKR_SC70-5
+3.3V_MXM
10K_0402_5%~D
10K_0402_5%~D
12
R10
R10
G
G
2
S
S
Q4
Q4
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
MXM_CRT_DDC_DAT <31>
+3.3V_MXM
40mil(1A)
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
C332
C332
2
+3.3V_ALW
13
D
D
0.1U_0402_16V4Z~DC80.1U_0402_16V4Z~D
1
C8
2
MXM_MB_DP_HPD <29>MXM_DPC_HPD <33>MXM_DPB_HPD <44>
10K_0402_5%~D
10K_0402_5%~D
12
R11
R11
MXM_CRT_DDC_CLK <31>
MXM_CRT_VSYNC <31>
MXM_CRT_HSYNC <31>
MXM_CRT_RED <31>
MXM_CRT_GRN <31>
MXM_CRT_BLU <31>
MXM_LVDS_ACLK- <27>
MXM_LVDS_ACLK+ <27>
MXM_LVDS_A2- <27>
MXM_LVDS_A2+ <27>
MXM_LVDS_A1- <27>
MXM_LVDS_A1+ <27>
MXM_LVDS_A0- <27>
MXM_LVDS_A0+ <27>
MXM_EDP_TX0- <30>
MXM_EDP_TX0+ <30>
MXM_EDP_TX1- <30>
MXM_EDP_TX1+ <30>
MXM_EDP_TX2- <30>
MXM_EDP_TX2+ <30>
MXM_EDP_TX3- <30>
MXM_EDP_TX3+ <30>
MXM_EDP_AUX- <30>
MXM_EDP_AUX+ <30>
MXM_EDP_HPD <30>
MXM_DPB_N0 <44>
MXM_DPB_P0 <44>
MXM_DPB_N1 <44>
MXM_DPB_P1 <44>
MXM_DPB_N2 <44>
MXM_DPB_P2 <44>
MXM_DPB_N3 <44>
MXM_DPB_P3 <44>
MXM_DPB_AUX# <32>
MXM_DPB_AUX <32>
DGPU_THERMTRIP# <25>
CRT
LVDS
(Lower/odd)
eDP
DockingDPport2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
MXM
MXM
MXM
LA-7933
LA-7933
LA-7933
1
16 65Monday, November 07, 2011
16 65Monday, November 07, 2011
16 65Monday, November 07, 2011
of
of
of
0.2
0.2
0.2
Page 17
5
+3.3V_ALW_PCH
12
RH66
RH66
1K_0402_1%~D
1K_0402_1%~D
PCH_AZ_SYNC
12
RH282
@RH282
D D
PCH_AZ_SYNCissampled
attherisingedgeofRSMRST#pin.
SosignalshouldbePUtotheALWAYSrail.
C C
B B
A A
@
100K_0402_5%~D
100K_0402_5%~D
+RTC_CELL
12
RH38
RH38
330K_0402_1%~D
330K_0402_1%~D
PCH_INTVRMEN
12
RH39
@RH39
@
330K_0402_1%~D
330K_0402_1%~D
INTVRMEN‐IntegratedSUS
1.1VVRMEnable
High‐EnableInternalVRs
Low‐EnableExternalVRs
CMOS_CLR1
ME_CLR1
Shunt ClearMERTCRegisters
Open
PCH_AZ_CODEC_SDOUT<45>
PCH_AZ_CODEC_SYNC<45>
PCH_AZ_CODEC_BITCLK<45>
SPI_PCH_CS0# SPI_PCH_CS0#_R
SPI_PCH_DIN SPI_DIN64
SPI_WP#_SEL<46>
CMOSsetting
Shunt ClearCMOS
Open
KeepCMOS
TPMsetting
KeepMERTCRegisters
PCH_AZ_CODEC_RST#<45>
1 2
R963 47_0402_5%~DR963 47_0402_5%~D
1 2
R894 33_0402_5%~DR894 33_0402_5%~D
1 2
R898 0_0402_5%~D@R898 0_0402_5%~D@
5
+RTC_CELL
1
1
@
@
ME1 SHORT PADS~D
ME1 SHORT PADS~D
1 2
CH5 1U_0402_6.3V6K~DCH5 1U_0402_6.3V6K~D
RH29 33_0402_5%~DRH29 33_0402_5%~D
RH27 33_0402_5%~DRH27 33_0402_5%~D
RH41 33_0402_5%~DRH41 33_0402_5%~D
RH25 33_0402_5%~DRH25 33_0402_5%~D
27P_0402_50V8J~D
27P_0402_50V8J~D
@CH101
@
1
CH101
2
R890
R890
3.3K_0402_5%~D
3.3K_0402_5%~D
SPI_WP#_SEL_R
USB_OC0#_R<20>
USB_OC1#_R<20>
USB_OC2#<20>
USB_OC3#<20,45>
USB_OC4#_R<20>
USB_OC5#<20>
USB_OC6#<20>
SIO_EXT_SMI#<20,47>
SLP_ME_CSW_DEV#<21,46>
PCH_GPIO35<21>
PCH_GPIO36<21>
PCH_GPIO37<21>
PCH_GPIO16<21>
TEMP_ALERT#<21,46>
PCH_GPIO15<21>
SIO_EXT_SCI#_R<21>
PCH_RSMRST#_Q<19,48>
RH22 20K_0402_5%~DRH22 20K_0402_5%~D
1 2
RH23 20K_0402_5%~DRH23 20K_0402_5%~D
1 2
RH11 1M_0402_5%~DRH11 1M_0402_5%~D
1 2
2
2
+3.3V_ALW_PCH
0_0603_5%~D
0_0603_5%~D
12
RH288
RH288
+3.3V_ALW_PCH_JTAG
PCH_AZ_SDOUT
1 2
PCH_AZ_SYNC_Q
1 2
PCH_AZ_RST#
1 2
PCH_AZ_BITCLK
1 2
1 2
RH31 1M_0402_5%~DRH31 1M_0402_5%~D
12
200MILSO8
64MbFlashROM 200MILSO8
U52
U52
1
/CS
2
DO
3
/WP
GND4DIO
W25Q64CVSSIG_SO8~D
W25Q64CVSSIG_SO8~D
4
USB_OC0#_R
USB_OC1#_R
USB_OC2#
USB_OC3#
USB_OC4#_R
USB_OC5#
USB_OC6#
SIO_EXT_SMI#
SLP_ME_CSW_DEV#
PCH_GPIO35
HDD_DET#_R
BBS_BIT0_R
PCH_GPIO36
PCH_GPIO37
PCH_GPIO16
TEMP_ALERT#
PCH_GPIO15
SIO_EXT_SCI#_R
PCH_RSMRST#_Q RSMRST#_XDP
RH51 33_0402_5%~DPXDP@ RH51 33_0402_5%~DPXDP@
RH7 33_0402_5%~DPXDP@ RH7 33_0402_5%~DPXDP@
RH16 33_0402_5%~DPXDP@ RH16 33_0402_5%~DPXDP@
RH5 33_0402_5%~DPXDP@ RH5 33_0402_5%~DPXDP@
RH6 33_0402_5%~DPXDP@ RH6 33_0402_5%~DPXDP@
RH14 33_0402_5%~DPXDP@ RH14 33_0402_5%~DPXDP@
RH8 33_0402_5%~DPXDP@ RH8 33_0402_5%~DPXDP@
RH9 33_0402_5%~DPXDP@ RH9 33_0402_5%~DPXDP@
RH10 33_0402_5%~DPXDP@ RH10 33_0402_5%~DPXDP@
RH12 33_0402_5%~DPXDP@ RH12 33_0402_5%~DPXDP@
RH13 33_0402_5%~DPXDP@ RH13 33_0402_5%~DPXDP@
RH26 33_0402_5%~DPXDP@ RH26 33_0402_5%~DPXDP@
RH20 33_0402_5%~DPXDP@ RH20 33_0402_5%~DPXDP@
RH34 33_0402_5%~DPXDP@ RH34 33_0402_5%~DPXDP@
RH17 33_0402_5%~DPXDP@ RH17 33_0402_5%~DPXDP@
RH18 33_0402_5%~DPXDP@ RH18 33_0402_5%~DPXDP@
RH19 33_0402_5%~DPXDP@ RH19 33_0402_5%~DPXDP@
RH53 33_0402_5%~DPXDP@ RH53 33_0402_5%~DPXDP@
RH24 1K_0402_1%~DPXDP@ RH24 1K_0402_1%~DPXDP@
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
Crystal EA.
CH2
CH2
18P_0402_50V8J~D
18P_0402_50V8J~D
12
12
YH1
YH1
32.768KHZ_12.5PF_Q13FC1350000~D
CH3
CH3
18P_0402_50V8J~D
18P_0402_50V8J~D
1
1
@
@
CMOS1 SHORT PADS~D
CMOS1 SHORT PADS~D
1 2
CH4
CH4
CMOSplacenearDIMM
INTELHDA_SYNCisolationcircuit
+3.3V_SPI
8
VCC
7
/HOLD
SPI_CLK64
6
CLK
SPI_DO64
5
4
32.768KHZ_12.5PF_Q13FC1350000~D
PCH_RTCX2_R PCH_RTCX2
12
2
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
+3.3V_ALW_PCH
ME_FWP<46>
RH59 51_0402_1%~DRH59 51_0402_1%~D
RH44 200_0402_1%~DRH44 200_0402_1%~D
RH45 200_0402_1%~DRH45 200_0402_1%~D
RH43 200_0402_1%~DRH43 200_0402_1%~D
+5V_RUN
G
G
2
S
S
QH7
QH7
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
3.3K_0402_5%~D
3.3K_0402_5%~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
12
R891
R891
1 2
R899 33_0402_5%~DR899 33_0402_5%~D
1 2
R901 33_0402_5%~DR901 33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
@
@
R910
R910
1 2
1
2
1 2
RH286 0_0402_5%~DRH286 0_0402_5%~D
PCH_AZ_CODEC_SDIN0<45>
1 2
RH287 1K_0402_1%~D@ RH287 1K_0402_1%~D@
1 2
RH50 1K_0402_1%~DRH50 1K_0402_1%~D
12
12
12
12
13
D
D
C787
C787
1 2
SPI_HOLD#
SPI_PCH_CLK
SPI_PCH_DO
SPI_CLK64 SPI_CLK32
10P_0402_50V8J~D
10P_0402_50V8J~D
C761
C761
100_0402_1%~D
100_0402_1%~D
12
RH48
RH48
PCH_AZ_SYNCPCH_AZ_SYNC_Q
@
@
3
XDP_FN0
XDP_FN1
XDP_FN2
XDP_FN3
XDP_FN4
XDP_FN5
XDP_FN6
XDP_FN7
XDP_FN8
XDP_FN9
XDP_FN10
XDP_FN11
XDP_FN12
XDP_FN13
XDP_FN14
XDP_FN15
XDP_FN16
XDP_FN17
DDR_XDP_WAN_SMBDAT<12,13,14,15,18,34,41>
DDR_XDP_WAN_SMBCLK<12,13,14,15,18,34,41>
PCH_RTCX1
12
RH15
RH15
10M_0402_5%~D
10M_0402_5%~D
PCH_RTCRST#
SRTCRST#
INTRUDER#
PCH_INTVRMEN
PCH_AZ_BITCLK
PCH_AZ_SYNC
SPKR<45>
PCH_AZ_RST#
PCH_AZ_CODEC_SDIN0
PCH_AZ_SDOUT
PCH_GPIO33
PCH_JTAG_TCK
PCH_JTAG_TMS
PCH_JTAG_TDI
PCH_JTAG_TDO
100_0402_1%~D
100_0402_1%~D
100_0402_1%~D
100_0402_1%~D
12
12
RH49
RH49
RH47
RH47
PCH_SPI_CLK
PCH_SPI_CS0#
PCH_SPI_CS1#
PCH_SPI_DO
PCH_SPI_DIN
SPI_PCH_CS1# SPI_PCH_CS1#_R
1 2
R936 47_0402_5%~DR936 47_0402_5%~D
SPI_PCH_DIN SPI_DIN32
1 2
R895 33_0402_5%~DR895 33_0402_5%~D
SPI_WP#_SEL_R
3
1.05V_0.8V_PWROK<47,58>
SIO_PWRBTN#_R<7,19>
UH4A
UH4A
A20
RTCX1
C20
RTCX2
D20
RTCRST#
G22
SRTCRST#
K22
INTRUDER#
C17
INTVRMEN
N34
HDA_BCLK
L34
HDA_SYNC
T10
SPKR
K34
HDA_RST#
E34
HDA_SDIN0
G34
HDA_SDIN1
C34
HDA_SDIN2
A34
HDA_SDIN3
A36
HDA_SDO
C36
HDA_DOCK_EN# / GPIO33
N32
HDA_DOCK_RST# / GPIO13
J3
JTAG_TCK
H7
JTAG_TMS
K5
JTAG_TDI
H1
JTAG_TDO
T3
SPI_CLK
Y14
SPI_CS0#
T1
SPI_CS1#
V4
SPI_MOSI
U3
SPI_MISO
BD82PPSM-QNHN-A0_BGA989~D
BD82PPSM-QNHN-A0_BGA989~D
32MbFlashROM
1
2
3
4
+3.3V_ALW_PCH
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
PXDP@ CH1
PXDP@
1
CH1
2
PXDP@
PXDP@
RH283 1K_0402_1%~D
RH283 1K_0402_1%~D
1 2
1 2
RH21 0_0402_5%~D
RH21 0_0402_5%~D
PXDP@
PXDP@
RH284 0_0402_5%~DPXDP@RH284 0_0402_5%~DPXDP@
1 2
1 2
RH285 0_0402_5%~D
RH285 0_0402_5%~D
PXDP@
PXDP@
LPC
LPC
RTCIHDA
RTCIHDA
SATA
SATA
JTAG
JTAG
SATA0GP / GPIO21
SPI
SPI
SATA1GP / GPIO19
U53
U53
CS#
VCC
DO
HOLD#
WP#
CLK
GND
DI
W25Q32BVSSIG_SO8~D
W25Q32BVSSIG_SO8~D
1.05V_0.8V_PWROK_R
PCH_PWRBTN#_XDP
DDR_XDP_WAN_SMBDAT_R2
DDR_XDP_WAN_SMBCLK_R2
FWH0 / LAD0
FWH1 / LAD1
FWH2 / LAD2
FWH3 / LAD3
FWH4 / LFRAME#
LDRQ0#
LDRQ1# / GPIO23
SERIRQ
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
SATA1RXN
SATA1RXP
SATA 6G
SATA 6G
SATA1TXN
SATA1TXP
SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP
SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP
SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP
SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP
SATAICOMPO
SATAICOMPI
SATA3RCOMPO
SATA3COMPI
SATA3RBIAS
SATALED#
+3.3V_SPI
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
8
7
6
5
SPI_DO32
33_0402_5%~D
33_0402_5%~D
@
@
R913
R913
10P_0402_50V8J~D
10P_0402_50V8J~D
1 2
1
@
@
C764
C764
2
2
+3.3V_ALW_PCH
XDP_FN0
XDP_FN1
XDP_FN2
XDP_FN3
XDP_FN4
XDP_FN5
XDP_FN6
XDP_FN7
LPC_LAD0
C38
LPC_LAD1
A38
LPC_LAD2
B37
LPC_LAD3
C37
LPC_LFRAME#
D36
E36
LPC_LDRQ1#
K36
IRQ_SERIRQ
V5
AM3
AM1
AP7
AP5
AM10
AM8
AP11
AP10
AD7
AD5
AH5
AH4
AB8
AB10
AF3
AF1
Y7
Y5
AD3
AD1
Y3
Y1
AB3
AB1
Y11
SATA_COMP
Y10
AB12
AB13
AH1
P3
V14
P1
SATA3_COMP
RBIAS_SATA3
SATA_ACT#
HDD_DET#_R
BBS_BIT0_R
PCH_PLTRST#<7,20>
RH40 37.4_0402_1%~DRH40 37.4_0402_1%~D
RH42 49.9_0402_1%~DRH42 49.9_0402_1%~D
RH46 750_0402_1%~DRH46 750_0402_1%~D
BBS_BIT0‐BIOSBOOTSTRAPBIT0
C788
C788
1 2
SPI_HOLD#
SPI_PCH_CLKSPI_CLK32
1 2
R897 33_0402_5%~DR897 33_0402_5%~D
SPI_PCH_DO
1 2
R900 33_0402_5%~DR900 33_0402_5%~D
2
JXDP2
JXDP2
1
GND0
3
OBSFN_A0
5
OBSFN_A1
7
GND2
9
OBSDATA_A0
11
OBSDATA_A1
13
GND4
15
OBSDATA_A2
17
OBSDATA_A3
19
GND6
21
OBSFN_B0
23
OBSFN_B1
25
GND8
27
OBSDATA_B0
29
OBSDATA_B1
31
GND10
33
OBSDATA_B2
35
OBSDATA_B3
37
GND12
39
PWRGOOD/HOOK0
41
HOOK1
43
VCC_OBS_AB
45
HOOK2
47
HOOK3
49
GND14
51
SDA
53
SCL
55
TCK1
57
TCK0
59
GND16
SAMTE_BSH-030-01-L-D-A CONN@
SAMTE_BSH-030-01-L-D-A CONN@
LPC_LAD0 <40,42,46,47>
LPC_LAD1 <40,42,46,47>
LPC_LAD2 <40,42,46,47>
LPC_LAD3 <40,42,46,47>
LPC_LFRAME# <40,42,46,47>
LPC_LDRQ1# <46>
IRQ_SERIRQ <40,46,47>
PSATA_PRX_DTX_N0_C <34>
PSATA_PRX_DTX_P0_C <34>
PSATA_PTX_DRX_N0_C <34>
PSATA_PTX_DRX_P0_C <34>
SATA_PRX_DTX_N1_C <34>
SATA_PRX_DTX_P1_C <34>
SATA_PTX_DRX_N1_C <34>
SATA_PTX_DRX_P1_C <34>
SATA_NVRAM_PRX_DTX_N2_C <42>
SATA_NVRAM_PRX_DTX_P2_C <42>
SATA_NVRAM_PTX_DRX_N2_C <42>
SATA_NVRAM_PTX_DRX_P2_C <42>
SATA_ODD_PRX_DTX_N3_C <35>
SATA_ODD_PRX_DTX_P3_C <35>
SATA_ODD_PTX_DRX_N3_C <35>
SATA_ODD_PTX_DRX_P3_C <35>
ESATA_PRX_DTX_N4_C <38>
ESATA_PRX_DTX_P4_C <38>
ESATA_PTX_DRX_N4_C <38>
ESATA_PTX_DRX_P4_C <38>
SATA_PRX_DKTX_N5_C <44>
SATA_PRX_DKTX_P5_C <44>
SATA_PTX_DKRX_N5_C <44>
SATA_PTX_DKRX_P5_C <44>
1 2
1 2
1 2
SATA_ACT# <49>
1 2
RH290 0_0402_5%~DRH290 0_0402_5%~D
D
S
D
S
1 3
QH1
QH1
BSS138W-7-F_SOT323-3~D
BSS138W-7-F_SOT323-3~D
G
G
2
+3.3V_SPI
DELL CONFIDENTIAL/PROPRIETARY
1
2
GND1
XDP_FN16
4
OBSFN_C0
OBSFN_C1
OBSDATA_C0
OBSDATA_C1
OBSDATA_C2
OBSDATA_C3
OBSFN_D0
OBSFN_D1
OBSDATA_D0
OBSDATA_D1
OBSDATA_D2
OBSDATA_D3
ITPCLK/HOOK4
ITPCLK#/HOOK5
VCC_OBS_CD
RESET#/HOOK6
DBR#/HOOK7
GND3
GND5
GND7
GND9
GND11
GND13
GND15
TRST#
GND17
XDP_FN17
6
8
XDP_FN8
10
XDP_FN9
12
14
XDP_FN10
16
XDP_FN11
18
20
22
24
26
XDP_FN12
28
XDP_FN13
30
32
XDP_FN14
34
XDP_FN15
36
38
40
42
44
46
48
50
52
TD0
54
56
TDI
58
TMS
60
PCH_GPIO33
IRQ_SERIRQ
BBS_BIT0_R
HDD1_DET#
SPKR
RSMRST#_XDP
XDP_DBRESET#
PCH_JTAG_TDO
PCH_JTAG_TDI
PCH_JTAG_TMSPCH_JTAG_TCK
NoRebootStrap
SPKR
+3.3V_ALW_PCH
XDP_DBRESET# <7,19>
1 2
RH355100K_0402_5%~D RH355100K_0402_5%~D
1 2
RH288.2K_0402_5%~D RH288.2K_0402_5%~D
1 2
RH524.7K_0402_5%~D RH524.7K_0402_5%~D
1 2
RH3010K_0402_5%~D RH3010K_0402_5%~D
1 2
RH3510K_0402_5%~D @RH3510K_0402_5%~D @
Low=Default
High=NoReboot
+3.3V_RUN
+3.3V_RUN
HDD1
HDD2
NVRAM
ODD
E‐SATA
+1.05V_RUN
+1.05V_RUN
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
DOCK
HDD1_DET# <34>
HDD2_DET# <34>
SPI_PCH_CS1#
12
PCH_SPI_CS1#
RH3450_0402_5%~D RH3450_0402_5%~D
SPI_PCH_DO
12
PCH_SPI_DO
RH3460_0402_5%~D RH3460_0402_5%~D
SPI_PCH_DIN
12
PCH_SPI_DIN
RH3470_0402_5%~D RH3470_0402_5%~D
SPI_PCH_CLK
12
PCH_SPI_CLK
RH3480_0402_5%~D RH3480_0402_5%~D
SPI_PCH_CS0#
12
PCH_SPI_CS0#
RH3490_0402_5%~D RH3490_0402_5%~D
+3.3V_M
12
RH3500_0402_5%~D RH3500_0402_5%~D
HRS_FH12-16S-0P5SH(55)~D
HRS_FH12-16S-0P5SH(55)~D
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
PCH (1/8)
PCH (1/8)
PCH (1/8)
LA-7933
LA-7933
LA-7933
1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
CONN@
CONN@
17 65Monday, November 07, 2011
17 65Monday, November 07, 2011
17 65Monday, November 07, 2011
JSPI1
JSPI1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
G1
G2
0.2
0.2
0.2
of
of
of
Page 18
5
D D
PCIE_PRX_WANTX_N1<41>
WWAN (Mini Card 1)--->
WLAN (Mini Card 2)--->
EXPRESS Card--->
PP (Mini Card 3)--->
NVRAM (Mini Card 4)--->
C C
10/100/1G LAN --->
MMI --->
WWAN (Mini Card 1)--->
10/100/1G LAN --->
MMI --->
B B
PP (Mini Card 3)--->
Express card--->
WLAN (Mini Card 2)--->
NVRAM (Mini Card 4)--->
A A
PCIEREQpowerrail:
PCIE_PRX_WANTX_P1<41>
PCIE_PTX_WANRX_N1<41>
PCIE_PTX_WANRX_P1<41>
PCIE_PRX_WLANTX_N2<41>
PCIE_PRX_WLANTX_P2<41>
PCIE_PTX_WLANRX_N2<41>
PCIE_PTX_WLANRX_P2<41>
PCIE_PRX_EXPTX_N3<45>
PCIE_PRX_EXPTX_P3<45>
PCIE_PTX_EXPRX_N3<45>
PCIE_PTX_EXPRX_P3<45>
PCIE_PRX_WPANTX_N5<42>
PCIE_PRX_WPANTX_P5<42>
PCIE_PTX_WPANRX_N5<42>
PCIE_PTX_WPANRX_P5<42>
PCIE_PRX_NVRTX_N6<42>
PCIE_PRX_NVRTX_P6<42>
PCIE_PTX_NVRRX_N6<42>
PCIE_PTX_NVRRX_P6<42>
PCIE_PRX_GLANTX_N7<36>
PCIE_PRX_GLANTX_P7<36>
PCIE_PTX_GLANRX_N7<36>
PCIE_PTX_GLANRX_P7<36>
PCIE_PRX_MMITX_N8<45>
PCIE_PRX_MMITX_P8<45>
PCIE_PTX_MMIRX_N8<45>
PCIE_PTX_MMIRX_P8<45>
CLK_PCIE_MINI1#<41>
CLK_PCIE_MINI1<41>
+3.3V_ALW_PCH
MINI1CLK_REQ#<41>
CLK_PCIE_LAN#<36>
CLK_PCIE_LAN<36>
LANCLK_REQ#<36>
CLK_PCIE_CARD#<45>
CLK_PCIE_CARD<45>
+3.3V_RUN
CARDCLK_REQ#<45>
CLK_PCIE_MINI3#<42>
CLK_PCIE_MINI3<42>
+3.3V_ALW_PCH
MINI3CLK_REQ#<42>
CLK_PCIE_EXP#<45>
CLK_PCIE_EXP<45>
+3.3V_ALW_PCH
EXPCLK_REQ#<45>
CLK_PCIE_MINI2#<41>
CLK_PCIE_MINI2<41>
+3.3V_ALW_PCH
MINI2CLK_REQ#<41>
+3.3V_ALW_PCH
+3.3V_ALW_PCH
CLK_PCIE_NVR#<42>
CLK_PCIE_NVR<42>
+3.3V_ALW_PCH
NVRCLK_REQ#<42>
CLK_CPU_ITP#<7>
CLK_CPU_ITP<7>
PCIE_PRX_WANTX_N1
PCIE_PRX_WANTX_P1
PCIE_PTX_WANRX_N1
PCIE_PTX_WANRX_P1
PCIE_PRX_WLANTX_N2
PCIE_PRX_WLANTX_P2
PCIE_PTX_WLANRX_N2
PCIE_PTX_WLANRX_P2
PCIE_PRX_EXPTX_N3
PCIE_PRX_EXPTX_P3
PCIE_PTX_EXPRX_N3
PCIE_PTX_EXPRX_P3
PCIE_PRX_WPANTX_N5
PCIE_PRX_WPANTX_P5
PCIE_PTX_WPANRX_N5
PCIE_PTX_WPANRX_P5
PCIE_PRX_NVRTX_N6
PCIE_PRX_NVRTX_P6
PCIE_PTX_NVRRX_N6
PCIE_PTX_NVRRX_P6
PCIE_PRX_GLANTX_N7
PCIE_PRX_GLANTX_P7
PCIE_PTX_GLANRX_N7
PCIE_PTX_GLANRX_P7
PCIE_PRX_MMITX_N8
PCIE_PRX_MMITX_P8
PCIE_PTX_MMIRX_N8
PCIE_PTX_MMIRX_P8
RH307 0_0402_5%~DRH307 0_0402_5%~D
RH308 0_0402_5%~DRH308 0_0402_5%~D
RH81 10K_0402_5%~DRH81 10K_0402_5%~D
RH82 0_0402_5%~DRH82 0_0402_5%~D
RH83 0_0402_5%~DRH83 0_0402_5%~D
RH85 0_0402_5%~DRH85 0_0402_5%~D
RH86 0_0402_5%~DRH86 0_0402_5%~D
RH87 10K_0402_5%~DRH87 10K_0402_5%~D
1 2
RH88 0_0402_5%~DRH88 0_0402_5%~D
RH90 0_0402_5%~DRH90 0_0402_5%~D
RH152 10K_0402_5%~DRH152 10K_0402_5%~D
RH92 0_0402_5%~DRH92 0_0402_5%~D
RH93 0_0402_5%~DRH93 0_0402_5%~D
RH94 10K_0402_5%~DRH94 10K_0402_5%~D
RH95 0_0402_5%~DRH95 0_0402_5%~D
RH96 0_0402_5%~DRH96 0_0402_5%~D
RH97 10K_0402_5%~DRH97 10K_0402_5%~D
RH98 10K_0402_5%~DRH98 10K_0402_5%~D
1 2
RH101 10K_0402_5%~DRH101 10K_0402_5%~D
1 2
RH310 0_0402_5%~DRH310 0_0402_5%~D
RH312 0_0402_5%~DRH312 0_0402_5%~D
RH106 10K_0402_5%~DRH106 10K_0402_5%~D
RH280 0_0402_5%~DRH280 0_0402_5%~D
RH281 0_0402_5%~DRH281 0_0402_5%~D
Suspend:034567
Core:12
5
4
MEM_SMBCLK
MEM_SMBDATA
BG34
BJ34
AV32
AU32
BE34
BF34
BB32
AY32
BG36
BJ36
AV34
AU34
BF36
BE36
AY34
BB34
BG37
BH37
AY36
BB36
BJ38
BG38
AU36
AV36
BG40
BJ40
AY40
BB40
BE38
BC38
AW38
AY38
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
4
PCIE_MINI1#
PCIE_MINI1
MINI1CLK_REQ#
PCIE_LAN#
PCIE_LAN
LANCLK_REQ#
PCIE_CARD#
PCIE_CARD
CARDCLK_REQ#
PCIE_MINI3#
PCIE_MINI3
MINI3CLK_REQ#
PCIE_EXP#
PCIE_EXP
EXPCLK_REQ#
PCIE_MINI2#
PCIE_MINI2
MINI2CLK_REQ#
PEG_B_CLKRQ#
PCIECLKRQ6#
PCIE_NVR#
PCIE_NVR
NVRCLK_REQ#
CLK_BCLK_ITP#
CLK_BCLK_ITP
AB49
AB47
AA48
AA47
AB42
AB40
AK14
AK13
+3.3V_RUN
6 1
5
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
UH4B
UH4B
PERN1
PERP1
PETN1
PETP1
PERN2
PERP2
PETN2
PETP2
PERN3
PERP3
PETN3
PETP3
PERN4
PERP4
PETN4
PETP4
PERN5
PERP5
PETN5
PETP5
PERN6
PERP6
PETN6
PETP6
PERN7
PERP7
PETN7
PETP7
PERN8
PERP8
PETN8
PETP8
Y40
CLKOUT_PCIE0N
Y39
CLKOUT_PCIE0P
J2
PCIECLKRQ0# / GPIO73
CLKOUT_PCIE1N
CLKOUT_PCIE1P
M1
PCIECLKRQ1# / GPIO18
CLKOUT_PCIE2N
CLKOUT_PCIE2P
V10
PCIECLKRQ2# / GPIO20
Y37
CLKOUT_PCIE3N
Y36
CLKOUT_PCIE3P
A8
PCIECLKRQ3# / GPIO25
Y43
CLKOUT_PCIE4N
Y45
CLKOUT_PCIE4P
L12
PCIECLKRQ4# / GPIO26
V45
CLKOUT_PCIE5N
V46
CLKOUT_PCIE5P
L14
PCIECLKRQ5# / GPIO44
CLKOUT_PEG_B_N
CLKOUT_PEG_B_P
E6
PEG_B_CLKRQ# / GPIO56
V40
CLKOUT_PCIE6N
V42
CLKOUT_PCIE6P
T13
PCIECLKRQ6# / GPIO45
V38
CLKOUT_PCIE7N
V37
CLKOUT_PCIE7P
K12
PCIECLKRQ7# / GPIO46
CLKOUT_ITPXDP_N
CLKOUT_ITPXDP_P
BD82PPSM-QNHN-A0_BGA989~D
BD82PPSM-QNHN-A0_BGA989~D
4
QH5B
QH5B
2
QH5A
QH5A
PCI-E*
PCI-E*
3
DDR_XDP_WAN_SMBCLK <12,13,14,15,17,34,41>
DDR_XDP_WAN_SMBDAT <12,13,14,15,17,34,41>
PCH_SMB_ALERT#
SMBCLK
SMBDATA
SML0CLK
SML0DATA
CL_CLK1
CL_DATA1
CL_RST1#
REFCLK14IN
XTAL25_IN
E12
H14
C9
A12
C8
G12
C13
E14
M16
M7
T11
P10
M10
AB37
AB38
AV22
AU22
AM12
AM13
BF18
BE18
BJ30
BG30
G24
E24
AK7
AK5
K45
H45
V47
V49
Y47
K43
F47
H47
K49
MEM_SMBCLK
MEM_SMBDATA
DDR_HVREF_RST_PCH
LAN_SMBCLK
LAN_SMBDATA
PCH_GPIO74
SML1_SMBCLK
SML1_SMBDATA
PCH_CL_CLK1
PCH_CL_DATA1
PCH_CL_RST1#
GFX_CLK_REQ#
CLK_PCIE_VGA#
CLK_PCIE_VGA
CLK_CPU_DMI#
CLK_CPU_DMI
CLK_BUF_DMI#
CLK_BUF_DMI
CLK_BUF_BCLK
CLK_BUF_BCLK
CLK_BUF_DOT96#
CLK_BUF_DOT96
CLK_BUF_CKSSCD#
CLK_BUF_CKSSCD
CLK_PCH_14M
CLK_PCI_LOOPBACK
XTAL25_IN
XTAL25_OUT
XCLK_RCOMP
PCI_TPM_TCM
SIO_14M
CLK_80H
JETWAY_14M
RH100 90.9_0402_1%~DRH100 90.9_0402_1%~D
RH311 22_0402_5%~DRH311 22_0402_5%~D
RH313 22_0402_5%~DRH313 22_0402_5%~D
RH314 22_0402_5%~DRH314 22_0402_5%~D
RH315 22_0402_5%~D@RH315 22_0402_5%~D@
SMBALERT# / GPIO11
SML0ALERT# / GPIO60
SMBUSController
SMBUSController
SML1ALERT# / PCHHOT# / GPIO74
CLOCKS
CLOCKS
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
SML1DATA / GPIO75
Link
Link
PEG_A_CLKRQ# / GPIO47
CLKIN_PCILOOPBACK
CLKOUTFLEX0 / GPIO64
CLKOUTFLEX1 / GPIO65
CLKOUTFLEX2 / GPIO66
CLKOUTFLEX3 / GPIO67
FLEX CLOCKS
FLEX CLOCKS
3
SML1CLK / GPIO58
CLKOUT_PEG_A_N
CLKOUT_PEG_A_P
CLKOUT_DMI_N
CLKOUT_DMI_P
CLKOUT_DP_N
CLKOUT_DP_P
CLKIN_DMI_N
CLKIN_DMI_P
CLKIN_GND1_N
CLKIN_GND1_P
CLKIN_DOT_96N
CLKIN_DOT_96P
CLKIN_SATA_N
CLKIN_SATA_P
XTAL25_OUT
XCLK_RCOMP
2
DDR_HVREF_RST_PCH <7>
LAN_SMBCLK <36>
LAN_SMBDATA <36>
SML1_SMBCLK <47>
SML1_SMBDATA <47>
PCH_CL_CLK1 <41>
PCH_CL_DATA1 <41>
PCH_CL_RST1# <41>
CLK_PCIE_VGA# <16>
CLK_PCIE_VGA <16>
CLK_CPU_DMI# <7>
CLK_CPU_DMI <7>
CLK_PCI_LOOPBACK <20>
1 2
12
12
12
12
2
+3.3V_ALW_PCH
RUN_GFX_ON<46,50>
CLOCKTERMINATIONforFCIMandneedclosetoPCH
+1.05V_RUN
CLK_PCI_TPM_TCM <40>
CLK_SIO_14M <46>
PCLK_80H <42>
JETWAY_CLK14M <40>
DELL CONFIDENTIAL/PROPRIETARY
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
1
SML1_SMBCLK
SML1_SMBDATA
DDR_HVREF_RST_PCH
PCH_GPIO74
MEM_SMBCLK
MEM_SMBDATA
PCH_SMB_ALERT#
LAN_SMBCLK
LAN_SMBDATA
RH80
RH80
10K_0402_5%~D
10K_0402_5%~D
CLK_BUF_DMI#
CLK_BUF_DMI
CLK_BUF_BCLK
CLK_BUF_DOT96#
CLK_BUF_DOT96
CLK_BUF_CKSSCD#
CLK_BUF_CKSSCD
CLK_PCH_14M
12
RH99
RH99
1M_0402_5%~D
1M_0402_5%~D
25MHZ_10PF_Q22FA2380049900~D
25MHZ_10PF_Q22FA2380049900~D
10P_0402_50V8J~D
10P_0402_50V8J~D
2
CH18
CH18
1
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
1 2
1 2
1 2
1 2
1 2
1 2
1 2
12
13
D
D
2
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
G
G
S
S
1 2
RH74 10K_0402_5%~DRH74 10K_0402_5%~D
1 2
RH75 10K_0402_5%~DRH75 10K_0402_5%~D
1 2
RH91 10K_0402_5%~DRH91 10K_0402_5%~D
1 2
RH76 10K_0402_5%~DRH76 10K_0402_5%~D
1 2
RH77 10K_0402_5%~DRH77 10K_0402_5%~D
1 2
RH78 10K_0402_5%~DRH78 10K_0402_5%~D
1 2
RH79 10K_0402_5%~DRH79 10K_0402_5%~D
1 2
RH183 10K_0402_5%~DRH183 10K_0402_5%~D
RH309 0_0402_5%~DRH309 0_0402_5%~D
YH2
YH2
3
OUT
4
GND
GND
PCH (2/8)
PCH (2/8)
PCH (2/8)
LA-7933
LA-7933
LA-7933
1
12
RH2982.2K_0402_5%~D RH2982.2K_0402_5%~D
12
RH2992.2K_0402_5%~D RH2992.2K_0402_5%~D
RH3001K_0402_1%~D RH3001K_0402_1%~D
RH30110K_0402_5%~D RH30110K_0402_5%~D
RH3022.2K_0402_5%~D RH3022.2K_0402_5%~D
RH3032.2K_0402_5%~D RH3032.2K_0402_5%~D
RH30410K_0402_5%~D RH30410K_0402_5%~D
RH3052.2K_0402_5%~D RH3052.2K_0402_5%~D
RH3062.2K_0402_5%~D RH3062.2K_0402_5%~D
GFX_CLK_REQ#
QH2
QH2
12
1
IN
2
+3.3V_ALW_PCH
+3.3V_LAN
Crystal EA.
10P_0402_50V8J~D
10P_0402_50V8J~D
2
CH19
CH19
1
18 65Monday, November 07, 2011
18 65Monday, November 07, 2011
18 65Monday, November 07, 2011
of
of
of
0.2
0.2
0.2
Page 19
5
+3.3V_ALW_PCH
1 2
RH318 10K_0402_5%~D@RH318 10K_0402_5%~D@
1 2
RH144 10K_0402_5%~DRH144 10K_0402_5%~D
1 2
RH142 10K_0402_5%~DRH142 10K_0402_5%~D
1 2
D D
RH319 10K_0402_5%~D@RH319 10K_0402_5%~D@
1 2
RH140 10K_0402_5%~DRH140 10K_0402_5%~D
+3.3V_RUN
1 2
RH137 8.2K_0402_5%~DRH137 8.2K_0402_5%~D
1 2
RH138 8.2K_0402_5%~D@RH138 8.2K_0402_5%~D@
SUS_STAT#/LPCPD#
ME_SUS_PWR_ACK
PCH_PCIE_WAKE#
SIO_SLP_LAN#
PCH_RI# PCH_CRT_DDC_CLK
CLKRUN#
ME_RESET#
XDP_DBRESET#<7,17>
4
RH359 0_0402_5%~DRH359 0_0402_5%~D
1 2
+3.3V_RUN
1
ME_RESET#
RH141 8.2K_0402_5%~D@RH141 8.2K_0402_5%~D@
12
PCH_DPWROK PCH_RSMRST#_R
2
1 2
RH113 0_0402_5%~DRH113 0_0402_5%~D
1 2
RH321 0_0402_5%~D@ RH321 0_0402_5%~D@
CH99
@CH99
@
1 2
5
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
P
B
4
O
A
G
UC3
@UC3
@
74AHC1G09GW_TSSOP5~D
74AHC1G09GW_TSSOP5~D
3
SYS_PWROKRESET_OUT#
SYS_RESET#
3
+RTC_CELL
330K_0402_1%~D
330K_0402_1%~D
RH127
RH127
DSWODVREN‐OnDieDSWVREnable
Enabled(DEFAULT)
330K_0402_1%~D
330K_0402_1%~D
@RH129
@
RH129
1 2
DSWODVREN
1 2
HIGH:RH127STUFFED,
RH129UNSTUFFED
Disabled
LOW:RH129STUFFED,
RH127UNSTUFFED
2
MAX14885EETLhasinternal3KPUfor
PCH_CRT_DDC_CLKandPCH_CRT_DDC_DAT
PCH_CRT_DDC_DAT
1 2
12
1
+3.3V_RUN
RH3172.2K_0402_5%~D @RH3172.2K_0402_5%~D @
RH3162.2K_0402_5%~D @RH3162.2K_0402_5%~D @
ME_SUS_PWR_ACK_R SUSACK#_R
UH4C
UH4C
BC24
DMI0RXN
BE20
DMI1RXN
BG18
DMI2RXN
BG20
DMI3RXN
BE24
DMI0RXP
BC20
DMI1RXP
BJ18
DMI2RXP
BJ20
DMI3RXP
AW24
DMI0TXN
AW20
DMI1TXN
BB18
DMI2TXN
AV18
DMI3TXN
AY24
DMI0TXP
AY20
DMI1TXP
AY18
DMI2TXP
AU18
DMI3TXP
BJ24
DMI_ZCOMP
BG25
DMI_IRCOMP
BH21
DMI2RBIAS
C12
SUSACK#
K3
SYS_RESET#
P12
SYS_PWROK
L22
PWROK
L10
APWROK
B13
DRAMPWROK
C21
RSMRST#
K16
SUSWARN#/SUSPWRDNACK/GPIO30
E20
PWRBTN#
H20
ACPRESENT / GPIO31
E10
BATLOW# / GPIO72
A10
RI#
BD82PPSM-QNHN-A0_BGA989~D
BD82PPSM-QNHN-A0_BGA989~D
4
+3.3V_ALW2
5
P
B
O
A
G
TC7SH08FU_SSOP5~D
TC7SH08FU_SSOP5~D
3
1 2
DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3
DMI_CTX_PRX_P0
DMI_CTX_PRX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_P3
DMI_CRX_PTX_N0
DMI_CRX_PTX_N1
DMI_CRX_PTX_N2
DMI_CRX_PTX_N3
DMI_CRX_PTX_P0
DMI_CRX_PTX_P1
DMI_CRX_PTX_P2
DMI_CRX_PTX_P3
DMI_COMP_R
RBIAS_CPY
SUSACK#_R
SYS_RESET#
SYS_PWROK_R
PCH_PWROK
PM_APWROK_R
PM_DRAM_PWRGD_R
PCH_RSMRST#_R
ME_SUS_PWR_ACK_R
SIO_PWRBTN#_R
AC_PRESENT
PCH_BATLOW#
PCH_RI#
CH100
CH100
1 2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
PM_APWROK_R
4
UC4
UC4
DMI_CTX_PRX_N0<6>
DMI_CTX_PRX_N1<6>
DMI_CTX_PRX_N2<6>
DMI_CTX_PRX_N3<6>
DMI_CTX_PRX_P0<6>
DMI_CTX_PRX_P1<6>
DMI_CTX_PRX_P2<6>
C C
SUSACK#<46> PCH_DPWROK <46>
PM_DRAM_PWRGD<7>
PCH_RSMRST#_Q<17,48>
ME_SUS_PWR_ACK<47>
SIO_PWRBTN#_R<7,17>
SIO_PWRBTN#<47>
PM_APWROK<47>
SYS_PWROK<7,46>
RESET_OUT#<47>
AC_PRESENT<47>
+3.3V_ALW_PCH
B B
A A
DMI_CTX_PRX_P3<6>
DMI_CRX_PTX_N0<6>
DMI_CRX_PTX_N1<6>
DMI_CRX_PTX_N2<6>
DMI_CRX_PTX_N3<6>
DMI_CRX_PTX_P0<6>
DMI_CRX_PTX_P1<6>
DMI_CRX_PTX_P2<6>
DMI_CRX_PTX_P3<6>
+1.05V_RUN
1 2
RH111 49.9_0402_1%~DRH111 49.9_0402_1%~D
1 2
RH112 750_0402_1%~DRH112 750_0402_1%~D
1 2
RH114 0_0402_5%~D@RH114 0_0402_5%~D@
1 2
RH116 0_0402_5%~DRH116 0_0402_5%~D
1 2
RH117 0_0402_5%~DRH117 0_0402_5%~D
1 2
RH320 0_0402_5%~DRH320 0_0402_5%~D
1 2
RH120 0_0402_5%~DRH120 0_0402_5%~D
1 2
RH121 0_0402_5%~DRH121 0_0402_5%~D
1 2
RH122 0_0402_5%~DRH122 0_0402_5%~D
1 2
RH139 8.2K_0402_5%~DRH139 8.2K_0402_5%~D
SIO_SLP_A#
1
2
RH118 0_0402_5%~D@ RH118 0_0402_5%~D@
5
1 2
RH323 0_0402_5%~DRH323 0_0402_5%~D
FDI_CTX_PRX_N0
BJ14
FDI_RXN0
FDI_RXN1
FDI_RXN2
FDI_RXN3
FDI_RXN4
FDI_RXN5
FDI_RXN6
FDI_RXN7
FDI_RXP0
FDI_RXP1
FDI_RXP2
FDI_RXP3
FDI_RXP4
FDI_RXP5
FDI_RXP6
DMI
DMI
System Power Management
System Power Management
FDI_RXP7
FDI
FDI
FDI_INT
FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1
DSWVRMEN
DPWROK
WAKE#
CLKRUN# / GPIO32
SUS_STAT# / GPIO61
SUSCLK / GPIO62
SLP_S5# / GPIO63
SLP_S4#
SLP_S3#
SLP_A#
SLP_SUS#
PMSYNCH
SLP_LAN# / GPIO29
AY14
BE14
BH13
BC12
BJ12
BG10
BG9
BG14
BB14
BF14
BG13
BE12
BG12
BJ10
BH9
AW16
AV12
BC10
AV14
BB10
A18
E22
B9
N3
G8
N14
D10
H4
F4
G10
G16
AP14
K14
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N5
FDI_CTX_PRX_N6
FDI_CTX_PRX_N7
FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P4
FDI_CTX_PRX_P5
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7
FDI_INT
FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1
DSWODVREN
PCH_DPWROK
PCH_PCIE_WAKE#
CLKRUN#
SUS_STAT#/LPCPD#
SUSCLK
SIO_SLP_S5#
SIO_SLP_S4#
SIO_SLP_S3#
SIO_SLP_A#
SIO_SLP_SUS#
H_PM_SYNC
SIO_SLP_LAN#
FDI_CTX_PRX_N0 <6>
FDI_CTX_PRX_N1 <6>
FDI_CTX_PRX_N2 <6>
FDI_CTX_PRX_N3 <6>
FDI_CTX_PRX_N4 <6>
FDI_CTX_PRX_N5 <6>
FDI_CTX_PRX_N6 <6>
FDI_CTX_PRX_N7 <6>
FDI_CTX_PRX_P0 <6>
FDI_CTX_PRX_P1 <6>
FDI_CTX_PRX_P2 <6>
FDI_CTX_PRX_P3 <6>
FDI_CTX_PRX_P4 <6>
FDI_CTX_PRX_P5 <6>
FDI_CTX_PRX_P6 <6>
FDI_CTX_PRX_P7 <6>
FDI_INT <6>
FDI_FSYNC0 <6>
FDI_FSYNC1 <6>
FDI_LSYNC0 <6>
FDI_LSYNC1 <6>
PCH_PCIE_WAKE# <47>
CLKRUN# <40,46,47>
T56 PAD~D@ T56 PAD~D@
T57 PAD~D@ T57 PAD~D@
T58 PAD~D@ T58 PAD~D@
SIO_SLP_S5# <47>
T59 PAD~D@ T59 PAD~D@
SIO_SLP_S4# <46,50,53>
SIO_SLP_S3# <11,34,45,46,50,54>
SIO_SLP_A# <46,50,55>
T62 PAD~D@ T62 PAD~D@
SIO_SLP_SUS# <46>
T63 PAD~D@ T63 PAD~D@
H_PM_SYNC <7>
SIO_SLP_LAN# <36,46>
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
PCH_CRT_HSYNC<31>
PCH_CRT_VSYNC<31>
1 2
RH131 150_0402_1%~DRH131 150_0402_1%~D
1 2
RH132 150_0402_1%~DRH132 150_0402_1%~D
1 2
RH133 150_0402_1%~DRH133 150_0402_1%~D
1 2
RH134 100K_0402_5%~DRH134 100K_0402_5%~D
PANEL_BKEN_PCH<28>
ENVDD_PCH<28,46>
BIA_PWM_PCH<28>
LDDC_CLK_PCH<27>
LDDC_DATA_PCH<27>
Minimumspeacingof20milsforLVD_IBG
PCH_CRT_BLU
PCH_CRT_GRN
PCH_CRT_RED
ENVDD_PCH
RH344 2.37K_0402_1%~DRH344 2.37K_0402_1%~D
LCD_ACLK-_PCH<27>
LCD_ACLK+_PCH<27>
LCD_A0-_PCH<27>
LCD_A1-_PCH<27>
LCD_A2-_PCH<27>
LCD_A0+_PCH<27>
LCD_A1+_PCH<27>
LCD_A2+_PCH<27>
LCD_BCLK-_PCH<27>
LCD_BCLK+_PCH<27>
LCD_B0-_PCH<27>
LCD_B1-_PCH<27>
LCD_B2-_PCH<27>
LCD_B0+_PCH<27>
LCD_B1+_PCH<27>
LCD_B2+_PCH<27>
PCH_CRT_BLU<31>
PCH_CRT_GRN<31>
PCH_CRT_RED<31>
PCH_CRT_DDC_CLK<31>
PCH_CRT_DDC_DAT<31>
RH123 20_0402_1%~DRH123 20_0402_1%~D
RH124 20_0402_1%~DRH124 20_0402_1%~D
1 2
1 2
1 2
PANEL_BKEN_PCH
ENVDD_PCH
BIA_PWM_PCH
LDDC_CLK_PCH
LDDC_DATA_PCH
LVD_IBG
LCD_ACLK-_PCH
LCD_ACLK+_PCH
LCD_A0-_PCH
LCD_A1-_PCH
LCD_A2-_PCH
LCD_A0+_PCH
LCD_A1+_PCH
LCD_A2+_PCH
LCD_BCLK-_PCH
LCD_BCLK+_PCH
LCD_B0-_PCH
LCD_B1-_PCH
LCD_B2-_PCH
LCD_B0+_PCH
LCD_B1+_PCH
LCD_B2+_PCH
PCH_CRT_BLU
PCH_CRT_GRN
PCH_CRT_RED
PCH_CRT_DDC_CLK
PCH_CRT_DDC_DAT
CRT_IREF
1K_0402_0.5%~D
1K_0402_0.5%~D
12
RH126
RH126
2
HSYNC
VSYNC
UH4D
UH4D
J47
L_BKLTEN
M45
L_VDD_EN
P45
L_BKLTCTL
T40
L_DDC_CLK
K47
L_DDC_DATA
T45
L_CTRL_CLK
P39
L_CTRL_DATA
AF37
LVD_IBG
AF36
LVD_VBG
AE48
LVD_VREFH
AE47
LVD_VREFL
AK39
LVDSA_CLK#
AK40
LVDSA_CLK
AN48
LVDSA_DATA#0
AM47
LVDSA_DATA#1
AK47
LVDSA_DATA#2
AJ48
LVDSA_DATA#3
AN47
LVDSA_DATA0
AM49
LVDSA_DATA1
AK49
LVDSA_DATA2
AJ47
LVDSA_DATA3
AF40
LVDSB_CLK#
AF39
LVDSB_CLK
AH45
LVDSB_DATA#0
AH47
LVDSB_DATA#1
AF49
LVDSB_DATA#2
AF45
LVDSB_DATA#3
AH43
LVDSB_DATA0
AH49
LVDSB_DATA1
AF47
LVDSB_DATA2
AF43
LVDSB_DATA3
N48
CRT_BLUE
P49
CRT_GREEN
T49
CRT_RED
T39
CRT_DDC_CLK
M40
CRT_DDC_DATA
M47
CRT_HSYNC
M49
CRT_VSYNC
T43
DAC_IREF
T42
CRT_IRTN
BD82PPSM-QNHN-A0_BGA989~D
BD82PPSM-QNHN-A0_BGA989~D
LVDS
LVDS
CRT
CRT
SDVO_TVCLKINN
SDVO_TVCLKINP
SDVO_STALLN
SDVO_STALLP
SDVO_INTN
SDVO_INTP
SDVO_CTRLCLK
SDVO_CTRLDATA
DDPB_AUXN
DDPB_AUXP
DDPB_HPD
DDPB_0N
DDPB_0P
DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P
DDPC_CTRLCLK
DDPC_CTRLDATA
DDPC_AUXN
DDPC_AUXP
DDPC_HPD
DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P
Digital Display Interface
Digital Display Interface
DDPD_CTRLCLK
DDPD_CTRLDATA
DDPD_AUXN
DDPD_AUXP
DDPD_HPD
DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
PCH (3/8)
PCH (3/8)
PCH (3/8)
LA-7933
LA-7933
LA-7933
1
AP43
AP45
AM42
AM40
AP39
AP40
P38
M39
AT49
AT47
AT40
AV42
AV40
AV45
AV46
AU48
AU47
AV47
AV49
P46
P42
AP47
AP49
AT38
AY47
AY49
AY43
AY45
BA47
BA48
BB47
BB49
M43
M36
AT45
AT43
BH41
BB43
BB45
BF44
BE44
BF42
BE42
BJ42
BG42
0.2
0.2
19 65Monday, November 07, 2011
19 65Monday, November 07, 2011
19 65Monday, November 07, 2011
0.2
of
of
of
Page 20
5
+3.3V_RUN
D D
C C
1K_0402_1%~D
1K_0402_1%~D
12
1 2
RH324 8.2K_0402_5%~DRH324 8.2K_0402_5%~D
1 2
RH325 8.2K_0402_5%~DRH325 8.2K_0402_5%~D
1 2
RH326 8.2K_0402_5%~DRH326 8.2K_0402_5%~D
1 2
RH329 8.2K_0402_5%~DRH329 8.2K_0402_5%~D
1 2
RH327 10K_0402_5%~DRH327 10K_0402_5%~D
1 2
RH330 10K_0402_5%~DRH330 10K_0402_5%~D
1 2
RH328 10K_0402_5%~DRH328 10K_0402_5%~D
1 2
RH332 10K_0402_5%~DRH332 10K_0402_5%~D
1 2
RH331 10K_0402_5%~DRH331 10K_0402_5%~D
1 2
RH340 10K_0402_5%~DRH340 10K_0402_5%~D
PCI_GNT3#
@RH333
@
RH333
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
PCI_REQ1#
LCD_CBL_DET#
PCH_GPIO54
PCH_GPIO3
CAM_MIC_CBL_DET#
PCH_GPIO52
A16swapoverrideStrap/Top‐Block
SwapOverridejumper
PCI_GNT#3
B B
Low=A16swap
High=Default
PLTRST_GPU#<16>
PLTRST_USH#<40>
PLTRST_MMI#<45>
PLTRST_XDP#<7>
PLTRST_LAN#<36>
RH343 0_0402_5%~DRH343 0_0402_5%~D
1 2
RH335 0_0402_5%~DRH335 0_0402_5%~D
1 2
RH336 0_0402_5%~DRH336 0_0402_5%~D
1 2
RH337 0_0402_5%~DRH337 0_0402_5%~D
1 2
RH338 0_0402_5%~DRH338 0_0402_5%~D
1 2
CLK_PCI_5048<46>
CLK_PCI_MEC<47>
CLK_PCI_DOCK<44>
CLK_PCI_LOOPBACK<18>
AvoidWWANnoiseaffectPCI3,3MCLK.
CLK_PCI_5048
CLK_PCI_MEC
CLK_PCI_DOCK
12P_0402_50V8J~D
12P_0402_50V8J~D
12P_0402_50V8J~D
12P_0402_50V8J~D
2
2
@
@
@
@
CH23
CH23
CH22
CH22
1
1
A A
5
12P_0402_50V8J~D
12P_0402_50V8J~D
2
1
PCH_PLTRST#<7,17>
CLK_PCI_LOOPBACK
12P_0402_50V8J~D
12P_0402_50V8J~D
2
@
@
CH21
CH21
1
@
@
CH20
CH20
RFrequest
+3.3V_RUN
1
B
2
A
5
P
G
3
CH102
CH102
1 2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
4
O
UH3
UH3
TC7SH08FU_SSOP5~D
TC7SH08FU_SSOP5~D
4
USB3RN1<39>
USB3RN2<39>
USB3RN4<44>
USB3RP1<39>
USB3RP2<39>
USB3RP4<44>
USB3TN1<39>
USB3TN2<39>
USB3TN4<44>
USB3TP1<39>
USB3TP2<39>
USB3TP4<44>
LCD_CBL_DET#<28>
CAM_MIC_CBL_DET#<28>
HDD_FALL_INT<34>
RH160 22_0402_5%~DRH160 22_0402_5%~D
RH102 22_0402_5%~DRH102 22_0402_5%~D
RH103 22_0402_5%~DRH103 22_0402_5%~D
RH105 22_0402_5%~DRH105 22_0402_5%~D
PCH_PLTRST#_EC <40,41,42,45,46,47>
4
1 2
RH334 0_0402_5%~DRH334 0_0402_5%~D
12
12
12
12
3
UH4E
UH4E
BG26
TP1
BJ26
TP2
BH25
TP3
BJ16
TP4
BG16
TP5
AH38
TP6
AH37
TP7
AK43
TP8
AK45
TP9
C18
TP10
N30
TP11
H3
TP12
AH12
TP13
AM4
TP14
AM5
TP15
Y13
TP16
K24
TP17
L24
TP18
AB46
TP19
AB45
TP20
B21
TP21
M20
TP22
AY16
TP23
BG46
TP24
BE28
USB3Rn1
BC30
USB3Rn2
BE32
USB3Rn3
BJ32
USB3Rn4
BC28
USB3Rp1
BE30
USB3Rp2
BF32
USB3Rp3
BG32
USB3Rp4
AV26
USB3Tn1
BB26
USB3Tn2
AU28
USB3Tn3
AY30
USB3Tn4
AU26
USB3TP1
AY26
USB3Tp2
AV28
USB3Tp3
AW30
USB3Tp4
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
PCI_REQ1#
PCH_GPIO52
PCH_GPIO54
BBS_BIT1
PCI_GNT3#
LCD_CBL_DET#
PCH_GPIO3
CAM_MIC_CBL_DET# USB_OC2#
FFS_PCH_INT
T104PAD~D @T104PAD~D @
PCH_PLTRST#
PCI_5048
PCI_MEC
PCI_DOCK
PCI_LOOPBACKOUT
K40
PIRQA#
K38
PIRQB#
H38
PIRQC#
G38
PIRQD#
C46
REQ1# / GPIO50
C44
REQ2# / GPIO52
E40
REQ3# / GPIO54
D47
GNT1# / GPIO51
E42
GNT2# / GPIO53
F46
GNT3# / GPIO55
G42
PIRQE# / GPIO2
G40
PIRQF# / GPIO3
C42
PIRQG# / GPIO4
D44
PIRQH# / GPIO5
K10
PME#
C6
PLTRST#
H49
CLKOUT_PCI0
H43
CLKOUT_PCI1
J48
CLKOUT_PCI2
K42
CLKOUT_PCI3
H40
CLKOUT_PCI4
BD82PPSM-QNHN-A0_BGA989~D
BD82PPSM-QNHN-A0_BGA989~D
RSVD
RSVD
USB30
USB30
PCI
PCI
USB
USB
OC0# / GPIO59
OC1# / GPIO40
OC2# / GPIO41
OC3# / GPIO42
OC4# / GPIO43
OC5# / GPIO9
OC6# / GPIO10
OC7# / GPIO14
RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
RSVD6
RSVD7
RSVD8
RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
RSVD17
RSVD18
RSVD19
RSVD20
RSVD21
RSVD22
RSVD23
RSVD24
RSVD25
RSVD26
RSVD27
RSVD28
RSVD29
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P
USBRBIAS#
USBRBIAS
AY7
AV7
AU3
BG4
AT10
BC8
AU2
AT4
AT3
AT1
AY3
AT5
AV3
AV1
BB1
BA3
BB5
BB3
BB7
BE8
BD4
BF6
AV5
AV10
AT8
AY5
BA2
AT12
BF3
USBP0-
C24
USBP0+
A24
USBP1-
C25
USBP1+
B25
USBP2-
C26
USBP2+
A26
USBP3-
K28
USBP3+
H28
USBP4-
E28
USBP4+
D28
USBP5-
C28
USBP5+
A28
USBP6-
C29
USBP6+
B29
USBP7-
N28
USBP7+
M28
USBP8-
L30
USBP8+
K30
USBP9-
G30
USBP9+
E30
USBP10-
C30
USBP10+
A30
USBP11-
L32
USBP11+
K32
USBP12-
G32
USBP12+
E32
USBP13-
C32
USBP13+
A32
USBRBIAS
C33
B33
A14
K20
B17
C16
L16
A16
D14
C14
USB_OC0#_R
USB_OC1#_R
USB_OC2#
USB_OC3#
USB_OC4#_R
USB_OC5#
USB_OC6#
1 2
Route single-end 50-ohms and max 500-mils length.
Minimum spacing to other signals: 15 mils
RH339 0_0402_5%~DRH339 0_0402_5%~D
RH341 0_0402_5%~DRH341 0_0402_5%~D
RH356 0_0402_5%~DRH356 0_0402_5%~D
SIO_EXT_SMI#
USBP0- <39>
USBP0+ <39>
USBP1- <39>
USBP1+ <39>
USBP2- <45>
USBP2+ <45>
USBP3- <44>
USBP3+ <44>
USBP4- <41>
USBP4+ <41>
USBP5- <41>
USBP5+ <41>
USBP6- <45>
USBP6+ <45>
USBP7- <40>
USBP7+ <40>
USBP8- <44>
USBP8+ <44>
USBP9- <38>
USBP9+ <38>
USBP10- <45>
USBP10+ <45>
USBP11- <48>
USBP11+ <48>
USBP12- <28>
USBP12+ <28>
USBP13- <28>
USBP13+ <28>
RH15122.6_0402_1%~D RH15122.6_0402_1%~D
1 2
1 2
1 2
2
----->Right Side
----->Right Side
----->Left Side
----->MLK DOCK
----->WLAN/WIMAX
----->WWAN/UWB
----->Left Side
----->USH
----->DOCK
----->ESATA
----->Express Card
----->Blue Tooth
----->Camera
----->LCD Touch
USB_OC0# <39>
USB_OC1# <45>
USB_OC2# <17>
USB_OC3# <17,45>
USB_OC4# <38>
USB_OC5# <17>
USB_OC6# <17>
SIO_EXT_SMI# <17,47>
USB_OC0#_R <17>
USB_OC1#_R <17>
USB_OC4#_R <17>
USB_OC0#_R
USB_OC1#_R
USB_OC3#
USB_OC4#_R
USB_OC5#
USB_OC6#
SIO_EXT_SMI#
BootBIOSStrap
BBS_BIT1 BootBIOSLocation
*
SATA_SLPD
(BBS_BIT0)
00 LPC
0 1 Reserved(NAND)
1 0 PCI
11 SPI
BBS_BIT1
12
RH342
@RH342
@
1K_0402_1%~D
1K_0402_1%~D
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
1
RPH1
RPH1
4 5
3 6
2 7
1 8
10K_1206_8P4R_5%~D
10K_1206_8P4R_5%~D
RPH2
RPH2
4 5
3 6
2 7
1 8
10K_1206_8P4R_5%~D
10K_1206_8P4R_5%~D
PCH (4/8)
PCH (4/8)
PCH (4/8)
LA-7933
LA-7933
LA-7933
1
+3.3V_ALW_PCH
20 65Monday, November 07, 2011
20 65Monday, November 07, 2011
20 65Monday, November 07, 2011
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+3.3V_ALW_PCH
4.7K_0402_5%~D
4.7K_0402_5%~D
RH54
RH54
1 2
SLP_ME_CSW_DEV#
1K_0402_1%~D
@RH353
1K_0402_1%~D
@
12
D D
RH353
SLP_ME_CSW_DEV#PLLONDIEVRENABLE
ENABLEDHIGH(DEFAULT)
SIO_EXT_SCI#_R<17>
SIO_EXT_SCI#<47>
USH_DET#<40>
MXM_PRESENTL#<16>
SIO_EXT_WAKE#<46>
PM_LANPHY_ENABLE<36>
PCH_GPIO15<17>
PCH_GPIO16<17>
DISABLEDLOW
T107PAD~D@ T107PAD~D@
SLP_ME_CSW_DEV#<17,46>
DGPU_HOLD_RST#<16>
+3.3V_ALW_PCH
SIO_EXT_WAKE#
C C
RH177 10K_0402_5%~DRH177 10K_0402_5%~D
RH354 1K_0402_1%~DRH354 1K_0402_1%~D
RH170 10K_0402_5%~DRH170 10K_0402_5%~D
RH175 10K_0402_5%~D@RH175 10K_0402_5%~D@
PCHhasinternalpullup20kohmon(GPIO27)
RH174 10K_0402_5%~DRH174 10K_0402_5%~D
RH172 10K_0402_5%~DRH172 10K_0402_5%~D
RH273 1K_0402_1%~D@RH273 1K_0402_1%~D@
RH274 1K_0402_1%~D@RH274 1K_0402_1%~D@
1 2
12
12
12
12
12
12
12
PCH_GPIO15
KB_DET#
PCH_GPIO27
PCH_GPIO36
PCH_GPIO37
PCH_GPIO17
PCH_GPIO16
PCH_GPIO35<17>
PCH_GPIO36<17>
PCH_GPIO37<17>
FFS_INT2<34>
TEMP_ALERT#<17,46>
KB_DET#<48>
Layoutnote:
Tracewide10mil&length30mil
AllNCTFpinsshouldhavethick
tracesat45°fromthepad.
B B
4
SIO_EXT_SCI#
RH259 0_0402_5%~DRH259 0_0402_5%~D
USH_DET#
DP_MUX_PRIORITY
MXM_PRESENTL#
SIO_EXT_WAKE#
PM_LANPHY_ENABLE
PCH_GPIO15
PCH_GPIO16
PCH_GPIO17
PCH_GPIO22
PCH_GPIO24
PCH_GPIO27
SLP_ME_CSW_DEV#
DGPU_HOLD_RST#
PCH_GPIO35
PCH_GPIO36
PCH_GPIO37
TPM_ID0
TPM_ID1
FFS_INT2
TEMP_ALERT#
KB_DET#
VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8
VSS_NCTF_9
VSS_NCTF_10
VSS_NCTF_11
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14
1 2
UH4F
UH4F
T7
BMBUSY# / GPIO0
A42
TACH1 / GPIO1
H36
TACH2 / GPIO6
E38
TACH3 / GPIO7
C10
GPIO8
C4
LAN_PHY_PWR_CTRL / GPIO12
G2
GPIO15
U2
SATA4GP / GPIO16
D40
TACH0 / GPIO17
T5
SCLOCK / GPIO22
E8
GPIO24
E16
GPIO27
P8
GPIO28
K1
STP_PCI# / GPIO34
K4
GPIO35
V8
SATA2GP / GPIO36
M5
SATA3GP / GPIO37
N2
SLOAD / GPIO38
M3
SDATAOUT0 / GPIO39
V13
SDATAOUT1 / GPIO48
V3
SATA5GP / GPIO49 / TEMP_ALERT#
D6
GPIO57
A4
VSS_NCTF_1
A44
VSS_NCTF_2
A45
VSS_NCTF_3
A46
VSS_NCTF_4
A5
VSS_NCTF_5
A6
VSS_NCTF_6
B3
VSS_NCTF_7
B47
VSS_NCTF_8
BD1
VSS_NCTF_9
BD49
VSS_NCTF_10
BE1
VSS_NCTF_11
BE49
VSS_NCTF_12
BF1
VSS_NCTF_13
BF49
VSS_NCTF_14
BD82PPSM-QNHN-A0_BGA989~D
BD82PPSM-QNHN-A0_BGA989~D
GPIO
GPIO
NCTF
NCTF
3
TACH4 / GPIO68
TACH5 / GPIO69
TACH6 / GPIO70
TACH7 / GPIO71
A20GATE
PECI
RCIN#
PROCPWRGD
THRMTRIP#
INIT3_3V#
DF_TVS
CPU/MISC
CPU/MISC
TS_VSS1
TS_VSS2
TS_VSS3
TS_VSS4
NC_1
VSS_NCTF_15
VSS_NCTF_16
VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19
VSS_NCTF_20
VSS_NCTF_21
VSS_NCTF_22
VSS_NCTF_23
VSS_NCTF_24
VSS_NCTF_25
VSS_NCTF_26
VSS_NCTF_27
VSS_NCTF_28
VSS_NCTF_29
VSS_NCTF_30
VSS_NCTF_31
VSS_NCTF_32
C40
B41
C41
A40
P4
AU16
P5
AY11
AY10
T14
AY1
AH8
AK11
AH10
AK10
P37
BG2
BG48
BH3
BH47
BJ4
BJ44
BJ45
BJ46
BJ5
BJ6
C2
C48
D1
D49
E1
E49
F1
F49
CONTACTLESS_DET#
DGPU_PWROK
MXM_PRESENTR#
PCH_GPIO71
SIO_A20GATE
SIO_RCIN#
H_CPUPWRGD
PCH_THRMTRIP#_R
INIT3_3V#
DF_TVS
NC_1
VSS_NCTF_15
VSS_NCTF_16
VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19
VSS_NCTF_20
VSS_NCTF_21
VSS_NCTF_22
VSS_NCTF_23
VSS_NCTF_24
VSS_NCTF_25
VSS_NCTF_26
VSS_NCTF_27
VSS_NCTF_28
VSS_NCTF_29
VSS_NCTF_30
VSS_NCTF_31
VSS_NCTF_32
2
CONTACTLESS_DET# <40>
DGPU_PWROK <16,46>
MXM_PRESENTR# <16>
T109PAD~D @T109PAD~D @
SIO_A20GATE <47>
SIO_RCIN# <47>
H_CPUPWRGD <7>
T106PAD~D @T106PAD~D @
T108PAD~D @T108PAD~D @
RH262 56_0402_5%~DRH262 56_0402_5%~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
CH97
CH97
2
12
Layoutnote:
Tracewide10mil&length30mil
AllNCTFpinsshouldhavethick
tracesat45°fromthepad.
CONTACTLESS_DET#
SIO_A20GATE
SIO_RCIN#
SIO_EXT_SCI#
USH_DET#
PCH_GPIO36
PCH_GPIO37
TEMP_ALERT#
PCH_GPIO22
+1.05V_RUN_VTT
PLACERH149CLOSETOTHEBRANCHINGPOINT
(TOCPUandNVRAMCONNECTOR)
+VCCDFTERM
2.2K_0402_5%~D
2.2K_0402_5%~D
RH149
RH149
MXM_PRESENTL#
PCH_GPIO17
DP_MUX_PRIORITY
PCH_GPIO16
PCH_GPIO35
MXM_PRESENTR#
12
1
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
12
12
12
12
12
12
+3.3V_RUN
RH25610K_0402_5%~D RH25610K_0402_5%~D
RH15810K_0402_5%~D RH15810K_0402_5%~D
RH20310K_0402_5%~D RH20310K_0402_5%~D
RH26310K_0402_5%~D RH26310K_0402_5%~D
RH164100K_0402_5%~D RH164100K_0402_5%~D
RH17110K_0402_5%~D @RH17110K_0402_5%~D @
RH1731K_0402_1%~D @RH1731K_0402_1%~D @
RH26610K_0402_5%~D RH26610K_0402_5%~D
RH18110K_0402_5%~D RH18110K_0402_5%~D
RH17810K_0402_5%~D RH17810K_0402_5%~D
RH2698.2K_0402_5%~D RH2698.2K_0402_5%~D
RH16310K_0402_5%~D RH16310K_0402_5%~D
RH2728.2K_0402_5%~D RH2728.2K_0402_5%~D
RH2758.2K_0402_5%~D @RH2758.2K_0402_5%~D @
RH179100K_0402_5%~D RH179100K_0402_5%~D
+3.3V_RUN +3.3V_RUN
10K_0402_5%~D
1@ RH267
10K_0402_5%~D
1@
RH267
12
20K_0402_5%~D
20K_0402_5%~D
3@ RH268
3@
RH268
H_SNB_IVB#<7>
1 2
RH150 0_0402_5%~DRH150 0_0402_5%~D
1 2
RH358 1K_0402_1%~DRH358 1K_0402_1%~D
DF_TVSDF_TVS_R
TPM_ID0 TPM_ID1
TPM_ID0
A A
1 2
TPM_ID1
10K_0402_5%~D
10K_0402_5%~D
2@ RH270
2@
RH270
1 2
2.2K_0402_5%~D
4@ RH271
2.2K_0402_5%~D
4@
12
RH271
ChinaTPM
NoTPM,NoChinaTPM
TBD
TPM
00
01
11
DMI&FDITerminationVoltage
DF_TVS
SettoVsswhenLOW
SettoVccwhenHIGH
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
PCH (5/8)
PCH (5/8)
PCH (5/8)
LA-7933
LA-7933
LA-7933
21 65Monday, November 07, 2011
21 65Monday, November 07, 2011
21 65Monday, November 07, 2011
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5
4
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1
CRTripplegarbagedisplayissue.
+VCCADAC
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
10U_0603_6.3V6M~D
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
D D
+1.05V_RUN
C C
B B
+1.05V_RUN
1 2
RH195 0.022_0805_1%@RH195 0.022_0805_1%@
1 2
RH247 1UH_LB2012T1R0M_20%~D@RH247 1UH_LB2012T1R0M_20%~D@
+VCCAPLL_FDI
+1.05V_RUN
+1.05V_RUN
+3.3V_RUN
1
2
+1.05V_RUN
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
2
+VCCAPLLEXP
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
1
CH44
CH44
2
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
CH51
CH51
+1.05V_RUN
+1.05V_RUN_VTT
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CH30
CH30
CH32
CH32
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CH45
CH45
2
+VCCAFDI_VRM
CH46
CH46
1
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CH33
CH33
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CH47
CH47
2
+VCCAPLL_FDI
1
2
@
@
CH40
CH40
1
2
UH4G
UH4G
AA23
VCCCORE[1]
AC23
VCCCORE[2]
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CH31
CH31
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CH48
CH48
AD21
VCCCORE[3]
AD23
VCCCORE[4]
AF21
VCCCORE[5]
AF23
VCCCORE[6]
AG21
VCCCORE[7]
AG23
VCCCORE[8]
AG24
VCCCORE[9]
AG26
VCCCORE[10]
AG27
VCCCORE[11]
AG29
VCCCORE[12]
AJ23
VCCCORE[13]
AJ26
VCCCORE[14]
AJ27
VCCCORE[15]
AJ29
VCCCORE[16]
AJ31
VCCCORE[17]
AN19
VCCIO[28]
BJ22
VCCAPLLEXP
AN16
VCCIO[15]
AN17
VCCIO[16]
AN21
VCCIO[17]
AN26
VCCIO[18]
AN27
VCCIO[19]
AP21
VCCIO[20]
AP23
VCCIO[21]
AP24
VCCIO[22]
AP26
VCCIO[23]
AT24
VCCIO[24]
AN33
VCCIO[25]
AN34
VCCIO[26]
BH29
VCC3_3[3]
AP16
VCCVRM[2]
BG6
VccAFDIPLL
AP17
VCCIO[27]
AU20
VCCDMI[2]
BD82PPSM-QNHN-A0_BGA989~D
BD82PPSM-QNHN-A0_BGA989~D
POWER
POWER
VCC CORE
VCC CORE
VCCIO
VCCIO
FDI
FDI
CRTLVDS
CRTLVDS
VCCTX_LVDS[1]
VCCTX_LVDS[2]
VCCTX_LVDS[3]
VCCTX_LVDS[4]
DMI
DMI
VCCDFTERM[1]
VCCDFTERM[2]
VCCDFTERM[3]
VCCDFTERM[4]
DFT / SPI HVCMOS
DFT / SPI HVCMOS
VCCADAC
VSSADAC
VCCALVDS
VSSALVDS
VCC3_3[6]
VCC3_3[7]
VCCVRM[3]
VCCDMI[1]
VCCCLKDMI
VCCSPI
U48
U47
AK36
AK37
AM37
AM38
AP36
AP37
V33
V34
AT16
AT20
AB36
AG16
AG17
AJ16
AJ17
V1
1
CH34
CH34
2
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
CH103
CH103
1
2
+1.05V_RUN_VCCCLKDMI
+VCCDFTERM
1
2
CH49 1U_0402_6.3V6K~DCH49 1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
CH52
CH52
2
+VCCSPI
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CH54
CH54
10U_0603_6.3V6M~D
1
1
CH35
CH35
CH36
CH36
2
2
+1.8V_RUN_LVDS
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
CH105
CH105
CH104
CH104
1
1
2
2
+VCCAFDI_VRM
1 2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
@CH106
@
1
CH106
CH50
CH50
2
RH276 0_0805_5%~D@ RH276 0_0805_5%~D@
@PJP70
@
1 2
PAD-OPEN1x1m
PAD-OPEN1x1m
RH202 0_0603_5%~DRH202 0_0603_5%~D
RH204 0_0603_5%~D@RH204 0_0603_5%~D@
1UH_GLFR1608T1R0M-LR_20%~D
1UH_GLFR1608T1R0M-LR_20%~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
CH37
CH37
2
100NH_HK1608R10J-T_5%_0603~D
100NH_HK1608R10J-T_5%_0603~D
+3.3V_RUN
1
2
12
RH205 0_0603_5%~DRH205 0_0603_5%~D
12
PJP70
12
12
LH1
LH1
12
+3.3V_RUN
LH8
LH8
12
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
CH43
CH43
+1.05V_RUN_VTT
+3.3V_RUN
+1.8V_RUN
+3.3V_M
+3.3V_RUN
+3.3V_RUN
+1.8V_RUN
+1.05V_RUN
PCH Power Rail Table
Voltage Rail
V_PROC_IO
V5REF
V5REF_Sus
Vcc3_3
VccADAC3
VccADPLLA
VccADPLLB
VccCore
VccDMI
Voltage
1.05
3.3
3.3
1.05
1.05
1.05
1.1
S0 Iccmax
Current (A)
0.001
5
5
0.001
0.001
0.228
0.063
0.08
0.08
1.7
0.047
1.05VccIO 3.711
VccASW
VccSPI
VccDSW3_3 0.001
1.05
3.3
3.3
0.903
0.01
1.8 0.002VCCDFTERM
3.3VccRTC 2 (mA)
3.3VccSus3_3
3.3VccSusHDA
0.095
0.01
VccVRM 1.5 0.167
1.05VccClkDMI 0.07
1.05VccSSC
VccDIFFCLKN 0.055
1.05
VccALVDS 3.3
0.095
0.001
1.8VccTX_LVDS 0.04
+1.5V_RUN +VCCAFDI_VRM
RH211 0_0603_5%~DRH211 0_0603_5%~D
A A
12
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
PCH (6/8)
PCH (6/8)
PCH (6/8)
LA-7933
LA-7933
LA-7933
22 65Monday, November 07, 2011
22 65Monday, November 07, 2011
22 65Monday, November 07, 2011
1
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QH4
+1.05V_RUN
+3.3V_ALW_PCH
+3.3V_ALW2
D D
+1.05V_RUN
+3.3V_RUN
C C
+1.05V_RUN
B B
A A
LH3
@LH3
@
1 2
10UH_LBR2012T100M_20%~D
10UH_LBR2012T100M_20%~D
1 2
RH215 0.022_0805_1%RH215 0.022_0805_1%
Note:IfEMIconcern,popwith
SHI00008S0L,10UH+‐20%
LH6
LH6
1 2
10UH_LBR2012T100M_20%~D
10UH_LBR2012T100M_20%~D
LH7
LH7
1 2
10UH_LBR2012T100M_20%~D
10UH_LBR2012T100M_20%~D
+1.05V_M
1 2
RH248 0.022_0805_1%@RH248 0.022_0805_1%@
+VCCAPLL_CPY_PCH
1
2
+1.05V_M_VCCSUS
1 2
RH201 0_0402_5%~DRH201 0_0402_5%~D
1 2
RH253 0_0402_5%~D@RH253 0_0402_5%~D@
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
@CH58
@
CH58
+3.3V_RUN_VCC_CLKF33
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
1
@
@
CH73
CH73
2
2
+1.05V_RUN_VCCA_A_DPL
+1.05V_RUN_VCCA_B_DPL
220U_B2_2.5VM_R35M~D
220U_B2_2.5VM_R35M~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CH94
CH94
CH92
CH92
1
+
+
2
2
+1.05V_RUN
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
+
+
2
1
2
+1.05V_RUN
CH74
CH74
220U_B2_2.5VM_R35M~D
220U_B2_2.5VM_R35M~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CH95
CH95
CH93
CH93
1
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CH79
CH79
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CH96
CH96
2
+1.05V_RUN_VTT
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
1
2
RH200 0.022_0805_1%@RH200 0.022_0805_1%@
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
CH55
CH55
+1.05V_M
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
CH86
CH86
CH85
CH85
2
1 2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CH67
CH67
2
CH81
CH81
1 2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
CH84
CH84
1
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
CH87
CH87
2
CH68
CH68
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
@CH57
@
1
CH57
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
@CH61
@
CH61
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CH69
CH69
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
CH78
CH78
1
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CH83
CH83
2
+VCCACLK
+VCCDSW3_3
+PCH_VCCDSW
+3.3V_RUN_VCC_CLKF33
+VCCAPLL_CPY_PCH
+VCCSUS1
1
2
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
CH64
CH64
CH65
CH65
1
1
2
2
+VCCRTCEXT
+VCCAFDI_VRM
+1.05V_RUN_VCCA_A_DPL
+1.05V_RUN_VCCA_B_DPL
+VCCSST
+1.05V_M_VCCSUS
@
@
+RTC_CELL
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
1
CH88
CH88
2
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
CH89
CH89
2
UH4J
UH4J
AD49
VCCACLK
T16
VCCDSW3_3
V12
DCPSUSBYP
T38
VCC3_3[5]
BH23
VCCAPLLDMI2
AL29
VCCIO[14]
AL24
DCPSUS[3]
AA19
VCCASW[1]
AA21
VCCASW[2]
AA24
VCCASW[3]
AA26
VCCASW[4]
AA27
VCCASW[5]
AA29
VCCASW[6]
AA31
VCCASW[7]
AC26
VCCASW[8]
AC27
VCCASW[9]
AC29
VCCASW[10]
AC31
VCCASW[11]
AD29
VCCASW[12]
AD31
VCCASW[13]
W21
VCCASW[14]
W23
VCCASW[15]
W24
VCCASW[16]
W26
VCCASW[17]
W29
VCCASW[18]
W31
VCCASW[19]
W33
VCCASW[20]
N16
DCPRTC
Y49
VCCVRM[4]
BD47
VCCADPLLA
BF47
VCCADPLLB
AF17
VCCIO[7]
AF33
VCCDIFFCLKN[1]
AF34
VCCDIFFCLKN[2]
AG34
VCCDIFFCLKN[3]
AG33
VCCSSC
V16
DCPSST
T17
DCPSUS[1]
V19
DCPSUS[2]
BJ8
V_PROC_IO
A22
VCCRTC
BD82PPSM-QNHN-A0_BGA989~D
BD82PPSM-QNHN-A0_BGA989~D
CH90
CH90
POWER
POWER
VCCSUS3_3[7]
VCCSUS3_3[8]
VCCSUS3_3[9]
VCCSUS3_3[10]
VCCSUS3_3[6]
VCCSUS3_3[1]
VCCSUS3_3[2]
VCCSUS3_3[3]
VCCSUS3_3[4]
VCCSUS3_3[5]
Clock and Miscellaneous
Clock and Miscellaneous
PCI/GPIO/LPCMISC
PCI/GPIO/LPCMISC
VCCAPLLSATA
SATA USB
SATA USB
CPURTC
CPURTC
HDA
HDA
VCCIO[29]
VCCIO[30]
VCCIO[31]
VCCIO[32]
VCCIO[33]
VCCIO[34]
V5REF_SUS
DCPSUS[4]
V5REF
VCC3_3[1]
VCC3_3[8]
VCC3_3[4]
VCC3_3[2]
VCCIO[5]
VCCIO[12]
VCCIO[13]
VCCIO[6]
VCCVRM[1]
VCCIO[2]
VCCIO[3]
VCCIO[4]
VCCASW[22]
VCCASW[23]
VCCASW[21]
VCCSUSHDA
N26
P26
P28
T27
T29
T23
T24
V23
V24
P24
T26
M26
AN23
AN24
P34
N20
N22
P20
P22
AA16
W16
T34
AJ2
AF13
AH13
AH14
AF14
AK1
AF11
AC16
AC17
AD17
T21
V21
T19
P32
+1.05V_RUN
+3.3V_ALW_PCH
+PCH_V5REF_SUS
+VCCA_USBSUS
+PCH_V5REF_RUN
+VCCSATAPLL
+3.3V_ALW_PCH
1
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CH56
CH56
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
CH59
CH59
1
2
+1.05V_RUN
+3.3V_ALW_PCH
+3.3V_RUN
1
2
+VCCAFDI_VRM
+1.05V_M
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
CH91
CH91
+3.3V_ALW_PCH
1
2
1U_0603_10V7K~D
1U_0603_10V7K~D
CH70
CH70
1
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
CH76
CH76
+1.05V_RUN
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
CH60
CH60
+3.3V_ALW_PCH
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
2
+3.3V_RUN
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
CH72
CH72
1
+3.3V_RUN
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CH82
CH82
2
ALW_ON_3.3V#<50>
CH66
CH66
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
CH75
CH75
1
2
+1.05V_RUN
1
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
+PWR_SRC_S
100K_0402_5%~D
100K_0402_5%~D
RH357
RH357
1 2
+5V_ALW_PCH_ENBLE
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
13
D
D
QH6
QH6
2
G
G
S
S
RB751S40T1_SOD523-2~D
RB751S40T1_SOD523-2~D
+PCH_V5REF_SUS
RB751S40T1_SOD523-2~D
RB751S40T1_SOD523-2~D
+PCH_V5REF_RUN
CRB0.7RH208,RH213tracewidth20mil.
CH77
CH77
+VCCSATAPLL
1
2
QH4
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
D
D
1 3
2
1M_0402_5%~D
1M_0402_5%~D
@RH32
@
1
12
RH32
2
+3.3V_ALW_PCH +5V_ALW_PCH
21
DH2
DH2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
CH63
CH63
1
2
+3.3V_RUN +5V_RUN
DH3
DH3
1U_0603_10V7K~D
1U_0603_10V7K~D
CH71
CH71
+VCCA_USBSUS
LH5
@LH5
@
1 2
10UH_LBR2012T100M_20%~D
10UH_LBR2012T100M_20%~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
@CH80
@
CH80
+5V_ALW_PCH+5V_ALW
S
S
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
CH98
CH98
G
G
1
2
3300P_0402_50V7K~D
3300P_0402_50V7K~D
CH8
CH8
12
RH208
RH208
10_0402_1%~D
10_0402_1%~D
21
12
RH213
RH213
10_0402_1%~D
10_0402_1%~D
1
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
@CH62
@
1
CH62
2
+1.05V_RUN
20K_0402_5%~D
20K_0402_5%~D
12
RH278
RH278
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
PCH (7/8)
PCH (7/8)
PCH (7/8)
LA-7933
LA-7933
LA-7933
1
23 65Monday, November 07, 2011
23 65Monday, November 07, 2011
23 65Monday, November 07, 2011
0.2
0.2
0.2
of
of
of
Page 24
5
UH4H
D D
C C
B B
A A
UH4H
H5
VSS[0]
AA17
VSS[1]
AA2
VSS[2]
AA3
VSS[3]
AA33
VSS[4]
AA34
VSS[5]
AB11
VSS[6]
AB14
VSS[7]
AB39
VSS[8]
AB4
VSS[9]
AB43
VSS[10]
AB5
VSS[11]
AB7
VSS[12]
AC19
VSS[13]
AC2
VSS[14]
AC21
VSS[15]
AC24
VSS[16]
AC33
VSS[17]
AC34
VSS[18]
AC48
VSS[19]
AD10
VSS[20]
AD11
VSS[21]
AD12
VSS[22]
AD13
VSS[23]
AD19
VSS[24]
AD24
VSS[25]
AD26
VSS[26]
AD27
VSS[27]
AD33
VSS[28]
AD34
VSS[29]
AD36
VSS[30]
AD37
VSS[31]
AD38
VSS[32]
AD39
VSS[33]
AD4
VSS[34]
AD40
VSS[35]
AD42
VSS[36]
AD43
VSS[37]
AD45
VSS[38]
AD46
VSS[39]
AD8
VSS[40]
AE2
VSS[41]
AE3
VSS[42]
AF10
VSS[43]
AF12
VSS[44]
AD14
VSS[45]
AD16
VSS[46]
AF16
VSS[47]
AF19
VSS[48]
AF24
VSS[49]
AF26
VSS[50]
AF27
VSS[51]
AF29
VSS[52]
AF31
VSS[53]
AF38
VSS[54]
AF4
VSS[55]
AF42
VSS[56]
AF46
VSS[57]
AF5
VSS[58]
AF7
VSS[59]
AF8
VSS[60]
AG19
VSS[61]
AG2
VSS[62]
AG31
VSS[63]
AG48
VSS[64]
AH11
VSS[65]
AH3
VSS[66]
AH36
VSS[67]
AH39
VSS[68]
AH40
VSS[69]
AH42
VSS[70]
AH46
VSS[71]
AH7
VSS[72]
AJ19
VSS[73]
AJ21
VSS[74]
AJ24
VSS[75]
AJ33
VSS[76]
AJ34
VSS[77]
AK12
VSS[78]
AK3
VSS[79]
BD82PPSM-QNHN-A0_BGA989~D
BD82PPSM-QNHN-A0_BGA989~D
4
AK38
VSS[80]
AK4
VSS[81]
AK42
VSS[82]
AK46
VSS[83]
AK8
VSS[84]
AL16
VSS[85]
AL17
VSS[86]
AL19
VSS[87]
AL2
VSS[88]
AL21
VSS[89]
AL23
VSS[90]
AL26
VSS[91]
AL27
VSS[92]
AL31
VSS[93]
AL33
VSS[94]
AL34
VSS[95]
AL48
VSS[96]
AM11
VSS[97]
AM14
VSS[98]
AM36
VSS[99]
AM39
VSS[100]
AM43
VSS[101]
AM45
VSS[102]
AM46
VSS[103]
AM7
VSS[104]
AN2
VSS[105]
AN29
VSS[106]
AN3
VSS[107]
AN31
VSS[108]
AP12
VSS[109]
AP19
VSS[110]
AP28
VSS[111]
AP30
VSS[112]
AP32
VSS[113]
AP38
VSS[114]
AP4
VSS[115]
AP42
VSS[116]
AP46
VSS[117]
AP8
VSS[118]
AR2
VSS[119]
AR48
VSS[120]
AT11
VSS[121]
AT13
VSS[122]
AT18
VSS[123]
AT22
VSS[124]
AT26
VSS[125]
AT28
VSS[126]
AT30
VSS[127]
AT32
VSS[128]
AT34
VSS[129]
AT39
VSS[130]
AT42
VSS[131]
AT46
VSS[132]
AT7
VSS[133]
AU24
VSS[134]
AU30
VSS[135]
AV16
VSS[136]
AV20
VSS[137]
AV24
VSS[138]
AV30
VSS[139]
AV38
VSS[140]
AV4
VSS[141]
AV43
VSS[142]
AV8
VSS[143]
AW14
VSS[144]
AW18
VSS[145]
AW2
VSS[146]
AW22
VSS[147]
AW26
VSS[148]
AW28
VSS[149]
AW32
VSS[150]
AW34
VSS[151]
AW36
VSS[152]
AW40
VSS[153]
AW48
VSS[154]
AV11
VSS[155]
AY12
VSS[156]
AY22
VSS[157]
AY28
VSS[158]
3
UH4I
UH4I
AY4
VSS[159]
AY42
VSS[160]
AY46
VSS[161]
AY8
VSS[162]
B11
VSS[163]
B15
VSS[164]
B19
VSS[165]
B23
VSS[166]
B27
VSS[167]
B31
VSS[168]
B35
VSS[169]
B39
VSS[170]
B7
VSS[171]
F45
VSS[172]
BB12
VSS[173]
BB16
VSS[174]
BB20
VSS[175]
BB22
VSS[176]
BB24
VSS[177]
BB28
VSS[178]
BB30
VSS[179]
BB38
VSS[180]
BB4
VSS[181]
BB46
VSS[182]
BC14
VSS[183]
BC18
VSS[184]
BC2
VSS[185]
BC22
VSS[186]
BC26
VSS[187]
BC32
VSS[188]
BC34
VSS[189]
BC36
VSS[190]
BC40
VSS[191]
BC42
VSS[192]
BC48
VSS[193]
BD46
VSS[194]
BD5
VSS[195]
BE22
VSS[196]
BE26
VSS[197]
BE40
VSS[198]
BF10
VSS[199]
BF12
VSS[200]
BF16
VSS[201]
BF20
VSS[202]
BF22
VSS[203]
BF24
VSS[204]
BF26
VSS[205]
BF28
VSS[206]
BD3
VSS[207]
BF30
VSS[208]
BF38
VSS[209]
BF40
VSS[210]
BF8
VSS[211]
BG17
VSS[212]
BG21
VSS[213]
BG33
VSS[214]
BG44
VSS[215]
BG8
VSS[216]
BH11
VSS[217]
BH15
VSS[218]
BH17
VSS[219]
BH19
VSS[220]
H10
VSS[221]
BH27
VSS[222]
BH31
VSS[223]
BH33
VSS[224]
BH35
VSS[225]
BH39
VSS[226]
BH43
VSS[227]
BH7
VSS[228]
D3
VSS[229]
D12
VSS[230]
D16
VSS[231]
D18
VSS[232]
D22
VSS[233]
D24
VSS[234]
D26
VSS[235]
D30
VSS[236]
D32
VSS[237]
D34
VSS[238]
D38
VSS[239]
D42
VSS[240]
D8
VSS[241]
E18
VSS[242]
E26
VSS[243]
G18
VSS[244]
G20
VSS[245]
G26
VSS[246]
G28
VSS[247]
G36
VSS[248]
G48
VSS[249]
H12
VSS[250]
H18
VSS[251]
H22
VSS[252]
H24
VSS[253]
H26
VSS[254]
H30
VSS[255]
H32
VSS[256]
H34
VSS[257]
F3
VSS[258]
BD82PPSM-QNHN-A0_BGA989~D
BD82PPSM-QNHN-A0_BGA989~D
2
VSS[259]
VSS[260]
VSS[261]
VSS[262]
VSS[263]
VSS[264]
VSS[265]
VSS[266]
VSS[267]
VSS[268]
VSS[269]
VSS[270]
VSS[271]
VSS[272]
VSS[273]
VSS[274]
VSS[275]
VSS[276]
VSS[277]
VSS[278]
VSS[279]
VSS[280]
VSS[281]
VSS[282]
VSS[283]
VSS[284]
VSS[285]
VSS[286]
VSS[287]
VSS[288]
VSS[289]
VSS[290]
VSS[291]
VSS[292]
VSS[293]
VSS[294]
VSS[295]
VSS[296]
VSS[297]
VSS[298]
VSS[299]
VSS[300]
VSS[301]
VSS[302]
VSS[303]
VSS[304]
VSS[305]
VSS[306]
VSS[307]
VSS[308]
VSS[309]
VSS[310]
VSS[311]
VSS[312]
VSS[313]
VSS[314]
VSS[315]
VSS[316]
VSS[317]
VSS[318]
VSS[319]
VSS[320]
VSS[321]
VSS[322]
VSS[323]
VSS[324]
VSS[325]
VSS[328]
VSS[329]
VSS[330]
VSS[331]
VSS[333]
VSS[334]
VSS[335]
VSS[337]
VSS[338]
VSS[340]
VSS[342]
VSS[343]
VSS[344]
VSS[345]
VSS[346]
VSS[347]
VSS[348]
VSS[349]
VSS[350]
VSS[351]
VSS[352]
H46
K18
K26
K39
K46
K7
L18
L2
L20
L26
L28
L36
L48
M12
P16
M18
M22
M24
M30
M32
M34
M38
M4
M42
M46
M8
N18
P30
N47
P11
P18
T33
P40
P43
P47
P7
R2
R48
T12
T31
T37
T4
W34
T46
T47
T8
V11
V17
V26
V27
V29
V31
V36
V39
V43
V7
W17
W19
W2
W27
W48
Y12
Y38
Y4
Y42
Y46
Y8
BG29
N24
AJ3
AD47
B43
BE10
BG41
G14
H16
T36
BG22
BG24
C22
AP13
M14
AP3
AP1
BE16
BC16
BG28
BJ28
1
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
PCH (8/8)
PCH (8/8)
PCH (8/8)
LA-7933
LA-7933
LA-7933
24 65Monday, November 07, 2011
24 65Monday, November 07, 2011
24 65Monday, November 07, 2011
1
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Page 25
5
PlaceQ26underCPUforOTPsensor.
PlaceC266closetotheQ26aspossible
100P_0402_50V8J~D
D D
C C
100P_0402_50V8J~D
@C339
@
2
C339
1
PutQ17ontheBotsideforSkintemperature PlaceQ33underStack_SODIMMonTOPside.
100P_0402_50V8J~D
100P_0402_50V8J~D
@C340
@
1
C340
2
PlaceQ14nearDockingCONNonBOTside PlaceQ16underButterfly'sCHB(BOTside).
100P_0402_50V8J~D
100P_0402_50V8J~D
1
@C272
@
C272
2
C
C
2
B
B
E
E
3 1
Q26
Q26
MMBT3904WT1G_SC70-3~D
MMBT3904WT1G_SC70-3~D
C
C
2
B
B
E
E
3 1
Q17
Q17
MMBT3904WT1G_SC70-3~D
MMBT3904WT1G_SC70-3~D
C
C
2
B
B
E
E
3 1
Q14
Q14
MMBT3904WT1G_SC70-3~D
MMBT3904WT1G_SC70-3~D
REM_DIODE1_P_4002
REM_DIODE1_N_4002
REM_DIODE2_P_4002
REM_DIODE2_N_4002
REM_DIODE3_P_4002
REM_DIODE3_N_4002
4
PlaceQ15underButterfly'sCHA(BOTside).
100P_0402_50V8J~D
100P_0402_50V8J~D
@C288
@
C288
1
2
100P_0402_50V8J~D
100P_0402_50V8J~D
@C349
@
C349
2
1
100P_0402_50V8J~D
100P_0402_50V8J~D
@C294
@
C294
1
2
C
C
2
B
B
E
E
3 1
Q15
Q15
MMBT3904WT1G_SC70-3~D
MMBT3904WT1G_SC70-3~D
C
C
2
B
B
E
E
3 1
Q33
Q33
MMBT3904WT1G_SC70-3~D
MMBT3904WT1G_SC70-3~D
C
C
2
B
B
E
E
3 1
Q16
Q16
MMBT3904WT1G_SC70-3~D
MMBT3904WT1G_SC70-3~D
REM_DIODE4_P_4002
2200P_0402_50V7K~D
2200P_0402_50V7K~D
1
C335
C335
C335closetoU18
2
REM_DIODE4_N_4002
REM_DIODE5_P_4002
2200P_0402_50V7K~D
2200P_0402_50V7K~D
1
C347
C347
C347closetoU18
2
REM_DIODE5_N_4002
REM_DIODE8_P_4002
REM_DIODE8_N_4002
3
+5V_RUN
1
2
10U_0805_10V6K~D
10U_0805_10V6K~D
C329
C329
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C364
C364
1
2
FAN1_TACH_FB
FAN1_PWM
2
CPUFAN
JFAN1
CONN@JFAN1
CONN@
6
GND2
5
GND1
4
4
3
3
2
2
1
1
ACES_50271-0040N-001
ACES_50271-0040N-001
Swappindefinetomeet
LinkCISOK
H_THERMTRIP#<7>
+1.05V_RUN_VTT
2.2K_0402_5%~D
2.2K_0402_5%~D
R399
R399
1 2
2
B
B
1
+3.3V_M
8.2K_0402_5%~D
8.2K_0402_5%~D
12
PMST3904_SOT323-3~D
PMST3904_SOT323-3~D
C
C
E
E
3 1
R396
R396
THERMATRIP1#
Q28
Q28
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C327
C327
1
2
newconnector
2.2K_0402_5%~D
2.2K_0402_5%~D
R401
R401
2
B
B
+3.3V_M
8.2K_0402_5%~D
8.2K_0402_5%~D
12
PMST3904_SOT323-3~D
PMST3904_SOT323-3~D
C
C
E
E
3 1
R397
R397
THERMATRIP3#
Q115
Q115
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C343
C343
2
+5V_RUN
1
2
FAN2_PWM
D90 RB751S40T1_SOD523-2~DD90 RB751S40T1_SOD523-2~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
10U_0805_10V6K~D
10U_0805_10V6K~D
C370
C370
C330
C330
1
2
MXMFAN
JFAN2
CONN@JFAN2
CONN@
6
GND2
5
R213
R213
12
0_0603_5%~D@
0_0603_5%~D@
FAN2_TACH_FB
FAN2_PWM_D
21
GND1
4
4
3
3
2
2
1
1
ACES_50271-0040N-001
ACES_50271-0040N-001
+3.3V_MXM
10K_0402_5%~D
10K_0402_5%~D
12
12
@
@
R400
R400
THERMB3
LinkCISOK
Swappindefinetomeet
newconnector
DGPU_THERMTRIP#<16>
+3.3V_M
BC_INT#_EMC4002
1 2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
C341
C341
1
2
+3.3V_M
8.2K_0402_5%~D
8.2K_0402_5%~D
12
R398
R398
THERMATRIP2#
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C350
C350
2
12
EMC4022_GPIO2
12
FAN2_PWM
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C348
C348
2
+RTC_CELL
1
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
C336
C336
1
2
+3VM_THRM
PCH_PWRGD#<47>
VSET_4002
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
953_0402_1%~D
953_0402_1%~D
12
C333
C333
+3.3V_M
R406
R406
1 2
C334 2200P_0402_50V7K~DC334 2200P_0402_50V7K~D
1 2
C344 2200P_0402_50V7K~DC344 2200P_0402_50V7K~D
1 2
C346 2200P_0402_50V7K~DC346 2200P_0402_50V7K~D
R389 10K_0402_5%~DR389 10K_0402_5%~D
R391 1K_0402_1%~DR391 1K_0402_1%~D
+3VM_THRM
R385 10K_0402_5%~DR385 10K_0402_5%~D
R404 10K_0402_5%~DR404 10K_0402_5%~D
R403 10K_0402_5%~DR403 10K_0402_5%~D
+3.3V_M
B B
A A
R289 22_0402_5%~DR289 22_0402_5%~D
12
BC_DAT_EMC4002<47>
BC_CLK_EMC4002<47>
1 2
1 2
R393 4.7K_0402_5%~DR393 4.7K_0402_5%~D
REM_DIODE1_P_4002
REM_DIODE1_N_4002
REM_DIODE2_P_4002
REM_DIODE2_N_4002
REM_DIODE3_P_4002
REM_DIODE3_N_4002
VDD_PWRGD
3V_PWROK#
THERMATRIP1#
THERMATRIP2#
THERMATRIP3#
VSET_4002
+ADDR_XEN
12
FAN1_TACH_FB
EMC4022_GPIO2
U18
U18
10
SMDATA/BC-LINK_DATA
11
SMCLK/BC-LINK_CLK
36
DP1/VREF_T
35
DN1/THERM
38
DP2
37
DN2
41
DP3/DN7
40
DN3/DP7
4
VDD
21
RTC_PWR3V
THERMTRIP_SIO/PWM1/GPIO5
18
VDD_PWRGD
17
3V_PWROK#
22
THERMTRIP1#
23
THERMTRIP2#
24
THERMTRIP3#
42
VSET
3
ADDR_MODE/XEN
6
VDDH1
5
VDDH1
9
VDDL1
7
FAN_OUT1
8
FAN_OUT1
15
TACH1/GPIO3
14
CLK_IN/GPIO2
DP4/DN8
DN4/DP8
DP5/DN9
DN5/DP9
DP6/VREF_T2
DN6/VIN2
ATF_INT#/BC-LINK_IRQ#
POWER_SW#
ACAVAIL_CLR
SYS_SHDN#
LDO_SHDN#
LDO_POK
LDO_SET
LDO_OUT/FAN_OUT2
LDO_OUT/FAN_OUT2
TACH2/GPIO4
PWM2/GPIO1
VSS
EMC4002-HZH C_QFN48_7X7~D
EMC4002-HZH C_QFN48_7X7~D
49
VCP1
VCP2
VDDH2
VDDH2
VDDL2
VIN1
39
48
VCP2
45
44
43
REM_DIODE5_P_4002
47
REM_DIODE5_N_4002
46
1
2
BC_INT#_EMC4002
12
POWER_SW#
26
27
FAN1_PWM
20
25
19
34
LDO_SET
33
32
31
28
29
30
FAN2_TACH_FB
16
FAN2_PWM
13
R388 4.7K_0402_5%~DR388 4.7K_0402_5%~D
1 2
R392 1K_0402_1%~DR392 1K_0402_1%~D
1 2
REM_DIODE4_P_4002
REM_DIODE4_N_4002
REM_DIODE8_N_4002
REM_DIODE8_P_4002
BC_INT#_EMC4002 <47>
ACAV_IN <16,47,60,61>
1 2
R390 47K_0402_1%~D@R390 47K_0402_1%~D@
12
R40210K_0402_5%~D R40210K_0402_5%~D
12
+3.3V_M
R39510K_0402_5%~D @ R39510K_0402_5%~D @
MAX8731_IINP <60>
THERM_STP# <52>
+RTC_CELL
POWER_SW#
4
+RTC_CELL
O
FAN2_TACH_FB
FAN1_PWM
FAN1_TACH_FB
FAN2_PWM_D
C287
C287
1 2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
5
1
P
B
2
A
G
U10
U10
3
TC7SH08FU_SSOP5~D
TC7SH08FU_SSOP5~D
+3.3V_RUN
12
R40510K_0402_5%~D R40510K_0402_5%~D
12
R40710K_0402_5%~D R40710K_0402_5%~D
12
R40810K_0402_5%~D R40810K_0402_5%~D
12
R40910K_0402_5%~D R40910K_0402_5%~D
DOCK_PWR_SW# <47>
POWER_SW_IN# <47>
Rest=953,Tp=88degree
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
FAN control
FAN control
FAN control
LA-7933
LA-7933
LA-7933
1
25 65Monday, November 07, 2011
25 65Monday, November 07, 2011
25 65Monday, November 07, 2011
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5
4
3
2
1
MonitorPWR_SRC_MXM
+3.3V_ALW
D D
DYN_TURB_GPU_PWR_ALRT#
12
R1410K_0402_5%~D R1410K_0402_5%~D
RESISTOR(5%) SMBUSADDRESS
0 1001_100(r/w)
100 1001_101(r/w)
180 1001_110(r/w)
300 1001_111(r/w)
430 1001_000(r/w)
560 1001_001(r/w)
750 1001_010(r/w)
1270 1001_011(r/w)
1600 0101_000(r/w)
2000 0101_001(r/w)
2700 0101_010(r/w)
3600 0101_011(r/w)
5600 0101_100(r/w)
0101_100(r/w)9100
20000 0101_101(r/w)
Open 0011_000(r/w)
C C
+MXM_PWR_SRC
PR24
@PR24
@
10_0402_1%~D
10_0402_1%~D
1 2
1
2
PR25
@PR25
@
0.005_1206_1%~D
0.005_1206_1%~D
+MXM_PWR
B B
4
@PR14
@
3
10_0402_1%~D
10_0402_1%~D
PR14
1 2
12
PC6
PC6
@
@
100P_0402_50V8J~D
100P_0402_50V8J~D
MonitorPWR_SRC_MXMforDELLrequest
Footprint= A7600L_SC70_6
U59
@U59
@
5
IN-
4
IN+
1
REF
INA211AIDCKRG4_SC70-6
INA211AIDCKRG4_SC70-6
PR27
PR27
@
@
PR26
@PR26
@
203K_0402_1%~D
203K_0402_1%~D
50K_0402_1%
50K_0402_1%
12
12
PC20
PC20
@
@
OUT
V+
GND
2VREF_6182
1.6V
12
100P_0402_50V8J~D
100P_0402_50V8J~D
6
3
2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1 2
+3.3V_ALW2
@
@
PC17
PC17
PR28
@PR28
@
20K_0402_1%~D
20K_0402_1%~D
1 2
12
+5V_ALW
PC19
PC19
@
@
220P_0402_50V8J~D
220P_0402_50V8J~D
+5V_ALW
12
12
PC21
PC21
PC18
PC18
@
@
@
@
100P_0402_50V8J~D
100P_0402_50V8J~D
0.01U_0402_25V7K~D
0.01U_0402_25V7K~D
3
+
2
-
PR29
@PR29
@
1.8M_0402_1%
1.8M_0402_1%
1 2
8
PU2A
@PU2A
@
P
1
O
G
LM393DR_SO8~D
LM393DR_SO8~D
4
PR31
PR31
@
@
1 2
PR30
PR30
@
@
221K_0402_1%~D
221K_0402_1%~D
0_0402_5%~D
0_0402_5%~D
1 2
61
2
PQ1005A
PQ1005A
@
@
DMN66D0LDW-7 2N_SOT363-6~D
DMN66D0LDW-7 2N_SOT363-6~D
DYN_TURB_GPU_PWR_ALRT#<16,47>
A A
MAX130W Protection Circuit
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
Current Sensor
Current Sensor
Current Sensor
LA-7933
LA-7933
LA-7933
26 65Wednesday, November 09, 2011
26 65Wednesday, November 09, 2011
26 65Wednesday, November 09, 2011
1
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5
D D
ChannelA ChannelB
U11
U11
MXM_LVDS_ACLK+<16>
MXM_LVDS_ACLK-<16>
MXM_LVDS_A2+<16>
MXM_LVDS_A2-<16>
FromMXM
C C
FromPCH
B B
MXM_LVDS_A1+<16>
MXM_LVDS_A1-<16>
MXM_LVDS_A0+<16>
MXM_LVDS_A0-<16>
MXM_LVDS_DDC_CLK<16>
MXM_LVDS_DDC_DAT<16>
LCD_ACLK+_PCH<19>
LCD_ACLK-_PCH<19>
LCD_A2+_PCH<19>
LCD_A2-_PCH<19>
LCD_A1+_PCH<19>
LCD_A1-_PCH<19>
LCD_A0+_PCH<19>
LCD_A0-_PCH<19>
LDDC_CLK_PCH<19>
LDDC_DATA_PCH<19>
+3.3V_MXM
31
D0_A+
30
D0_A-
26
D1_A+
25
D1_A-
22
D2_A+
21
D2_A-
18
D3_A+
17
D3_A-
5
1A_A
13
2A_A
33
3A_A
29
D0_B+
28
D0_B-
24
D1_B+
23
D1_B-
20
D2_B+
19
D2_B-
16
D3_B+
15
D3_B-
6
1A_B
14
2A_B
32
3A_B
TS3DV20812RHHR_VQFN36_6X6~D
TS3DV20812RHHR_VQFN36_6X6~D
1 2
R1122 2.2K_0402_5%~D@R1122 2.2K_0402_5%~D@
1 2
R1121 2.2K_0402_5%~D@R1121 2.2K_0402_5%~D@
MXMalreadyinternalpullup.
4
VDD
D0+
D0-
D1+
D1-
D2+
D2-
D3+
D3-
1A
2A
3A
SEL
TPAD
GND
MXM_LVDS_DDC_CLK
MXM_LVDS_DDC_DAT
35
SW_LVDS_ACLK+
36
1
2
3
7
8
9
10
4
12
34
27
37
11
1
2
SW_LVDS_ACLKSW_LVDS_A2+
SW_LVDS_A2SW_LVDS_A1+
SW_LVDS_A1SW_LVDS_A0+
SW_LVDS_A0LDDC_CLK_SW
LDDC_DATA_SW
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
@
@
C1146
C1146
C1145
C1145
1
2
SW_LVDS_ACLK+ <28>
SW_LVDS_ACLK- <28>
SW_LVDS_A2+ <28>
SW_LVDS_A2- <28>
SW_LVDS_A1+ <28>
SW_LVDS_A1- <28>
SW_LVDS_A0+ <28>
SW_LVDS_A0- <28>
LDDC_CLK_SW <28>
LDDC_DATA_SW <28>
DGPU_SELECT# <28,31,46>
ChannelSEL
0
1
DO=B
Source
GPUDO=A
PCH
3
FromMXM
FromPCH
2
+3.3V_RUN+3.3V_RUN
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
@C1159
@
C1159
C1149
1
U13
U13
31
MXM_LVDS_BCLK+<16>
MXM_LVDS_BCLK-<16>
MXM_LVDS_B2+<16>
MXM_LVDS_B2-<16>
MXM_LVDS_B1+<16>
MXM_LVDS_B1-<16>
MXM_LVDS_B0+<16>
MXM_LVDS_B0-<16>
LCD_BCLK+_PCH<19>
LCD_BCLK-_PCH<19>
LCD_B2+_PCH<19>
LCD_B2-_PCH<19>
LCD_B1+_PCH<19>
LCD_B1-_PCH<19>
LCD_B0+_PCH<19>
LCD_B0-_PCH<19>
D0_A+
30
D0_A-
26
D1_A+
25
D1_A-
22
D2_A+
21
D2_A-
18
D3_A+
17
D3_A-
5
1A_A
13
2A_A
33
3A_A
29
D0_B+
28
D0_B-
24
D1_B+
23
D1_B-
20
D2_B+
19
D2_B-
16
D3_B+
15
D3_B-
6
1A_B
14
2A_B
32
3A_B
TS3DV20812RHHR_VQFN36_6X6~D
TS3DV20812RHHR_VQFN36_6X6~D
VDD
TPAD
GND
D0+
D0-
D1+
D1-
D2+
D2-
D3+
D3-
1A
2A
3A
SEL
35
36
1
2
3
7
8
9
10
4
12
34
27
37
11
2
SW_LVDS_BCLK+
SW_LVDS_BCLKSW_LVDS_B2+
SW_LVDS_B2SW_LVDS_B1+
SW_LVDS_B1SW_LVDS_B0+
SW_LVDS_B0-
DGPU_SELECT#DGPU_SELECT#
C1149
1
2
SW_LVDS_BCLK+ <28>
SW_LVDS_BCLK- <28>
SW_LVDS_B2+ <28>
SW_LVDS_B2- <28>
SW_LVDS_B1+ <28>
SW_LVDS_B1- <28>
SW_LVDS_B0+ <28>
SW_LVDS_B0- <28>
0
1
ChannelSEL
DO=A
DO=B
1
Source
GPU
PCH
+3.3V_RUN
1 2
R1124 2.2K_0402_5%~DR1124 2.2K_0402_5%~D
1 2
R1123 2.2K_0402_5%~DR1123 2.2K_0402_5%~D
A A
LDDC_CLK_PCH
LDDC_DATA_PCH
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
LVDS SW
LVDS SW
LVDS SW
LA-7933
LA-7933
LA-7933
27 65Monday, November 07, 2011
27 65Monday, November 07, 2011
27 65Monday, November 07, 2011
1
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+3.3V_RUN
D D
C C
JLVDS1
CONN@JLVDS1
CONN@
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
41
36
G1
42
37
G2
43
38
G3
44
39
G4
45
40
G5
ACES_50398-04071-001
ACES_50398-04071-001
LinkCISOK
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
DISP_ON
R207 0_0603_5%~DR207 0_0603_5%~D
+BL_PWR_SRC +LCDVDD
2
1
LCD_CBL_DET# <20>
12
EMIrequest
+BL_PWR_SRC
LCD_TST <30,46>
+LCDVDD
+3.3V_RUN
SW_LVDS_A0+ <27>
SW_LVDS_A0- <27>
SW_LVDS_A1+ <27>
SW_LVDS_A1- <27>
SW_LVDS_A2+ <27>
SW_LVDS_A2- <27>
SW_LVDS_B0+ <27>
SW_LVDS_B0- <27>
SW_LVDS_B1+ <27>
SW_LVDS_B1- <27>
SW_LVDS_B2+ <27>
SW_LVDS_B2- <27>
0.1U_0603_50V7K~D
0.1U_0603_50V7K~D
1
C249
C249
2
BIA_PWM_LVDS
+3.3V_RUN
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C298
C298
1
2
1
2
1
2
1
2
5P_0402_50V8C~D
5P_0402_50V8C~D
C1188
C1188
5P_0402_50V8C~D
5P_0402_50V8C~D
C1183
C1183
5P_0402_50V8C~D
5P_0402_50V8C~D
C1186
C1186
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C243
C243
@
@
5P_0402_50V8C~D
5P_0402_50V8C~D
1
@
@
2
5P_0402_50V8C~D
5P_0402_50V8C~D
1
@
@
2
LDDC_CLK_SW <27>
LDDC_DATA_SW <27>
SW_LVDS_ACLK+ <27>
SW_LVDS_ACLK- <27>
@
@
C1184
C1184
SW_LVDS_BCLK+ <27>
SW_LVDS_BCLK- <27>
@
@
C1185
C1185
ClosetoJLVDS1
4
LDDC_CLK_SW
1 2
R159 2.2K_0402_5%~DR159 2.2K_0402_5%~D
R160 2.2K_0402_5%~DR160 2.2K_0402_5%~D
1 2
LDDC_DATA_SW
BIA_PWM_LVDS<30>
3
D67
D67
21
21
21
21
4
21
PANEL_BKEN_PCH <19>
MXM_PANEL_BKEN <16>
PANEL_BKEN_EC <46>
+3.3V_RUN
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
5
1
P
OE#
A2Y
G
TC7SH125FU_SSOP5
TC7SH125FU_SSOP5
3
BIA_PWM_PCH <19>
C248
C248
1 2
U3
U3
ENVDD_PCH<19,46>
LCD_VCC_TEST_EN<46>
MXM_ENVDD<16>
MXM_BIA_PWM <16>
BIA_PWM_EC <47>
RB751V-40GTE-17_SOD323-2~D
RB751V-40GTE-17_SOD323-2~D
D64
DISP_ON<30>
DGPU_SELECT#<27,31,46>
100K_0402_5%~D
100K_0402_5%~D
12
R1138
R1138
RB751V-40GTE-17_SOD323-2~D
R1137
R1137
RB751V-40GTE-17_SOD323-2~D
10K_0402_5%~D
10K_0402_5%~D
12
D64
RB751V-40GTE-17_SOD323-2~D
RB751V-40GTE-17_SOD323-2~D
D69
D69
RB751V-40GTE-17_SOD323-2~D
RB751V-40GTE-17_SOD323-2~D
D66
D66
RB751V-40GTE-17_SOD323-2~D
RB751V-40GTE-17_SOD323-2~D
D68
D68
21
D71
D71
RB751V-40GTE-17_SOD323-2~D
RB751V-40GTE-17_SOD323-2~D
1 2
R431 0_0402_5%~D@ R431 0_0402_5%~D@
2
D53
D53
RB751V-40GTE-17_SOD323-2~D
RB751V-40GTE-17_SOD323-2~D
2 1
2
1
3
D6
D6
BAT54CW_SOT323-3~D
BAT54CW_SOT323-3~D
40mil
+PWR_SRC
1000P_0402_50V7K~D
1000P_0402_50V7K~D
100K_0402_5%~D
100K_0402_5%~D
C297
C297
1
12
R422
2
PanelbacklightpowercontrolbyEC
R422
PWR_SRC_ON
1 2
R423 47K_0402_5%~DR423 47K_0402_5%~D
EN_INVPWR<47>
+LCDVDD
130_0402_1%~D
130_0402_1%~D
12
R413
R413
+LCVDVDD_CHG
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
61
Q19A
Q19A
EN_LCDPWR <30>
FDC654P-G_SSOT-6~D
FDC654P-G_SSOT-6~D
4 5
LCDPower
+3.3V_ALW
10K_0402_5%~D
10K_0402_5%~D
12
R414
R414
2
13
2
Q21
Q21
D
D
6
S
S
2
1
G
G
3
Q22
Q22
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
D
D
1 3
2
+PWR_SRC_S
100K_0402_5%~D
100K_0402_5%~D
12
R412
R412
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
5
4
Q20
Q20
PDTC124EU_SC70-3~D
PDTC124EU_SC70-3~D
+BL_PWR_SRC
40mil
0.1U_0603_50V7K~D
0.1U_0603_50V7K~D
1
C296
C296
2
S
S
G
G
FDC654P:PCHANNAL
+LCDVDD
SI3456DDV-T1-GE3_TSOP6~D
SI3456DDV-T1-GE3_TSOP6~D
4 5
1M_0402_5%~D
1M_0402_5%~D
12
R1632
R1632
Q19B
Q19B
1
Q18
Q18
D
D
S
S
G
G
3
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
2
+3.3V_ALW
0.1U_0402_25V6K~D
6
2
1
C293
C293
0.1U_0402_25V6K~D
C292
C292
1
2
L11
@L11
@
B B
10U_0805_10V6K~D
10U_0805_10V6K~D
C300
C300
1
2
WebcamPWRCTRL
Q24
Q24
PMV65XP_SOT23-3~D
PMV65XP_SOT23-3~D
D
D
1 3
2
CCD_OFF<46>
+3.3V_RUN
S
S
G
G
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C301
C301
1
2
+CAMERA_VDD
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C299
C299
1
2
A A
USBP13-<20>
USBP13+<20>
USBP12-<20>
USBP12+<20>
4
1
DLW21SN121SQ2L_4P~D
DLW21SN121SQ2L_4P~D
R429 0_0402_5%~DR429 0_0402_5%~D
R430 0_0402_5%~DR430 0_0402_5%~D
1
4
DLW21SN121SQ2L_4P~D
DLW21SN121SQ2L_4P~D
R427 0_0402_5%~DR427 0_0402_5%~D
R428 0_0402_5%~DR428 0_0402_5%~D
4
1
1 2
1 2
L10
@L10
@
1
4
1 2
1 2
3
3
2
2
2
2
3
3
USBP13_D-
USBP13_D-
USBP13_D+
2
3
1
USBP12_D-
USBP12_D-
USBP12_D+
2
3
1
12
+3.3V_ALW
R419100K_0402_5%~D @R419100K_0402_5%~D @
TouchScreen&CAM
PESD5V0U2BT_SOT23-3~D
PESD5V0U2BT_SOT23-3~D
USBP13_D-
D86
D86
PESD5V0U2BT_SOT23-3~D
PESD5V0U2BT_SOT23-3~D
D87
D87
TOUCH_SCREEN_PD#<46>
USBP13_D+
DMIC_CLK<45>
DMIC0<45>
USBP12_DUSBP12_D+
DMIC_CLK
DMIC0
JCAM1
JCAM1
2
112
4
334
6
556
8
778
10
9910
12
111112
14
131314
16
151516
18
171718
20
191920
22
GND21GND
ACES_50238-0207N-002
ACES_50238-0207N-002
CONN@
CONN@
LInkCIS
D13
D13
3
2
PESD5V0U2BT_SOT23-3~D
PESD5V0U2BT_SOT23-3~D
1
TOUCH_SCREEN_PD#
+3.3V_RUN
+5V_RUN
CAM_MIC_CBL_DET# <20>
+CAMERA_VDD
+3.3V_RUN +5V_RUN
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C310
C310
1
2
ClosetoJCAM1
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C311
C311
1
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
LVDS& CAM& TS
LVDS& CAM& TS
LVDS& CAM& TS
LA-7933
LA-7933
LA-7933
1
28 65Monday, November 07, 2011
28 65Monday, November 07, 2011
28 65Monday, November 07, 2011
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4
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2
1
+3.3V_RUN+3.3V_RUN
D D
ConfigurationpinforautomaticEQandAUXinterception;Internalpulldownat~150kΩ,3.3VI/O.
L:default,automaticEQenable&AUXinterceptionenable
H:automaticEQdisable&AUXinterceptionenable
M:automaticEQdisable&AUXinterceptiondisable,nopre‐emphasis,600mVppswing
C C
B B
MXM_MB_DP_AUX<16>
MXM_MB_DP_AUX#<16>
DP_RP_CFG0
DP_RP_CFG0 DP_RP_CFG1
MXM_MB_DP_P0<16>
MXM_MB_DP_N0<16>
MXM_MB_DP_P1<16>
MXM_MB_DP_N1<16>
MXM_MB_DP_P2<16>
MXM_MB_DP_N2<16>
MXM_MB_DP_P3<16>
MXM_MB_DP_N3<16>
C285 0.1U_0402_10V6K~DC285 0.1U_0402_10V6K~D
C284 0.1U_0402_10V6K~DC284 0.1U_0402_10V6K~D
C280 0.1U_0402_10V6K~DC280 0.1U_0402_10V6K~D
C283 0.1U_0402_10V6K~DC283 0.1U_0402_10V6K~D
C281 0.1U_0402_10V6K~DC281 0.1U_0402_10V6K~D
C286 0.1U_0402_10V6K~DC286 0.1U_0402_10V6K~D
C279 0.1U_0402_10V6K~DC279 0.1U_0402_10V6K~D
C282 0.1U_0402_10V6K~DC282 0.1U_0402_10V6K~D
C397 0.1U_0402_10V6K~DC397 0.1U_0402_10V6K~D
C398 0.1U_0402_10V6K~DC398 0.1U_0402_10V6K~D
4.99K_0402_1%~D
4.99K_0402_1%~D
R75
R75
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
12
R764.7K_0402_5%~D @R764.7K_0402_5%~D @
R774.7K_0402_5%~D @R774.7K_0402_5%~D @
MXM_MB_DP_P0_C
MXM_MB_DP_N0_C
MXM_MB_DP_P1_C
MXM_MB_DP_N1_C
MXM_MB_DP_P2_C
MXM_MB_DP_N2_C
MXM_MB_DP_P3_C
MXM_MB_DP_N3_C
DP_RP_PEQ
DP_RP_CFG0
DP_RP_REXT
MXM_MB_DP_HPD<16>
DP_RP_CEXTDP_RP_REXT
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
1
C87
C87
2
MXM_MB_DP_HPD
MXM_MB_DP_AUX_C
MXM_MB_DP_AUX#_C
PS8330BQFN48GTR-A0_QFN48_7X7
PS8330BQFN48GTR-A0_QFN48_7X7
DP_RP_CFG1
Configurationpinforautotestandinputoffsetcancellation,3.3VIO,internalpullupat~150K
H:default,autotestdisable&inputoffsetcancellationenable
L:autotestenable&inputoffsetcancellationenable
M:autotestdisable&inputoffsetcancellationdisable
25
1
6
38
IN0p
39
IN0n
41
IN1p
42
IN1n
44
IN2p
45
IN2n
47
IN3p
48
IN3n
3
I2C_ADDR
4
SCL_CTL/PEQ
5
SDA_CTL/CFG0
26
PD#
7
REXT
8
CAD_SRC
9
HPD_SRC
33
SCL_DDC
34
SDA_DDC
30
AUX_SRCP
29
AUX_SRCN
U22
U22
VCC1
12
VCC2
VCC3
1 2
36
VCC4
VCC532VCC6
GND118GND2
24
1
2
CAD_SNK
HPD_SINK
AUX_SNKP
AUX_SNKN
EPAD
GND3
49
31
12
+3.3V_RUN
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
OUT0p
OUT0n
OUT1p
OUT1n
OUT2p
OUT2n
OUT3p
OUT3n
CFG1
NC
RST#
CEXT
NC2
NC3
NC4
NC5
C496
C496
R784.7K_0402_5%~D @R784.7K_0402_5%~D @
R794.7K_0402_5%~D @R794.7K_0402_5%~D @
1
2
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
C497
C497
23
22
20
19
17
16
14
13
40
46
35
10
11
28
27
2
15
21
37
43
MB_DP_RP_C_P0
MB_DP_RP_C_N0
MB_DP_RP_C_N1
MB_DP_RP_C_N2
MB_DP_RP_C_P3
DP_RP_CFG1
MB_DP_RST#
MB_DP_CA_DET
MB_DP_HPD
MB_DP_RP_AUX
MB_DP_RP_AUX#
DP_RP_CEXT
MB_DP_RST#
MB_DP_RP_AUX#
DP_MB_P14
MB_DP_RP_AUX
12
12
12
12
12
12
12
12
+3.3V_RUN
DP_RP_PEQ
DP_RP_PEQ
Programmableinputequalizationlevels;Internalpulldownat~150kΩ,3.3VI/O.
L:default,LEQ,compensatechannellossupto12dB@HBR2
H:HEQ,compensatechannellossupto15dB@HBR2
M:LLEQ,compensatechannellossupto5dB@HBR2
MB_DP_RP_P0
C3070.1U_0402_10V6K~D C3070.1U_0402_10V6K~D
MB_DP_RP_N0
C3040.1U_0402_10V6K~D C3040.1U_0402_10V6K~D
MB_DP_RP_P1MB_DP_RP_C_P1
C2950.1U_0402_10V6K~D C2950.1U_0402_10V6K~D
MB_DP_RP_N1
C3080.1U_0402_10V6K~D C3080.1U_0402_10V6K~D
MB_DP_RP_P2MB_DP_RP_C_P2
C3060.1U_0402_10V6K~D C3060.1U_0402_10V6K~D
MB_DP_RP_N2
C3090.1U_0402_10V6K~D C3090.1U_0402_10V6K~D
MB_DP_RP_P3
C3030.1U_0402_10V6K~D C3030.1U_0402_10V6K~D
MB_DP_RP_N3MB_DP_RP_C_N3
C3020.1U_0402_10V6K~D C3020.1U_0402_10V6K~D
10K_0402_5%~D
10K_0402_5%~D
12
R415
R415
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
1
C88
C88
2
12
12
12
12
1 2
+3.3V_RUN
R56100K_0402_5%~D R56100K_0402_5%~D
R59100K_0402_5%~D R59100K_0402_5%~D
R621M_0402_5%~D R621M_0402_5%~D
R8015.1M_0603_1%~D R8015.1M_0603_1%~D
+3.3V_RUN
12
R804.7K_0402_5%~D @R804.7K_0402_5%~D @
R814.7K_0402_5%~D @R814.7K_0402_5%~D @
+3.3V_RUN
1.5A_6V_1206L150PR~DF31.5A_6V_1206L150PR~D
MB_DP_HPD
MB_DP_RP_AUX#
MB_DP_RP_AUX
DP_MB_P14
MB_DP_CA_DET
MB_DP_RP_N3
MB_DP_RP_P3
MB_DP_RP_N2
MB_DP_RP_P2
MB_DP_RP_N1
MB_DP_RP_P1
MB_DP_RP_N0
MB_DP_RP_P0MB_DP_CA_DET
0_1206_5%~D
0_1206_5%~D
@
@
R184
F3
R184
1 2
1 2
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
+DP_VCC
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
C313
C313
1
1
2
2
JDP1
JDP1
DP_PWR
RTN
HP_DET
AUX_CHGND
AUX_CH+
GND
CA_DET
LANE3-
GND
LANE3_shield
GND
LANE3+
GND
LANE2-
GND
LANE2_shield
LANE2+
LANE1LANE1_shield
LANE1+
LANE0LANE0_shield
LANE0+
FOX_3V1121C-N1YD7-7H
FOX_3V1121C-N1YD7-7H
10U_0805_10V6K~D
10U_0805_10V6K~D
C482
C482
21
22
23
24
LInkCIS
VendorchangeMPNto3V11211‐NBYD7‐7H
butnomodiftPCBfootprint
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
DP CONN
DP CONN
DP CONN
LA-7933
LA-7933
LA-7933
29 65Monday, November 07, 2011
29 65Monday, November 07, 2011
29 65Monday, November 07, 2011
1
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5
D D
4
3
2
1
change eDP pin defined same as LVDS
+3.3V_RUN
MXM_EDP_AUX-_C
RGB_PNL_DET#
EDPpower
+EDPVDD +5V_ALW
Q12
Q12
FDC655BN_NL_SSOT6~D
R158
R158
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
Q13B
Q13B
FDC655BN_NL_SSOT6~D
D
D
S
S
6
4 5
2
1
G
G
3
ER_EDP#
0.1U_0402_25V4Z~D
0.1U_0402_25V4Z~D
1
C255
C255
2
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
C256
C256
1
2
LVDS cable pin17 is GND and
eDP cable pin17 is floating(ER_EDP#)
Q13 VGS voltage limit of ±20V
+EDPVDD
100_0402_5%~D
100_0402_5%~D
12
R161
R161
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
C C
EN_LCDPWR<28> MXM_EDP_TX0+<16>
Q13A
Q13A
61
2
2
+3.3V_ALW
100K_0402_5%~D
100K_0402_5%~D
12
13
+PWR_SRC_S
100K_0402_5%~D
100K_0402_5%~D
12
R162
R162
3
5
4
Q23
Q23
PDTC124EU_SC70-3~D
PDTC124EU_SC70-3~D
MXM_EDP_HPD
MXM_EDP_AUX+_C
12
R339100K_0402_5%~D R339100K_0402_5%~D
12
R340100K_0402_5%~D R340100K_0402_5%~D
12
R222100K_0402_5%~D R222100K_0402_5%~D
12
R336100K_0402_5%~D R336100K_0402_5%~D
MXM_EDP_TX3+<16>
MXM_EDP_TX3-<16>
MXM_EDP_TX2+<16>
MXM_EDP_TX2-<16>
MXM_EDP_TX1+<16>
MXM_EDP_TX1-<16>
MXM_EDP_TX0-<16>
MXM_EDP_AUX+<16>
MXM_EDP_AUX-<16>
BIA_PWM_LVDS<28>
LCD_SMBCLK<26,47>
LCD_SMBDAT<26,47>
MXM_EDP_HPD<16>
eDP_DET#<46>
DISP_ON<28>
+BL_PWR_SRC
LCD_TST<28,46>
+EDPVDD
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
C3720.1U_0402_10V6K~D C3720.1U_0402_10V6K~D
C3740.1U_0402_10V6K~D C3740.1U_0402_10V6K~D
C3750.1U_0402_10V6K~D C3750.1U_0402_10V6K~D
C3760.1U_0402_10V6K~D C3760.1U_0402_10V6K~D
C3770.1U_0402_10V6K~D C3770.1U_0402_10V6K~D
C3780.1U_0402_10V6K~D C3780.1U_0402_10V6K~D
C3790.1U_0402_10V6K~D C3790.1U_0402_10V6K~D
C3800.1U_0402_10V6K~D C3800.1U_0402_10V6K~D
C3710.1U_0402_10V6K~D C3710.1U_0402_10V6K~D
C3730.1U_0402_10V6K~D C3730.1U_0402_10V6K~D
R208
R208
12
0_0603_5%~D
0_0603_5%~D
ER_EDP#
RGB_PNL_DET#
EN_LCDPWR
MXM_EDP_TX3+_C
MXM_EDP_TX3-_C
MXM_EDP_TX2+_C
MXM_EDP_TX2-_C
MXM_EDP_TX1+_C
MXM_EDP_TX1-_C
MXM_EDP_TX0+_C
MXM_EDP_TX0-_C
MXM_EDP_AUX+_C
MXM_EDP_AUX-_C
JEDP1
CONN@JEDP1
CONN@
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
25
25
26
26
27
27
28
28
29
29
30
30
31
31
32
32
33
33
34
34
35
35
36
36
G1
37
37
G2
38
38
G3
39
39
G4
40
40
G5
ACES_50398-04071-001
ACES_50398-04071-001
41
42
43
44
45
LinkCISOK
+EDPVDD+3.3V_RUN
0.1U_0402_16V4Z~D
+3.3V_RUN
B B
RGB_PNL_DET#
100K_0402_5%~D
100K_0402_5%~D
12
R341
R341
13
D
D
2
G
G
S
S
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
Q88
Q88
eDP_DET#
RGB_PNL_DET
+3.3V_RUN
1
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
C93
C93
2
53
3D_ON
4
U627
U627
SN74AHC1G02DCKR_SC70-5~D
SN74AHC1G02DCKR_SC70-5~D
3D_ON <41>
0.1U_0402_16V4Z~D
1
2
ClosetoJEDP1
+BL_PWR_SRC
0.1U_0603_50V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
C244
C244
1
2
0.1U_0603_50V4Z~D
C250
C250
C305
C305
1
2
EDP_DET# RGB_DET# 3D_ON
RGBpanel
A A
3Dpanel
LVDSpanel 1
0
0
0
00
01
1
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
EDP CONN
EDP CONN
EDP CONN
LA-7933
LA-7933
LA-7933
30 65Monday, November 07, 2011
30 65Monday, November 07, 2011
30 65Monday, November 07, 2011
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5
D D
ChannelA‐‐>GPU
ChannelB‐‐>PCH
CRT_SWITCH DGPU_SELECT# EDID_SELECT#
DSCmodeoutputtoMBVGA
C C
DSCmodeoutputtodockingVGA
UMAmodeoutputtoMBVGA
UMAmodeoutputtodockingVGA
B B
A A
0
1
0
1
RED_CRT RED_CRT_L
GREEN_CRT
BLUE_CRT
0
0
1
1
150_0402_1%~D
150_0402_1%~D
150_0402_1%~D
150_0402_1%~D
150_0402_1%~D
150_0402_1%~D
12
12
12
R53
R53
R55
R55
R54
R54
HSYNC_BUF
VSYNC_BUF
4
MXM_CRT_DDC_CLK<16>
PCH_CRT_DDC_CLK<19>
MXM_CRT_DDC_DAT<16>
PCH_CRT_DDC_DAT<19>
+3.3V_RUN
SDAAtoSDA1
SCLAtoSCL1
REDAtoRED1
0
GRNAtoGRN1
BLUAtoBLU1
SHAtoSH1
SVAtoSV1
SDAAtoSDA2
SCLAtoSCL2
REDAtoRED2
0
GRNAtoGRN2
BLUAtoBLU2
SHAtoSH2
SVAtoSV2
SDABtoSDA1
SCLBtoSCL1
REDBtoRED1
1
GRNBtoGRN1
BLUBtoBLU1
SHBtoSH1
SVBtoSV1
SDABtoSDA2
SCLBtoSCL2
REDBtoRED2
1
GRNBtoGRN2
BLUBtoBLU2
SHBtoSH2
SVBtoSV2
12P_0402_50V8J~D
12P_0402_50V8J~D
12P_0402_50V8J~D
12P_0402_50V8J~D
1
2
12P_0402_50V8J~D
12P_0402_50V8J~D
1
1
C23
C23
C20
C20
2
2
1 2
R43 0_0402_5%~DR43 0_0402_5%~D
1 2
R44 0_0402_5%~DR44 0_0402_5%~D
MXM_CRT_RED<16>
PCH_CRT_RED<19>
MXM_CRT_GRN<16>
PCH_CRT_GRN<19>
MXM_CRT_BLU<16>
PCH_CRT_BLU<19>
CRT_EN
1 2
R421 100K_0402_5%~DR421 100K_0402_5%~D
MXM_CRT_HSYNC<16>
PCH_CRT_HSYNC<19>
MXM_CRT_VSYNC<16>
PCH_CRT_VSYNC<19>
EDID_SELECT#<46>
CRT_SWITCH<46>
DGPU_SELECT#<27,28,46>
CRT_SWITCH
Output
L1 BLM18BB470SN1D_2P~DL1 BLM18BB470SN1D_2P~D
1 2
L2 BLM18BB470SN1D_2P~DL2 BLM18BB470SN1D_2P~D
1 2
L3 BLM18BB470SN1D_2P~DL3 BLM18BB470SN1D_2P~D
1 2
C22
C22
+5V_RUN_CRT
2.2K_0402_5%~D
2.2K_0402_5%~D
12
@
@
R47
R47
DAT_DDC2_CRT
CLK_DDC2_CRT
L4
L4
1 2
BLM18AG121SN1D_0603~D
BLM18AG121SN1D_0603~D
L5
L5
1 2
BLM18AG121SN1D_0603~D
BLM18AG121SN1D_0603~D
U19
U19
7
REDA
17
REDB
8
GRNA
18
GRNB
9
BLUA
19
BLUB
5
SCLA
15
SCLB
6
SDAA
16
SDAB
2
EN
3
SHA
13
SHB
4
SVA
14
SVB
1
S00
40
S01
39
S10
38
S11
30
GND
20
GND
10
GND
41
GPAD
MAX14885EETL+T_TQFN40_5X5~D
MAX14885EETL+T_TQFN40_5X5~D
ESDrequestreserveit.
GREEN_CRT_L
BLUE_CRT_L
3.3P_0402_50V8C~D
3.3P_0402_50V8C~D
1
2
1K_0402_5%~D
1K_0402_5%~D
2.2K_0402_5%~D
2.2K_0402_5%~D
12
12
@
@
@R50
@
R48
R48
R50
22P_0402_50V8J~D
22P_0402_50V8J~D
@C18
@
1
C18
2
3
MAX14885E
MAX14885E
PESD5V0U2BT_SOT23-3~D
PESD5V0U2BT_SOT23-3~D
2
3
@
@
D11
D11
1
3.3P_0402_50V8C~D
3.3P_0402_50V8C~D
1
@
@
C21
C21
2
1K_0402_5%~D
1K_0402_5%~D
12
@R52
@
R52
HSYNC_L
VSYNC_L
22P_0402_50V8J~D
22P_0402_50V8J~D
@C19
@
1
C19
2
2
RED_DOCK <44>
GREEN_DOCK <44>
BLUE_DOCK <44>
CLK_DDC2_DOCK <44>
DAT_DDC2_DOCK <44>
HSYNC_DOCK <44>
VSYNC_DOCK <44>
+5V_RUN
+5V_RUN_CRT
0.5A_8VDC_SMD1812P200TF
0.5A_8VDC_SMD1812P200TF
21
F5
F5
+3.3V_RUN
1
2
21
3
D9
D9
NC
NC
BAT1000-7-F_SOT23-3~D
BAT1000-7-F_SOT23-3~D
+CRT_VCC
0_1206_5%~D
0_1206_5%~D
@
@
1
R49
R49
2
1 2
DAT_DDC2_CRT
CLK_DDC2_CRT
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
C1181
C1181
Port1‐‐>MBboardCRT
Port2‐‐>DockingPortRGB
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
C14
C14
+CRT_VCC
M_ID2#
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
2
@
@
C15
C15
T61
T61
PAD~D
PAD~D
JCRT1
JCRT1
CRT_11
6
11
1
7
12
2
8
13
3
9
14
4
10
15
5
SUYIN_070449HR015M221ZR
SUYIN_070449HR015M221ZR
LInkCIS
16
G
G
17
G
G
18
G
G
19
G
G
+5V_RUN
1
C1182
RED_CRT
GREEN_CRT
BLUE_CRT
CLK_DDC2_CRT
DAT_DDC2_CRT
HSYNC_BUF
VSYNC_BUFCRT_SWITCH
@
@
C1182
1U_0603_10V7K~D
1U_0603_10V7K~D
2
29
VCC
21
VCC
11
VL
33
RED1
24
RED2
32
GRN1
23
GRN2
31
BLU1
22
BLU2
35
SCL1
26
SCL2
34
SDA1
25
SDA2
37
SH1
28
SH2
36
SV1
27
SV2
12
NC
PESD5V0U2BT_SOT23-3~D
PESD5V0U2BT_SOT23-3~D
2
3
@
@
D10
D10
1
3.3P_0402_50V8C~D
3.3P_0402_50V8C~D
1
@
@
C12
C12
C13
C13
2
1
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
VGA CONN
VGA CONN
VGA CONN
LA-7933
LA-7933
LA-7933
31 65Tuesday, November 08, 2011
31 65Tuesday, November 08, 2011
31 65Tuesday, November 08, 2011
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1
AUX/DDCGPUforDPCtoE‐DOCK
D D
DPC_DOCK_AUX
DPC_CA_DET<44>
+3.3V_ALW2
100K_0402_5%~D
100K_0402_5%~D
12
R1532
R1532
61
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
Q110A
Q110A
12
12
+5V_RUN
100K_0402_5%~D
100K_0402_5%~D
5
C3870.1U_0402_10V6K~D C3870.1U_0402_10V6K~D
DPC_DOCK_AUX#
C388
C388
12
R1537
R1537
3
Q110B
Q110B
4
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
+3.3V_RUN
2.2K_0402_5%~D
2.2K_0402_5%~D
5
MXM_DPB_AUX<16>
MXM_DPB_AUX#<16>
CA_DET
HDMI/DVI
DP
C C
B B
1 2
R492 1M_0402_5%~DR492 1M_0402_5%~D
DPC_CA_DET
0.1U_0402_10V6K~D
0.1U_0402_10V6K~D
1
0
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
1
2
DPC_DOCK_SW_AUX<44>
DPC_DOCK_SW_AUX#<44>
DPC_CA_DET
C1174
C1174
Output
A2=B2
A3=B3
A0=B0
A1=B1
2
R1530
R1530
+3.3V_RUN
2.2K_0402_5%~D
2.2K_0402_5%~D
R1539
R1539
2
12
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
4
U20
U20
1
BE0
2
A0
3
B0
4
BE1
5
A1
6
B1
7
GND
PI3C3125LEX_TSSOP14~D
PI3C3125LEX_TSSOP14~D
+5V_RUN
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
5
P
A2Y
G
TC7SET04FU_SSOP5~D
TC7SET04FU_SSOP5~D
3
12
1 2
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
R1538 0_0402_5%~D@R1538 0_0402_5%~D@
61
Q113A
Q113A
DPC_DOCK_SW_AUX
1 2
R1523 0_0402_5%~D@R1523 0_0402_5%~D@
Q113B
Q113B
14
VCC
13
BE3
12
A3
11
B3
10
BE2
9
A2
8
B2
C365
C365
1 2
1
NC
DPC_CA_DET#DPC_CA_DET
4
U21
U21
DOCKDPB(PORT2)DDC
+3.3V_RUN
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1 2
C359
C359
MXM_DPB_AUX
MXM_DPB_AUX#
DPC_DOCK_SW_AUX#
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
DP DDC SW
DP DDC SW
DP DDC SW
LA-7933
LA-7933
LA-7933
32 65Monday, November 07, 2011
32 65Monday, November 07, 2011
32 65Monday, November 07, 2011
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5
+3.3V_RUN
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
1
C766
C766
2
D D
MXM_DPC_P0<16>
MXM_DPC_N0<16>
MXM_DPC_P1<16>
MXM_DPC_N1<16>
MXM_DPC_P2<16>
MXM_DPC_N2<16>
MXM_DPC_P3<16>
MXM_DPC_N3<16>
MXM_DPC_AUX<16>
MXM_DPC_AUX#<16>
Changefrom100kto10kohm
tomeettheinputhigh‐levelvoltage.
C C
DOCKED<36,46>
+3.3V_RUN
2
10K_0402_5%~D
10K_0402_5%~D
12
61
R74changeto5.76Kforreduceswing.
R518
R518
DOCKED#
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
Q326A
Q326A
0.1U_0402_10V6K~D
0.1U_0402_10V6K~D
0.1U_0402_10V6K~D
0.1U_0402_10V6K~D
REXT3 REXT3
5.76K_0402_1%
5.76K_0402_1%
R74
R74
1 2
DOCKDPA(PORT1)DDC
ForControlSwitching:
SW=L:DPoutputisselected
SW=H:TMDSoutputisselected
1 2
R451 0_0402_5%~DR451 0_0402_5%~D
L19
@L19
TMDSE_RP_CLK
TMDSE_RP_CLK#
B B
TMDSE_RP_P0
TMDSE_RP_N0
TMDSE_RP_P1
TMDSE_RP_N1
A A
TMDSE_RP_P2
TMDSE_RP_N2
EMIrequestpopR451~R456,R458,R459and
non‐popL19,L23~25andHDMIEAhaveverifyit.
@
4
1
DLW21SN900HQ2L_0805_4P~D
DLW21SN900HQ2L_0805_4P~D
1 2
R452 0_0402_5%~DR452 0_0402_5%~D
1 2
R453 0_0402_5%~DR453 0_0402_5%~D
@L23
@
4
1
DLW21SN900HQ2L_0805_4P~D
DLW21SN900HQ2L_0805_4P~D
1 2
R454 0_0402_5%~DR454 0_0402_5%~D
1 2
R455 0_0402_5%~DR455 0_0402_5%~D
@L24
@
4
1
DLW21SN900HQ2L_0805_4P~D
DLW21SN900HQ2L_0805_4P~D
1 2
R456 0_0402_5%~DR456 0_0402_5%~D
1 2
R459 0_0402_5%~DR459 0_0402_5%~D
@L25
@
4
1
DLW21SN900HQ2L_0805_4P~D
DLW21SN900HQ2L_0805_4P~D
1 2
R458 0_0402_5%~DR458 0_0402_5%~D
3
3
4
2
1
2
L23
3
3
4
2
1
2
L24
3
3
4
2
1
2
L25
3
3
4
2
1
2
5
TMDSE_CON_CLK
TMDSE_CON_CLK#
TMDSE_CON_P0
TMDSE_CON_N0
TMDSE_CON_P1
TMDSE_CON_N1
TMDSE_CON_P2
TMDSE_CON_N2
MXM_DPC_CA_DET
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
1
C1332
C1332
2
EMIrequestreserveC(3.3pF)forHDMIsignals.
TMDSE_CON_CLK
TMDSE_CON_CLK#
TMDSE_CON_P1
TMDSE_CON_N1
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
2
MXM_DPC_HPD<16>
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
+3.3V_ALW2
100K_0402_5%~D
100K_0402_5%~D
R2152
R2152
2
3.3P_0402_50V8C~D
3.3P_0402_50V8C~D
1
2
3.3P_0402_50V8C~D
3.3P_0402_50V8C~D
1
2
4
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
C402
C402
C405
C405
C410
C410
C437
C437
1
1
1
2
2
2
DP_CFG0
DOCKED#
MXM_DPC_P0_C
C2530.1U_0402_10V6K~D C2530.1U_0402_10V6K~D
12
MXM_DPC_N0_C
C2470.1U_0402_10V6K~D C2470.1U_0402_10V6K~D
12
MXM_DPC_P1_C
C2420.1U_0402_10V6K~D C2420.1U_0402_10V6K~D
12
MXM_DPC_N1_C
C2520.1U_0402_10V6K~D C2520.1U_0402_10V6K~D
12
MXM_DPC_P2_C
C2510.1U_0402_10V6K~D C2510.1U_0402_10V6K~D
12
MXM_DPC_N2_C
C2540.1U_0402_10V6K~D C2540.1U_0402_10V6K~D
12
MXM_DPC_P3_C
C2450.1U_0402_10V6K~D C2450.1U_0402_10V6K~D
12
MXM_DPC_N3_C
C2460.1U_0402_10V6K~D C2460.1U_0402_10V6K~D
12
C389
C389
MXM_DPC_AUX_C
12
C390
C390
MXM_DPC_AUX#_C
12
MXM_DPC_CA_DET
MXM_DPC_HPD
CEXT
TMDS_DDCBUF
100K_0402_5%~D
100K_0402_5%~D
5
@
@
C1333
C1333
@
@
C1338
C1338
4
+5V_RUN
12
R2153
R2153
3
Q336B
Q336B
4
TMDSE_CON_P0
TMDSE_CON_N0
TMDSE_CON_P2
TMDSE_CON_N2
PEQ
MODE
DPD_DOCK_AUX_Q
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
CEXT
C86
C86
1
2
12
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
61
Q336A
Q336A
3.3P_0402_50V8C~D
3.3P_0402_50V8C~D
@
@
C1334
C1334
1
2
3.3P_0402_50V8C~D
3.3P_0402_50V8C~D
@
@
C1337
C1337
1
2
U9
U9
14
VDD33
28
VDD33
41
VDD33
56
VDD33
44
DP_CFG0/SCL_CTL
45
SW/SDA_CTL
38
I2C_CTL_EN
3
IN_D0p
4
IN_D0n
6
IN_D1p
7
IN_D1n
9
IN_D2p
10
IN_D2n
12
IN_D3p
13
IN_D3n
52
IN_AUXp
51
IN_AUXn
50
IN_DDC_SCL
49
IN_DDC_SDA
11
IN_CA_DET
5
IN_HPD
1
CEXT
2
TMDS_DDCBUF
8
PEQ
27
REXT
46
PD
53
MODE
PS8336BQFN56GTR-A0_QFN56_7X7
PS8336BQFN56GTR-A0_QFN56_7X7
+3.3V_RUN
2.2K_0402_5%~D
2.2K_0402_5%~D
12
R2151
R2151
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
61
2
+3.3V_RUN
2.2K_0402_5%~D
2.2K_0402_5%~D
12
R2157
R2157
R2155 0_0402_5%~D@R2155 0_0402_5%~D@
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
Q335B
Q335B
5
4
MXM_DPC_AUX#
3.3P_0402_50V8C~D
3.3P_0402_50V8C~D
3.3P_0402_50V8C~D
3.3P_0402_50V8C~D
@
@
@
@
C1335
C1335
C1336
C1336
1
1
2
2
3.3P_0402_50V8C~D
3.3P_0402_50V8C~D
3.3P_0402_50V8C~D
3.3P_0402_50V8C~D
@
@
@
@
C1339
C1339
C1340
C1340
1
1
2
2
R2156 0_0402_5%~D@R2156 0_0402_5%~D@
Q335A
Q335A
MXM_DPC_AUX
1 2
1 2
+5V_RUN
DP_AUXp_SCL
DP_AUXn_SDA
DP_CA_DET
TMDS_CH0p
TMDS_CH0n
TMDS_CH1p
TMDS_CH1n
TMDS_CH2p
TMDS_CH2n
TMDS_CLKp
TMDS_CLKn
TMDS_SCL
TMDS_SDA
TMDS_HPD
TMDS_PRE
Thermal/GND
0_0402_5%~D
0_0402_5%~D
12
R1169
R1169
DP_D0p
DP_D0n
DP_D1p
DP_D1n
DP_D2p
DP_D2n
DP_D3p
DP_D3n
DP_HPD
DP_CFG1
TMDS_RT
HDMI_CEC
HDMI_HPD_SINK
GND
GND
GND
21
RB751V-40GTE-17_SOD323-2~D
RB751V-40GTE-17_SOD323-2~D
@
@
D70
D70
+5V_HDMI_DDC
40
39
37
36
34
33
31
30
55
54
32
42
29
19
18
22
21
25
24
16
15
48
47
17
23
20
26
35
43
57
1 2
1 2
3
DPD_GPU_LANE_P0
DPD_GPU_LANE_N0
DPD_GPU_LANE_P1
DPD_GPU_LANE_N1
DPD_GPU_LANE_P2
DPD_GPU_LANE_N2
DPD_GPU_LANE_P3
DPD_GPU_LANE_N3
DPD_DOCK_AUX
DPD_DOCK_AUX#
DPD_GPU_HPD
DPD_CA_DET
DP_CFG1
TMDSE_RP_P0
TMDSE_RP_N0
TMDSE_RP_P1
TMDSE_RP_N1
TMDSE_RP_P2
TMDSE_RP_N2
TMDSE_RP_CLK
TMDSE_RP_CLK#
HDMI_SCL_SINK
HDMI_SDA_SINK
HDMI_HPD_SINK
TMDS_RT
TMDS_PRE
3
2
DPD_GPU_LANE_P0 <44>
DPD_GPU_LANE_N0 <44>
DPD_GPU_LANE_P1 <44>
DPD_GPU_LANE_N1 <44>
DPD_GPU_LANE_P2 <44>
DPD_GPU_LANE_N2 <44>
DPD_GPU_LANE_P3 <44>
DPD_GPU_LANE_N3 <44>
DPD_DOCK_AUX <44>
DPD_DOCK_AUX# <44>
DPD_GPU_HPD <44>
DPD_CA_DET <44>
ForDockingDPportD
ForHDMI
TMDS_DDCBUF=L:DDCpassthrough
=H:DDCactivebuffer
=M:DDCpassthroughwith40kohmpullupresistor
PEQ=L:default,LEQ,compensatechannellossupto12dB@HBR2
=H:HEQ,compensatechannellossupto15dB@HBR2
+3.3V_RUN
12
@
@
R2154
R2154
61
R2163 0_0402_5%~D@R2163 0_0402_5%~D@
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
@
@
Q337B
Q337B
DPD_DOCK_AUX#
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
@
@
Q337A
Q337A
Reserve
1 2
R2162 0_0402_5%~D@R2162 0_0402_5%~D@
DPD_DOCK_AUX
1 2
HDMI_HPD_SINK HDMI_HPD_SINK_R
HDMI_SDA_SINK
HDMI_SCL_SINK
HDMI
HDMI
Part Number Description
Part Number Description
HDMI W/Logo:RO0000002HM
HDMI W/Logo:RO0000002HM
RO0000002HM
RO0000002HM
1 2
R1164 10K_0402_5%~DR1164 10K_0402_5%~D
2.2K_0402_5%~D
2.2K_0402_5%~D
DPD_DOCK_AUX_Q
2
+3.3V_RUN
2.2K_0402_5%~D
2.2K_0402_5%~D
12
@
@
R2161
R2161
3
5
4
R460 1.5K_0402_5%~DR460 1.5K_0402_5%~D
1 2
R461 1.5K_0402_5%~DR461 1.5K_0402_5%~D
1 2
+3.3V_RUN
R116510K_0402_5%~D R116510K_0402_5%~D
R1128100K_0402_5%~D R1128100K_0402_5%~D
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
=M:LLEQ,compensatechannellossupto5dB@HBR2
DP_CFG1=L:default,autotestdisable&inputoffsetcancellationenable
=H:autotestenable&inputoffsetcancellationenable
=M:autotestdisable&inputoffsetcancellationdisable
DP_CFG0=L:default,automaticEQenable&AUXinterceptionenable
=H:automaticEQdisable&AUXinterceptionenable
=M:automaticEQdisable&AUXinterceptiondisable,nopre‐emphasis,800mVppswing
+5V_RUN
BAT1000-7-F_SOT23-3~D
BAT1000-7-F_SOT23-3~D
21
3
D12
D12
NC
NC
+5V_RUN_HDMI
0.5A_8VDC_SMD1812P200TFF40.5A_8VDC_SMD1812P200TF
0_1206_5%~D
0_1206_5%~D
21
F4
1 2
HDMI_SDA_SINK
HDMI_SCL_SINK
HDMI_CEC
TMDSE_CON_CLK#
TMDSE_CON_CLK
TMDSE_CON_N0
TMDSE_CON_P0
TMDSE_CON_N1
TMDSE_CON_P1
TMDSE_CON_N2
TMDSE_CON_P2
2
+3.3V_RUN
TMDS_RT
DP_CFG0
TMDS_DDCBUF
PEQ
DP_CFG1
MODE
TMDS_PRE
TMDS_RT
DP_CFG0
TMDS_DDCBUF
PEQ
DP_CFG1
MODE
TMDS_PRE
DPD_CA_DET
MODE=L:ControlSwitchingMode,HDMIIDdisable
=H:AutomaticSwitchingMode,HDMIIDdisable
=M:AutomaticSwitchingMode,HDMIIDenable
TMDS_PRE=L:nopre‐emphasis
=H:1.5dBpre‐emphasis
=M:3.0dBpre‐emphasis
TMDS_RT=L:Standardopendraindriver
=H:Opendraindriverwithterminationresistors
HDMICONN
@R45
@
R45
+VDISPLAY_VCC
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
1
C337
C337
2
2
JHDMI1
JHDMI1
19
HP_DET
18
+5V
17
DDC/CEC_GND
16
SDA
15
SCL
14
Reserved
13
CEC
12
CK-
11
CK_shield
10
CK+
9
D0-
8
D0_shield
7
D0+
6
D1-
5
D1_shield
4
D1+
3
D2-
2
D2_shield
1
D2+
FOX_QJ1119L-BT11-7H
FOX_QJ1119L-BT11-7H
12
R714.7K_0402_5%~D @R714.7K_0402_5%~D @
12
R644.7K_0402_5%~D @R644.7K_0402_5%~D @
12
R684.7K_0402_5%~D @R684.7K_0402_5%~D @
12
R704.7K_0402_5%~D @R704.7K_0402_5%~D @
12
R724.7K_0402_5%~D @R724.7K_0402_5%~D @
12
R584.7K_0402_5%~D R584.7K_0402_5%~D
12
R654.7K_0402_5%~D @R654.7K_0402_5%~D @
12
R574.7K_0402_5%~D @R574.7K_0402_5%~D @
12
R614.7K_0402_5%~D @R614.7K_0402_5%~D @
12
R664.7K_0402_5%~D @R664.7K_0402_5%~D @
12
R694.7K_0402_5%~D @R694.7K_0402_5%~D @
12
R734.7K_0402_5%~D @R734.7K_0402_5%~D @
12
R634.7K_0402_5%~D R634.7K_0402_5%~D
12
R674.7K_0402_5%~D @R674.7K_0402_5%~D @
12
R4911M_0402_5%~D R4911M_0402_5%~D
10U_0805_10V4Z~D
10U_0805_10V4Z~D
C338
C338
20
GND
21
GND
22
GND
23
GND
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
HDMI CONN
HDMI CONN
HDMI CONN
LA-7933
LA-7933
LA-7933
1
0.2
0.2
33 65Monday, November 07, 2011
33 65Monday, November 07, 2011
33 65Monday, November 07, 2011
1
0.2
of
of
of
Page 34
5
+3.3V_RUN
DDR_XDP_WAN_SMBDAT
1 2
R501 10K_0402_5%~DR501 10K_0402_5%~D
R502 10K_0402_5%~DR502 10K_0402_5%~D
R503 100K_0402_5%~DR503 100K_0402_5%~D
D D
+3.3V_RUN
1
2
1 2
1 2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
C392
C392
DDR_XDP_WAN_SMBCLK
HDD_FALL_INT
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C391
C391
2
HDD_FALL_INT<20>
DDR_XDP_WAN_SMBDAT<12,13,14,15,17,18,41>
DDR_XDP_WAN_SMBCLK<12,13,14,15,17,18,41>
HDD_FALL_INT
FFS_INT2
4
FreeFallSensor
U88
U88
LNG3DM
LNG3DM
VDD_IO
VDD
INT 1
INT 2
SDO/SA0
SDA / SDI / SDO
SCL/SPC
CS
RES
RES
RES
RES
GND
GND
NC
NC
1
14
11
9
7
6
4
8
LNG3DMTR_LGA16_3X3~D
LNG3DMTR_LGA16_3X3~D
3
2
1
HDDPWR
HDD_EN_5V
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
1M_0402_5%~D
1M_0402_5%~D
12
Q300B
Q300B
@
@
R1630
R1630
+5V_ALW
3
1
2
2
1
G
G
0.1U_0603_50V7K~D
0.1U_0603_50V7K~D
4 5
C393
C393
1
2
6
D
D
Q27
@
Q27
@
SI3456DDV-T1-GE3_TSOP6~D
SI3456DDV-T1-GE3_TSOP6~D
S
S
+5V_HDD
10U_0805_10V6K~D
10U_0805_10V6K~D
100K_0402_5%~D
100K_0402_5%~D
12
R504
R504
SHORT DEFAULT
C394
C394
PJP33
@PJP33
@
112
JUMP_43X79
JUMP_43X79
+5V_RUN
2
+PWR_SRC_S
100K_0402_5%~D
+3.3V_ALW2
100K_0402_5%~D
100K_0402_5%~D
R500
R500
10
13
15
16
5
12
2
3
RUN_ON<45,46,50,54>
SIO_SLP_S3#<11,19,45,46,50,54>
1 2
R1621 0_0402_5%~D@ R1621 0_0402_5%~D@
1 2
R1624 0_0402_5%~DR1624 0_0402_5%~D
2
100K_0402_5%~D
100K_0402_5%~D
@R505
@
12
R505
100K_0402_5%~D
12
R499
R499
12
3
5
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
61
Q300A
Q300A
4
+3.3V_RUN
12
R394.7K_0402_5%~D @R394.7K_0402_5%~D @
12
R404.7K_0402_5%~D @R404.7K_0402_5%~D @
12
R414.7K_0402_5%~D @R414.7K_0402_5%~D @
12
R424.7K_0402_5%~D @R424.7K_0402_5%~D @
12
R464.7K_0402_5%~D @R464.7K_0402_5%~D @
12
R514.99K_0402_1%~D @R514.99K_0402_1%~D @
12
12
12
12
HDD2_DET#<17>
Pre‐emphasislevelsettingforChannelA,
3.3Vtolerant.Internallypulleddownat~150KΩ
[A_PRE1,A_PRE0]==
00:0dB,nopre‐emphasis
01:1.5dBpre‐emphasisisselected
10:2.5dBpre‐emphasisisselected
11:3.5dBpre‐emphasisisselected
Pre‐emphasislevelsettingforChannelB,
3.3Vtolerant.Internallypulleddownat~150KΩ
[B_PRE1,B_PRE0]==
00:0dB,nopre‐emphasis
01:1.5dBpre‐emphasisisselected
10:2.5dBpre‐emphasisisselected
11:3.5dBpre‐emphasisisselected
Chiptestmodeenable,internallypulleddownat~150KΩ
L:Normaloperation
H:Testmodeenable
ForSATA/SASPHYtest,thispinshouldbepulledtoHigh
HDD2CONN
JSATA2
JSATA2
1
SATA_PTX_DRX_P1
SATA_PTX_DRX_N1
SATA_PRX_DTX_N1
SATA_PRX_DTX_P1
+3.3V_RUN
HDD2_DET#
+5V_HDD
FFS_INT2_Q
GND
2
RX+
3
RX-
4
GND
5
TX-
6
TX+
7
GND
8
3.3V
9
3.3V
10
3.3V
11
GND
12
GND
13
GND
14
5V
15
5V
16
5V
17
GND
18
19
20
21
22
SUYIN_127043HB022M26GZL
SUYIN_127043HB022M26GZL
MainSATA+5VDefault
Reserved
GND
12V
12V
12V
LInkCISLInkCIS
GND1
GND2
23
24
C419
C419
B_PRE1
A_PRE1
TEST
A_PRE0
B_PRE0
REXT
SATA_PTX_DRX_P1_C<17>
SATA_PTX_DRX_N1_C<17>
SATA_PRX_DTX_N1_C<17>
SATA_PRX_DTX_P1_C<17>
+5V_HDD
1000P_0402_50V7K~D
1000P_0402_50V7K~D
1
2
C413 0.01U_0402_16V7K~DC413 0.01U_0402_16V7K~D
C411 0.01U_0402_16V7K~DC411 0.01U_0402_16V7K~D
C414 0.01U_0402_16V7K~DC414 0.01U_0402_16V7K~D
C412 0.01U_0402_16V7K~DC412 0.01U_0402_16V7K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C415
C415
C409
C409
2
C C
HDDRepeater
U26
C24 1U_0402_6.3V6K~D@C24 1U_0402_6.3V6K~D@
1 2
C423 0.01U_0402_16V7K~DC423 0.01U_0402_16V7K~D
PSATA_PTX_DRX_P0_C<17>
PSATA_PTX_DRX_N0_C<17>
PSATA_PRX_DTX_P0_C<17>
PSATA_PRX_DTX_N0_C<17>
+5V_HDD
100K_0402_5%~D
100K_0402_5%~D
12
@R506
@
C404
C404
R506
FFS_INT2_Q
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
Q29B
Q29B
5
4
PSATA_PTX_DRX_P0_RP
PSATA_PTX_DRX_N0_RP
PSATA_PRX_DTX_N0_RP
PSATA_PRX_DTX_P0_RP
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C403
C403
2
+5V_HDD
C383 0.01U_0402_16V7K~DC383 0.01U_0402_16V7K~D
C384 0.01U_0402_16V7K~DC384 0.01U_0402_16V7K~D
C385 0.01U_0402_16V7K~DC385 0.01U_0402_16V7K~D
C386 0.01U_0402_16V7K~DC386 0.01U_0402_16V7K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1000P_0402_50V7K~D
1000P_0402_50V7K~D
1
1
C406
C406
C395
C395
2
2
12
12
12
12
HDD1_DET#<17>
+3.3V_RUN
100K_0402_5%~D
100K_0402_5%~D
12
R513
R513
B B
FFS_INT2<21>
A A
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
61
Q29A
Q29A
2
+3.3V_RUN
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
2
12
C422 0.01U_0402_16V7K~DC422 0.01U_0402_16V7K~D
12
C421 0.01U_0402_16V7K~DC421 0.01U_0402_16V7K~D
12
C418 0.01U_0402_16V7K~DC418 0.01U_0402_16V7K~D
12
SATA_PTX_DRX_P0
SATA_PTX_DRX_N0
SATA_PRX_DTX_N0
SATA_PRX_DTX_P0
+3.3V_RUN
HDD1_DET#
+5V_HDD
FFS_INT2_Q
PSATA_PTX_DRX_P0
PSATA_PTX_DRX_N0
PSATA_PRX_DTX_P0
PSATA_PRX_DTX_N0
B_PRE1
A_PRE1
TEST
HDD1CONN
JSATA1
JSATA1
1
GND
2
RX+
3
RX-
4
GND
5
TX-
6
TX+
7
GND
8
3.3V
9
3.3V
10
3.3V
11
GND
12
GND
13
GND
14
5V
15
5V
16
5V
17
GND
18
Reserved
19
GND
20
12V
21
12V
22
12V
SUYIN_127043HB022M26GZL
SUYIN_127043HB022M26GZL
MainSATA+5VDefault
PleacenearHDD1CONN PleacenearHDD1CONN
U26
7
EN
1
A_INp
2
A_INn
5
B_OUTp
4
B_OUTn
17
B_PRE1
19
A_PRE1
18
TEST
3
GND
13
GND
21
EPAD
PS8520BTQFN20GTR2_TQFN20_4X4
PS8520BTQFN20GTR2_TQFN20_4X4
23
GND1
24
GND2
6
VDD
16
VDD
10
NC
REXT
20
REXT
A_PRE0
B_PRE0
A_OUTp
A_OUTn
B_INp
B_INn
9
8
15
14
11
12
+3.3V_RUN
1
2
A_PRE0
B_PRE0
PSATA_PTX_DRX_P0_RP
PSATA_PTX_DRX_N0_RP
PSATA_PRX_DTX_P0_RP
PSATA_PRX_DTX_N0_RP
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C408
C408
PleacenearHDD2CONN PleacenearHDD2CONN
+3.3V_RUN
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
1
1
C420
C420
2
2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C407
C407
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
HDD CONN
HDD CONN
HDD CONN
LA-7933
LA-7933
LA-7933
1
34 65Monday, November 07, 2011
34 65Monday, November 07, 2011
34 65Monday, November 07, 2011
0.2
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Page 35
5
D D
4
3
2
1
+5VMODSource
+PWR_SRC_S
100K_0402_5%~D
100K_0402_5%~D
+3.3V_ALW2
100K_0402_5%~D
100K_0402_5%~D
12
R516
R516
MODC_EN#
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
61
Q301A
C C
MODC_EN<46>
100K_0402_5%~D
100K_0402_5%~D
12
R514
R514
Q301A
2
12
R515
R515
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
Q301B
Q301B
5
4
MOD_EN
1M_0402_5%~D
1M_0402_5%~D
12
R1627
R1627
+5V_ALW
6
2
1
D
D
Q30
G
G
3
0.1U_0603_50V7K~D
0.1U_0603_50V7K~D
@
@
C416
C416
1
2
Q30
SI3456DDV-T1-GE3_TSOP6~D
SI3456DDV-T1-GE3_TSOP6~D
S
S
+5V_MOD +5V_RUN
4 5
10U_0805_10V6K~D
10U_0805_10V6K~D
1
C417
C417
2
PJP32
@PJP32
@
112
100K_0402_5%~D
100K_0402_5%~D
12
JUMP_43X79
JUMP_43X79
R517
R517
2
+3.3V_ALW
1 2
R796 10K_0402_5%~DR796 10K_0402_5%~D
B B
ZODD_WAKE#
+5V_MOD
1
2
ODDCONN
JODD1
SATA_ODD_PTX_DRX_P3
SATA_ODD_PTX_DRX_P3_C<17>
SATA_ODD_PTX_DRX_N3_C<17>
SATA_ODD_PRX_DTX_N3_C<17>
SATA_ODD_PRX_DTX_P3_C<17>
ZODD_WAKE#<46>
1000P_0402_50V7K~D
1000P_0402_50V7K~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
C428
C428
C429
C429
2
12
C433 0.01U_0402_16V7K~DC433 0.01U_0402_16V7K~D
C434 0.01U_0402_16V7K~DC434 0.01U_0402_16V7K~D
C432 0.01U_0402_16V7K~DC432 0.01U_0402_16V7K~D
C430 0.01U_0402_16V7K~DC430 0.01U_0402_16V7K~D
DEVICE_DET#<47>
SATA_ODD_PTX_DRX_N3
12
SATA_ODD_PRX_DTX_N3
12
SATA_ODD_PRX_DTX_P3
12
+5V_MOD
1 2
R792 0_0402_5%~DR792 0_0402_5%~D
JODD1
1
GND
2
RX+
3
RX-
4
GND
5
TX-
6
TX+
7
GND
8
DP
9
+5V
10
+5V
11
MD
12
GND
13
GND
FOX_LN21131-D008-9H
FOX_LN21131-D008-9H
LInkCIS
GND1
GND2
14
15
PleacenearODDCONN
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
ODD CONN
ODD CONN
ODD CONN
LA-7933
LA-7933
LA-7933
35 65Monday, November 07, 2011
35 65Monday, November 07, 2011
35 65Monday, November 07, 2011
1
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5
4
3
2
1
+3.3V_LAN
R545 10K_0402_5%~D@R545 10K_0402_5%~D@
R546 10K_0402_5%~D@R546 10K_0402_5%~D@
D D
PM_LANPHY_ENABLE<21>
C C
1 2
R555 0_0402_5%~DR555 0_0402_5%~D
R1144 0_0402_5%~DR1144 0_0402_5%~D
25MHZ_18PF_X3G025000DI1H-H~D
25MHZ_18PF_X3G025000DI1H-H~D
22P_0402_50V8J~D
22P_0402_50V8J~D
1
2
C470
C470
1
2
Y3
Y3
IN
GND
1 2
1 2
12
3
OUT
4
GND
TP_LAN_JTAG_TMS
TP_LAN_JTAG_TCK
+3.3V_LAN
10K_0402_5%~D
10K_0402_5%~D
12
R549
R549
10K_0402_5%~D
10K_0402_5%~D
@R557
@
12
R557
1
2
LAN_DISABLE#_R
XTALOXTALO_R
XTALI
Crystal EA.
27P_0402_50V8J~D
27P_0402_50V8J~D
C471
C471
LANCLK_REQ#<18>
PLTRST_LAN#<20>
CLK_PCIE_LAN<18>
CLK_PCIE_LAN#<18>
PCIE_PRX_GLANTX_P7<18>
PCIE_PRX_GLANTX_N7<18>
PCIE_PTX_GLANRX_P7<18>
PCIE_PTX_GLANRX_N7<18>
R551 0_0402_5%~DR551 0_0402_5%~D
LAN_SMBCLK<18>
LAN_SMBDATA<18>
1 2
R552 0_0402_5%~DR552 0_0402_5%~D
1 2
LAN_DISABLE#_R<46>
T142 PAD~D@T142 PAD~D@
T143 PAD~D@T143 PAD~D@
+3.3V_RUN
10K_0402_5%~D
10K_0402_5%~D
12
R547
R547
CLK_PCIE_LAN
CLK_PCIE_LAN#
PCIE_PRX_GLANTX_P7_C
12
PCIE_PRX_GLANTX_N7_C
12
PCIE_PTX_GLANRX_P7_C
PCIE_PTX_GLANRX_N7_C
LAN_DISABLE#_R
LOM_ACTLED_YEL#
LOM_SPD100LED_ORG#
LOM_SPD10LED_GRN#
TP_LAN_JTAG_TDI
TP_LAN_JTAG_TDO
TP_LAN_JTAG_TMS
TP_LAN_JTAG_TCK
LAN_TEST_EN
RES_BIAS
3.01K_0402_1%~D
3.01K_0402_1%~D
12
R561
R561
R562
R562
LANCLK_REQ#_R
LAN_SMBCLK_R
LAN_SMBDATA_R
1 2
R1187 0_0402_5%~DR1187 0_0402_5%~D
C458 0.1U_0402_10V7K~DC458 0.1U_0402_10V7K~D
C459 0.1U_0402_10V7K~DC459 0.1U_0402_10V7K~D
1 2
C460 0.1U_0402_10V7K~DC460 0.1U_0402_10V7K~D
1 2
C461 0.1U_0402_10V7K~DC461 0.1U_0402_10V7K~D
SMBus Device Address 0xC8
1K_0402_1%~D
1K_0402_1%~D
12
XTALO
XTALI
U31
U31
48
CLK_REQ_N
36
PE_RST_N
44
PE_CLKP
45
PE_CLKN
38
PETp
39
PETn
41
PERp
42
PERn
28
SMB_CLK
31
SMB_DATA
3
LAN_DISABLE_N
26
LED0
27
LED1
25
LED2
32
JTAG_TDI
34
JTAG_TDO
33
JTAG_TMS
35
JTAG_TCK
9
XTAL_OUT
10
XTAL_IN
30
TEST_EN
12
RBIAS
82579_QFN48_6X6~D
82579_QFN48_6X6~D
JTAG LED
JTAG LED
PCIE
PCIE
SMBUS
SMBUS
MDI_PLUS0
MDI_MINUS0
MDI_PLUS1
MDI_MINUS1
MDI
MDI
MDI_PLUS2
MDI_MINUS2
MDI_PLUS3
MDI_MINUS3
RSVD_NC
RSVD_VCC3P3_1
RSVD_VCC3P3_2
VDD3P3_IN
VDD3P3_OUT
VDD3P3_15
VDD3P3_19
VDD3P3_29
VDD1P0_47
VDD1P0_46
VDD1P0_37
VDD1P0_43
VDD1P0_11
VDD1P0_40
VDD1P0_22
VDD1P0_16
VDD1P0_8
CTRL_1P0
VSS_EPAD
13
14
17
18
20
21
23
24
6
+RSVD_VCC3P3_1
1
+RSVD_VCC3P3_2
2
5
4
15
19
29
47
46
37
43
11
40
22
16
8
REGCTL_PNP10
7
49
LAN_TX0+
LAN_TX0-
LAN_TX1+
LAN_TX1-
LAN_TX2+
LAN_TX2-
LAN_TX3+
LAN_TX3-
+3.3V_LAN_OUT
+1.0V_LAN
R553 4.7K_0402_5%~DR553 4.7K_0402_5%~D
12
R554 4.7K_0402_5%~DR554 4.7K_0402_5%~D
12
1U_0603_10V7K~D
1U_0603_10V7K~D
1
C464
C464
2
+3.3V_LAN
REGCTL_PNP10
+1.0V_LANPOWEROPTIONS
SharedwithPCH
1.05VSVR
STUFF:R548
NOSTUFF:L29
L29
L29
1 2
4.7UH_CBC2012T4R7M_20%~D
4.7UH_CBC2012T4R7M_20%~D
Idcmax=330mA
PlaceR548,C462,C463andL29closetoU31
+1.0V_LAN
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
C466
C466
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
C467
C467
2
0.1U_0402_10V7K~D
1
1
C468
C468
C469
C469
2
2
Note:+1.0V_LANwillworkat0.95Vto1.15V
*
InternalSRV
STUFF:L29
NOSTUFF:R548
1
2
+1.0V_LAN
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
C462
C462
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
1
2
R548 0_0805_5%~D@R548 0_0805_5%~D@
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
C463
C463
1
2
C1177
C1177
PlaceC1178closetopin5
1 2
+3.3V_LAN
+1.05V_M
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
C1178
C1178
1
2
+3.3V_LAN
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
1
C472
LayoutNotice:Placebeadas
B B
A A
closePI3L720aspossible
LAN_TX3-
L37 12NH_0603CS-120EJTS_5%~DL37 12NH_0603CS-120EJTS_5%~D
L36 12NH_0603CS-120EJTS_5%~DL36 12NH_0603CS-120EJTS_5%~D
LAN_TX2-
L35 12NH_0603CS-120EJTS_5%~DL35 12NH_0603CS-120EJTS_5%~D
L34 12NH_0603CS-120EJTS_5%~DL34 12NH_0603CS-120EJTS_5%~D
LAN_TX1-
L32 12NH_0603CS-120EJTS_5%~DL32 12NH_0603CS-120EJTS_5%~D
LAN_TX1+
L33 12NH_0603CS-120EJTS_5%~DL33 12NH_0603CS-120EJTS_5%~D
L31 12NH_0603CS-120EJTS_5%~DL31 12NH_0603CS-120EJTS_5%~D
L30 12NH_0603CS-120EJTS_5%~DL30 12NH_0603CS-120EJTS_5%~D
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
DOCKED<33,46>
DOCKEDFROMNIC
C472
2
2
LOM_ACTLED_YEL#
LOM_SPD100LED_ORG#
LOM_SPD10LED_GRN#
1:TODOCK
0:TORJ45
LANANALOGSWITCH
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C473
C473
C474
C474
2
39
U32
U32
LAN_TX3-R
2
LAN_TX3+RLAN_TX3+
LAN_TX2-R
LAN_TX2+RLAN_TX2+
LAN_TX1-R
LAN_TX1+R
LAN_TX0-RLAN_TX0LAN_TX0+RLAN_TX0+
A0+
3
A0-
6
A1+
7
A1-
9
A2+
10
A2-
11
A3+
12
A3-
13
SEL
15
LEDA0
16
LEDA1
42
LEDA2
5
PD
43
PAD_GND
PI3L720ZHEX_TQFN42_9X3P5~D
PI3L720ZHEX_TQFN42_9X3P5~D
+PWR_SRC_S
+3.3V_ALW2
100K_0402_5%~D
100K_0402_5%~D
12
R565
R565
SW_LAN_TX3-
38
VDD1VDD4VDD8VDD14VDD21VDD30VDD
LEDB0
LEDB1
LEDB2
LEDC0
LEDC1
LEDC2
B0+
B0-
B1+
B1-
B2+
B2-
B3+
B3-
C0+
C0-
C1+
C1-
C2+
C2-
C3+
C3-
37
34
33
29
28
25
24
17
18
41
36
35
32
31
27
26
23
22
19
20
40
SW_LAN_TX3+
SW_LAN_TX2-
SW_LAN_TX2+
SW_LAN_TX1-
SW_LAN_TX1+
SW_LAN_TX0-
SW_LAN_TX0+
LAN_ACTLED_YEL#
LED_100_ORG#
LED_10_GRN#
DOCK_LOM_TRD3DOCK_LOM_TRD3+
DOCK_LOM_TRD2DOCK_LOM_TRD2+
DOCK_LOM_TRD1DOCK_LOM_TRD1+
DOCK_LOM_TRD0DOCK_LOM_TRD0+
DOCK_LOM_ACTLED_YEL#
DOCK_LOM_SPD100LED_ORG#
DOCK_LOM_SPD10LED_GRN#
SW_LAN_TX3- <37>
SW_LAN_TX3+ <37>
SW_LAN_TX2- <37>
SW_LAN_TX2+ <37>
SW_LAN_TX1- <37>
SW_LAN_TX1+ <37>
SW_LAN_TX0- <37>
SW_LAN_TX0+ <37>
LAN_ACTLED_YEL# <37>
LED_100_ORG# <37>
LED_10_GRN# <37>
DOCK_LOM_TRD3- <44>
DOCK_LOM_TRD3+ <44>
DOCK_LOM_TRD2- <44>
DOCK_LOM_TRD2+ <44>
DOCK_LOM_TRD1- <44>
DOCK_LOM_TRD1+ <44>
DOCK_LOM_TRD0- <44>
DOCK_LOM_TRD0+ <44>
DOCK_LOM_ACTLED_YEL# <44>
DOCK_LOM_SPD100LED_ORG# <44>
DOCK_LOM_SPD10LED_GRN# <44>
TODOCK
5
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
61
Q297A
Q297A
SIO_SLP_LAN#<19,46>
2
LOM_SPD100LED_ORG#
LOM_SPD10LED_GRN#
+3.3V_ALW
100K_0402_5%~D
100K_0402_5%~D
12
R564
R564
+ENAB_3VLAN
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
Q297B
Q297B
4
+3.3V_LAN
5
1
P
B
2
A
G
TC7SH08FU_SSOP5~D
TC7SH08FU_SSOP5~D
3
Q34
Q34
SI3456DDV-T1-GE3_TSOP6~D
SI3456DDV-T1-GE3_TSOP6~D
D
D
6
2
1
G
G
1M_0402_5%~D
1M_0402_5%~D
12
R1638
R1638
C478
C478
1 2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
4
O
U15
U15
S
S
3
2200P_0402_50V7K~D
2200P_0402_50V7K~D
1
2
WLAN_LAN_DISB# <46>
+3.3V_LAN
45
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
C475
C475
2
C477
C477
1
2
0_1206_5%~D
0_1206_5%~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
C476
C476
R563
@R563
@
+3.3V_M
12
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
LAN/LAN SW
LAN/LAN SW
LAN/LAN SW
LA-7933
LA-7933
LA-7933
1
36 65Monday, November 07, 2011
36 65Monday, November 07, 2011
36 65Monday, November 07, 2011
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5
D D
C C
B B
0.47U_0603_10V7K~D
0.47U_0603_10V7K~D
C479
C479
1
2
0.47U_0603_10V7K~D
0.47U_0603_10V7K~D
1
C484
C484
2
+TRM_CT1
+TRM_CT2
0.47U_0603_10V7K~D
0.47U_0603_10V7K~D
C480
C480
1
2
+TRM_CT3
+TRM_CT4
0.47U_0603_10V7K~D
0.47U_0603_10V7K~D
1
C486
C486
2
4
T156
T156
1:1
SW_LAN_TX0+<36>
SW_LAN_TX0-<36>
SW_LAN_TX1+<36>
SW_LAN_TX1-<36>
SW_LAN_TX2+<36>
SW_LAN_TX2-<36>
SW_LAN_TX3+<36>
SW_LAN_TX3-<36>
SW_LAN_TX0+
SW_LAN_TX0-
SW_LAN_TX1+
SW_LAN_TX1-
SW_LAN_TX2+
SW_LAN_TX2-
SW_LAN_TX3+
SW_LAN_TX3-
1
TD1+
2
TD1-
3
TDCT1
4
TDCT2
5
TD2+
6
TD2-
7
TD3+
8
TD3-
9
TDCT3
10
TDCT4
11
TD4+
12
TD4-
350uH_IH-115-F~D
350uH_IH-115-F~D
1:1
1:1
1:1
1:1
1:1
1:1
1:1
3
NB_LAN_TX0+
24
TX1+
NB_LAN_TX0-
23
TX1-
Z2805
22
TXCT1
Z2807
21
TXCT2
TX2+
TX2-
TX3+
TX3-
TXCT3
TXCT4
TX4+
TX4-
1 2
C485 1000P_1808_3KV7K~DC485 1000P_1808_3KV7K~D
20
19
18
17
16
15
14
13
NB_LAN_TX1+
NB_LAN_TX1-
NB_LAN_TX2+
NB_LAN_TX2-
Z2806
Z2808
NB_LAN_TX3+
NB_LAN_TX3-
GND_CHASSIS
12
12
12
R571 75_0402_1%~DR571 75_0402_1%~D
R573 75_0402_1%~DR573 75_0402_1%~D
R572 75_0402_1%~DR572 75_0402_1%~D
12
R574 75_0402_1%~DR574 75_0402_1%~D
2
1
+3.3V_LAN:20mils
+3.3V_LAN
JLOM1
JLOM1
1U_0603_10V6K~D
1U_0603_10V6K~D
1
C481
C481
2
13
Yellow LED-
12
Yellow LED+
8
PR4-
7
PR4+
6
PR2-
5
PR3-
4
PR3+
3
PR2+
2
PR1-
1
PR1+
10
Green LED-
9
LED+
11
ORANGE_LED-
TYCO_2041333-1~D
TYCO_2041333-1~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
C483
C483
2
LInkCIS
470P_0402_50V7K~D
470P_0402_50V7K~D
1
C1167
C1167
2
SHLD2
SHLD1
15
14
LAN_ACTLED_YEL#<36>
LED_10_GRN#<36>
LED_100_ORG#<36>
1 2
R1171 150_0402_5%~DR1171 150_0402_5%~D
NB_LAN_TX3NB_LAN_TX3+
NB_LAN_TX1NB_LAN_TX2NB_LAN_TX2+
NB_LAN_TX1+
NB_LAN_TX0NB_LAN_TX0+
1 2
R1170 150_0402_5%~DR1170 150_0402_5%~D
1 2
R1167 150_0402_5%~DR1167 150_0402_5%~D
+3.3V_LAN
GNDCHASSIS
ClosetoJLOM1
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
RJ45
RJ45
RJ45
LA-7933
LA-7933
LA-7933
37 65Monday, November 07, 2011
37 65Monday, November 07, 2011
37 65Monday, November 07, 2011
1
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5
D D
C C
L51
L51
DLW21SN900SQ2L_0805_4P~D
DLW21SN900SQ2L_0805_4P~D
USBP9+<20>
USBP9-<20>
B B
1
4
R736 0_0402_5%~D@R736 0_0402_5%~D@
R742 0_0402_5%~D@R742 0_0402_5%~D@
1
4
1 2
1 2
2
2
3
3
4
+5V_ALW
USBP9_D+
USBP9_D-
3
+5V_ESATA_PWR
U48
PJP31
PJP31
@
@
112
ESATA_USB_PWR_EN#<46>
+5V_ALW_ESATA
USBP9_DUSBP9_D+
D73
D73
2
3
PESD5V0U2BT_SOT23-3~D
PESD5V0U2BT_SOT23-3~D
2
10U_0805_10V4Z~D
10U_0805_10V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
JUMP_43X79
C676
C676
1
2
JUMP_43X79
C675
C675
1
2
U48
1
GND
2
IN
3
IN
4
EN1#
EN2#5FAULT#2
TPS2560DRCR-PG1.1_SON10_3X3~D
TPS2560DRCR-PG1.1_SON10_3X3~D
1
FAULT1#
OUT1
OUT2
T-PAD
10
9
8
7
ILIM
6
11
USB_OC4# <20>
ESATA_PTX_DRX_P4_C<17>
ESATA_PTX_DRX_N4_C<17>
ESATA_PRX_DTX_N4_C<17>
ESATA_PRX_DTX_P4_C<17>
24.9K_0402_1%~D
24.9K_0402_1%~D
12
R783
R783
C671 0.01U_0402_16V7K~DC671 0.01U_0402_16V7K~D
1 2
C672 0.01U_0402_16V7K~DC672 0.01U_0402_16V7K~D
1 2
C673 0.01U_0402_16V7K~DC673 0.01U_0402_16V7K~D
1 2
C674 0.01U_0402_16V7K~DC674 0.01U_0402_16V7K~D
1 2
2
+5V_ESATA_PWR
150U_D2_6.3VY_R15M~D
150U_D2_6.3VY_R15M~D
1
+
+
2
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
C668
C668
C667
C667
1
2
USBP9_DUSBP9_D+
SATA_PTX_DRX_P4
SATA_PTX_DRX_N4
SATA_PRX_DTX_N4
SATA_PRX_DTX_P4
JESA1
JESA1
USB
USB
1
USB_V
2
USB_D-
3
USB_D+
4
USB_GND
5
GND
6
A+
ESATA
ESATA
7
A-
8
9
10
11
FOX_3Q38111-C35C5B-7H
FOX_3Q38111-C35C5B-7H
GND
BB+
GND
GND
GND
GND
GND
12
13
14
15
1
LInkCIS
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
ESATA
ESATA
ESATA
LA-7933
LA-7933
LA-7933
38 65Monday, November 07, 2011
38 65Monday, November 07, 2011
38 65Monday, November 07, 2011
1
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5
4
3
2
1
+3.3V_RUN+3.3V_RUN
USB1_A_EQ1
1 2
R22 4.7K_0402_5%~D@R22 4.7K_0402_5%~D@
R23 4.7K_0402_5%~D@R23 4.7K_0402_5%~D@
R24 4.7K_0402_5%~DR24 4.7K_0402_5%~D
R25 4.7K_0402_5%~D@R25 4.7K_0402_5%~D@
D D
C C
B B
A A
R12 4.7K_0402_5%~D@R12 4.7K_0402_5%~D@
R15 4.7K_0402_5%~DR15 4.7K_0402_5%~D
R16 4.7K_0402_5%~D@R16 4.7K_0402_5%~D@
R18 4.7K_0402_5%~DR18 4.7K_0402_5%~D
R21 4.7K_0402_5%~D@R21 4.7K_0402_5%~D@
R773 0_0402_5%~D@ R773 0_0402_5%~D@
R809 0_0402_5%~D@ R809 0_0402_5%~D@
R103 4.7K_0402_5%~D@R103 4.7K_0402_5%~D@
R104 4.7K_0402_5%~D@R104 4.7K_0402_5%~D@
R105 4.7K_0402_5%~D@R105 4.7K_0402_5%~D@
R106 4.7K_0402_5%~D@R106 4.7K_0402_5%~D@
R107 4.7K_0402_5%~D@R107 4.7K_0402_5%~D@
R108 4.7K_0402_5%~D@R108 4.7K_0402_5%~D@
+3.3V_RUN
USB1_A_DE0
1 2
USB1_A_EQ0
1 2
USB1_A_DE1
1 2
USB1_TEST
1 2
USB1_B_EQ1
1 2
USB1_B_DE0
1 2
USB1_B_EQ0
1 2
USB1_B_DE1
1 2
USB1_B_DE1
1 2
USB1_A_DE1
1 2
USB1_B_DE0
1 2
USB1_A_DE0
1 2
USB1_B_EQ0
1 2
USB1_A_EQ0
1 2
USB1_B_EQ1
1 2
USB1_A_EQ1
1 2
USB2_A_EQ1
1 2
R31 4.7K_0402_5%~D@R31 4.7K_0402_5%~D@
R32 4.7K_0402_5%~D@R32 4.7K_0402_5%~D@
R33 4.7K_0402_5%~DR33 4.7K_0402_5%~D
R34 4.7K_0402_5%~D@R34 4.7K_0402_5%~D@
R26 4.7K_0402_5%~D@R26 4.7K_0402_5%~D@
R27 4.7K_0402_5%~DR27 4.7K_0402_5%~D
R28 4.7K_0402_5%~D@R28 4.7K_0402_5%~D@
R29 4.7K_0402_5%~DR29 4.7K_0402_5%~D
R30 4.7K_0402_5%~D@R30 4.7K_0402_5%~D@
R813 0_0402_5%~D@ R813 0_0402_5%~D@
R826 0_0402_5%~D@ R826 0_0402_5%~D@
R112 4.7K_0402_5%~D@R112 4.7K_0402_5%~D@
R113 4.7K_0402_5%~D@R113 4.7K_0402_5%~D@
R110 4.7K_0402_5%~D@R110 4.7K_0402_5%~D@
R114 4.7K_0402_5%~D@R114 4.7K_0402_5%~D@
R109 4.7K_0402_5%~D@R109 4.7K_0402_5%~D@
R111 4.7K_0402_5%~D@R111 4.7K_0402_5%~D@
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
USB2_A_DE0
USB2_A_EQ0
USB2_A_DE1
USB2_TEST
USB2_B_EQ1
USB2_B_DE0
USB2_B_EQ0
USB2_B_DE1
USB2_B_DE1
USB2_A_DE1
USB2_B_DE0
USB2_A_DE0
USB2_B_EQ0
USB2_A_EQ0
USB2_B_EQ1
USB2_A_EQ1
5
+5V_ALW
USB3RP1_RP
USB3RN1_RP
2
JUMP_43X79
JUMP_43X79
C670
C670
USB3RP2_RP
USB3RN2_RP
PJP30
C454 0.1U_0402_10V7K~DC454 0.1U_0402_10V7K~D
C452 0.1U_0402_10V7K~DC452 0.1U_0402_10V7K~D
R831 0_0402_5%~DR831 0_0402_5%~D
1 2
R830 0_0402_5%~DR830 0_0402_5%~D
1 2
@PJP30
@
112
C457 0.1U_0402_10V7K~DC457 0.1U_0402_10V7K~D
C456 0.1U_0402_10V7K~DC456 0.1U_0402_10V7K~D
R833 0_0402_5%~DR833 0_0402_5%~D
1 2
R832 0_0402_5%~DR832 0_0402_5%~D
1 2
USB3TP1<20>
USB3TN1<20>
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
10U_0805_10V4Z~D
10U_0805_10V4Z~D
C669
C669
1
1
2
2
USB3TP2<20>
USB3TN2<20>
USB_SIDE_EN#<45,46>
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
1
C453
C453
C450
C450
2
2
U625
U625
1
VDD
13
15
16
17
18
19
20
9
8
5
7
USB1_TEST
14
24
TPS2560DRCR-PG1.1_SON10_3X3~D
TPS2560DRCR-PG1.1_SON10_3X3~D
U626
U626
1
VDD
13
VDD
15
A_EQ1/SDA_CTL
16
A_DE0/SCL_CTL
17
A_EQ0/NC
18
A_DE1/NC
19
A_INp
20
A_INn
9
B_INp
8
B_INn
5
PD#
7
REXT
14
TEST
24
I2C_EN
PS8710BTQFN24GTR-A1_TQFN24_4X4
PS8710BTQFN24GTR-A1_TQFN24_4X4
VDD
A_EQ1/SDA_CTL
A_DE0/SCL_CTL
A_EQ0/NC
A_DE1/NC
A_INp
A_INn
B_INp
B_INn
PD#
REXT
TEST
I2C_EN
PS8710BTQFN24GTR-A1_TQFN24_4X4
PS8710BTQFN24GTR-A1_TQFN24_4X4
U45
U45
1
GND
2
IN
3
IN
4
EN1#
EN2#5FAULT#2
FAULT1#
OUT1
OUT2
ILIM
T-PAD
4
B_EQ1/I2C_ADDR1
B_DE0/I2C_ADDR0
B_EQ0/NC
B_DE1/NC
+5V_USB_PWR2 +5V_USB_PWR1
10
9
8
7
6
11
B_EQ1/I2C_ADDR1
B_DE0/I2C_ADDR0
B_EQ0/NC
B_DE1/NC
A_OUTp
A_OUTn
B_OUTp
B_OUTn
USB1_A_EQ1
USB1_A_DE0
USB1_A_EQ0
USB1_A_DE1
12
12
12
12
+3.3V_RUN
USB3TP1_C
USB3TN1_C
USB3RP1_RP_R
USB3RN1_RP_R
3.74K_0402_1%~D
3.74K_0402_1%~D
R1207
R1207
1 2
+5V_ALW_FUSE SB#
PWRSHARE_EN#
USB_SIDE_EN#
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
1
1
C451
C451
C455
C455
2
2
USB2_A_EQ1
USB2_A_DE0
USB2_A_EQ0
USB2_A_DE1
USB3TP2_C
USB3TN2_C
USB3RP2_RP_R
USB3RN2_RP_R
USB2_TEST
3.74K_0402_1%~D
3.74K_0402_1%~D
R1191
R1191
1 2
A_OUTp
A_OUTn
B_OUTp
B_OUTn
GPAD
GND
GND
GPAD
GND
GND
4
3
2
6
12
11
22
23
10
21
25
USB_OC0# <20>
4
3
2
6
12
11
22
23
10
21
25
USB1_B_EQ1
USB1_B_DE0
USB1_B_EQ0
USB1_B_DE1
USB3TP1_RP_C
USB3TN1_RP_C
USB3RP1_C
USB3RN1_C
USB2_B_EQ1
USB2_B_DE0
USB2_B_EQ0
USB2_B_DE1
USB3TP2_RP_C
USB3TN2_RP_C
USB3RP2_C
USB3RN2_C
C489 0.1U_0402_10V7K~DC489 0.1U_0402_10V7K~D
12
C488 0.1U_0402_10V7K~DC488 0.1U_0402_10V7K~D
12
C465 0.1U_0402_10V7K~DC465 0.1U_0402_10V7K~D
12
C487 0.1U_0402_10V7K~DC487 0.1U_0402_10V7K~D
12
12
R747
R747
24.9K_0402_1%~D
24.9K_0402_1%~D
C493 0.1U_0402_10V7K~DC493 0.1U_0402_10V7K~D
12
C492 0.1U_0402_10V7K~DC492 0.1U_0402_10V7K~D
12
C490 0.1U_0402_10V7K~DC490 0.1U_0402_10V7K~D
12
C491 0.1U_0402_10V7K~DC491 0.1U_0402_10V7K~D
12
USB3TP2_RP
USB3TN2_RP
USB3TP1_RP
USB3TN1_RP
USB3RP2 <20>
USB3RN2 <20>
3
USBP0-<20>
USBP0+<20>
USB3TN1_RP
USB3TP1_RP
USB3RP1 <20>
USB3RN1 <20>
USB3RN1_RP
USB3RP1_RP
USB_PWR_SHR_EN#<46>
USBP1_D-
USBP1_D+ USBP1_R_D+
USB3TN2_RP
USB3TP2_RP
USB3RN2_RP
USB3RP2_RP
ForEMIrequest
L39
L39
3
3
2
2
DLW21SN900SQ2L_0805_4P~D
DLW21SN900SQ2L_0805_4P~D
1 2
R749 0_0402_5%~D@ R749 0_0402_5%~D@
1 2
R748 0_0402_5%~D@ R748 0_0402_5%~D@
L42
L42
3
3
2
2
DLW21SN900HQ2L_0805_4P~D
DLW21SN900HQ2L_0805_4P~D
1 2
R743 0_0402_5%~D@R743 0_0402_5%~D@
1 2
R744 0_0402_5%~D@R744 0_0402_5%~D@
L40
L40
3
3
2
2
DLW21SN900HQ2L_0805_4P~D
DLW21SN900HQ2L_0805_4P~D
1 2
R746 0_0402_5%~D@R746 0_0402_5%~D@
1 2
R745 0_0402_5%~D@R745 0_0402_5%~D@
R1626 0_0402_5%~DR1626 0_0402_5%~D
1 2
USBP1-<20>
USBP1+<20>
+5V_ALW
ForEMIrequest
DLW21SN900SQ2L_0805_4P~D
DLW21SN900SQ2L_0805_4P~D
3
3
4
2
1
2
L41
L41
1 2
R754 0_0402_5%~D@ R754 0_0402_5%~D@
1 2
R764 0_0402_5%~D@ R764 0_0402_5%~D@
DLW21SN900HQ2L_0805_4P~D
DLW21SN900HQ2L_0805_4P~D
2
1
2
3
3
4
L44
L44
1 2
R750 0_0402_5%~D@R750 0_0402_5%~D@
1 2
R751 0_0402_5%~D@R751 0_0402_5%~D@
DLW21SN900HQ2L_0805_4P~D
DLW21SN900HQ2L_0805_4P~D
2
1
2
3
3
4
L43
L43
1 2
R752 0_0402_5%~D@ R752 0_0402_5%~D@
1 2
R753 0_0402_5%~D@ R753 0_0402_5%~D@
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
USBP0_D-
4
4
USBP0_D+
1
1
USB3_TX1_N_D-
4
4
USB3_TX1_P_D+
1
1
USB3_RX1_N_D-
4
4
USB3_RX1_P_D+
1
1
PowershareSW
U2
U2
8
CB
7
TDM
6
TDP
5
VDD
SLG55584AVTR_TDFN8_2X2
SLG55584AVTR_TDFN8_2X2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C715
C715
2
USBP1_R_D-
4
1
USB3_TX2_N_D-
1
USB3_TX2_P_D+
4
USB3_RX2_N_D-
1
USB3_RX2_P_D+
4
ForESDrequest
D14
D14
10
USB3_RX1_P_D+ USB3_RX1_P_D+
USB3_RX1_N_D- USB3_RX1_N_D-
9
7
6
IP4292CZ10-TBR_XSON10_2.5X1~D
IP4292CZ10-TBR_XSON10_2.5X1~D
ESDrequestchangemainsourcetoSC300002F0L.
PWRSHARE_EN
1
CEN
USBP1_D-
2
DM
USBP1_D+
3
DP
SEL
4
SELCDP
9
Thermal Pad
USB3_RX2_P_D+ USB3_RX2_P_D+
USB3_RX2_N_D- USB3_RX2_N_D-
+5V_ALW
10K_0402_5%~D
10K_0402_5%~D
R1614
R1614
1 2
10K_0402_5%~D
@R1613
10K_0402_5%~D
@
R1613
1 2
ForESDrequest
D16
D16
10
9
7
6
IP4292CZ10-TBR_XSON10_2.5X1~D
IP4292CZ10-TBR_XSON10_2.5X1~D
ESDrequestchangemainsourcetoSC300002F0L.
2
USB3_TX1_P_D+USB3_TX1_P_D+
1
USB3_TX1_N_D-USB3_TX1_N_D-
2
4
5
3
8
PWRSHARE_EN#
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
USB3_TX2_P_D+USB3_TX2_P_D+
1
USB3_TX2_N_D-USB3_TX2_N_D-
2
4
5
3
8
+5V_ALW
Q55
Q55
USBP0_DUSBP0_D+
USB3_RX1_N_DUSB3_RX1_P_D+
USB3_TX1_N_DUSB3_TX1_P_D+
+5V_USB_PWR1
3
2
PESD5V0U2BT_SOT23-3~D
PESD5V0U2BT_SOT23-3~D
1
JUSB1
JUSB1
1
VBUS
2
D-
3
D+
4
GND
5
SSRX-
6
SSRX+
7
GND
8
SSTX-
9
SSTX+
FOX_UEA111Y1-C5BDA-7H
FOX_UEA111Y1-C5BDA-7H
LInkCIS
D15
D15
+5V_USB_PWR1
10
GND
11
GND
12
GND
13
GND
150U_D2_6.3VY_R15M~D
150U_D2_6.3VY_R15M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
C793
C793
C324
C324
1
+
+
2
2
ClosetoJUSB1
100K_0402_5%~D
100K_0402_5%~D
R816
R816
1 2
13
D
D
PWRSHARE_EN
2
G
G
S
S
USBP1_R_DUSBP1_R_D+
USB3_RX2_N_DUSB3_RX2_P_D+
USB3_TX2_N_DUSB3_TX2_P_D+
12
+5V_USB_PWR2
2
3
PESD5V0U2BT_SOT23-3~D
PESD5V0U2BT_SOT23-3~D
1
USB_PWR_SHR_VBUS_EN <46>
R7840_0402_5%~D R7840_0402_5%~D
JUSB2
JUSB2
1
VBUS
2
D-
3
D+
4
GND
5
SSRX-
6
SSRX+
7
GND
8
SSTX-
9
SSTX+
FOX_UEA111Y1-C5BDA-7H
FOX_UEA111Y1-C5BDA-7H
LInkCIS
D17
D17
GND
GND
GND
GND
+5V_USB_PWR2
150U_D2_6.3VY_R15M~D
150U_D2_6.3VY_R15M~D
1
C323
C323
+
+
2
10
11
12
13
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
C794
C794
1
2
ClosetoJUSB2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
USB3.0
USB3.0
USB3.0
LA-7933
LA-7933
LA-7933
1
0.2
0.2
39 65Friday, November 11, 2011
39 65Friday, November 11, 2011
39 65Friday, November 11, 2011
0.2
of
of
of
Page 40
5
4
3
2
1
D D
1 2
PAD-OPEN1x1m
PAD-OPEN1x1m
+3.3V_RUN_TPM
1 2
R873 0_0402_5%~D1@ R873 0_0402_5%~D1@
C C
CLK_PCI_TPM_TCM
33_0402_5%~D
33_0402_5%~D
12
@RE5
@
RE5
27P_0402_50V8J~D
27P_0402_50V8J~D
@CE3
@
1
CE3
2
PJP77
PJP77
CLK_PCI_TPM_TCM<18>
PCH_PLTRST#_EC<20,41,42,45,46,47>
+3.3V_RUN_TPM+3.3V_RUN
+3.3V_SB3V
SP_TPM_LPC_EN<46>
LPC_LAD0<17,42,46,47>
LPC_LAD1<17,42,46,47>
LPC_LAD2<17,42,46,47>
LPC_LAD3<17,42,46,47>
LPC_LFRAME#<17,42,46,47>
IRQ_SERIRQ<17,46,47>
CLKRUN#<19,46,47>
+3.3V_SB3V
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1@ C48
1@
1
C48
2
SP_TPM_LPC_EN
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
CLK_PCI_TPM_TCM
LPC_LFRAME#
PCH_PLTRST#_EC
IRQ_SERIRQ
CLKRUN#
TCM_BA1
4700P_0402_25V7K~D
4700P_0402_25V7K~D
1@ C45
1@
1
C45
2
ATMEL TPM for E4
U39
1@ U39
1@
5
SB3V
28
LPCPD#
26
LAD0
23
LAD1
20
LAD2
17
LAD3
21
LCLK
22
LFRAME#
16
LRESET#
27
SERIRQ
15
CLKRUN#
1
ATEST_1
2
ATEST_2
3
ATEST_3
AT97SC3204-X2A14-AB_TSSOP28
AT97SC3204-X2A14-AB_TSSOP28
VCC_0
VCC_1
VCC_2
V_BAT
NBO_13
NBO_14
GPIO6
TESTBI
TESTI
NC_7
GND_4
GND_11
GND_18
GND_25
10
19
24
12
13
NC_P
14
6
9
8
7
4
11
18
25
1 2
C554 1U_0402_6.3V6K~D@C554 1U_0402_6.3V6K~D@
U39.14internalisemptypin
TCM_BA0
PP
R656 4.7K_0402_5%~D@R656 4.7K_0402_5%~D@
2200P_0402_50V7K~D
2200P_0402_50V7K~D
1
2
1 2
2200P_0402_50V7K~D
2200P_0402_50V7K~D
1
C551
C551
C550
C550
2
+3.3V_RUN_TPM
+3.3V_RUN_TPM
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
2200P_0402_50V7K~D
2200P_0402_50V7K~D
1
1
C552
C552
2
2
JETWAY_CLK14M <18>
JUSH1
JUSH1
1
1
ACES_50554-02001-001
ACES_50554-02001-001
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C53
C53
2
2 2
3
3
4
4 4
5
5
6
6 6
7
7
8
8 8
9
9
10
10 10
11
11
12
12 12
13
13
14
14 14
15
15
16
16 16
17
17
18
18 18
19
19
20
20 20
CONN@
CONN@
LInkCIS
21
G1
22
G2
23
G3
24
G4
USBP7-<20>
C553
C553
USH_SMBDAT<47>
BCM5882_ALERT#<46>
BT_COEX_STATUS2<48>
BT_PRI_STATUS<48>
PLTRST_USH#<20>
USH_PWR_STATE#<46>
CONTACTLESS_DET#<21>
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C52
C52
1
2
USH_SMBCLK<47>
USH_DET#<21>
+5V_RUN +3.3V_SUS+3.3V_RUN
USBP7+<20>
+3.3V_SUS
+3.3V_RUN
+5V_RUN
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
2
C56
C56
1
2
ChangeU39TPMsolutiontonewp/n:SA00004WQ10
ClosetoJUSH1
Co‐layU37andU39
LPClayout:PlaceTCMfirstandthenendLPCwithTPM.
China TCM: NationZ & Jetway co-lay
VDD_0
VDD_1
VDD_2
GND_11
GND_18
GND_25
GND_4
NC_5
NC_12
NC_13
NC_1
NC_2
NC_6
NC_8
NC_P
+3.3V_RUN_TPM
10
19
24
11
18
25
4
5
12
13
1
2
6
8
14
JETWAY_CLK14M
NC_P
+3.3V_SB3V
JETWAY_CLK14MCLK_PCI_TPM_TCM
33_0402_5%~D
33_0402_5%~D
@RE6
@
12
RE6
27P_0402_50V8J~D
27P_0402_50V8J~D
1
@CE4
@
CE4
2
B B
+3.3V_RUN_TPM
10K_0402_5%~D
10K_0402_5%~D
12
12
@R657
@
R657
10K_0402_5%~D
10K_0402_5%~D
12
12
R659
R659
LOW:PowerDownMode
High:WorkingMode
10K_0402_5%~D
10K_0402_5%~D
@R658
@
R658
TCM_BA0
TCM_BA1
10K_0402_5%~D
10K_0402_5%~D
R660
R660
SP_TPM_LPC_EN
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
LPC_LFRAME#
PCH_PLTRST#_EC
IRQ_SERIRQ
CLKRUN#
PP
TCM_BA1
TCM_BA0
U37
4@ U37
4@
28
LPCPD#
26
LAD0
23
LAD1
20
LAD2
17
LAD3
21
LCLK
22
LFRAME#
16
LRESET#
27
SERIRQ
15
CLKRUN#
7
PP
3
BA_1
9
BA_0
SSX44-B-D-T1_TSSOP28~D
SSX44-B-D-T1_TSSOP28~D
A A
TCM_BA0TCM_BA1willconfigurationTCMLPCLegacyIOportwithEE/EF
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
TPM/TCM
TPM/TCM
TPM/TCM
LA-7933
LA-7933
LA-7933
40 65Monday, November 07, 2011
40 65Monday, November 07, 2011
40 65Monday, November 07, 2011
1
0.2
0.2
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Page 41
5
MiniWWAN/GPS/LTEH=4mm
+3.3V_PCIE_WWAN +3.3V_PCIE_WWAN
D D
MXM_PIN80<16>
C C
PCIE_PTX_WANRX_N1<18>
PCIE_PTX_WANRX_P1<18>
3D_ON<30>
MINI1CLK_REQ#<18>
CLK_PCIE_MINI1#<18>
CLK_PCIE_MINI1<18>
PCIE_PRX_WANTX_N1<18>
PCIE_PRX_WANTX_P1<18>
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
1 2
C597 0.1U_0402_10V7K~DC597 0.1U_0402_10V7K~D
C599 0.1U_0402_10V7K~DC599 0.1U_0402_10V7K~D
HW_GPS_DISABLE2#<46>
G
G
2
13
D
S
D
S
Q85
Q85
MINI1CLK_REQ#
CLK_PCIE_MINI1#
CLK_PCIE_MINI1
PCIE_PRX_WANTX_N1
PCIE_PRX_WANTX_P1
PCIE_PTX_WANRX_N1_C
1 2
PCIE_PTX_WANRX_P1_C
1 2
MXM_PIN80_R
R11610_0402_5%~D @R11610_0402_5%~D @
PCIE_WAKE#
MXM_PIN80_R
BELLW_80003-1121
BELLW_80003-1121
LInkCIS
+1.5V_RUN
1
2
4
JMINI1
JMINI1
112
334
556
778
9910
111112
131314
151516
171718
191920
212122
232324
252526
272728
292930
313132
333334
353536
373738
393940
414142
434344
454546
474748
494950
515152
GND153GND2
33P_0402_50V8J~D
33P_0402_50V8J~D
1
C593
C593
2
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
+3.3V_PCIE_WWAN
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
C594
C594
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
1
C610
C610
2
UIM_DATA
UIM_CLK
UIM_RESET
UIM_VPP
1 2
R704 0_0402_5%~DR704 0_0402_5%~D
WWAN_SMBCLK
WWAN_SMBDAT
USBP5USBP5+
LED_WWAN_OUT#
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
33P_0402_50V8J~D
33P_0402_50V8J~D
1
1
C611
C611
C612
C612
2
2
3
+3.3V_PCIE_WWAN
2.2K_0402_5%~D
2.2K_0402_5%~D
2.2K_0402_5%~D
2.2K_0402_5%~D
@R1160
@
@R1159
@
12
12
R1160
R1159
WWAN_SMBCLK
WWAN_SMBDAT
+1.5V_RUN
+SIM_PWR
WWAN_RADIO_DIS# <46>
PCH_PLTRST#_EC <20,40,42,45,46,47>
USBP5- <20>
USBP5+ <20>
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
330U_D2E_6.3VM_R25~D
330U_D2E_6.3VM_R25~D
33P_0402_50V8J~D
33P_0402_50V8J~D
330U_D2E_6.3VM_R25~D
330U_D2E_6.3VM_R25~D
1
1
@
1
1
C613
C613
2
2
@
+
+
+
+
C615
C615
C614
C614
C1176
C1176
2
2
PWR
Rail
+3.3V
+3.3Vaux
+1.5V
LED_WWAN_OUT#
Voltage
Tolerance
+-9% 7501000
+-9%
+-5%
1 2
1 2
100K_0402_5%~D
100K_0402_5%~D
1 2
R719
R719
DDR_XDP_WAN_SMBCLK <12,13,14,15,17,18,34>
R11570_0402_5%~D R11570_0402_5%~D
DDR_XDP_WAN_SMBDAT <12,13,14,15,17,18,34>
R11580_0402_5%~D R11580_0402_5%~D
+3.3V_PCIE_WWAN
G
G
2
13
D
S
D
S
Q77
Q77
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
330
500
WIRELESS_LED# <46,49>
Aux PowerPrimary Power
NormalNormalPeak
250 (Wake enable)
5 (Not wake enable)
250
NA
375
2
UIM_RESET
UIM_CLK
+SIM_PWR
1
2
3
33P_0402_50V8J~D
33P_0402_50V8J~D
33P_0402_50V8J~D
33P_0402_50V8J~D
@C629
@
@C628
@
1
1
C629
C628
2
2
SIMCardPush‐Pushtype
UIM_RESET UIM_VPP
UIM_CLK
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
C616
C616
2
U40
@U40
@
SRV05-4.TCT_SOT23-6~D
SRV05-4.TCT_SOT23-6~D
JSIM1
CONN@JSIM1
CONN@
1
VCC
GND
2
RST
VPP
3
CLK
4
NC
NC
GND
GND
SUYIN_254070FB008S205ZL
SUYIN_254070FB008S205ZL
LInkCIS
1
UIM_VPP
6
5
+SIM_PWR
UIM_DATA
4
33P_0402_50V8J~D
33P_0402_50V8J~D
33P_0402_50V8J~D
33P_0402_50V8J~D
@C630
@
@C631
@
1
1
C630
C631
2
2
5
6
UIM_DATA
7
I/O
8
9
10
MiniWLAN/WIMAXH=5.2
+3.3V_WLAN
B B
A A
5
PCIE_WAKE#<16,42,45,47>
COEX2_WLAN_ACTIVE<42,48>
COEX1_BT_ACTIVE<48>
MINI2CLK_REQ#<18>
CLK_PCIE_MINI2#<18>
CLK_PCIE_MINI2<18>
HOST_DEBUG_RX<47>
PCIE_PRX_WLANTX_N2<18>
PCIE_PRX_WLANTX_P2<18>
PCIE_PTX_WLANRX_N2<18>
PCIE_PTX_WLANRX_P2<18>
PCH_CL_CLK1<18>
PCH_CL_DATA1<18>
PCH_CL_RST1#<18>
MSCLK<47>
4
R707 0_0402_5%~DR707 0_0402_5%~D
1 2
R702 0_0402_5%~DR702 0_0402_5%~D
1 2
C596 0.1U_0402_10V7K~DC596 0.1U_0402_10V7K~D
PCIE_PTX_WLANRX_N2_C
1 2
PCIE_PTX_WLANRX_P2_C
1 2
C598 0.1U_0402_10V7K~DC598 0.1U_0402_10V7K~D
1 2
R709 0_0402_5%~DR709 0_0402_5%~D
COEX2_WLAN_ACTIVE
33P_0402_50V8J~D
33P_0402_50V8J~D
@
@
1
C600
C600
2
+1.5V_RUN
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
1
1
C601
C601
2
2
JMINI2
JMINI2
112
334
556
778
9910
111112
131314
151516
171718
191920
212122
232324
252526
272728
292930
313132
333334
353536
373738
393940
414142
434344
454546
474748
494950
515152
GND153GND2
LCN_DAN08-52526-0100
LCN_DAN08-52526-0100
+3.3V_WLAN
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
@C603
@
1
1
C602
C602
C603
2
2
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
+3.3V_WLAN
1
C604
C604
2
+1.5V_RUN
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
2
C605
C605
1
3
MSDATA
WLAN_RADIO_DIS#_R
R703 0_0402_5%~DR703 0_0402_5%~D
USBP4USBP4+
WIMAX_LED#
WLAN_LED#
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
2
C606
C606
1
HOST_DEBUG_TX <47>
PCH_PLTRST#_EC
12
USBP4- <20>
USBP4+ <20>
MSDATA
1 2
R706 0_0402_5%~D@R706 0_0402_5%~D@
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C608
C608
C607
C607
2
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
HOST_DEBUG_TX
MSDATA <47>
1
2
4700P_0402_25V7K~D
4700P_0402_25V7K~D
C595
C595
WLAN_RADIO_DIS#_R
+3.3V_WLAN
WIMAX_LED#
WLAN_LED#
2
100K_0402_5%~D
100K_0402_5%~D
100K_0402_5%~D
100K_0402_5%~D
R718
R718
1 2
1 2
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
12
R7000_0402_5%~D @R7000_0402_5%~D @
2 1
D31
D31
RB751S40T1_SOD523-2~D
RB751S40T1_SOD523-2~D
+3.3V_WLAN
R705
R705
2
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
Q124A
Q124A
61
WLAN_RADIO_DIS# <46>
WIRELESS_LED#
354
Q124B
Q124B
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Mini Card-1/2
Mini Card-1/2
Mini Card-1/2
LA-7933
LA-7933
LA-7933
1
0.2
0.2
0.2
41 65Monday, November 07, 2011
41 65Monday, November 07, 2011
41 65Monday, November 07, 2011
of
of
of
Page 42
5
4
3
2
1
PinkPatherH=5.2
+3.3V_PCIE_FLASH+3.3V_PCIE_FLASH
JMINI3
JMINI3
PCIE_WAKE#<16,41,45,47>
COEX2_WLAN_ACTIVE<41,48>
D D
PCIE_PTX_WPANRX_N5<18>
PCIE_PTX_WPANRX_P5<18>
C C
MINI3CLK_REQ#<18>
CLK_PCIE_MINI3#<18>
CLK_PCIE_MINI3<18>
PCLK_80H<18>
PCIE_PRX_WPANTX_N5<18>
PCIE_PRX_WPANTX_P5<18>
C636 0.1U_0402_10V7K~DC636 0.1U_0402_10V7K~D
1 2
C626 0.1U_0402_10V7K~DC626 0.1U_0402_10V7K~D
1 2
1 2
R724 0_0402_5%~DR724 0_0402_5%~D
MINI3CLK_REQ#
CLK_PCIE_MINI3
PCH_PLTRST#_EC
PCLK_80H
PCIE_PRX_WPANTX_N5
PCIE_PRX_WPANTX_P5
PCIE_PTX_WPANRX_N5_C
PCIE_PTX_WPANRX_P5_C
+1.5V_RUN
1
2
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
C625
C625
+3.3V_PCIE_FLASH
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
1
C635
C635
2
LCN_DAN08-52526-0100
LCN_DAN08-52526-0100
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
2
112
334
556
778
9910
111112
131314
151516
171718
191920
212122
232324
252526
272728
292930
313132
333334
353536
373738
393940
414142
434344
454546
474748
494950
515152
GND153GND2
LInkCIS
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
@ C639
@
1
C639
2
2
4
6
LPC_LFRAME#
8
LPC_LAD3
10
LPC_LAD2CLK_PCIE_MINI3#
12
LPC_LAD1
14
LPC_LAD0
16
18
20
22
R730 0_0402_5%~DR730 0_0402_5%~D
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
2
1
C634
C634
2
2
C637
C637
C638
C638
C624
C624
1
1
1 2
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
1
2
+1.5V_RUN
LPC_LFRAME# <17,40,46,47>
LPC_LAD3 <17,40,46,47>
LPC_LAD2 <17,40,46,47>
LPC_LAD1 <17,40,46,47>
LPC_LAD0 <17,40,46,47>
C633
C633
PCH_PLTRST#_EC <20,40,41,45,46,47>
+1.5V_RUN
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
C435
C435
C436
C436
1
1
2
SATA_NVR_PRX_DTX_P2
C4470.01U_0402_16V7K~D C4470.01U_0402_16V7K~D
SATA_NVR_PRX_DTX_N2
C4480.01U_0402_16V7K~D C4480.01U_0402_16V7K~D
SATA_NVR_PTX_DRX_N2
C4450.01U_0402_16V7K~D C4450.01U_0402_16V7K~D
SATA_NVR_PTX_DRX_P2
C4460.01U_0402_16V7K~D C4460.01U_0402_16V7K~D
PCIE_PTX_NVRRX_N6_C
C6400.1U_0402_10V7K~D C6400.1U_0402_10V7K~D
12
PCIE_PTX_NVRRX_P6_C
C6410.1U_0402_10V7K~D C6410.1U_0402_10V7K~D
12
+1.5V_RUN
100K_0402_5%~D
100K_0402_5%~D
R785
R785
5
2
12
3
4
PCIE_SATA#
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
Q322B
Q322B
B B
12
R740
R740
61
1 2
1 2
1 2
1 2
MCARD_PCIE_SATA
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
Q322A
Q322A
SATA_NVRAM_PRX_DTX_P2_C<17>
SATA_NVRAM_PRX_DTX_N2_C<17>
SATA_NVRAM_PTX_DRX_N2_C<17>
SATA_NVRAM_PTX_DRX_P2_C<17>
PCIE_PRX_NVRTX_N6<18>
PCIE_PRX_NVRTX_P6<18>
PCIE_PTX_NVRRX_N6<18>
PCIE_PTX_NVRRX_P6<18>
+3.3V_PCIE_NVM
100K_0402_5%~D
100K_0402_5%~D
A A
MCARD_PCIE_SATA#
2
U12
U12
9
VDD
11
13
19
26
28
24
23
22
21
18
17
16
15
2
8
PI2DBS212ZHEX_TQFN28_5P5X3P5~D
PI2DBS212ZHEX_TQFN28_5P5X3P5~D
4
A0+
VDD
5
A0-
VDD
VDD
6
VDD
A1+
7
VDD
A1-
3
SEL
B0+
B0B1+
1
B1-
GND
10
C0+
GND
12
GND
C0-
14
C1+
GND
20
GND
C1-
25
GND
27
NC
GND
29
TPAD
NC
PCIE_SATA_PRX_NVRTX_N6
PCIE_SATA_PRX_NVRTX_P6
PCIE_SATA_PTX_NVRRX_N6
PCIE_SATA_PTX_NVRRX_P6
PCIE_SATA#
NVRCLK_REQ#<18>
CLK_PCIE_NVR#<18>
CLK_PCIE_NVR<18>
NVRCLK_REQ#
CLK_PCIE_NVR#
CLK_PCIE_NVR
PCIE_SATA_PRX_NVRTX_N6
PCIE_SATA_PRX_NVRTX_P6
PCIE_SATA_PTX_NVRRX_N6
PCIE_SATA_PTX_NVRRX_P6
MCARD_PCIE_SATA#<46>
+1.5V_RUN
NVRAMH=5.2
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
33P_0402_50V8J~D
33P_0402_50V8J~D
1
1
C609
C609
C620
C620
2
2
112
334
556
778
9910
111112
131314
151516
171718
191920
212122
232324
252526
272728
292930
313132
333334
353536
373738
393940
414142
434344
454546
474748
494950
515152
GND153GND2
LCN_DAN08-52526-0100
LCN_DAN08-52526-0100
LInkCIS
+3.3V_PCIE_NVM
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
1
C623
C623
2
JMINI4
JMINI4
+3.3V_PCIE_NVM+3.3V_PCIE_NVM
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
33P_0402_50V8J~D
33P_0402_50V8J~D
1
1
C621
C621
C618
C618
2
2
R713 0_0402_5%~DR713 0_0402_5%~D
33P_0402_50V8J~D
33P_0402_50V8J~D
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
1
1
C622
C622
2
2
+1.5V_RUN
1
C617
C617
2
1 2
330U_V_6.3VM~D
330U_V_6.3VM~D
@
@
C619
C619
+
+
PCH_PLTRST#_EC <20,40,41,45,46,47>
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
Mini Card-2/2
Mini Card-2/2
Mini Card-2/2
LA-7933
LA-7933
LA-7933
42 65Monday, November 07, 2011
42 65Monday, November 07, 2011
42 65Monday, November 07, 2011
1
0.2
0.2
0.2
of
of
of
Page 43
5
D D
4
3
2
1
PowerControlforMinicard1 PowerControlforMinicard2
+PWR_SRC_S
+3.3V_ALW
100K_0402_5%~D
100K_0402_5%~D
12
R715
R715
AUX_EN_WOWL#
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
61
Q310A
Q310A
C C
AUX_EN_WOWL<46>
100K_0402_5%~D
100K_0402_5%~D
12
R717
R717
2
5
+3.3V_ALW
100K_0402_5%~D
100K_0402_5%~D
R720
R720
12
+AUX_EN
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
Q310B
Q310B
4
Q38
Q38
SI3456DDV-T1-GE3_TSOP6~D
SI3456DDV-T1-GE3_TSOP6~D
D
D
6
S
S
45
2
1
G
G
3
1M_0402_5%~D
1M_0402_5%~D
4700P_0402_25V7K~D
4700P_0402_25V7K~D
12
R1620
R1620
1
C632
C632
2
+3.3V_WLAN
20K_0402_5%~D
20K_0402_5%~D
12
+3.3V_ALW
100K_0402_5%~D
100K_0402_5%~D
12
R721
2
100K_0402_5%~D
100K_0402_5%~D
12
R727
R727
R721
MCARD_WWAN_PWREN#
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
61
Q311A
Q311A
R716
R716
MCARD_WWAN_PWREN<46>
+PWR_SRC_S
100K_0402_5%~D
100K_0402_5%~D
12
3
5
4
R722
R722
+WWAN_PWREN
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
Q311B
Q311B
SI3456DDV-T1-GE3_TSOP6~D
SI3456DDV-T1-GE3_TSOP6~D
D
D
6
2
1
G
G
1M_0402_5%~D
1M_0402_5%~D
12
R1625
R1625
Q40
Q40
S
S
45
3
4700P_0402_25V7K~D
4700P_0402_25V7K~D
1
C644
C644
2
+3.3V_PCIE_WWAN+3.3V_ALW
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
Q73
Q73
1K_0402_1%~D
1K_0402_1%~D
12
R723
R723
13
D
D
G
G
S
S
2
MCARD_WWAN_PWREN#
PowerControlforMinicard3 PowerControlforMinicard4
+PWR_SRC_S
+3.3V_ALW
100K_0402_5%~D
100K_0402_5%~D
12
R735
61
2
100K_0402_5%~D
100K_0402_5%~D
R733
R733
R735
MCARD_MISC_PWREN#
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
Q312A
Q312A
5
B B
MCARD_MISC_PWREN<46> NVRAM_PWR_EN<46>
12
+3.3V_ALW
100K_0402_5%~D
100K_0402_5%~D
12
R731
R731
+MISC_PWREN
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
Q312B
Q312B
4
Q44
Q44
SI3456DDV-T1-GE3_TSOP6~D
SI3456DDV-T1-GE3_TSOP6~D
D
D
6
S
S
45
2
1
G
G
3
1M_0402_5%~D
1M_0402_5%~D
4700P_0402_25V7K~D
4700P_0402_25V7K~D
12
R1628
R1628
1
C651
C651
2
+3.3V_PCIE_FLASH
20K_0402_5%~D
20K_0402_5%~D
12
R732
R732
+3.3V_ALW
12
61
2
100K_0402_5%~D
100K_0402_5%~D
12
@
@
R739
R739
100K_0402_5%~D
100K_0402_5%~D
R738
R738
NVRAM_PWR_EN#
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
Q313A
Q313A
+PWR_SRC_S
100K_0402_5%~D
100K_0402_5%~D
12
3
5
4
+3.3V_ALW
R737
R737
+NVRAM_PWREN
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
Q313B
Q313B
Q46
Q46
SI3456DDV-T1-GE3_TSOP6~D
SI3456DDV-T1-GE3_TSOP6~D
D
D
6
S
S
45
2
1
G
G
3
4700P_0402_25V7K~D
4700P_0402_25V7K~D
1M_0402_5%~D
1M_0402_5%~D
1
12
R1629
R1629
C652
C652
2
+3.3V_PCIE_NVM
20K_0402_5%~D
20K_0402_5%~D
12
R734
R734
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
Mini Card PWR
Mini Card PWR
Mini Card PWR
LA-7933
LA-7933
LA-7933
43 65Monday, November 07, 2011
43 65Monday, November 07, 2011
43 65Monday, November 07, 2011
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EMI request add 33ohm for DOCK DVI signals.
JDOCK1
CONN@JDOCK1
CONN@
1
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105
107
109
111
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115
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133
135
137
139
141
143
GND1
PWR1
PWR1
PWR1
Shield_G
Shield_G
Shield_G
Shield_G
Shield_G
Shield_G
JAE_WD2F144WB5R400
JAE_WD2F144WB5R400
PWR2
PWR2
PWR2
GND2
Shield_G
Shield_G
Shield_G
Shield_G
Shield_G
Shield_G
2
2
4
4
6
6
8
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136
138
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144
10
12
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124
126
128
130
132
134
136
138
140
142
144
149
150
151
152
159
160
161
162
163
164
DPC_DOCK_LANE_P0_R
DPC_DOCK_LANE_N0_R
DPC_DOCK_LANE_P1_R
DPC_DOCK_LANE_N1_R
DPC_DOCK_LANE_P2_R
DPC_DOCK_LANE_N2_R
DPC_DOCK_LANE_P3_R
DPC_DOCK_LANE_N3_R
DPC_DOCK_SW_AUX
DPC_DOCK_SW_AUX#
MXM_DPB_HPD
SATA_PRX_DKTX_P5
SATA_PRX_DKTX_N5
SATA_PTX_DKRX_P5
SATA_PTX_DKRX_N5
DOCK_DET_R#
0.1U_0603_50V7K~D
0.1U_0603_50V7K~D
C703
C703
1
2
DOCK_AC_OFF <46,61>
DOCK_LOM_SPD100LED_ORG# <36>
DPC_CA_DET <32>DPD_CA_DET<33>
R2172 0_0402_5%~DR2172 0_0402_5%~D
1 2
R2173 0_0402_5%~DR2173 0_0402_5%~D
1 2
R2174 0_0402_5%~DR2174 0_0402_5%~D
1 2
R2175 0_0402_5%~DR2175 0_0402_5%~D
1 2
R2176 0_0402_5%~DR2176 0_0402_5%~D
1 2
R2177 0_0402_5%~DR2177 0_0402_5%~D
1 2
R2178 0_0402_5%~DR2178 0_0402_5%~D
1 2
R2179 0_0402_5%~DR2179 0_0402_5%~D
1 2
DPC_DOCK_SW_AUX <32>
DPC_DOCK_SW_AUX# <32>
ACAV_DOCK_SRC# <61>
DAT_DDC2_DOCK <31>
CLK_DDC2_DOCK <31>
C697 0.01U_0402_16V7K~DC697 0.01U_0402_16V7K~D
12
C698 0.01U_0402_16V7K~DC698 0.01U_0402_16V7K~D
12
C699 0.01U_0402_16V7K~DC699 0.01U_0402_16V7K~D
1 2
C700 0.01U_0402_16V7K~DC700 0.01U_0402_16V7K~D
1 2
USBP8+ <20>
USBP8- <20>
USBP3+ <20>
USBP3- <20>
CLK_KBD <47>
DAT_KBD <47>
USB3RN4 <20>
USB3RP4 <20>
USB3TN4 <20>
USB3TP4 <20>
BREATH_LED# <46,49>
DOCK_LOM_ACTLED_YEL# <36>
DOCK_LOM_TRD0+ <36>
DOCK_LOM_TRD0- <36>
DOCK_LOM_TRD1+ <36>
DOCK_LOM_TRD1- <36>
+LOM_VCT
DOCK_LOM_TRD2+ <36>
DOCK_LOM_TRD2- <36>
DOCK_LOM_TRD3+ <36>
DOCK_LOM_TRD3- <36>
DOCK_DCIN_IS+ <60>
DOCK_DCIN_IS- <60>
DOCK_POR_RST# <47>
+DOCK_PWR_BAR
RB751S40T1_SOD523-2~D
RB751S40T1_SOD523-2~D
DPC_DOCK_LANE_C_P0
DPC_DOCK_LANE_C_N0
DPC_DOCK_LANE_C_P1
DPC_DOCK_LANE_C_N1
DPC_DOCK_LANE_C_P2
DPC_DOCK_LANE_C_N2
DPC_DOCK_LANE_C_P3
DPC_DOCK_LANE_C_N3
SATA_PRX_DKTX_P5_C <17>
SATA_PRX_DKTX_N5_C <17>
SATA_PTX_DKRX_P5_C <17>
SATA_PTX_DKRX_N5_C <17>
+LOM_VCT
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
@
@
1
C701
C701
2
D32
D32
21
C4310.1U_0402_10V7K~D C4310.1U_0402_10V7K~D
0.033U_0402_16V7K~D
0.033U_0402_16V7K~D
C696
C696
1
2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
C4380.1U_0402_10V7K~D C4380.1U_0402_10V7K~D
C4390.1U_0402_10V7K~D C4390.1U_0402_10V7K~D
C4400.1U_0402_10V7K~D C4400.1U_0402_10V7K~D
C4410.1U_0402_10V7K~D C4410.1U_0402_10V7K~D
C4420.1U_0402_10V7K~D C4420.1U_0402_10V7K~D
C4430.1U_0402_10V7K~D C4430.1U_0402_10V7K~D
C4440.1U_0402_10V7K~D C4440.1U_0402_10V7K~D
MXM_DPB_P0 <16>
MXM_DPB_N0 <16>
MXM_DPB_P1 <16>
MXM_DPB_N1 <16>
MXM_DPB_P2 <16>
MXM_DPB_N2 <16>
MXM_DPB_P3 <16>
MXM_DPB_N3 <16>
ClosetoDOCK
ItsforEnhanceESDondockissue.
MXM_DPB_HPD
100K_0402_5%~D
100K_0402_5%~D
12
R2160
R2160
audionottransfertoDPdisplayif
playmoviewhenattachedexternalDPdisplay
+3.3V_ALW
DOCK_DET#
12
R755100K_0402_5%~D R755100K_0402_5%~D
DPD_DOCK_LANE_P0_R
DPD_DOCK_LANE_N0_R
DPD_DOCK_LANE_P1_R
DPD_DOCK_LANE_N1_R
DPD_DOCK_LANE_P2_R
DPD_DOCK_LANE_N2_R
DPD_DOCK_LANE_P3_R
DPD_DOCK_LANE_N3_R
DPD_DOCK_AUX
DPD_DOCK_AUX#
0.1U_0603_50V7K~D
0.1U_0603_50V7K~D
4.7U_0805_25V6K~D
4.7U_0805_25V6K~D
@
@
1
CE6
CE6
2
DOCK_DET_1
BLUE_DOCK
RED_DOCK
GREEN_DOCK
3
C702
C702
PESD24VS2UT_SOT23-3~D
PESD24VS2UT_SOT23-3~D
2
@
@
D33
D33
1
DOCK_LOM_SPD10LED_GRN#<36>
C366 0.1U_0402_10V7K~DC366 0.1U_0402_10V7K~D
DPD_GPU_LANE_P0<33>
DPD_GPU_LANE_N0<33>
D D
DPD_GPU_LANE_P1<33>
DPD_GPU_LANE_N1<33>
DPD_GPU_LANE_P2<33>
DPD_GPU_LANE_N2<33>
DPD_GPU_LANE_P3<33>
DPD_GPU_LANE_N3<33>
12
C367 0.1U_0402_10V7K~DC367 0.1U_0402_10V7K~D
12
C368 0.1U_0402_10V7K~DC368 0.1U_0402_10V7K~D
12
C369 0.1U_0402_10V7K~DC369 0.1U_0402_10V7K~D
12
C424 0.1U_0402_10V7K~DC424 0.1U_0402_10V7K~D
12
C425 0.1U_0402_10V7K~DC425 0.1U_0402_10V7K~D
12
C426 0.1U_0402_10V7K~DC426 0.1U_0402_10V7K~D
12
C427 0.1U_0402_10V7K~DC427 0.1U_0402_10V7K~D
12
DPD_GPU_HPD<33> MXM_DPB_HPD <16>
DPD_DOCK_LANE_P0
DPD_DOCK_LANE_N0
DPD_DOCK_LANE_P1
DPD_DOCK_LANE_N1
DPD_DOCK_LANE_P2
DPD_DOCK_LANE_N2
DPD_DOCK_LANE_P3
DPD_DOCK_LANE_N3
ClosetoDOCK
ItsforEnhanceESDondockissue.
DPD_GPU_HPD
100K_0402_5%~D
100K_0402_5%~D
12
R757
C C
B B
R757
R2164 0_0402_5%~DR2164 0_0402_5%~D
1 2
R2165 0_0402_5%~DR2165 0_0402_5%~D
1 2
R2166 0_0402_5%~DR2166 0_0402_5%~D
1 2
R2167 0_0402_5%~DR2167 0_0402_5%~D
1 2
R2168 0_0402_5%~DR2168 0_0402_5%~D
1 2
R2169 0_0402_5%~DR2169 0_0402_5%~D
1 2
R2170 0_0402_5%~DR2170 0_0402_5%~D
1 2
R2171 0_0402_5%~DR2171 0_0402_5%~D
1 2
DPD_DOCK_AUX<33>
DPD_DOCK_AUX#<33>
0.033U_0402_16V7K~D
0.033U_0402_16V7K~D
1
C695
C695
2
SLICE_BAT_PRES#<46,51,61> DOCK_DET# <46>
+DOCK_PWR_BAR
DPD_GPU_HPD
+NBDOCK_DC_IN_SS
BLUE_DOCK<31>
RED_DOCK<31>
GREEN_DOCK<31>
HSYNC_DOCK<31>
VSYNC_DOCK<31>
CLK_MSE<47>
DAT_MSE<47>
DAI_BCLK#<45>
DAI_LRCK#<45>
DAI_DI<45>
DAI_DO#<45>
DAI_12MHZ#<45>
D_LAD0<46>
D_LAD1<46>
D_LAD2<46>
D_LAD3<46>
D_LFRAME#<46>
D_CLKRUN#<46>
D_SERIRQ<46>
D_DLDRQ1#<46>
CLK_PCI_DOCK<20>
DOCK_SMB_CLK<47>
DOCK_SMB_DAT<47>
DOCK_SMB_ALERT#<46,51>
DOCK_PSID<51>
DOCK_PWR_BTN#<47>
1
2
ESDrequestreserveit.
1
3
5
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145
146
147
148
153
154
155
156
157
158
LinkCISOK
DAI_12MHZ# DAI_BCLK#
12
RE11
@RE11
@
10_0402_1%~D
10_0402_1%~D
1
CE8
@CE8
@
4.7P_0402_50V8C~D
4.7P_0402_50V8C~D
2
A A
12
RE12
@RE12
@
10_0402_1%~D
10_0402_1%~D
1
CE9
@CE9
@
4.7P_0402_50V8C~D
4.7P_0402_50V8C~D
2
CLK_PCI_DOCK
12
R756
R756
33_0402_5%~D
33_0402_5%~D
1
C704
C704
12P_0402_50V8J~D
12P_0402_50V8J~D
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
Docking
Docking
Docking
LA-7933
LA-7933
LA-7933
44 65Friday, November 11, 2011
44 65Friday, November 11, 2011
44 65Friday, November 11, 2011
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D D
PCH_AZ_CODEC_BITCLK<17>
PCH_AZ_CODEC_SDIN0<17>
PCH_AZ_CODEC_SDOUT<17>
PCH_AZ_CODEC_SYNC<17>
PCH_AZ_CODEC_RST#<17>
DAI_12MHZ#<44>
DAI_DI<44>
DAI_DO#<44>
DAI_BCLK#<44>
DAI_LRCK#<44>
EN_I2S_NB_CODEC#<46>
DMIC_CLK<28>
DMIC0<28>
DOCK_HP_DET<46>
DOCK_MIC_DET<46>
AUD_HP_NB_SENSE<46>
AUD_NB_MUTE#<46>
BEEP<47>
SPKR<17>
USB_OC1#<20>
USB_OC3#<17,20>
USBP2-<20>
USBP2+<20>
USBP6-<20>
C C
B B
USBP6+<20>
USB_SIDE_EN#<39,46>
LID_CL#<46,49>
VOL_UP<47>
VOL_DOWN<47>
VOL_MUTE<47>
+5V_ALW
+PWR_SRC
+5V_RUN
+5V_ALW +3.3V_RUN +3.3V_ALW +1.5V_RUN +3.3V_SUS+5V_RUN
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
C763
C763
2
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
C721
C721
2
JIO1
JIO1
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
21
23
23
25
25
27
27
29
29
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31
33
33
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47
49
49
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79
81
81
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83
85
85
87
87
89
89
91
91
93
93
95
95
97
97
99
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
GND
FOX_QTS01401-A021-9H
FOX_QTS01401-A021-9H
CONN@
CONN@
LInkCIS
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
C722
C722
2
GND
2
2
4
4
6
6
8
8
10
10
12
12
14
14
16
16
18
18
20
20
22
22
24
24
26
26
28
28
30
30
32
32
34
34
36
36
38
38
40
40
42
42
44
44
46
46
48
48
50
50
52
52
54
54
56
56
58
58
60
60
62
62
64
64
66
66
68
68
70
70
72
72
74
74
76
76
78
78
80
80
82
82
84
84
86
86
88
88
90
90
92
92
94
94
96
96
98
98
100
100
102
102
104
104
106
106
108
108
110
110
112
112
114
114
116
116
118
118
120
120
122
122
124
124
126
126
128
128
130
130
132
132
134
134
136
136
138
138
140
140
142
+3.3V_ALW
PLTRST_MMI# <20>
PCIE_PRX_MMITX_P8 <18>
PCIE_PRX_MMITX_N8 <18>
PCIE_PTX_MMIRX_P8 <18>
PCIE_PTX_MMIRX_N8 <18>
CLK_PCIE_CARD# <18>
CLK_PCIE_CARD <18>
CARDCLK_REQ# <18>
SIO_SLP_S3# <11,19,34,46,50,54>
RUN_ON <34,46,50,54>
PCH_PLTRST#_EC <20,40,41,42,46,47>
USBP10- <20>
USBP10+ <20>
CARD_SMBCLK <47>
CARD_SMBDAT <47>
PCIE_WAKE# <16,41,42,47>
EXPCLK_REQ# <18>
CLK_PCIE_EXP# <18>
CLK_PCIE_EXP <18>
PCIE_PRX_EXPTX_N3 <18>
PCIE_PRX_EXPTX_P3 <18>
PCIE_PTX_EXPRX_N3 <18>
PCIE_PTX_EXPRX_P3 <18>
+1.5V_RUN
+3.3V_SUS
SATA_SIDE_LED <49>
NUM_LED <49>
BT_LED <49>
WLAN_LED <49>
SATA_LED <49>
BREATH_LED#_Q <49>
VOL_MUTE_LED <49>
BAT2_LED# <46>
BAT1_LED# <46>
MASK_BASE_LEDS# <49>
DAT_TP_SIO <47>
CLK_TP_SIO <47>
PS2_DAT_TS <48>
PS2_CLK_TS <48>
+3.3V_RUN
WireLessON/OFFCONN
WIRELESS_ON#/OFF<46>
PowerButtonCONN
POWER_SW#_MB
+5V_ALW
BREATH_WHITE_LED<49>
PCBfootprintpindefineswapneedtousecable
tomeetnewconnector
JWL1
JWL1
1
1
2
2
3
3
4
GND
5
GND
ACES_50228-0037N-001
ACES_50228-0037N-001
CONN@
CONN@
LInkCIS
JPB1
1
1
2
2
3
3
4
4
5
5
6
6
7
GND
8
GND
ACES_50228-0067N-001
ACES_50228-0067N-001
LinkCISOK
CONN@JPB1
CONN@
PowerSwitchfordebug
+PWR_SRC
0.1U_0603_50V7K~D
0.1U_0603_50V7K~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
1
C723
C723
2
2
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
C724
C724
1
1
2
C725
C725
C260
C260
2
POWER_SW#_MB<47>
100P_0402_50V8J~D
100P_0402_50V8J~D
@C759
@
1
C759
2
@SHORT PADS~D
@SHORT PADS~D
112
PWRSW1
@PWRSW1
@
2
PlaceonBottom
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
3
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
I/O board
I/O board
I/O board
LA-7933
LA-7933
LA-7933
1
45 65Monday, November 07, 2011
45 65Monday, November 07, 2011
45 65Monday, November 07, 2011
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of
of
Page 46
5
+3.3V_ALW
1 2
R798 100K_0402_5%~DR798 100K_0402_5%~D
1 2
R761 100K_0402_5%~DR761 100K_0402_5%~D
1 2
R765 100K_0402_5%~DR765 100K_0402_5%~D
1 2
R760 100K_0402_5%~DR760 100K_0402_5%~D
1 2
R774 100K_0402_5%~DR774 100K_0402_5%~D
1 2
D D
C C
R776 100K_0402_5%~DR776 100K_0402_5%~D
1 2
R768 10K_0402_5%~DR768 10K_0402_5%~D
1 2
R769 100K_0402_5%~DR769 100K_0402_5%~D
1 2
R778 100K_0402_5%~DR778 100K_0402_5%~D
1 2
R763 10K_0402_5%~DR763 10K_0402_5%~D
1 2
R779 100K_0402_5%~DR779 100K_0402_5%~D
1 2
R2158 100K_0402_5%~DR2158 100K_0402_5%~D
For AOAC work correct.
+3.3V_RUN
1 2
R457 100K_0402_5%~DR457 100K_0402_5%~D
1 2
R766 100K_0402_5%~D@R766 100K_0402_5%~D@
1 2
R772 10K_0402_5%~D@ R772 10K_0402_5%~D@
1 2
R787 100K_0402_5%~DR787 100K_0402_5%~D
1 2
R788 100K_0402_5%~DR788 100K_0402_5%~D
R777 100K_0402_5%~DR777 100K_0402_5%~D
R780 100K_0402_5%~DR780 100K_0402_5%~D
R782 100K_0402_5%~DR782 100K_0402_5%~D
MonitorChargercurrent
+3.3V_ALW
1 2
R35 10K_0402_5%~DR35 10K_0402_5%~D
B B
+3.3V_ALW
100K_0402_5%~D
100K_0402_5%~D
12
100K_0402_5%~D
100K_0402_5%~D
12
HW_GPS_DISABLE2#
PROCHOT_GATE
SLICE_BAT_PRES#
WWAN_RADIO_DIS#
USB_PWR_SHR_EN#
USB_SIDE_EN#
ESATA_USB_PWR_EN#
USB_PWR_SHR_VBUS_EN
DOCK_SMB_ALERT#
eDP_DET#
WIRELESS_ON#/OFF
WIRELESS_ON#/OFF
SP_TPM_LPC_EN
GPU_PWR_LEVEL
DGPU_ALERT#
D_CLKRUN#
12
12
12
DYN_TURB_SYS_PWR_ALRT#
@R800
@
R800
VGA_ID
R803
R803
CPU_DETECT#
D_SERIRQ
D_DLDRQ1#
CRT_SWITCH<31>
DDR_1.5V_CNTRL0<53>
MCARD_MISC_PWREN<43>
PROCHOT_GATE<60>
DOCK_SMB_ALERT#<44,51>
TOUCH_SCREEN_PD#<28>
GPU_PWR_LEVEL<16>
USB_SIDE_EN#<39,45>
EN_I2S_NB_CODEC#<45>
USH_PWR_STATE#<40>
EN_DOCK_PWR_BAR<61>
PANEL_BKEN_EC<28>
ENVDD_PCH<19,28>
LCD_TST<28,30>
PSID_DISABLE#<51>
PBAT_PRES#<51>
DOCKED<33,36>
DOCK_DET#<44>
AUD_NB_MUTE#<45>
MCARD_WWAN_PWREN<43>
LCD_VCC_TEST_EN<28>
CCD_OFF<28>
AUD_HP_NB_SENSE<45>
ESATA_USB_PWR_EN#<38>
NVRAM_PWR_EN<43>
SLICE_BAT_ON<61>
SLICE_BAT_PRES#<44,51,61>
1.5V_RUN_PWRGD<54>
DDR_1.5V_CNTRL1<53>
VOL_MUTE_LED#<49>
USB_PWR_SHR_EN#<39>
NUM_LED#<49>
MCARD_PCIE_SATA#<42>
CPU_DETECT#<7>
DGPU_PWR_EN<16>
DGPU_ALERT#<16>
MXM_DP_HDMI_HPD<16>
ZODD_WAKE#<35>
BCM5882_ALERT#<40>
SUSACK#<19>
EDID_SELECT#<31>
DGPU_PWROK<16,21>
RUN_GFX_ON<18,50>
SLP_ME_CSW_DEV#<17,21>
LAN_DISABLE#_R<36>
SYS_LED_MASK#<49>
SIO_EXT_WAKE#<21>
WIRELESS_LED#<41,49>
USB_PWR_SHR_VBUS_EN<39>
WLAN_RADIO_DIS#<41>
WIRELESS_ON#/OFF<45>
BT_RADIO_DIS#<48>
WWAN_RADIO_DIS#<41>
SYS_PWROK<7,19>
DGPU_SELECT#<27,28,31>
eDP_DET#<30>
CPU_VTT_ON<56>
PCH_DPWROK<19>
VGA_ID0
Discrete
UMA 1
A A
0
5
ME_FWPPCHhasinternal20KPD.
(suspendpowerrail)
ME_FWP
1K_0402_1%~D
1K_0402_1%~D
12
@R793
@
R793
4
CRT_SWITCH
DDR_1.5V_CNTRL0
MCARD_MISC_PWREN
PROCHOT_GATE
LID_CL_SIO#
DOCK_SMB_ALERT#
TOUCH_SCREEN_PD#
GPU_PWR_LEVEL
USB_SIDE_EN#
EN_I2S_NB_CODEC#
USH_PWR_STATE#
EN_DOCK_PWR_BAR
PANEL_BKEN_EC
ENVDD_PCH
LCD_TST
PSID_DISABLE#
PBAT_PRES#
DOCKED
DOCK_DET#
AUD_NB_MUTE#
MCARD_WWAN_PWREN
LCD_VCC_TEST_EN
CCD_OFF
AUD_HP_NB_SENSE
ESATA_USB_PWR_EN#
NVRAM_PWR_EN
SLICE_BAT_ON
SLICE_BAT_PRES#
1.5V_RUN_PWRGD
DDR_1.5V_CNTRL1
VOL_MUTE_LED#
USB_PWR_SHR_EN#
NUM_LED#
MCARD_PCIE_SATA#
CPU_DETECT#
DGPU_PWR_EN
DGPU_ALERT#
MXM_DP_HDMI_HPD
ZODD_WAKE#
BCM5882_ALERT#
SUSACK#
EDID_SELECT#
DGPU_PWROK
VGA_ID
RUN_GFX_ON
SLP_ME_CSW_DEV#
LAN_DISABLE#_R
AUX_MODE_EN
SYS_LED_MASK#
DYN_TURB_SYS_PWR_ALRT#
R797 0_0402_5%~DR797 0_0402_5%~D
1 2
WIRELESS_LED#
USB_PWR_SHR_VBUS_EN
WLAN_RADIO_DIS#
WIRELESS_ON#/OFF
BT_RADIO_DIS#
WWAN_RADIO_DIS#
SYS_PWROK
DGPU_SELECT#
eDP_DET#
CPU_VTT_ON
1 2
R802 0_0402_5%~D@R802 0_0402_5%~D@
CLK_SIO_14M
4
U46
U46
B52
A49
B53
A50
B54
A51
B55
A52
A33
B36
A34
B37
A35
B38
A36
A37
B40
A38
B41
A39
B42
A40
B43
A41
B44
B32
A31
B33
B15
A15
B16
A16
A1
B2
A2
B3
A3
B45
A42
B4
A59
B62
A58
B61
A56
B59
A55
B58
B47
A45
B48
A46
B49
A47
B50
A48
B13
A13
A53
B57
B14
A14
B17
B18
10_0402_1%~D
10_0402_1%~D
12
@R794
@
R794
4.7P_0402_50V8C~D
4.7P_0402_50V8C~D
@C712
@
1
C712
2
GPIOA0
GPIOA1
GPIOA2
GPIOA3
GPIOA4
GPIOA5
GPIOA6
GPIOA7
GPIOB0
GPIOB1
GPOC2
GPOC3
GPOC4
GPOC5
GPOC6/TACH4
GPIOC7
GPIOD0
GPIOC1
GPIOC0
GPIOB7
GPIOB6
GPIOB5
GPIOB4
GPIOB3
GPIOB2
GPIOD1
GPIOD2
GPIOD3
GPIOD4
GPIOD5
GPIOD6
GPIOD7
GPIOE0/RXD
GPIOE1/TXD
GPIOE2/RTS#
GPIOE3/DSR#
GPIOE4/CTS#
GPIOE5/DTR#
GPIOE6/RI#
GPIOE7/DCD#
GPIOF0
GPIOF1
GPIOF2
GPIOF3/TACH8
GPIOF4/TACH7
GPIOF5
GPIOF6
GPIOF7
GPIOG0/TACH5
GPIOG1
GPIOG2
GPIOG3
GPIOG4
GPIOG5
GPIOG6
GPIOG7/TACH6
GPIOH0
GPIOH1
SYSOPT1/GPIOH2
SYSOPT0/GPIOH3
GPIOH4
GPIOH5
GPIOH6
GPIOH7
CLK_PCI_5048
10_0402_1%~D
10_0402_1%~D
12
@R795
@
R795
4.7P_0402_50V8C~D
4.7P_0402_50V8C~D
@C713
@
1
C713
2
3
+3.3V_ALW_U46
1
2
B5
A17
B30
A43
A54
VCC1
VCC1
VCC1
VCC1
VCC1
14.318MHZ/GPIOM0
ECE5048-LZY_DQFN132_11X11~D
ECE5048-LZY_DQFN132_11X11~D
+3.3V_ALW
100K_0402_5%~D
100K_0402_5%~D
12
R805
R805
LID_CL_SIO#
R807 10_0402_1%~DR807 10_0402_1%~D
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
C716
C716
1
2
3
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C710
C710
2
GPIOI1
GPIOI2/TACH0
GPIOI3
GPIOI4
GPIOI5
GPIOI6
GPIOI7
GPIOJ0
GPIOJ1/TACH1
GPIOJ2/TACH2
GPIOJ3
GPIOJ4
GPIOJ5
GPIOJ6
GPIOJ7
GPIOK0
GPIOK1/TACH3
GPIOK2
GPIOK3
GPIOK4
GPIOK5
GPIOK6
GPIOK7
GPIOL0/PWM7
GPIOL1/PWM8
GPIOL2/PWM0
GPIOL3/PWM1
GPIOL4/PWM3
GPIOL5/PWM2
GPIOL6
GPIOL7/PWM5
GPIOM1
GPIOM3/PWM4
GPIOM4/PWM6
LAD0
LAD1
LAD2
LAD3
LFRAME#
LRESET#
PCICLK
CLKRUN#
LDRQ0#
LDRQ1#
SER_IRQ
CLK32/GPIOM2
DLAD0
DLAD1
DLAD2
DLAD3
DLFRAME#
DCLKRUN#
DLDRQ1#
DSER_IRQ
BC_INT#
BC_DAT
BC_CLK
PWRGD
OUT65
TEST_PIN
CAP_LDO
DB Version 0.4
DB Version 0.4
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
C708
C708
C717
C709
C709
VSS
EP
C717
1
1
1
2
2
2
SIO_SLP_A#
B63
0.75V_DDR_VTT_ON
A60
SIO_SLP_S4#
A61
SIO_SLP_S3#
B65
IMVP_PWRGD
A62
R771 0_0402_5%~DR771 0_0402_5%~D
B66
1 2
A63
AUX_EN_WOWL
B67
WLAN_LAN_DISB#
A64
SIO_SLP_LAN#
A5
SIO_SLP_SUS#
B6
GPIO_PSID_SELECTMCARD_PCIE_SATA#
A6
MODC_EN
B7
DOCK_HP_DET
A7
DOCK_MIC_DET
B8
ME_FWP
A8
MASK_SATA_LED#
B9
1.8V_RUN_PWRGD
B10
LED_SATA_DIAG_OUT#
A10
TEMP_ALERT#_R
B11
RUN_ON
A11
B12
A12
SUS_ON
B60
A57
BAT1_LED#
B64
B68
BAT2_LED#
A9
B1
USH_PWR_ON
A18
A44
HW_GPS_DISABLE2#
B34
BREATH_LED#
B39
B51
LPC_LAD0
A27
LPC_LAD1
A26
LPC_LAD2
B26
LPC_LAD3
B25
LPC_LFRAME#
A21
PCH_PLTRST#_EC
B22
CLK_PCI_5048
A28
CLKRUN#
B20
A23
LPC_LDRQ1#
A22
IRQ_SERIRQ
B21
CLK_SIO_14M
A32
EC_32KHZ_ECE5048
B35
D_LAD0
B29
D_LAD1
B28
D_LAD2
A25
D_LAD3
A24
D_LFRAME#
B23
D_CLKRUN#
A19
D_DLDRQ1#
B24
D_SERIRQ
A20
BC_INT#_ECE5048
A29
BC_DAT_ECE5048
B31
BC_CLK_ECE5048
A30
RUNPWROK
A4
SP_TPM_LPC_EN
B56
B19
1 2
R804 1K_0402_1%~DR804 1K_0402_1%~D
+CAP_LDO
B46
B27
C1
+CAP_LDOtracewidth20mils
12
LID_CL# <45,49>
1
2
C718
C718
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
PJP29
PJP29
PAD-OPEN1x1m
PAD-OPEN1x1m
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
2
C714
C714
12
C719
C719
ME_FWP <17>
MASK_SATA_LED# <49>
1.8V_RUN_PWRGD <54>
LED_SATA_DIAG_OUT# <49>
RUN_ON <34,45,50,54>
LED_WLAN_WWAN_DIAG_OUT# <49>
SPI_WP#_SEL <17>
SUS_ON <50>
BAT1_LED# <45>
BAT2_LED# <45>
HW_GPS_DISABLE2# <41>
BREATH_LED# <44,49>
LPC_LAD0 <17,40,42,47>
LPC_LAD1 <17,40,42,47>
LPC_LAD2 <17,40,42,47>
LPC_LAD3 <17,40,42,47>
LPC_LFRAME# <17,40,42,47>
PCH_PLTRST#_EC <20,40,41,42,45,47>
CLK_PCI_5048 <20>
CLKRUN# <19,40,47>
LPC_LDRQ1# <17>
IRQ_SERIRQ <17,40,47>
CLK_SIO_14M <18>
EC_32KHZ_ECE5048 <47>
D_LAD0 <44>
D_LAD1 <44>
D_LAD2 <44>
D_LAD3 <44>
D_LFRAME# <44>
D_CLKRUN# <44>
D_DLDRQ1# <44>
D_SERIRQ <44>
BC_INT#_ECE5048 <47>
BC_DAT_ECE5048 <47>
BC_CLK_ECE5048 <47>
RUNPWROK <7,47>
SP_TPM_LPC_EN <40>
2
+3.3V_ALW
SIO_SLP_A# <19,50,55>
0.75V_DDR_VTT_ON <53>
SIO_SLP_S4# <19,50,53>
SIO_SLP_S3# <11,19,34,45,50,54>
IMVP_PWRGD <58>
IMVP_VR_ON <58>
DOCK_AC_OFF_EC <61>
AUX_EN_WOWL <43>
WLAN_LAN_DISB# <36>
SIO_SLP_LAN# <19,36>
SIO_SLP_SUS# <19>
GPIO_PSID_SELECT <51>
MODC_EN <35>
DOCK_HP_DET <45>
DOCK_MIC_DET <45>
1 2
R741 0_0402_5%~DR741 0_0402_5%~D
trace width 20 mils
trace width 20 mils
T117PAD~D @T117PAD~D @
ACAV_IN_NB<47,60,61>
DOCK_AC_OFF_EC
2
1
+3.3V_ALW
1
B
2
A
5
P
G
3
RUN_ON
CPU_VTT_ON
0.75V_DDR_VTT_ON
SLICE_BAT_ON
SUS_ON
LCD_TST
SYS_LED_MASK#
DGPU_PWR_EN
AUX_MODE_EN
MXM_DP_HDMI_HPD
USH_PWR_STATE#
TEMP_ALERT# <17,21>
C711
@C711
@
1 2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
4
O
U47
@U47
@
TC7SH08FU_SSOP5~D
TC7SH08FU_SSOP5~D
1 2
1 2
1 2
1 2
1 2
2 1
D34
@D34
@
RB751S40T1_SOD523-2~D
RB751S40T1_SOD523-2~D
R786100K_0402_5%~D R786100K_0402_5%~D
R789100K_0402_5%~D R789100K_0402_5%~D
R790100K_0402_5%~D R790100K_0402_5%~D
R791100K_0402_5%~D R791100K_0402_5%~D
R888100K_0402_5%~D R888100K_0402_5%~D
12
R767100K_0402_5%~D R767100K_0402_5%~D
12
R77510K_0402_5%~D R77510K_0402_5%~D
12
R1582100K_0402_5%~D R1582100K_0402_5%~D
12
R13100K_0402_5%~D R13100K_0402_5%~D
12
R17100K_0402_5%~D R17100K_0402_5%~D
12
R1021M_0402_5%~D R1021M_0402_5%~D
12
33K_0402_5%~D
33K_0402_5%~D
@R770
@
R770
DOCK_AC_OFF <44,61>
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SIO
SIO
SIO
LA-7933
LA-7933
LA-7933
46 65Wednesday, November 09, 2011
46 65Wednesday, November 09, 2011
46 65Wednesday, November 09, 2011
1
0.2
0.2
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of
of
of
Page 47
5
+3.3V_ALW
C720
C720
1 2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
5
1
1 2
1 2
1 2
1 2
1
3
5
7
9
12
12
12
12
12
12
12
12
12
12
Y6
Y6
+3.3V_ALW
12
1
2
3
4
5
MSCLK
6
MSDATA
7
8
HOST_DEB_RX
9
10
B
2
A
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
2
12
49.9_0402_1%~D
49.9_0402_1%~D
R864
R864
P
4
O
G
U50
U50
TC7SH08FU_SSOP5~D
TC7SH08FU_SSOP5~D
3
CLK_KBD
DAT_KBD
CLK_MSE
DAT_MSE
VCI_IN1#
LAT_ON_SW#
VOL_MUTE
VOL_DOWN
VOL_UP
GPU_SMBDAT
GPU_SMBCLK
USH_SMBCLK
USH_SMBDAT
+3.3V_ALW
10K_0402_5%~D
10K_0402_5%~D
12
100_0402_1%~D
100_0402_1%~D
12
C735
C735
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
12
12
R858
R858
R859
R859
1.05V_0.8V_PWROK <17,58>
R824
R824
JTAG_RST#
@
@
R836
R836
MEC_XTAL2
MEC_XTAL1
39P_0402_50V8J~D
39P_0402_50V8J~D
1
C741
C741
Crystal EA.
2
PlacecloselypinB22
DOCK_POR_RST#
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C736
C736
1
2
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
12
12
R861
R861
R860
R860
JTAG_TDI
JTAG_TMS
JTAG_CLK
JTAG_TDO
R853 0_0402_5%~DR853 0_0402_5%~D
R855 0_0402_5%~DR855 0_0402_5%~D
+3.3V_ALW
1 2
1 2
10K_0402_5%~D
10K_0402_5%~D
12
1.05V_VTTPWRGD<56,57>
VCCSAPWROK<57>
D D
C C
B B
A A
+5V_RUN
R845 4.7K_0402_5%~DR845 4.7K_0402_5%~D
R846 4.7K_0402_5%~DR846 4.7K_0402_5%~D
R851 4.7K_0402_5%~DR851 4.7K_0402_5%~D
R852 4.7K_0402_5%~DR852 4.7K_0402_5%~D
+RTC_CELL
R1156 100K_0402_5%~DR1156 100K_0402_5%~D
R870 100K_0402_5%~DR870 100K_0402_5%~D
+3.3V_RUN
R1177 100K_0402_5%~D@ R1177 100K_0402_5%~D@
R1197 100K_0402_5%~D@ R1197 100K_0402_5%~D@
R1118 100K_0402_5%~D@ R1118 100K_0402_5%~D@
R829 4.7K_0402_5%~DR829 4.7K_0402_5%~D
R822 4.7K_0402_5%~DR822 4.7K_0402_5%~D
+3.3V_SUS
R589 2.2K_0402_5%~DR589 2.2K_0402_5%~D
R585 2.2K_0402_5%~DR585 2.2K_0402_5%~D
JTAG_RST#citcuit
closetoU51.B57
1
JTAG1
@SHORT PADS~D
@SHORT PADS~D
CONN@JTAG1
CONN@
2
32KHzClock
MEC_XTAL2_R
32.768KHZ_12.5PF_Q13FC1350000~D
32.768KHZ_12.5PF_Q13FC1350000~D
39P_0402_50V8J~D
39P_0402_50V8J~D
C743
C743
2
1
PlacecloselypinA29
CLK_PCI_MEC
10_0402_1%~D
10_0402_1%~D
12
@R885
@
R885
4.7P_0402_50V8C~D
4.7P_0402_50V8C~D
@C747
@
1
C747
2
5
1
2
R1068 0_0402_5%~DR1068 0_0402_5%~D
JDEG2
JDEG2
2 2
4 4
6 6
8 8
10 10
11
G1
12
G2
13
G3
14
G4
ACES_87153-10411
ACES_87153-10411
CONN@
CONN@
4
+RTC_CELL
100K_0402_5%~D
100K_0402_5%~D
12
R810
R810
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
POWER_SW_IN#<25> DOCK_PWR_SW#<25>
+RTC_CELL
SML1_SMBDATA<18>
SML1_SMBCLK<18>
CLK_TP_SIO<45>
DAT_TP_SIO<45>
CLK_KBD<44>
DAT_KBD<44>
CLK_MSE<44>
DAT_MSE<44>
PBAT_SMBDAT<51>
PBAT_SMBCLK<51>
DOCK_POR_RST#<44>
PCH_ALW_ON<50,51>
BIA_PWM_EC<28>
BC_CLK_ECE5048<46>
BC_DAT_ECE5048<46>
BC_INT#_ECE5048<46>
BC_CLK_EMC4002<25>
BC_DAT_EMC4002<25>
BC_INT#_EMC4002<25>
PCH_PCIE_WAKE#<19>
PCIE_WAKE#<16,41,42,45>
BC_CLK_ECE1117<48>
BC_DAT_ECE1117<48>
BC_INT#_ECE1117<48>
SIO_SLP_S5#<19>
ACAV_IN_NB<46,60,61>
SIO_EXT_SMI#<17,20>
SIO_RCIN#<21>
IRQ_SERIRQ<17,40,46>
PCH_PLTRST#_EC<20,40,41,42,45,46>
CLK_PCI_MEC<20>
LPC_LFRAME#<17,40,42,46>
LPC_LAD0<17,40,42,46>
LPC_LAD1<17,40,42,46>
LPC_LAD2<17,40,42,46>
LPC_LAD3<17,40,42,46>
CLKRUN#<19,40,46>
SIO_EXT_SCI#<21>
EC_32KHZ_ECE5048<46>
100K_0402_5%~D
@R850
100K_0402_5%~D
@
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
12
12
12
R850
R847
R847
R849
R849
R848
R848
HOST_DEBUG_TXHOST_DEB_TX
HOST_DEBUG_RX
SML1_SMBDATA
SML1_SMBCLK
CLK_TP_SIO
DAT_TP_SIO
CLK_KBD
DAT_KBD
CLK_MSE
DAT_MSE
PBAT_SMBDAT
PBAT_SMBCLK
DOCK_POR_RST#
PCH_ALW_ON
BIA_PWM_EC
BC_CLK_ECE5048
BC_DAT_ECE5048
BC_INT#_ECE5048
BC_CLK_EMC4002
BC_DAT_EMC4002
BC_INT#_EMC4002
PCH_PCIE_WAKE#
PCIE_WAKE#
BC_CLK_ECE1117
BC_DAT_ECE1117
BC_INT#_ECE1117
BEEP
BEEP<45>
SIO_SLP_S5#
ACAV_IN_NB
SIO_EXT_SMI#
SIO_RCIN#
LPC_LDRQ#_MEC
IRQ_SERIRQ
PCH_PLTRST#_EC
CLK_PCI_MEC
LPC_LFRAME#
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
CLKRUN#
SIO_EXT_SCI#
1 2
R867 0_0402_5%~DR867 0_0402_5%~D
RESET_OUT#
2
G
G
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
2
1 2
R815 0_0402_5%~DR815 0_0402_5%~D
JTAG_TDI
JTAG_TDO
JTAG_CLK
JTAG_TMS
JTAG_RST#
MEC_XTAL1
MEC_XTAL2
+3.3V_M
100K_0402_5%~D
100K_0402_5%~D
12
R893
R893
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
13
D
D
Q52
Q52
S
S
R875 C744
240K 4700p
*
130K 4700p
62K
33K
8.2K
4.3K
2K
1K
1 2
R811 10K_0402_5%~DR811 10K_0402_5%~D
C757
C757
+RTC_CELL_VBAT
U54
U54
PS/2 INTERFACE
PS/2 INTERFACE
A5
GPIO007/I2C1D_DATA/PS2_CLK0B/I2C3A_DATA
B6
GPIO010/I2C1D_CLK/PS2_DAT0B/I2C3A_CLK
A37
GPIO110/PS2_CLK2/GPTP-IN6
B40
GPIO111/PS2_DAT2/GPTP-OUT6
A38
GPIO112/PS2_CLK1A
B41
GPIO113/PS2_DAT1A
A39
GPIO114/PS2_CLK0A
B42
GPIO115/PS2_DAT0A
B59
GPIO154/I2C1C_DATA/PS2_CLK1B
A56
GPIO155/I2C1C_CLK/PS2_DAT1B
JTAG INTERFACE
JTAG INTERFACE
A51
GPIO145/I2C1K_DATA/JTAG_TDI
B55
GPIO146/I2C1K_CLK/JTAG_TDO
B56
GPIO147/I2C1J_DATA/I2C2C_DATA/JTAG_CLK
A53
GPIO150/I2C1J_CLK/I2C2C_CLK/JTAG_TMS
B57
JTAG_RST#
FAN PWM & TACH
FAN PWM & TACH
B22
GPIO050/FAN_TACH1
A21
GPIO051/FAN_TACH2
B23
GPIO052/FAN_TACH3
B24
GPIO053/PWM0
A23
GPIO054/PWM1
B25
GPIO055/PWM2
A24
GPIO056/PWM3
BC-LINK
BC-LINK
A43
GPIO123/BCM_A_CLK
B45
GPIO122/BCM_A_DAT
A42
GPIO121/BCM_A_INT#
A12
GPIO022/BCM_B_CLK
B13
GPIO023/BCM_B_DAT
A13
GPIO024/BCM_B_INT#
B20
GPIO044/BCM_C_CLK
A18
GPIO043/BCM_C_DAT
B19
GPIO042/BCM_C_INT#
A20
GPIO047/LSBCM_D_CLK
B21
GPIO046/LSBCM_D_DAT
A19
GPIO045/LSBCM_D_INT#
A16
GPIO032/GPTP-IN3/BCM_E_CLK
B16
GPIO31/GPTP-OUT2/BCM_E_DAT
A15
GPIO30/GPTP-IN2/BCM_E_INT#
HOST INTERFACE
HOST INTERFACE
A6
GPIO011/nSMI
A27
GPIO061/LPCPD#
B29
LDRQ#
A28
SER_IRQ
B30
LRESET#
A29
PCI_CLK
B31
LFRAME#
A30
LAD0
B32
LAD1
A31
LAD2
B33
LAD3
A32
CLKRUN#
A33
GPIO100/nEC_SCI
MASTER CLOCK
MASTER CLOCK
A61
XTAL1
A62
XTAL2
B62
GPIO160/32KHZ_OUT
B34
NC1
A64
NC2
B68
NC3
PCH_PWRGD# <25>
REV
X00
X01
4700p
X02
A00
4700p
4700p
4700p
4700p
4700p
BOARD_IDrisetimeismeasuredfrom5%~68%.
4
3
+RTC_CELL
100K_0402_5%~D
100K_0402_5%~D
12
R819
1
C729
C729
2
+3.3V_ALW
12
1
2
A10
B10
B14
B44
B46
B26
A25
B36
B37
B38
A34
A35
A36
A40
B43
A45
A55
A57
B61
B65
A46
B2
A2
B8
B18
A8
B9
A9
A14
B15
A17
B39
A44
B47
A54
B58
A3
B4
A4
B5
B7
A7
B48
B49
A47
B50
B52
A49
B53
A50
A59
B63
A60
A63
B67
B1
A1
B51
A48
B17
B27
B28
2
G
G
1K_0402_1%~D
1K_0402_1%~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C731
C731
+3.3V_RUN
R871
R871
4700P_0402_25V7K~D
4700P_0402_25V7K~D
C742
C742
R819
1 2
R825 10K_0402_5%~DR825 10K_0402_5%~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
C734
C734
2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
1
1
C728
C728
C726
C726
2
2
2
SYSTEM_ID
BOARD_ID
DDR_ON
HOST_DEBUG_TX
HOST_DEBUG_RX
RUNPWROK
EN_INVPWR
DDR_HVREF_RST_GATE
DYN_TUR_CURRNT_SET#
CPU1.5V_S3_GATE
MSDATA
MSCLK
SIO_A20GATE
PS_ID
FWP#
PROCHOT#_EC
R884 1K_0402_1%~DR884 1K_0402_1%~D
1 2
R886 1K_0402_1%~DR886 1K_0402_1%~D
1 2
R887 1K_0402_1%~DR887 1K_0402_1%~D
1 2
PM_APWROK
1.05V_A_PWRGD
ALW_PWRGD_3V_5V
DEVICE_DET#
RESET_OUT#
PCH_RSMRST#
AC_PRESENT
SIO_PWRBTN#
DOCK_SMB_DAT
DOCK_SMB_CLK
LCD_SMBDAT
LCD_SMBCLK
BAY_SMBDAT
BAY_SMBCLK
GPU_SMBDAT
GPU_SMBCLK
CHARGER_SMBDAT
CHARGER_SMBCLK
CARD_SMBDAT
CARD_SMBCLK
USH_SMBDAT
USH_SMBCLK
LAT_ON_SW#
ALWON
VCI_IN1#
POWER_SW_IN#
ACAV_IN
DOCK_PWR_SW#
+PECI_VREF
PECI_EC_R
R863 43_0402_5%~DR863 43_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
12
R799
R799
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
Q45
Q45
13
D
D
S
S
C746
@C746
@
1 2
POWER_SW#_MB <45> DOCK_PWR_BTN# <44>
+3.3V_ALW_U54
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
2
15mil
FWP#
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C745
C745
B64
A11
A22
VBAT
VTR[1]
DB Version 0.12
DB Version 0.12
VSS[1]
AGND
VSS[4]
B11
B66
B60
least
15mil
+3.3V_ALW
10K_0402_5%~D
10K_0402_5%~D
12
R872
R872
10K_0402_5%~D
10K_0402_5%~D
@R879
@
R879
1 2
ChangeboardIDtoX01
+3.3V_ALW
BOARD_ID
VTR[2]
1
2
B35
A41
A58
A52
A26
VTR[3]
VTR[4]
VTR[5]
VTR[6]
VTR[7]B3VTR[8]
MISC INTERFACE
MISC INTERFACE
GPIO124/GPTP-OUT5/UART_RX
GENERAL PURPOSE I/O
GENERAL PURPOSE I/O
GPIO014/GPTP-IN7/HSPI_CS1
GPIO040/GPTP-OUT3/HSPI_CS2
SMBUS INTERFACE
SMBUS INTERFACE
GPIO012/I2C1H_DATA/I2C2D_DATA
GPIO013/I2C1H_CLK/I2C2D_CLK
GPIO141/I2C1F_DATA/I2C2B_DATA
GPIO142/I2C1F_CLK/I2C2B_CLK
DELL PWR SW INF
DELL PWR SW INF
VR_CAP
VSS_RO
B12
B54
+VR_CAP
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
1
C740
C740
2
C740closetoU51.B12
RUN_ON_ENABLE#<50>
130K_0402_5%~D
130K_0402_5%~D
12
R875
R875
4700P_0402_25V7K~D
4700P_0402_25V7K~D
1
C744
C744
2
0.1U_0402_25V6K~D
1
1
C727
C727
C732
C732
2
2
GPIO021/RC_ID1
GPIO020/RC_ID2
GPIO025/UART_CLK
GPIO120/UART_TX
VCC_PRWGD
GPIO060/KBRST
GPIO101/ECGP_SCLK
GPIO103/ECGP_MISO
GPIO105/ECGP_MOSI
GPIO102/HSPI_SCLK
GPIO104/HSPI_MISO
GPIO106/HSPI_MOSI
GPIO116/MSDATA
GPIO117/MSCLK
GPIO127/A20M
GPIO153/LED3
GPIO156/LED1
GPIO157/LED2
nFWP
PROCHOT#/PWM4
GPIO001/ECSPI_CS1
GPIO002/ECSPI_CS2
GPIO015/GPTP-OUT7
GPIO016/GPTP-IN8
GPIO017/GPTP-OUT8
GPIO026/GPTP-IN1
GPIO027/GPTP-OUT1
GPIO041
GPIO107/nRESET_OUT
GPIO125/GPTP-IN5
GPIO126
GPIO151/GPTP-IN4
GPIO152/GPTP-OUT4
GPIO003/I2C1A_DATA
GPIO004/I2C1A_CLK
GPIO005/I2C1B_DATA
GPIO006/I2C1B_CLK
GPIO130/I2C2A_DATA
GPIO131/I2C2A_CLK
GPIO132/I2C1G_DATA
GPIO140/I2C1G_CLK
GPIO143/I2C1E_DATA
GPIO144/I2C1E_CLK
BGPO0
VCI_IN2#
VCI_OUT
VCI_IN1#
VCI_IN0#
VCI_OVRD_IN
VCI_IN3#
PECI
PECI
PECI_VREF
PECI
I2S
I2S
I2S_DAT
I2S_CLK
I2S_WS
EP
MEC5055-LZY_DQFN132_11X11~D
MEC5055-LZY_DQFN132_11X11~D
C1
RUNPWROK
SYSTEM_ID
CHIPSET_IDforBIDfunction
3
2
C733
@C733
@
1 2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
PJP28
PJP28
PAD-OPEN1x1m
PAD-OPEN1x1m
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
1
C739
C739
C738
C738
C730
C730
2
2
DDR_ON <53>
HOST_DEBUG_TX <41>
HOST_DEBUG_RX <41>
RUNPWROK <7,46>
EN_INVPWR <28>
DDR_HVREF_RST_GATE <7>
DYN_TUR_CURRNT_SET# <60>
CPU1.5V_S3_GATE <11>
MSDATA <41>
MSCLK <41>
SIO_A20GATE <21>
PS_ID <51>
ME_SUS_PWR_ACK <19>
1.5V_SUS_PWRGD <53>
PM_APWROK <19>
1.05V_A_PWRGD <55>
ALW_PWRGD_3V_5V <52>
DEVICE_DET# <35>
RESET_OUT# <19>
DYN_TURB_GPU_PWR_ALRT# <16,26>
PCH_RSMRST# <48>
AC_PRESENT <19>
SIO_PWRBTN# <19>
DOCK_SMB_DAT <44>
DOCK_SMB_CLK <44>
LCD_SMBDAT <26,30>
LCD_SMBCLK <26,30>
GPU_SMBDAT <16>
GPU_SMBCLK <16>
CHARGER_SMBDAT <60>
CHARGER_SMBCLK <60>
CARD_SMBDAT <45>
CARD_SMBCLK <45>
USH_SMBDAT <40>
USH_SMBCLK <40>
ALWON <52>
ACAV_IN <16,25,60,61>
1 2
PROCHOT#_EC
2
12
VOL_MUTE <45>
VOL_UP <45>
VOL_DOWN <45>
+3.3V_ALW
PECI_EC <7>
R1180 0_0402_5%~DR1180 0_0402_5%~D
2
G
G
1
AC_PRESENT
LCD_SMBCLK
LCD_SMBDAT
DOCK_SMB_DAT
DOCK_SMB_CLK
DYN_TUR_CURRNT_SET#
DEVICE_DET#
PCIE_WAKE#
BC_DAT_EMC4002
BC_DAT_ECE5048
BC_DAT_ECE1117
PBAT_SMBDAT
PBAT_SMBCLK
LPC_LDRQ#_MEC
CHARGER_SMBDAT
CHARGER_SMBCLK
BAY_SMBDAT
BAY_SMBCLK
MSDATA
DDR_ON
PCH_ALW_ON
DOCK_POR_RST#
EN_INVPWR
1.05V_0.8V_PWROK
RESET_OUT#
CPU1.5V_S3_GATE
PCH_RSMRST#
R862closeto
U54atleast250mils
1 2
R862 0_0402_5%~DR862 0_0402_5%~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C737
C737
2
1 2
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
13
D
D
@
@
Q47
Q47
S
S
PROCHOT#_EC
+1.05V_RUN_VTT
1 2
1 2
1 2
1 2
1 2
1 2
1 2
12
1 2
12
12
12
12
12
12
12
1 2
1 2
12
12
12
12
12
12
12
12
12
H_PROCHOT# <7,26,58,60>
+1.05V_RUN_VTT
10K_0402_5%~D
10K_0402_5%~D
12
@R1179
@
R1179
100K_0402_5%~D
100K_0402_5%~D
@R812
@
R812
1 2
+3.3V_ALW_PCH
R83510K_0402_5%~D R83510K_0402_5%~D
+3.3V_ALW
R4182.2K_0402_5%~D R4182.2K_0402_5%~D
R4202.2K_0402_5%~D R4202.2K_0402_5%~D
R8382.2K_0402_5%~D R8382.2K_0402_5%~D
R8412.2K_0402_5%~D R8412.2K_0402_5%~D
R1178100K_0402_5%~D R1178100K_0402_5%~D
R1125100K_0402_5%~D R1125100K_0402_5%~D
R75910K_0402_5%~D R75910K_0402_5%~D
R821100K_0402_5%~D R821100K_0402_5%~D
R814100K_0402_5%~D R814100K_0402_5%~D
R817100K_0402_5%~D R817100K_0402_5%~D
R8182.2K_0402_5%~D R8182.2K_0402_5%~D
R8202.2K_0402_5%~D R8202.2K_0402_5%~D
R823100K_0402_5%~D @R823100K_0402_5%~D @
R8272.2K_0402_5%~D R8272.2K_0402_5%~D
R8282.2K_0402_5%~D R8282.2K_0402_5%~D
R8542.2K_0402_5%~D R8542.2K_0402_5%~D
R8562.2K_0402_5%~D R8562.2K_0402_5%~D
R86910K_0402_5%~D R86910K_0402_5%~D
R876100K_0402_5%~D R876100K_0402_5%~D
R880100K_0402_5%~D R880100K_0402_5%~D
R881100K_0402_5%~D R881100K_0402_5%~D
R882100K_0402_5%~D R882100K_0402_5%~D
R88310K_0402_5%~D R88310K_0402_5%~D
R8438.2K_0402_5%~D @R8438.2K_0402_5%~D @
R889100K_0402_5%~D R889100K_0402_5%~D
R89210K_0402_5%~D R89210K_0402_5%~D
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
EMC5055
EMC5055
EMC5055
LA-7933
LA-7933
LA-7933
1
47 65Monday, November 07, 2011
47 65Monday, November 07, 2011
47 65Monday, November 07, 2011
0.2
0.2
0.2
of
of
of
Page 48
5
D D
4
3
2
1
BlueTooth
+3.3V_RUN
BT_COEX_STATUS2
1 2
RSMRSTcircuit
+5V_ALW_PCH
0_0402_5%~D
0_0402_5%~D
12
R2159
R2159
U4
U4
+5V_ALW_PCH_R
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
C290
C290
1
C C
2
1
VCC
2
GND
RT9818A-44GU3_SC70-3~D
RT9818A-44GU3_SC70-3~D
For meet T235(power off)= min 40ns(SPEC).T08a(power on)= max 90ms.
R1623 0_0402_5%~D@R1623 0_0402_5%~D@
+3.3V_ALW+3.3V_ALW_PCH
100K_0402_5%~D
100K_0402_5%~D
R1622
RESET#
R1622
1 2
RSMRST#
3
ECSIDE
PCH_RSMRST#<47>
TC7SH08FU_SSOP5~D
TC7SH08FU_SSOP5~D
5
1
P
B
2
A
G
U7
U7
3
1 2
C289
C289
1 2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
4
O
R1633 0_0402_5%~DR1633 0_0402_5%~D
1 2
PCH_RSMRST#_Q <17,19>
R1133 1K_0402_1%~DR1133 1K_0402_1%~D
R1134 1K_0402_1%~DR1134 1K_0402_1%~D
1 2
BT_PRI_STATUS
COEX1_BT_ACTIVE<41>
BT_COEX_STATUS2<40>
BT_PRI_STATUS<40>
BT_RADIO_DIS#<46>
COEX2_WLAN_ACTIVE<41,42>
BT_ACTIVE<49>
USBP11-<20>
USBP11+<20>
10K_0402_5%~D
10K_0402_5%~D
33P_0402_50V8J~D
33P_0402_50V8J~D
12
C753
C753
1
2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C748
C748
1
2
100P_0402_50V8J~D
100P_0402_50V8J~D
R904
R904
1
2
+3.3V_RUN
@C754
@
C754
JBT1
JBT1
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
12
ACES_50228-0127N-001
ACES_50228-0127N-001
11
12
CONN@
CONN@
GND
GND
13
14
LInkCIS
Keyboard
JKB1
KB_DET# KB_DET#
KB_DET#<21>
PS2_CLK_TS<45>
PS2_DAT_TS<45>
BC_INT#_ECE1117<47>
BC_DAT_ECE1117<47>
B B
BC_CLK_ECE1117<47>
PS2_CLK_TS PS2_CLK_TS
PS2_DAT_TS PS2_DAT_TS
+3.3V_ALW
+5V_RUN
JKB1
20
191920
18
171718
16
151516
14
131314
12
111112
10
9910
8
778
6
556
4
334
2
112
CONN@
CONN@
AMPHE_G281010112CHR~D
AMPHE_G281010112CHR~D
LInkCIS
+5V_RUN
+3.3V_ALW
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
1
C756
C756
2
2
C758
C758
+3.3V_ALW
+5V_RUN
BC_INT#_ECE1117
BC_DAT_ECE1117
BC_CLK_ECE1117
PlaceclosetoJKB1
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
Touch PAD/Int KB
Touch PAD/Int KB
Touch PAD/Int KB
LA-7933
LA-7933
LA-7933
48 65Monday, November 07, 2011
48 65Monday, November 07, 2011
48 65Monday, November 07, 2011
1
0.2
0.2
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of
of
of
Page 49
5
HDDLED
+3.3V_ALW
10K_0402_5%~D
10K_0402_5%~D
12
R932
R932
Q74B
Q74B
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
D D
SATA_ACT#<17>
MASK_SATA_LED#<46>
LED_SATA_DIAG_OUT#<46>
4
5
D59
D59
3
RB751S40T1_SOD523-2~D
RB751S40T1_SOD523-2~D
D62
D62
RB751S40T1_SOD523-2~D
RB751S40T1_SOD523-2~D
21
21
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
MASK_BASE_LEDS#
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
SYS_LED_MASK#
WWAN/WLANLED
C C
WIRELESS_LED#<41,46>
+3.3V_ALW
100K_0402_5%~D
100K_0402_5%~D
12
R944
R944
Q78B
Q78B
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
4
MASK_SATA_LED#
LED_WLAN_WWAN_DIAG_OUT#<46>
5
RB751S40T1_SOD523-2~D
RB751S40T1_SOD523-2~D
RB751S40T1_SOD523-2~D
RB751S40T1_SOD523-2~D
+3.3V_ALW
12
100K_0402_5%~D
100K_0402_5%~D
D60
D60
21
D63
D63
21
Q74A
Q74A
61
2
Q321A
Q321A
61
2
R937
R937
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
MASK_BASE_LEDS#
4
+5V_ALW
2
Q75
Q75
PDTA114EU_SC70-3~D
PDTA114EU_SC70-3~D
+5V_ALW
2
Q78A
Q78A
2
1 3
1 2
R934 1.2K_0402_1%~DR934 1.2K_0402_1%~D
Q86
Q86
PDTA114EU_SC70-3~D
PDTA114EU_SC70-3~D
1 3
1 2
R943 374_0402_1%R943 374_0402_1%
2
61
SSI memo
SSI memo
+5V_ALW
Q79
Q79
PDTA114EU_SC70-3~D
PDTA114EU_SC70-3~D
1 3
1 2
R939 1.2K_0402_1%~DR939 1.2K_0402_1%~D
SATA_LED <45>
SATA_SIDE_LED <45>
SSI memo
WLAN_LED <45>
3
NUM_LED#<46>
2
NUMLED
+5V_RUN
2
1 3
Q80
Q80
PDTA114EU_SC70-3~D
PDTA114EU_SC70-3~D
1 2
R942 1.2K_0402_1%~DR942 1.2K_0402_1%~D
1
SSI memo
NUM_LED <45>
BreathLED
SSI lose this
BREATH_LED#<44,46>
DMN66D0LDW-7_SOT363-6~D
2
61
R956 1.2K_0402_1%~DR956 1.2K_0402_1%~D
MASK_BASE_LEDS#
SSI memo
1 2
BREATH_WHITE_LED
1 2
R955 374_0402_1%R955 374_0402_1%
limiting resister
Q84A
Q84A
DMN66D0LDW-7_SOT363-6~D
BREATH_LED TOP view.
BREATH_WHITE_LED <45>
BREATH_LED#_Q <45>
BREATH_LED side view.
VolumemuteLED
Q320A
Q320A
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
VOL_MUTE_LED#<46>
61
2
MASK_BASE_LEDS#
VOL_MUTE_LED <45>
BTLED
BTLEDwillbelightwhensystemisinS3/S4/S5
+3.3V_ALW
thatchangePUfromRUNtoALWrail
100K_0402_5%~D
100K_0402_5%~D
MASK_BASE_LEDS#
12
R938
B B
BT_ACTIVE<48>
Fiducial Mark
FD1
@FD1
@
A A
1
FIDUCIAL MARK~D
FIDUCIAL MARK~D
FD2
@FD2
@
1
FIDUCIAL MARK~D
FIDUCIAL MARK~D
FD3
@FD3
@
1
FIDUCIAL MARK~D
FIDUCIAL MARK~D
FD4
@FD4
@
1
FIDUCIAL MARK~D
FIDUCIAL MARK~D
@H1
@
H_3P0
H_3P0
@H22
@
H_1P2
H_1P2
@H3
@
H2
@H2
@
H1
H_3P6
H_3P6
H_3P6
H_3P6
1
1
H22
H23
@H23
@
@H24
@
H_1P2
H_1P2
H_1P2
H_1P2
1
1
5
H5
@H5
@
H3
H4
@H4
@
H_3P0
H_3P0
H_3P0
H_3P0
1
1
H25
@H25
@
H24
H_1P2
H_1P2
1
1
R938
2
1 2
61
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
Q318B
Q318B
5
4
Q318A
Q318A
R941 1.2K_0402_1%~DR941 1.2K_0402_1%~D
SSI memo
BT_LED <45>
SYS_LED_MASK#<46>
SYS_LED_MASK#
LID_CL#
LID_CL#<45,46>
LED Circuit Control Table
SYS_LED_MASK# LID_CL#
Mask All LEDs (Sniffer Function)
Mask Base MB LEDs (Lid Closed)
Do not Mask LEDs (Lid Opened) 11
H17
@H17
H9
@H9
@
H_3P6
H_3P6
1
H8
@H8
@
H_3P0
H_3P0
H_3P6
H_3P6
H_5P2
H_5P2
1
1
1
@H11
@
H10
@H10
@
H_3P8
H_3P8
H_3P0
H_3P0
1
1
@
H7
@H7
@
H6
@H6
H13
@H13
@
H12
@H12
@
H11
H_3P8
H_3P8
1
4
H14
@H14
@
H_3P0
H_3P0
H_3P0
H_3P0
1
1
1
@H15
@
H_4P2
H_4P2
@
H16
@H16
@
H15
H_4P2
H_4P2
1
@H18
@
H_3P0
H_3P0
H_4P2
H_4P2
1
1
H20
@H20
@
H19
@H19
@
H18
H_3P0
H_3P0
H_4P2
H_4P2
1
1
1
0
10
3
X
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
2
1
2
+3.3V_ALW
5
B
A
3
C778
C778
1 2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
P
MASK_BASE_LEDS#
4
O
G
U58
U58
TC7SH08FU_SSOP5~D
TC7SH08FU_SSOP5~D
MASK_BASE_LEDS# <45>
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
PAD & Standoff & LED
PAD & Standoff & LED
PAD & Standoff & LED
LA-7933
LA-7933
LA-7933
1
49 65Monday, November 07, 2011
49 65Monday, November 07, 2011
49 65Monday, November 07, 2011
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Page 50
5
+PWR_SRC_S
+3.3V_ALW2
100K_0402_5%~D
100K_0402_5%~D
12
R294
D D
RUN_GFX_ON<18,46>
100K_0402_5%~D
100K_0402_5%~D
R301
R301
R294
RUN_GFX_ON#
5
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
61
2
Q294A
Q294A
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
12
1
@
@
C362
C362
2
+PWR_SRC_S
2
G
G
Solve S4/S5 +MXM_PWR_SRC leakage in DC mode.
C C
B B
RUN_GFX_ON
ALW_ON_3.3V#<23>
PCH_ALW_ON<47,51>
+PWR_SRC_MXM
12
13
D
D
2
G
G
S
S
+3.3V_ALW2
2
100K_0402_5%~D
100K_0402_5%~D
R940
R940
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
100K_0402_5%~D
100K_0402_5%~D
12
61
+PWR_SRC_MXM
+MXM_SRC_EN#
Q87
Q87
R907
R907
ALW_ON_3.3V#
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
Q305A
Q305A
MXM_PWR_SRCSource
SI4835DDY-T1-GE3_SO8~D
SI4835DDY-T1-GE3_SO8~D
1
2
3 6
Forcross_modeissue
4
+3.3V_ALWto+3VMXM
+3.3V_ALW +3.3V_MXM
10U_0805_10V4Z~D
10U_0805_10V4Z~D
200K_0402_5%
200K_0402_5%
12
C357
C357
R269
R269
+3VMXM_GATE
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
Q294B
Q294B
4
+5V_ALW +5V_MXM
200K_0402_5%
200K_0402_5%
12
R275
R275
+5VMXM_GATE
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
13
D
D
Q36
Q36
S
S
Q186
Q186
8
7
5
4
2200P_0402_50V7K~D
2200P_0402_50V7K~D
1
C774
C774
2
+PWR_SRC_S
100K_0402_5%~D
100K_0402_5%~D
12
R905
R905
+3V_ALW_PCH_ENABLE
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
Q305B
Q305B
5
4
1 2
1 2
1 2
Q25
Q25
SI4800BDY-T1-E3_SO8~D
SI4800BDY-T1-E3_SO8~D
8
7
1
5
2
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
C352
C352
1
2
+5V_ALWto+5VMXM
Q76
Q76
SI4800BDY-T1-E3_SO8~D
SI4800BDY-T1-E3_SO8~D
8
10U_0805_10V4Z~D
10U_0805_10V4Z~D
7
1
C353
C353
5
2
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
1
C355
C355
2
PJP78
@PJP78
@
1 2
+MXM_PWR
PAD-OPEN 4x4m
PAD-OPEN 4x4m
PJP79
@PJP79
@
1 2
PAD-OPEN 4x4m
PAD-OPEN 4x4m
+3.3V_ALW_PCHSource
+3.3V_ALW +3.3V_ALW_PCH
Q49
Q49
SI3456DDV-T1-GE3_TSOP6~D
SI3456DDV-T1-GE3_TSOP6~D
D
D
6
S
S
2
1
G
G
3
1M_0402_5%~D
1M_0402_5%~D
12
R1619
R1619
1
2
+PWR_SRC+3.3V_ALW
C2570.1U_0402_25V4Z~D C2570.1U_0402_25V4Z~D
C2580.1U_0402_25V4Z~D C2580.1U_0402_25V4Z~D
C2590.1U_0402_25V4Z~D C2590.1U_0402_25V4Z~D
3
1
2
36
4
100K_0402_5%~D
100K_0402_5%~D
12
@R305
@
R305
4
0_0402_5%~D
0_0402_5%~D
12
@
@
R278
R278
45
3300P_0402_50V7K~D
3300P_0402_50V7K~D
C762
C762
1
2
36
1
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
C760
C760
2
40mil(1A)
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
10U_0805_10V4Z~D
10U_0805_10V4Z~D
C354
C354
C449
C449
1
1
2
2
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
10U_0805_10V4Z~D
10U_0805_10V4Z~D
1
1
C351
C351
C356
C356
2
2
+MXM_PWR_SRC
10U_1206_25V6M~D
10U_1206_25V6M~D
100K_0402_5%~D
100K_0402_5%~D
12
R935
R935
C776
C776
R935form20Kto100K
Powersaving
20K_0402_5%~D
20K_0402_5%~D
12
R908
R908
100mil(2.5A)
RUN_ON_ENABLE#<47>
1 2
RUN_ON<34,45,46,54>
R762 0_0402_5%~D@R762 0_0402_5%~D@
SIO_SLP_S3#<11,19,34,45,46,54>
1 2
R781 0_0402_5%~DR781 0_0402_5%~D
SIO_SLP_A#<19,46,55>
SUS_ON<46>
SIO_SLP_S4#<19,46,53>
+3.3V_ALW2
2
1 2
R806 0_0402_5%~D@ R806 0_0402_5%~D@
1 2
R808 0_0402_5%~DR808 0_0402_5%~D
2
+1.05V_M
100K_0402_5%~D
100K_0402_5%~D
12
R930
R930
+1.05V_RUN_ENABLE
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
Q304B
Q304B
4
+PWR_SRC_S +5V_ALW
100K_0402_5%~D
100K_0402_5%~D
12
R906
R906
+5V_RUN_ENABLE
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
13
D
D
Q61
Q61
S
S
100K_0402_5%~D
100K_0402_5%~D
12
R920
R920
+3.3V_RUN_ENABLE
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
13
D
D
Q59
Q59
S
S
+3.3V_MSource
+3.3V_ALW
SI3456DDV-T1-GE3_TSOP6~D
SI3456DDV-T1-GE3_TSOP6~D
6
2
1
1M_0402_5%~D
1M_0402_5%~D
12
+PWR_SRC_S
100K_0402_5%~D
100K_0402_5%~D
12
R911
R911
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
Q303B
Q303B
5
4
+1.05V_RUNSource
Q63
Q63
SI4164DY-T1-GE3_SO8~D
SI4164DY-T1-GE3_SO8~D
8
7
5
4
2200P_0402_50V7K~D
2200P_0402_50V7K~D
470K_0402_5%~D
470K_0402_5%~D
12
R1611
R1611
1
C773
C773
2
+5V_RUNSource
Q51
Q51
DMN3030LSS-13_SOP8L-8
DMN3030LSS-13_SOP8L-8
8
7
5
4
2200P_0402_50V7K~D
2200P_0402_50V7K~D
1
C769
C769
2
+3.3V_RUNSource
Q56
Q56
DMN3030LSS-13_SOP8L-8
DMN3030LSS-13_SOP8L-8
8
7
5
4
2200P_0402_50V7K~D
2200P_0402_50V7K~D
1M_0402_5%~D
1M_0402_5%~D
1
12
R1631
R1631
2
Q58
Q58
+3.3V_M
D
D
S
S
45
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
G
G
C768
C768
1
3
2
4700P_0402_25V7K~D
4700P_0402_25V7K~D
R1617
R1617
C770
C770
1
2
+3.3V_SUSSource
Q54
Q54
SI3456DDV-T1-GE3_TSOP6~D
SI3456DDV-T1-GE3_TSOP6~D
+3.3V_ALW
D
D
6
2
1
G
G
+SUS_ENABLE
1M_0402_5%~D
1M_0402_5%~D
12
R1618
R1618
1
2
36
100K_0402_5%~D
100K_0402_5%~D
12
R909
R909
RUN_ON_ENABLE#
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
61
Q304A
Q304A
+PWR_SRC_S
5
+3.3V_ALW2
2
100K_0402_5%~D
100K_0402_5%~D
12
R917
R917
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
4
100K_0402_5%~D
100K_0402_5%~D
12
R915
R915
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
61
+PWR_SRC_S
5
2
G
G
+PWR_SRC_S
2
G
G
+A_ENABLE
Q306B
Q306B
SUS_ON_3.3V#
Q303A
Q303A
+3.3V_ALW2
2
100K_0402_5%~D
100K_0402_5%~D
12
R918
R918
A_ON_3.3V#
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
61
Q306A
Q306A
1
+1.05V_RUN
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
20K_0402_5%~D
20K_0402_5%~D
12
R931
R931
C772
C772
1
2
+5V_RUN
1
2
10U_0805_10V4Z~D
10U_0805_10V4Z~D
36
20K_0402_5%~D
20K_0402_5%~D
12
C771
C771
1
R912
R912
2
+3.3V_RUN+3.3V_ALW
1
10U_0805_6.3V6M~D
10U_0805_6.3V6M~D
2
20K_0402_5%~D
20K_0402_5%~D
12
36
1
C775
C775
R921
R921
2
C777
C777
20K_0402_5%~D
20K_0402_5%~D
@R919
@
12
R919
+3.3V_SUS
S
S
45
20K_0402_5%~D
20K_0402_5%~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
12
R914
R914
C765
C765
1
3
470P_0402_50V7K~D
470P_0402_50V7K~D
2
C767
C767
1
2
DischargCircuit
+3.3V_SUS +1.5V_RUN +3.3V_RUN+5V_RUN+3.3V_ALW_PCH +3.3V_M
1K_0402_1%~D
1K_0402_1%~D
12
@R922
@
R922
+3.3V_SUS_CHG
A A
13
D
D
SUS_ON_3.3V# ALW_ON_3.3V#
2
G
G
S
S
5
1K_0402_1%~D
1K_0402_1%~D
12
@R928
@
R928
+3.3V_ALWPCH_CHG
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
@
@
Q65
Q65
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
@
@
13
D
D
Q66
Q66
2
G
G
S
S
RUN_ON_ENABLE#
1K_0402_1%~D
1K_0402_1%~D
1K_0402_1%~D
1K_0402_1%~D
39_0603_5%~D
12
@R923
@
R923
+5V_RUN_CHG
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
@
@
13
D
D
Q67
Q67
2
2
G
G
G
G
S
S
4
39_0603_5%~D
12
@R924
@
R929
R929
R924
+1.5V_RUN_CHG
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
@
@
13
D
D
Q68
Q68
2
G
G
S
S
+1.05V_RUN
39_0402_5%~D
39_0402_5%~D
12
+3.3V_RUN_CHG
13
D
D
S
S
12
@R925
@
R925
+1.05V_RUN_CHG
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
Q69
Q69
SSM3K7002FU_SC70-3~D
@
@
13
D
D
Q70
Q70
2
G
G
S
S
RUN_ON_CPU1.5VS3#<7,11>
+1.5V_CPU_VDDQ
220_0402_5%~D
220_0402_5%~D
2
G
G
3
+0.75V_DDR_VTT
12
R926
R926
22_0603_5%~D
22_0603_5%~D
12
R927
R927
+1.5V_CPU_VDDQ_CHG
13
D
D
S
S
+DDR_CHG
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
13
D
D
Q72
Q71
Q71
Q72
2
G
G
S
S
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
A_ON_3.3V#
39_0603_5%~D
39_0603_5%~D
12
R916
R916
+3.3V_M_CHG
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
RUN_GFX_ON#
13
D
D
Q60
Q60
2
G
G
S
S
2
+3.3V_MXM +5V_MXM
470_0603_5%
470_0603_5%
12
@
@
R268
R268
+3VMXM_D
13
D
D
2
G
G
S
S
470_0603_5%
470_0603_5%
12
@
@
R274
R274
+5VMXM_D
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
@
@
Q48
Q48
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
13
D
D
@
@
Q50
Q50
2
G
G
S
S
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Power Control
Power Control
Power Control
LA-7933
LA-7933
LA-7933
1
50 65Wednesday, November 09, 2011
50 65Wednesday, November 09, 2011
50 65Wednesday, November 09, 2011
of
of
of
0.2
0.2
0.2
Page 51
5
4
3
2
1
+COINCELL
COIN RTC Battery
PL1
PL1
C8B BPH 853025_2P~D
C8B BPH 853025_2P~D
+PWR_SRC
D D
1 2
12
12
PC31
PC31
PC30
PC30
@
@
@
@
10U_0805_25V6K
10U_0805_25V6K
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
1
PD2
PESD24VS2UT_SOT23-3~D
PESD24VS2UT_SOT23-3~D
2
3
Primary Battery Connector
PBATT1
PBATT1
11
GND
10
GND
1
9
2
8
3
7
4
6
12
PC4
PC4
C C
2200P_0402_50V7K~D
2200P_0402_50V7K~D
B B
5
5
6
4
7
3
8
2
9
1
SUYIN_200045GR009M28QL
SUYIN_200045GR009M28QL
Z4304
Z4305
Z4306
GND
NB_PSID
PR3
PR3
100_0402_5%~D
100_0402_5%~D
1 2
1
+
+
PC1
PC1
2
100U_25V_M~D
100U_25V_M~D
@PD2
@
100_0402_5%~D
100_0402_5%~D
1 2
BLM18BD102SN1D_0603~D
BLM18BD102SN1D_0603~D
+PWR_SRC_MXM
ESD Diodes
1
2
PR5
PR5
100_0402_5%~D
100_0402_5%~D
PL3
PL3
12
PD3
@PD3
@
PESD24VS2UT_SOT23-3~D
PESD24VS2UT_SOT23-3~D
3
PR4
PR4
1 2
PR10
PR10
PR12
PR12
100K_0402_1%~D
100K_0402_1%~D
15K_0402_1%~D
15K_0402_1%~D
PBAT_SMBCLK 47
PBAT_SMBDAT 47
1 2
1 2
PBATT+_C
PR7
@ PR7
@
1 2
0_0402_5%~D
0_0402_5%~D
D
D
1 3
2
B
B
E
E
2
C
C
3 1
FBMJ4516HS720NT_2P~D
FBMJ4516HS720NT_2P~D
FBMJ4516HS720NT_2P~D
FBMJ4516HS720NT_2P~D
12
PC3
PC3
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
33_0402_5%~D
33_0402_5%~D
S
S
1 2
PQ2
PQ2
FDV301N_G_NL_SOT23-3~D
FDV301N_G_NL_SOT23-3~D
G
G
PQ3
PQ3
MMST3904-7-F_SOT323~D
MMST3904-7-F_SOT323~D
PL2
PL2
1 2
PL6
PL6
1 2
PR9
PR9
+5V_ALW
12
PR11
PR11
PBATT+
10K_0402_1%~D
10K_0402_1%~D
SLICE_BAT_PRES#44,46,61
PR13
PR13
1 2
10K_0402_5%~D@
10K_0402_5%~D@
+3.3V_ALW
12
PR2
PR2
100K_0402_5%~D
100K_0402_5%~D
+3.3V_ALW
PR8
PR8
1 2
2.2K_0402_5%~D
2.2K_0402_5%~D
+3.3V_RTC_LDO
RB715FGT106_UMD3
RB715FGT106_UMD3
PBAT_PRES# 46
PQ1
PQ1
FDN338P_G_NL_SOT23-3~D
PD5
PD5
1 2
SDMK0340L-7-F_SOD323-2~D
SDMK0340L-7-F_SOD323-2~D
FDN338P_G_NL_SOT23-3~D
1
3
1
3
1 3
2
2
2
PR6
PR6
1 2
0_0402_5%~D
0_0402_5%~D
NB_PSID_TS5A63157
12
1500P_0402_7K~D
1500P_0402_7K~D
DOCK_PSID44 GPIO_PSID_SELECT 46
PSID_DISABLE# 46
3
PD1
PD1
1
PC5
PC5
1
2
12
PR1
PR1
1K_0402_5%~D
1K_0402_5%~D
Z4012
2
+RTC_CELL
1
PC2
PC2
1U_0603_10V4Z~D
1U_0603_10V4Z~D
2
DOCK_SMB_ALERT# 44,46
PU1
PU1
NO
GND
NC3COM
TS5A63157DCKR_SC70-6~D
TS5A63157DCKR_SC70-6~D
6
IN
5
V+
4
+COINCELL
Move to power schematic
+5V_ALW
PS_ID 47
JRTC1
JRTC1
1
1
2
2
3
GND
4
GND
ACES_50271-0020N-001
ACES_50271-0020N-001
DC_IN+ Source
+DC_IN
PL4
PL4
C8B BPH 853025_2P~D
C8B BPH 853025_2P~D
1 2
PJPDC1
PJPDC1
1
1
2
2
3
3
4
4
5
5
6
6
+DCIN_JACK
7
A A
7
8
8
9
9
10
10
11
11
ACES_50290-01101-001
ACES_50290-01101-001
12
PC11
PC11
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
5
12
PC15
PC15
@
@
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
PR19
@ PR19
@
+DC_IN
PC9
PC9
12
4.7K_0805_5%~D
4.7K_0805_5%~D
12
1 2
PR16
PR16
1M_0402_5%~D
1M_0402_5%~D
PR22
PR22
12
4
0.022U_0805_50V7K~D
0.022U_0805_50V7K~D
1
2
3
PR20
PR20
1 2
10K_0402_5%~D
10K_0402_5%~D
1M_0402_5%~D
1M_0402_5%~D
PQ5SI7149DP PQ5SI7149DP
4
SOFT_START_GC 61
5
12
12
PC10
PC10
PC12
PC12
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
PC13
PC13
+DC_IN_SS
12
12
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
12
PR18
PR18
PC14
PC14
10U_0805_25V6K
10U_0805_25V6K
100K_0402_5%~D
100K_0402_5%~D
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
+3.3V_ALW
PCH_ALW_ON
+PWR_SRC
PR21
@ PR21
@
1 2
0_0402_5%~D
0_0402_5%~D
1 2
PR23
PR23
0_0402_5%~D
0_0402_5%~D
VSB_N_002
12
12
PC7
PC7
PR15
PR15
100K_0402_1%~D
PR17
PR17
22K_0402_1%~D
22K_0402_1%~D
1 2
VSB_N_003
13
D
D
2
G
G
S
S
12
PC16
PC16
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
100K_0402_1%~D
VSB_N_001
PQ7
PQ7
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
2
TP0610K-T1-E3_SOT23-3
TP0610K-T1-E3_SOT23-3
0.22U_0603_25V7K~D
0.22U_0603_25V7K~D
2
+PWR_SRC_S
13
12
PC8
PC8
PQ4
PQ4
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
+DCIN
+DCIN
+DCIN
LA-7933
LA-7933
LA-7933
1
0.2
0.2
51 65Monday, November 07, 2011
51 65Monday, November 07, 2011
51 65Monday, November 07, 2011
0.2
of
of
of
Page 52
A
B
C
D
E
2VREF_6182
1 1
@
@
PJP101
PJP101
1 2
+PWR_SRC
PAD-OPEN 4x4m
PAD-OPEN 4x4m
PL100
PL100
1UH_PCMB053T-1R0MS_7A_20%
1UH_PCMB053T-1R0MS_7A_20%
2 2
12
+3.3V_ALWP
+3.3V_ALWP
TDC 6 A
Peak Current 8 A
OCP current 10.5 A
3 3
4 4
THERM_STP#25
+DC1_PWR_SRC
12
PC103
PC103
PC102
PC102
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
ALWON47
A
12
2200P_0402_50V7K~D
2200P_0402_50V7K~D
PR115
PR115
2K_0402_1%~D
2K_0402_1%~D
1 2
PR118
PR118
0_0402_5%~D
0_0402_5%~D
1 2
12
FDMC8884_POWER33-8-5
PC104
PC104
PQ106B
PQ106B
PC119
PC119
@
@
1U_0603_10V6K~D
1U_0603_10V6K~D
FDMC8884_POWER33-8-5
4.7U_0805_25V6K~D
4.7U_0805_25V6K~D
PL103
PL103
2.2UH_FDSD0630-H-2R2M-P3_8.3A_20%
2.2UH_FDSD0630-H-2R2M-P3_8.3A_20%
1 2
1
+
PC112
220U_6.3V_M+PC112
220U_6.3V_M
2
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
ENTRIP2
3
2
5
4
13
2
12
PQ101
PQ101
12
@
@
PR110
PR110
4.7_1206_5%~D
4.7_1206_5%~D
SNUB_3V
12
@
@
PC114
PC114
680P_0603_50V7K~D
680P_0603_50V7K~D
+PWR_SRC
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
ENTRIP1
61
PQ106A
PQ106A
PR117
PR117
100K_0402_1%~D
100K_0402_1%~D
1 2
PQ105
PQ105
PDTC115EU_SOT323-3
PDTC115EU_SOT323-3
+3.3V_RTC_LDO
PR105
PR105
0_0402_5%~D
0_0402_5%~D
1 2
10U_0805_6.3V6M~D
10U_0805_6.3V6M~D
3 5
241
3 5
241
0.22U_0603_16V7K~D
0.22U_0603_16V7K~D
PQ103
PQ103
FDMC7692S_POWER33-8-5
FDMC7692S_POWER33-8-5
12
PC199
PC199
@
@
56P_0402_50V8J~D
56P_0402_50V8J~D
PD100
@ PD100
@
MMSZ5229BS_SOD323~D
MMSZ5229BS_SOD323~D
1 2
+5V_ALW2
B
+3.3V_ALW2
12
PC105
PC105
PC100
PC100
1 2
LX_3V
499K_0402_1%~D
499K_0402_1%~D
PR108
PR108
1 2
2.2_0603_5%~D
2.2_0603_5%~D
LG_3V
PR113
@PR113
@
12
12
PR112
PR112
@
@
300K_0402_1%
300K_0402_1%
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
@ PC120
@
22P_0402_50V8J~D
22P_0402_50V8J~D
13.7K_0402_1%~D
13.7K_0402_1%~D
1 2
20K_0402_1%~D
20K_0402_1%~D
1 2
PR106
PR106
121K_0402_1%~D
121K_0402_1%~D
1 2
25
BST_3V
UG_3V
10
11
12
12
PC116
PC116
1U_0603_10V6K~D
1U_0603_10V6K~D
2VREF_6182
1U_0603_16V6K~D
1U_0603_16V6K~D
PC120
12
PR101
PR101
PR103
PR103
PU101
PU101
P PAD
7
VO2
8
VREG3
9
BOOT2
UGATE2
PHASE2
LGATE2
C
12
PC101
PC101
FB_3V
ENTRIP2
6
ENTRIP2
EN
13
+DC1_PWR_SRC
5
FB2
SKIPSEL
14
4
15
3
REF
TONSEL
VIN16GND
12
FB_5V
2
FB1
17
12
PC117
PC117
4.7U_0805_10V6K~D
4.7U_0805_10V6K~D
PC118
PC118
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
PC121
@ PC121
@
12
22P_0402_50V8J~D
22P_0402_50V8J~D
PR102
PR102
30.9K_0402_1%~D
30.9K_0402_1%~D
1 2
PR104
PR104
20K_0402_1%~D
20K_0402_1%~D
1 2
PR107
PR107
127K_0402_1%
127K_0402_1%
ENTRIP1
1 2
1
ENTRIP1
24
VO1
23
PGOOD
BOOT1
UGATE1
PHASE1
LGATE1
NC18VREG5
BST_5V
22
UG_5V
21
LX_5V
20
LG_5V
19
RT8205LZQW(2) WQFN 24P PWM
RT8205LZQW(2) WQFN 24P PWM
+5V_ALW2
+3.3V_ALWP
PR109
PR109
1 2
2.2_0603_5%~D
2.2_0603_5%~D
100K_0402_1%~D
100K_0402_1%~D
+5V_ALWP
+DC1_PWR_SRC
12
12
PC107
PC107
PC106
PC106
2200P_0402_50V7K~D
2200P_0402_50V7K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
PC110
PC110
0.22U_0603_16V7K~D
0.22U_0603_16V7K~D
BST1_5VBST1_3V
1 2
@PC198
@
56P_0402_50V8J~D
56P_0402_50V8J~D
+3.3V_ALW
PR114
PR114
1 2
@
@
PJP102
PJP102
1 2
PAD-OPEN 4x4m
PAD-OPEN 4x4m
@
@
PJP103
PJP103
1 2
PAD-OPEN 4x4m
PAD-OPEN 4x4m
@
@
PJP104
PJP104
1 2
PAD-OPEN 4x4m
PAD-OPEN 4x4m
@
@
PJP105
PJP105
1 2
PAD-OPEN 4x4m
PAD-OPEN 4x4m
D
12
12
PC108
PC108
4.7U_0805_25V6K~D
4.7U_0805_25V6K~D
PC198
ALW_PWRGD_3V_5V 47
PC109
PC109
4.7U_0805_25V6K~D
4.7U_0805_25V6K~D
12
PQ102
PQ102
FDMC8884_POWER33-8-5
FDMC8884_POWER33-8-5
3 5
241
3 5
241
PQ104
PQ104
FDMC7692S_POWER33-8-5
FDMC7692S_POWER33-8-5
PL102
PL102
3.3UH_FDV0630-3R3M-P3_5.7A_20%
3.3UH_FDV0630-3R3M-P3_5.7A_20%
1 2
12
@
@
PR111
PR111
4.7_1206_5%~D
4.7_1206_5%~D
SNUB_5V
12
@
@
PC115
PC115
680P_0603_50V7K~D
680P_0603_50V7K~D
1
+
PC113
220U_6.3V_M+PC113
220U_6.3V_M
2
+5V_ALWP
TDC 6.5 A
Peak Current 8.6 A
OCP current 11.2 A
+5V_ALW
+3.3V_ALW
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
+5V_ALWP/+3.3V_ALWP
+5V_ALWP/+3.3V_ALWP
+5V_ALWP/+3.3V_ALWP
LA-7933
LA-7933
LA-7933
52 65Monday, November 07, 2011
52 65Monday, November 07, 2011
52 65Monday, November 07, 2011
E
+5V_ALWP
of
of
of
0.2
0.2
0.2
Page 53
A
B
C
D
@
@
PJP201
+PWR_SRC
1 1
1.5VP
TDC 13 A
Peak Current 17.5A
OCP current 22 A
+1.5VP
2 2
Mode DDR_ON 0.75V_DDR_VTT_ON +1.5VP +0.75VSP +V_DDR_REF
S0 H H on on on
S3 H L on off on
S4 L L off off off
S5 L L off off off
Note: S3 - sleep ; S5 - power off
3 3
+1.5VP
4 4
PJP201
1 2
PAD-OPEN 4x4m
PAD-OPEN 4x4m
1.0UH_PCMC104T-1R0MN_20A_20%
1.0UH_PCMC104T-1R0MN_20A_20%
1 2
1
+
+
PC209
PC209
2
330U_2.5V_M
330U_2.5V_M
PJP202
@ PJP202
@
JUMP_43X118
JUMP_43X118
2
112
PJP203
@ PJP203
@
JUMP_43X118
JUMP_43X118
2
112
PJP205
PJP205
2
112
JUMP_43X79@
JUMP_43X79@
PL201
PL201
+1.5V_MEM
+0.75V_DDR_VTT+0.75VSP
12
DDR_ON47
1.5V_B+
PC201
PC201
PR203
PR203
4.7_1206_5%~D
4.7_1206_5%~D
@
@
12
12
12
PC202
PC202
PC203
PC203
PC204
4.7U_0805_25V6K~D
4.7U_0805_25V6K~D
4.7U_0805_25V6K~D
4.7U_0805_25V6K~D
12
@
@
SNUB_1.5V
12
PC212
PC212
680P_0603_50V7K~D
680P_0603_50V7K~D
SIO_SLP_S4#19,46,50
PC204
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
2200P_0402_50V7K~D
2200P_0402_50V7K~D
1.5V_SUS_PWRGD47
PR210
@PR210
@
0_0402_5%~D
0_0402_5%~D
1 2
PR226
PR226
0_0402_5%~D
0_0402_5%~D
1 2
DDR GPIO Output Voltage Selection
DDR_1.5V_CNTRL1 DDR VoutDDR_1.5V_CNTRL0
0
0
1
11
FDMS7698 1N POWER56-8
FDMS7698 1N POWER56-8
123
FDMS0309S_POWER56-8-5
FDMS0309S_POWER56-8-5
123
12
5
PQ201
PQ201
4
5
PQ202
PQ202
+5V_ALW
4
12
56P_0402_50V8J~D
56P_0402_50V8J~D
PC213
@PC213
@
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
0
1
0
1 2
PC205
PC205
0.22U_0603_16V7K~D
0.22U_0603_16V7K~D
PC299
PC299
12
@
@
+3.3V_ALW
PR205
PR205
0.75V_DDR_VTT_ON46
1.65V
1.6V
1.55V
1.5V (Default)
PR201
PR201
1 2
2.2_0603_5%~D
2.2_0603_5%~D
PR204
PR204
5.1_0603_5%~D
5.1_0603_5%~D
1 2
PC211
PC211
1U_0603_10V6K~D
1U_0603_10V6K~D
100K_0402_1%~D
100K_0402_1%~D
BOOT_1.5V VLDOIN_1.5V
DH_1.5V
SW_1.5V
DL_1.5V
PR202
PR202
6.98K_0402_1%~D
6.98K_0402_1%~D
1 2
PC208
PC208
1U_0603_10V6K~D
1U_0603_10V6K~D
PR214
PR214
0_0402_5%~D
0_0402_5%~D
1 2
CS_1.5V
VDD_1.5V
+5V_ALW
PGOOD_1.5V
1.5V_B+
S5_1.5V
DDR_1.5V_CNTRL046
DDR_1.5V_CNTRL146
15
LGATE
14
PGND
13
CS
RT8207MZQW_WQFN20_3X3
RT8207MZQW_WQFN20_3X3
12
VDDP
11
VDD
PR209
PR209
1M_0402_1%~D
1M_0402_1%~D
1 2
S3_1.5V
PR216
PR216
10K_0402_5%~D
10K_0402_5%~D
PR222
PR222
10K_0402_5%~D
10K_0402_5%~D
16
PHASE
PGOOD
10
17
UGATE
TON
9
18
BOOT
S5
8
+3.3V_ALW
12
1 2
+3.3V_ALW
12
20
19
PU201
PU201
VTT
VLDOIN
VTTGND
VTTSNS
VTTREF
VDDQ
FB
S3
6
7
PR219
PR219
10K_0402_5%~D
10K_0402_5%~D
12
PR220
PR220
@
@
10K_0402_5%~D
10K_0402_5%~D
PR223
PR223
10K_0402_5%~D
10K_0402_5%~D
1 2
PR225
@PR225
@
10K_0402_5%~D
10K_0402_5%~D
PJP204
PJP204
1 2
PAD-OPEN1x1m
PAD-OPEN1x1m
21
PAD
1
2
3
GND
4
5
+1.5VP
PQ204B
PQ204B
5
12
PC215
PC215
12
PR206
PR206
0_0402_5%~D
0_0402_5%~D
1 2
+3.3V_ALW
12
PR213
PR213
10K_0402_5%~D
10K_0402_5%~D
@
@
3
PR217
PR217
4
DMN66D0LDW-7 2N SOT363-6
DMN66D0LDW-7 2N SOT363-6
0.01U_0402_25V7K~D
0.01U_0402_25V7K~D
PQ205B
PQ205B
5
12
PC217
PC217
0.01U_0402_25V7K~D
0.01U_0402_25V7K~D
+1.5VP
PQ204A
PQ204A
12
10K_0402_5%~D
10K_0402_5%~D
+3.3V_ALW
12
PR221
PR221
10K_0402_5%~D
10K_0402_5%~D
3
4
DMN66D0LDW-7 2N SOT363-6
DMN66D0LDW-7 2N SOT363-6
0.75Volt +/- 5%
TDC 1.4 A
Peak Current 2 A
12
12
PC206
PC206
10U_0805_6.3V6M~D
10U_0805_6.3V6M~D
PR211
PR211
150K_0402_1%~D
150K_0402_1%~D
1 2
61
2
12
PC214
PC214
DMN66D0LDW-7 2N SOT363-6
DMN66D0LDW-7 2N SOT363-6
0.01U_0402_25V7K~D
0.01U_0402_25V7K~D
PQ205A
PQ205A
2
12
12
PR224
PR224
@
@
10K_0402_5%~D
10K_0402_5%~D
PC207
PC207
10U_0805_6.3V6M~D
10U_0805_6.3V6M~D
PC210
PC210
0.033U_0402_16V7~D
0.033U_0402_16V7~D
+1.5VP
@ PC218
@
22P_0402_50V8J~D
22P_0402_50V8J~D
12
PR218
PR218
75K_0402_1%~D
75K_0402_1%~D
61
DMN66D0LDW-7 2N SOT363-6
DMN66D0LDW-7 2N SOT363-6
PC216
PC216
0.01U_0402_25V7K~D
0.01U_0402_25V7K~D
+0.75VSP
+V_DDR_REF
PC218
1 2
PR208
PR208
10K_0402_1%~D
10K_0402_1%~D
1 2
12
PR215
PR215
10K_0402_1%~D
10K_0402_1%~D
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
A
B
C
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
+1.5VSP/0.75VSP
+1.5VSP/0.75VSP
+1.5VSP/0.75VSP
LA-7933
LA-7933
LA-7933
D
53 65Monday, November 07, 2011
53 65Monday, November 07, 2011
53 65Monday, November 07, 2011
0.2
0.2
0.2
of
of
Page 54
A
B
C
D
1.8Volt +/-5%
TDC 0.65A
Peak Current 0.93A
1 1
PL301
PL301
HCB1608KF-121T30_0603
RUN_ON34,45,46,50
SIO_SLP_S3#11,19,34,45,46,50
HCB1608KF-121T30_0603
1 2
@
@
PR304
PR304
0_0402_5%~D
0_0402_5%~D
1 2
PR307
PR307
1 2
0_0402_5%~D
0_0402_5%~D
12
+5V_ALW
2 2
1.8VSP_VIN
PC301
PC301
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
EN_1.8VSP
PR305
@PR305
@
47K_0402_5%~D
47K_0402_5%~D
12
PU301
PU301
10
9
8
5
12
@
@
PC305
PC305
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
PR301
PR301
10K_0402_5%~D
10K_0402_5%~D
4
LX
PVIN
PG
LX
PVIN
SVIN
FB
EN
TP
NC
7
1
11
SYN470DBC_DFN10_3X3
SYN470DBC_DFN10_3X3
12
+3.3V_RUN
1.8V_RUN_PWRGD 46
PL302
PL302
1UH_PH041H-1R0MS_3.8A_20%
1.8VSP_LX
2
3
1.8VSP_FB
6
NC
1UH_PH041H-1R0MS_3.8A_20%
1 2
12
@
@
20K_0402_1%~D
20K_0402_1%~D
PR302
PR302
4.7_1206_5%~D
4.7_1206_5%~D
10K_0402_1%~D
10K_0402_1%~D
SNUB_1.8VSP
12
@
@
PC306
PC306
680P_0603_50V7K~D
680P_0603_50V7K~D
PR303
PR303
PR306
PR306
12
12
12
PC302
PC302
@
@
22P_0402_50V8J~D
22P_0402_50V8J~D
+1.8V_RUNP
<Vo=1.8V> VFB=0.6V
12
12
PC303
PC303
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
Vo=VFB*(1+PR303/PR306)=0.6*(1+20K/10K)=1.8V
PC304
PC304
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
@
@
PJP301
PJP301
+1.8V_RUNP
1 2
PAD-OPEN 3x3m
PAD-OPEN 3x3m
+1.8V_RUN
PR308
PR308
12
+3.3V_ALW
10K_0402_5%~D
10K_0402_5%~D
1.5V_RUN_PWRGD 46
3 3
+3.3V_ALW
PR311
PR311
SIO_SLP_S3#11,19,34,45,46,50
RUN_ON34,45,46,50
4 4
1 2
0_0402_5%~D
0_0402_5%~D
@
@
0_0402_5%~D
0_0402_5%~D
1 2
PL303
PL303
HCB1608KF-121T30_0603
HCB1608KF-121T30_0603
1 2
PR314
PR314
12
PC307
PC307
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
47K_0402_5%~D
47K_0402_5%~D
1.5VSP_VIN
EN_1.5VSP
PR312
@PR312
@
12
PU302
PU302
10
9
8
5
12
@
@
PC311
PC311
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
4
LX
PVIN
PG
LX
PVIN
SVIN
FB
EN
TP
NC
7
1
11
SYN470DBC_DFN10_3X3
SYN470DBC_DFN10_3X3
PL304
PL304
1UH_PH041H-1R0MS_3.8A_20%
1.5VSP_LX
2
3
1.5VSP_FB
6
NC
1UH_PH041H-1R0MS_3.8A_20%
1 2
12
@
@
15K_0402_1%~D
15K_0402_1%~D
PR309
PR309
4.7_1206_5%~D
4.7_1206_5%~D
10K_0402_1%~D
10K_0402_1%~D
SNUB_1.5VSP
12
@
@
PC312
PC312
680P_0603_50V7K~D
680P_0603_50V7K~D
PR310
PR310
PR313
PR313
12
12
12
PC308
PC308
@
@
22P_0402_50V8J~D
22P_0402_50V8J~D
12
12
PC310
PC310
PC309
PC309
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
+1.5V_RUNP
1.5Volt +/-5%
TDC 1.1 A
Peak Current 1.51 A
+1.5V_RUNP
<Vo=1.5V> VFB=0.6V
Vo=VFB*(1+PR310/PR313)=0.6*(1+15K/10K)=1.5V
@
@
PJP302
PJP302
1 2
PAD-OPEN 3x3m
PAD-OPEN 3x3m
+1.5V_RUN
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
+1.8V_RUN
+1.8V_RUN
+1.8V_RUN
LA-7933
LA-7933
LA-7933
D
54 65Monday, November 07, 2011
54 65Monday, November 07, 2011
54 65Monday, November 07, 2011
0.2
0.2
0.2
of
of
Page 55
5
4
3
+V1.05SP_B+
2
@
@
PJP401
PJP401
1 2
PAD-OPEN 4x4m
PAD-OPEN 4x4m
1
+PWR_SRC
12
PC401
PC401
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
PL401
PL401
1 2
12
D D
1.05V_A_PWRGD47
PR403
PR403
1 2
76.8K_0402_1%~D
76.8K_0402_1%~D
PR404
PR404
0_0402_5%~D
0_0402_5%~D
S0 mode be high level
C C
SIO_SLP_A#19,46,50
1 2
PC407
PC407
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
@
@
12
+3.3V_ALW
12
PR401
PR401
100K_0402_5%~D
100K_0402_5%~D
TRIP_+V1.05SP
EN_+V1.05SP
FB_+V1.05SP
RF_+V1.05SP
12
PR406
PR406
470K_0402_5%~D
470K_0402_5%~D
PU401
PU401
1
2
3
4
5
4.99K_0402_1%~D
4.99K_0402_1%~D
VBST
PGOOD
TRIP
DRVH
EN
SW
V5IN
VFB
DRVL
RF
TPS51212DSCR_SON10_3X3
TPS51212DSCR_SON10_3X3
PR407
PR407
TP
12
10
9
8
7
6
11
BST_+V1.05SP
UG_+V1.05SP
SW_+V1.05SP
LG_+V1.05SP
1 2
2.2_0603_5%~D
2.2_0603_5%~D
+5V_ALW
PC408
PC408
1U_0603_10V6K~D
1U_0603_10V6K~D
PR402
PR402
PC405
PC405
0.22U_0603_16V7K~D
0.22U_0603_16V7K~D
12
PQ402
PQ402
FDMC7692S_POWER33-8-5
FDMC7692S_POWER33-8-5
12
PC499
PC499
@
@
56P_0402_50V8J~D
56P_0402_50V8J~D
PQ401
PQ401
FDMC8884_POWER33-8-5
FDMC8884_POWER33-8-5
3 5
241
3 5
241
1UH_ETQP3W1R0WFN_11.8A_20%
1UH_ETQP3W1R0WFN_11.8A_20%
12
@
@
PR405
PR405
4.7_1206_5%~D
4.7_1206_5%~D
SNUB_+V1.05SP
@
@
12
PC409
PC409
680P_0603_50V7K~D
680P_0603_50V7K~D
12
12
PC403
PC403
PC402
PC402
4.7U_0805_25V6K~D
4.7U_0805_25V6K~D
2200P_0402_50V7K~D
2200P_0402_50V7K~D
PC404
PC404
4.7U_0805_25V6K~D
4.7U_0805_25V6K~D
+1.05V_MP
1
+
+
PC406
PC406
2
220U_D2_4VM~D
220U_D2_4VM~D
+1.05Volt +/- 5%
PR408
PR408
10K_0402_1%~D
10K_0402_1%~D
1 2
+1.05V_MP
2
PJP402
PJP402
JUMP_43X118@
JUMP_43X118@
112
+1.05V_M
TDC 4.6 A
Peak Current 6.7 A
OCP current 8.7 A
B B
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
+1.05V_M
+1.05V_M
+1.05V_M
LA-7933
LA-7933
LA-7933
55 65Monday, November 07, 2011
55 65Monday, November 07, 2011
55 65Monday, November 07, 2011
1
0.2
0.2
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of
of
of
Page 56
5
4
3
+V1.05S_VCCPP_B+
2
PJP501
@ PJP501
@
2
112
JUMP_43X118
JUMP_43X118
1
+PWR_SRC
+3.3V_RUN
12
D D
1.05V_VTTPWRGD47,57
PR503
PR503
102K_0402_1%
102K_0402_1%
PC507
PC507
@
@
1 2
12
PR504
PR504
0_0402_5%~D
0_0402_5%~D
CPU_VTT_ON46
C C
1 2
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
TRIP_+V1.05S_VCCPP
EN_+V1.05S_VCCPP
FB_+V1.05S_VCCPP
RF_+V1.05S_VCCPP
12
PR506
PR506
470K_0402_5%~D
470K_0402_5%~D
12
PR501
PR501
100K_0402_5%~D
100K_0402_5%~D
PU501
PU501
1
PGOOD
2
TRIP
3
EN
4
VFB
5
RF
TPS51212DSCR_SON10_3X3
TPS51212DSCR_SON10_3X3
PR508
PR508
4.99K_0402_1%~D
4.99K_0402_1%~D
12
VBST
DRVH
V5IN
DRVL
PC501
PQ501
PQ501
FDMC8884_POWER33-8-5
FDMC8884_POWER33-8-5
PC505
PC505
0.22U_0603_16V7K~D
PR502
PR502
1 2
2.2_0603_5%~D
BST_+V1.05S_VCCPP
10
UG_+V1.05S_VCCPP
9
SW_+V1.05S_VCCPP
8
SW
7
LG_+V1.05S_VCCPP
6
11
TP
2.2_0603_5%~D
0.22U_0603_16V7K~D
12
+5V_ALW
PC506
PC506
1U_0603_10V6K~D
1U_0603_10V6K~D
FDMC7692S_POWER33-8-5
FDMC7692S_POWER33-8-5
56P_0402_50V8J~D
56P_0402_50V8J~D
@
@
PQ502
PQ502
PC599
PC599
3 5
241
1UH_ETQP3W1R0WFN_11.8A_20%
1UH_ETQP3W1R0WFN_11.8A_20%
12
@
@
PR505
PR505
4.7_1206_5%~D
4.7_1206_5%~D
SNUB_+V1.05S_VCCPP
@
@
12
PC509
12
3 5
241
PC509
680P_0603_50V7K~D
680P_0603_50V7K~D
PC501
PL501
PL501
1 2
+3.3V_RUN
12
PR512
@ PR512
PR511
PR511
10K_0402_1%~D
10K_0402_1%~D
1 2
B B
12
PR515
PR515
10_0402_1%~D
10_0402_1%~D
@
@
@
71.5K_0402_1%~D
71.5K_0402_1%~D
PQ503
PQ503
@
@
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
PR514
PR514
10K_0402_5%~D
10K_0402_5%~D
@
@
@
@
12
PC510
PC510
1 2
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
VCCP_PWRCTRL 11
From GPIO
VCCP_PWRCTRL = "High" , Vo = 1.05V (SNB)
VCCP_PWRCTRL = "Low" , Vo = 1V (IVB)
13
D
D
2
G
G
S
S
12
12
PC502
PC502
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
2200P_0402_50V7K~D
2200P_0402_50V7K~D
+1.05VTTP
12
PC503
PC503
PC504
PC504
4.7U_0805_25V6K~D
4.7U_0805_25V6K~D
4.7U_0805_25V6K~D
4.7U_0805_25V6K~D
1
+
+
PC508
PC508
2
330U_2.5V_M
330U_2.5V_M
12
@
@
PC511
PC511
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
PR509
PR509
0_0402_5%~D
0_0402_5%~D
1 2
PR510
PR510
1 2
0_0402_5%~D
0_0402_5%~D
+1.05Volt +/- 5%
TDC 6.6 A
Peak Current 8.5 A
OCP current 11 A
PJP502
PJP502
2
112
JUMP_43X118@
JUMP_43X118@
+1.05VTTP
VTT_SENSE 10
VSSIO_SENSE_R 10
+1.05V_RUN_VTT
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet of
Compal Electronics, Inc.
+1.05V_RUN_VTT
+1.05V_RUN_VTT
+1.05V_RUN_VTT
LA-7933
LA-7933
LA-7933
56 65Monday, November 07, 2011
56 65Monday, November 07, 2011
56 65Monday, November 07, 2011
1
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0.2
of
of
Page 57
5
4
3
2
1
VID [0] VID[1] VCCSA Vout
The 1k PD on the VCCSA VIDs are empty.
These should be stuffed to ensure that
VCCSA VID is 00 prior to VCCIO stability.
PR601
PR601
1K_0402_5%~D
D D
PR603
PR603
0_0402_5%~D
0_0402_5%~D
VCCSAPWROK47
1 2
PR602
PR602
100K_0402_5%~D
100K_0402_5%~D
+3.3V_RUN
12
+VCCSA_PWRGD+VCCSA_PWRGD
1K_0402_5%~D
12
PR613
PR613
0_0402_5%
0_0402_5%
1 2
PR614 0_0402_5%~DPR614 0_0402_5%~D
1 2
PR604
PR604
1K_0402_5%~D
1K_0402_5%~D
12
VCCSA_VID_1 11
VCCSA_VID_0 11
+5V_ALW
PR605
PR605
10_0402_1%~D
12
PC618
PC618
3300P_0402_50V7K~D
3300P_0402_50V7K~D
10_0402_1%~D
PU601
PU601
19
PGND
20
PGND
21
PGND
22
VIN
23
VIN
24
VIN
12
PC602
PC602
2.2U_0603_10V7K~D
2.2U_0603_10V7K~D
1 2
C C
PC615
PC615
PC614
PC614
12
12
10U_0805_25V6K
10U_0805_25V6K
PC613
PC613
PC612
+5V_ALW
@
@
PAD-OPEN 43X118
PAD-OPEN 43X118
PJP601
PJP601
12
PC612
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
2200P_0402_50V7K~D
2200P_0402_50V7K~D
GNDA_VCCSA
B B
10U_0805_25V6K
10U_0805_25V6K
1 2
1 2
+VCCSA_PWR_SRC
PC617
PC617
0.22U_0402_10V6K~D
0.22U_0402_10V6K~D
PC601
PC601
1 2
12
1U_0603_10V6K~D
1U_0603_10V6K~D
18
17
16
V5FILT
V5DRV
TPS51461RGER_QFN24_4X4~D
TPS51461RGER_QFN24_4X4~D
GND
VREF
3
1
2
PR612
PR612
5.1K_0402_1%~D
5.1K_0402_1%~D
12
PGOOD
COMP
PC619
PC619
+VCCSA_EN
14
15
13
EN
VID0
VID1
VOUT
SLEW
5
4
1 2
0.01U_0402_25V7K~D
0.01U_0402_25V7K~D
+VCCSA_BT
12
BST
+VCCSA_PHASE
11
SW
10
SW
9
SW
8
SW
7
SW
25
TP
MODE
6
@ PR609
@
33K_0402_5%~D
33K_0402_5%~D
PR609
PR606
PR606
0_0402_5%~D
0_0402_5%~D
1 2
PR607
PR607
1 2
2.2_0603_5%~D
2.2_0603_5%~D
12
.1U_0603_16V7K~D
.1U_0603_16V7K~D
+VCCSA_BT_1
12
@
@
PR608
PR608
4.7_1206_5%~D
4.7_1206_5%~D
+VCCSA_SNUB
@
@
12
PC616
PC616
680P_0603_50V7K~D
680P_0603_50V7K~D
1.05V_VTTPWRGD 47,56
PC603
PC603
1 2
0.47UH_FDVE0630-H-R47M=P3_17.7A_20%
0.47UH_FDVE0630-H-R47M=P3_17.7A_20%
1 2
PL601
PL601
PC605
PC605
PC604
PC604
1 2
@
@
@
@
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
0 0 0.9V
0 1 0.8V
1 0 0.725V
1 1 0.675V
output voltage adjustable network
VCCSA
TDC 4.2A
Peak Current 6A
OCP current 7.2A
1 2
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
12
PC606
PC606
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
PR610
PR610
100_0402_5%~D
100_0402_5%~D
PR611
PR611
0_0402_5%~D
0_0402_5%~D
1 2
PC607
PC607
PC608
PC608
1 2
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
12
1 2
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
12
PC610
PC610
PC609
PC609
2200P_0402_50V7K~D
2200P_0402_50V7K~D
VCCSA_SENSE 11
1 2
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
PC611
PC611
+VCCSA_P
1 2
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
@
@
PJP602
PJP602
+VCCSA_P
1 2
PAD-OPEN 4x4m
PAD-OPEN 4x4m
@
@
PJP603
PJP603
PAD-OPEN1x1m
PAD-OPEN1x1m
+VCC_SA
12
GNDA_VCCSA
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
+VCC_SA
+VCC_SA
+VCC_SA
LA-7933
LA-7933
LA-7933
1
57 65Monday, November 07, 2011
57 65Monday, November 07, 2011
57 65Monday, November 07, 2011
0.2
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of
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Page 58
5
VCC_AXG_SENSE11
VSS_AXG_SENSE11
D D
4
PC703
PC703
@
@
12
330P_0402_50V7K~D
330P_0402_50V7K~D
PC706
PC706
1 2
0.01U_0402_50V7K
0.01U_0402_50V7K
PR702
PR702
3.65K_0402_1%
3.65K_0402_1%
PR704
PR704
499_0402_1%~D
499_0402_1%~D
12
PC704
PC704
12
470P_0402_50V7K~D
470P_0402_50V7K~D
12
PR701
PR701
2K_0402_1%
2K_0402_1%
PR703
PR703
267K_0402_1%
267K_0402_1%
3
PC701
PC701
330P_0402_50V7K~D
330P_0402_50V7K~D
12
PC702
PC702
12
150P_0402_50V8F~D
150P_0402_50V8F~D
PC705
PC705
1 2
68P_0402_50V8J~D
68P_0402_50V8J~D
2
12
12
12
PR705
PR705
169K_0402_1%~D
169K_0402_1%~D
VCC_core
TDC 70 A
Peak Current 97A
OCP current 116A
Load line 1.9
1
VSUMG+59
VSUMG-59
PR714
PR714
1 2
3.83K_0402_1%
3.83K_0402_1%
C C
H_PROCHOT#7,26,47,60
+1.05V_RUN_VTT
PR737 54.9_0402_1%PR737 54.9_0402_1%
PR743 75_0402_5%@ PR743 75_0402_5%@
B B
PR745 130_0402_1%PR745 130_0402_1%
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
A A
12
PR706
PR706
2.61K_0402_1%
2.61K_0402_1%
12
PH701
PH701
12
10KB_0402_5%_ERTJ0ER103J
10KB_0402_5%_ERTJ0ER103J
PC718
PC718
VSUMG-59
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
PH702
PH702
470K_0402_5%_ TSM0B474J4702RE
470K_0402_5%_ TSM0B474J4702RE
PR717
PR717
12
27.4K_0402_1%
27.4K_0402_1%
PR732
@PR732
@
1 2
0_0402_5%~D
0_0402_5%~D
SCLK
12
ALERT#
12
SDA
12
PC740
PC740
12
12
PR708
PR708
11K_0402_1%
11K_0402_1%
12
VIDSCLK10
VIDALERT_N10
VIDSOUT10
12
PC707
PC707
12
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
PC732
PC732
12
12
PC709
PC709
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
PC708
PC708
PC719
PC719
12
0.22U_0402_16V7K~D
0.22U_0402_16V7K~D
PC720
PC720
12
0.22U_0402_16V7K~D
0.22U_0402_16V7K~D
+5V_ALW
PR722 0_0402_5%~DPR722 0_0402_5%~D
1 2
PR725 0_0402_5%~DPR725 0_0402_5%~D
1 2
PR727 0_0402_5%~DPR727 0_0402_5%~D
1 2
1 2
PR729 0_0402_5%~DPR729 0_0402_5%~D
IMVP_VR_ON46
1.05V_0.8V_PWROK17,47
1 2
3.83K_0402_1%
3.83K_0402_1%
43P_0402_50V8J
43P_0402_50V8J
0.047U_0402_25V7K~D
0.047U_0402_25V7K~D
ISEN1G59
ISEN2G59
@PR720
@
1 2
0_0402_5%~D
0_0402_5%~D
PR733
PR733
+5V_ALW
VSUM+
PR753
PR753
PH704
PH704
VSUM-
PC755
PC755
PR710
@PR710
@
649_0402_1%~D
649_0402_1%~D
1 2
PR712
PR712
374_0402_1%
374_0402_1%
1 2
PR720
SCLK
ALERT#
SDA
VR_HOT#
PR730 0_0402_5%~D@PR730 0_0402_5%~D@
1 2
1 2
PR731 0_0402_5%~DPR731 0_0402_5%~D
12
PH703
PH703
470K_0402_5%_ TSM0B474J4702RE
470K_0402_5%_ TSM0B474J4702RE
PR735
PR735
27.4K_0402_1%
27.4K_0402_1%
12
@
@
PC733 10P_0402_25V8J
PC733 10P_0402_25V8J
COMP
PR740 0_0402_5%~D@PR740 0_0402_5%~D@
1 2
PC738
PC738
12
0.22U_0402_6.3V6K
0.22U_0402_6.3V6K
PC739
PC739
VSUM-
12
12
2.61K_0402_1%
2.61K_0402_1%
12
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
10KB_0402_5%_ERTJ0ER103J
10KB_0402_5%_ERTJ0ER103J
0.22U_0402_6.3V6K
0.22U_0402_6.3V6K
PC742
PC742
0.22U_0402_6.3V6K
0.22U_0402_6.3V6K
12
PR754 11K_0402_1%PR754 11K_0402_1%
12
12
12
PC750
PC750
12
@PC711
@
3300P_0402_50V7K~D
3300P_0402_50V7K~D
ISEN1G
ISEN2G
NTCG
VR_EN
NTC
12
12
0.01U_0402_25V7K~D
0.01U_0402_25V7K~D
PC751
PC751
@PR760
@
1 2
649_0402_1%~D
649_0402_1%~D
PC711
PU702
PU702
1
ISUMPG
2
ISEN1G
3
ISEN2G
4
NTCG
5
SCLK
6
ALERT#
7
SDA
8
VR_HOT#
9
VR_ON
10
NTC
41
TP
12
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
PC752
PC752
604_0402_1%
604_0402_1%
PR760
2200P_0402_25V7K~D
2200P_0402_25V7K~D
ISEN3
PR757
PR757
@
@
1 2
40
ISUMNG
ISEN3/FB2
11
ISEN2
PC756
PC756
39
38
FBG
RTNG
ISEN212FB17ISUMP
ISEN1
13
ISEN1
12
PGOODG
37
COMPG
14
PR707
@PR707
@
1 2
0_0402_5%~D
0_0402_5%~D
35
33
32
31
36
34
PWM2G
BOOT1G
PGOODG
LGATE1G
PHASE1G
UGATE1G
BOOT2
UGATE2
PHASE2
LGATE2
LGATE1
PHASE1
UGATE1
COMP
PGOOD
ISUMN
RTN
BOOT1
18
19
15
16
20
ISL95836HRTZ-T_TQFN40_5X5~D
ISL95836HRTZ-T_TQFN40_5X5~D
PGOOD
COMP
PR734 0_0402_5%~DPR734 0_0402_5%~D
1 2
PC753
PC753
IMVP_PWRGD
PWMG2 59
LGATE1G 59
PHASE1G 59
UGATE1G 59
BOOT1G 59
30
29
28
27
26
VCCP
25
VDD
24
PWM3
23
22
21
BOOT1
PR744
PR744
12
499_0402_1%~D
499_0402_1%~D
PR748
PR748
3.57K_0402_1%
3.57K_0402_1%
@
@
PC749
PC749
1 2
1 2
0.01U_0402_50V7K
0.01U_0402_50V7K
PR736 1.91K_0402_1%PR736 1.91K_0402_1%
PC735
PC735
470P_0402_50V7K~D
470P_0402_50V7K~D
12
330P_0402_50V7K
330P_0402_50V7K
12
PR709
PR709
BOOT2
UGATE2
PHASE2
LGATE2
VCCP
LGATE1
PHASE1
UGATE1
IMVP_PWRGD 46
12
PR749
PR749
267K_0402_1%
267K_0402_1%
PR752
PR752
2K_0402_1%
2K_0402_1%
1 2
+5V_ALW
12
12
PC710
PC710
0_0603_5%~D
0_0603_5%~D
PWM3_1
12
PR713
PR713
PWM3
+3.3V_RUN
PC736
PC736
12
68P_0402_50V8J~D
68P_0402_50V8J~D
PC741
PC741
12
150P_0402_50V8F~D
150P_0402_50V8F~D
PC743
PC743
680P_0402_50V7K~D
680P_0402_50V7K~D
1 2
VCCSENSE 10
VSSSENSE 10
BOOT1
LGATE1
1U_0603_10V6K~D
1U_0603_10V6K~D
PU701
PU701
6
VCC
7
FCCM
3
PWM
4
GND
9
TP
ISL6208BCRZ-T_QFN8_2X2
ISL6208BCRZ-T_QFN8_2X2
@PR715
@
0_0402_5%~D
0_0402_5%~D
1 2
0_0402_5%~D
0_0402_5%~D
12
PC722
PC722
1U_0603_10V6K~D
1U_0603_10V6K~D
UGATE2
PHASE2
BOOT2
LGATE2
5.76K_0402_1%
5.76K_0402_1%
12
1 2
PR755
PR755
2.2_0603_5%~D
2.2_0603_5%~D
BOOT3
2.2_0603_5%~D
2.2_0603_5%~D
1
UGATE
2
BOOT
8
PHASE
5
LGATE
PR715
PR718
PR718
1 2
0_0603_5%~D
0_0603_5%~D
PR726
PR726
1_0402_1%~D
1_0402_1%~D
12
PC723
PC723
1U_0603_10V6K~D
1U_0603_10V6K~D
PR738
PR738
2.2_0603_5%~D
2.2_0603_5%~D
56P_0402_50V8J~D
56P_0402_50V8J~D
PR750
PR750
UGATE1
CSD87351Q5D_SON8~D
CSD87351Q5D_SON8~D
PHASE1
12
1 2
PC754
PC754
0.22U_0603_16V7K~D
0.22U_0603_16V7K~D
@
@
PC796
PC796
1 2
56P_0402_50V8J~D
56P_0402_50V8J~D
PR711
PR711
12
PC712
PC712
0.22U_0603_16V7K~D
0.22U_0603_16V7K~D
UGATE3
PHASE3
LGATE3
LGATE3
PQ701
PQ701
CSD87351Q5D_SON8~D
CSD87351Q5D_SON8~D
+5V_ALW
PC792
PC792
12
@
@
56P_0402_50V8J~D
56P_0402_50V8J~D
PQ703
PQ703
CSD87351Q5D_SON8~D
CSD87351Q5D_SON8~D
1 2
12
PC734
PC734
0.22U_0603_16V7K~D
0.22U_0603_16V7K~D
PC794
PC794
@
@
1 2
PQ705
PQ705
2
3
4
1 2
2
3
4
1 2
2
3
4
1
8
+VCC_PWR_SRC
PQ702
PQ702
CSD87351Q5D_SON8~D
CSD87351Q5D_SON8~D
UGATE3
PHASE3
1
LGATE3
7
6
5
8
+VCC_PWR_SRC
PQ704
PQ704
CSD87351Q5D_SON8~D
CSD87351Q5D_SON8~D
UGATE2
1
7
6
5
PC793
PC793
@
@
56P_0402_50V8J~D
56P_0402_50V8J~D
8
+VCC_PWR_SRC
PQ706
PQ706
CSD87351Q5D_SON8~D
CSD87351Q5D_SON8~D
UGATE1
2
PHASE1
3
LGATE1
4
@
@
PC795
PC795
7
6
1 2
5
56P_0402_50V8J~D
56P_0402_50V8J~D
2
3
4
PC791
PC791
56P_0402_50V8J~D
56P_0402_50V8J~D
1 2
@
@
2
PHASE2
3
LGATE2
4
1 2
1
8
+VCC_PWR_SRC
12
1
PC713
PC713
10U_0805_25V6K
10U_0805_25V6K
7
6
5
8
1
PC727
PC727
10U_0805_25V6K
10U_0805_25V6K
7
6
5
8
PR739
PR739
12
PC744
PC744
PC745
PC745
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
7
6
5
12
PR756
PR756
P1_SNUB
12
12
PC714
PC714
PC715
PC715
@
@
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
12
ISEN3
PR721
PR721
P3_SNUB
4.7_1206_5%~D
4.7_1206_5%~D
12
VSUM+
PC721
PC721
680P_0603_50V7K~D
680P_0603_50V7K~D
12
12
PC728
PC728
@
@
10U_0805_25V6K
10U_0805_25V6K
12
ISEN2
P2_SNUB
4.7_1206_5%~D
4.7_1206_5%~D
12
10K_0603_1%~D
10K_0603_1%~D
PC737
PC737
VSUM+
680P_0603_50V7K~D
680P_0603_50V7K~D
3.65K_0603_1%
3.65K_0603_1%
12
12
PC746
PC746
@
@
10U_0805_25V6K
10U_0805_25V6K
4.7_1206_5%~D
4.7_1206_5%~D
ISEN1
10K_0603_1%~D
10K_0603_1%~D
PC757
PC757
VSUM+
680P_0603_50V7K~D
680P_0603_50V7K~D
3.65K_0603_1%
3.65K_0603_1%
VSUM-
FBMA-L11-453215-121LMA90T_2
FBMA-L11-453215-121LMA90T_2
12
12
10K_0603_1%~D
10K_0603_1%~D
PC729
PC729
10U_0805_25V6K
10U_0805_25V6K
PR741
PR741
1 2
PR746
PR746
1 2
PR758
PR758
1 2
PR761
PR761
1 2
12
PC716
PC716
PC717
PC717
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
2200P_0402_50V7K~D
2200P_0402_50V7K~D
PL701
PL701
0.22UH_FDUE0640-H-R22M=P3_25A_20%~D
0.22UH_FDUE0640-H-R22M=P3_25A_20%~D
PR716
PR716
1 2
P3_SW
PR724
PR724
1 2
3.65K_0603_1%
3.65K_0603_1%
12
PC731
PC731
VSUM-
PC747
PC747
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
PR728
PR728
VSUM-
1_0402_5%
1_0402_5%
12
12
PC730
PC730
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
2200P_0402_50V7K~D
2200P_0402_50V7K~D
0.22UH_FDUE0640-H-R22M=P3_25A_20%~D
0.22UH_FDUE0640-H-R22M=P3_25A_20%~D
P2_SW
PR751
PR751
12
1_0402_5%
1_0402_5%
12
12
PC748
PC748
2200P_0402_50V7K~D
2200P_0402_50V7K~D
PL703
PL703
0.22UH_FDUE0640-H-R22M=P3_25A_20%~D
0.22UH_FDUE0640-H-R22M=P3_25A_20%~D
P1_SW
PR763
PR763
12
1_0402_5%
1_0402_5%
PL710
PL710
1 2
12
12
PL702
PL702
12
+VCC_CORE
@PR719
@
10K_0402_1%~D
10K_0402_1%~D
@PR723
@
10K_0402_1%~D
10K_0402_1%~D
1
+
+
PC724
PC724
2
100U_25V_M~D
100U_25V_M~D
12
+VCC_CORE
@PR742
@
10K_0402_1%~D
10K_0402_1%~D
@PR747
@
10K_0402_1%~D
10K_0402_1%~D
+VCC_CORE
PR759
@PR759
@
10K_0402_1%~D
10K_0402_1%~D
PR762
@PR762
@
10K_0402_1%~D
10K_0402_1%~D
+PWR_SRC
PR719
ISEN1
12
PR723
ISEN2
12
1
1
+
+
+
+
PC725
PC725
PC726
PC726
2
2
100U_25V_M~D
100U_25V_M~D
PR742
ISEN1
12
PR747
ISEN3
12
ISEN2
12
ISEN3
12
100U_25V_M~D
100U_25V_M~D
DELL CONFIDENTIAL/PROPRIETARY
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
+VCC_CORE
+VCC_CORE
+VCC_CORE
LA-7933
LA-7933
LA-7933
1
58 65
58 65
58 65
0.2
0.2
0.2
of
of
of
Page 59
5
VCC_GFXCORE
TDC 38A
Peak Current 50A
OCP current 57.18A
Load line 3.9
D D
4
3
2
1
+VCC_PWR_SRC
12
+5V_ALW
12
12
PC763
PC763
PR776
PR776
PWMG258
C C
0_0603_5%~D
0_0603_5%~D
PU703
PU703
6
VCC
7
FCCM
3
PWM
4
GND
9
TP
ISL6208BCRZ-T_QFN8_2X2
ISL6208BCRZ-T_QFN8_2X2
1U_0603_10V6K~D
1U_0603_10V6K~D
UGATE
PHASE
BOOT
LGATE
UGATE2G
PR764
PR764
2.2_0603_5%~D
2.2_0603_5%~D
1
BOOT2G
2
8
5
PHASE2G
LGATE2GLGATE2G
0.22U_0603_16V7K~D
0.22U_0603_16V7K~D
CSD87351Q5D_SON8~D
CSD87351Q5D_SON8~D
12
1 2
PC764
PC764
@
@
PC797
PC797
56P_0402_50V8J~D
56P_0402_50V8J~D
PQ707
PQ707
1 2
1
2
7
3
4
6
5
8
12
PC759
PC759
PC758
PC758
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
0.22UH_FDUE0640-H-R22M=P3_25A_20%~D
0.22UH_FDUE0640-H-R22M=P3_25A_20%~D
GP2_SW
12
12
12
PR765
PR765
GP2_SNUB
PR766
PR766
PR767
PR767
4.7_1206_5%~D
4.7_1206_5%~D
12
3.65K_0603_1%
3.65K_0603_1%
10K_0603_1%~D
10K_0603_1%~D
PC765
PC765
680P_0603_50V7K~D
680P_0603_50V7K~D
PC761
PC761
PL704
PL704
12
ISEN2G 58
12
PC762
PC762
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
2200P_0402_50V7K~D
2200P_0402_50V7K~D
VSUMG+ 58
12
+VCC_GFXCORE
PR768 1_0402_5%PR768 1_0402_5%
12
VSUMG- 58
PR769 10K_0402_1%~DPR769 10K_0402_1%~D
1 2
ISEN1G 58
+VCC_PWR_SRC
12
12
PC766
PC766
PC767
PQ708
PQ708
CSD87351Q5D_SON8~D
LGATE1G58
CSD87351Q5D_SON8~D
2
3
4
PC798
PC798
12
56P_0402_50V8J~D
56P_0402_50V8J~D
@
@
1
8
UGATE1G58
PHASE1G58
PC771
B B
BOOT1G58
A A
PC771
0.22U_0603_16V7K~D
0.22U_0603_16V7K~D
1 2
12
PR775
PR775
2.2_0603_5%~D
2.2_0603_5%~D
PC767
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
7
6
5
12
PR770
PR770
GP1_SNUB
4.7_1206_5%~D
4.7_1206_5%~D
12
PC772
PC772
680P_0603_50V7K~D
680P_0603_50V7K~D
12
12
PC769
PC769
PC770
PC770
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
2200P_0402_50V7K~D
2200P_0402_50V7K~D
PL705
PL705
0.22UH_FDUE0640-H-R22M=P3_25A_20%~D
0.22UH_FDUE0640-H-R22M=P3_25A_20%~D
GP1_SW
PR771
PR771
PR772
PR772
1 2
1 2
3.65K_0603_1%
3.65K_0603_1%
10K_0603_1%~D
10K_0603_1%~D
VSUMG+ 58
ISEN1G58
PR774
PR774
1 2
10K_0402_1%~D
10K_0402_1%~D
+VCC_GFXCORE
ISEN2G 58
VSUMG- 58
12
12
PR773
PR773
1_0402_5%
1_0402_5%
DELL CONFIDENTIAL/PROPRIETARY
Title
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
+VCC_GFXCORE
+VCC_GFXCORE
+VCC_GFXCORE
LA-7933
LA-7933
LA-7933
1
59 65
59 65
59 65
of
of
of
0.2
0.2
0.2
Page 60
5
+DC_IN_SS
D D
PD901@
PD901@
2 1
ES2AA-13-F
ES2AA-13-F
PQ901 SI7149DPPQ901 SI7149DP
5
4
1
2
3
PR902
PR902
1 2
0_0402_5%~D
0_0402_5%~D
DC_BLOCK_GC 61
E2 AC_OK=17.7 Volt
PR1313
TI bq24745 = 316K
Intersil ISL88731 = 226K
Maxim = 383K
49.9K_0402_1%~D
49.9K_0402_1%~D
0.01U_0402_25V7K~D
0.01U_0402_25V7K~D
GNDA_CHG
C C
CHARGER_SMBCLK47
CHARGER_SMBDAT47
Vref
TI bq24747 = 3.3V
Intersil ISL88731C = 3.2V
VDDP
TI bq24747 = 6V
Intersil ISL88731C = 5.1V
PR914
PR914
12
PC909
PC909
12
+5V_ALW
PC916
PC916
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
+SDC_IN
PR913
PR913
1 2
226K_0402_1%~D
226K_0402_1%~D
GNDA_CHG
MAX8731A_LDO
ACAV_IN16,25,47,61
12
MAX8731_IINP25
MAX8731_REF
12
PR912
PR911
PR911
PR912
@
@
10K_0402_1%~D
10K_0402_1%~D
PR916
PR916
@
@
15.8K_0402_1%~D
15.8K_0402_1%~D
PR925
PR925
10K_0402_5%~D
10K_0402_5%~D
12
12
8.45K_0402_1%~D
8.45K_0402_1%~D
+CHGR_DC_IN61
12
PR915
PR915
1 2
0_0402_5%~D
0_0402_5%~D
1 2
PR920
@ PR920
@
200K_0402_5%~D
200K_0402_5%~D
12
PR922
PR922
PC921
@PC921
@
4.7K_0402_5%~D
4.7K_0402_5%~D
120P_0402_50VNPO~D
120P_0402_50VNPO~D
1 2
12
12
PC922
PC922
PC923
PC923
@
@
220P_0402_50V8J~D
220P_0402_50V8J~D
0.01U_0402_25V7K~D
0.01U_0402_25V7K~D
Maximum charging current is 7.2A
DYN_TUR_CURRENT_SET#
B B
210W
240W
DYN_TUR_CURRNT_SET#47
A A
High
Low
+3.3V_ALW2
12
PR937
PR937
150K_0402_1%~D
150K_0402_1%~D
12
12
PR943
PR943
PR944
PR944
178K_0402_1%~D
178K_0402_1%~D
93.1K_0402_1%~D
93.1K_0402_1%~D
13
D
D
2
G
PQ909
G
PQ909
S
S
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
MAX8731_IINP
12
PC941
PC941
100P_0402_50V8J~D
100P_0402_50V8J~D
PR939
PR939
20K_0402_1%~D
20K_0402_1%~D
1 2
12
+5V_ALW
PC940
PC940
220P_0402_50V8J~D
220P_0402_50V8J~D
Adapter Protection Circuit for Turbo Mode
CSS_GC61
+DOCK_PWR_BAR
+DC_IN_SS
PC920
PC920
@
@
12
PC926
PC926
PC927
PC927
@
@
0.01U_0402_25V7K~D
0.01U_0402_25V7K~D
12
PC936
PC936
@
@
100P_0402_50V8J~D
100P_0402_50V8J~D
4
PD902
PD902
2
3
BAT54CW_SOT323~D
BAT54CW_SOT323~D
PR909
@PR909
@
1 2
1_0805_5%~D
1_0805_5%~D
GNDA_CHG
PC918
@PC918
@
12
2200P_0402_50V7K~D
2200P_0402_50V7K~D
1 2
56P_0402_50V8~D
56P_0402_50V8~D
12
PC924
PC924
@
@
1U_0603_10V6K~D
1U_0603_10V6K~D
0.01U_0402_25V7K~D
0.01U_0402_25V7K~D
12
PC937
PC937
@
@
0.01U_0402_25V7K~D
0.01U_0402_25V7K~D
5
+
6
-
+SDC_IN
PR903
PR903
1 2
0_0402_5%~D
0_0402_5%~D
1
PC907
PC907
0.1U_0805_50V7M~D
0.1U_0805_50V7M~D
@PR921
@
1 2
7.5K_0402_5%~D
7.5K_0402_5%~D
MAX8731_REF
PR924
@ PR924
@
1 2
10K_0402_5%~D
10K_0402_5%~D
12
GNDA_CHG
PR936
PR936
1.8M_0402_1%
1.8M_0402_1%
1 2
8
PU902B
PU902B
P
7
O
G
LM393DR_SO8~D
LM393DR_SO8~D
4
26
@
@
12
NTR4502PT1G_SOT23-3~D
NTR4502PT1G_SOT23-3~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
GNDA_CHG
+DCIN
12
MAX8731_IINP
PR921
12
PC928
PC928
@
@
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
+5V_ALW
PR931
PR931
Iada=0~12.3A(240W)
1
2
EMC1700_SENSE_P
PC901
PC901
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
13
D
D
2
G
G
PQ903
PQ903
S
S
CSSP_1
100K_0402_5%~D
100K_0402_5%~D
12
PR905
PR905
10_0402_5%~D
10_0402_5%~D
PC904
PC904
0.047U_0402_25V7K~D
0.047U_0402_25V7K~D
1 2
1
PU901
PU901
22
DCIN
ICREF
2
ACIN
13
ACOK
11
VDDSMB
10
SCL
9
SDA
14
NC
8
VICM
6
FBO
5
EAI
4
EAO
3
VREF
7
CE
12
GND
29
TP
ISL88731C_QFN28_5X5~D
ISL88731C_QFN28_5X5~D
1 2
PR935
PR935
221K_0402_1%~D
221K_0402_1%~D
0_0402_5%~D
0_0402_5%~D
1 2
61
2
PQ908A
PQ908A
DMN66D0LDW-7 2N_SOT363-6~D
DMN66D0LDW-7 2N_SOT363-6~D
PR901
PR901
0.01_2512_1%~D
0.01_2512_1%~D
2
G
G
PR904
PR904
12
PC905
PC905
1 2
27
28
ICOUT
CSSP
CSSN
BOOT
VDDP
UGATE
PHASE
LGATE
PGND
CSOP
CSON
3
4
3
EMC1700_SENSE_N26
13
D
D
PQ902
PQ902
NTR4502PT1G_SOT23-3~D
NTR4502PT1G_SOT23-3~D
S
S
CSSN_1
12
PR906
PR906
10_0402_5%~D
10_0402_5%~D
PC906
PC906
1 2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
ICOUT
26
2.2_0603_1%~D
2.2_0603_1%~D
BOOT
25
1 2
MAX8731A_LDO
21
24
23
12
@ PC917
@
220P_0402_50V7K~D
220P_0402_50V7K~D
20
19
18
17
VFB
15
VFB
16
NC
GNDA_CHG
H_PROCHOT# 7,26,47,58
3
5
PQ908B
PQ908B
4
DMN66D0LDW-7 2N_SOT363-6~D
DMN66D0LDW-7 2N_SOT363-6~D
+PWR_SRC
PQ904A
PQ904A
NTGD4161PT1G_TSOP6~D
NTGD4161PT1G_TSOP6~D
S
S
D
D
G
G
1
12
PR907
PR907
100K_0402_1%~D
100K_0402_1%~D
PR908
PR908
100K_0402_1%~D
100K_0402_1%~D
GNDA_CHG
PR918
PR918
4.7_0603_5%~D
4.7_0603_5%~D
PR917
PR917
BOOT_D
12
PC910
PC910
PD903
PD903
@
@
CHG_UGATE
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
PR919
PR919
0_0603_5%~D
0_0603_5%~D
12
PC917
PR926
PR926
1 2
100_0402_5%~D
100_0402_5%~D
PJP902
PJP902
1 2
PAD-OPEN1x1m
PAD-OPEN1x1m
+VCHGR_B
CHG_LGATE
PC938
PC938
PL901
PL901
1UH_PCMB053T-1R0MS_7A_20%
1UH_PCMB053T-1R0MS_7A_20%
65
NTGD4161PT1G_TSOP6~D
NTGD4161PT1G_TSOP6~D
12
12
BAT54HT1G_SOD323-2~D
BAT54HT1G_SOD323-2~D
+VCHGR
12
100P_0402_50V8J~D
100P_0402_50V8J~D
1 2
PAD-OPEN 4x4m
PAD-OPEN 4x4m
PQ904B
PQ904B
S
S
G
G
3
1 2
PC911
PC911
1 2
MAX8731_REF
+DC_IN
PR932
PR932
232K_0402_1%~D
232K_0402_1%~D
PR940
PR940
22.6K_0402_1%~D
22.6K_0402_1%~D
1U_0603_10V6K~D
1U_0603_10V6K~D
12
PJP901
PJP901
D
D
42
PR910
PR910
0_0402_5%~D
0_0402_5%~D
1 2
12
PC908
PC908
1U_0603_10V6K~D
1U_0603_10V6K~D
GNDA_CHG
12
PR933
PR933
47K_0402_1%~D
47K_0402_1%~D
12
PR941
PR941
42.2K_0402_1%~D
42.2K_0402_1%~D
+3.3V_ALW
PU903
PU903
4
O
TC7SH08FU_SSOP5~D
TC7SH08FU_SSOP5~D
12
PC902
PC902
47P_0402_50V8J~D
47P_0402_50V8J~D
DK_CSS_GC 61
4
12
PC919
PC919
@
@
3300P_0402_50V7K~D
3300P_0402_50V7K~D
PQ906
PQ906
4
12
PC999
PC999
@
@
56P_0402_50V8J~D
56P_0402_50V8J~D
12
12
12
PC939
PC939
100P_0402_50V8J~D
100P_0402_50V8J~D
PC942
PC942
0.1U_0402_25V4Z~D
0.1U_0402_25V4Z~D
12
5
1
P
B
2
A
G
To preset system to throtlle
3
switching from AC to DC
2
12
PC903
PC903
@
@
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
DOCK_DCIN_IS+ 44
DOCK_DCIN_IS- 44
5
PQ905
PQ905
SIR472DP-T1-GE3_POWERPAK8-5
SIR472DP-T1-GE3_POWERPAK8-5
123
5.6UH_FDVE1040-H-5R6M-P3_9.2A_20%~D
5.6UH_FDVE1040-H-5R6M-P3_9.2A_20%~D
5
123
1M_0402_1%~D
1M_0402_1%~D
1 2
+5V_ALW
3
2
PROCHOT_GATE 46
SI7716ADN-T1-GE3_POWERPAK8-5
SI7716ADN-T1-GE3_POWERPAK8-5
PR930
PR930
8
PU902A
PU902A
P
+
-
G
LM393DR_SO8~D
LM393DR_SO8~D
4
100K_0402_5%~D
100K_0402_5%~D
PR929
PR929
4.7_1206_5%~D
4.7_1206_5%~D
CHG_SNUB
1 2
12
PC925
PC925
1000P_0603_50V7K~D
1000P_0603_50V7K~D
GNDA_CHG
1
O
PR945
PR945
PQ910
PQ910
+3.3V_ALW
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
+CHAGER_SRC
PL902
PL902
PC933
PC933
0.1U_0402_25V6K~D@
0.1U_0402_25V6K~D@
1 2
12
13
D
D
S
S
PC912
PC912
2200P_0402_50V7K~D
2200P_0402_50V7K~D
+VCHGR_L
12
PR927
PR927
10_0402_5%~D
10_0402_5%~D
PR934
PR934
10K_0402_1%~D
10K_0402_1%~D
PR942
PR942
@
@
41.2K_0402_1%~D
41.2K_0402_1%~D
2
ACAV_IN 16,25,47,61
G
G
12
12
PC913
PC913
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
PR923
PR923
0.01_1206_1%~D
0.01_1206_1%~D
4
3
12
1 2
PC934
PC934
0.22U_0603_25V7K~D
0.22U_0603_25V7K~D
MAX8731_REF
12
PR938
PR938
0_0402_5%~D
0_0402_5%~D
1 2
12
1
2
PR928
PR928
PC914
PC914
0_0402_5%~D
0_0402_5%~D
12
10U_0805_25V6K
10U_0805_25V6K
12
PC929
PC929
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
1 2
PC935
PC935
0.1U_0402_25V6K~D@
0.1U_0402_25V6K~D@
12
PC915
PC915
10U_0805_25V6K
10U_0805_25V6K
+VCHGR
12
12
PC930
PC930
10U_0805_25V6K
10U_0805_25V6K
GNDA_CHG
ACAV_IN_NB 46,47,61
12
PC931
PC931
10U_0805_25V6K
10U_0805_25V6K
12
PC932
PC932
10U_0805_25V6K
10U_0805_25V6K
1
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
Charger
Charger
Charger
LA-7933
LA-7933
LA-7933
1
60 65Monday, November 07, 2011
60 65Monday, November 07, 2011
60 65Monday, November 07, 2011
0.2
0.2
0.2
of
of
of
Page 61
5
+DOCK_PWR_BAR
D D
0.047U_0603_25V7K~D
0.047U_0603_25V7K~D
12
PBATT+
35
36
34
NC
DC_IN_SS
CHARGERVR_DCIN
CSS_GC10DK_CSS_GC11ERC312ERC213GND14PWR_SRC
ERC3
PC1009
PC1009
@
@
0.1U_0402_25V4Z~D
0.1U_0402_25V4Z~D
PQ1002
PQ1002
SI4835DDY-T1-E3_SO8~D
SI4835DDY-T1-E3_SO8~D
8
+VCHGR
C C
+DC_IN
PR1013 100K_0402_5%~DPR1013 100K_0402_5%~D
+3.3V_ALW2
B B
A A
1 2
ACAV_DOCK_SRC#44 DOCK_AC_OFF 44,46
+SDC_IN
PR1015 0_0402_5%~DPR1015 0_0402_5%~D
ACAV_IN16,25,47,60
+3.3V_ALW2
7
5
+DOCK_PWR_BAR
+DC_IN_SS
1 2
PR1011 47_0805_5%~DPR1011 47_0805_5%~D
0.1U_0603_50V4Z~D
0.1U_0603_50V4Z~D
SOFT_START_GC51
1 2
PR1017 0_0402_5%~DPR1017 0_0402_5%~D
1 2
CD3301_SDC_IN
DC_BLOCK_GC60
1 2
PR1021 0_0402_5%~DPR1021 0_0402_5%~D
1 2
PR1022 0_0402_5%~DPR1022 0_0402_5%~D
5
1
2
36
4
PR1006
PR1006
1 2
0_0402_5%~D
0_0402_5%~D
1 2
PR1007 0_0402_5%~DPR1007 0_0402_5%~D
1 2
PR1010 0_0402_5%~DPR1010 0_0402_5%~D
+CHGR_DC_IN60
CD3301_DCIN
12
PC1006
PC1006
ACAVDK_SRC
ERC1
12
PC1007
PC1007
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
ACAVIN
P33ALW2
BLK_MOSFET_GC
DK_PWR_BAR
3301_DC_IN_SS
PU1001
PU1001
1
DC_IN
2
SS_GC
3
ERC1
4
ACAVDK_SRC
5
GND
6
SDC_IN
7
DC_BLK_GC
8
ACAV_IN
9
P33ALW2
37
TP
CSS_GC60
DK_CSS_GC60
PC1008
PC1008
1 2
DSCHRG_MOSFET_GC
30
33
32
29
31
28
NC
GND
PBatt+
DK_PWRBAR
BLK_MOSFET_GC
DK_AC_OFF_EN
DSCHRG_MOSFET_GC
DK_AC_OFF_EN
SL_BAT_PRES#
BLKNG_MOSFET_GC
NBDK_DCINSS
SS_DCBLK_GC
EN_DK_PWRBAR17P33ALW
16
15
18
ERC2
EN_DK_PWRBAR
12
STSTART_DCBLOCK_GC
3301_PWRSRC
4
PR1004
PR1004
12
0_0402_5%~D
0_0402_5%~D
PR1008
PR1008
0_0402_5%~D
0_0402_5%~D
P50ALW
PBATT_OFF
ACAV_IN_NB
GND
CD3301ARHHR
CD3301ARHHR
P33ALW
PR1025 0_0402_5%~DPR1025 0_0402_5%~D
PR1027 0_0402_5%~DPR1027 0_0402_5%~D
1 2
PR1029 0_0402_5%~DPR1029 0_0402_5%~D
4
1
2
3
12
1U_0805_25V4Z~D
1U_0805_25V4Z~D
27
26
25
24
23
22
21
20
19
1 2
1 2
PQ1003SI7149DP PQ1003SI7149DP
4
PC1004
PC1004
P50ALW
CD_PBATT_OFF
DK_AC_OFF
3301_ACAV_IN_NB
DK_AC_OFF_EN
SL_BAT_PRES#
12
5
1 2
PR1012 0_0402_5%~DPR1012 0_0402_5%~D
1 2
PR1016 0_0402_5%~DPR1016 0_0402_5%~D
1 2
PR1014 0_0402_5%~DPR1014 0_0402_5%~D
PR1023 0_0402_5%~DPR1023 0_0402_5%~D
PR1024 0_0402_5%~DPR1024 0_0402_5%~D
+3.3V_ALW
EN_DOCK_PWR_BAR 46
1 2
1M_0402_5%~D
1M_0402_5%~D
PR1028
PR1028
@
@
+PWR_SRC
PR1001
PR1001
330K_0402_5%~D
330K_0402_5%~D
PBATT_IN_SS
+5V_ALW
SLICE_BAT_ON 46
1 2
PR1019 0_0402_5%~DPR1019 0_0402_5%~D
BLKNG_MOSFET_GC
1 2
1 2
3
PD1001
PD1001
B540C-13-F_SMC2~D
B540C-13-F_SMC2~D
PQ907 SI7149DPPQ907SI7149DP
5
PR1005
PR1005
1K_1206_5%~D
1K_1206_5%~D
12
4
PR1003
PR1003
330K_0402_5%~D
330K_0402_5%~D
1 2
12
12
PC1005
PC1005
1U_0603_25V6-K~D
1U_0603_25V6-K~D
1
2
3
12
PC1001
PC1001
0.47U_0805_25V7K~D
0.47U_0805_25V7K~D
0_0402_5%~D
0_0402_5%~D
PR1002
PR1002
12
2
STSTART_DCBLOCK_GC
PD1002
PD1002
2
3
PDS5100H-13_POWERDI5-3~D
PDS5100H-13_POWERDI5-3~D
PQ1004 SI7149DPPQ1004 SI7149DP
5
4
GPIOInputfromNB
EmbeddedController
1 2
1M_0402_5%~D
1 2
PR1020 0_0402_5%~DPR1020 0_0402_5%~D
+NBDOCK_DC_IN_SS
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
ACAV_IN_NB 46,47,60
DOCK_AC_OFF_EC 46
SLICE_BAT_PRES# 44,46,51
1M_0402_5%~D
PR1018
PR1018
2
1
1
1
2
3
12
PC1002
PC1002
2200P_0402_50V7K~D
2200P_0402_50V7K~D
12
PR1009
PR1009
0_0402_5%~D
0_0402_5%~D
PC1003
PC1003
+PWR_SRC
12
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
Selector
Selector
Selector
LA-7933
LA-7933
LA-7933
1
0.2
0.2
61 65Monday, November 07, 2011
61 65Monday, November 07, 2011
61 65Monday, November 07, 2011
0.2
of
of
of
Page 62
5
4
3
2
1
+VCC_CORE
1
PC1101
PC1101
10U_0805_6.3VAM~D
10U_0805_6.3VAM~D
2
D D
1
PC1106
PC1106
10U_0805_6.3VAM~D
10U_0805_6.3VAM~D
2
1
PC1102
PC1102
10U_0805_6.3VAM~D
10U_0805_6.3VAM~D
2
1
PC1107
PC1107
10U_0805_6.3VAM~D
10U_0805_6.3VAM~D
2
1
PC1103
PC1103
10U_0805_6.3VAM~D
10U_0805_6.3VAM~D
2
1
PC1108
PC1108
10U_0805_6.3VAM~D
10U_0805_6.3VAM~D
2
1
PC1104
10U_0805_6.3VAM~D
10U_0805_6.3VAM~D
2
1
PC1109
PC1109
10U_0805_6.3VAM~D
10U_0805_6.3VAM~D
2
@PC1104
@
+VCC_CORE +VCC_GFXCORE
1
PC1105
PC1105
10U_0805_6.3VAM~D
10U_0805_6.3VAM~D
2
1
PC1110
PC1110
10U_0805_6.3VAM~D
10U_0805_6.3VAM~D
2
1
PC1111
PC1111
10U_0805_6.3VAM~D
10U_0805_6.3VAM~D
2
+VCC_GFXCORE
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
PC1112
PC1112
PC1113
1
2
PC1113
1
1
2
2
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
PC1115
PC1115
PC1114
PC1114
1
2
@
@
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
PC1116
PC1116
PC1117
1
2
PC1117
1
2
@
@
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
PC1118
PC1118
PC1119
1
2
PC1119
1
2
+VCC_CORE
PC1123
PC1122
PC1120
PC1120
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
1 2
PC1144
PC1144
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
1 2
C C
PC1161
PC1161
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
1 2
PC1169
PC1169
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
1 2
PC1121
PC1121
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
1 2
PC1145
PC1145
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
1 2
PC1162
PC1162
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
1 2
@
@
PC1170
PC1170
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
1 2
PC1122
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
1 2
PC1146
PC1146
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
1 2
PC1163
PC1163
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
1 2
PC1123
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
1 2
PC1147
PC1147
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
1 2
PC1164
PC1164
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
1 2
PC1124
PC1124
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
1 2
PC1148
PC1148
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
1 2
PC1165
PC1165
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
1 2
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
PC1136
PC1136
1
2
1
+
+
PC1157
PC1157
2
470U_D2_2VM_R4.5M
470U_D2_2VM_R4.5M
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
PC1138
PC1138
PC1137
PC1137
1
1
2
2
1
+
+
PC1158
PC1158
2
470U_D2_2VM_R4.5M
470U_D2_2VM_R4.5M
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
PC1139
PC1139
1
2
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
PC1140
PC1140
PC1141
1
2
PC1141
1
2
Below is 458544_CRV_PDDG_0.5 Table 5-8.
5 x 22 µF (0805)
Socket Bottom
5 x (0805) no-stuff
sites
7 x 22 µF (0805)
Socket Top
2 x (0805) no-stuff
sites
+1.05V_RUN_VTT
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
1
1
@
@
PC1125
PC1125
PC1126
PC1126
2
2
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
1
@
@
2
PC1127
PC1127
1
1
2
1
2
@
@
@
@
PC1129
PC1129
PC1128
PC1128
2
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
1
PC1149
PC1149
PC1150
PC1150
2
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
1
@
@
PC1130
PC1130
2
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
1
PC1151
PC1151
2
22U_0805_6.3V6M~D
1
1
1
PC1131
PC1131
PC1132
PC1132
2
2
2
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
1
1
2
PC1152
PC1152
1
PC1153
PC1153
2
2
1
+
+
2
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
PC1133
PC1133
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
PC1154
PC1154
330U_X_2VM_R6M~D
330U_X_2VM_R6M~D
PC1166
PC1166
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
1
1
@
@
PC1134
PC1134
PC1135
PC1135
2
2
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
1
1
2
1
+
+
2
PC1156
PC1156
PC1155
PC1155
2
330U_X_2VM_R6M~D
330U_X_2VM_R6M~D
330U_X_2VM_R6M~D
330U_X_2VM_R6M~D
1
PC1167
PC1167
PC1168
PC1168
+
+
2
+VCC_CORE
1
+
+
PC1173
B B
A A
PC1173
2
470U_D2_2VM_R4.5M
470U_D2_2VM_R4.5M
@
@
1
2
1
+
+
PC1177
PC1177
2
470U_D2_2VM_R4.5M
470U_D2_2VM_R4.5M
1
+
+
PC1174
PC1174
2
470U_D2_2VM_R4.5M
470U_D2_2VM_R4.5M
@
@
+
+
PC1178
PC1178
470U_D2_2VM_R4.5M
470U_D2_2VM_R4.5M
1
+
+
PC1175
PC1175
2
470U_D2_2VM_R4.5M
470U_D2_2VM_R4.5M
1
+
+
PC1176
PC1176
2
470U_D2_2VM_R4.5M
470U_D2_2VM_R4.5M
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
PROCESSOR DECOUPLING
PROCESSOR DECOUPLING
PROCESSOR DECOUPLING
LA-7933
LA-7933
LA-7933
62 65Monday, November 07, 2011
62 65Monday, November 07, 2011
62 65Monday, November 07, 2011
of
of
1
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0.2
0.2
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5
4
3
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1
Version Change List ( P. I. R. List )
Page 1
Request
Item Issue DescriptionDate
1 PWR
D D
2 Change to SP02000RO00 X01
60
51
51
10/11 Intersil Modify docking current sense feedback to PU901 CSSP and CSSN
PWR 10/13 Compal
PWR
10/13 Compal Add control singnal to control S5 power consumption3
PWR60
Owner
Modify PR946、PR948 and PR947 connection X01
connection
Change RTC battery connector
Add PR23 to connect PCH_ALW_ON singal X01
Change H_PROCHOT# voltage source of Compare reference Compal10/144 X01PR937 connect to 2VREF_6182
5 Change PQ5 Package for layout space Compal10/25PWR51 X01Change footprint from TO252 to SO8_5P
6 PWR
C C
7 Change PC707 PC751 footprint from 0603 to 0402Compal11/01PWR58 X01Change PC707 PC751 footprint to 0402
60
10/28 Intersil X01Remove Docking current sense voltage division Remove PR946、PR948 and PR947
8 Remove PJP902Compal11/01PWR59 Remove PJP902 X01
52,53,55,
9 Low side MOSFET Gate induce voltageCompal11/07PWR
56,58,59,
Reserve PC198,PC199,PC299,PC499,PC599,PC791,PC792,
PC793,PC794,PC795,PC796,PC797,PC798,PC999
60
10
Compal11/07PWR51
Reserve 10u and 0.1u Cap with MXM_pwr_src
Reserve PC30 and PC31
Solution Description Rev.Page# Title
X01
X01
B B
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
PWR_PIR 1
PWR_PIR 1
PWR_PIR 1
LA-7933
LA-7933
LA-7933
63 65Monday, November 07, 2011
63 65Monday, November 07, 2011
63 65Monday, November 07, 2011
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0.2
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of
of
Page 64
5
4
Version Change List ( P. I. R. List )
3
2
1
TitlePage# Rev.Solution Description
D D
3 26 HW 9/23/2011 DELL For cost saving No stuff U5,C17,C363,R1975
4 47 HW 9/23/2011 COMPAL Code change U54 change from SA00003TZ2L to SA00003TZ1L 0.2(X01)
5 16 HW 9/23/2011 COMPAL correct MXM LVDS signals. Swap CHA and CHB signals on JMXM1. 0.2(X01)
6 32 HW 10/04/2011 COMPAL Add DOCK DPB DDC signals control circuit. Stuff C1174,R1532,R1537,R1530,R1539,Q110,Q113 0.2(X01)
7 33 HW 10/04/2011 COMPAL Add DOCK DPA DDC signals control circuit.1/2Add C1332,R2151~R2153,R2155~R2157,Q335,Q336 0.2(X01)
8 50 HW 10/04/2011 COMPAL +3.3V_RUN boot leakage Pop R929,Q69 0.2(X01)
9 33 HW 10/04/2011 COMPAL Change the R518 value to meet the PS8336B
C C
12 30 HW 10/05/2011 Q13 VGS voltage limit of ±20V Change R162 pin1 connect from +PWR_SRC_S to +3.3V_ALW.COMPAL 0.2(X01)
13 17,18,47
36
14 46 HW 10/12/2011 COMPAL Wireless switch needs to be pulled to ALW,
B B
4915 COMPAL10/13/2011HW Solve Breath LED flicker when AC-in plug and
16 48 HW 10/13/2011 COMPAL To meet intel spec:T235(power off)=min40ns).
17 44,28,30
45,25,12
18 48 HW 10/20/2011 COMPAL To avoid layout trace width less to 10mil Add U4.1 net name of +5V_ALW_PCH_R 0.2(X01)
19 28,30 HW 10/20/2011 COMPAL Avoid JEDP1 and JLVDS1 insert anti-burn
HW 9/23/20111 to meet LED min workable current(2mA).49 COMPAL 0.2(X01)Change R934,R939,R942,R955,R941 from 2.2kohm to 1.2kohm.
HW2 49 9/23/2011 Breath LED Lose current-limited resistorsCOMPAL Add R956 0.2(X01)
HW5010 10/04/2011 Change R940 pin1 connect from +PWR_SRC_S to +PWR_SRC_MXM.Solve S4/S5 +MXM_PWR_SRC leakage in DC mode.COMPAL 0.2(X01)
HW 10/05/2011 COMPAL Crystal EA. Change C743,C741 from 22pF to 39pF, CH2,CH3 from 15pF to 18pF,
ME 10/13/2011 COMPAL Change connector follow connector list
Date Issue DescriptionItem
Owner
input high-level voltage.
10/05/2011HW3011 Change eDP pin defined same as LVDSDue to LVDS and eDP use same connector .
COMPAL 0.2(X01)
It will easy to damage on MB or panel when
install wrong 40pin connector for LVDS and eDP
Without it being pulled to ALW rail AOAC
will not work correct.
correct Breath LED top and side view work
behavior.
T08a(power on)= max 90ms.
0913A and 1005A.
panel from +BL_PWR_SRC
R943 from 2.2kohm to 374ohm.
0.2(X01)
U6,C16,C361,R1974
Change R518 from 100k to 10kohm. 0.2(X01)
0.2(X01)
CH18,CH19 from 12pF to 10pF, C470 from 33pF to 22pF,
C471 from 33pF to 27pF
Add R2158 let WIRELESS_ON#/OFF pull up to ALW, no stuff R766 0.2(X01)
Add Q327 and use"MASK_BASE_LEDS#" to control Breath LED top view.
0.2(X01)
use"SYS_LED_MASK#" to control Breath LED side view.
change U4 from RT9801AGE to RT9818A-44GU3,R1622 to 100kohm.add R2159.
0.2(X01)
remove R1649~R1654 pop R1633,non-pop R1623
Change JDOCK1 to WD2F144WB5R400,JLVDS1,JEDP1 to 50398-04071-001,JPB1 to
0.2(X01)
50228-0067N-001. JFAN1 & JFAN2 to 50271-0040N-001,
JDIMM1 to 2-2013311-1
Q22.2 connector to JEDP1.11 0.2(X01)
Request
20 40 HW 10/25/2011 COMPAL TPM chip to new version chip due to OS Win8
Change U39 TPM solution to new p/n: SA00004WQ10 0.2(X01)
supported problem
A A
10/25/201121 HW44 Add pull down 100K on MXM_DPB_HPD of R2160Audio not transfer to DP display if play
COMPAL 0.2(X01)
movie when attached external DP display
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
EE P.I.R (1/2)
EE P.I.R (1/2)
EE P.I.R (1/2)
LA-7933
LA-7933
LA-7933
64 65Monday, November 07, 2011
64 65Monday, November 07, 2011
64 65Monday, November 07, 2011
1
0.2
0.2
0.2
of
of
of
Page 65
5
4
Version Change List ( P. I. R. List )
3
2
1
TitlePage# Rev.Solution Description
D D
23 50 10/26/2011 COMPAL For smart card detect failed For +3.3V_SUS power sequence.Change C767 from 4700pF to 470pF HW 0.2(X01)
24 50 10/26/2011 COMPALHW For Inrush current issue 0.2(X01)
25 49 HW 10/26/2011 COMPAL Breath LED need to add control schematics 0.2(X01)
26 22 HW change LH1 to 1uH inductor.10/26/2011 COMPAL CRT ripple garbage display issue. 1/2 0.2(X01)
27 39 DFB 10/27/2011 COMPAL DFB Suggest to relocate L41,L43,L44 from
28 49 HW 10/27/2011 COMPAL Schematic error, let H26, H27,H28,H29 all
29 44 11/01/2011 COMPAL EMI request,add 33ohm for DOCK DVI signals. Add R2164~R2179(33ohm) for DOCK DVI port A,B. 0.2(X01)
C C
31 21 HW 11/02/2011 COMPAL PCH has internal pull up 20k ohm on (GPIO27) No stuff RH175 0.2(X01)
32 21 HW 11/02/2011 COMPAL Power saving RH179 change from 10K to 100K 0.2(X01)
33 33 HW 11/02/2011 COMPAL EMI request and HDMI EA have verify it. Pop R451~R456,R458,R459 and non-pop L19,L23~25
34 47 HW 11/02/2011 COMPAL Change board ID to X01 Change R875 to 130K 0.2(X01)
35 50 HW 11/02/2011 COMPAL R935 change from 20K to 100KPower saving 0.2(X01)
36 40 HW 11/02/2011 COMPAL U39.14 internal is empty pin No stuff C554 0.2(X01)
37 20 HW 11/02/2011 COMPAL Avoid WWAN noise affect PCI 3,3M CLK. Add CH21~23 by pass cap. 0.2(X01)
38 39 HW 11/02/2011 COMPAL For ESD request. D14,D16 change main source SC30000250L to SC300002F0L 0.2(X01)
39 49 ME 11/03/2011 COMPAL ME drawing modify Remove H21 and H10 from 3P3 to 3P0 0.2(X01)
B B
40 44 11/03/2011 COMPAL For ESD request. Non-pop D33,D10,D11 0.2(X01)
41 37 11/03/2011 COMPAL Vendor service issue Change T156 from P050005A0L(PULSE) to SP050006P0L(TAIMAG)
42 33 11/03/2011 COMPALHW 0.2(X01)Add DOCK DPA DDC signals control circuit.2/2Add R2154,R2161,R2162,R2163,Q337 but no stuff
43 33 HW 11/04/2011 COMPAL 0.2(X01)EMI request,add reserve C(3.3pF) for HDMI
44 31 LAYOUT 11/08/2011 COMPAL Add TEST point for JCRT PIN11. Add CRT_11 net and test point(T61) for JCRT1.11. 0.2(X01)
45 07 11/08/2011 COMPAL Avoid Power_SRC trace noise coupling effect
46 26,50 11/09/2011 DELL For DELL request add Monitor PWR_SRC_MXM
47 44 11/11/2011HW 0.2(X01)COMPAL For DP EA consider Change R2164~R2179(33ohm) to 0ohm
A A
48 39 HW 11/11/2011 COMPAL For USB EA Pop R15,R27 0.2(X01)
HW
HW
HW
HW 0.2(X01)
HW 0.2(X01)
5
Date Issue DescriptionItem
Owner
We change R938 PU from +3.3V_RUN to +3.3V_ALW and It can fix this issue.
0.2(X01)22 10/25/201149 COMPAL BT LED will be light when system is in
S3/S4/S5
Modify +5V_RUN/+3.3V_RUN soft start.Change C777 from 470pF to 2200pF
Remove Q327 and modify EC code from PWM Output to GPIO input on
ECE5048(GPIOM3/PWM4) which follow E4 solution.
In order to trace along the line of the L41,L43,L44 reverse 0.2(X01)
bottom to top side.
have two location(H22, H23, H24, H25) in
Remove H26,H27,H28,H29
0.2(X01)
the CAD file
11/02/2011HW2230 CRT ripple garbage display issue. 2/2COMPAL Add CH37 of 10U 0603 0.2(X01)
0.2(X01)
R74 change from 4.99k to 5.76K for reduce swing.
Add reserve C1333~C1340(3.3pF) for HDMI signals.
signals.
Add CC92HW 0.2(X01)
to CPU
Remove R1973, add PJP78,79
circuit by HW control
Remove U5,C17,C363,R1975,R1181,R20,U6,C16,C361,R1974,R19
Add U59,PU2,PQ1005,PR14,PR24~31,PC6,PC17~21 and no stuff
JUSB1 ,Need to pop R24/R15/R18
JUSB2 ,Need to pop R33/R27/R29
4
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
EE P.I.R (1/2)
EE P.I.R (1/2)
EE P.I.R (1/2)
LA-7933
LA-7933
LA-7933
65 65Friday, November 11, 2011
65 65Friday, November 11, 2011
65 65Friday, November 11, 2011
1
of
of
of
0.2
0.2
0.2
Request
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