Vinafix.com
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1 1
2 2
B
C
D
E
3 3
MB PCB
Part Number
DAZ1EO00101 PCB ADP80 LA-C841P LS-C641P
4 4
Description
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size
Size
Size
Date : Sheet o f
Date : Sheet o f
A
B
C
D
Date : Sheet o f
Compal Electronics, Inc.
Cover Sheet
Cover Sheet
Document Number Re v
Document Number Re v
Document Number Re v
Cover Sheet
LA-C841P
LA-C841P
LA-C841P
E
1 74Tuesday, September 08, 2015
1 74Tuesday, September 08, 2015
1 74Tuesday, September 08, 2015
0.1
0.1
0.1
Vinafix.com
A
1 1
2 2
B
C
D
E
3 3
4 4
DELL CONFIDENTIAL/PROPRIETARY
A
B
C
D
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size
Size
Size
Date: Sheet of
Date: Sheet of
Date: Sheet of
Block diagram
Block diagram
Block diagram
Document Number Rev
Document Number Rev
Document Number Rev
LA-C841P
LA-C841P
LA-C841P
2 74Tuesday, September 08, 2015
2 74Tuesday, September 08, 2015
E
2 74Tuesday, September 08, 2015
0.1
0.1
0.1
Vinafix.com
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4
3
2
1
POWER STATES
RUN
State
Signal
S0 (Full ON) / M0
D D
S3 (Suspend to RAM) / M3 LOW
SLP
S3#
HIGH
SLP
SLP
S5#
S4#
HIGH HIGH
HIGH HIGH
ALWAYS
SLP
PLANE
A#
HIGH
ON
ON ON ON
HIGH
M
PLANE
ON
SUS
PLANE
ON ON ON
PLA NE
OFF
CLOCKS
OFF
S4 (Suspend to DISK) / M3
S5 (SOFT OFF) / M3
S3 (Suspend to RAM) / M-OFF
S4 (Suspend to DISK) / M-OFF
S5 (SOFT OFF) / M-OFF
HIGH HIGH
LOW
LOW
LOW
LOW
HIGH HIGH
LOW
LOW LOW LOW
HIGH
LOW LOW LOW LOW
ON ON
HIGH
ON ON
ON ON
LOW
ON
ON
OFF
OFFLOW
OFF
OFF
OFF
OFF
OFF OFF OFF
OFF OFF OFF OFF
OFF OFF OFF OFF
PM TABLE
C C
power
plane
State
S0
B B
S3
S5 S4/AC
+5V_ALW
+3.3V _ALW
+3.3V_ALW_DSW
+3.3V_SUS
+3.3V_A LW_PCH +1.2V_MEM
+RTC_CELL
+1.8V_PRIM
+1.0V_VCCST
+2.5V_ME M
+1.0V_PRIM
+1.0V_PRIM_CORE
+5V_A LW2
+3.3V_ALW2
+3.3V_RTC_LDO
+1.0V_MPHYGT
ON
ON
ON
ON ON
ON
OFF
+5V_RUN
+3.3V_RUN
+0.6V_DDR_VTT
+1.5V_RUN
OFF
OFF
(M-OFF)
+3.3V_M +3.3V_M
+VCC_CORE
+VCC_GT
+1.0VS_VCCIO
+VCC_SA
ON
ON
ON
ON
OFF
OFF
S5 S4/AC doe sn't ex ist
A A
OFFOFF
OFF
OFFOFF
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size
Size
Size
Date : Sheet o f
Date: Sheet o f
5
4
3
2
Date: Sheet o f
Compal Electronics, Inc.
Port assignment
Port assignment
Document Number Re v
Document Number Rev
Document Number Rev
Port assignment
LA-C841P
LA-C841P
LA-C841P
1
3 74Tuesday, September 08, 2015
3 74Tuesday, September 08, 2015
3 74Tuesday, September 08, 2015
0.1
0.1
0.1
Vinafix.com
5
RT8207M
(PU201)
AP7175SP
ADAPTER
D D
CHARGER
BQ24777
(PU801)
+PWR_SRC
BATTERY
C C
SIC531CDT1GE
(PU602)
IMVP_V R_ON
B B
+VCC_SA
A A
IMVP_V R_ON
+VCC_GT
5
IMVP_V R_ON
+CPU_B++GPU_B++VCCSA_B+
+VCC_CORE
(PU1500)
SYX198D
(PU301)
SYX196DQNC
(PU401)
SY8286BRAC
(PU102)
SY8286CRAC
(PU100)
AO6405
(QV1)
EN_IN VPWR
+BL_PWR_SRC
SIO_SLP_S4#
SIO_SLP_S4#
SIO_SLP_SUS#
ALWON
ALWON
4
+1.2V_MEM
RUN_ ON
4
+2.5V_MEM
+1.0V_PRIM
+1.0VS_VCCIO
+5V_ALW
+5V_ALW2
+3.3V_RTC_LDO
+3.3V_ALW2
+3.3V_ALW
LDOI N
RT8207
(PU201)
3
0.6V_DDR_VTT_ ON
3
+0.6V_DDR_VTT
TPS22961
(UV27)
TPS22961
(UZ19)
TPS22961
(UZ18)
TPS22967
(UZ23)
EM5209
(UZ4)
PI5USB2544
(UI3)
SY6288
(UI1)
SY6288
(UI2)
SY8032A
(PU501)
EM5209
(UZ3)
3.3V_WWA N_EN
EM5209
(UZ2)
AOZ1336
(UZ8)
EM5209
(UZ4)
TPS22967
(UZ18)
AP2821
(UV24)
+3.3V_RUN_GFX
SIO_SLP_S3#
SIO_SLP_S4#
HDD_ EN
RUN_ ON
USB_PWR_S HR_LFT_EN#
USB_PWR_E N1#
USB_PWR_E N2#
SIO_SLP_SUS#
SIO_SLP_LAN#
AUX_EN_WOWL
@SIO_SLP_WLAN#
@SIO_SLP_WLAN#
RUN_ ON
A_ON
SIO_SLP_SUS#
@PCH_A LW_ON
SUS_ON
ENVDD _PCH
2
+VGA_PCIE
+1.0V_VCCSTG
+1.0V_VCCST
+5V_HDD
+5V_RUN
+5V_USB_CHG_PWR
+USB_LEFT_PWR
+USB_REAR_PWR
+1.8V_PRIM
+3.3V_LAN
+3.3V_WLAN
+3.3V_WWAN
+3.3V_RUN
PJP10
+3.3V_RUN_AUDIO
+3.3V_M
+3.3V_ALW_PCH
+3.3V_CV2
USH/ B
+LCDVDD
2
EM5209
(UZ5)@
1
AUD_P WR_EN
PJP9
+5V_RUN_AUDIO
EM5209
(UV25)
LP2301
(QV8)
AP7175SP
(PU502)
LP2301A
(QZ1)
PJP36
EM5209
(UZ5)@
DGPU_PW R_EN
DGPU_PW R_EN
TS_EN
+3.3V_ RUN
3.3V_CAM_EN#
AUD_P WR_EN
+1.8V_RUN_GFX
+3.3V_RUN_GFX
+5V_TSP
+1.5V_RUN
+3.3V_CAM
+3.3V_HDD
+3.3V_RUN_AUDIO
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size
Size
Size
Date: Sheet of
Date: Sheet o f
Date: Sheet o f
Compal Electronics, Inc.
Power rails
Power rails
Document Number Re v
Document Number Rev
Document Number Rev
Power rails
LA-C841P
LA-C841P
LA-C841P
1
0.1
0.1
4 74Tuesday, September 08, 2015
4 74Tuesday, September 08, 2015
4 74Tuesday, September 08, 2015
0.1
Vinafix.com
5
4
3
2
1
2.2K
2.2K
1K
1K
499
499
+3.3V _ALW_PCH
+3.3V_LAN
28
31
+3.3V_ALW
LOM
DMN66D0LDW
DMN66D0LDW
127
129
DOCKING
2.2K
2.2K
+3.3V_RUN
253
254
253
254
53
51
1
4
DIMM1
DIMM2
XDP1
LNG2DMTR
SMBUS Address [0x9a]
MEM_SMBCLK
D D
AW44
BB43
MEM_SMBDATA
PCH
LAN_SMBCLK
AY44
LAN_SMBDATA
BB39
AW42AW45
SML1_SMBDATA
SML1_SMBCLK
B6A5
1D
1D
B4
1A
A3
1A
1K
1K
DOCK_TNY_SMB_CLK
DOCK_TNY_SMB_DAT
+3.3V _ALW_PCH
AR PD
C C
19
JTHB1
18
2.2K
+3.3V_ALW
KBC
1C1CB59
1E
1E
A56
A50
B53
PBAT_SMBCLK
PBAT_SMBDAT
USH_SMBCLK
USH_SMBDAT
2.2K
2.2K
2.2K
100 ohm
100 ohm
+3.3V_SUS
7
6
5
6
BATTERY
CONN
LYNX(CV2)
MEC 5085
B B
2.2K
+3.3V _ALW
B50
A47
B49
B48
CHARGER_SMBCLK
CHARGER_SMBDAT
UPD_GPU_SMBCLK
UPD_GPU_SMBDAT
1G
1G
1H
1H
A A
2.2K
2.2K
2.2K
+3.3V _ALW
DMN66D0LDW
DMN66D0LDW
DMN66D0LDW
DMN66D0LDW
9
8
Charger
100K
+3.3V _RUN_GFX
100K
AJ23
GPU
AH23
4.7K
+3.3V_VDD _PIC
4.7K
AR PD
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
SMbus Block diagram
SMbus Block diagram
SMbus Block diagram
Document Number Re v
Document Number Rev
Document Number Rev
LA-C841P
LA-C841P
LA-C841P
1
5 74Tuesday, September 08, 2015
5 74Tuesday, September 08, 2015
5 74Tuesday, September 08, 2015
0.1
0.1
0.1
5
Title
Title
Title
Size
Size
Size
Date: Sheet of
Date: Sheet o f
4
3
2
Date: Sheet o f
Vinafix.com
5
4
3
2
1
PEG_CRX_GTX_P[0..15]
PEG_CRX_GTX_N[0..15]
PEG_CTX_C_GRX_P[0..15]
PEG_CTX_C_GRX_N[0..15]
D D
C C
B B
PEG_COMP
A A
5
PEG_CRX_GTX_P[0..15] <50>
PEG_CRX_GTX_N[0..15] <50>
PEG_CTX_C_GRX_P[0..15] <50>
PEG_CTX_C_GRX_N[0..15] <50>
+1.0VS_VCCIO
12
RC224.9_0402_1%
CPU1C
PEG_CRX_GTX_P15
PEG_CRX_GTX_N15
PEG_CRX_GTX_P14
PEG_CRX_GTX_N14
PEG_CRX_GTX_P13
PEG_CRX_GTX_N13
PEG_CRX_GTX_P12
PEG_CRX_GTX_N12
PEG_CRX_GTX_P11
PEG_CRX_GTX_N11
PEG_CRX_GTX_P10
PEG_CRX_GTX_N10
PEG_CRX_GTX_P9
PEG_CRX_GTX_N9
PEG_CRX_GTX_P8
PEG_CRX_GTX_N8
PEG_CRX_GTX_P7
PEG_CRX_GTX_N7
PEG_CRX_GTX_P6
PEG_CRX_GTX_N6
PEG_CRX_GTX_P5
PEG_CRX_GTX_N5
PEG_CRX_GTX_P4
PEG_CRX_GTX_N4
PEG_CRX_GTX_P3
PEG_CRX_GTX_N3
PEG_CRX_GTX_P2
PEG_CRX_GTX_N2
PEG_CRX_GTX_P1
PEG_CRX_GTX_N1
PEG_CRX_GTX_P0
PEG_CRX_GTX_N0
PEG_COMP
DMI_CRX_PTX_P0<17>
DMI_CRX_PTX_N0<17>
DMI_CRX_PTX_P1<17>
DMI_CRX_PTX_N1<17>
DMI_CRX_PTX_P2<17>
DMI_CRX_PTX_N2<17>
DMI_CRX_PTX_P3<17>
DMI_CRX_PTX_N3<17>
DMI_CRX_PTX_P0
DMI_CRX_PTX_N0
DMI_CRX_PTX_P1
DMI_CRX_PTX_P2
DMI_CRX_PTX_N2
DMI_CRX_PTX_P3 DMI_CTX_PRX_P3
DMI_CRX_PTX_N3 DMI_CTX_PRX_N3
E25
PEG_RXP[0]
D25
PEG_RXN[0]
E24
PEG_RXP[1]
F24
PEG_RXN[1]
E23
PEG_RXP[2]
D23
PEG_RXN[2]
E22
PEG_RXP[3]
F22
PEG_RXN[3]
E21
PEG_RXP[4]
D21
PEG_RXN[4]
E20
PEG_RXP[5]
F20
PEG_RXN[5]
E19
PEG_RXP[6]
D19
PEG_RXN[6]
E18
PEG_RXP[7]
F18
PEG_RXN[7]
D17
PEG_RXP[8]
E17
PEG_RXN[8]
F16
PEG_RXP[9]
E16
PEG_RXN[9]
D15
PEG_RXP[10]
E15
PEG_RXN[10]
F14
PEG_RXP[11]
E14
PEG_RXN[11]
D13
PEG_RXP[12]
E13
PEG_RXN[12]
F12
PEG_RXP[13]
E12
PEG_RXN[13]
D11
PEG_RXP[14]
E11
PEG_RXN[14]
F10
PEG_RXP[15]
E10
PEG_RXN[15]
G2
PEG_RCOMP
D8
DMI_RXP[0]
E8
DMI_RXN[0]
E6
DMI_RXP[1]
F6
DMI_RXN[1]
D5
DMI_RXP[2]
E5
DMI_RXN[2]
J8
DMI_RXP[3]
J9
DMI_RXN[3]
REV = 1
SKL-H_BGA1440
BGA1440
3 OF 14
PEG_TXP[0]
PEG_TXN[0]
PEG_TXP[1]
PEG_TXN[1]
PEG_TXP[2]
PEG_TXN[2]
PEG_TXP[3]
PEG_TXN[3]
PEG_TXP[4]
PEG_TXN[4]
PEG_TXP[5]
PEG_TXN[5]
PEG_TXP[6]
PEG_TXN[6]
PEG_TXP[7]
PEG_TXN[7]
PEG_TXP[8]
PEG_TXN[8]
PEG_TXP[9]
PEG_TXN[9]
PEG_TXP[10]
PEG_TXN[10]
PEG_TXP[11]
PEG_TXN[11]
PEG_TXP[12]
PEG_TXN[12]
PEG_TXP[13]
PEG_TXN[13]
PEG_TXP[14]
PEG_TXN[14]
PEG_TXP[15]
PEG_TXN[15]
DMI_TXP[0]
DMI_TXN[0]
DMI_TXP[1]
DMI_TXN[1]
DMI_TXP[2]
DMI_TXN[2]
DMI_TXP[3]
DMI_TXN[3]
PEG_CTX_GRX_P15
B25
PEG_CTX_GRX_N15
A25
PEG_CTX_GRX_P14
B24
PEG_CTX_GRX_N14
C24
PEG_CTX_GRX_P13
B23
PEG_CTX_GRX_N13
A23
PEG_CTX_GRX_P12 PEG_CTX_C_GRX_P12
B22
PEG_CTX_GRX_N12 PEG_CTX_C_GRX_N12
C22
PEG_CTX_GRX_P11
B21
PEG_CTX_GRX_N11
A21
PEG_CTX_GRX_P10 PEG_CTX_C_GRX_P10
B20
C20
PEG_CTX_GRX_P9
B19
PEG_CTX_GRX_N9
A19
PEG_CTX_GRX_P8
B18
PEG_CTX_GRX_N8
C18
PEG_CTX_GRX_P7
A17
PEG_CTX_GRX_N7
B17
PEG_CTX_GRX_P6 PEG_CTX_C_GRX_P6
C16
B16
PEG_CTX_GRX_P5
A15
PEG_CTX_GRX_N5
B15
PEG_CTX_GRX_P4
C14
PEG_CTX_GRX_N4
B14
PEG_CTX_GRX_P3
A13
PEG_CTX_GRX_N3
B13
PEG_CTX_GRX_P2
C12
PEG_CTX_GRX_N2
B12
PEG_CTX_GRX_P1
A11
PEG_CTX_GRX_N1
B11
PEG_CTX_GRX_P0
C10
PEG_CTX_GRX_N0
B10
B8
A8
C6
B6
B5
A5
D4
B4
?
DMI_CTX_PRX_P0
DMI_CTX_PRX_N0
DMI_CTX_PRX_P1
DMI_CTX_PRX_N1DMI_CRX_PTX_N1
DMI_CTX_PRX_P2
DMI_CTX_PRX_N2
Tropo@
CC67 0.22U_0402_10V6K
Tropo@
CC44 0.22U_0402_10V6K
Tropo@
CC68 0.22U_0402_10V6K
Tropo@
CC45 0.22U_0402_10V6K
Tropo@
CC51 0.22U_0402_10V6K
Tropo@
CC53 0.22U_0402_10V6K
Tropo@
CC52 0.22U_0402_10V6K
Tropo@
CC73 0.22U_0402_10V6K
Tropo@
CC69 0.22U_0402_10V6K
Tropo@
CC46 0.22U_0402_10V6K
Tropo@
CC54 0.22U_0402_10V6K
Tropo@
CC74 0.22U_0402_10V6K
Tropo@
CC55 0.22U_0402_10V6K
Tropo@
CC47 0.22U_0402_10V6K
Tropo@
CC70 0.22U_0402_10V6K
Tropo@
CC56 0.22U_0402_10V6K
DIS@
CC57 0.22U_0402_10V6K
DIS@
CC75 0.22U_0402_10V6K
DIS@
CC58 0.22U_0402_10V6K
DIS@
CC48 0.22U_0402_10V6K
DIS@
CC71 0.22U_0402_10V6K
DIS@
CC59 0.22U_0402_10V6K
DIS@
CC60 0.22U_0402_10V6K
DIS@
CC76 0.22U_0402_10V6K
DIS@
CC61 0.22U_0402_10V6K
DIS@
CC49 0.22U_0402_10V6K
DIS@
CC72 0.22U_0402_10V6K
DIS@
CC62 0.22U_0402_10V6K
DIS@
CC63 0.22U_0402_10V6K
DIS@
CC77 0.22U_0402_10V6K
DIS@
CC64 0.22U_0402_10V6K
DIS@
CC50 0.22U_0402_10V6K
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
DMI_CTX_PRX_P0 <17>
DMI_CTX_PRX_N0 <17>
DMI_CTX_PRX_P1 <17>
DMI_CTX_PRX_N1 <17>
DMI_CTX_PRX_P2 <17>
DMI_CTX_PRX_N2 <17>
DMI_CTX_PRX_P3 <17>
DMI_CTX_PRX_N3 <17>
PEG_CTX_C_GRX_P15
PEG_CTX_C_GRX_N15
PEG_CTX_C_GRX_P14
PEG_CTX_C_GRX_N14
PEG_CTX_C_GRX_P13
PEG_CTX_C_GRX_N13
PEG_CTX_C_GRX_P11
PEG_CTX_C_GRX_N11
PEG_CTX_C_GRX_N10PEG_CTX_GRX_N10
PEG_CTX_C_GRX_P9
PEG_CTX_C_GRX_N9
PEG_CTX_C_GRX_P8
PEG_CTX_C_GRX_N8
PEG_CTX_C_GRX_P7
PEG_CTX_C_GRX_N7
PEG_CTX_C_GRX_N6PEG_CTX_GRX_N6
PEG_CTX_C_GRX_P5
PEG_CTX_C_GRX_N5
PEG_CTX_C_GRX_P4
PEG_CTX_C_GRX_N4
PEG_CTX_C_GRX_P3
PEG_CTX_C_GRX_N3
PEG_CTX_C_GRX_P2
PEG_CTX_C_GRX_N2
PEG_CTX_C_GRX_P1
PEG_CTX_C_GRX_N1
PEG_CTX_C_GRX_P0
PEG_CTX_C_GRX_N0
?
SKYLAKE_HALO
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
4
3
2
Title
Size
Size
Size
Date : Sheet o f
Date : Sheet o f
Date : Sheet o f
Compal Electronics, Inc.
SKL-H (1/8)
SKL-H (1/8)
Document Number Re v
Document Number Re v
Document Number Re v
SKL-H (1/8)
LA-C841P
LA-C841P
LA-C841P
6 74Tuesday, September 08, 2015
6 74Tuesday, September 08, 2015
6 74Tuesday, September 08, 2015
1
0.1
0.1
0.1
Vinafix.com
5
4
3
2
1
12
RC13551_0402_5%
12
RC33551_0402_5%
12
RC30651_0402_5%
PCH_JTAG_TMS <20>
PCH_JTAG_TDI <20>
PCH_JTAG_TDO <20>
PCH_JTAGX <20>
PCH_XDP_PREQ# <22>
PCH_XDP_PRDY# <22>
+1.0V_PRIM_XDP
+3.3V_ALW_PCH
+1.0V_VCCSTG
XDP_DBRESET#
CFG0
CFG2
CFG4
CFG5
CFG6
CFG7
+3.3V_SPI
12
RC5
2.2K_0402_5%
0.1U_0402_25V6
CC35
12
XDP@
12
RC321
@
1K_0402_5%
12
RC181
1K_0402_5%
12
RC322
1K_0402_5%
12
Litho@
RC323
1K_0402_5%
12
RC324
@
1K_0402_5%
12
RC325
@
1K_0402_5%
SYS_PWROK_R
0.1U_0402_25V6
12
CC36@
Stall reset sequence after PCU
PLL lock until de-asserted
No Stall
Stall
1
0
PEG LANE REVERSAL
*
NORMAL
LANE
REVERSE D
1
0
eDP enable
Disable d
Enabled
PCI Express* Bifurcation
1x8, 2x4
Reserved
2x8
1x16
PEG Training
(default) PEG Train
immediately following
RESET# de-assertion
PEG Wait for BIOS for
trai ning
1
0
[6:5 ]
00
01
10
11
1
0
+1.0V_PRIM
RC216 0_0603_1%@
D D
T191
10/23 Intel review
+1.0V_PRIM_XDP
12
+1.0VS_VCCIO
C C
+1.0V_VCCST
1 2
RC329 150_0402_5%@
1 2
RC328 10K_0402_5%@
+1.0V_VCCST
+1.0V_VCCSTG
1 2
RC180 1K_0402_5%
B B
VR_SVID_DATA<63>
VR_SVID_ALERT#<63>
A A
RC13851_0402_5% @
12
RC132150_0402_5%
FIVR_EN
FIVR_EN
12
RC3261K_0402_5%
12
RC1661K_0402_5% @
12
RC1641K_0402_5%
12
RC17249.9_0402_1% @
VR_SVID_DATA
VR_SVID_ALERT#
1 2
@
PAD~D
SIO_PWRBTN#<20,36>
CPU_XDP_PREQ#
FIVR_EN_R
H_THERMTRIP#
PCH_JTAGX
VCCST_PWRGD
H_CATERR#
H_PROCHOT#
+1.0V_VCCST
12
12
+1.0V_PRIM_XDP
+1.0V_PRIM_XDP
0.1U_0402_25V6
0.1U_0402_25V6
@
@
12
12
CC37
CC33
PCH_RSMRST#_R H_VCCST_PWRGD_XDP
CFG0
PCH_SPI_D0<19>
RESET_OUT#<20,36>
1 2
RC124
XDP@ 1K_0402_5%
FIVR_EN
PCH_JTAG_TCK<20>
PCH_RSMRST#<36>
RC217 0_0402_5%@ 1 2
RC126 1K_0402_5%XDP@ 1 2
RC128 0_0402_5%XDP@ 1 2
1 2
RC129 0_0402_5%@
DDR_XDP_WAN_SMBDAT<14,15,20,45>
DDR_XDP_WAN_SMBCLK<14,15,20,45>
PCH_RSMRST#
ALW_PWRGD_3V_5V<58>
CPU_XDP_PREQ#
CPU_XDP_PRDY#
10/23 Intel review
10/23 Intel review
PCH_CPU_PCIBCLK_R_D<18>
PCH_CPU_PCIBCLK_R_D#<18>
56.2_0402_1%
100_0402_5%
12
RC155
220_0402_5%
RC157
RC156
VR_SVID_DATA
CPU_VIDALERT#
VR_SVID_CLK<63>
H_PROCHOT#<36,51,63,66,67>
DDR_VTT_CTRL<14>
VCCST_PWRGD<36>
H_PWRGD<20>
PLTRST_CPU#<16>
H_PM_SYNC_R<16>
H_PM_DOWN<16>
H_PECI<16,36>
H_THERMTRIP#< 14,15,16,36>
+1.0V_PRIM_XDP
CFG0
CFG1
CFG2
CFG3
XDP_OBS0_R
XDP_OBS1_R
CFG4
CFG5
CFG6
CFG7
SIO_PWRBTN#
FIVR_EN_R
SYS_PWROK_R
PCH_JTAG_TCK
CPU_XDP_TCLK
1
2
PCH_CPU_BCLK_R_D<18>
PCH_CPU_BCLK_R_D#<18>
CPU_24MHZ_R_D<18>
CPU_24MHZ_R_D#<18>
VR_SVID_CLK
H_PROCHOT#
RC158 499_0402_1%
DDR_VTT_CTRL
RC159 60.4_0402_1%
H_PWRGD
PLTRST_CPU#
H_PM_SYNC_R
RC167 30_0402_5%
H_PECI
RC168 20_0402_5%
RC319 0_0402_5%
RC171 0_0402_5%@
XDP_PRSNT_PIN1
JXDP1
1
GND0
3
OBSFN_A0
5
OBSFN_A1
7
GND2
OBSDATA_A09OBSDATA_C0
OBSDATA_A111OBSDATA_C1
13
GND4
OBSDATA_A215OBSDATA_C2
OBSDATA_A317OBSDATA_C3
19
GND6
21
OBSFN_B0
23
OBSFN_B1
25
GND8
OBSDATA_B027OBSDATA_D0
OBSDATA_B129OBSDATA_D1
31
GND10
OBSDATA_B233OBSDATA_D2
OBSDATA_B335OBSDATA_D3
37
GND12
PWRGOOD/HOOK039ITPCLK/HOOK4
41
HOOK1
VCC_OBS_AB43VCC_OBS_CD
45
HOOK2
47
HOOK3
49
GND14
51
SDA
53
SCL
55
TCK1
57
TCK0
59
GND16
+3.3V_ALW
CH17
1 2
5
0.1U_0402_25V6
P
B
PM_RSMRST#_AND
4
O
A
G
UC4
3
TC7SH08FU_SSOP5~D
PCH_CPU_BCLK_R_D
PCH_CPU_BCLK_R_D#
PCH_CPU_PCIBCLK_R_D
PCH_CPU_PCIBCLK_R_D#
CPU_24MHZ_R_D
CPU_24MHZ_R_D#
1 2
1 2
1 2
1 2
1 2
RC169 0_0402_5%@
1 2
1 2
XDP@
CFG3
1 2
RC121 1K_0402_5%
1 2
RC122 0_0402_5%@
ITPCLK#/HOOK5
RESET#/HOOK6
RC154 0_0402_5%@
CPU_VIDALERT#
VR_SVID_DATA
H_PROCHOT#_R
VCCST_PWRGD_CPUVCCST_PWRGD
H_PM_SYNC
H_PM_DOWN_RH_PM_DOWN
H_THERMTRIP#_RH_THERMTRIP#
H_SKTOCC# CPU_XDP_PREQ#
SKL_CNL#
H_CATERR#
GND1
OBSFN_C0
OBSFN_C1
GND3
GND5
GND7
OBSFN_D0
OBSFN_D1
GND9
GND11
GND13
DBR#/HOOK7
GND15
TRST#
GND17
CONN@SAMTE_BSH-030-01-L-D-A
1 2
B31
A32
D35
C36
E31
D31
BH31
BH32
BH29
BR30
BT13
H13
BT31
BP35
BM34
BP31
BT34
J31
BR33
BN1
BM30
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
TD0
54
56
TDI
58
TMS
60
CPU1E
BCLKP
BCLKN
PCI_BCLKP
PCI_BCLKN
CLK24P
CLK24N
VIDALERT#
VIDSCK
VIDSOUT
PROCHOT#
DDR_VTT_CNTL
VCCST_PWRGD
PROCPWRGD
RESET#
PM_SYNC
PM_DOWN
PECI
THERMTRIP#
SKTOCC#
PROC_SELECT#
CATERR#
SKL-H_BGA1440
+1.0V_PRIM_XDP
PCH_XDP_CLK_DP
PCH_XDP_CLK_DN
CPU_XDP_HOOK6
XDP_DBRESET#
CPU_XDP_TDO
CPU_XDP_TRST#
CPU_XDP_TDI
CPU_XDP_TMS
CPU_XDP_PRS
PCH_RSMRST#_R
SKYLAKE_HALO
BGA1440
CFG17
CFG16
CFG8
CFG9
CFG10
CFG11
CFG19
CFG18
CFG12
CFG13
CFG14
CFG15
12
PCH_RSMRST#_R <20>
RC318
47K_0402_5%
PROC_TRST#
PROC_PREQ#
PROC_PRDY#
CFG_RCOMP
PCH_XDP_CLK_DP <18>
PCH_XDP_CLK_DN <18>
1 2
RC144 0_0402_5%XDP@
XDP_DBRESET# <17>
CPU_XDP_TRST# <22>
1 2
RC127 1K_0402_5%XDP@
BN25
CFG[0]
BN27
CFG[1]
BN26
CFG[2]
BN28
CFG[3]
BR20
CFG[4]
BM20
CFG[5]
BT20
CFG[6]
BP20
CFG[7]
BR23
CFG[8]
BR22
CFG[9]
BT23
CFG[10]
BT22
CFG[11]
BM19
CFG[12]
BR19
CFG[13]
BP19
CFG[14]
BT19
CFG[15]
BN23
CFG[17]
BP23
CFG[16]
BP22
CFG[19]
BN22
CFG[18]
BR27
BPM#[0]
BT27
BPM#[1]
BM31
BPM#[2]
BT30
BPM#[3]
BT28
PROC_TDO
BL32
PROC_TDI
BP28
PROC_TMS
BR28
PROC_TCK
BP30
BL30
BP27
BT25
ITP_PMODE_CPU
PCH_SPI_D2_XDP
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG17
CFG16
CFG19
CFG18
XDP_OBS0
XDP_OBS1
CPU_XDP_TDO
CPU_XDP_TDI
CPU_XDP_TMS
CPU_XDP_TCLK
CPU_XDP_TRST#
CPU_XDP_PRDY#
12
RC222
49.9_0402_1%
SIO_PWRBTN#
1 2
1 2
RC312 0_0402_5%@
RC313 0_0402_5%@
PAD~D
PAD~D
PAD~D
PAD~D
PAD~D
PAD~D
PAD~D
ITP_PMODE_CPU <20>
PCH_SPI_D2_XDP <19>
+3.3V_ALW
1.5K_0402_5%
XDP@
12
RC241
0.1U_0402_25V6
XDP@
12
CC269
XDP_OBS0_R
XDP_OBS1_R
@
T184
@
T185
@
T180
@
T181
@
T179
@
T190
@
T189
CPU_XDP_HOOK6
10/23 I ntel review
XDP_DBRESET#
PCH_SPI_D0
EDS0.7
CPU_XDP_TDO
CPU_XDP_TRST#
CPU_XDP_TCLK
CPU_XDP_TMS
CPU_XDP_TDI
CPU_XDP_TDO
CPU_XDP_TCLK
CPU_XDP_PREQ#
CPU_XDP_PRDY#
RC307 0_0402_5%@
RC308 0_0402_5%@
RC309 0_0402_5%@
RC143 0_0402_5%@
RC315 0_0402_5%@
RC314 0_0402_5%@
RC6 2.2K_0402_5%XDP@
RC316 1.5K_0402_5%XDP@
RC133 1.5K_0402_5%XDP@
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size
Size
Size
Date: Sheet o f
Date: Sheet o f
Date: Sheet o f
Compal Electronics, Inc.
SKL-H (2/8)
SKL-H (2/8)
SKL-H (2/8)
Document Number Rev
Document Number Rev
Document Number Rev
LA-C841P
LA-C841P
LA-C841P
1
7 74Tuesday, September 08, 2015
7 74Tuesday, September 08, 2015
7 74Tuesday, September 08, 2015
0.1
0.1
0.1
Vinafix.com
5
DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
D D
C C
B B
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_A_CB0
DDR_A_CB1
DDR_A_CB2
DDR_A_CB3
DDR_A_CB4
DDR_A_CB5
DDR_A_CB6
DDR_A_CB7
CPU1A
BR6
DDR0_DQ[0]
BT6
DDR0_DQ[1]
BP3
DDR0_DQ[2]
BR3
DDR0_DQ[3]
BN5
DDR0_DQ[4]
BP6
DDR0_DQ[5]
BP2
DDR0_DQ[6]
BN3
DDR0_DQ[7]
BL4
DDR0_DQ[8]
BL5
DDR0_DQ[9]
BL2
DDR0_DQ[10]
BM1
DDR0_DQ[11]
BK4
DDR0_DQ[12]
BK5
DDR0_DQ[13]
BK1
DDR0_DQ[14]
BK2
DDR0_DQ[15]
BG4
DDR0_DQ[16]/DDR0_DQ[32]
BG5
DDR0_DQ[17]/DDR0_DQ[33]
BF4
DDR0_DQ[18]/DDR0_DQ[34]
BF5
DDR0_DQ[19]/DDR0_DQ[35]
BG2
DDR0_DQ[20]/DDR0_DQ[36]
BG1
DDR0_DQ[21]/DDR0_DQ[37]
BF1
DDR0_DQ[22]/DDR0_DQ[38]
BF2
DDR0_DQ[23]/DDR0_DQ[39]
BD2
DDR0_DQ[24]/DDR0_DQ[40]
BD1
DDR0_DQ[25]/DDR0_DQ[41]
BC4
DDR0_DQ[26]/DDR0_DQ[42]
BC5
DDR0_DQ[27]/DDR0_DQ[43]
BD5
DDR0_DQ[28]/DDR0_DQ[44]
BD4
DDR0_DQ[29]/DDR0_DQ[45]
BC1
DDR0_DQ[30]/DDR0_DQ[46]
BC2
DDR0_DQ[31]/DDR0_DQ[47]
AB1
DDR0_DQ[32]/DDR1_DQ[0]
AB2
DDR0_DQ[33]/DDR1_DQ[1]
AA4
DDR0_DQ[34]/DDR1_DQ[2]
AA5
DDR0_DQ[35]/DDR1_DQ[3]
AB5
DDR0_DQ[36]/DDR1_DQ[4]
AB4
DDR0_DQ[37]/DDR1_DQ[5]
AA2
DDR0_DQ[38]/DDR1_DQ[6]
AA1
DDR0_DQ[39]/DDR1_DQ[7]
V5
DDR0_DQ[40]/DDR1_DQ[8]
V2
DDR0_DQ[41]/DDR1_DQ[9]
U1
DDR0_DQ[42]/DDR1_DQ[10]
U2
DDR0_DQ[43]/DDR1_DQ[11]
V1
DDR0_DQ[44]/DDR1_DQ[12]
V4
DDR0_DQ[45]/DDR1_DQ[13]
U5
DDR0_DQ[46]/DDR1_DQ[14]
U4
DDR0_DQ[47]/DDR1_DQ[15]
R2
DDR0_DQ[48]/DDR1_DQ[32]
P5
DDR0_DQ[49]/DDR1_DQ[33]
R4
DDR0_DQ[50]/DDR1_DQ[34]
P4
DDR0_DQ[51]/DDR1_DQ[35]
R5
DDR0_DQ[52]/DDR1_DQ[36]
P2
DDR0_DQ[53]/DDR1_DQ[37]
R1
DDR0_DQ[54]/DDR1_DQ[38]
P1
DDR0_DQ[55]/DDR1_DQ[39]
M4
DDR0_DQ[56]/DDR1_DQ[40]
M1
DDR0_DQ[57]/DDR1_DQ[41]
L4
DDR0_DQ[58]/DDR1_DQ[42]
L2
DDR0_DQ[59]/DDR1_DQ[43]
M5
DDR0_DQ[60]/DDR1_DQ[44]
M2
DDR0_DQ[61]/DDR1_DQ[45]
L5
DDR0_DQ[62]/DDR1_DQ[46]
L1
DDR0_DQ[63]/DDR1_DQ[47]
BA2
DDR0_ECC[0]
BA1
DDR0_ECC[1]
AY4
DDR0_ECC[2]
AY5
DDR0_ECC[3]
BA5
DDR0_ECC[4]
BA4
DDR0_ECC[5]
AY1
DDR0_ECC[6]
AY2
DDR0_ECC[7]
DDR CHANNEL A
SKL-H_BGA1440
SKYLAKE_HALO
BGA1440
4
?
DDR0_CKP[0]
DDR0_CKN[0]
DDR0_CKN[1]
DDR0_CKP[1]
DDR0_CLKP[2]
DDR0_CLKN[2]
DDR0_CLKP[3]
DDR0_CLKN[3]
DDR0_CKE[0]
DDR0_CKE[1]
DDR0_CKE[2]
DDR0_CKE[3]
DDR0_CS#[0]
DDR0_CS#[1]
DDR0_CS#[2]
DDR0_CS#[3]
DDR0_ODT[0]
DDR0_ODT[1]
DDR0_ODT[2]
DDR0_BA[0]/DDR0_CAB[4]/DDR0_BA[0]
DDR0_BA[1]/DDR0_CAB[6]/DDR0_BA[1]
DDR0_BA[2]/DDR0_CAA[5]/DDR0_BG[0]
DDR0_RAS#/DDR0_CAB[3]/DDR0_MA[16]
DDR0_WE#/DDR0_CAB[2]/DDR0_MA[14]
DDR0_CAS#/DDR0_CAB[1]/DDR0_MA[15]
DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[0]
DDR0_MA[1]/DDR0_CAB[8]/DDR0_MA[1]
DDR0_MA[2]/DDR0_CAB[5]/DDR0_MA[2]
DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5]
DDR0_MA[6]/DDR0_CAA[2]/DDR0_MA[6]
DDR0_MA[7]/DDR0_CAA[4]/DDR0_MA[7]
DDR0_MA[8]/DDR0_CAA[3]/DDR0_MA[8]
DDR0_MA[9]/DDR0_CAA[1]/DDR0_MA[9]
DDR0_MA[10]/DDR0_CAB[7]/DDR0_MA[10]
DDR0_MA[11]/DDR0_CAA[7]/DDR0_MA[11]
DDR0_MA[12]/DDR0_CAA[6]/DDR0_MA[12]
DDR0_MA[13]/DDR0_CAB[0]/DDR0_MA[13]
DDR0_MA[14]/DDR0_CAA[9]/DDR0_BG[1]
DDR0_MA[15]/DDR0_CAA[8]/DDR0_ACT#
DDR0_DQSN[2]/DDR0_DQSN[4]
DDR0_DQSN[3]/DDR0_DQSN[5]
DDR0_DQSP[4]/DDR1_DQSP[0]
DDR0_DQSP[5]/DDR1_DQSP[1]
DDR0_DQSP[6]/DDR1_DQSP[4]
DDR0_DQSP[7]/DDR1_DQSP[5]
DDR0_DQSP[2]/DDR0_DQSP[4]
DDR0_DQSP[3]/DDR0_DQSP[5]
DDR0_DQSN[4]/DDR1_DQSN[0]
DDR0_DQSN[5]/DDR1_DQSN[1]
DDR0_DQSN[6]/DDR1_DQSN[4]
DDR0_DQSN[7]/DDR1_DQSN[5]
1 OF 14
DDR0_ODT[3]
DDR0_MA[3]
DDR0_MA[4]
DDR0_PAR
DDR0_ALERT#
DDR0_DQSN[0]
DDR0_DQSN[1]
DDR0_DQSP[0]
DDR0_DQSP[1]
DDR0_DQSP[8]
DDR0_DQSN[8]
?REV = 1
3
DDR_A_D16
DDR_A_CLK0 DDR_B_CLK#0
AG1
DDR_A_CLK#0
AG2
DDR_A_CLK#1 DDR_B_CLK1
AK1
DDR_A_CLK1
AK2
AL3
AK3
AL2
AL1
DDR_A_CKE0
AT1
DDR_A_CKE1
AT2
AT3
AT5
DDR_A_CS#0
AD5
DDR_A_CS#1
AE2
AD2
AE5
DDR_A_ODT0
AD3
DDR_A_ODT1
AE4
AE1
AD4
DDR_A_BA0
AH5
DDR_A_BA1
AH1
DDR_A_BG0
AU1
DDR_A_MA16
AH4
DDR_A_MA14
AG4
DDR_A_MA15
AD1
DDR_A_MA0
AH3
DDR_A_MA1
AP4
DDR_A_MA2
AN4
DDR_A_MA3
AP5
DDR_A_MA4
AP2
DDR_A_MA5
AP1
DDR_A_MA6
AP3
DDR_A_MA7
AN1
DDR_A_MA8
AN3
DDR_A_MA9
AT4
DDR_A_MA10
AH2
DDR_A_MA11
AN2
DDR_A_MA12
AU4
DDR_A_MA13
AE3
DDR_A_BG1
AU2
DDR_A_ACT#
AU3
DDR_A_PARITY
AG3
DDR_A_ALERT#
AU5
DDR_A_DQS#0
BR5
DDR_A_DQS#1
BL3
DDR_A_DQS#4
BG3
DDR_A_DQS#5
BD3
DDR_B_DQS0
AB3
DDR_B_DQS1
V3
DDR_B_DQS4
R3
DDR_B_DQS5
M3
DDR_A_DQS0
BP5
DDR_A_DQS1
BK3
DDR_A_DQS4
BF3
DDR_A_DQS5
BC3
DDR_B_DQS#0
AA3
DDR_B_DQS#1
U3
DDR_B_DQS#4
P3
DDR_B_DQS#5
L3
DDR_A_DQS8
AY3
DDR_A_DQS#8
BA3
DDR_A_CLK0 <14>
DDR_A_CLK#0 <14>
DDR_A_CLK#1 <14>
DDR_A_CLK1 <14>
DDR_A_CKE0 <14>
DDR_A_CKE1 <14>
DDR_A_CS#0 <14>
DDR_A_CS#1 <14>
DDR_A_ODT0 <14>
DDR_A_ODT1 <14>
DDR_A_BA0 <14>
DDR_A_BA1 <14>
DDR_A_BG0 <14>
DDR_A_BG1 <14>
DDR_A_ACT# <14>
DDR_A_PARITY <14>
DDR_A_ALERT# <14>
1 2
RD18 121_0402_1%
RD21 75_0402_1%
1 2
RD22 100_0402_1%
1 2
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63
DDR_B_CB0
DDR_B_CB1
DDR_B_CB2
DDR_B_CB3
DDR_B_CB4
DDR_B_CB5
DDR_B_CB6
DDR_B_CB7
DDR_RCOMP0
DDR_RCOMP1
DDR_RCOMP2
CPU1B
BT11
DDR1_DQ[0]/DDR0_DQ[16]
BR11
DDR1_DQ[1]/DDR0_DQ[17]
BT8
DDR1_DQ[2]/DDR0_DQ[18]
BR8
DDR1_DQ[3]/DDR0_DQ[19]
BP11
DDR1_DQ[4]/DDR0_DQ[20]
BN11
DDR1_DQ[5]/DDR0_DQ[21]
BP8
DDR1_DQ[6]/DDR0_DQ[22]
BN8
DDR1_DQ[7]/DDR0_DQ[23]
BL12
DDR1_DQ[8]/DDR0_DQ[24]
BL11
DDR1_DQ[9]/DDR0_DQ[25]
BL8
DDR1_DQ[10]/DDR0_DQ[26]
BJ8
DDR1_DQ[11]/DDR0_DQ[27]
BJ11
DDR1_DQ[12]/DDR0_DQ[28]
BJ10
DDR1_DQ[13]/DDR0_DQ[29]
BL7
DDR1_DQ[14]/DDR0_DQ[30]
BJ7
DDR1_DQ[15]/DDR0_DQ[31]
BG11
DDR1_DQ[16]/DDR0_DQ[48]
BG10
DDR1_DQ[17]/DDR0_DQ[49]
BG8
DDR1_DQ[18]/DDR0_DQ[50]
BF8
DDR1_DQ[19]/DDR0_DQ[51]
BF11
DDR1_DQ[20]/DDR0_DQ[52]
BF10
DDR1_DQ[21]/DDR0_DQ[53]
BG7
DDR1_DQ[22]/DDR0_DQ[54]
BF7
DDR1_DQ[23]/DDR0_DQ[55]
BB11
DDR1_DQ[24]/DDR0_DQ[56]
BC11
DDR1_DQ[25]/DDR0_DQ[57]
BB8
DDR1_DQ[26]/DDR0_DQ[58]
BC8
DDR1_DQ[27]/DDR0_DQ[59]
BC10
DDR1_DQ[28]/DDR0_DQ[60]
BB10
DDR1_DQ[29]/DDR0_DQ[61]
BC7
DDR1_DQ[30]/DDR0_DQ[62]
BB7
DDR1_DQ[31]/DDR0_DQ[63]
AA11
DDR1_DQ[32]/DDR1_DQ[16]
AA10
DDR1_DQ[33]/DDR1_DQ[17]
AC11
DDR1_DQ[34]/DDR1_DQ[18]
AC10
DDR1_DQ[35]/DDR1_DQ[19]
AA7
DDR1_DQ[36]/DDR1_DQ[20]
AA8
DDR1_DQ[37]/DDR1_DQ[21]
AC8
DDR1_DQ[38]/DDR1_DQ[22]
AC7
DDR1_DQ[39]/DDR1_DQ[23]
W8
DDR1_DQ[40]/DDR1_DQ[24]
W7
DDR1_DQ[41]/DDR1_DQ[25]
V10
DDR1_DQ[42]/DDR1_DQ[26]
V11
DDR1_DQ[43]/DDR1_DQ[27]
W11
DDR1_DQ[44]/DDR1_DQ[28]
W10
DDR1_DQ[45]/DDR1_DQ[29]
V7
DDR1_DQ[46]/DDR1_DQ[30]
V8
DDR1_DQ[47]/DDR1_DQ[31]
R11
DDR1_DQ[48]
P11
DDR1_DQ[49]
P7
DDR1_DQ[50]
R8
DDR1_DQ[51]
R10
DDR1_DQ[52]
P10
DDR1_DQ[53]
R7
DDR1_DQ[54]
P8
DDR1_DQ[55]
L11
DDR1_DQ[56]
M11
DDR1_DQ[57]
L7
DDR1_DQ[58]
M8
DDR1_DQ[59]
L10
DDR1_DQ[60]
M10
DDR1_DQ[61]
M7
DDR1_DQ[62]
L8
DDR1_DQ[63]
AW11
DDR1_ECC[0]
AY11
DDR1_ECC[1]
AY8
DDR1_ECC[2]
AW8
DDR1_ECC[3]
AY10
DDR1_ECC[4]
AW10
DDR1_ECC[5]
AY7
DDR1_ECC[6]
AW7
DDR1_ECC[7]
G1
DDR_RCOMP[0]
H1
DDR_RCOMP[1]
J2
DDR_RCOMP[2]
SKL-H_BGA1440
DDR CHANNEL B
REV = 1
2
?
SKYLAKE_HALO
BGA1440
DDR1_RAS#/DDR1_CAB[3]/DDR1_MA[16]
DDR1_WE#/DDR1_CAB[2]/DDR1_MA[14]
DDR1_CAS#/DDR1_CAB[1]/DDR1_MA[15]
DDR1_BA[0]/DDR1_CAB[4]/DDR1_BA[0]
DDR1_BA[1]/DDR1_CAB[6]/DDR1_BA[1]
DDR1_BA[2]/DDR1_CAA[5]/DDR1_BG[0]
DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[0]
DDR1_MA[1]/DDR1_CAB[8]/DDR1_MA[1]
DDR1_MA[2]/DDR1_CAB[5]/DDR1_MA[2]
DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[5]
DDR1_MA[6]/DDR1_CAA[2]/DDR1_MA[6]
DDR1_MA[7]/DDR1_CAA[4]/DDR1_MA[7]
DDR1_MA[8]/DDR1_CAA[3]/DDR1_MA[8]
DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[9]
DDR1_MA[10]/DDR1_CAB[7]/DDR1_MA[10]
DDR1_MA[11]/DDR1_CAA[7]/DDR1_MA[11]
DDR1_MA[12]/DDR1_CAA[6]/DDR1_MA[12]
DDR1_MA[13]/DDR1_CAB[0]/DDR1_MA[13]
DDR1_MA[14]/DDR1_CAA[9]/DDR1_BG[1]
DDR1_MA[15]/DDR1_CAA[8]/DDR1_ACT#
DDR1_DQSN[0]/DDR0_DQSN[2]
DDR1_DQSN[1]/DDR0_DQSN[3]
DDR1_DQSN[2]/DDR0_DQSN[6]
DDR1_DQSN[3]/DDR0_DQSN[7]
DDR1_DQSN[4]/DDR1_DQSN[2]
DDR1_DQSN[5]/DDR1_DQSN[3]
DDR1_DQSP[0]/DDR0_DQSP[2]
DDR1_DQSP[1]/DDR0_DQSP[3]
DDR1_DQSP[2]/DDR0_DQSP[6]
DDR1_DQSP[3]/DDR0_DQSP[7]
DDR1_DQSP[4]/DDR1_DQSP[2]
DDR1_DQSP[5]/DDR1_DQSP[3]
2 OF 14
DDR1_CKP[0]
DDR1_CKN[0]
DDR1_CKN[1]
DDR1_CKP[1]
DDR1_CLKP[2]
DDR1_CLKN[2]
DDR1_CLKP[3]
DDR1_CLKN[3]
DDR1_CKE[0]
DDR1_CKE[1]
DDR1_CKE[2]
DDR1_CKE[3]
DDR1_CS#[0]
DDR1_CS#[1]
DDR1_CS#[2]
DDR1_CS#[3]
DDR1_ODT[0]
DDR1_ODT[1]
DDR1_ODT[2]
DDR1_ODT[3]
DDR1_MA[3]
DDR1_MA[4]
DDR1_PAR
DDR1_ALERT#
DDR1_DQSN[6]
DDR1_DQSN[7]
DDR1_DQSP[6]
DDR1_DQSP[7]
DDR1_DQSP[8]
DDR1_DQSN[8]
DDR_VREF_CA
DDR0_VREF_DQ
DDR1_VREF_DQ
?
AM9
AN9
AM8
AM7
AM11
AM10
AJ10
AJ11
AT8
AT10
AT7
AT11
AF11
AE7
AF10
AE10
AF7
AE8
AE9
AE11
AH10
AH11
AF8
AH8
AH9
AR9
AJ9
AK6
AK5
AL5
AL6
AM6
AN7
AN10
AN8
AR11
AH7
AN11
AR10
AF9
AR7
AT9
AJ7
AR8
BP9
BL9
BG9
BC9
AC9
W9
R9
M9
BR9
BJ9
BF9
BB9
AA9
V9
P9
L9
AW9
AY9
BN13
BP13
BR13
DDR_B_CLK0
DDR_B_CLK#1
DDR_B_CKE0
DDR_B_CKE1
DDR_B_CS#0
DDR_B_CS#1
DDR_B_ODT0
DDR_B_ODT1
DDR_B_MA16
DDR_B_MA14
DDR_B_MA15
DDR_B_BA0
DDR_B_BA1
DDR_B_BG0
DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
DDR_B_BG1
DDR_B_ACT#
DDR_B_PARITY
DDR_B_ALERT#
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#6
DDR_A_DQS#7
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#6
DDR_B_DQS#7
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS6
DDR_A_DQS7
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS6
DDR_B_DQS7
DDR_B_DQS8
DDR_B_DQS#8
1
DDR_B_CLK0 <15>
DDR_B_CLK#0 <15>
DDR_B_CLK#1 <15>
DDR_B_CLK1 <15>
DDR_B_CKE0 <15>
DDR_B_CKE1 <15>
DDR_B_CS#0 <15>
DDR_B_CS#1 <15>
DDR_B_ODT0 <15>
DDR_B_ODT1 <15>
DDR_B_BA0 <15>
DDR_B_BA1 <15>
DDR_B_BG0 <15>
DDR_B_BG1 <15>
DDR_B_ACT# <15>
DDR_B_PARITY <15>
DDR_B_ALERT# <15>
+DDR_VREF_CA
@
T199
PAD~D
+DDR_VREF_B_DQ
DDR_A_MA[0..16] <14>
DDR_B_MA[0..16] <15>
DDR_A_D[0..63]<14>
DDR_B_D[0..63]<15>
DDR_A_CB[0..7]<14>
A A
DDR_B_CB[0..7]<15>
DDR_A_DQS[0..8] <14>
DDR_B_DQS[0..8] <15>
DDR_A_DQS#[0..8] <14>
DDR_B_DQS#[0..8] <15>
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size
Size
Size
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
SKL-H (3/8)
SKL-H (3/8)
Document Number Re v
Document Number Re v
Document Number Re v
SKL-H (3/8)
LA-C841P
LA-C841P
LA-C841P
1
8 74Tuesday, September 08, 2015
8 74Tuesday, September 08, 2015
8 74Tuesday, September 08, 2015
0.1
0.1
0.1
Vinafix.com
5
CPU_DP1_P0<26>
CPU_DP1_N0<26>
CPU_DP1_P1<26>
DOCK, AR, HDMI
D D
DOCK, AR, WIGIG
C C
CPU_DP1_P2<26>
CPU_DP1_N2<26>
CPU_DP1_P3<26>
CPU_DP1_N3<26>
CPU_DP1_AUXP<26>
CPU_DP1_AUXN<26>
CPU_DP2_P0<27>
CPU_DP2_N0<27>
CPU_DP2_P1<27>
CPU_DP2_N1<27>
CPU_DP2_P2<27>
CPU_DP2_N2<27>
CPU_DP2_P3<27>
CPU_DP2_N3<27>
CPU_DP2_AUXP<27>
CPU_DP2_AUXN<27>
CPU_DP3_P0<28>
CPU_DP3_N0<28>
CPU_DP3_P1<28>
CPU_DP3_N1<28>
VGA
CPU_DP3_AUXP<28>
CPU_DP3_AUXN<28>
4
CPU_DP1_P0
CPU_DP1_N0
CPU_DP1_P1
CPU_DP1_P2
CPU_DP1_N2
CPU_DP1_P3
CPU_DP1_N3
CPU_DP1_AUXP
CPU_DP1_AUXN
CPU_DP2_P0
CPU_DP2_N0
CPU_DP2_P1
CPU_DP2_N1
CPU_DP2_P2
CPU_DP2_N2
CPU_DP2_P3
CPU_DP2_N3
CPU_DP2_AUXP
CPU_DP2_AUXN
CPU_DP3_P0
CPU_DP3_N0
CPU_DP3_P1
CPU_DP3_N1
CPU_DP3_AUXP
CPU_DP3_AUXN
CPU1D
K36
DDI1_TXP[0]
K37
DDI1_TXN[0]
J35
DDI1_TXP[1]
J34
DDI1_TXN[1]
H37
DDI1_TXP[2]
H36
DDI1_TXN[2]
J37
DDI1_TXP[3]
J38
DDI1_TXN[3]
D27
DDI1_AUXP
E27
DDI1_AUXN
H34
DDI2_TXP[0]
H33
DDI2_TXN[0]
F37
DDI2_TXP[1]
G38
DDI2_TXN[1]
F34
DDI2_TXP[2]
F35
DDI2_TXN[2]
E37
DDI2_TXP[3]
E36
DDI2_TXN[3]
F26
DDI2_AUXP
E26
DDI2_AUXN
C34
DDI3_TXP[0]
D34
DDI3_TXN[0]
B36
DDI3_TXP[1]
B34
DDI3_TXN[1]
F33
DDI3_TXP[2]
E33
DDI3_TXN[2]
C33
DDI3_TXP[3]
B33
DDI3_TXN[3]
A27
DDI3_AUXP
B27
DDI3_AUXN
SKL-H_BGA1440
3
SKYLAKE_HALO
BGA1440
4 OF 14
REV = 1
?
EDP_TXP[0]
EDP_TXN[0]
EDP_TXP[1]
EDP_TXN[1]
EDP_TXN[2]
EDP_TXP[2]
EDP_TXN[3]
EDP_TXP[3]
EDP_AUXP
EDP_AUXN
EDP_DISP_UTIL
EDP_RCOMP
PROC_AUDIO_CLK
PROC_AUDIO_SDI
PROC_AUDIO_SDO
2
EDP_TXP0
D29
EDP_TXN0
E29
EDP_TXP1
F28
EDP_TXN1CPU_DP1_N1
E28
B29
A29
B28
C28
EDP_AUXP
C26
EDP_AUXN
B26
A33
EDP_COMP
D37
G27
G25
G29
?
AUD_AZACPU_SDI AUD_AZACPU_SDI_R
@
PAD~D
AUD_AZACPU_SCLK
AUD_AZACPU_SDO
AUD_AZACPU_SDI
T194
1 2
RC66 20_0402_5%
EDP_TXP0 <30>
EDP_TXN0 <30>
EDP_TXP1 <30>
EDP_TXN1 <30>CPU_DP1_N1<26>
EDP_AUXP <30>
EDP_AUXN <30>
EDP_COMP
AUD_AZACPU_SCLK <20>
AUD_AZACPU_SDO <20>
1
+1.0VS_VCCIO
12
RC124.9_0402_1%
AUD_AZACPU_SDI_R <20>
B B
A A
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size
Size
Size
Document Number Re v
Document Number Re v
Document Number Re v
Date : Sheet o f
Date : Sheet o f
Date : Sheet o f
2
Compal Electronics, Inc.
SKL-H (4/8)
SKL-H (4/8)
SKL-H (4/8)
LA-C841P
LA-C841P
LA-C841P
9 74Tuesday, September 08, 2015
9 74Tuesday, September 08, 2015
9 74Tuesday, September 08, 2015
1
0.1
0.1
0.1
Vinafix.com
5
D D
4
3
2
1
+VCC_EDRAM
3.3A
+VCC_EDRAM_ED2
C C
+VCC_EOPIO
+VCC_EOPIO_ED2
B B
3.2A
BJ17
BJ19
BJ20
BK17
BK19
BK20
BL16
BL17
BL18
BL19
BL20
BL21
BM17
BN17
BJ23
BJ26
BJ27
BK23
BK26
BK27
BL23
BL24
BL25
BL26
BL27
BL28
BM24
BL15
BM16
BL22
BM22
BP15
BR15
BT15
BP16
BR16
BT16
BN15
BM15
BP17
BN16
BM14
BL14
BJ35
BJ36
AT13
AW13
AU13
AY13
BT29
BR25
BP25
CPU1J
VCCOPC
VCCOPC
VCCOPC
VCCOPC
VCCOPC
VCCOPC
VCCOPC
VCCOPC
VCCOPC
VCCOPC
VCCOPC
VCCOPC
VCCOPC
VCCOPC
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
VCCOPC_SENSE
VSSOPC_SENSE
RSVD
RSVD
VCCEOPIO
VCCEOPIO
VCCEOPIO
RSVD
RSVD
RSVD
VCCEOPIO_SENSE
VSSEOPIO_SENSE
RSVD
RSVD
VCC_OPC_1P8
VCC_OPC_1P8
RSVD
RSVD
ZVM#
MSM#
ZVM2#
MSM2#
OPC_RCOMP
OPCE_RCOMP
OPCE_RCOMP2
SKL-H_BGA1440
SKYLAKE_HALO
BGA1440
CPU1K
T1PAD~D @
T2PAD~D @
T3PAD~D @
T4PAD~D @
T5PAD~D @
T6PAD~D @
T7PAD~D @
T9PAD~D @
T10PAD~D @
T11PAD~D @
T8PAD~D @
T14PAD~D @
T13PAD~D @
T15PAD~D @
T12PAD~D @
PCH_2_CPU_TRIGGER<22>
CPU_2_PCH_TRIGGER<22>
PCH_2_CPU_TRIGGER
CPU_2_PCH_TRIGGER_R
TP_SKL_F30
T16PAD~D @
TP_SKL_E30
T17PAD~D @
T18PAD~D @
T19PAD~D @
T21PAD~D @
T20PAD~D @
T23PAD~D @ T47 PAD~D@
T24PAD~D @
T22PAD~D @
TP_SKL_F30
TP_SKL_E30
D1
RSVD_TP
E1
RSVD_TP
E3
RSVD_TP
E2
RSVD_TP
BR1
RSVD_TP
BT2
RSVD_TP
BN35
RSVD
J24
RSVD
H24
RSVD
BN33
RSVD
BL34
RSVD
N29
RSVD
R14
RSVD
AE29
RSVD
AA14
RSVD
A36
RSVD
A37
RSVD
H23
PROC_TRIGIN
J23
PROC_TRIGOUT
F30
RSVD
E30
RSVD
B30
RSVD
C30
RSVD
G3
RSVD
J3
RSVD
BR35
RSVD
BR31
RSVD
BH30
RSVD
SKL-H_BGA1440
1 2
RC177 30_0402_5%
1 2
RC178 0_0402_5%@
1 2
RC179 0_0402_5%@
CPU_2_PCH_TRIGGER_RCPU_2_PCH_TRIGGER
SKYLAKE_HALO
BGA1440
RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP
RSVD
RSVD
RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP
RSVD
RSVD
RSVD
RSVD
RSVD_TP
RSVD_TP
RSVD
RSVD
RSVD
NCTF
NCTF
NCTF
NCTF
NCTF
NCTF
BM33
BL33
BJ14
BJ13
BK28
BJ28
BJ18
VSS
BJ16
BK16
BK24
BJ24
BK21
BJ21
BT17
BR17
BK18
VSS
BJ34
BJ33
G13
AJ8
BL31
B2
B38
BP1
BR2
C1
C38
T26 PAD~D@
T25 PAD~D@
T28 PAD~D@
T27 PAD~D@
T29 PAD~D@
T30 PAD~D@
T31 PAD~D@
T32 PAD~D@
T34 PAD~D@
T33 PAD~D@
T36 PAD~D@
T35 PAD~D@
T37 PAD~D@
T38 PAD~D@
T39 PAD~D@
T40 PAD~D@
T42 PAD~D@
T41 PAD~D@
T44 PAD~D@
T43 PAD~D@
T45 PAD~D@
T46 PAD~D@
T48 PAD~D@
T49 PAD~D@
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size
Size
Size
Date : Sheet o f
Date : Sheet o f
Date : Sheet o f
Compal Electronics, Inc.
SKL-H (5/8)
SKL-H (5/8)
Document Number Re v
Document Number Re v
Document Number Re v
SKL-H (5/8)
LA-C841P
LA-C841P
LA-C841P
1
10 74Tuesday, September 08, 2015
10 74Tuesday, September 08, 2015
10 74Tuesday, September 08, 2015
0.1
0.1
0.1
Vinafix.com
5
4
3
2
1
+VCC_GT +VCC_SA
D D
C C
BG34
BG35
BG36
BH33
BH34
BH35
BH36
BH37
BH38
BJ37
BJ38
BL36
BL37
BM36
BM37
BN36
BN37
BN38
BP37
BP38
BR37
BT37
BE38
BF13
BF14
BF29
BF30
BF31
BF32
BF35
BF36
BF37
BF38
BG29
BG30
BG31
BG32
BG33
BC36
BC37
BC38
BD13
BD14
BD29
BD30
BD31
BD32
BD33
BD34
BD35
BD36
BE31
BE32
BE37
SKYLAKE_HALO
CPU1H
BGA1440
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
SKL-H_BGA1440
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
AV29
AV30
AV31
AV32
AV33
AV34
AV35
AV36
AW14
AW31
AW32
AW33
AW34
AW35
AW36
AW37
AW38
AY29
AY30
AY31
AY32
AY35
AY36
AY37
AY38
BA13
BA14
BA29
BA30
BA31
BA32
BA33
BA34
BA35
BA36
BB13
BB14
BB31
BB32
BB33
BB34
BB35
BB36
BB37
BB38
BC29
BC30
BC31
BC32
BC35
BE33
BE34
BE35
BE36
+VCC_GT
+1.0VS_VCCIO
AG12
J30
K29
K30
K31
K32
K33
K34
K35
L31
L32
L35
L36
L37
L38
M29
M30
M31
M32
M33
M34
M35
M36
G15
G17
G19
G21
H15
H16
H17
H19
H20
H21
H26
H27
J15
J16
J17
J19
J20
J21
J26
J27
CPU1I
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
SKL-H_BGA1440
SKYLAKE_HALO
BGA1440
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQC
VCCPLL_OC
VCCPLL_OC
VCCST
VCCSTG
VCCSTG
VCCPLL
VCCPLL
VCCSA_SENSE
VSSSA_SENSE
VCCIO_SENSE
VSSIO_SENSE
AA6
AE12
AF5
AF6
AG5
AG9
AJ12
AL11
AP6
AP7
AR12
AR6
AT12
AW6
AY6
J5
J6
K12
K6
L12
L6
R6
T6
W6
Y12
BH13
G11
H30
H29
G30
H28
J28
M38
M37
H14
J14
+1.2V_MEM
12A
+VCC_FUSEPRG
+VCC_VDDQ_CLK
+VCC_SFR_OC
+1.0V_VCCST
+1.0V_VCCSTG
+1.0V_VCCSFR
VCC_SA_SENSE <63>
VSS_SA_SENSE <63>
VCC_IO_SENSE <61>
VSS_IO_SENSE <61>
RC218 0_0603_1%@
1 2
SIO_SLP_S3#<11,20,36,37,46,61,62>
SIO_SLP_SUS#<20,36,44,60,62>
SIO_SLP_S4#<1 1,20,36,37,59,71>
+1.0V_VCCSTG
+1.2V_MEM
12
CZ114 1U_0402_6.3V6K
+5V_ALW
1 2
RC305 0_0402_5%@
+3.3V_ALW
CZ115
@
1 2
5
0.1U_0402_10V7K
1
P
B
4
O
2
A
G
UC9
3
TC7SH08FU_SSOP5~D
+VCC_VDDQ_CLK +1.2V_MEM
PDDG page19, if don`t support DS3, contact to VDDQ directly
+VCC_SFR_OC
1 2
@
RC302 0_0402_5%
UZ26
1
VIN1
2
VIN2
7
VIN thermal
3
VBIAS
4
ON
TPS22961DNYR_WSON8
VOUT
GND
6
5
@
CZ113 0.1U_0201_10V6K
1 2
+1.0V_VCCSTG +1.0V_VCCST
1 2
RC317 0_0402_5%@
B B
+1.0V_PRIM
+5V_ALW
0.1U_0402_25V6
1U_0402_6.3V6K
1
12
CZ88
2
+3.3V_ALW
C1421
@
1 2
0.1U_0402_25V6
5
1
RC320 0_0402_5%@
IN1
2
IN2
1 2
P
VCCSTG_ON
4
O
G
3
A A
SIO_SLP_S0#<20,37>
SIO_SLP_S3#<11,20,36,37,46,61,62>
SN74AHC1G08DCKR_SC70-5
UC1
5
@
CZ86
UZ19
1
VIN1
2
VIN2
7
VIN thermal
3
VBIAS
4
ON
TPS22961DNYR_WSON8
VOUT
GND
+1.0V_VCCSTG
6
5
4
12
PJP1602
@
PAD-OPEN1x1m
+1.0V_VCCSTG_C
+1.0V_PRIM
1 2
CZ82 0.1U_0402_25V6@
SIO_SLP_S4#<11,20,36,37,59,71>
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
RC303 0_0402_5%@
1U_0402_6.3V6K
1
2
1 2
+5V_ALW
CZ107
0.1U_0402_25V6
12
VCCST_ON
@
CZ108
UZ18
1
VIN1
2
VIN2
7
VIN thermal
3
VBIAS
4
ON
TPS22961DNYR_WSON8
1 2
RC220 0_0402_5%@
+1.0V_VCCST +1.0V_VCCSFR
VOUT
GND
6
5
+1.0V_VCCST_UZ18
12
@
PAD-OPEN1x1m
CZ63
0.1U_0402_25V6
PJP17
1 2
12
RC304 0_0402_5%@
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size
Size
Size
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
SKL-H (6/8)
SKL-H (6/8)
Document Number Re v
Document Number Re v
Document Number Re v
SKL-H (6/8)
LA-C841P
LA-C841P
LA-C841P
1
11 74Tuesday, September 08, 2015
11 74Tuesday, September 08, 2015
11 74Tuesday, September 08, 2015
0.1
0.1
0.1
Vinafix.com
5
4
3
2
1
D D
C C
+1.2V_MEM
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
1
B B
CC161
2
2
22U_0603_6.3V6M
12
CC81
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
CC170
2
22U_0603_6.3V6M
12
CC82
10U_0603_6.3V6M~D
1
1
CC168
CC164
2
2
22U_0603_6.3V6M
22U_0603_6.3V6M
12
12
CC84
CC83
+VCC_VDDQ_CLK +1.0V_VCCSTG
+1.0VS_VCCIO
PLACE CAP BACKSIDE
10U_0603_6.3V6M~D
1
1
CC166
CC163
2
2
1
2
12
+1.0V_VCCST
10U_0603_6.3V6M~D
1
CC171
2
10U_0603_6.3V6M~D
CC185
PLACE CAP BACKSIDE
22U_0603_6.3V6M
22U_0603_6.3V6M
CC188
CC189
12
12
1U_0402_6.3V6K
1U_0402_6.3V6K
2
2
CC194
CC193
1
1
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
CC165
CC172
2
1
2
1U_0402_6.3V6K
2
1
22U_0603_6.3V6M
CC187
10U_0603_6.3V6M~D
CC167
PLACE CAP BACKSIDE
+1.0V_VCCSFR +1.0V_VCCST
1U_0402_6.3V6K
2
CC195
CC186
1
22U_0603_6.3V6M
CC272
12
+VCC_SFR_OC +VCC_GT +VCC_GTU
SKYLAKE_HALO
1U_0402_6.3V6K
1U_0402_6.3V6K
2
CC192
1
1U_0402_6.3V6K
2
CC191
1
1U_0402_6.3V6K
2
2
CC209
CC210
1
1
AJ29
AJ30
AJ31
AJ32
AJ33
AJ34
AJ35
AJ36
AK31
AK32
AK33
AK34
AK35
AK36
AK37
AK38
AL13
AL29
AL30
AL31
AL32
AL35
AL36
AL37
AL38
AM13
AM14
AM29
AM30
AM31
AM32
AM33
AM34
AM35
AM36
AN13
AN14
AN31
AN32
AN33
AN34
AN35
AN36
AN37
AN38
AP13
AP14
AP29
AP30
AP31
AP32
AP35
AP36
AP37
AP38
AR29
AR30
AR31
AR32
AR33
AR34
AR35
AR36
AT14
AT31
AT32
AT33
AT34
AT35
AT36
AT37
AT38
AU14
AU29
AU30
AU31
AU32
AU35
AU36
AU37
AU38
CPU1N
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
SKL-H_BGA1440
BGA1440
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGT_SENSE
VSSGTX_SENSE
VSSGT_SENSE
VCCGTX_SENSE
AF29
AF30
AF31
AF32
AF33
AF34
AG13
AG14
AG31
AG32
AG33
AG34
AG35
AG36
AH13
AH14
AH29
AH30
AH31
AH32
AJ13
AJ14
AH38
AH35
AH37
AH36
VCC_GT_SENSE <63>
VSS_GT_SENSE <63>
+VCC_CORE +VCC_CORE
SKYLAKE_HALO
CPU1G
AA13
AA31
AA32
AA33
AA34
AA35
AA36
AA37
AA38
AB29
AB30
AB31
AB32
AB35
AB36
AB37
AB38
AC13
AC14
AC29
AC30
AC31
AC32
AC33
AC34
AC35
AC36
AD13
AD14
AD31
AD32
AD33
AD34
AD35
AD36
AD37
AD38
AE13
AE14
AE30
AE31
AE32
AE35
AE36
AE37
AE38
AF35
AF36
AF37
AF38
RC221 49.9_0402_1%@
K13
K14
L13
N13
N14
N30
N31
N32
N35
N36
N37
N38
P13
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
SKL-H_BGA1440
1 2
BGA1440
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC_SENSE
VSS_SENSE
VCC_SENSEVSS_SENSE
V32
V33
V34
V35
V36
V37
V38
W13
W14
W29
W30
W31
W32
W35
W36
W37
W38
Y29
Y30
Y31
Y32
Y33
Y34
Y35
Y36
L14
P29
P30
P31
P32
P33
P34
P35
P36
R13
R31
R32
R33
R34
R35
R36
R37
R38
T29
T30
T31
T32
T35
T36
T37
T38
U29
U30
U31
U32
U33
U34
U35
U36
V13
V14
V31
P14
AG37
AG38
VCC_SENSE
VSS_SENSE
+VCC_CORE
12
12
RC140
100_0402_1%
RC141
100_0402_1%
VCC_SENSE <63>
VSS_SENSE <63>
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size
Size
Size
Date : Sheet o f
Date : Sheet o f
Date : Sheet o f
Compal Electronics, Inc.
SKL-H (7/8)
SKL-H (7/8)
Document Number Re v
Document Number Re v
Document Number Re v
SKL-H (7/8)
LA-C841P
LA-C841P
LA-C841P
1
12 74Tuesday, September 08, 2015
12 74Tuesday, September 08, 2015
12 74Tuesday, September 08, 2015
0.1
0.1
0.1
Vinafix.com
5
SKYLAKE_HALO
CPU1F
BGA1440
Y38
VSS
Y37
W34
W33
W12
Y14
Y13
Y11
Y10
Y9
Y8
Y7
W5
W4
W3
W2
W1
V30
V29
V12
V6
U38
U37
U6
T34
T33
T14
T13
T12
T11
T10
T9
T8
T7
T5
T4
T3
T2
T1
R30
R29
R12
P38
P37
P12
P6
N34
N33
N12
N11
N10
N9
N8
N7
N6
N5
N4
N3
N2
N1
M14
M13
M12
M6
L34
L33
L30
L29
K38
K11
K10
K9
K8
K7
K5
K4
K3
K2
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
SKL-H_BGA1440
NCTFVSS
REV = 1
D D
C C
B B
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
4
?
K1
J36
J33
J32
J25
J22
J18
J10
J7
J4
H35
H32
H25
H22
H18
H12
H11
G28
G26
G24
G23
G22
G20
G18
G16
G14
G12
G10
G9
G8
G6
G5
G4
F36
F31
F29
F27
F25
F23
F21
F19
F17
F15
F13
F11
F9
F8
F5
F4
F3
F2
E38
E35
E34
E9
E4
D33
D30
D28
D26
D24
D22
D20
D18
D16
D14
D12
D10
D9
D6
D3
C37
C31
C29
C27
D38
6 OF 14
BB4
BB3
BB2
BB1
BA38
BA37
BA12
BA11
BA10
BA9
BA8
BA7
BA6
B9
AY34
AY33
AY14
AY12
AW30
AW29
AW12
AW5
AW4
AW3
AW2
AW1
AV38
AV37
AU34
AU33
AU12
AU11
AU10
AU9
AU8
AU7
AU6
AT30
AT29
AT6
AR38
AR37
AR14
AR13
AR5
AR4
AR3
AR2
AR1
AP34
AP33
AP12
AP11
AP10
AP9
AP8
AN30
AN29
AN12
AN6
AN5
AM38
AM37
AM12
AM5
AM4
AM3
AM2
AM1
AL34
AL33
AL14
AL12
AL10
AL9
AL8
AL7
AL4
?
3
SKYLAKE_HALO
CPU1M
BGA1440
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
SKL-H_BGA1440
REV = 1
?
13 OF 14
NCTFVSS
NCTFVSS
NCTFVSS
NCTFVSS
NCTFVSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
2
?
SKYLAKE_HALO
CPU1L
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
SKL-H_BGA1440
VSS
VSS
VSS
REV = 1
BGA1440
12 OF 14
BT32
BT26
BT24
BT21
BT18
BT14
BT12
BR36
BR34
BR29
BR26
BR24
BR21
BR18
BR14
BR12
BP34
BP33
BP29
BP26
BP24
BP21
BP18
BP14
BP12
BN34
BN31
BN30
BN29
BN24
BN21
BN20
BN19
BN18
BN14
BN12
BM38
BM35
BM28
BM27
BM26
BM23
BM21
BM13
BM12
BM9
BM6
BM2
BL29
BK29
BK15
BK14
BJ32
BJ31
BJ25
BJ22
BH14
BH12
BH9
BH8
BH5
BH4
BH1
BG38
BG13
BG12
BF33
BF12
BE29
BE6
BD9
BC34
BC12
BB12
C17
C13
BT9
BT5
BR7
BP7
BN9
BN7
BN4
BN2
C9
AK30
AK29
AK4
AJ38
AJ37
AJ6
AJ5
AJ4
AJ3
AJ2
AJ1
AH34
AH33
AH12
AH6
AG30
AG29
AG11
AG10
AG8
AG7
AG6
AF14
AF13
AF12
AF4
AF3
AF2
AF1
AE34
AE33
AE6
AD30
AD29
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AC38
AC37
AC12
AC6
AC5
AC4
AC3
AC2
AC1
AB34
AB33
AB6
AA30
AA29
AA12
A30
A28
A26
A24
A22
A20
A18
A16
A14
A12
A10
A9
A6
B37
B3
A34
A4
A3
?
1
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
NCTFVSS
NCTFVSS
NCTFVSS
NCTFVSS
NCTFVSS
NCTFVSS
C25
C23
C21
C19
C15
C11
C8
C5
BM29
BM25
BM18
BM11
BM8
BM7
BM5
BM3
BL38
BL35
BL13
BL6
BK25
BK22
BK13
BK6
BJ30
BJ29
BJ15
BJ12
BH11
BH10
BH7
BH6
BH3
BH2
BG37
BG14
BG6
BF34
BF6
BE30
BE5
BE4
BE3
BE2
BE1
BD38
BD37
BD12
BD11
BD10
BD8
BD7
BD6
BC33
BC14
BC13
BC6
BB30
BB29
BB6
BB5
C2
BT36
BT35
BT4
BT3
BR38
?
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
SKL-H (8/8)
SKL-H (8/8)
Document Number Re v
Document Number Rev
Document Number Rev
SKL-H (8/8)
LA-C841P
LA-C841P
LA-C841P
13 74Tuesday, September 08, 2015
13 74Tuesday, September 08, 2015
13 74Tuesday, September 08, 2015
1
0.1
0.1
0.1
5
Title
Title
Title
Size
Size
Size
Date : Sheet o f
Date : Sheet o f
4
3
Date : Sheet o f
2
Vinafix.com
5
4
3
2
1
12
12
10U_0603_6.3V6M
12
@
RD63
RD67
0_0402_5%
DDR_A_D[0..63]<8>
DDR_A_CB[0..7]<8>
DDR_A_D5 DDR_A_D4
DDR_A_D1
DDR_A_DQS#0
DDR_A_DQS0
DDR_A_D2
DDR_A_D3
DDR_A_D9
DDR_A_D8
DDR_A_BA1<8>
DDR_A_MA14<8>
+2.5V_MEM
DDR_A_D15
DDR_A_D10
DDR_A_D33
DDR_A_D36
DDR_A_DQS#4
DDR_A_DQS4
DDR_A_D34
DDR_A_D35
DDR_A_D41
DDR_A_D40
DDR_A_D42
DDR_A_D43
DDR_A_CB0
DDR_A_CB5
DDR_A_DQS#8
DDR_A_DQS8
DDR_A_CB6
DDR_A_CB7
DDR_A_CKE0
DDR_A_BG1
DDR_A_BG0
DDR_A_MA12
DDR_A_MA9
DDR_A_MA8
DDR_A_MA6
DDR_A_MA3
DDR_A_MA1
DDR_A_CLK0
DDR_A_CLK#0
DDR_A_PARITY
DDR_A_BA1
DDR_A_CS#0
DDR_A_MA14
DDR_A_ODT0
DDR_A_CS#1
DDR_A_ODT1
T51PAD~D @
DDR_A_D17
DDR_A_D21
DDR_A_DQS#2
DDR_A_DQS2
DDR_A_D22
DDR_A_D19
DDR_A_D25
DDR_A_D26
DDR_A_D28
DDR_A_D29
DDR_A_D49
DDR_A_D50
DDR_A_DQS#6
DDR_A_DQS6
DDR_A_D55
DDR_A_D51
DDR_A_D60
DDR_A_D59
DDR_A_D61
+3.3V_RUN_DIMM1
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
12
12
12
12
CD81
CD79
CD80
CD82
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
CD90
CD88
CD89
CD87
12
CD29
+3.3V_RUN+3.3V_RUN+3.3V_RUN
12
RD64
@
0_0402_5%
DIMM1_SA0
DIMM1_SA1
DIMM1_SA2
12
@
RD68
0_0402_5%
12
+2.5V_MEM
1
2
12
1U_0402_6.3V6K
1
CD70
2
+3.3V_RUN
12
1U_0402_6.3V6K
12
1
2
1U_0402_6.3V6K
CD83
10U_0603_6.3V6M
CD91
1
CD71
2
@
RD65
0_0603_5%
2.2U_0402_6.3V6M
CD31
4
1U_0402_6.3V6K
12
12
CD84
10U_0603_6.3V6M
CD92
12
12
10U_0603_6.3V6M
10U_0603_6.3V6M
1
CD72
2
+3.3V_RUN_DIMM1
0.1U_0201_10V6K
CD32
1
2
1U_0402_6.3V6K
CD85
10U_0603_6.3V6M
330U_D3_2.5VY_R6M
@
12
CD93
CD20
+
DDR_A_CB0<8>
DDR_A_CB5<8>
DDR_A_DQS#8<8>
DDR_A_DQS8<8>
DDR_A_CB6<8>
DDR_A_CB7<8>
DDR_A_CKE0<8>
DDR_A_BG1<8>
DDR_A_BG0<8>
DDR_A_CLK0<8>
DDR_A_CLK#0<8>
DDR_A_PARITY<8>
DDR_A_CS#0<8>
CD73
DDR_A_ODT0<8>
DDR_A_CS#1<8>
DDR_A_ODT1<8>
JDIMM1
1
VSS1
3
DQ5
5
VSS3
7
DQ1
9
VSS5
DQS0_c11DM0_n/DBI0_n
13
DQS0_t
15
VSS8
17
DQ7
19
VSS10
21
DQ3
23
VSS12
25
DQ13
27
VSS14
29
DQ9
31
VSS16
33
DM1_n/DBI_n
35
VSS17
37
DQ15
39
VSS19
41
DQ10
43
VSS21
45
DQ21
47
VSS23
49
DQ17
51
VSS25
DQS2_c53DM2_n/DBI2_n
55
DQS2_t
57
VSS28
59
DQ23
61
VSS30
63
DQ19
65
VSS32
67
DQ29
69
VSS34
71
DQ25
73
VSS36
75
DM3_n/DBI3_n
77
VSS37
79
DQ30
81
VSS39
83
DQ26
85
VSS41
87
CB5/NC
89
VSS43
91
CB1/NC
93
VSS45
DQS8_c95DM8_n/DBI_n/NC
97
DQS8_t
99
VSS48
101
CB2/NC
103
VSS50
105
CB3/NC
107
VSS52
109
CKE0
111
VDD1
113
BG1
115
BG0
117
VDD3
119
A12
121
A9
123
VDD5
125
A8
127
A6
129
VDD7
131
A3
133
A1
135
VDD9
137
CK0_t
139
CK0_c
141
VDD11
143
PARITY
145
BA1
147
VDD13
149
CS0_n
151
WE_n/A14
153
VDD15
155
ODT0
157
CS1_n
159
VDD17
161
ODT1
163
VDD19
165
C1, CS3_n,NC
167
VSS53
169
DQ37
171
VSS55
173
DQ33
175
VSS57
177
DQS4_c
179
DQS4_t
181
VSS60
183
DQ38
185
VSS62
187
DQ34
189
VSS64
191
DQ44
193
VSS66
195
DQ40
197
VSS68
199
DM5_n/DBI5_n
201
VSS69
203
DQ46
205
VSS71
207
DQ42
209
VSS73
211
DQ52
213
VSS75
215
DQ49
217
VSS77
219
DQS6_c
221
DQS6_t
223
VSS80
225
DQ55
227
VSS82
229
DQ51
231
VSS84
233
DQ61
235
VSS86
237
DQ56
239
VSS88
241
DM7_n/DBI7_n
243
VSS89
245
DQ62
247
VSS91
249
DQ58
251
VSS93
253
SCL
255
VDDSPD
257
VPP1
259
VPP2
261
GND1
BELLW_SD-80886-1021
CONN@
3
EVENT_n/NF
CK1_c/NF
RAS_n/A16
CAS_n/A15
C0/CS2_n/NC
DM4_n/DBI4_n
DM6_n/DBI6_n
VSS2
VSS4
VSS6
VSS7
VSS9
VSS11
DQ12
VSS13
VSS15
DQS1_c
DQS1_t
VSS18
DQ14
VSS20
DQ11
VSS22
DQ20
VSS24
DQ16
VSS26
VSS27
DQ22
VSS29
DQ18
VSS31
DQ28
VSS33
DQ24
VSS35
DQS3_c
DQS3_t
VSS38
DQ31
VSS40
DQ27
VSS42
CB4/NC
VSS44
CB0/NC
VSS46
VSS47
CB6/NC
VSS49
CB7/NC
VSS51
RESET_n
CKE1
VDD2
ACT_n
ALERT_n
VDD4
VDD6
VDD8
VDD10
CK1_t/NF
VDD12
A10/AP
VDD14
VDD16
VDD18
VREFCA
VSS54
DQ36
VSS56
DQ32
VSS58
VSS59
DQ39
VSS61
DQ35
VSS63
DQ45
VSS65
DQ41
VSS67
DQS5_c
DQS5_t
VSS70
DQ47
VSS72
DQ43
VSS74
DQ53
VSS76
DQ48
VSS78
VSS79
DQ54
VSS81
DQ50
VSS83
DQ60
VSS85
DQ57
VSS87
DQS7_c
DQS7_t
VSS90
DQ63
VSS92
DQ59
VSS94
GND2
+1.2V_MEM+1.2V_MEM
2
4
DQ4
6
DDR_A_D0
8
DQ0
10
12
14
DDR_A_D6
16
DQ6
18
DDR_A_D7
20
DQ2
22
DDR_A_D12
24
26
DDR_A_D13
28
DQ8
30
DDR_A_DQS#1
32
DDR_A_DQS1
34
36
DDR_A_D14
38
40
DDR_A_D11
42
44
DDR_A_D32
46
48
DDR_A_D37
50
52
54
56
DDR_A_D38
58
60
DDR_A_D39
62
64
DDR_A_D44
66
68
DDR_A_D45
70
72
DDR_A_DQS#5
74
DDR_A_DQS5
76
78
DDR_A_D47
80
82
DDR_A_D46
84
86
DDR_A_CB1
88
90
DDR_A_CB4
92
94
96
98
DDR_A_CB3
100
102
DDR_A_CB2
104
106
DDR_DRAMRST#_R
108
DDR_A_CKE1
110
112
DDR_A_ACT#
114
DDR_A_ALERT#
116
118
DDR_A_MA11
120
A11
A7
A5
A4
A2
A0
BA0
A13
SA2
SDA
SA0
VTT
SA1
DDR_A_MA7
122
124
DDR_A_MA5
126
DDR_A_MA4
128
130
DDR_A_MA2
132
JDIMM1_EVENT#
134
136
DDR_A_CLK1
138
DDR_A_CLK#1
140
142
DDR_A_MA0
144
DDR_A_MA10
146
148
DDR_A_BA0
150
DDR_A_MA16
152
154
DDR_A_MA15
156
DDR_A_MA13
158
160
162
164
DIMM1_SA2
166
168
DDR_A_D16
170
172
DDR_A_D20
174
176
178
180
DDR_A_D23
182
184
DDR_A_D18
186
188
DDR_A_D30
190
192
DDR_A_D24
194
196
DDR_A_DQS#3
198
DDR_A_DQS3
200
202
DDR_A_D31
204
206
DDR_A_D27
208
210
DDR_A_D48
212
214
DDR_A_D54
216
218
220
222
DDR_A_D53
224
226
DDR_A_D52
228
230
DDR_A_D62
232
234
236
238
DDR_A_DQS#7
240
DDR_A_DQS7
242
244
DDR_A_D56
246
248
250
252
254
DIMM1_SA0
256
258
DIMM1_SA1
260
262
DDR_A_D57
DDR_A_D63DDR_A_D58
DDR_A_CB1 <8>
DDR_A_CB4 <8>
DDR_A_CB3 <8>
DDR_A_CB2 <8>
DDR_A_CKE1 <8>
DDR_A_ACT# <8>
DDR_A_ALERT# <8>
DDR_A_CLK1 <8>
DDR_A_CLK#1 <8>
DDR_A_BA0 <8>
DDR_A_MA16 <8>
DDR_A_MA15 <8>
T50 PAD~D@
+DDR_VREF_A_CA
DDR_XDP_WAN_SMBDAT <7,15,20,45>DDR_XDP_WAN_SMBCLK<7,15,20,45>
+0.6V_DDR_VTT
+DDR_VREF_A_CA
DDR_VTT_CTRL<7>
1
@
CD6
0.1U_0402_25V6
2
JDIMM1_EVENT#
1 2
@
RD29 0_0402_5%
RD61 1K_0402_5%@
UD1
1
NC
2
A
3
GND
74AUP1G07GW_TSSOP5
+1.2V_MEM
470_0402_1%
12
RD2
DDR_DRAMRST#
+1.2V_MEM
1K_0402_1%
12
RD9
1 2
RD19 2_0402_1%
1K_0402_1%
12
RD20
24.9_0402_1%
1 2
9/17 delete ODT Genertation, connect directly to CPU
refer 546765_2014WW37_SkylakeU_Y_MOW_Rev_1_0
+1.2V_MEM
1 2
5
VCC
CD30@0.1U_0201_10V6K
4
Y
RD30 100K_0402_5%
1 2
H_THERMTRIP# <7,15,16,36>
0.6V_DDR_VTT_ON <59>
RD16
12
12
+3.3V_ALW
DDR4_DRAMRST#_PCH <20>DDR_DRAMRST#_R<15>
+DDR_VREF_CA+DDR_VREF_A_CA
0.022U_0402_25V7K
CD36
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size
Size
Size
Date: Sheet o f
Date: Sheet o f
2
Date: Sheet o f
Compal Electronics, Inc.
DDR4
DDR4
Document Number Rev
Document Number Rev
Document Number Rev
DDR4
LA-C841P
LA-C841P
LA-C841P
1
14 74Tuesday, September 08, 2015
14 74Tuesday, September 08, 2015
14 74Tuesday, September 08, 2015
0.1
0.1
0.1
DDR_A_DQS#[0..8]<8>
DDR_A_DQS[0..8]<8>
DDR_A_MA[0..16]<8>
D D
+1.2V_MEM
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
12
12
CD9
CD8
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
CD16
CD15
12
12
1U_0402_6.3V6K
1U_0402_6.3V6K
CD25
1
1
2
2
12
CD4
CD17
12
CD26
CD7
CD12
1U_0402_6.3V6K
12
10U_0603_6.3V6M
12
1U_0402_6.3V6K
12
CD2
CD3
10U_0603_6.3V6M
CD13
CD14
12
+0.6V_DDR_VTT
1
2
12
12
1U_0402_6.3V6K
CD24
5
1U_0402_6.3V6K
12
+1.2V_MEM
10U_0603_6.3V6M
12
C C
B B
A A
1U_0402_6.3V6K
CD10
10U_0603_6.3V6M
1
2
12
12
12
CD18
12
1U_0402_6.3V6K
CD27
RD62
@
0_0402_5%
@
RD66
0_0402_5%
1U_0402_6.3V6K
1U_0402_6.3V6K
12
CD11
CD78
10U_0603_6.3V6M
10U_0603_6.3V6M
CD86
CD19
12
10U_0603_6.3V6M
12
CD28
12
@
0_0402_5%
12
@
Vinafix.com
5
4
3
2
1
JDIMM2
1
VSS1
3
DQ5
5
VSS3
7
DQ1
9
VSS5
DQS0_c11DM0_n/DBI0_n
13
DQS0_t
15
VSS8
17
DQ7
19
VSS10
21
DQ3
23
VSS12
25
DQ13
27
VSS14
29
DQ9
31
VSS16
33
DM1_n/DBI_n
35
VSS17
37
DQ15
39
VSS19
41
DQ10
43
VSS21
45
DQ21
47
VSS23
49
DQ17
51
VSS25
DQS2_c53DM2_n/DBI2_n
55
DQS2_t
57
VSS28
59
DQ23
61
VSS30
63
DQ19
65
VSS32
67
DQ29
69
VSS34
71
DQ25
73
VSS36
75
DM3_n/DBI3_n
77
VSS37
79
DQ30
81
VSS39
83
DQ26
85
VSS41
87
CB5/NC
89
VSS43
91
CB1/NC
93
VSS45
DQS8_c95DM8_n/DBI_n/NC
97
DQS8_t
99
VSS48
101
CB2/NC
103
VSS50
105
CB3/NC
107
VSS52
109
CKE0
111
VDD1
113
BG1
115
BG0
117
VDD3
119
A12
121
A9
123
VDD5
125
A8
127
A6
129
VDD7
131
A3
133
A1
135
VDD9
137
CK0_t
139
CK0_c
141
VDD11
143
PARITY
145
BA1
147
VDD13
149
CS0_n
151
WE_n/A14
153
VDD15
155
ODT0
157
CS1_n
159
VDD17
161
ODT1
163
VDD19
165
C1, CS3_n,NC
167
VSS53
169
DQ37
171
VSS55
173
DQ33
175
VSS57
177
DQS4_c
179
DQS4_t
181
VSS60
183
DQ38
185
VSS62
187
DQ34
189
VSS64
191
DQ44
193
VSS66
195
DQ40
197
VSS68
199
DM5_n/DBI5_n
201
VSS69
203
DQ46
205
VSS71
207
DQ42
209
VSS73
211
DQ52
213
VSS75
215
DQ49
217
VSS77
219
DQS6_c
221
DQS6_t
223
VSS80
225
DQ55
227
VSS82
229
DQ51
231
VSS84
233
DQ61
235
VSS86
237
DQ56
239
VSS88
241
DM7_n/DBI7_n
243
VSS89
245
DQ62
247
VSS91
249
DQ58
251
VSS93
253
SCL
255
VDDSPD
257
VPP1
259
VPP2
261
GND1
BELLW_SD-80886-1021
CONN@
3
RESET_n
EVENT_n/NF
CK1_c/NF
RAS_n/A16
CAS_n/A15
C0/CS2_n/NC
DM4_n/DBI4_n
DM6_n/DBI6_n
1U_0402_6.3V6K
12
10U_0603_6.3V6M
12
RD71
@
0_0402_5%
DIMM2_SA0
DIMM2_SA1
DIMM2_SA2
@
RD74
0_0402_5%
DDR_B_D[0..63]<8>
DDR_B_CB[0..7]<8>
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
12
12
CD105
10U_0603_6.3V6M
CD97
1U_0402_6.3V6K
1
CD74
2
+3.3V_RUN
12
12
1
2
12
12
12
CD106
10U_0603_6.3V6M
CD98
12
1U_0402_6.3V6K
CD75
@
RD60
0_0603_5%
+3.3V_RUN_DIMM2
2.2U_0402_6.3V6M
1
CD63
2
4
12
CD104
CD103
10U_0603_6.3V6M
CD96
CD95
12
+2.5V_MEM
1U_0402_6.3V6K
1U_0402_6.3V6K
12
12
CD109
CD107
CD108
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
CD99
12
10U_0603_6.3V6M
1
1
CD76
2
2
0.1U_0201_10V6K
CD64
330U_D3_2.5VY_R6M
12
CD100
CD101
12
+
10U_0603_6.3V6M
CD77
DDR_B_CB6<8>
@
DDR_B_CB2<8>
CD53
DDR_B_DQS#8<8>
DDR_B_DQS8<8>
DDR_B_CB7<8>
DDR_B_CB3<8>
DDR_B_CKE0<8>
DDR_B_BG1<8>
DDR_B_BG0<8>
DDR_B_CLK0<8>
DDR_B_CLK#0<8>
DDR_B_PARITY<8>
DDR_B_BA1<8>
DDR_B_CS#0<8>
DDR_B_MA14<8>
DDR_B_ODT0<8>
DDR_B_CS#1<8>
DDR_B_ODT1<8>
+2.5V_MEM
DDR_B_DQS#[0..8]<8>
DDR_B_DQS[0..8]<8>
DDR_B_MA[0..16]<8>
D D
+1.2V_MEM
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
12
12
12
12
+1.2V_MEM
10U_0603_6.3V6M
C C
B B
A A
12
CD37
CD45
12
CD38
10U_0603_6.3V6M
CD46
12
+0.6V_DDR_VTT
CD39
10U_0603_6.3V6M
CD47
12
1U_0402_6.3V6K
CD57
1
2
5
1U_0402_6.3V6K
12
12
CD41
CD40
CD42
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
CD50
CD48
CD49
12
12
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
CD58
CD59
1
1
1
2
2
2
12
@
RD69
0_0402_5%
12
@
RD72
0_0402_5%
12
12
CD60
1U_0402_6.3V6K
10U_0603_6.3V6M
CD43
CD51
12
12
12
10U_0603_6.3V6M
12
12
@
0_0402_5%
1U_0402_6.3V6K
CD44
10U_0603_6.3V6M
CD52
CD61
12
@
RD70
0_0402_5%
RD73
1U_0402_6.3V6K
12
CD102
10U_0603_6.3V6M
CD94
12
10U_0603_6.3V6M
@
CD62
+3.3V_RUN+3.3V_RUN+3.3V_RUN
12
12
DDR_B_D0
DDR_B_D4
DDR_B_DQS#0
DDR_B_DQS0
DDR_B_D3
DDR_B_D7
DDR_B_D12
DDR_B_D9
DDR_B_D11
DDR_B_D10
DDR_B_D38
DDR_B_D32
DDR_B_DQS#4
DDR_B_DQS4
DDR_B_D35
DDR_B_D37
DDR_B_D40
DDR_B_D44
DDR_B_D42
DDR_B_CB6
DDR_B_CB2
DDR_B_DQS#8
DDR_B_DQS8
DDR_B_CB7
DDR_B_CB3
DDR_B_CKE0
DDR_B_BG1
DDR_B_BG0
DDR_B_MA12
DDR_B_MA9
DDR_B_MA8
DDR_B_MA6
DDR_B_MA3
DDR_B_MA1
DDR_B_CLK0
DDR_B_CLK#0
DDR_B_PARITY
DDR_B_BA1
DDR_B_CS#0
DDR_B_MA14
DDR_B_ODT0
DDR_B_CS#1
DDR_B_ODT1
T55PAD~D @
DDR_B_D22
DDR_B_D23
DDR_B_DQS#2
DDR_B_DQS2
DDR_B_D17
DDR_B_D16
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D51
DDR_B_D54
DDR_B_DQS#6
DDR_B_DQS6
DDR_B_D53
DDR_B_D49
DDR_B_D62
DDR_B_D59
DDR_B_D60
DDR_B_D56
+3.3V_RUN_DIMM2
VSS2
VSS4
VSS6
VSS7
VSS9
VSS11
DQ12
VSS13
VSS15
DQS1_c
DQS1_t
VSS18
DQ14
VSS20
DQ11
VSS22
DQ20
VSS24
DQ16
VSS26
VSS27
DQ22
VSS29
DQ18
VSS31
DQ28
VSS33
DQ24
VSS35
DQS3_c
DQS3_t
VSS38
DQ31
VSS40
DQ27
VSS42
CB4/NC
VSS44
CB0/NC
VSS46
VSS47
CB6/NC
VSS49
CB7/NC
VSS51
CKE1
VDD2
ACT_n
ALERT_n
VDD4
VDD6
VDD8
VDD10
CK1_t/NF
VDD12
A10/AP
VDD14
VDD16
VDD18
VREFCA
VSS54
DQ36
VSS56
DQ32
VSS58
VSS59
DQ39
VSS61
DQ35
VSS63
DQ45
VSS65
DQ41
VSS67
DQS5_c
DQS5_t
VSS70
DQ47
VSS72
DQ43
VSS74
DQ53
VSS76
DQ48
VSS78
VSS79
DQ54
VSS81
DQ50
VSS83
DQ60
VSS85
DQ57
VSS87
DQS7_c
DQS7_t
VSS90
DQ63
VSS92
DQ59
VSS94
GND2
+1.2V_MEM+1.2V_MEM
2
DDR_B_D1
4
DQ4
6
DDR_B_D5
8
DQ0
10
12
14
DDR_B_D2
16
DQ6
18
DDR_B_D6
20
DQ2
22
DDR_B_D8
24
26
DDR_B_D13
28
DQ8
30
DDR_B_DQS#1
32
DDR_B_DQS1
34
36
DDR_B_D14
38
40
DDR_B_D15
42
44
DDR_B_D36
46
48
DDR_B_D34
50
52
54
56
DDR_B_D33
58
60
DDR_B_D39
62
64
DDR_B_D45
66
68
DDR_B_D41
70
72
DDR_B_DQS#5
74
DDR_B_DQS5
76
78
DDR_B_D43DDR_B_D46
80
82
DDR_B_D47
84
86
DDR_B_CB1
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
A11
122
A7
124
126
A5
128
A4
130
132
A2
134
136
138
140
142
144
A0
146
148
150
BA0
152
154
156
158
A13
160
162
164
166
SA2
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
206
208
210
212
214
216
218
220
222
224
226
228
230
232
234
236
238
240
242
244
246
248
250
252
254
SDA
256
SA0
258
VTT
260
SA1
262
DDR_B_CB4
DDR_B_CB0
DDR_B_CB5
DDR_DRAMRST#_R
DDR_B_CKE1
DDR_B_ACT#
DDR_B_ALERT#
DDR_B_MA11
DDR_B_MA7
DDR_B_MA5
DDR_B_MA4
DDR_B_MA2
JDIMM2_EVENT#
DDR_B_CLK1
DDR_B_CLK#1
DDR_B_MA0
DDR_B_MA10
DDR_B_BA0
DDR_B_MA16
DDR_B_MA15
DDR_B_MA13
DIMM2_SA2
DDR_B_D19
DDR_B_D18
DDR_B_D21
DDR_B_D20
DDR_B_D28
DDR_B_D29
DDR_B_DQS#3
DDR_B_DQS3
DDR_B_D31
DDR_B_D30
DDR_B_D52
DDR_B_D48
DDR_B_D55
DDR_B_D50
DDR_B_D61
DDR_B_D57
DDR_B_DQS#7
DDR_B_DQS7
DDR_B_D63
DDR_B_D58
DIMM2_SA0
DIMM2_SA1
DDR_B_CB1 <8>
DDR_B_CB4 <8>
DDR_B_CB0 <8>
DDR_B_CB5 <8>
DDR_B_CKE1 <8>
DDR_B_ACT# <8>
DDR_B_ALERT# <8>
DDR_B_CLK1 <8>
DDR_B_CLK#1 <8>
DDR_B_BA0 <8>
DDR_B_MA16 <8 >
DDR_B_MA15 <8>
T54 PAD~D@
+DDR_VREF_B_CA
DDR_XDP_WAN_SMBDAT <7,14,20,45>DDR_XDP_WAN_SMBCLK<7,14,20,45>
+0.6V_DDR_VTT
+DDR_VREF_B_CA
JDIMM2_EVENT#
+DDR_VREF_B_CA
RD4 1K_0402_5%@
1
@
CD35
0.1U_0402_25V6
2
1 2
DDR_DRAMRST#_R <14>
+1.2V_MEM
1K_0402_1%
12
RD43
1 2
RD75 2_0402_1%
1K_0402_1%
12
RD24
H_THERMTRIP# <7,14,16,36>
+DDR_VREF_B_DQ
0.022U_0402_25V7K
CD54
12
24.9_0402_1%
12
RD25
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size
Size
Size
Date: Sheet o f
Date: Sheet o f
2
Date: Sheet o f
Compal Electronics, Inc.
DDR4
DDR4
Document Number Rev
Document Number Rev
Document Number Rev
DDR4
LA-C841P
LA-C841P
LA-C841P
1
15 74Tuesday, September 08, 2015
15 74Tuesday, September 08, 2015
15 74Tuesday, September 08, 2015
0.1
0.1
0.1
Vinafix.com
5
4
3
2
1
PCH_CL_CLK1<33>
PCH_CL_DATA1<33>
D D
C C
+3.3V_ALW_PCH
RH341 10K_0402_5%
+3.3V_RUN
RH319 10K_0402_5%
RH318 10K_0402_5%
RH324 10K_0402_5%
RH76 10K_0402_5%
RH344 10K_0402_5%
RH90 10K_0402_5%
RH323 10K_0402_5%
@
RH325 10K_0402_5%
RH326 10K_0402_5%
@
@
RH322 10K_0402_5%
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
TBT_CIO_PLUG_EVENT#
CAM_MIC_CBL_DET#
M2_SLOT2_PCIE#_SATA
HDD_DET#
BIOS_REC
IFDET_SATA#_PCIE
CONTACTLESS_DET#
SATAGP3
SATAGP5
SATAGP6
SATAGP7
M.2 2280 SSD
M.2 2280 SSD
PCH_CL_RST1#<33>
CAM_MIC_CBL_DET#<30>
TBT_CIO_PLUG_EVENT#<46>
CONTACTLESS_DET#<37>
PCIE_PTX_DRX_P11<38>
PCIE_PTX_DRX_N11<38>
PCIE_PRX_DTX_P11<38>
PCIE_PRX_DTX_N11<38>
1 2
RH342 0_0402_5%
@
PCIE_PTX_DRX_N14<33>
PCIE_PTX_DRX_P14<33>
PCIE_PRX_DTX_N14<33>
PCIE_PRX_DTX_P14<33>
PCIE_PTX_DRX_P12<38>
PCIE_PTX_DRX_N12<38>
PCIE_PRX_DTX_P12<38>
PCIE_PRX_DTX_N12<38>
PCH_CL_CLK1
PCH_CL_DATA1
PCH_CL_RST1#
CAM_MIC_CBL_DET#
TBT_CIO_PLUG_EVENT#
CONTACTLESS_DET#
PCIE_PTX_DRX_P11
PCIE_PTX_DRX_N11
PCIE_PRX_DTX_P11
PCIE_PRX_DTX_N11
BIOS_REC
CS_CTR
PCIE_PTX_DRX_N14
PCIE_PTX_DRX_P14
PCIE_PRX_DTX_N14
PCIE_PRX_DTX_P14
PCIE_PTX_DRX_P12
PCIE_PTX_DRX_N12
PCIE_PRX_DTX_P12
PCIE_PRX_DTX_N12
UH1C
AV2
CL_CLK
AV3
CL_DATA
AW2
CL_RST#
R44
GPP_G8/FAN_PWM_0
R43
GPP_G9/FAN_PWM_1
U39
GPP_G10/FAN_PWM_2
N42
GPP_G11/FAN_PWM_3
U43
GPP_G0/FAN_TACH_0
U42
GPP_G1/FAN_TACH_1
U41
GPP_G2/FAN_TACH_2
M44
GPP_G3/FAN_TACH_3
U36
GPP_G4/FAN_TACH_4
P44
GPP_G5/FAN_TACH_5
T45
GPP_G6/FAN_TACH_6
T44
GPP_G7/FAN_TACH_7
B33
PCIE11_TXP
C33
PCIE11_TXN
K31
PCIE11_RXP
L31
PCIE11_RXN
AB33
GPP_F10/SCLOCK
AB35
GPP_F11/SLOAD
AA44
GPP_F13/SDATAOUT0
AA45
GPP_F12/SDATAOUT1
B38
PCIE14_TXN/SATA1B_TXN
C38
PCIE14_TXP/SATA1B_TXP
D39
PCIE14_RXN/SATA1B_RXN
E37
PCIE14_RXP/SATA1B_RXP
C36
PCIE13_TXN/SATA0B_TXN
B36
PCIE13_TXP/SATA0B_TXP
G35
PCIE13_RXN/SATA0B_RXN
E35
PCIE13_RXP/SATA0B_RXP
A35
PCIE12_TXP
B35
PCIE12_TXN
H33
PCIE12_RXP
G33
PCIE12_RXN
J45
PCIE20_TXP/SATA7_TXP
K44
PCIE20_TXN/SATA7_TXN
N38
PCIE20_RXP/SATA7_RXP
N39
PCIE20_RXN/SATA7_RXN
H44
PCIE19_TXP/SATA6_TXP
H43
PCIE19_TXN/SATA6_TXN
L39
PCIE19_RXP/SATA6_RXP
L37
PCIE19_RXN/SATA6_RXN
SKL-H-PCH_BGA837
SPT-H_PCH
PCIE_PRX_DTX_N9
THERMTRIP#
PM_SYNC
PM_DOWN
3 OF 12REV = 1.3
G31
PCIE_PRX_DTX_P9
H31
PCIE_PTX_DRX_N9
C31
PCIE_PTX_DRX_P9
B31
PCIE_PRX_DTX_N10
G29
PCIE_PRX_DTX_P10
E29
PCIE_PTX_DRX_N10
C32
PCIE_PTX_DRX_P10
B32
SATA_PRX_DTX_N2
F41
SATA_PRX_DTX_P2
E41
SATA_PTX_DRX_N2
B39
SATA_PTX_DRX_P2
A39
SATA_PRX_DTX_N3
D43
SATA_PRX_DTX_P3
E42
SATA_PTX_DRX_N3
A41
SATA_PTX_DRX_P3
A40
H42
H40
E45
F45
K37
G37
G45
G44
PCH_SATA_LED#
AD44
IFDET_SATA#_PCIE
AG36
M2_SLOT2_PCIE#_SATA
AG35
HDD_DET#
AG39
SATAGP3
AD35
AD31
SATAGP5
AD38
SATAGP6
AC43
SATAGP7
AB44
BIA_PWM_PCH
W36
PANEL_BKEN_PCH
W35
ENVDD_PCH
W42
PCH_THERMTRIP#
AJ3
PCH_PECI H_PECI
AL3
PECI
H_PM_SYNC_R
AJ4
PLTRST_CPU#
AK2
H_PM_DOWN
AH2
CLINK
FAN
PCIE9_RXN/SATA0A_RXN
PCIE9_RXP/SATA0A_RXP
PCIE9_TXN/SATA0A_TXN
PCIE9_TXP/SATA0A_TXP
PCIE10_RXN/SATA1A_RXN
PCIE10_RXP/SATA1A_RXP
PCIE10_TXN/SATA1A_TXN
PCIE10_TXP/SATA1A_TXP
PCIE15_RXN/SATA2_RXN
PCIE15_RXP/SATA2_RXP
PCIE15_TXN/SATA2_TXN
PCIE15_TXP/SATA2_TXP
PCIe/SATA
PCIE16_RXN/SATA3_RXN
PCIE16_RXP/SATA3_RXP
PCIE16_TXN/SATA3_TXN
PCIE16_TXP/SATA3_TXP
PCIE17_RXN/SATA4_RXN
PCIE17_RXP/SATA4_RXP
PCIE17_TXN/SATA4_TXN
PCIE17_TXP/SATA4_TXP
PCIE18_RXN/SATA5_RXN
PCIE18_RXP/SATA5_RXP
PCIE18_TXN/SATA5_TXN
PCIE18_TXP/SATA5_TXP
GPP_E8/SATALED#
GPP_E0/SATAXPCIE0/SATAGP0
GPP_E1/SATAXPCIE1/SATAGP1
GPP_E2/SATAXPCIE2/SATAGP2
GPP_F0/SATAXPCIE3/SATAGP3
GPP_F1/SATAXPCIE4/SATAGP4
GPP_F2/SATAXPCIE5/SATAGP5
GPP_F3/SATAXPCIE6/SATAGP6
GPP_F4/SATAXPCIE7/SATAGP7
GPP_F21/EDP_BKLTCTL
GPP_F20/EDP_BKLTEN
GPP_F19/EDP_VDDEN
HOST
PLTRST_PROC#
PCIE_PRX_DTX_N9 <38>
PCIE_PRX_DTX_P9 <38>
PCIE_PTX_DRX_N9 <38>
PCIE_PTX_DRX_P9 <38>
PCIE_PRX_DTX_N10 <38>
PCIE_PRX_DTX_P10 <38>
PCIE_PTX_DRX_N10 <38>
PCIE_PTX_DRX_P10 <38>
SATA_PRX_DTX_N2 <45>
SATA_PRX_DTX_P2 <45>
SATA_PTX_DRX_N2 <45>
SATA_PTX_DRX_P2 <45>
SATA_PRX_DTX_N3 <41>
SATA_PRX_DTX_P3 <41>
SATA_PTX_DRX_N3 <41>
SATA_PTX_DRX_P3 <41>
PCH_SATA_LED# <38 ,43>
IFDET_SATA#_PCIE <38>
M2_SLOT2_PCIE#_SATA <35>
HDD_DET# <45>
Reser ve
Reser ve
Reser ve
BIA_PWM_PCH <30>
PANEL_BKEN_PCH <30>
ENVDD_PCH <30,36>
1 2
1 2
RH75 620_0402_5%
RH73 43_0402_1%
H_PM_SYNC_R <7>
PLTRST_CPU# <7>
H_PM_DOWN <7>
M.2 2280 SSD
SATA HDD
E DOCK ESATA
SPSGP0
SPSGP1
SPSGP2
SPSGP31SATAGP3 0=SATA 1=PCIE
PCH_PECI
IFDET_SATA #_PCIE
11M2_SLOT2_PC IE#_SA TA
HDD_DET#
0
H_THERMTRIP# <7,14,15,36>
H_PECI <7,36>
12
@
RH74
10K_0402_5%
0=SATA
1=PCIE
1=SATA
0=PCIE
0=SATA 1=PCIE
B B
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size
Size
Size
Date: Sheet o f
Date: Sheet o f
Date: Sheet o f
Compal Electronics, Inc.
SKYLAKE PCH-H (1/9)
SKYLAKE PCH-H (1/9)
Document Number Rev
Document Number Rev
Document Number Rev
SKYLAKE PCH-H (1/9)
LA-C841P
LA-C841P
LA-C841P
1
16 74Tuesday, September 08, 2015
16 74Tuesday, September 08, 2015
16 74Tuesday, September 08, 2015
0.1
0.1
0.1
Vinafix.com
5
XDP_DBRESET#<7>
RH70 8.2K_0402_5%@
D D
ME_RESET#
12
CIS LINK OK
4
1 2
RH66@ 0_0402_5%
+3.3V_RUN
CH10
@
1 2
5
0.1U_0402_25V6
1
P
B
4
Y
2
A
G
@
74AHC1G09GW_TSSOP5
3
3
UC3
SYS_RESET#
SYS_RESET# <20,37>
2
1
DMI_CTX_PRX_N0<6>
DMI_CTX_PRX_P0<6>
DMI_CRX_PTX_N0<6>
DMI_CRX_PTX_P0<6>
DMI_CTX_PRX_N1<6>
DMI_CTX_PRX_P1<6>
DMI_CRX_PTX_N1<6>
DMI_CRX_PTX_P1<6>
DMI_CTX_PRX_N2<6>
C C
B B
AR
DMI_CTX_PRX_P2<6>
DMI_CRX_PTX_N2<6>
DMI_CRX_PTX_P2<6>
DMI_CTX_PRX_N3<6>
DMI_CTX_PRX_P3<6>
DMI_CRX_PTX_N3<6>
DMI_CRX_PTX_P3<6>
1 2
RH192 100_0402_1%
PCIE_PRX_DTX_N1<33>
PCIE_PRX_DTX_P1<33>
PCIE_PTX_DRX_N1<33>
PCIE_PTX_DRX_P1<33>
PCIE_PTX_DRX_N2<33>
PCIE_PTX_DRX_P2<33>
PCIE_PRX_DTX_N2<33>
PCIE_PRX_DTX_P2<33>
PCIE_PRX_DTX_N3<32>
PCIE_PRX_DTX_P3<32>
PCIE_PTX_DRX_N3<32>
PCIE_PTX_DRX_P3<32>
PCIE_PRX_DTX_N4<31>
PCIE_PRX_DTX_P4<31>
PCIE_PTX_DRX_N4<31>
PCIE_PTX_DRX_P4<31>
PCIE_PRX_DTX_N5<46>
PCIE_PRX_DTX_P5<46>
PCIE_PTX_DRX_N5<46>
PCIE_PTX_DRX_P5<46>
PCIE_PRX_DTX_N6<46>
PCIE_PRX_DTX_P6<46>
PCIE_PTX_DRX_N6<46>
PCIE_PTX_DRX_P6<46>
PCIE_PRX_DTX_N7<46>
PCIE_PRX_DTX_P7<46>
PCIE_PTX_DRX_N7<46>
PCIE_PTX_DRX_P7<46>
PCIE_PRX_DTX_N8<46>
PCIE_PRX_DTX_P8<46>
PCIE_PTX_DRX_N8<46>
PCIE_PTX_DRX_P8<46>
DMI_CTX_PRX_N0
DMI_CTX_PRX_P0
DMI_CRX_PTX_N0
DMI_CRX_PTX_P0
DMI_CTX_PRX_N1
DMI_CTX_PRX_P1
DMI_CRX_PTX_N1
DMI_CRX_PTX_P1
DMI_CTX_PRX_N2
DMI_CTX_PRX_P2
DMI_CRX_PTX_N2
DMI_CRX_PTX_P2
DMI_CTX_PRX_N3
DMI_CTX_PRX_P3
DMI_CRX_PTX_N3
DMI_CRX_PTX_P3
PCIECOMP#
PCIECOMP
PCIE_PRX_DTX_N1
PCIE_PRX_DTX_P1
PCIE_PTX_DRX_N1
PCIE_PTX_DRX_P1
PCIE_PTX_DRX_N2
PCIE_PTX_DRX_P2
PCIE_PRX_DTX_N2
PCIE_PRX_DTX_P2
PCIE_PRX_DTX_N3
PCIE_PRX_DTX_P3
PCIE_PTX_DRX_N3
PCIE_PTX_DRX_P3
PCIE_PRX_DTX_N4
PCIE_PRX_DTX_P4
PCIE_PTX_DRX_N4
PCIE_PTX_DRX_P4
PCIE_PRX_DTX_N5
PCIE_PRX_DTX_P5
PCIE_PTX_DRX_N5
PCIE_PTX_DRX_P5
PCIE_PRX_DTX_N6
PCIE_PRX_DTX_P6
PCIE_PTX_DRX_N6
PCIE_PTX_DRX_P6
PCIE_PRX_DTX_N7
PCIE_PRX_DTX_P7
PCIE_PTX_DRX_N7
PCIE_PTX_DRX_P7
PCIE_PRX_DTX_N8
PCIE_PRX_DTX_P8
PCIE_PTX_DRX_N8
PCIE_PTX_DRX_P8
UH1B
L27
DMI_RXN0
N27
DMI_RXP0
C27
DMI_TXN0
B27
DMI_TXP0
E24
DMI_RXN1
G24
DMI_RXP1
B28
DMI_TXN1
A28
DMI_TXP1
G27
DMI_RXN2
E26
DMI_RXP2
B29
DMI_TXN2
C29
DMI_TXP2
L29
DMI_RXN3
K29
DMI_RXP3
B30
DMI_TXN3
A30
DMI_TXP3
B18
PCIE_RCOMPN
C17
PCIE_RCOMPP
H15
PCIE1_RXN/USB3_7_RXN
G15
PCIE1_RXP/USB3_7_RXP
A16
PCIE1_TXN/USB3_7_TXN
B16
PCIE1_TXP/USB3_7_TXP
B19
PCIE2_TXN/USB3_8_TXN
C19
PCIE2_TXP/USB3_8_TXP
E17
PCIE2_RXN/USB3_8_RXN
G17
PCIE2_RXP/USB3_8_RXP
L17
PCIE3_RXN/USB3_9_RXN
K17
PCIE3_RXP/USB3_9_RXP
B20
PCIE3_TXN/USB3_9_TXN
C20
PCIE3_TXP/USB3_9_TXP
E20
PCIE4_RXN/USB3_10_RXN
G19
PCIE4_RXP/USB3_10_RXP
B21
PCIE4_TXN/USB3_10_TXN
A21
PCIE4_TXP/USB3_10_TXP
K19
PCIE5_RXN
L19
PCIE5_RXP
D22
PCIE5_TXN
C22
PCIE5_TXP
G22
PCIE6_RXN
E22
PCIE6_RXP
B22
PCIE6_TXN
A23
PCIE6_TXP
L22
PCIE7_RXN
K22
PCIE7_RXP
C23
PCIE7_TXN
B23
PCIE7_TXP
K24
PCIE8_RXN
L24
PCIE8_RXP
C24
PCIE8_TXN
B24
PCIE8_TXP
SKL-H-PCH_BGA837
SPT-H_PCH
DMI
PCIe/USB 3
USB 2.0
GPP_E9/USB2_OC0#
GPP_E10/USB2_OC1#
GPP_E11/USB2_OC2#
GPP_E12/USB2_OC3#
GPP_F15/USB2_OCB_4
GPP_F16/USB2_OCB_5
GPP_F17/USB2_OCB_6
GPP_F18/USB2_OCB_7
USB2_COMP
USB2_VBUSSENSE
RSVD_AB13
GPD7/RSVD
USB2N_1
USB2P_1
USB2N_2
USB2P_2
USB2N_3
USB2P_3
USB2N_4
USB2P_4
USB2N_5
USB2P_5
USB2N_6
USB2P_6
USB2N_7
USB2P_7
USB2N_8
USB2P_8
USB2N_9
USB2P_9
USB2N_10
USB2P_10
USB2N_11
USB2P_11
USB2N_12
USB2P_12
USB2N_13
USB2P_13
USB2N_14
USB2P_14
USB2_ID
2 OF 12REV = 1.3
AF5
AG7
AD5
AD7
AG8
AG10
AE1
AE2
AC2
AC3
AF2
AF3
AB3
AB2
AL8
AL7
AA1
AA2
AJ8
AJ7
W2
W3
AD3
AD2
V2
V1
AJ11
AJ13
AD43
AD42
AD39
AC44
Y43
Y41
W44
W43
AG3
USB2_VBUSSENSE
AD10
AB13
USB2_ID
AG2
BD14
USB20_N1
USB20_P1
USB20_N2
USB20_P2
USB20_N3
USB20_P3
USB20_N5
USB20_P5
USB20_N6
USB20_P6
USB20_N7
USB20_P7
USB20_N8
USB20_P8
USB20_N9
USB20_P9
USB20_N10
USB20_P10
USB20_N11
USB20_P11
USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#
USB2_COMP
3.3V_CAM_EN#
USB20_N1 <40>
USB20_P1 <40>
USB20_N2 <40>
USB20_P2 <40>
USB20_N3 <39>
USB20_P3 <39>
USB20_N5 <41>
USB20_P5 <41>
USB20_N6 <33>
USB20_P6 <33>
USB20_N7 <41>
USB20_P7 <41>
USB20_N8 <33>
USB20_P8 <33>
USB20_N9 <30>
USB20_P9 <30>
USB20_N10 <37>
USB20_P10 <37>
USB20_N11 <30>
USB20_P11 <30>
USB_OC0# <40>
USB_OC1# <40>
USB_OC2# <39>
Reser ve
RH193
RH364 1K_0402_5%1 2
RH365
@
3.3V_CAM_EN# <30>
1 2
1 2
113_0402_1%
0_0402_5%
USB_OC1#
USB_OC2#
USB_OC3#
USB_OC0#
RPH6
1 8
2 7
3 6
4 5
10K_0804_8P4R_5%
+3.3V_ALW_PCH
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size
Size
Size
Date: Sheet o f
Date: Sheet o f
Date: Sheet o f
Compal Electronics, Inc.
SKYLAKE PCH-H (2/9)
SKYLAKE PCH-H (2/9)
Document Number Rev
Document Number Rev
Document Number Rev
SKYLAKE PCH-H (2/9)
LA-C841P
LA-C841P
LA-C841P
1
17 74Tuesday, September 08, 2015
17 74Tuesday, September 08, 2015
17 74Tuesday, September 08, 2015
0.1
0.1
0.1
Vinafix.com
5
D D
4
3
2
1
1M_0402_1%
1 2
SPT-H_PCH
RH153
RH152 0_0402_5%@
1 2
CLKOUT_ITPXDP_N
CLKOUT_ITPXDP_P
CLKOUT_CPUPCIBCLK_N
CLKOUT_CPUPCIBCLK_P
CLKOUT_PCIE_N0
CLKOUT_PCIE_P0
CLKOUT_PCIE_N1
CLKOUT_PCIE_P1
CLKOUT_PCIE_N2
CLKOUT_PCIE_P2
CLKOUT_PCIE_N3
CLKOUT_PCIE_P3
CLKOUT_PCIE_N4
CLKOUT_PCIE_P4
CLKOUT_PCIE_N5
CLKOUT_PCIE_P5
CLKOUT_PCIE_N6
CLKOUT_PCIE_P6
CLKOUT_PCIE_N7
CLKOUT_PCIE_P7
CLKOUT_PCIE_N8
CLKOUT_PCIE_P8
CLKOUT_PCIE_N9
CLKOUT_PCIE_P9
CLKOUT_PCIE_N10
CLKOUT_PCIE_P10
CLKOUT_PCIE_N11
CLKOUT_PCIE_P11
7 OF 12REV = 1.3
3
4
YH2
24MHZ_12PF_X3G024000DC1H
1
2
dGPU
WIGIG
WLAN
MMI
LAN
TBT
HDD
PCH_XDP_CLK_DN
PCH_XDP_CLK_DP
PCH_CPU_PCIBCLK_R_D
PCH_XDP_CLK_DN_R
L1
PCH_XDP_CLK_DP_R
L2
J1
PCH_CPU_PCIBCLK_D# PCH_CPU_PCIBCLK_R_D#
J2
PCH_CPU_PCIBCLK_D
CLK_PEG_N0
N7
CLK_PEG_P0
N8
CLK_PCIE_N1
L7
CLK_PCIE_P1
L5
CLK_PCIE_N2
D3
CLK_PCIE_P2
F2
CLK_PCIE_N3
E5
CLK_PCIE_P3
G4
CLK_PCIE_N4
D5
CLK_PCIE_P4
E6
CLK_PCIE_N5
D8
CLK_PCIE_P5
D7
R8
R7
U5
U7
W10
W11
CLK_PCIE_N9
N3
CLK_PCIE_P9
N2
P3
P2
R3
R4
CH13
1 2
15P_0402_50V8J
CH14
1 2
15P_0402_50V8J
RH154 0_0402_5%@
1 2
RH155 0_0402_5%@
1 2
1 2
RH168 0_0402_5%@
RH167 0_0402_5%@
1 2
CLK_PEG_N0 <50>
CLK_PEG_P0 <50>
CLK_PCIE_N1 <33>
CLK_PCIE_P1 <33>
CLK_PCIE_N2 <33>
CLK_PCIE_P2 <33>
CLK_PCIE_N3 <32>
CLK_PCIE_P3 <32>
CLK_PCIE_N4 <31>
CLK_PCIE_P4 <31>
CLK_PCIE_N5 <46>
CLK_PCIE_P5 <46>
CLK_PCIE_N9 <38>
CLK_PCIE_P9 <38>
PCH_XDP_CLK_DN <7>
PCH_XDP_CLK_DP <7>
PCH_CPU_PCIBCLK_R_D# <7>
PCH_CPU_PCIBCLK_R_D <7>
UH1G
AR17
CPU_24MHZ_R_D<7>
CPU_24MHZ_R_D#<7>
PCH_CPU_BCLK_R_D<7>
PCH_CPU_BCLK_R_D#<7>
DIS@
RH366 10K_0402_5%
dGPU
WIGIG
WLAN
C C
MMI
LAN
TBT
HDD
WWAN
B B
+3.3V_RUN
CLKREQ_PEG#0<51>
CLKREQ_PCIE#1<33>
CLKREQ_PCIE#2<33>
CLKREQ_PCIE#3<32>
CLKREQ_PCIE#4<31>
CLKREQ_PCIE#5<46>
CLKREQ_PCIE#9<38>
CLKREQ_PCIE#14<33>
RH124 10K_0402_5%
+3.3V_RUN
RH125 10K_0402_5%
+3.3V_RUN
RH126 10K_0402_5%
+3.3V_RUN
RH127 10K_0402_5%
+3.3V_RUN
RH131 10K_0402_5%
+3.3V_RUN
RH132 10K_0402_5%
+3.3V_RUN
RH133 10K_0402_5%
+3.3V_RUN
DGPU_PWR_EN<21,53>
15P_0402_50V8J
15P_0402_50V8J
1 2
1 2
CPU_24MHZ_R_D PCH_CPU_NSSC_CLK_D
CPU_24MHZ_R_D#
PCH_CPU_BCLK_R_D
PCH_CPU_BCLK_R_D#
12
12
12
12
12
12
12
12
CLKREQ_PEG#0
DMN65D8LW-7_SOT323-3
DIS@
13
D
2
CH4
CH5
QH5
G
S
PCH_RTCX1_R
12
YH1
32.768KHZ_12.5PF_9H03200042
+1.0V_CLK5
CLKREQ_PEG#0
CLKREQ_PCIE#1
CLKREQ_PCIE#2
CLKREQ_PCIE#3
CLKREQ_PCIE#4
CLKREQ_PCIE#5
CLKREQ_PCIE#9
CLKREQ_PCIE#14
1 2
RH43 0_0402_5%@
RH169 0_0402_5%@
1 2
RH170 0_0402_5%@
1 2
1 2
RH161 0_0402_5%@
RH166 0_0402_5%@
1 2
1 2
RH171 2.7K_0402_1%
WWAN
12
RH44
10M_0402_5%
PCH_RTCX2
CLK_PCIE_N14<33>
CLK_PCIE_P14<33>
PCH_RTCX1
PCH_CPU_NSSC_CLK_D#
PCH_CPU_BCLK_D
PCH_CPU_BCLK_D#
XTAL24_OUT_R1
XTAL24_IN_R
XCLK_RBIAS
PCH_RTCX1
PCH_RTCX2
CLK_PCIE_N14
CLK_PCIE_P14
GPP_A16/CLKOUT_48
G1
CLKOUT_CPUNSSC_P
F1
CLKOUT_CPUNSSC_N
G2
CLKOUT_CPUBCLK_P
H2
CLKOUT_CPUBCLK_N
A5
XTAL24_OUT
A6
XTAL24_IN
E1
XCLK_BIASREF
BC9
RTCX1
BD10
RTCX2
BC24
GPP_B5/SRCCLKREQ0#
AW24
GPP_B6/SRCCLKREQ1#
AT24
GPP_B7/SRCCLKREQ2#
BD25
GPP_B8/SRCCLKREQ3#
BB24
GPP_B9/SRCCLKREQ4#
BE25
GPP_B10/SRCCLKREQ5#
AT33
GPP_H0/SRCCLKREQ6#
AR31
GPP_H1/SRCCLKREQ7#
BD32
GPP_H2/SRCCLKREQ8#
BC32
GPP_H3/SRCCLKREQ9#
BB31
GPP_H4/SRCCLKREQ10#
BC33
GPP_H5/SRCCLKREQ11#
BA33
GPP_H6/SRCCLKREQ12#
AW33
GPP_H7/SRCCLKREQ13#
BB33
GPP_H8/SRCCLKREQ14#
BD33
GPP_H9/SRCCLKREQ15#
R13
CLKOUT_PCIE_N15
R11
CLKOUT_PCIE_P15
P1
CLKOUT_PCIE_N14
R2
CLKOUT_PCIE_P14
W7
CLKOUT_PCIE_N13
Y5
CLKOUT_PCIE_P13
U2
CLKOUT_PCIE_N12
U3
CLKOUT_PCIE_P12
SKL-H-PCH_BGA837
XTAL24_IN_R
XTAL24_OUT_R1 XTAL24_OUT_R
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size
Size
Size
Date: Sheet o f
Date: Sheet o f
Date: Sheet o f
Compal Electronics, Inc.
SKYLAKE PCH-H (3/9)
SKYLAKE PCH-H (3/9)
Document Number Rev
Document Number Rev
Document Number Rev
SKYLAKE PCH-H (3/9)
LA-C841P
LA-C841P
LA-C841P
18 74Tuesday, September 08, 2015
18 74Tuesday, September 08, 2015
18 74Tuesday, September 08, 2015
1
0.1
0.1
0.1
Vinafix.com
5
+3.3V_ALW_PCH
SIO_EXT_SMI#
D D
+3.3V_RUN
C C
B B
A A
+3.3V_SPI
RH30 1K_0402_5%@
RH335 1K_0402_5%@
RH334 1K_0402_5%@
5
1 2
1 2
1 2
12
RH31010K_0402_5%
TOUCH_SCREEN_PD#
12
RH34810K_0402_5%
PCH_SPI_D2_XDP<7>
PCH_SPI_D2_R1
PCH_SPI_D3_R1
PCH_SPI_D3_R1
1 2
RH180 0_0402_5%@
MEDIACARD_IRQ#<32>
PCH_SPI_CS#0_R1
PCH_SPI_D2_R1 PCH_SPI_CLK_0_R
PCH_SPI_CS#1_R1
PCH_SPI_D2_R1
PCH_SPI_CLK_1_R
4
PME#
T178PAD~D @
T59PAD~D @
T60PAD~D @
T61PAD~D @
T58PAD~D @
T63PAD~D @
T62PAD~D @
1 2
1 2
1 2
1 2
11/17 RF request
4
PCH_SPI_D0
PCH_SPI_D1
PCH_SPI_CS#0
PCH_SPI_CLK
PCH_SPI_CS#1
PCH_SPI_D2PCH_SPI_D2_XDP
PCH_SPI_D3
PCH_SPI_CS#2
MEDIACARD_IRQ#
FFS_INT2
TPM_PIRQ#
12
@EMC@
33_0402_5%
1
@EMC@
27P_0402_50V8J
2
PCH_SPI_D0<7>
PCH_SPI_CS#2<37>
FFS_INT2<45>
TPM_PIRQ#<37>
@
RH37 0_0402_5%
RH351 33_0402_5%
RH352 0_0402_5%
@
RH353 33_0402_5%
@
BD17
AG15
AG14
AF17
AE17
AR19
AN17
BB29
BE30
BD31
BC31
AW31
BC29
BD30
AT31
AN36
AL39
AN41
AN38
AH43
AG44
PCH_SPI_CS#0_R2
PCH_SPI_D1_0_R
PCH_SPI_D2_0_R
PCH_SPI_CS#1_R2
PCH_SPI_D1_1_R
PCH_SPI_D2_1_R
RH354
CH271
PCH_PLTRST#
UH1A
GPP_A11/PME#
RSVD
RSVD
RSVD
RSVD
TP2
TP1
SPI0_MOSI
SPI0_MISO
SPI0_CS0#
SPI0_CLK
SPI0_CS1#
SPI0_IO2
SPI0_IO3
SPI0_CS2#
GPP_D1/SPI1_CLK
GPP_D0/SPI1_CS#
GPP_D3/SPI1_MOSI
GPP_D2/SPI1_MISO
GPP_D22/SPI1_IO3
GPP_D21/SPI1_IO2
SKL-H-PCH_BGA837
UC5
1
/CS
2
DO(IO1)
3
/WP(IO2)
4
GND
W25Q128FVSIQ_SO8
UC6
1
/CS
2
DO(IO1)
3
/WP(IO2)
4
GND
W25Q64FVSSIQ_SO8
3
+3.3V_RUN+3.3V_ALW_PCH
12
1
2
SPT-H_PCH
VCC
/HOLD(IO3)
CLK
DI(IO0)
@
VCC
/HOLD(IO3)
CLK
DI(IO0)
12
RH356
0_0402_5%
5
UH2
P
B
4
Y
A
G
TC7SH08FU_SSOP5
3
GPP_B13/PLTRST#
GPP_G16/GSXCLK
GPP_G12/GSXDOUT
GPP_G13/GSXSLOAD
GPP_G14/GSXDIN
GPP_G15/GSXSRESET#
GPP_E3/CPU_GP0
GPP_E7/CPU_GP1
GPP_B3/CPU_GP2
GPP_B4/CPU_GP3
GPP_H18/SML4ALERT#
GPP_H17/SML4DATA
GPP_H16/SML4CLK
GPP_H15/SML3ALERT#
GPP_H14/SML3DATA
GPP_H13/SML3CLK
GPP_H12/SML2ALERT#
GPP_H11/SML2DATA
GPP_H10/SML2CLK
INTRUDER#
+3.3V_SPI
8
PCH_SPI_D3_0_R
7
6
PCH_SPI_D0_0_R
5
+3.3V_SPI
8
PCH_SPI_D3_1_R
7
PCH_SPI_CLK_1_R
6
PCH_SPI_D0_1_R
5
RH357
@
0_0402_5%
PCH_PLTRST#_EC
PCH_SPI_D1_R1<37>
PCH_SPI_D0_R1<37>
PCH_SPI_CLK_R1<37>
CH9
1 2
0.1U_0201_10V6K
@
CH270
1 2
0.1U_0201_10V6K
12
RH196
@
100K_0402_5%
BB27
TBT_FORCE_PWR
P43
RTD3_CIO_PWR_EN
R39
R36
R42
R41
SIO_EXT_SMI#
AF41
AE44
BC23
BD24
BC36
BE34
BD39
BB36
BA35
BC35
BD35
AW35
BD34
PCH_INTRUDER_HDR#
BE11
RH210 0_0402_5%@
RH187 0_0402_5%@
RH197 0_0402_5%@
PCH_PLTRST#
PCH_SPI_D1_R1
PCH_SPI_D0_R1
PCH_SPI_CLK_R1
PCH_SPI_D3_R1
PCH_SPI_D1_R1
PCH_SPI_D0_R1
PCH_SPI_CLK_R1
PCH_SPI_D3_R1
1 2
1 2
1 2
TBT_FORCE_PWR <46>
RTD3_CIO_PWR_EN <35,46>
SIO_EXT_SMI# <36>
TOUCH_SCREEN_PD# <30>
TOUCHPAD_INTR# <42>
TOUCH_SCREEN_DET# <30>
+RTC_CELL
12
RPC1
1 8
2 7
3 6
4 5
33_0804_8P4R_5%
RPC2
@
4 5
3 6
2 7
1 8
33_0804_8P4R_5%
+3.3V_SPI
RH198
330K_0402_5%
PCH_SPI_D1_0_R
PCH_SPI_D0_0_R
PCH_SPI_CLK_0_R
PCH_SPI_D3_0_R
PCH_SPI_D1_1_R
PCH_SPI_D0_1_R
PCH_SPI_CLK_1_R
PCH_SPI_D3_1_R
2
PCH_PLTRST#_EC <36>
PCH_PLTRST#_AND <32,33,37,38>
PLTRST_TPM# <37>
PLTRST_TBT# <46>
1 2
RH194 0_0402_5%@
RH212 0_0402_5%@
1 2
RH195 0_0402_5%@
1 2
+3.3V_ALW_PCH
+3.3V_M
12
@
12
12
12
12
12
12
RH362 0_0402_5%
RH363 0_0402_5%@
RH185 0_0402_5%@
12
PLTRST_LAN# <31>
PLTRST_5048# <35>
PLTRST_GPU# <50>
PCH_SPI_CS#1_R1
RH1770_0402_5%
RH1780_0402_5%
RH1790_0402_5%
RH1810_0402_5%
PCH_SPI_CS#0_R1
RH1820_0402_5%
PCH_SPI_D2_R1
RH1830_0402_5%
PCH_SPI_D3_R1
RH1840_0402_5%
12
12
+3.3V_SPI_R
PCH_SPI_CLK_0_R
PCH_SPI_CS#1
PCH_SPI_D0_R1
PCH_SPI_D0
PCH_SPI_D1_R1
PCH_SPI_D1
PCH_SPI_CLK_R1
PCH_SPI_CLK
PCH_SPI_CS#0
PCH_SPI_D2
PCH_SPI_D3
12
@
RH1
33_0402_5%
1
@
CH269
27P_0402_50V8J
2
1
E-T_6705K-Y20N-00L
22
GND2
21
GND1
20
20
19
19
18
18
17
17
16
16
15
15
14
14
13
13
12
12
11
11
10
10
9
9
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
JSPI1
CONN@
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
SKYLAKE PCH-H (4/9)
SKYLAKE PCH-H (4/9)
Document Number Re v
Document Number Re v
Document Number Re v
SKYLAKE PCH-H (4/9)
LA-C841P
LA-C841P
LA-C841P
19 74Tuesday, September 08, 2015
19 74Tuesday, September 08, 2015
19 74Tuesday, September 08, 2015
1
0.1
0.1
0.1
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Title
Title
Size
Size
Size
Date: Sheet o f
Date: Sheet o f
Date: Sheet o f
Vinafix.com
5
+3.3V_ALW_PCH
1 2
RH56 1K_0402_5%
1 2
RH65 1K_0402_5%
1 2
RH67 499_0402_1%
1 2
RH77 499_0402_1%
D D
C C
B B
A A
1 2
RH80 1K_0402_5%
1 2
RH81 1K_0402_5%
+3.3V_PGPPBCH
1 2
RH61 4.7K_0402_5%
TLS CONFIDENTIALITY
HIGH
LOW(DEFAULT)
+3.3V_ALW_PCH
1 2
RH78 4.7K_0402_5%@
EC interface
HIGH
LOW(DEFAULT)
+3.3V_ALW_PCH
1 2
RH86 4.7K_0402_5%@
TOP SWAP STRAP
HIGH
LOW(DEFAULT)
PCH_DPWROK PCH_RSMRST#_R
1
2
1 2
RH215 0_0402_5%@
100K_0402_5%
0.01U_0402_50V7K
12
RH308
CH266
MEM_SMBCLK
MEM_SMBDATA
SML0_SMBCLK
SML0_SMBDATA
SML1_SMBCLK
SML1_SMBDATA
PCH_SMB_ALERT#
ENABLE
DISABLE
GPP_C5
ESPI
LPC
SPKR
ENABLE
DISABLE
+3.3V_RUN +3.3V_ALW_PCH
11/29 ,MOW for DCI 2/24 ,INTEL recommended
150K_0402_5%
RC332
1 2
GPP_B23 GPP_B23_Q
SIO_SLP_A#<20,36,37>
SIO_SLP_SUS#<11,20,36,44,60,62>
WEAK INTERNAL PD
5
RC327
@
0_0402_5%
@
D
S
13
@
L2N7002WT1G_SC-70-3
G
2
12
RH367 0_0402_5%@
12
RH368@ 0 _0402_5%
+3.3V_ALW_PCH
12
12
QC3
@
R3728
1K_0402_5%
Right Side (Up) JUSB3
Right Sid e (Do wn) JUSB1
EMC@ 1 2
CH268 22P_0402_50V8J
HDA_BIT_CLK_R< 34>
HDA_SDOUT_R<34>
AUD_AZACPU_SDO<9>
AUD_AZACPU_SDI_R<9>
AUD_AZACPU_SCLK<9>
RH329
150K_0402_5%
1 2
ME_FWP_EC ME_FWP
PT,ST pop R3728 and SW2; MP pop RC301
ME_FWP_EC<35>
PCH_DPWROK<36>
SML0_SMBCLK<31>
SML0_SMBDATA<31>
SML1_SMBCLK<36>
SML1_SMBDATA<36>
AUD_AZACPU_SDI_R
RC301 0_0402_5%@
ME_FWP
4
M.2 3042 (LTE)
EDOCK
Rear Side JUSB2
11/17 RF request
ME_FWP
RH200 20K_0402_5%
RH201 20K_0402_5%
@
SW2
1
A
2
B
3
C
4
G1
5
G2
SS3-CMFTQR9_3P
4
RH46 33_0402_5%
RH50 33_0402_5%
RH328 1K_0402_5%
RH45 33_0402_5%
RH48 33_0402_5%
RH39 30_0402_5%
RH38 30_0402_5%
HDA_RST#_R<34>
HDA_SDIN0<34>
HDA_SYNC_R<34>
+RTC_CELL
PCH_DPWROK
MEM_SMBCLK
MEM_SMBDATA
SML0_SMBCLK
SML0_SMBDATA
SML1_SMBCLK
SML1_SMBDATA
12
1 2
1 2
1 2
1 2
1 2
1 2
1 2
DGPU_PWROK<35,53,69>
1 2
1 2
PCH_PWROK<63>
PCH_RSMRST#_R<7>
USB3_PTX_DRX_N1<4 0>
USB3_PTX_DRX_P1<40>
USB3_PRX_DTX_N1<40>
USB3_PRX_DTX_P1<40>
USB3_PTX_DRX_N2<3 3>
USB3_PTX_DRX_P2<33>
USB3_PRX_DTX_N2<33>
USB3_PRX_DTX_P2<33>
USB3_PTX_DRX_N6<4 1>
USB3_PTX_DRX_P6<41>
USB3_PRX_DTX_N6<41>
USB3_PRX_DTX_P6<41>
USB3_PTX_DRX_P3<40>
USB3_PTX_DRX_N3<4 0>
USB3_PRX_DTX_P3<40>
USB3_PRX_DTX_N3<40>
USB3_PTX_DRX_P4<39>
USB3_PTX_DRX_N4<3 9>
USB3_PRX_DTX_P4<39>
USB3_PRX_DTX_N4<39>
HDA_BIT_CLK
HDA_RST#
HDA_SDIN0
HDA_SDOUT
HDA_SYNC
AUD_AZACPU_SDO_RAUD_AZACPU_SDO
AUD_AZACPU_SCLK_RAUD_AZACPU_SCLK
DGPU_PWROK
PCH_RTCRST#
SRTCRST#
PCH_PWROK
PCH_RSMRST#_R
PCH_SMB_ALERT#
GPP_C5
GPP_B23
CH41 1U_0402_6.3V6K
CH40 1U_0402_6.3V6K
USB3_PTX_DRX_N1
USB3_PTX_DRX_P1
USB3_PRX_DTX_N1
USB3_PRX_DTX_P1
USB3_PTX_DRX_N2
USB3_PTX_DRX_P2
USB3_PRX_DTX_N2
USB3_PRX_DTX_P2
USB3_PTX_DRX_N6
USB3_PTX_DRX_P6
USB3_PRX_DTX_N6
USB3_PRX_DTX_P6
USB3_PTX_DRX_P3
USB3_PTX_DRX_N3
USB3_PRX_DTX_P3
USB3_PRX_DTX_N3
USB3_PTX_DRX_P4
USB3_PTX_DRX_N4
USB3_PRX_DTX_P4
USB3_PRX_DTX_N4
1 2
1 2
PCH_RTCRST#<3 7>
1
1
CMOS1 SHORT PADS~D@
MEM_SMBCLK
MEM_SMBDATA
C11
B11
B12
A12
B15
C15
K15
K13
B14
C14
G13
H13
D13
C13
B10
B13
A14
G11
E11
UH1D
BA9
HDA_BCLK
BD8
HDA_RST#
BE7
HDA_SDI0
BC8
HDA_SDI1
BB7
HDA_SDO
BD9
HDA_SYNC
BD1
RSVD_BD1
BE2
RSVD_BE2
AM1
DISPA_SDO
AN2
DISPA_SDI
AM2
DISPA_BCLK
AL42
GPP_D8/I2S0_SCLK
AN42
GPP_D7/I2S0_RXD
AM43
GPP_D6/I2S0_TXD
AJ33
GPP_D5/I2S0_SFRM
AH44
GPP_D20/DMIC_DATA0
AJ35
GPP_D19/DMIC_CLK0
AJ38
GPP_D18/DMIC_DATA1
AJ42
GPP_D17/DMIC_CLK1
BC10
RTCRST#
BB10
SRTCRST#
AW11
PCH_PWROK
BA11
RSMRST#
AV11
DSW_PWROK
BB41
GPP_C2/SMBALERT#
AW44
GPP_C0/SMBCLK
BB43
GPP_C1/SMBDATA
BA40
GPP_C5/SML0ALERT#
AY44
GPP_C3/SML0CLK
BB39
GPP_C4/SML0DATA
AT27
GPP_B23/SML1ALERT#/PCHHOT#
AW42
GPP_C6/SML1CLK
AW45
GPP_C7/SML1DATA
SKL-H-PCH_BGA837
SRTCRST#
PCH_RTCRST#
2
2
3
UH1F
USB3_1_TXN
USB3_1_TXP
B7
USB3_1_RXN
A7
USB3_1_RXP
USB3_2_TXN/SSIC_1_TXN
USB3_2_TXP/SSIC_1_TXP
C8
USB3_2_RXN/SSIC_1_RXN
B8
USB3_2_RXP/SSIC_1_RXP
USB3_6_TXN
USB3_6_TXP
USB3_6_RXN
USB3_6_RXP
USB3_5_TXN
USB3_5_TXP
USB3_5_RXN
USB3_5_RXP
USB3_3_TXP/SSIC_2_TXP
USB3_3_TXN/SSIC_2_TXN
A9
USB3_3_RXP/SSIC_2_RXP
USB3_3_RXN/SSIC_2_RXN
USB3_4_TXP
USB3_4_TXN
USB3_4_RXP
USB3_4_RXN
SKL-H-PCH_BGA837
AUDIO
+3.3V_RUN
DMN65D8LDW-7_SOT363-6
3 4
DMN65D8LDW-7_SOT363-6
QH4B
3
2
@
T228
PAD~D
@
T227
PAD~D
@
T226
SPT-H_PC H
LPC/eSPI
USB
SATA
SPT-H_PCH
GPP_A12/BMBUSY#/ISH_GP6/SX_EXIT_HOLDOFF#
SMBUS
2
6 1
QH4A
5
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
GPP_A1/LAD0/ESPI_IO0
GPP_A2/LAD1/ESPI_IO1
GPP_A3/LAD2/ESPI_IO2
GPP_A4/LAD3/ESPI_IO3
GPP_A5/LFRAME#/ESPI_CS0#
GPP_A6/SERIRQ/ESPI_CS1#
GPP_A7/PIRQA#/ESPI_ALERT0#
GPP_A0/RCIN#/ESPI_ALERT1#
GPP_A14/SUS_STAT#/ESPI_RESET#
GPP_A9/CLKOUT_LPC0/ESPI_CLK
GPP_A10/CLKOUT_LPC1
GPP_G19/SMI#
GPP_G18/NMI#
GPP_E6/DEVSLP2
GPP_E5/DEVSLP1
GPP_E4/DEVSLP0
GPP_F9/DEVSLP7
GPP_F8/DEVSLP6
GPP_F7/DEVSLP5
GPP_F6/DEVSLP4
GPP_F5/DEVSLP3
GPP_A8/CLKRUN#
GPD11/LANPHYPC
GPD9/SLP_WLAN#
GPP_B2/VRALERT#
GPP_G17/ADR_COMPLETE
GPP_B12/SLP_S0#
GPD10/SLP_S5#
GPD0/BATLOW#
GPP_A13/SUSWARN#/SUSPWRDNACK
JTAG
GPP_A15/SUSACK#
GPD2/LAN_WAKE#
GPD1/ACPRESENT
GPD3/PWRBTN#
1 2
@
RZ106 0_0402_5%
1 2
@
RZ107 0_0402_5%
DDR_XDP_WAN_SMBCLK <7,14,15,45>
DDR_XDP_WAN_SMBDAT <7,14,15,45>
6 OF 12REV = 1.3
DRAM_RESET#
GPP_B1
GPP_B0
GPP_B11
SYS_PWROK
WAKE#
GPD6/SLP_A#
SLP_LAN#
GPD4/SLP_S3#
GPD5/SLP_S4#
GPD8/SUSCLK
SLP_SUS#
SYS_RESET#
GPP_B14/SPKR
PROCPWRGD
ITP_PMODE
JTAGX
JTAG_TMS
JTAG_TDO
JTAG_TDI
JTAG_TCK
AT22
AV22
AT19
BD16
BE16
BA17
AW17
AT17
BC18
BC17
AV19
M45
N43
AE45
AG43
AG42
AB39
AB36
AB43
AB42
AB41
BB17
AW22
AR15
AV13
BC14
BD23
AL27
AR27
N44
AN24
AY1
BC13
BC15
AV15
BC26
AW15
BD15
BA13
AN15
BD13
BB19
BD19
BD11
BB15
BB13
AT13
AW1
BD26
AM3
AT2
AR3
AR2
AP1
AP2
AN3
ME3_SMBCLK <44>
ME3_SMBDAT <44>
PAD~D
PAD~D
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
LPC_LFRAME#
IRQ_SERIRQ
HDD_FALL_INT
SIO_RCIN#
GPP_A14
PCI_CLK_LPC0
PCI_CLK_LPC1
CLKRUN#
PM_LANPHY_ENABLE
SIO_SLP_WLAN#
DDR4_DRAMRST#_PCH
VRALERT#
RESET_OUT#
PCH_PCIE_WAKE#
SIO_SLP_A#
SIO_SLP_LAN#
SIO_SLP_S0#
SIO_SLP_S3#
SIO_SLP_S4#
SIO_SLP_S5#
SUSCLK
PCH_BATLOW#
SUSACK#
ME_SUS_PWR_ACK
LAN_WAKE#
AC_PRESENT_R
SIO_PWRBTN#
SYS_RESET#
SPKR
H_PWRGD
ITP_PMODE_CPU
PCH_JTAGX
PCH_JTAG_TMS
PCH_JTAG_TDO
PCH_JTAG_TDI
PCH_JTAG_TCK
2
@
T225
LPC_LAD0 <35,36>
LPC_LAD1 <35,36>
LPC_LAD2 <35,36>
LPC_LAD3 <35,36>
PAD~D
LPC_LFRAME# <35,36>
IRQ_SERIRQ <35,36>
HDD_FALL_INT <45>
SIO_RCIN# <36>
RH96 22_0402_5%EMC@
RH97 22_0402_5%EMC@
RH99 22_0402_5%EMC@
RH98 22_0402_5%EMC@
HDD_DEVSLP <45>
M2_DEVSLP <38>
CLKRUN# <35,36>
PM_LANPHY_ENABLE <31>
SIO_SLP_WLAN# <35,44>
DDR4_DRAMRST#_PCH <14>
RESET_OUT# <7,36>
PCH_PCIE_WAKE# <35,36>
SIO_SLP_A# <20,36,37>
SIO_SLP_LAN# <36,44>
SIO_SLP_S0# <11,37>
SIO_SLP_S3# <11,36,37,46,61,62>
SIO_SLP_S4# <11,36,37,59,71>
SIO_SLP_S5# <36,37>
SUSCLK <33,38>
SUSACK# <36>
ME_SUS_PWR_ACK <36>
LAN_WAKE# <31,36>
SIO_SLP_SUS# <11,20,36,44,60,62>
SIO_PWRBTN# <7,36>
SYS_RESET# <17,37>
SPKR <34>
H_PWRGD <7>
ITP_PMODE_CPU <7>
PCH_JTAGX <7>
PCH_JTAG_TMS <7>
PCH_JTAG_TDO <7>
PCH_JTAG_TDI <7>
PCH_JTAG_TCK <7>
DELL CONFIDENTIAL/PROPRIETARY
PAD~D
PAD~D
PAD~D
PAD~D
PAD~D
PAD~D
@
T229
1 2
1 2
1 2
1 2
@
@
@
@
@
@
AC_PRESENT<36>
T192
T182
T183
T186
T187
T188
1
CLK_PCI_5048 <35>
CLK_PCI_MEC <36>
CLK_PCI_LPDEBUG <36>
CLK_PCI_DOCK <41>
CLK_PCI_5048
CLK_PCI_MEC
CLK_PCI_LPDEBUG
CLK_PCI_DOCK
GPP_A14
VRALERT#
SIO_SLP_LAN#
ME_SUS_PWR_ACK
PM_LANPHY_ENABLE
PCH_PCIE_WAKE#
LAN_WAKE#
PCH_BATLOW#
SIO_RCIN#
CLKRUN#
RESET_OUT#
10/23
ME_SUS_PWR_ACK
Title
Title
Title
Size
Size
Size
Date: Sheet o f
Date: Sheet o f
Date: Sheet o f
IRQ_SERIRQ
HDD_FALL_INT
PCH_JTAG_TCK
SUSCLK
PCH_JTAG_TMS
PCH_JTAG_TDI
PCH_JTAG_TDO
DDR_XDP_WAN_SMBDAT
DDR_XDP_WAN_SMBCLK
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Document Number Rev
Document Number Rev
Document Number Rev
1 2
CH42 1 2P_0402_50V8J@EMC@
1 2
CH49 1 2P_0402_50V8J@EMC@
1 2
CH50 1 2P_0402_50V8J@EMC@
1 2
CH51 1 2P_0402_50V8J@EMC@
RH338 100K_0402_5%
RH199 100K_0402_5%
SKYLAKE PCH-H (5/9)
SKYLAKE PCH-H (5/9)
SKYLAKE PCH-H (5/9)
LA-C841P
LA-C841P
LA-C841P
1
+3.3V_ALW_PCH
1 2
RH95 10K_0402_5%@
1 2
RH203 10K_0402_5%@
1 2
RH204 10K_0402_5%@
1 2
RH327 10K_0402_5%
12
RH31251_0402_5%
RH31451_0402_5%
RH31551_0402_5%
SUSACK#
AC_PRESENT_RAC_PRESENT
20 74Tuesday, September 08, 2015
20 74Tuesday, September 08, 2015
20 74Tuesday, September 08, 2015
RH31351_0402_5% @
RH831K_0402_5% @12
+1.0V_VCCSTG
+3.3V_RUN
12
RH3742.2K_0402_5%
12
RH3332.2K_0402_5%
+3.3V_DSW
+3.3V_RUN
1 2
1 2
RH92 1K_0402_5%
1 2
RH93 10K_0402_5%
1 2
RH94 8.2K_0402_5%
1 2
RH213 10K_0402_5%
1 2
RH202 8.2K_0402_5%
1 2
1 2
RH340 10K_0402_5%
1 2
RH355 10K_0402_5%
12
12
12
RH840_0402_5% @12
RH850_0402_5% @12
0.1
0.1
0.1
Vinafix.com
5
4
3
2
1
+3.3V_ALW_PCH
+3.3V_RUN
1 2
RH207 100K_0402_5%
1 2
RH347 100K_0402_5%
1 2
RH360 49.9K_0402_1%@
1 2
D D
C C
B B
RH361 49.9K_0402_1%@
1 2
RH79 10K_0402_5%
1 2
RH331 4.7K_0402_5%@
1 2
RH339 10K_0402_5%
1 2
RH345 10K_0402_5%
+3.3V_ALW_PCH
1 2
RH309 10K_0402_5%
1 2
RC330 49.9K_0402_1%
1 2
RC331 49.9K_0402_1%
GPP_C8
TS_EN
LPSS_UART2_TXD
LPSS_UART2_RXD
3.3V_TP_EN
NRB_BIT
SIO_EXT_SCI#
AUD_PWR_EN
SIO_EXT_WAKE#
LPSS_UART2_TXD
LPSS_UART2_RXD
HDD_EN
HDD_EN< 45>
TS_EN
TS_EN<30>
PCH_DP1_HPD<26>
PCH_DP2_HPD<27>
PCH_DP3_HPD<28>
Rese rve
EDP_HPD<30>
SIO_EXT_SCI#
3.3V_TP_EN
NRB_BIT
GPP_C8
HOST_SD_WP#
LCD_CBL_DET#
SIO_EXT_WAKE#
LPSS_UART2_TXD
LPSS_UART2_RXD
I2C_1_SCL
I2C_1_SDA
PCH_DP1_HPD
PCH_DP2_HPD
PCH_DP3_HPD
EDP_HPD
SIO_EXT_SCI#<36>
UART0_TXD<36>
HOST_SD_WP#<32>
LCD_CBL_DET#<30>
8/20
SIO_EXT_WAKE#<36>
I2C_1_SCL<42>
I2C_1_SDA<42> KB_DET# <42>
UH1K
AT29
GPP_B22/GSPI1_MOSI
AR29
GPP_B21/GSPI1_MISO
AV29
GPP_B20/GSPI1_CLK
BC27
GPP_B19/GSPI1_CS#
BD28
GPP_B18/GSPI0_MOSI
BD27
GPP_B17/GSPI0_MISO
AW27
GPP_B16/GSPI0_CLK
AR24
GPP_B15/GSPI0_CS#
AV44
GPP_C9/UART0_TXD
BA41
GPP_C8/UART0_RXD
AU44
GPP_C11/UART0_CTS#
AV43
GPP_C10/UART0_RTS#
AU41
GPP_C15/UART1_CTS#/ISH_UART1_CTS#
AT44
GPP_C14/UART1_RTS#/ISH_UART1_RTS#
AT43
GPP_C13/UART1_TXD/ISH_UART1_TXD
AU43
GPP_C12/UART1_RXD/ISH_UART1_RXD
AN43
GPP_C23/UART2_CTS#
AN44
GPP_C22/UART2_RTS#
AR39
GPP_C21/UART2_TXD
AR45
GPP_C20/UART2_RXD
AR41
GPP_C19/I2C1_SCL
AR44
GPP_C18/I2C1_SDA
AR38
GPP_C17/I2C0_SCL
AT42
GPP_C16/I2C0_SDA
AM44
GPP_D4/ISH_I2C2_SDA/ISH_I2C3_SDA
AJ44
GPP_D23/ISH_I2C2_SCL/ISH_I2C3_SCL
SKL-H-PCH_BGA837
UH1E
AW4
GPP_I0/DDPB_HPD0
AY2
GPP_I1/DDPC_HPD1
AV4
GPP_I2/DDPD_HPD2
BA4
GPP_I3/DDPE_HPD3
BD7
GPP_I4/EDP_HPD
SKL-H-PCH_BGA837
SPT-H_PCH
GPP_D16/ISH_UART0_CTS#
GPP_D14/ISH_UART0_TXD/SML0BCLK/I2C2_SCL
GPP_D13/ISH_UART0_RXD/SML0BDATA/I2C2_SDA
SPT-H_PCH
GPP_D15/ISH_UART0_RTS#
GPP_H20/ISH_I2C0_SCL
GPP_H19/ISH_I2C0_SDA
GPP_H22/ISH_I2C1_SCL
GPP_H21/ISH_I2C1_SDA
GPP_A23/ISH_GP5
GPP_A22/ISH_GP4
GPP_A21/ISH_GP3
GPP_A20/ISH_GP2
GPP_A19/ISH_GP1
GPP_A18/ISH_GP0
GPP_A17/ISH_GP7
GPP_I7/DDPC_CTRLCLK
GPP_I8/DDPC_CTRLDATA
GPP_I5/DDPB_CTRLCLK
GPP_I6/DDPB_CTRLDATA
GPP_I9/DDPD_CTRLCLK
GPP_I10/DDPD_CTRLDATA
GPP_F14
GPP_F23
GPP_F22
GPP_G23
GPP_G22
GPP_G21
GPP_G20
GPP_H23
GPP_D9
GPP_D10
GPP_D11
GPP_D12
BB3
BD6
BA5
BC4
BE5
BE6
Y44
V44
W39
L43
L44
U35
R35
BD36
DIMM_TYPE
AL44
AL36
AL35
DGPU_PWR_EN
AJ39
AJ43
AL43
AK44
AK45
BC38
BB38
BD38
BE39
IR_CAM_DET#
BC22
NON_DOCK
BD18
AUD_PWR_EN
BE21
KB_DET#
BD22
BD21
BB22
BC19
PCH_DP2_CTRL_CLK
PCH_DP2_CTRL_DATA
PCH_DP1_CTRL_CLK
PCH_DP1_CTRL_DATA
PCH_DP3_CTRL_DATA
GPP_F23
ISH_UART0_CTS# <33>
ISH_UART0_RTS# <33>
ISH_UART0_TXD <33>
ISH_UART0_RXD <33>
PCH_DP2_CTRL_CLK <27>
PCH_DP1_CTRL_CLK <26>
DGPU_HOLD_RST# <50>
DGPU_PWR_EN <18,53>
IR_CAM_DET# <30>
AUD_PWR_EN <34>
PCH_DP2_CTRL_DATA <27>
PCH_DP1_CTRL_DATA <26>
KB_DET#
8/21
LCD_CBL_DET#
PCH_DP2_CTRL_CLK
PCH_DP2_CTRL_DATA
PCH_DP1_CTRL_CLK
PCH_DP1_CTRL_DATA
PCH_DP3_CTRL_DATA
DGPU_PWR_EN
DGPU_HOLD_RST#
IR_CAM_DET#
DGPU_PWR_EN
GPP_F23
NON_DOCK
DIMM_TYPE
LPSS_UART2_TXD
LPSS_UART2_RXD
1 2
RC74 1 0K_0402_5%
1 2
RC79 10K_0402_5%
1 2
RH220 2. 2K_0402_5%
1 2
1 2
RH221 2. 2K_0402_5%
1 2
RH222 2. 2K_0402_5%
RH223 2. 2K_0402_5%
1 2
RH369 2. 2K_0402_5%
1 2
RH346 100K_0402_5%
1 2
RH350 100K_0402_5%
1 2
RH373 100K_0402_5%
1 2
RH349 100K_0402_5%
1 2
RH214 100K_0402_5%
1 2
RH359 100_0402_1%@
1 2
RH372 10K_0402_5%@
+5V_ALW
CONN@
JUART1
1
1
2
2
3
3
4
4
5
GND
6
GND
ACES_50207-00471-P01
+3.3V_RUN
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size
Size
Size
Date: Sheet o f
Date: Sheet o f
Date: Sheet o f
Compal Electronics, Inc.
SKYLAKE PCH-H (6/9)
SKYLAKE PCH-H (6/9)
Document Number Rev
Document Number Rev
Document Number Rev
SKYLAKE PCH-H (6/9)
LA-C841P
LA-C841P
LA-C841P
1
21 74Tuesday, September 08, 2015
21 74Tuesday, September 08, 2015
21 74Tuesday, September 08, 2015
0.1
0.1
0.1
Vinafix.com
5
4
3
2
1
+1.0V_PRIM +1.0V_ALW_PCH
1 2
RH254 0_1206_5%
+1.0V_ALW_PCH +1.0V_DSW
D D
RH255 0_0402_5%@
RH256 0_0402_5%@
RH257 0_0402_5%@
RH258 0_0402_5%@
RH259 0_0402_5%@
RH260 0_0402_5%@
RH286 0_0402_5%@
C C
RH287 0_0402_5%@
RH288 0_0402_5%@
2
RH289 0_0402_5%@
RH290 0_0402_5%@
+3.3V_ALW_PCH
B B
RH298 0_0402_5%@
RH299 0_0402_5%@
RH300 0_0402_5%@
RH306 0_0402_5%@
+3.3V_ALW
RH301 0_0603_5%@
+3.3V_RUN +3.3V_RUN_ATS
RH302 0_0402_5%@
+3.3V_ALW_PCH
A A
RH303 0_0402_5%@
RH304 0_0402_5%@
RH305 0_0402_5%@
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
PJP8
112
JUMP_43X79
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
0.0454A
+1.0V_CLK1
0.0348A
+1.0V_CLK3
0.0237A
+1.0V_CLK4
0.0327A
+1.0V_CLK2
0.205A
+1.0V_F24
0.0046A
+1.0V_DUSB
0.533A
+2.8V_FHV
0.0908A
+1.0V_DTS
0.0061A
+1.0V_MPHY
2.10A
+1.0V_AMPHYPLL
0.0248A
+1.0V_APLLEBB
0.095A
+3.3V_PRTCPRIM
0.0002A
+3.3V_PHVC
0.2875A
+3.3V_1.8V_FUSE
0.0811A
+3.3V_DSW
0.0811A
0.403A
0.0066A
+3.3V_PGPPEF
0.14107A
+3.3V_PGPPBCH
0.27262A
+3.3V_PGPPG
0.1318A
5
+3.3V_ALW +3.3V_PUSBDSW
1 2
RH276 0_0603_5%@
+3.3V_PRTC+RTC_CELL
0.0002A
1 2
RH297 0_0402_5%@
+3.3V_ALW_PCH +3.3V_ALW_PCHRES
1 2
RH279 0_0603_5%@
+3.3V_1.8V_GPPA+3.3V_ALW_PCHRES
0.0879A
1 2
RH291 0_0402_5%@
+1.8V_ALW_PCHRES
1 2
RH294 0_0402_5%@
+3.3V_ALW_PCHRES +3.3V_1.8V_AZIO
0.075A
1 2
RH292 0_0402_5%@
+1.8V_ALW_PCHRES
1 2
RH295 0_0402_5%@
+3.3V_1.8V_GPPD+3.3V_ALW_PCHRES
0.0395A
1 2
RH293 0_0402_5%@
+1.8V_ALW_PCHRES
+1.8V_ALW_PCHRES
+3.3V_M
RH296 0_0402_5%@
RH246 0_0603_5%@
RH358 0_0603_5%@
RH250 0_0603_5%@
RH247 0_0603_5%@
1 2
+3.3V_1.8V_SPI+3.3V_ALW_PCHRES
1 2
1 2
1 2
+1.8V_PRIM
1 2
+1.0V_AAZPLL
1 2
BLM15PX600SN1D_2P
4
+1.0V_CLK5
+1.0V_CLK2
+1.0V_CLK4
+1.0V_CLK3
NO CAP
NO CAP
NO CAP
+1.0V_AUSB
+1.0V_AAZPLL_R
LC2
+3.3V_1.8V_AZIO
1
CC311
2
0.1U_0402_25V6
1 2
BLM15PX600SN1D_2P
LC1
+1.0V_PRIM
NO CAP
+1.0V_DSW
+1.0V_CLK1
NO CAP
+1.0V_MPHY
+1.0V_AMPHYPLL
+1.0V_APLLEBB
+1.0V_DUSB
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
NO CAP
+3.3V_1.8V_AZIO_R
+3.3V_PUSBDSW
1
CC310
2
0.1U_0402_25V6
BD2
VSS
BD45
VSS
BD44
VSS
BE44
VSS
D45
VSS
A42
VSS
B45
VSS
B44
VSS
A4
VSS
A3
VSS
B2
VSS
A2
VSS
B1
VSS
BB1
VSS
BC1
VSS
A44
VSS
C1
RSVD
D1
RSVD
SKL-H-PCH_BGA837
PCH_2_CPU_TRIGGER_R
UH1J
UH1H
AA23
VCCPRIM_1P0
AA26
VCCPRIM_1P0
AA28
VCCPRIM_1P0
AC23
VCCPRIM_1P0
AC26
VCCPRIM_1P0
AC28
VCCPRIM_1P0
AE23
VCCPRIM_1P0
AE26
VCCPRIM_1P0
Y23
VCCPRIM_1P0
Y25
VCCPRIM_1P0
BA29
DCPDSW_1P0
N17
VCCCLK1
R19
VCCCLK3
U20
VCCCLK4
V17
VCCCLK2
R17
VCCCLK2
K2
VCCCLK5
K3
VCCCLK5
U21
VCCMPHY_1P0
U23
VCCMPHY_1P0
U25
VCCMPHY_1P0
U26
VCCMPHY_1P0
V26
VCCMPHY_1P0
A43
VCCMPHYPLL_1P0
B43
VCCMPHYPLL_1P0
C44
VCCPCIE3PLL_1P0
C45
VCCPCIE3PLL_1P0
V28
VCCAPLLEBB_1P0
AC17
VCCPRIM_1P0
AJ5
VCCUSB2PLL_1P0
AL5
VCCUSB2PLL_1P0
AN19
VCCHDAPLL_1P0
BA15
VCCHDA
W15
VCCDSW_3P3
SKL-H-PCH_BGA837
SPT-H_PCH
CPU_TRST#
PCH_TRIGOUT
PCH_TRIGIN
REV = 1.3 10 OF 12
1 2
RH42 30_0402_5%
SPT-H_PCH
CORE
MPHY
USB
REV = 1.3 8 OF 12
AR22
RSVD
W13
RSVD
U13
RSVD
P31
RSVD
N31
RSVD
P27
RSVD
R27
RSVD
N29
RSVD
P29
RSVD
AN29
RSVD
R24
RSVD
P24
RSVD
AT3
PREQ#
PRDY#
PCH_2_CPU_TRIGGER
PCH_XDP_PREQ#
AT4
PCH_XDP_PRDY#
AY5
CPU_XDP_TRST#
AL2
PCH_2_CPU_TRIGGER_R
AK1
CPU_2_PCH_TRIGGER
+2.8V_FHV
+1.0V_DTS
+DCPRTC
+3.3V_DSW
+3.3V_1.8V_GPPA
NO CAP
+3.3V_RUN_ATS
NO CAP
+3.3V_1.8V_GPPD
NO CAP
+3.3V_1.8V_FUSE
+3.3V_PGPPBCH
+3.3V_PRTCPRIM
+1.0V_PRIM
+3.3V_1.8V_SPI
+3.3V_PGPPEF
+3.3V_PRTC
+3.3V_PGPPG
0.1U_0201_10V6K
CH68
1
2
+3.3V_PHVC
VCCGPIO
PAD~D
PAD~D
PAD~D
PAD~D
PAD~D
PAD~D
PAD~D
PAD~D
PAD~D
PAD~D
PAD~D
PAD~D
VCCRTCPRIM_3P3
@
@
@
@
@
@
@
@
@
@
@
@
VCCPRIM_1P0
VCCDSW_3P3
VCCPGPPBCH
VCCPGPPBCH
VCCPGPPEF
VCCPGPPEF
VCCPRIM_3P3
VCCPRIM_1P0
VCCPRIM_1P0
VCCPRIM_1P0
VCCPRIM_1P0
VCCPRIM_1P0
VCCPRIM_3P3
VCCPRIM_3P3
VCCPRIM_3P3
T66
T67
T68
T69
T70
T71
T72
T74
T73
T76
T75
T77
PCH_2_CPU_TRIGGER <10>
AL22
BA24
BA31
VCCPGPPA
BC42
BD40
AJ41
AL41
AD41
VCCPGPPG
AN5
AD15
AD13
VCCATS
BA20
BA22
VCCRTC
BA26
DCPRTC
AJ20
AJ21
AJ23
AJ25
BE41
VCCSPI
BE43
VCCSPI
BE42
VCCSPI
BC44
VCCPGPPD
BA45
VCCPGPPD
BC45
VCCPGPPD
BB45
VCCPGPPD
BD3
BE3
BE4
PCH_XDP_PREQ# <7>
PCH_XDP_PRDY# <7>
CPU_XDP_TRST# <7>
CPU_2_PCH_TRIGGER <10>
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size
Size
Size
Date: Sheet o f
Date: Sheet o f
2
Date: Sheet o f
Compal Electronics, Inc.
SKYLAKE PCH-H (7/9)
SKYLAKE PCH-H (7/9)
Document Number Re v
Document Number Re v
Document Number Re v
SKYLAKE PCH-H (7/9)
LA-C841P
LA-C841P
LA-C841P
22 74Tuesday, September 08, 2015
22 74Tuesday, September 08, 2015
22 74Tuesday, September 08, 2015
1
0.1
0.1
0.1
Vinafix.com
5
+1.0V_AMPHYPLL
4
+3.3V_PUSBDSW
+1.0V_MPHY
3
+3.3V_PRTCPRIM
2
1
1U_0402_6.3V6K
1
CH267
2
D D
+1.0V_ALW_PCH +VCCAUSB_VCCAAZPLL_1P0 +1.0V_AUSB
1 2
RH238 0_0603_1%@
+1.0V_F24 + 1.0V_CLK5
C C
RH241 0_0603_1%@
1 2
+3.3V_PRTC
1
2
22U_0805_6.3VAM
@
1
1
CH44
2
2
22U_0805_6.3VAM
22U_0805_6.3VAM
@
1
1
CH29
2
2
1U_0402_6.3V6K
@
CH33
0.1U_0402_25V6
1
2
1 2
RH239 0_0603_1%@
22U_0805_6.3VAM
@
CH45
1 2
RH240 0_0603_1%@
1U_0402_6.3V6K
@
@
1
CH46
CH32
2
@
CH65
+1.0V_AAZPLL
1
2
+3.3V_PGPPEF
1
2
+3.3V_PGPPBCH
1
2
+3.3V_PGPPG
1
2
1U_0402_6.3V6K
@
CH31
0.1U_0201_10V6K
@
CH62
0.1U_0402_25V6
@
CH63
0.1U_0201_10V6K
@
CH64
1
2
+1.0V_DSW
1U_0402_6.3V6K
1
2
+3.3V_RUN_ATS
1U_0402_6.3V6K
1
2
+3.3V_PHVC
0.1U_0402_25V6
1
2
1U_0402_6.3V6K
22U_0603_6.3V6M
1
CH47
CH34
2
CH35
CH36
@
CH66
1
2
+1.0V_DUSB
1
2
1U_0402_6.3V6K
0.1U_0402_25V6
1
CH37
CH67
2
1U_0402_6.3V6K
CH38
B B
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size
Size
Size
Date: Sheet o f
Date: Sheet o f
Date: Sheet o f
Compal Electronics, Inc.
SKYLAKE PCH-H (8/9)
SKYLAKE PCH-H (8/9)
Document Number Re v
Document Number Rev
Document Number Rev
SKYLAKE PCH-H (8/9)
LA-C841P
LA-C841P
LA-C841P
1
23 74Tuesday, September 08, 2015
23 74Tuesday, September 08, 2015
23 74Tuesday, September 08, 2015
0.1
0.1
0.1
Vinafix.com
5
D D
C C
B B
A A
4
UH1I
AC18
VSS
AN4
VSS
AN10
VSS
BE14
VSS
BE18
VSS
BE23
VSS
BE28
VSS
BE32
VSS
BE37
VSS
BE40
VSS
BE9
VSS
C10
VSS
C2
VSS
C28
VSS
C37
VSS
J7
VSS
K10
VSS
K27
VSS
K33
VSS
K36
VSS
K4
VSS
K42
VSS
K43
VSS
L12
VSS
L13
VSS
L15
VSS
L4
VSS
L41
VSS
L8
VSS
M35
VSS
M42
VSS
N10
VSS
N15
VSS
N19
VSS
N22
VSS
N24
VSS
N35
VSS
N36
VSS
N4
VSS
N41
VSS
N5
VSS
P17
VSS
P19
VSS
P22
VSS
P45
VSS
R10
VSS
R14
VSS
R22
VSS
R29
VSS
R33
VSS
R38
VSS
R5
VSS
T1
VSS
T2
VSS
T4
VSS
Y18
VSS
Y20
VSS
Y21
VSS
Y26
VSS
Y28
VSS
Y29
VSS
A18
VSS
A25
VSS
A32
VSS
A37
VSS
AA17
VSS
AA18
VSS
AA20
VSS
AA21
VSS
AA25
VSS
AA29
VSS
AA4
VSS
AA42
VSS
AB10
VSS
SKL-H-PCH_BGA837
SPT-H_PCH
3
SPT-H_PCH
AR5
VSS
AR7
VSS
U15
VSS
AL4
VSS
AE29
VSS
AE4
VSS
AE42
VSS
AF18
VSS
AF20
VSS
AF21
VSS
AF23
VSS
AF25
VSS
AF26
VSS
AF28
VSS
AF29
VSS
AG11
VSS
AG13
VSS
AG31
VSS
AG32
VSS
AG33
VSS
AG38
VSS
AG4
VSS
AH1
VSS
AH17
VSS
AH18
VSS
AH20
VSS
AH21
VSS
AH23
VSS
AH25
VSS
AH26
VSS
AH28
VSS
AH29
VSS
AH45
VSS
AJ10
VSS
AJ14
VSS
AJ15
VSS
AJ17
VSS
AJ18
VSS
AJ26
VSS
AJ28
VSS
AJ29
VSS
AJ31
VSS
AJ32
VSS
AJ36
VSS
AK4
VSS
AK42
VSS
AU7
VSS
AV17
VSS
AV24
VSS
AV27
VSS
AV31
VSS
AV33
VSS
AV6
VSS
AW13
VSS
AW19
VSS
AW29
VSS
AW37
VSS
AW9
VSS
AY38
VSS
AY45
VSS
B25
VSS
B3
VSS
B37
VSS
B40
VSS
B6
VSS
BA1
VSS
BB11
VSS
BB16
VSS
BB21
VSS
BB25
VSS
BB30
VSS
BB34
VSS
BC2
VSS
BD43
VSS
9 OF 12REV = 1.3
UH1L
C42
VSS
D10
VSS
D12
VSS
D15
VSS
D16
VSS
D17
VSS
D19
VSS
D21
VSS
D24
VSS
D25
VSS
D27
VSS
D29
VSS
D30
VSS
D31
VSS
D33
VSS
D35
VSS
D36
VSS
E13
VSS
E15
VSS
E31
VSS
E33
VSS
F44
VSS
F8
VSS
G42
VSS
G9
VSS
H17
VSS
H19
VSS
H22
VSS
H24
VSS
H27
VSS
H29
VSS
H3
VSS
H35
VSS
J10
VSS
J11
VSS
J3
VSS
J39
VSS
J5
VSS
T42
VSS
U10
VSS
U11
VSS
U14
VSS
U17
VSS
U18
VSS
U28
VSS
U29
VSS
U31
VSS
U32
VSS
U33
VSS
U38
VSS
U4
VSS
U8
VSS
V18
VSS
V20
VSS
V21
VSS
V23
VSS
V25
VSS
V29
VSS
V3
VSS
V45
VSS
W14
VSS
W31
VSS
W32
VSS
W33
VSS
W38
VSS
W4
VSS
W8
VSS
Y17
VSS
SKL-H-PCH_BGA837
12 OF 12REV = 1.3
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AB11
AB7
AB14
AB31
AB32
AB38
AB4
AB5
AC1
AC20
AC21
AC25
AC29
AC45
AB8
AD11
AD14
AB15
AD32
AD33
AD36
AD4
AD8
AE18
AE20
AE21
AE25
AE28
AL10
AL11
AL13
AL17
AL19
AL24
AL29
AL32
AL33
AL38
AM15
AM17
AM19
AM22
AM24
AM27
AM29
AM45
AN11
AN22
AN27
AN31
AN39
AN7
AN8
AP11
AP4
AR33
AR34
AR42
AR9
AT10
AT15
AT36
AT9
AU1
AU35
AU36
AU39
AU45
C4
2
1
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size
Size
Size
Date: Sheet o f
Date: Sheet o f
Date: Sheet o f
Compal Electronics, Inc.
SKYLAKE PCH-H (9/9)
SKYLAKE PCH-H (9/9)
Document Number Re v
Document Number Rev
Document Number Rev
SKYLAKE PCH-H (9/9)
LA-C841P
LA-C841P
LA-C841P
24 74Tuesday, September 08, 2015
24 74Tuesday, September 08, 2015
24 74Tuesday, September 08, 2015
1
0.1
0.1
0.1
Vinafix.com
5 4 3 2 1
+1.5V_RUN
0.1U_0402_25V6
0.1U_0402_25V6
CV314
D D
HDMI_TX_P2<26>
HDMI_TX_N2<26>
HDMI_TX_P1<26>
HDMI_TX_N1<26>
HDMI_TX_P0<26>
HDMI_TX_N0<26>
HDMI_CLKP<26>
HDMI_CLKN<26> HDMI_CTRL_CLK <26>
+3.3V_RUN
+3.3V_RUN
C C
+3.3V_RUN
4.7K_0402_5%
12
@
RV304
4.7K_0402_5%
12
@
B B
RV305
0.1U_0402_25V6
CV313
CV312
1
1
2
2
1 2
RV300 4.7K_0402_5%
RV302 4.7K_0402_5%1 2
0.01U_0402_50V7K
0.1U_0402_25V6
CV310
CV311
1
2
1
2
HDMI_PRE
1
2
HDMI_BUF
HDMI_EQ
4.02K_0402_1%
RV303
UV21
19
VDDTA
20
VDDTX
31
VDDTX
12
VDDRX
40
VDDRX
1
IN_D2p
2
IN_D2n
4
IN_D1p
5
IN_D1n
6
IN_D0p
7
IN_D0n
9
IN_CKp
10
IN_CKn
14
DDCBUF/SDA_CTL
13
DCIN_EN/SCL_CTL
17
EQ/I2C_ADDR0
8
I2C_CTL_EN
18
REXT
36
PD#
23
CFG / I2C_ADDR1
16
PRE
12
PS8407ATQFN40GTR2A1_TQFN40_5X5
VDD33
VDD33
OUT_D2p
OUT_D2n
OUT_D1p
OUT_D1n
OUT_D0p
OUT_D0n
OUT_CKp
OUT_CKn
SDA_SRC
SCL_SRC
SDA_SNK
SCL_SNK
HPD_SRC
ISET
HPD_SNK
GND
GND
EPAD
11
37
30
29
27
26
25
24
22
21
39
38
33
32
3
34
28
15
35
41
TMDSE_RP_P2
TMDSE_RP_N2
TMDSE_RP_P1
TMDSE_RP_N1
TMDSE_RP_P0
TMDSE_RP_N0
TMDSE_RP_CLK
TMDSE_RP_CLK#
HDMI_CTRL_DATA
HDMI_CTRL_CLK
HDMI_SDA_SINK
HDMI_SCL_SINK
HDMI_HPD_SINK
PS8407ATQFN4 0GTR 2-A1
+3.3V_RUN
4.7K_0402_5%
12
RV324
HDMI_BUF HDMI_EQ
4.7K_0402_5%
12
@
RV307
HDMI_ISET
+3.3V_RUN
0.1U_0402_25V6
0.01U_0402_50V7K
CV309
CV308
1
2
HDMI_CTRL_DATA <26>
1
2
HDMI_HPD <26>
HDMI_SCL_SINK
HDMI_SDA_SINK
RV7 2.2K_0402_5%1 2
RV10 2.2K_0402_5%1 2
+VHDMI_VCC
0.1U_0201_10V6K
@
CV23
TMDSE_RP_N2
TMDSE_RP_P2
TMDSE_RP_P1
TMDSE_RP_N1
TMDSE_RP_N0
TMDSE_RP_P0
TMDSE_RP_CLK
TMDSE_RP_CLK#
1
2
+5V_RUN
1
GND2OUT
IN
3
RV686 8.2_0402_1%EMC@ 1 2
LV3
4
4
1
1
HCM1012GH900BP_4P
1 2
RV687 8.2_0402_1%EMC@
RV688
LV6
1
1
4
4
HCM1012GH900BP_4P
1 2
RV689
RV690 8.2_0402_1%EMC@ 1 2
LV9
4
4
1
1
HCM1012GH900BP_4P
1 2
RV691
RV692
LV12
1
1
4
4
HCM1012GH900BP_4P
1 2
RV693 8.2_0402_1%EMC@
AP2330W-7_SC59-3
UV2
@EMC@
@EMC@
@EMC@
@EMC@
3
2
8.2_0402_1%EMC@ 1 2
2
3
8.2_0402_1%EMC@
3
2
8.2_0402_1%EMC@
8.2_0402_1%EMC@ 1 2
2
3
3
2
2
3
3
2
2
3
+VHDMI_VCC
1
2
0.1U_0201_10V6K
@
CV26
TMDSE_CON_N2
RV683
220_0402_5%
1 2
TMDSE_CON_P2
TMDSE_CON_P1
RV684
220_0402_5%
1 2
TMDSE_CON_N1
TMDSE_CON_N0
RV654
220_0402_5%
1 2
TMDSE_CON_P0
TMDSE_CON_CLK
RV685
220_0402_5%
1 2
TMDSE_CON_CLK#
10U_0603_6.3V6M
CV27
12
EMC@
EMC@
EMC@
EMC@
HDMI connector
+3.3V_RUN
4.7K_0402_5%
12
@
RV208
HDMI_ISET
4.7K_0402_5%
12
@
A A
RV209
+3.3V_RUN
4.7K_0402_5%
12
RV207
4.7K_0402_5%
12
@
RV175
HDMI_PRE
+3.3V_RUN
12
RV8@10K_0402_5%
HDMI_HPD_SINK
HDMI_SDA_SINK
HDMI_SCL_SINK
HDMI_CECHDMI_CEC
TMDSE_CON_CLK#
TMDSE_CON_CLK
TMDSE_CON_N0
TMDSE_CON_P0
TMDSE_CON_N1
TMDSE_CON_P1
TMDSE_CON_N2
TMDSE_CON_P2
JHDMI1
19
HP_DET
18
+5V
17
DDC/CEC_GND
16
SDA
15
SCL
14
Reserved
13
CEC
12
CK-
9
8
7
6
5
4
3
2
1
CK_shield
CK+
D0D0_shield
D0+
D1D1_shield
D1+
D2D2_shield
D2+
CONN@
GND
GND
GND
GND
11
10
CONCR_099BKAC19YBLCNF
20
21
22
23
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
HDMI CONN
HDMI CONN
Document Number Rev
Document Number Rev
Document Number Rev
HDMI CONN
LA-C841P
LA-C841P
LA-C841P
25 74Tuesday, September 08, 2015
25 74Tuesday, September 08, 2015
25 74Tuesday, September 08, 2015
0.1
0.1
0.1
Title
Title
Title
Size
Size
Size
Date: Sheet o f
Date: Sheet o f
Date: Sheet o f
Vinafix.com
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
12
RV1084
@
4.7K_0402_5%
12
RV1085
@
4.7K_0402_5%
A
CPU_DP1_AUXN_C
DOCK_DPA_AUXN
SW1_DP1_AUXN
HDMI_CTRL_DATA
HDMI_CTRL_CLK
DOCK_DPA_CADET
SW1_DP1_CADET
DOCK_DPA_AUXP
SW1_DP1_AUXP
+3.3V_RUN
12
12
RV610
4.7K_0402_5%
12
12
RV616
@
4.7K_0402_5%
12
12
RV611
RV612
@
@
4.7K_0402_5%
4.7K_0402_5%
12
12
RV617
RV618
@
@
4.7K_0402_5%
4.7K_0402_5%
12
12
RV614
RV613
@
@
4.7K_0402_5%
12
RV619
RV620
@
4.7K_0402_5%
12
RV603
@
4.7K_0402_5%
4.7K_0402_5%
12
12
RV621
@
4.7K_0402_5%
4.7K_0402_5%
+3.3V_RUN
RV1102 1M_0402_5%
RV604 100K_0402_5%
@
RV605 100K_0402_5%
@
RV698 2K_0402_5%
@
RV699 2K_0402_5%
1 1
RV1091
@
4.7K_0402_5%
2 2
RV1090
@
4.7K_0402_5%
3 3
RV606 1M_0402_5%
RV607 1M_0402_5%
RV608 100K_0402_5%
@
RV609 100K_0402_5%
12
12
RV1088
RV1086
@
4.7K_0402_5%
4.7K_0402_5%
12
12
RV1089
RV1087
@
4.7K_0402_5%
4.7K_0402_5%
B
PS8349B_DP_CFG0
PS8349B_DP_CFG1
PS8349B_SW1
PS8349B_SW0
PS8349B_PEQ
PS8349B_MODE
PS8349B_PC1
PS8349B_DDCBUF
PS8349B_PRE
PS8349B_PC2
C
+3.3V_RUN
0.01U_0402_50V7K
0.01U_0402_50V7K
12
12
CV1093
CV604
CPU_DP1_P0<9>
CPU_DP1_N0<9>
CPU_DP1_P1<9>
CPU_DP1_N1<9>
CPU_DP1_P2<9>
CPU_DP1_N2<9>
CPU_DP1_P3<9>
CPU_DP1_N3<9>
CPU_DP1_AUXP<9>
CPU_DP1_AUXN<9>
PCH_DP1_CTRL_CLK<21>
PCH_DP1_CTRL_DATA<21>
CV606 0.1U_0402_25V6
CV607 0.1U_0402_25V6
CV608 0.1U_0402_25V6
CV609 0.1U_0402_25V6
CV610 0.1U_0402_25V6
CV611 0.1U_0402_25V6
CV612 0.1U_0402_25V6
CV613 0.1U_0402_25V6
CV1068 0.1U_0402_25V6
CV1067 0.1U_0402_25V6
0.01U_0402_50V7K
12
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
PCH_DP1_HPD<21>
CV603
0.1U_0201_10V6K
CV602
1
1
2
2
PS8349B_DP_CFG0
PS8349B_DP_CFG1
PS8349B_SW1
PS8349B_SW0
PS8349B_MODE
PS8349B_PC1
PS8349B_PC2
PS8349B_DDCBUF
PS8349B_PRE
PS8349B_PEQ
0.1U_0201_10V6K
CV601
1
2
CPU_DP1_P0_C
CPU_DP1_N0_C
CPU_DP1_P1_C
CPU_DP1_N1_C
CPU_DP1_P2_C
CPU_DP1_N2_C
CPU_DP1_P3_C
CPU_DP1_N3_C
CPU_DP1_AUXP_C
CPU_DP1_AUXN_C
T205@ PAD~D
T221@ PAD~D
T222@ PAD~D
0.1U_0201_10V6K
CV600
UV28
1
VDD33
10
VDD33
34
VDD33
11
IN_D0p
12
IN_D0n
14
IN_D1p
15
IN_D1n
16
IN_D2p
17
IN_D2n
19
IN_D3p
20
IN_D3n
64
IN_AUXP
63
IN_AUXN
66
IN_DDC_SCL
65
IN_DDC_SDA
8
IN_CA_DET
7
IN_HPD
2
DP_CFG0/ SDA_CTL
3
DP_CFG1/ SCL_CTL
4
SW1
5
SW0
6
I2C_CTL_EN
21
MODE
22
PC1
45
PC2
23
TMDS_DDCBUF
26
TMDS_PRE
18
PEQ
13
PD
9
67
REXT
PAD(GND)
12
RV1092
4.99K_0402_1%
D
DP1_D0P
DP1_D0N
DP1_D1P
DP1_D1N
DP1_D2P
DP1_D2N
DP1_D3P
DP1_D3N
DP2_D0P
DP2_D0N
DP2_D1P
DP2_D1N
DP2_D2P
DP2_D2N
DP2_D3P
DP2_D3N
TMDS_CH2P
TMDS_CH2N
TMDS_CH1P
TMDS_CH1N
TMDS_CH0P
TMDS_CH0N
TMDS_CLKP
TMDS_CLKN
DP1_AUXP_SCL
DP1_AUXN_SDA
DP2_AUXP_SCL
DP2_AUXN_SDA
TMDS_SCL
TMDS_SDA
DP1_CA_DET
DP1_HPD
DP2_CA_DET
DP2_HPD
TMDS_HPD
PS8349BQFN66GTR-A0_QFN66_5X10
CEXT
55
54
52
51
50
49
47
46
44
43
41
40
39
38
36
35
33
32
30
29
28
27
25
24
62
61
60
59
58
57
48
53
SW1_DP1_CADET
37
42
31
56
1
2
E
DOCK_DPA_P0 <41>
DOCK_DPA_N0 <41>
DOCK_DPA_P1 <41>
DOCK_DPA_N1 <41>
DOCK_DPA_P2 <41>
DOCK_DPA_N2 <41>
DOCK_DPA_P3 <41>
DOCK_DPA_N3 <41>
SW1_DP1_P0 <46>
SW1_DP1_N0 <46>
SW1_DP1_P1 <46>
SW1_DP1_N1 <46>
SW1_DP1_P2 <46>
SW1_DP1_N2 <46>
SW1_DP1_P3 <46>
SW1_DP1_N3 <46>
HDMI_TX_P2 <25>
HDMI_TX_N2 <25>
HDMI_TX_P1 <25>
HDMI_TX_N1 <25>
HDMI_TX_P0 <25>
HDMI_TX_N0 <25>
HDMI_CLKP <25>
HDMI_CLKN <25>
DOCK_DPA_AUXP <41>
DOCK_DPA_AUXN <41>
SW1_DP1_AUXP <46>
SW1_DP1_AUXN <46>
HDMI_CTRL_CLK <25>
HDMI_CTRL_DATA <25>
DOCK_DPA_CADET <41>
DOCK_DPA_HPD <41>
SW1_DP1_HPD <46>
0.1U_0402_25V6
2.2U_0402_6.3V6M
HDMI_HPD <25>
CV1084
@
CV1104
1
2
4 4
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size
Size
Size
Date : Sheet o f
Date : Sheet o f
A
B
C
D
Date : Sheet o f
Compal Electronics, Inc.
DP SW PS8349B
DP SW PS8349B
Document Number Re v
Document Number Re v
Document Number Re v
DP SW PS8349B
LA-C841P
LA-C841P
LA-C841P
E
26 74Tuesday, September 08, 2015
26 74Tuesday, September 08, 2015
26 74Tuesday, September 08, 2015
0.1
0.1
0.1
Vinafix.com
A
+3.3V_RUN
12
RV1099
@
4.7K_0402_5%
12
RV1097
@
4.7K_0402_5%
DOCK_DPB_AUXN
SW2_DP1_AUXN
SW2_DP2_AUXN
DOCK_DPB_CADET
SW2_DP1_CADET
SW2_DP2_CADET
DOCK_DPB_AUXP
SW2_DP1_AUXP
SW2_DP2_AUXP
+3.3V_RUN
12
12
RV707
RV1094
@
4.7K_0402_5%
4.7K_0402_5%
12
12
RV717
RV1095
@
4.7K_0402_5%
4.7K_0402_5%
12
12
12
RV711
RV710
RV708
RV702
@
4.7K_0402_5%
RV715
@
4.7K_0402_5%
@
@
4.7K_0402_5%
12
12
RV706
@
4.7K_0402_5%
@
4.7K_0402_5%
4.7K_0402_5%
12
RV703
RV704
@
@
4.7K_0402_5%
4.7K_0402_5%
1 2
RV712 100K_0402_5%
@
1 2
RV713 100K_0402_5%
1 2
RV718 100K_0402_5%
1 1
RV1098
2 2
3 3
@
RV1101
@
1 2
RV714 1M_0402_5%
1 2
RV700 1M_0402_5%
1 2
RV720 1M_0402_5%
1 2
RV701 100K_0402_5%
@
1 2
RV705 100K_0402_5%
1 2
RV719 100K_0402_5%
12
12
RV1096
@
4.7K_0402_5%
4.7K_0402_5%
12
12
RV1100
@
4.7K_0402_5%
4.7K_0402_5%
B
0.01U_0402_50V7K
12
CV1094
CPU_DP2_P0<9>
CPU_DP2_N0<9>
CPU_DP2_P1<9>
CPU_DP2_N1<9>
CPU_DP2_P2<9>
CPU_DP2_N2<9>
CPU_DP2_P3<9>
CPU_DP2_N3<9>
CPU_DP2_AUXP<9>
CPU_DP2_AUXN<9>
PCH_DP2_CTRL_CLK<21>
PCH_DP2_CTRL_DATA<21>
12
PS8348B_PI0
PS8348B_PI1
PS8348B_SW1
PS8348B_SW0
PS8348B_PEQ
PS8348B_CFG
PS8348B_PC1
PS8348B_PC2
PS8348B_PC3
12
C
0.01U_0402_50V7K
12
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
PCH_DP2_HPD<21>
0.1U_0201_10V6K
0.1U_0201_10V6K
CV1069
1
1
CV1079
2
2
PS8348B_PI0
PS8348B_PI1
PS8348B_SW1
PS8348B_SW0
PS8348B_CFG
PS8348B_PC1
PS8348B_PC2
PS8348B_PC3
PS8348B_PEQ
0.01U_0402_50V7K
12
CV1072
CV1101 0.1U_0402_25V6
CV1098 0.1U_0402_25V6
CV1099 0.1U_0402_25V6
CV1102 0.1U_0402_25V6
CV1096 0.1U_0402_25V6
CV1095 0.1U_0402_25V6
CV1100 0.1U_0402_25V6
CV1097 0.1U_0402_25V6
CV1083 0.1U_0402_25V6
CV1082 0.1U_0402_25V6
+3.3V_RUN
0.1U_0201_10V6K
CV1073
CV1076
1
2
CPU_DP2_P0_C
CPU_DP2_N0_C
CPU_DP2_P1_C
CPU_DP2_N1_C
CPU_DP2_P2_C
CPU_DP2_N2_C
CPU_DP2_P3_C
CPU_DP2_N3_C
CPU_DP2_AUXP_C
CPU_DP2_AUXN_C
T204@ PAD~D
T223@ PAD~D
T224@ PAD~D
RV1093
D
UV29
1
VDD33
10
VDD33
34
VDD33
11
IN_D0p
12
IN_D0n
14
IN_D1p
15
IN_D1n
16
IN_D2p
17
IN_D2n
19
IN_D3p
20
IN_D3n
64
IN_AUXp
63
IN_AUXn
66
IN_DDC_SCL
65
IN_DDC_SDA
8
IN_CA_DET
7
IN_HPD
2
PI0 / SDA_CTL
3
PI1 / SCL_CTL
4
SW1
5
SW0
6
I2C_CTL_EN
21
CFG
22
PC1
23
PC2
45
PC3
18
PEQ
13
PD
9
12
4.99K_0402_1%
REXT
67
PAD(GND)
PS8348BQFN66GTR-A0_QFN66_5X10
OUT1_AUXp_SCL
OUT1_AUXn_SDA
OUT2_AUXp_SCL
OUT2_AUXn_SDA
OUT3_AUXp_SCL
OUT3_AUXn_SDA
OUT1_CA_DET
OUT1_HPD
OUT2_CA_DET
OUT2_HPD
OUT3_CA_DET
OUT3_HPD
OUT1_D0p
OUT1_D0n
OUT1_D1p
OUT1_D1n
OUT1_D2p
OUT1_D2n
OUT1_D3p
OUT1_D3n
OUT2_D0p
OUT2_D0n
OUT2_D1p
OUT2_D1n
OUT2_D2p
OUT2_D2n
OUT2_D3p
OUT2_D3n
OUT3_D0p
OUT3_D0n
OUT3_D1p
OUT3_D1n
OUT3_D2p
OUT3_D2n
OUT3_D3p
OUT3_D3n
CEXT
55
54
52
51
50
49
47
46
44
43
41
40
39
38
36
35
33
32
30
29
28
27
25
24
62
61
60
59
58
57
48
53
SW2_DP1_CADET
37
42
SW2_DP2_CADET
26
31
56
1
2
DOCK_DPB_P0 <41>
DOCK_DPB_N0 <41>
DOCK_DPB_P1 <41>
DOCK_DPB_N1 <41>
DOCK_DPB_P2 <41>
DOCK_DPB_N2 <41>
DOCK_DPB_P3 <41>
DOCK_DPB_N3 <41>
SW2_DP1_P0 <46>
SW2_DP1_N0 <46>
SW2_DP1_P1 <46>
SW2_DP1_N1 <46>
SW2_DP1_P2 <46>
SW2_DP1_N2 <46>
SW2_DP1_P3 <46>
SW2_DP1_N3 <46>
SW2_DP2_P0 <33>
SW2_DP2_N0 <33>
SW2_DP2_P1 <33>
SW2_DP2_N1 <33>
SW2_DP2_P2 <33>
SW2_DP2_N2 <33>
SW2_DP2_P3 <33>
SW2_DP2_N3 <33>
DOCK_DPB_AUXP <41>
DOCK_DPB_AUXN <41>
SW2_DP1_AUXP <46>
SW2_DP1_AUXN <46>
SW2_DP2_AUXP <33>
SW2_DP2_AUXN <33>
DOCK_DPB_CADET <41>
DOCK_DPB_HPD <41>
2.2U_0402_6.3V6M
SW2_DP2_HPD <33>
CV1103
E
0.1U_0402_25V6
@
CV1105
1
2
SW2_DP1_HPD <46>
4 4
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size
Size
Size
Date : Sheet o f
Date : Sheet o f
A
B
C
D
Date : Sheet o f
Compal Electronics, Inc.
DP MUX PS8348B
DP MUX PS8348B
Document Number Re v
Document Number Re v
Document Number Re v
DP MUX PS8348B
LA-C841P
LA-C841P
LA-C841P
27 74Tuesday, September 08, 2015
27 74Tuesday, September 08, 2015
27 74Tuesday, September 08, 2015
E
0.1
0.1
0.1
Vinafix.com
A
B
C
D
E
+3.3V_RUN
1U_0402_6.3V6K
1
1 1
2 2
3 3
+3.3V_RUN
1 2
RV166 1M_0402_5%
@
1 2
RV167 10K_0402_5%
1 2
RV165 1M_0402_5%
@
1 2
RV172 4.7K_0402_5%
+1.8V_VGA
1 2
LV14 HCB1005KF-600T20_2P
+1.8V_VGA
1 2
LV15 HCB1005KF-600T20_2P
+1.8V_VGA
1 2
LV21 HCB1005KF-600T20_2P
+1.8V_VGA_PVCC
+1.8V_VGA_IVDD
+1.8V_VGA_VDD
CPU_DP3_AUXP
PWDNB
CPU_DP3_AUXN
PCH_DP3_HPD
1U_0402_6.3V6K
1
2
4.7U_0603_6.3V6K
1
2
1U_0402_6.3V6K
1
2
0.1U_0402_25V6
CV354
1 2
1 2
PCH_DP3_HPD
CPU_DP3_AUXP_C
CPU_DP3_AUXN_C
+3.3V_RUN
PCH_DP3_HPD<21>
1 2
CPU_DP3_P0<9>
CPU_DP3_N0<9>
CPU_DP3_P1<9>
CPU_DP3_N1<9>
CPU_DP3_AUXP<9>
CPU_DP3_AUXN<9>
CV359
CV360
CV361
CV342 0.1U_0402_25V6
1 2
CV626 0.1U_0402_25V6
1 2
CV627 0.1U_0402_25V6
1 2
CV625 0.1U_0402_25V6
1 2
CV628 0.1U_0402_25V6
1 2
CV350 0.1U_0402_25V6
+1.8V_VGA_PVCC
0.1U_0402_25V6
0.1U_0402_25V6
CV352
CV355
+3.3V_RUN
CV353
1
1
2
2
RV161 2.2K_0402_5%
RV162 2.2K_0402_5%
1
2
+1.8V_VGA_IVDD
0.1U_0402_25V6
1
2
CV622
2
CPU_DP3_P0_C
CPU_DP3_N0_C
CPU_DP3_P1_C
CPU_DP3_N1_C
0.1U_0402_25V6
0.1U_0402_25V6
1
1
CV356
CV357
2
2
UV13
40
HPD
26
RX0P
27
RX0N
29
RX1P
30
RX1N
20
RXAUXP
19
RXAUXN
18
DCAUXP
17
DCAUXN
25
AVCC
31
AVCC
22
PVCC
24
DVDD18
32
ASPVCC
43
PCSDA
42
PCSCL
+3.3V_RUN +1.8V_VGA
1
ISPSCL
ISPSDA
1
2
DDCSCL
2
13
48
OVDD
OVDD
DDCSDA
IT6513FN
PWDNB
37
10U_0603_6.3V6M
CV340
12
46
39
IVDDO38IVDDO
44
IVDD
IVDD14IVDD
IVDD
VGADDCSDA
NC/VGADETECT
PAD
IT6513FN_QFN48_6X6
49
VGADDCCLK
36
IVDD3335IVDD33
0.1U_0402_25V6
1
CV623
2
MCUVDDH
MCURSTN
URDBG
ISPSCL
ISPSDA
VSYNC
HSYNC
VDDC
IORP
IOGP
IOBP
RSET
VDDA
COMP
XTALIN
XTALOUT
+1.8V_VGA_IVDD
0.1U_0402_25V6
1
1
CV624
2
2
45
47
28
15
16
23
21
3
4
10
11
9
8
41
5
7
6
34
33
0.1U_0402_25V6
CV343
+3.3V_RUN
MCURSTN
URDBG
ISPSCL
ISPSDA
IT6513_CLK
IT6513_DAT
IT6513_VSYNC
IT6513_HSYNC
IT6513_RED
IT6513_GREEN
IT6513_BLUE
1 2
RV160
+1.8V_VGA_VDD
1 2
CV341 0.1U_0402_25V6
RV163 0_0402_5%@
RV164 0_0402_5%@
100_0402_1%
+1.8V_VGA
T207 @PAD~D
T208 @PAD~D
1 2
1 2
IT6513_CLK <29>
IT6513_DAT <29>
IT6513_VSYNC <29>
IT6513_HSYNC <29>
22U_0805_6.3V6M
1
CV468
2
+1.8V_VGA_VDD
0.1U_0402_25V6
1
CV338
2
150_0402_1%
12
IT6513_CLK
IT6513_DAT
0.1U_0402_25V6
1
CV339
2
12
RV695
IT6513_RED <29>
IT6513_GREEN <29>
150_0402_1%
12
RV697
IT6513_BLUE <29>
150_0402_1%
RV694
PWDNB
4 4
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size
Size
Size
Date : Sheet o f
Date : Sheet o f
A
B
C
D
Date : Sheet o f
Compal Electronics, Inc.
DP - VGA
DP - VGA
Document Number Re v
Document Number Re v
Document Number Re v
DP - VGA
LA-C841P
LA-C841P
LA-C841P
28 74Tuesday, September 08, 2015
28 74Tuesday, September 08, 2015
28 74Tuesday, September 08, 2015
E
0.1
0.1
0.1
Vinafix.com
5
4
3
2
1
+3.3V_RUN
RV250 2.2K_0402_5%
RV251 2.2K_0402_5%
D D
SEL
0
1
C C
1 2
+3.3V_RUN
+3.3V_RUN
IT6513_CLK
IT6513_RED<28>
IT6513_GREEN<28>
IT6513_BLUE<28>
IT6513_HSYNC<28>
IT6513_VSYNC<28>
IT6513_DAT<28>
IT6513_CLK<28>
DOCKED<31,35>
RV121 4.7K_0402_5%
Source
Chane l
MBA=B1
A=B2
APR/SPR
DOCKED
1 2
IT6513_DAT
1 2
VGA SW for MB/DOCK
Use SA0000 4RS00 as main source
UV16
1
R
2
G
5
B
6
H_SOURCE
7
V_HOURCE
9
SDA_SOURCE
10
SCL_SOURCE
30
SEL
29
TEST
8
Reserved
3
GND
11
GND
28
GND
31
GND
33
GPAD
TS3V713ELRTGR_WQFN32_6X3~D
PJDLC05C_SOT23-3
2
3
@EMC@
DV5
5V VDD
VDD
VDD
VDD
H1_OUT
V1_OUT
SDA1
SCL1
H2_OUT
V2_OUT
SDA2
SCL2
16
4
23
32
SW2_VGA1_RED
27
R1
G1
B1
R2
G2
B2
2
25
22
20
18
12
14
26
24
21
19
17
13
15
PJDLC05C_SOT23-3
3
SW2_VGA1_GREEN
SW2_VGA1_BLUE
SW2_VGA1_HSYNC
SW2_VGA1_VSYNC
SW2_VGA1_SDA
SW2_VGA1_SCL
@EMC@
DV6
+3.3V_RUN+5V_RUN
+5V_RUN
1
IN
0.01U_0402_50V7K
0.01U_0402_50V7K
@
@
1
1
CV127
CV128
2
2
SW2_VGA2_RED <41>
SW2_VGA2_GREEN <41>
SW2_VGA2_BLUE <41>
SW2_VGA2_HSYNC <41>
SW2_VGA2_VSYNC <41>
SW2_VGA2_SDA <41>
SW2_VGA2_SCL <41>
UV4
AP2330W-7_SC59-3
+3.3V_RUN
0.1U_0201_10V6K
0.1U_0201_10V6K
1
1
CV125
CV126
2
2
+5V_RUN
0.1U_0201_10V6K
0.1U_0201_10V6K
1
1
2
CV144
CV124
2
1
SW2_VGA1_RED
SW2_VGA1_GREEN
SW2_VGA1_BLUE
12
12
B B
A A
RV32
150_0402_1%
12
1
RV33
RV34
150_0402_1%
CV51
SW2_VGA1_SDA
SW2_VGA1_SCL
SW2_VGA1_HSYNC
SW2_VGA1_VSYNC
2
CV52
2.2P_0402_50V8C
150_0402_1%
1
2
2.2P_0402_50V8C
+CRT_VCC
RV35
LV16 BLM15BB470SN1D_2PEMC@
LV17 BLM15BB470SN1D_2PEMC@
LV18 BLM15BB470SN1D_2PEMC@
1
2
CV53
12
2.2K_0402_5%
LV19 BLM15AG121SN1D_L0402_2PEMC@
LV20 BLM15AG121SN1D_L0402_2PEMC@
1 2
1 2
1 2
2.2P_0402_50V8C
12
RV36
2.2K_0402_5%
1 2
1 2
1
2
12
RV38
RV37
@
@
1K_0402_5%
1
@
@
CV58
CV59
2
22P_0402_50V8J
1
CV54
@
3.3P_0402_50V8C
12
1K_0402_5%
1
2
22P_0402_50V8J
@
2
3.3P_0402_50V8C
1
GND2OUT
3
+CRT_VCC
1
@
T87 PAD~D
VGA1_RED_L
VGA1_GREEN_L
VGA1_HSYNC_L
VGA1_BLUE_L
VGA1_VSYNC_L
M_ID2#
0.1U_0402_25V6
CV57
CV50
1U_0402_6.3V6K
2
JCRT-11
CONN@
JCRT1
6
11
1
7
12
2
8
13
3
9
14
16
G
4
17
G
10
15
5
J-L_TNBNRACZZ027015
1
CV56
CV55
@
2
3.3P_0402_50V8C
40mils
1
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size
Size
Size
Date: Sheet o f
Date: Sheet o f
5
4
3
2
Date: Sheet o f
Compal Electronics, Inc.
VGA / DP SW
VGA / DP SW
Document Number Rev
Document Number Rev
Document Number Rev
VGA / DP SW
LA-C841P
LA-C841P
LA-C841P
1
29 74Tuesday, September 08, 2015
29 74Tuesday, September 08, 2015
29 74Tuesday, September 08, 2015
0.1
0.1
0.1
Vinafix.com
5
JEDP1
1
2
3
4
5
6
7
8
9
10
11
D D
C C
+BL_PWR_SRC
12
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
41
36
G1
42
37
G2
43
38
G3
44
39
G4
45
40
G5
ACES_50398-04041-001
CONN@
0.1U_0603_50V7K
@
CV7
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
+5V_TSP
USB20_N11_R
USB20_P11_R
LV1
EMC@
DISP_ON
TOUCH_SCREEN_DET#
EDP_AUXN_C
EDP_AUXP_C
EDP_TXP0_C
EDP_TXN0_C
EDP_TXP1_C
EDP_TXN1_C
+LCDVDD
0.1U_0201_10V6K
1
@
CV8
2
TOUCH_SCREEN_PD# <19>
+3.3V_RUN
+3.3V_CAM
CAM_MIC_CBL_DET# <16>
Pin15: LOOP_BACK
+BL_PWR_SRC
1 2
EDP_HPD <21>
LCD_TST <35>
+LCDVDD
LCD_CBL_DET# <21>
BIA_PWM
BLM15BB221SN1D_2P
CV1 0.1U_0402_25V6
CV2 0.1U_0402_25V6
CV3 0.1U_0402_25V6
CV4 0.1U_0402_25V6
CV5 0.1U_0402_25V6
CV6 0.1U_0402_25V6
+3.3V_CAM +5V_TSP
0.1U_0201_10V6K
1
2
TOUCH_SCREEN_DET# <19>
12
12
12
12
12
12
@
CZ1
4
DMIC0 <34>
DMIC_CLK0 <34>
100P_0402_50V8J
100P_0402_50V8J
12
12
CA5@EMC@
CA6@EMC@
EDP_AUXN <9>
EDP_AUXP <9>
EDP_TXP0 <9>
EDP_TXN0 <9>
EDP_TXP1 <9>
EDP_TXN1 <9>
+3.3V_RUN
0.1U_0201_10V6K
1
@
CZ2
2
0.1U_0201_10V6K
1
@
CA7
2
3
TOUCH_PANEL_INTR#:
Close lid >> TP_EN = 0 >> Disable touch events
Open lid >> TP_EN = 1 >> Enable touch events
USB20_N9_R
USB20_P9_R
AZC199-02SPR7G_SOT23-3
@EMC@
3
223
1
DV4
1
TOUCH_SCREEN_DET#
+3.3V_RUN
10K_0402_5%
12
RV623
MCM1012B900F06BP_4P
4
4
1
1
LV27
EMC@
2
3
3
2
2
USB20_N9 <17>
USB20_P9 <17>
0.1U_0603_50V7K
@
CV701
12
+PWR_SRC
47K_0402_5%
12
RV6
IR_CAM_DET#< 21>
1
2
3
4
5
6
7
8
ACES_50450-0067N-P01
QV8
LP2301ALT1G_SOT23-3
123
D
G
JIR1
1
2
3
4
5
6
GND
GND
CONN@
S
1
+5V_RUN+5V_RUN +5V_TSP
DV1
BIA_PWM_PCH
BIA_PWM
4.7K_0402_5%
12
RV1
B B
3.3V_CAM_EN#<17>
USB20_P11<17>
A A
USB20_N11<17>
BAT54CW_SOT323-3
5
3
1
BIA_PWM_EC
2
+3.3V_CAM +3.3V_RUN
LP2301ALT1G_SOT23-3
MCM1012B900F06BP_4P
4
4
3
1
1
2
LZ1
EMC@
QZ1
123
D
3
2
BIA_PWM_PCH <16>
BIA_PWM_EC <36>
S
G
USB20_P11_R
USB20_N11_R
DISP_ON
4.7K_0402_5%
12
RV2
+PWR_SRC
1000P_0402_50V7K
12
0.01U_0402_50V7K
1
2
4
CV11
CV374
270K_0402_5%
12
RV5 47K_0402_5%
EN_INVPWR<36>
1
BAT54CW_SOT323-3
RV4
BL_PWR_SRC_ON
1 2
DV2
3
2
QV1
S
4 5
AO6405_TSOP6
3
L2N7002WT1G_SC-70-3
G
D
6
2
1
123
D
PANEL_BKEN_PCH <16>
PANEL_BKEN_EC <35>
+BL_PWR_SRC
+BL_PWR_SRC_P
QV2
S
G
1 2
@
RZ92 0_0402_5%
12
PJP51
PAD-OPEN1x2m
1 2
@
RZ91 0_0402_5%
0.1U_0603_50V7K
12
CV12
3
BL_PWR_N <44>
BL_PWR_P <44>
LCD_VCC_TEST_EN<35>
L2N7002WT1G_SC-70-3
13
D
QV7
TS_EN<21>
0.01U_0402_50V7K
DV3
2
ENVDD_PCH<16,36>
3
BAT54CW_SOT323-3
2
G
S
+EDP_VDD
1 2
@
RZ94 0_0402_5%
+LCDVDD
1 2
@
RZ95 0_0402_5%
+3.3V_ALW
CV10
@
12
UV24
5
VIN
EN_LCDPWR
1
100K_0402_5%
1 2
RV3
4
EN
G524B1T11U_SOT23-5
VOUT
GND
1
2
3
/OC
PJP52
PAD-OPEN1x1m
1 2
LCDVDD_PWR_P <44>
LCDVDD_PWR_N <44>
+LCDVDD+EDP_VDD
10U_0603_6.3V6M
CV9 @
1 2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size
Size
Size
Date: Sheet of
Date: Sheet o f
2
Date: Sheet o f
Compal Electronics, Inc.
eDP CONN & Touch screen
eDP CONN & Touch screen
eDP CONN & Touch screen
Document Number Re v
Document Number Rev
Document Number Rev
LA-C841P
LA-C841P
LA-C841P
1
30 74Tuesday, September 08, 2015
30 74Tuesday, September 08, 2015
30 74Tuesday, September 08, 2015
0.1
0.1
0.1
Vinafix.com
5
4
3
2
1
+3.3V_LAN
RL1@ 10K_0402_5%
RL2@ 10K_0402_5%
RL4 4.7K_0402_5%@
@
RL70 10K_0402_5%
@
RC19 499_0402_1%
@
+0.9V_LAN
12
22U_0603_6.3V6M
CL12
+3.3V_LAN
+3.3V_LAN
RC20 499_0402_1%
PM_LANPHY_ENABLE<20>
1
2
SW_LAN0_ACTLED_YEL#
12
RL29
1M_0402_5%
12
RL30
1M_0402_5%
SW_LAN0_10_GRN#
D D
C C
B B
A A
1 2
1 2
12
1 2
12
12
0.1U_0201_10V6K
0.1U_0201_10V6K
CL9
CL10
1
2
LOM_SPD100LED_ORG#
LOM_SPD10LED_GRN#
SW_LAN0_100_ORG#
TP_LAN_JTAG_TMS
TP_LAN_JTAG_TCK
CLKREQ_PCIE#4
LAN_WAKE#
SML0_SMBCLK
SML0_SMBDATA
@
RL7 0_0402_5%
0.1U_0201_10V6K
0.1U_0201_10V6K
CL11
1
1
2
2
QL1A
DMN65D8LDW-7_SOT363-6
QL1B
DMN65D8LDW-7_SOT363-6
QL2A
DMN65D8LDW-7_SOT363-6
QL2B
DMN65D8LDW-7_SOT363-6
5
1 2
LAN CKLT0.7
CL8
+3.3V_LAN
5
1
B
2
A
3
61
2
SYS_LED_MASK#
34
5
SYS_LED_MASK#
61
2
SYS_LED_MASK#
34
5
+3.3V_LAN
10K_0402_5%
12
RL5@
10K_0402_5%
12
RL9@
XTALO_R
@
RL34 0_0402_5%
3
27P_0402_50V8J
OUT
4
GND
CL13
25MHZ_18PF_7V25000034
1 2
@
CL15
1 2
0.1U_0201_10V6K
P
4
UL2
LAN_ACTLED_YEL#
SYS_LED_MASK# <35,43>
LED_100_ORG#
LED_10_GRN#
WLAN_DISBL# <35>
O
G
TC7SH08FU_SSOP5~D
CLKREQ_PCIE#4<18>
PLTRST_LAN#<19>
CLK_PCIE_P4<18>
CLK_PCIE_N4<18>
PCIE_PRX_DTX_P4<17>
PCIE_PRX_DTX_N4<17>
PCIE_PTX_DRX_P4<17>
PCIE_PTX_DRX_N4<17>
SML0_SMBCLK<20>
SML0_SMBDATA<20>
LAN_WAKE#<20,36>
SMBus Device Address 0xC8
8/28 schematic review
1 2
YL1
1
IN
2
GND
LAN_DISABLE#_R<35>
T88@ PAD~D
T89@ PAD~D
12
RL11
1M_0402_5%
1 2
12
CL1 0.1U_0402_25V6
12
CL2 0.1U_0402_25V6
1 2
CL5 0.1U_0402_25V6
1 2
CL6 0.1U_0402_25V6
27P_0402_50V8J
CL14
0.1U_0201_10V6K
1
CL16
2
CLKREQ_PCIE#4
PCIE_PRX_C_DTX_P4
PCIE_PRX_C_DTX_N4
PCIE_PTX_C_DRX_P4
PCIE_PTX_C_DRX_N4
LAN_DISABLE#_R
LOM_ACTLED_YEL#
LOM_SPD100LED_ORG#
LOM_SPD10LED_GRN#
TP_LAN_JTAG_TDI
TP_LAN_JTAG_TDO
TP_LAN_JTAG_TMS
TP_LAN_JTAG_TCK
LAN_TEST_EN
1K_0402_5%
3.01K_0402_1%
12
12
RL12
RL13
0.1U_0201_10V6K
0.1U_0201_10V6K
1
CL20
CL17
2
4
UL1
48
CLK_REQ_N
36
PE_RST_N
44
PE_CLKP
45
PE_CLKN
38
PETp
39
PETn
41
PERp
42
PERn
28
SMB_CLK
31
SMB_DATA
2
LANWAKE_N
3
LAN_DISABLE_N
26
LED0
27
LED1
25
LED2
32
JTAG_TDI
34
JTAG_TDO
33
JTAG_TMS
35
JTAG_TCK
XTALO
9
XTAL_OUT
XTALI
10
XTAL_IN
30
TEST_EN
12
RBIAS
WGI219LM-QREF- A0_QFN48_6X6~D
change to SA000081G0L, S IC A32 WGI219LM QREF A0 QFN 48P PHY
SW_LAN0_MDIN1
SW_LAN0_MDIP1
SW_LAN0_MDIP0
SW_LAN0_MDIN0
SW_LAN0_MDIN3
SW_LAN0_MDIP3
SW_LAN0_MDIN2
0.1U_0201_10V6K
1
1
2
CL21
2
SW_LAN0_MDIP2
GND
GND
CHASSIS
CHASSIS
PCIE
SMBUS
JTAG LED
MDI_PLUS0
MDI_MINUS0
MDI_PLUS1
MDI_MINUS1
MDI_PLUS2
MDI
MDI_MINUS2
MDI_PLUS3
MDI_MINUS3
SVR_EN_N
RSVD_VCC3P3_1
VDD3P3_IN
VDD3P3_4
VDD3P3_15
VDD3P3_19
VDD3P3_29
VDD0P9_47
VDD0P9_46
VDD0P9_37
VDD0P9_43
VDD0P9_11
VDD0P9_40
VDD0P9_22
VDD0P9_16
VDD0P9_8
CTRL0P9
VSS_EPAD
TL1
1
TCT1
2
TD1+
3
TD1-
4
TCT2
5
TD2
6
TD2-
7
TCT3
8
TD3+
9
TD3-
10
TCT4
11
TD4+
TD4-12MX4-
350UH_IH-160
CL22 1500P_1808_2KV7K
LAN_MDIP0
13
LAN_MDIN0
14
LAN_MDIP1
17
LAN_MDIN1
18
LAN_MDIP2
20
LAN_MDIN2
21
LAN_MDIP3
23
LAN_MDIN3
24
VCT_LAN_R1
6
+RSVD_VCC3P3_1
1
5
4
15
19
29
47
46
37
43
11
40
22
16
8
8/28 schematic review
+REGCTL_PNP10RES_BIAS
7
49
MCT1
MX1+
MX1-
MCT2
MX2+
MX2-
MCT3
MX3+
MX3-
MCT4
MX4+
24
23
22
21
20
19
18
17
16
15
14
13
EMC@1 2
3
RL71 2.2_0603_5%EMC@ 1 2
RL72 2.2_0603_5%EMC@ 1 2
RL73 2.2_0603_5%EMC@ 1 2
RL74 2.2_0603_5%EMC@
RL75 2.2_0603_5%EMC@ 1 2
RL76 2.2_0603_5%EMC@
RL77 2.2_0603_5%EMC@ 1 2
RL78 2.2_0603_5%EMC@ 1 2
RL3 0_0402_5%@
RL6 4.7K_0402_5%12
+3.3V_LAN_OUT
+0.9V_LAN
1 2
Idc_min=500m A
DCR=100m ohm
RJ45_MDIN1
RJ45_MDIP1
RJ45_MDIP0
RJ45_MDIN0
RJ45_MDIN3
RJ45_MDIP3
RJ45_MDIN2
RJ45_MDIP2
use 40mil trace if necessary
1 2
1 2
12
RL8@ 0_0603_5%
0.1U_0201_10V6K
12
CL7
+0.9V_LAN
LL14.7UH_BRC2012T4R7MD_20%
0.1U_0201_10V6K
CL3
1
12
2
Z2805
Z2807
Z2806
Z2808
+GND_CHASSIS
LAN_MDIP0_L
LAN_MDIN0_L
LAN_MDIP1_L
LAN_MDIN1_L
LAN_MDIP2_L
LAN_MDIN2_L
LAN_MDIP3_L
LAN_MDIN3_L
+3.3V_LAN
12
+3.3V_LAN
10U_0603_6.3V6M
@
CL4
+3.3V_LAN_OUT
LAN CKLT0.7
12
12
12
12
RL15 75_0402_1%
RL18 75_0402_1%
RL16 75_0402_1%
RL17 75_0402_1%
+3.3V_LAN
DOCKED<29,35>
LOM_ACTLED_YEL#
LOM_SPD100LED_ORG#
LOM_SPD10LED_GRN#
22U_0805_6.3V6M
1
CL28
2
LAN_ACTLED_YEL# LAN_ACTLED_YEL_R#
LED_10_GRN# LED_10_GRN_R#
LED_100_ORG# LED_100_ORG_R#
0.1U_0402_25V6
12
2
0.1U_0201_10V6K
0.1U_0201_10V6K
CL26
CL25
1
1
2
2
LAN_MDIP3_L
LAN_MDIN3_L
LAN_MDIP2_L
LAN_MDIN2_L
LAN_MDIP1_L
LAN_MDIN1_L
LAN_MDIP0_L
LAN_MDIN0_L
1 2
RL14 150_0402_5%
RJ45_MDIN3
RJ45_MDIP3
RJ45_MDIN1
RJ45_MDIN2
RJ45_MDIP2
RJ45_MDIP1
RJ45_MDIN0
RJ45_MDIP0
1 2
RL19 150_0402_5%
1 2
RL20 150_0402_5%
0.1U_0402_25V6
CL30
CL29
12
EMC@
EMC@
0.1U_0201_10V6K
1
2
2
3
6
7
9
10
11
12
13
15
16
42
5
43
CL27
1
4
8
14
21
30
39
UL4
VDD
VDD
VDD
VDD
VDD
VDD
A0+
A0-
A1+
A1-
A2+
A2-
A3+
A3-
SEL
LEDA0
LEDA1
LEDA2
PD
PAD_GND
PI3L720ZHEX_TQFN42_9X3P5
+3.3V_LAN
470P_0402_50V7K
0.1U_0201_10V6K
1
12
CL18
CL19
2
VDD
SW_LAN0_MDIP3
38
B0+
SW_LAN0_MDIN3
37
B0-
SW_LAN0_MDIP2
34
B1+
SW_LAN0_MDIN2
33
B1-
SW_LAN0_MDIP1
29
B2+
SW_LAN0_MDIN1
28
B2-
SW_LAN0_MDIP0
25
B3+
SW_LAN0_MDIN0
24
B3-
SW_LAN0_ACTLED_YEL#
17
LEDB0
SW_LAN0_100_ORG#
18
LEDB1
SW_LAN0_10_GRN#
41
LEDB2
36
35
32
31
27
26
23
22
19
20
40
SW_LAN1_MDIP3 <41>
SW_LAN1_MDIN3 <41>
SW_LAN1_MDIP2 <41>
SW_LAN1_MDIN2 <41>
SW_LAN1_MDIP1 <41>
SW_LAN1_MDIN1 <41>
SW_LAN1_MDIP0 <41>
SW_LAN1_MDIN0 <41>
SW_LAN1_ACTLED_YEL# <41>
SW_LAN1_100_ORG# <41>
SW_LAN1_10_GRN# <41>
LEDC0
LEDC1
LEDC2
C0+
C0-
C1+
C1-
C2+
C2-
C3+
C3-
RJ45 LOM circuit
+3.3V_LAN:20mils
JLOM1
10
Yellow LED-
9
Yellow LED+
8
PR4-
7
PR4+
6
PR2-
5
PR3-
4
PR3+
3
PR2+
2
PR1-
1
PR1+
11
Green LED-
13
Orange LED-
12
Green-Orange LED+
SANTA_130456-511
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size
Size
Size
Date: Sheet of
Date: Sheet o f
Date: Sheet o f
Compal Electronics, Inc.
LAN
LAN
Document Number Re v
Document Number Rev
Document Number Rev
LAN
LA-C841P
LA-C841P
LA-C841P
1
CONN@
17
GND
16
GND
15
GND
14
GND
0.1
0.1
31 74Tuesday, September 08, 2015
31 74Tuesday, September 08, 2015
31 74Tuesday, September 08, 2015
0.1
Vinafix.com
A
+3.3V_MMI_IN+3.3V_RUN
PJP26
1 2
1 1
2 2
+3.3V_MMI_AUX +3.3V_MMI_IN
+3.3V_MMI_AUX
PAD-OPEN1x2m
1 2
@
R274 0_0603_5%
MEDIACARD_IRQ#
1 2
RR19 1 0K_0402_5%
7/18 Vender suggest.
B
PCH_PLTRST#_AND<19,33,37,38>
CLKREQ_PCIE#3<18>
CLK_PCIE_P3<18>
1
2
1 2
0.1U_0201_10V6K
CR10
CLK_PCIE_N3<18>
MEDIACARD_IRQ#<19>
0.1U_0201_10V6K
1
CR13
2
PCIE_PTX_DRX_P3<17>
PCIE_PTX_DRX_N3<17>
PCIE_PRX_DTX_P3<17>
PCIE_PRX_DTX_N3<17>
CR24 0 .1U_0402_25V61 2
CR25 0 .1U_0402_25V6
CR26 0 .1U_0402_25V61 2
CR27 0 .1U_0402_25V61 2
+1.2V_LDO
4.7U_0603_6.3V6K
CR9
12
PCIE_PTX_C_DRX_P3
PCIE_PTX_C_DRX_N3
PCIE_PRX_C_DTX_P3
PCIE_PRX_C_DTX_N3
+1.8V_RUN_CARD
SD/MMCCD#
+RREF
12
RR20
6.2K_0402_1%
C
+3.3V_MMI_AUX
0.1U_0201_10V6K
1
CR8
2
UR2
1
PERST#
2
CLK_REQ#
5
REFCLKP
6
REFCLKN
3
HSIP
4
HSIN
7
HSOP
8
HSON
32
WAKE#
31
MS_INS#
30
SD_CD#
10
AV12
14
DV12S
13
SD_VDD2
9
RREF
D
+3.3V_MMI_IN
0.1U_0201_10V6K
10U_0402_6.3V6M
1
CR42
2
11
27
3V3aux
RTS5242
E-PAD
33
10U_0402_6.3V6M
1
1
CR36
2
2
12
CARD_3V3
3V3_IN
18
DV33_18
15
SP1
16
SP2
17
SP3
19
SP4
20
SP5
21
SP6
29
SP7
22
SD_LN1_P
23
SD_LN1_M
26
SD_LN0_P
25
SD_LN0_M
24
SDREG2
28
GPIO
RTS5242-GR_QFN32_4X4
CR43
+DV33_18
SD/MMCDAT1/RCLKSD/MMCDAT0/RCLK+
SD/MMCCLK
SD/MMCCMD
SD/MMCDAT3
SD/MMCDAT2
SDWP
SD_UHS2_D1P
SD_UHS2_D1N
SD_UHS2_D0P
SD_UHS2_D0N
+SDREG2
SD_GPIO
+3.3V_RUN_CARD
@
RR21 0_0402_5%
1 2
@
RR22 0_0402_5%
1 2
RR1EMC@ 10_0402_5%1 2
@
1 2
RR23 0_0402_5%
@
RR17 0_0402_5%
1 2
@
RR18 0_0402_5%
1 2
1 2
CR35 1U_0402_6.3V6K
12
RR1610K_0402_5%
1 2
CR37 1U_0402_6.3V6K
+3.3V_MMI_AUX
SD/MMCDAT1/RCLK-_R
SD/MMCDAT0/RCLK+_R
SD/MMCCLK_R
SD/MMCCMD_R
SD/MMCDAT3_R
SD/MMCDAT2_R
@EMC@
5P_0402_50V8C
12
CR23
E
HOST_SD_WP#
3 3
4 4
High
Low
SDWP_Q SD WP
High
High
Low
Low
High
High
Low
High
STATUS
Write Protect(SD LOCK)
Write Enable
Write Protect(SD& FW LOCK)
Write Protect(FW LOCK)
QR1
DMN65D8LW-7_SOT323-3
SDWP_Q
D
SDWP
HOST_SD_WP#<21>
S
1 3
G
2
+3.3V_RUN_CARD +1.8V_RUN_CARD
2
CR39
1 2
1
0.1U_0201_10V6K
JSD1
CONN@
+3.3V_RUN_CARD
+1.8V_RUN_CARD
2
CR40
CR41
CR38
4.7U_0603_6.3V6K
1 2
1
0.1U_0201_10V6K
4.7U_0603_6.3V6K
SD/MMCCMD_R
SD/MMCCLK_R
SD/MMCCD#
SDWP_Q
SD/MMCDAT0/RCLK+_R
SD/MMCDAT1/RCLK-_R
SD/MMCDAT2_R
SD/MMCDAT3_R
SD_UHS2_D0P
SD_UHS2_D0N
SD_UHS2_D1P
SD_UHS2_D1N
4
VDD/VDD1
14
VDD2
2
CMD
5
CLK
18
CARD DETECT
19
WRITE PROTEC
7
DAT0/RCLK+
8
DAT1/RCLK-
9
DAT2
1
CD/DAT3
11
D0+
12
DO-
16
D1+
15
D1-
3
VSS1
6
VSS2
10
VSS3
13
VSS4
VSS517GND7
ALPS_SCDADA0101_NR
GND1
GND2
GND3
GND4
GND5
GND6
20
21
22
23
24
25
26
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size
Size
Size
Date : Sheet o f
Date: Sheet o f
A
B
C
D
Date: Sheet o f
Compal Electronics, Inc.
Card Reader
Card Reader
Document Number Re v
Document Number Rev
Document Number Rev
Card Reader
LA-C841P
LA-C841P
LA-C841P
E
32 74Tuesday, September 08, 2015
32 74Tuesday, September 08, 2015
32 74Tuesday, September 08, 2015
0.1
0.1
0.1
Vinafix.com
5
+3.3V_WWAN
NGFF slot B Key B
WWAN_PWR_EN
1 2
RZ43@ 0_0402_5%
JNGFF2
SLOT2_CONFIG_3<3 5>
USB20_P8<17>
D D
PCIE_PTX_DRX_N14<16>
PCIE_PTX_DRX_P14<16>
C C
+3.3V_WWAN
.047U_0402_16V7K
12
USB20_N8<17>
SLOT2_CONFIG_0<3 5>
WWAN_WAKE#<35>
PCIE_PRX_DTX_P14<16>
PCIE_PRX_DTX_N14<16 >
1 2
CZ58 0.1U_0402_25V6
CZ59 0.1U_0402_25V61 2
CLK_PCIE_N14<18>
CLK_PCIE_P14<18>
SLOT2_CONFIG_1<3 5>
SLOT2_CONFIG_2<3 5>
.047U_0402_16V7K
33P_0402_50V8J
12
CZ51
22U_0603_6.3V6M
12
12
CZ52
CZ53
USB3_PRX_L_DTX_N2
USB3_PRX_L_DTX_P2
USB3_PTX_L_DRX_N2
USB3_PTX_L_DRX_P2
PCIE_PTX_C_DRX_N14
PCIE_PTX_C_DRX_P14
33P_0402_50V8J
12
CZ54
CZ55
150U_B2_6.3VM_R35M
1
@
+
CZ57
2
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
21
23
23
25
25
27
27
29
29
31
31
33
33
35
35
37
37
39
39
41
41
43
43
45
45
47
47
49
49
51
51
53
53
55
55
57
57
59
59
61
61
63
63
65
65
67
67
69
GND
BELLW_80149-4221
CONN@
47P_0402_50V8J
1
@
CZ105
2
WWAN_RADIO_DIS#<35>
HW_GPS_DISABLE#<35>
4
3
2
1
NGFF slot A Key A
JNGFF1
1
+3.3V_WWAN
2
2
4
4
WWAN_PWR_EN
6
6
WWAN_RADIO_DIS#_R
8
8
10
10
12
12
14
14
16
16
HW_GPS_DISABLE#_R
18
18
20
20
22
22
24
24
26
26
28
28
30
30
32
32
34
34
36
36
38
38
40
40
42
42
44
44
46
46
48
48
50
50
52
52
54
54
56
56
58
58
60
60
62
62
64
64
66
66
68
GND
UIM_RESET
UIM_CLK
UIM_DATA
PCH_PLTRST#_AND
PCIE_WAKE#
SIM_DET
1 2
RB751S40T1G_SOD523-2
1 2
RB751S40T1G_SOD523-2
+SIM_PWR
CLKREQ_PCIE#14 <18>
DZ5
DZ6
WWAN_RADIO_DIS#_R
HW_GPS_DISABLE#_R
SW2_DP2_N3<27>
SW2_DP2_P3<27>
SW2_DP2_N2<27>
SW2_DP2_P2<27>
PCIE_PTX_DRX_P2<17>
PCIE_PTX_DRX_N2<17>
PCIE_PTX_DRX_P1<17>
PCIE_PTX_DRX_N1<17>
WLAN_WIGIG60GHZ_DIS#<35>
USB20_P6<17>
USB20_N6<17>
1 2
CV145 0.1U_0402_25V6
1 2
CV146 0.1U_0402_25V6
1 2
1 2
CV148 0.1U_0402_25V6
CV147 0.1U_0402_25V6
SW2_DP2_HPD<27>
1 2
CZ13 0.1U_0402_25V6
CZ14 0.1U_0402_25V61 2
PCIE_PRX_DTX_P2<17>
PCIE_PRX_DTX_N2<17>
CLK_PCIE_P2<18>
CLK_PCIE_N2<18>
CLKREQ_PCIE#2<18>
PCIE_WAKE#<35,38,46>
CZ21 0.1U_0402_25V61 2
CZ22 0.1U_0402_25V61 2
PCIE_PRX_DTX_P1<17>
PCIE_PRX_DTX_N1<17>
CLK_PCIE_P1<18>
CLK_PCIE_N1<18>
1 2
DZ1
RB751S40T1G_SOD523-2
SW2_DP2_N3_C
SW2_DP2_P3_C
SW2_DP2_N2_C
SW2_DP2_P2_C
PCIE_PTX_C_DRX_P2
PCIE_PTX_C_DRX_N2
PCIE_WAKE#
PCIE_PTX_C_DRX_P1
PCIE_PTX_C_DRX_N1
WLAN_WIGIG60GHZ_DIS#_R
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
21
23
23
25
25
27
27
29
29
31
31
33
33
35
35
37
37
39
39
41
41
43
43
45
45
47
47
49
49
51
51
53
53
55
55
57
57
59
59
61
61
63
63
65
65
67
67
69
GND
BELLW_80148-4221
CONN@
+3.3V_WLAN
2
2
4
4
6
6
8
8
10
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
GND
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
+3.3V_WLAN
0.1U_0201_10V6K
1
2
SW2_DP2_AUXN_C
SW2_DP2_AUXP_C
SW2_DP2_N1_C
SW2_DP2_P1_C
SW2_DP2_N0_C
SW2_DP2_P0_C
WIGIG_32KHZ
PCH_PLTRST#_AND
BT_RADIO_DIS#_R
WLAN_WIGIG60GHZ_DIS#_R
ISH_UART0_RXD_R
ISH_UART0_TXD_R
ISH_UART0_CTS#_R
ISH_UART0_RTS#_R
PCH_PLTRST#_AND
PCIE_WAKE#
.047U_0402_16V7K
.047U_0402_16V7K
12
12
@
CZ20
CZ15
12
CV1500.1U_0402_25V6
12
CV1490.1U_0402_25V6
12
CV1520.1U_0402_25V6
12
CV1530.1U_0402_25V6
12
12
CV1560.1U_0402_25V6
PCH_CL_RST1# <1 6>
PCH_CL_CLK1 <16>
PCH_PLTRST#_AND <19,32,37,38>
RZ78 0_0402_5%@
RZ79 0_0402_5%@
RZ80 0_0402_5%@
RZ81 0_0402_5%@
CZ16
CV1570.1U_0402_25V6
PCH_CL_DATA1 <1 6>
12
12
12
12
CLKREQ_PCIE#1 <18>
0.1U_0201_10V6K
0.1U_0201_10V6K
1
1
CZ18
CZ17
2
2
SW2_DP2_AUXN <27>
SW2_DP2_AUXP <27>
SW2_DP2_N1 <27>
SW2_DP2_P1 <27>
SW2_DP2_N0 <27>
SW2_DP2_P0 <27>
RZ560_0402_5%@12
SUSCLK <20,38>
ISH_UART0_RXD <21>
ISH_UART0_TXD <21>
ISH_UART0_CTS# <21 >
ISH_UART0_RTS# <21>
4.7U_0603_6.3V6K
1
12
CZ19
2
47P_0402_50V8J
@
CZ106
BT_RADIO_DIS#_R
Power Rating TBD
Voltage
PWR
Toleranc e
Rail
+3.3V
Primary Power Aux Power
Peak Normal Norma l
1 2
1 2
USB3_PRX_L_DTX_P2
USB3_PRX_L_DTX_N2
USB3_PTX_L_DRX_N2
BT_RADIO_DIS#<35>
33P_0402_50V8J
@EMC@
12
CZ67
1 2
@
RI27 0_0402_5%
1 2
@
RI28 0_0402_5%
@
RI29 0_0402_5%
@
RI30 0_0402_5%
USB3_PRX_DTX_P2<20>
USB3_PRX_DTX_N2<20>
USB3_PTX_C_DRX_P2 USB3_PTX_L_DRX_P2
USB3_PTX_DRX_P2<20>
UIM_RESET
UIM_CLK
USB3_PTX_DRX_N2<20>
JSIM1
1
VCC
2
RST
3
CLK
4
RFU1
10
GND
11
GND
12
GND
13
GND
T-SOL_5-991503004000-6
CONN@
RFU2
DTSW
GND
VPP
I/O
GND
GND
GND
5
6
7
8
9
14
15
16
UIM_RESET
UIM_CLK
UIM_DATA
B B
SIM Card Push-Push
+SIM_PWR
1U_0402_6.3V6K
12
C263
A A
12
CI30 0.1U_0402_25V6
USB3_PTX_C_DRX_N2
12
CI29 0.1U_0402_25V6
UIM_DATA
SIM_DET_R SIM_DET
1 2
@
RI31 0_0402_5%
33P_0402_50V8J
33P_0402_50V8J
@EMC@
@EMC@
12
12
CZ65
CZ66
1 2
DZ2
RB751S40T1G_SOD523-2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
For RF team request
5
Title
Title
Title
Size Docum ent Number Re v
Size Document Number Rev
Size Document Number Rev
Date : Sheet o f
Date: Sh eet of
4
3
2
Date: Sh eet of
Compal Electronics, Inc.
NGFF Card
NGFF Card
NGFF Card
LA-C841P
LA-C841P
LA-C841P
33 74Tuesday, September 08, 2015
33 74Tuesday, September 08, 2015
33 74Tuesday, September 08, 2015
1
0.1
0.1
0.1
Vinafix.com
2
1
1W x 1ch, 4ohm (Transducer spec is 8Ohm/0.5Watt per unit, there are two transducer uni ts in on e speaker box.)
+VDDA_AVDD1
0.1U_0201_10V6K
CA8
1
2
+VDDA_PVDD
+5V_RUN_PVDD
AUD_SENSE_A
AUD_SENSE_B
1 2
RA45 0_0402_5%@
RING2
SLEEVE
1 2
CA25 10U_0603_6.3V6M
AUD_OUT_L
AUD_OUT_R
INT_SPK_L+
INT_SPK_L-
INT_SPK_R+
INT_SPK_R-
AUD_PC_BEEP
CA29 1U_0603_10V6K
CA49 1U_0603_10V6K
CA35 2.2U_0402_6.3V6M
+MIC1_VREF_OUT
RING2_R
AUD_HP_OUT_L1
AUD_HP_OUT_R1
SLEEVE_R
1 2
1 2
RA7 24.9_0402_1%
RA8 24.9_0402_1%
RA14EMC@ 3 3_0402_5%
12
12
12
4.7K_0402_5%
RA24
EMC@
@EMC@
680P_0402_50V7K
220P_0402_50V7K
1
1
CA1
CA2
2
2
1 2
+5V_RUN
+3.3V_RUN_AUDIO
HDA_BIT_CLK_R<20>
HDA_SDOUT_R<20>
HDA_SYNC_R<20>
HDA_SDIN0<20>
HDA_RST#_R<20>
DAI_12MHZ#<41>
DAI_BCLK#<41>
DAI_DO#<41>
DAI_LRCK#<41>
DAI_DI<41>
PJP9
@
1 2
PAD-OPEN1x2m
@
PJP10
1 2
PAD-OPEN1x1m
+3.3V_RUN_AUDIO
CA11 close to pin9
CA10 close to pin3
0.1U_0201_10V6K
CA10
CA11
1
1
2
2
1 2
RA9 33_0402_5%
1 2
RA30EMC@ 22_0402_5%
1 2
RA31EMC@ 22_0402_5%
1 2
RA32 33_0402_5%
1U_0603_10V6K
12
CA31
1 2
1 2
1 2
+5V_RUN_AUDIO
0.1U_0201_10V6K
CA50
4.7U_0603_6.3V6K
12
AUD_NB_MUTE#
place at AGND and DGND plane
@
RA35 0_0402_5%
@
RA36 0_0402_5%
@
RA37 0_0402_5%
UA1
EN_I2S_NB_CODEC#<35>
HDA_BIT_CLK_R
HDA_SDOUT_R
HDA_SDIN0_R
HDA_RST#_R
I2S_MCLK
I2S_BCLK
I2S_DO
MIC1_L
MIC1_R
100K_0402_5%
12
RA44
8/4
CA52
4.7U_0603_6.3V6K
CA51
4.7U_0603_6.3V6K
12
12
12
PJP12
1 2
PAD-OPEN1x1m
SLEEVE
+RTC_CELL
DMN65D8LDW-7_SOT363-6
34
QA2B
5
DMN65D8LDW-7_SOT363-6
1
I2S I/F Float
3
DVDD_IO
9
DVDD
6
BCLK
5
SDATA-OUT
10
SYNC
8
SDATA-IN
11
RESET#
15
I2S_MCLK
16
I2S_SCLK
17
I2S_DOUT
18
I2S_LRCK
24
I2S_DIN
19
MIC1-L(PORT-B-L)
20
MIC1-R(PORT-B-R)
48
EAPD+PD
21
LDO1-CAP
39
LDO2-CAP
7
LDO3-CAP
CA53
4.7U_0603_6.3V6K
49
GND
ALC3235-CG_MQFN48_6X6
RING2
AUD_HP_OUT_L
AUD_HP_OUT_R
SLEEVE
100K_0402_5%
12
RA21
61
QA2A
AUD_NB_MUTE#
2
LA10 BLM15PX330SN1D_2PEMC@ 1 2
LA2 BLM15BD601SN1D_2PEMC@
LA3 BLM15BD601SN1D_2PEMC@ 1 2
LA11 BLM15PX330SN1D_2PEMC@ 1 2
HP/MIC1 JD(JD1)
I2S_IN/I2S_OUT JD(JD2)
TV Mode/LINE1-JD (JD3)
LINE1-L(PORT-C-L)/RING2
LINE1-R(PORT-C-R)/SLEEVE
HPOUT-L(PORT-A-L)
HPOUT-R(PORT-A-R)
GPIO0/DMIC-CLK
GPIO1/DMIC-DATA12
SPDIF-OUT/DMIC-DATA34/GPIO2
MIC1_L
MIC1_R
1 2
AVDD1
AVDD2
CPVDD
PVDD1
PVDD2
LINE1-VREFO
MIC-CAP
SPK-OUT-L+
SPK-OUT-L-
SPK-OUT-R+
SPK-OUT-R-
PCBEEP
CPVEE
VREF
MIC1-VREFO
AVSS1
AVSS2
CA43
CA44
27
40
38
41
46
13
14
22
28
29
23
31
33
32
42
43
45
44
12
2
4
47
35
CBN
36
CBP
34
25
30
26
37
1 2
4.7U_0603_6.3V6K
1 2
4.7U_0603_6.3V6K
CONN@
INT_SPK_L+
INT_SPK_LINT_SPK_R+
INT_SPK_R-
1000P_0402_50V7K
12
CA22@EMC@
B B
A A
AUD_PWR_EN<21>
LA6 BLM15PX330SN1D_2PEMC@ 1 2
LA7 BLM15PX330SN1D_2PEMC@ 1 2
LA8 BLM15PX330SN1D_2PEMC@ 1 2
1 2
LA9 BLM15PX330SN1D_2PEMC@
1000P_0402_50V7K
1000P_0402_50V7K
1000P_0402_50V7K
12
12
12
CA24@EMC@
CA23@EMC@
CA19@EMC@
HDA_BIT_CLK_R
33_0402_5%
12
RA17@EMC@
10P_0402_50V8J
12
CA33@EMC@
AUD_SENSE_A
13
D
QA1
S
L2N7002WT1G_SC-70-3
AUD_SENSE_B
100K_0402_5%
200K_0402_5%
12
12
RA29
QA3A
2
UZ5
@
1
VIN1
2
VIN1
3
ON1
4
VBIAS
5
ON2
6
VIN2
VIN27VOUT2
EM5209VF_SON14_2X3
RA28
61
34
VOUT1
VOUT1
CT1
GND
CT2
VOUT2
GPAD
+3.3V_RUN_AUDIO +3.3V_RUN_AUDIO
100K_0402_5%
12
DMN65D8LDW-7_SOT363-6
+5V_RUN
+5V_ALW
+3.3V_RUN
INT_SPKR_L+
INT_SPKR_LINT_SPKR_R+
INT_SPKR_R-
L03ESDL5V0CC3-2_SOT23-3
2
2
2
G
RA27
QA3B
DMN65D8LDW-7_SOT363-6
14
13
12
11
10
9
8
15
3
3
@EMC@
DA6
1
1
0.1U_0402_25V6
12
CA41
@
1 2
RA38 100K_0402_5%
100K_0402_5%
12
RA26
5
+5V_RUN_AUDIO_UZ5
+3.3V_RUN_AUDIO_UZ5
JSPK1
1
1
2
2
3
3
4
4
L03ESDL5V0CC3-2_SOT23-3
5
GND
6
@EMC@
GND
ACES_50279-0040N-001
DA7
BCLK: Audio serial data bus bit clock input/output
LRCK: Audio serial data bus word clock input/output
AUD_NB_MUTE#<35>
+3.3V_RUN_AUDIO
AUD_HP_NB_SENSE <35>
Add for solve
pop noise and
detect issue
+3.3V_RUN_AUDIO
DOCK_MIC_DET <35>DOCK_HP_DET<35>
+5V_RUN_AUDIO
12
PJP31@
PAD-OPEN1x1m
1 2
@
CZ110 0.1U_0201_10V6K
1 2
CZ111
@
1 2
CZ91
@
PJP30@
1 2
PAD-OPEN1x1m
1 2
@
CZ92 0.1U_0201_10V6K
2
RA18 10K_0402_5%
+3.3V_RUN +3.3V_RUN_AUDIO
220P_0402_50V7K
1000P_0402_50V7K
1 2
10U_0603_6.3V6M
BLM15PX600SN1D_2P
12
CA9
+3.3V_RUN_AUDIO
12
CA27 0. 1U_0402_25V6
12
CA28 0. 1U_0402_25V6
DMIC_CLK0DMIC_CLK_CODEC
1 2
DMIC0 <30>
RB751S40T1G_SOD523-2
RB751S40T1G_SOD523-2
21
21
DA4
DA5
4.7K_0402_5%
RA25
1 2
1 2
AUD_HP_OUT_L
AUD_HP_OUT_R
@EMC@
EMC@
220P_0402_50V7K
680P_0402_50V7K
1
1
CA3
CA4
2
2
+5V_RUN_AUDIO +1.5V_RUN
LA5
+1.5V_RUN_AUDIO
4.7U_0603_6.3V6K
1
CA16
2
+VREFOUT
AUD_HP_OUT_L
AUD_HP_OUT_R
1 2
RA12 1K_0402_5%
1 2
RA13 1K_0402_5%
DMIC_CLK0 <30>
+3.3V_RUN_AUDIO
12
RA1
10K_0402_5%
EMC@
3
2
3
DA1
L03ESDL5V0CC3-2_SOT23-3
1
1
1
12
0.1U_0201_10V6K
4.7U_0603_6.3V6K
CA17
1
1
CA18
2
2
SPKR <20>
BEEP <36>
680P_0402_50V7K
@EMC@
1
CA13
2
AUD_HP_NB_SENSE
EMC@
EMC@
2
DA2
L03ESDL5V0CC3-2_SOT23-3
RA2 100K_0402_5%
2
3
DA3
12
AZ5123-02S.R7G_SOT23-3
1
DELL CONFIDENTIAL/PROPRIETARY
Title
Title
Title
Size
Document Number Rev
Size
Document Number Rev
Size
Document Number Rev
Date: Sheet o f
Date: Sheet o f
Date: Sheet o f
+3.3V_RUN_AUDIO
1
2
DMIC_CLK0
12
0_0603_5%
RA4@
0.1U_0201_10V6K
CA45
0.1U_0201_10V6K
10U_0603_6.3V6M
CA47
1
1
CA46
2
2
RING2
SLEEVE
+VREFOUT
22P_0402_50V8J
12
@EMC@
CA54
0_0603_5%
RA3@
Global Headset
Universal Jack
JHP1
3
1
5
6
2
4
SINGA_2SJ3095-059111F
CONN@
680P_0402_50V7K
@EMC@
1
CA12
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Codec ALC3235
Codec ALC3235
Codec ALC3235
LA-C841P
LA-C841P
LA-C841P
+5V_RUN_AUDIO
10U_0603_6.3V6M
1
CA48
2
1 2
1 2
G
34 74Tuesday, September 08, 2015
34 74Tuesday, September 08, 2015
34 74Tuesday, September 08, 2015
0_0805_5%
12
RA39@
+VREFOUT
RA52.2K_0402_5%
RA62.2K_0402_5%
1U_0603_10V6K
12
@
CA26
7
0.1
0.1
0.1
Vinafix.com
5
+3.3V_ALW
RPE9
USB_PWR_SHR_VBUS_EN
1
8
7
6
100K_0804_8P4R_5%
D D
+3.3V_RUN
C C
B B
1 2
RE5 100K_0402_5%
1 2
RE10 100K_0402_5%
1 2
RE8 100K_0402_5%
1 2
RE9 100K_0402_5%
8
7
6
100K_0804_8P4R_5%
1 2
RE11 100K_0402_5%
1 2
RE12 100K_0402_5%
1 2
RE83 100K_0402_5%@
1 2
RE311 10K_0402_5%
RC281 10K_0402_5%
@
RE304 100K_0402_5%
1 2
RE315 100K_0402_5%
1 2
TB@
RE314 10K_0402_5%
1 2
RE21 10K_0402_5%
1 2
RE20 100K_0402_5%
UMA@
DIS@
Discrete
UMA
RPE11
1 2
1 2
VGA_ID
VGA_ID
2
3
45
1
2
3
45
USB_PWR_EN1#
USB_PWR_EN2#
SLICE_BAT_PRES#
WWAN_RADIO_DIS#
WLAN_WIGIG60GHZ_DIS#
DOCK_TNY_SMBUS_ALRT#
SLOT2_CONFIG_0
SLOT2_CONFIG_1
SLOT2_CONFIG_2
SLOT2_CONFIG_3
BT_RADIO_DIS#
HW_GPS_DISABLE#
AC_DIS
UPD_SMBUS_ALERT#_EC
USH_DET#
GPU_PWR_LEVEL
PROCHOT_GATE
PD_ACE_DET#
SYS_LED_MASK#
LCD_TST
+3.3V_ALW
1 2
RE84100K_0402_5%
1 2
RE85100K_0402_5%
VGA_ID0
0
1
USB_PWR_SHR_EN# <35,40>
RTD3_CIO_PWR_EN<19,46>
LAN_DISABLE#_R< 31>
DOCK_TNY_SMBUS_ALRT#<41,57>
GPU_PWR_LEVEL<51>
EN_I2S_NB_CODEC#<34>
USH_PWR_STATE#<37>
EN_DOCK_PWR_BAR<67>
HW_GPS_DISABLE#<33>
PANEL_BKEN_EC<30>
LCD_VCC_TEST_EN<30>
AUD_HP_NB_SENSE<34>
SLICE_BAT_PRES#<41,57,67>
Rese rve
WLAN_WIGIG60GHZ_DIS#<33>
UPD_SMBUS_ALERT#_EC<49>
M2_SLOT2_PCIE#_SATA<16>
USB_PWR_SHR_VBUS_EN<40>
WWAN_RADIO_DIS#<33>
USB_PWR_EN2#<39>
PSID_DISABLE#<57>
DOCK_DET#<41,67>
AUD_NB_MUTE#<34>
3.3V_WWAN_EN<44>
WWAN_WAKE#<33>
USB_PWR_EN1#<40>
SLICE_BAT_ON<67>
T206@ PAD~D
T99@ PAD~D
T209@ PAD~D
T203@ PAD~D
BCM5882_ALERT#<37>
DGPU_PWROK<20,53,69>
TDOCK_BATLOW#<46>
SYS_LED_MASK#<31,43>
T211@ PAD~D
T210@ PAD~D
PWR_SRC_ON<73>
BT_RADIO_DIS#< 33>
SIO_SLP_WLAN#<20,44>
AC_DIS<57,66,67>
LCD_TST<30>
DOCKED<29,31>
USH_DET#<37>
EC5048_TX<36>
4
RTD3_CIO_PWR_EN
LID_CL_SIO#
DOCK_TNY_SMBUS_ALRT#
GPU_PWR_LEVEL
USB_PWR_EN2#
HW_GPS_DISABLE#
LCD_TST
WWAN_WAKE#
USB_PWR_EN1#
SLICE_BAT_ON
SLICE_BAT_PRES#
TB_STAT#
GPIOD5
WLAN_WIGIG60GHZ_DIS#
UPD_EN1_4#
DETECT_PWR_EN
UPD_SMBUS_ALERT#_EC
VGA_ID
TDOCK_BATLOW#
SYS_LED_MASK#
5VUSB_OFF
EN_PIC_LDO
USB_PWR_SHR_VBUS_EN
PWR_SRC_ON
BT_RADIO_DIS#
WWAN_RADIO_DIS#
+3.3V_ALW +3.3V_ALW_UE1
12
B52
A49
B53
A50
B54
A51
B55
A52
A33
B36
A34
B37
A35
B38
A36
A37
B40
A38
B41
A39
B42
A40
B43
A41
B44
B32
A31
B33
B15
A15
B16
A16
A1
B2
A2
B3
A3
B45
A42
B4
A59
B62
A58
B61
A56
B59
A55
B58
B47
A45
B48
A46
B49
A47
B50
A48
B13
A13
A53
B57
B14
A14
B17
B18
1 2
10U_0603_6.3V6M
PAD-OPEN1x1m
CE1
UE1
GPIOA0
GPIOA1
GPIOA2
GPIOA3
GPIOA4
GPIOA5
GPIOA6
GPIOA7
GPIOB0
GPIOB1
GPOC2
GPOC3
GPOC4
GPOC5
GPOC6/TACH4
GPIOC7
GPIOD0
GPIOC1
GPIOC0
GPIOB7
GPIOB6
GPIOB5
GPIOB4
GPIOB3
GPIOB2
GPIOD1
GPIOD2
GPIOD3
GPIOD4
GPIOD5
GPIOD6
GPIOD7
GPIOE0/RXD
GPIOE1/TXD
GPIOE2/RTS#
GPIOE3/DSR#
GPIOE4/CTS#
GPIOE5/DTR#
GPIOE6/RI#
GPIOE7/DCD#
GPIOF0
GPIOF1
GPIOF2
GPIOF3/TACH8
GPIOF4/TACH7
GPIOF5
GPIOF6
GPIOF7
GPIOG0/TACH5
GPIOG1
GPIOG2
GPIOG3
GPIOG4
GPIOG5
GPIOG6
GPIOG7/TACH6
GPIOH0
GPIOH1
SYSOPT1/GPIOH2
SYSOPT0/GPIOH3
GPIOH4
GPIOH5
GPIOH6
GPIOH7
PJP14
B5
B30
A17
A43
A54
VCC1
VCC1
VCC1
VCC1
VCC1
ECE5048-LZY_DQFN132_11X11~D
3
0.1U_0201_10V6K
CE2
1
1
2
2
GPIOI0
GPIOI1
GPIOI2/TACH0
GPIOI3
GPIOI4
GPIOI5
GPIOI6
GPIOI7
GPIOJ0
GPIOJ1/TACH1
GPIOJ2/TACH2
GPIOJ3
GPIOJ4
GPIOJ5
GPIOJ6
GPIOJ7
GPIOK0
GPIOK1/TACH3
GPIOK2
GPIOK3
GPIOK4
GPIOK5
GPIOK6
GPIOK7
GPIOL0/PWM7
GPIOL1/PWM8
GPIOL2/PWM0
GPIOL3/PWM1
GPIOL4/PWM3
GPIOL5/PWM2
GPIOL6
GPIOL7/PWM5
GPIOM1
GPIOM3/PWM4
GPIOM4/PWM6
LAD0
LAD1
LAD2
LAD3
LFRAME#
LRESET#
PCICLK
CLKRUN#
LDRQ1#
SER_IRQ
14.318MHZ/GPIOM0
CLK32/GPIOM2
DLAD0
DLAD1
DLAD2
DLAD3
DLFRAME#
DCLKRUN#
DLDRQ1#
DSER_IRQ
BC_INT#
BC_DAT
BC_CLK
PWRGD
OUT65
TEST_PIN
CAP_LDO
VSS
DB Version 0.4
0.1U_0201_10V6K
0.1U_0201_10V6K
CE3
1
2
A23
B63
A60
A61
B65
A62
B66
A63
B67
A64
A5
B6
A6
B7
A7
B8
A8
B9
B10
A10
B11
A11
B12
A12
B60
A57
B64
B68
A9
B1
A18
A44
B34
B39
B51
A27
A26
B26
B25
A21
B22
A28
B20
A22
B21
A32
B35
B29
B28
A25
A24
B23
A19
B24
A20
A29
B31
A30
A4
B56
B19
B46
B27
C1
EP
0.1U_0201_10V6K
0.1U_0201_10V6K
CE5
1 2
12
CE6
1
2
4.7U_0603_6.3V6K
CE7
CE4
1
2
TBT_PWR_EN
PD_ACE_DET#
PROCHOT_GATE
USH_RST#
LPS_PROTECT#
PCIE_WAKE#_R
RTD3_USB_PWR_EN
SLOT2_CONFIG_0
GPIOL0
SLOT2_CONFIG_1
SLOT2_CONFIG_2
SLOT2_CONFIG_3
CLK_PCI_5048
CLKRUN#
LPC_LDRQ1#
D_CLKRUN#
D_DLDRQ1#
D_SERIRQ
RUNPWROK
RE24 1 0K_0402_5%
+CAP_LDO
2
TBT_PWR_EN <47>
PROCHOT_GATE <67>
USH_RST# <37>
LPS_PROTECT# <73>
DOCK_AC_OFF_EC <67>
AUX_EN_WOWL <44>
ME_FWP_EC <20>
GPIO_PSID_SELECT <57>
DOCK_HP_DET <34>
DOCK_MIC_DET <34>
USB_PWR_SHR_EN# <35,40>
MASK_SATA_LED# <43>
LED_SATA_DIAG_OUT# <43>
RTD3_USB_PWR_EN < 46>
SLOT2_CONFIG_0 <33>
WLAN_DISBL# <31>
SLOT2_CONFIG_1 <33>
SLOT2_CONFIG_2 <33>
SLOT2_CONFIG_3 <33>
DIS_BAT_PROCHOT# <67>
PLTRST_5048# <19>
CLK_PCI_5048 <20>
CLKRUN# <20,36>
IRQ_SERIRQ <20,36>
EC_32KHZ_ECE5048 <36>
D_LAD0 <41>
D_LAD1 <41>
D_LAD2 <41>
D_LAD3 <41>
D_LFRAME# <41>
D_CLKRUN# <41>
D_DLDRQ1# <41>
D_SERIRQ <41>
BC_INT#_ECE5048 <36>
BC_DAT_ECE5048 <36>
BC_CLK_ECE5048 <36>
RUNPWROK <36>
+CAP_LDO trace width 20 mils
CLK_PCI_5048
1
+3.3V_ALW
PCIE_WAKE#_R
WWAN_WAKE#
PD_ACE_DET#
PROCHOT_GATE
LPC_LDRQ1#
D_DLDRQ1#
D_SERIRQ
D_CLKRUN#
PCIE_WAKE#_R
RE275 0_0402_5%@
Stuff RE275 and no stuff RE274 keep E5 design
Stuff RE274 and no stuff RE275 to save two GPIOs on EC(PCH_PCIE_WAKE# should be output with OD)
33_0402_5%
12
RE27@EMC@
PAD~D
PAD~D
PAD~D
PAD~D
PAD~D
LID_CL_SIO#
12
SLICE_BAT_ON
RE17 1 00K_0402_5%
GPIOL0
@
T234
@
T233
@
T232
@
T231
@
T230
LPC_LAD0 <20,36>
LPC_LAD1 <20,36>
LPC_LAD2 <20,36>
LPC_LAD3 <20,36>
LPC_LFRAME# <20,36>
+3.3V_ALW
100K_0402_5%
12
RE25
.047U_0402_16V7K
12
CE8
1 2
RE26 10_0402_5%
12
RE3510K_0402_5%
12
RE3810K_0402_5%
12
12
RPE8
1
8
2
7
3
6
4 5
100K_0804_8P4R_5%
1 2
12
RE299100K_0402_5% @
12
RE312330K_0402_5%
RE313100K_0402_5% @
+3.3V_RUN
RE2740_0402_5% @
PCIE_WAKE# <33,38,46>
PCH_PCIE_WAKE# <20,36>
LID_CL# <43>
33P_0402_50V8J
12
CE9@EMC@
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size
Size
Size
Date: Sheet o f
Date: Sheet o f
5
4
3
2
Date: Sheet o f
Compal Electronics, Inc.
ECE5048
ECE5048
Document Number Rev
Document Number Rev
Document Number Rev
ECE5048
LA-C841P
LA-C841P
LA-C841P
1
35 74Tuesday, September 08, 2015
35 74Tuesday, September 08, 2015
35 74Tuesday, September 08, 2015
0.1
0.1
0.1
Vinafix.com
CLK_KBD
DAT_KBD
CLK_MSE
DAT_MSE
MSDATA
DOCK_POR_RST#
+3.3V_ALW
1U_0402_6.3V6K
12
CE30
+3.3V_ALW
CONN@
1
1
2
3
3
4
5
5
6
7
7
8
9
9
10
+3.3V_RUN
CONN@
1
1
2
3
3
4
5
5
6
7
7
8
9
9
10
100K_0402_5%
12
RE63
JTAG_RST#
100_0402_1%
12
RE65@
49.9_0402_1%
12
RE71
MSCLK
MSDATA
HOST_DEBUG_TX
LPC_LFRAME#
PCH_PLTRST#_EC
5
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
5
678
123
4 5
10K_8P4R_5%
+3.3V_ALW
RPE7
JTAG_TDI
JTAG_TMS
JTAG_CLK
JTAG_TDO
CLK_PCI_LPDEBUG <20>
12
10K_0402_5%
10K_0402_5%
12
12
RE73
RE72
MEC_XTAL1
1 2
27P_0402_50V8J
YE1
32.768KHZ_12.5PF_Q13FC135000040
CE28
10K_0402_5%
100K_0402_5%
12
12
RE74
RE75@
1 2
@
RE305 0_0402_5%
1 2
RE306 0_0402_5%@
+3.3V_ALW +3.3V_ALW_UE2
PJP15
1 2
10U_0603_6.3V6M
PAD-OPEN1x1m
12
CE21
@
T239
PAD~D
@
T238
PAD~D
@
T237
PAD~D
@
T236
PAD~D
@
T235
PAD~D
LPC_LFRAME#<20,35>
LPC_LAD0<20,35>
LPC_LAD1<20,35>
LPC_LAD2<20,35>
LPC_LAD3<20,35>
MEC_XTAL2_R
12
@
RE290
0_0402_5%
MEC_XTAL2
8/28 schematic review
27P_0402_50V8J
12
CE29
EC5048_TX <35>
UART0_TXD <21>
+3.3V_ALW
BC_DAT_ECE5048
1 2
RE36 100K_0402_5%
PBAT_SMBDAT
1 2
RE37 2.2K_0402_5%
PBAT_SMBCLK
1 2
RE43 2.2K_0402_5%
D D
+3.3V_RUN
FAN1_PWM
1 2
RE48 10K_0402_5%
RE51 10K_0402_5%
RE55 100K_0402_5%
RE56 10K_0402_5%
+5V_RUN
C C
B B
A A
FAN1_TACH
1 2
EN_INVPWR
1 2
RESET_OUT#
1 2
RPE2
1
8
2
7
3
6
4 5
4.7K_8P4R_5%
1 2
RE86 10 K_0402_5%
1 2
RE277 100K_0402_5%
RPE10
RUN_ON
1
8
CV2_ON
2
7
A_ON
3456
PCH_ALW_ON
100K_0804_8P4R_5%
1
JTAG1CONN@
@SHORT PADS~D
1
2
2
JDEG1
2 2
4 4
6 6
8 8
10 10
11
G1
12
G2
13
G3
14
G4
E-T_6700K-Y10N-00L
JLPDE1
2 2
4 4
6 6
8 8
10 10
11
G1
12
G2
13
G3
14
G4
E-T_6700K-Y10N-00L
+RTC_CELL
+3.3V_ALW_UE2
+3.3V_ALW_UE2
LPC_LFRAME#
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
4
1 2
RE32@ 0_0402_5%
0.1U_0201_10V6K
0.1U_0201_10V6K
@
CE16
CE17
1
1
2
2
trace width 20 mils
trace width 20 mils
CLK_PCI_MEC
10_0402_5%
12
RE66@EMC@
4.7P_0402_50V8C
12
RE79 CE40
240K 4700 p
130K 4700 p
33K
4.3K
1K 4700 p A00
*
4
0.1U_0201_10V6K
CE22
1
2
@EMC@
CE34
EMI depop location
4700p
4700p
3
+RTC_CELL_VBAT
0.1U_0201_10V6K
CE11
1
2
1U_0402_6.3V6K
0.1U_0201_10V6K
CE13
1
12
CE14
2
0.1U_0201_10V6K
1U_0402_6.3V6K
CE20
1
12
CE15
2
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
CE23
CE18
CE19
1
1
1
2
2
2
SML1_SMBDATA<20>
SML1_SMBCLK<20>
CLK_TP_SIO<42>
REV
X00
X01
X02
X034 700p8.2K
X04
DAT_TP_SIO<42>
PBAT_SMBDAT<57>
PBAT_SMBCLK<57>
DOCK_POR_RST#<41>
BIA_PWM_EC<30>
BC_CLK_ECE5048<35>
BC_DAT_ECE5048<35>
BC_INT#_ECE5048<35>
ACAV_IN_NB<66,67>
SIO_SLP_S5#<20,37>
BC_CLK_ECE1117<42>
BC_DAT_ECE1117<42>
BC_INT#_ECE1117<42>
SIO_EXT_SMI#<19>
IRQ_SERIRQ<20,35>
PCH_PLTRST#_EC<19>
CLK_PCI_MEC<20>
SIO_EXT_SCI#<21>
CLK_KBD
CLK_KBD<41>
DAT_KBD
DAT_KBD<41>
CLK_MSE
CLK_MSE<41>
DAT_MSE
DAT_MSE<41>
PBAT_SMBDAT
PBAT_SMBCLK
JTAG_TDI
JTAG_TDO
JTAG_CLK
JTAG_TMS
JTAG_RST#
FAN1_TACH
DOCK_POR_RST#
PS_ID<57>
FAN1_PWM
BEEP<34>
SIO_RCIN#<20>
CLK_PCI_MEC
CLKRUN#<20,35>
MEC_XTAL1
MEC_XTAL2_R
1K_0402_5%
12
RE79
4700P_0402_25V7K
12
CE40
UE2
B64
VBAT
A22
H_VTR
A58
VTR_ADC
B3
VTR
A11
VTR
A26
VTR
B35
VTR
A41
VTR
A52
VTR
A5
GPIO007/I2C1D_DATA/PS2_CLK0B/I2C3A_DATA
B6
GPIO010/I2C1D_CLK/PS2_DAT0B/I2C3A_CLK/GANG_DATA0
A37
GPIO110/PS2_CLK2/GPTP-IN6
B40
GPIO111/PS2_DAT2/GPTP-OUT6
A38
GPIO112/PS2_CLK1A
B41
GPIO113/PS2_DAT1A
A39
GPIO114/PS2_CLK0A
B42
GPIO115/PS2_DAT0A
B59
GPIO154/I2C1C_DATA/PS2_CLK1B/GANG_DATA5
A56
GPIO155/I2C1C_CLK/PS2_DAT1B/GANG_DATA6
A51
GPIO145/I2C1K_DATA/JTAG_TDI
B55
GPIO146/I2C1K_CLK/JTAG_TDO
B56
GPIO147/I2C1J_DATA/I2C2C_DATA/JTAG_CLK
A53
GPIO150/I2C1J_CLK/I2C2C_CLK/JTAG_TMS
B47
JTAG_RST#
B22
GPIO050/FAN_TACH1/GTACH0/GANG_START
A21
GPIO051/FAN_TACH2/GANG _MODE
B23
GPIO052/FAN_TACH3/GTACH1/GANG_ERROR
B24
GPIO053/PWM0
A23
GPIO054/PWM1/GPWM1
B25
GPIO055/PWM2
A24
GPIO056/PWM3/GPWM0
A43
GPIO123/BCM_A_CLK
B45
GPIO122/BCM_A_DAT
A42
GPIO121/BCM_A_INT#
B20
GPIO032/BCM_E_CLK
A18
GPIO031/GPTP-OUT2/BCM_E_DAT
B19
GPIO030/GPTP-IN2/BCM_E_INT#/GANG_DATA7
A20
GPIO047/LSBCM_D_CLK
B21
GPIO046/LSBCM_D_DAT/GANG_STROBE
A19
GPIO045/LSBCM_D_INT#
A6
GPIO011/nSMI
A27
GPIO061/LPCPD#
A28
SER_IRQ
B30
LRESET#
A29
PCI_CLK
B31
LFRAME#
A30
LAD0
B32
LAD1
A31
LAD2
B33
LAD3
A32
CLKRUN#
A33
GPIO100/NEC_SCI
A61
XTAL1
A62
XTAL2
10K_0402_5%
12
RE81
FWP#
10K_0402_5%
RE82@
1 2
POWER_SW_IN#
15mil
RUN_ON<36,44,61>
PANEL_IDBOARD_ID
AGND
B66
+RTC_CELL
100K_0402_5%
12
RE31
RE33 10K_0402_5%
1U_0402_6.3V6K
12
CE12
VSS
VSS_ADC
B11
B60
+3.3V_ALW
2
+3.3V_ALW+3.3V_ALW+3.3V_ALW
33K_0402_5%
12
RE300
4700P_0402_25V7K
12
CE47
3
CE10@
1 2
1U_0402_6.3V6K
1 2
GPIO120/UART_TX/V2P_COUT_HI1
GPIO124/GPTP-OUT5/UART_RX/V2P_COUT_LO1
GPIO060/KBRST/BCM_B_INT#
GPIO116/MSDATA/V2P_COUT_LO/TAP_SEL_STRAP
GPIO117/MSCLK/V2P_COUT_HI
GPIO156/LED1/GANG_DATA1
GPIO153/LED2/GANG_DATA4
GPIO001/ECSPI_CS1/32KHZ_OUT
GPIO125/GPTP-IN5/PECI_REQUEST#/GANG_BUSY
GPIO151/GPTP-IN4/GANG_DATA2
GPIO005/I2C1B_DATA/BCM_B_DAT
GPIO006/I2C1B_CLK/BCM_B_CLK
GPIO012/I2C1H_DATA/I2C2D_DATA
GPIO013/I2C1H_CLK/I2C2D_CLK/GANG_DATA3
GPIO130/I2C2A_DATA/BCM_C_DAT
GPIO131/I2C2A_CLK/BCM_C_CLK
GPIO141/I2C1F_DATA/I2C2B_DATA
GPIO142/I2C1F_CLK/I2C2B_CLK
VSS_RO
B54
RE68
DMN66D0LDW-7_SOT363-6
QE2A
*
*
H_VSS
B18
RUN_ON#
RE300 CE47
33K
PROCHOT_IN#/PROCHOT_IO#
EP
C1
+3.3V_RUN
RUNPWROK
5
4700p240K
4700p130K
4700p
4700p4.3K
VR_CAP
B12
4.7U_0603_6.3V6K
+VR_CAP
12
CE31
100K_0402_5%
12
6
1
POWER_SW#_MB <37,43>
GPIO021/RC_ID1
GPIO020/RC_ID2
GPIO014/GPTP-IN7/RC_ID3
GPIO025/UART_CLK
VCC_PWRGD
GPIO101/ECGP_SCLK
GPIO103/ECGP_MISO
GPIO105/ECGP_MOSI
GPIO102/BCM_C_INT#
GPIO104/SLP_S0#
GPIO106
GPIO127/A20M
GPIO157/LED0
GPIO027/GPTP-OUT1
GPIO026/GPTP-IN1
GPIO015/GPTP-OUT7
GPIO016/GPTP-IN8
GPIO017/GPTP-OUT8
GPIO107/NRESET_OUT
GPIO152/GPTP-OUT4
GPIO003/I2C1A_DATA
GPIO004/I2C1A_CLK
GPIO132/I2C1G_DATA
GPIO140/I2C1G_CLK
GPIO143/I2C1E_DATA
GPIO144/I2C1E_CLK
SYSPWR_PRES
VCI_OVRD_IN
VCI_OUT
VCI_IN0#
VCI_IN1#
VCI_IN2#
VCI_IN3#
VREF_PECI
PECI_DAT
DN1_DP1A/THERM
DP1_DN1A/VREF_T
DN2_DP2A
DP2_DN2A
DN3_DP3A
DP3_DN3A
DN4_DP4A
DP4_DN4A
THERMTRIP2#
GPIO002/THERMTRIP3#
GPIO024/THSEL_STRAP
V_ISYS0
V_ISYS1
MEC5085-LZY_DQFN132_11X11
10K_0402_5%
12
RE67
DMN66D0LDW-7_SOT363-6
34
QE2B
PANEL SIZE
12"
14"
PC15 H
PC15 P
A10
B10
B8
B27
B44
B46
B26
A25
B36
B37
B38
A34
A35
A36
A40
B43
A45
B65
nFWP
B57
B1
A55
A1
B28
B2
A8
B9
A9
B39
A44
A54
B58
A3
B4
A4
B5
B7
A7
B48
B49
A47
B50
B52
A49
B53
A50
A59
B62
BGP0
A64
A60
B67
A63
B63
B68
B51
A48
REM_DIODE1_N
B13
REM_DIODE1_P
A13
REM_DIODE2_N
B14
REM_DIODE2_P
A14
REM_DIODE3_N
A15
REM_DIODE3_P
B16
REM_DIODE4_N
A16
REM_DIODE4_P
B17
B15
VIN
A17
VSET
A12
VCP
B34
A2
B29
H_PROCHOT#_R1
A46
RE64 4.7K_0402_5%1 2
B61
A57
DOCK_PWR_SW#
PANEL_ID
BOARD_ID
mCARD_PCIE#_SATA
HOST_DEBUG_TX
RUNPWROK
EN_INVPWR
PCH_ALW_ON
MSDATA
MSCLK
PCH_RSMRST#
FWP#
IMVP_VR_ON_EC
RUN_ON_EC
CV2_ON
RESET_OUT#
VCCST_PWRGD_EC
SIO_PWRBTN#
DOCK_TNY_SMB_DAT
DOCK_TNY_SMB_CLK
A_ON
UPD_GPU_SMBDAT
UPD_GPU_SMBCLK
CHARGER_SMBDAT
CHARGER_SMBCLK
SIO_SLP_SUS#_R
POWER_SW_IN#
DOCK_PWR_SW#
TDOCK_PWR_BTN#_EC
POA_WAKE#
+PECI_VREF
PECI_EC_R
RE60 43_0402_5%
VSET_5085
THERMATRIP2#
THERMATRIP3#
THSEL_STRAP
RE288 100_0402_5%1 2
I_SYS_R
10K_0402_5%
12
RE317@
+RTC_CELL
12
12
1 2
CE24 22 00P_0402_50V7K1 2
1 2
CE26 22 00P_0402_50V7K
CE48 10 0P_0402_50V8J1 2
CE27 22 00P_0402_50V7K1 2
THERMATRIP3# <51>
RE316 0_0402_5%
100P_0402_50V8J
CE35@
1 2
100P_0402_50V8J
12
CE46@
100P_0402_50V8J
@
CE39
1 2
2
100K_0402_5%
RE62
1 2
RE42 10K_0402_5%
1U_0402_6.3V6K
CE45
T131 @PAD~D
LAN_WAKE# <20,31>
PCH_PCIE_WAKE# <20,35>
RUNPWROK <35>
EN_INVPWR <30>
SIO_SLP_S4# <11,20,37,59,71>
SIO_SLP_LAN# <20,44>
PCH_ALW_ON <44>
SIO_SLP_S3# <11,20,37,46,61,62>
PCH_DPWROK <20>
PCH_RSMRST# <7>
BREATH_LED# <41,43>
BAT1_LED# <43>
BAT2_LED# <43>
8/11
SIO_SLP_A# <20,37>
EC_32KHZ_ECE5048 < 35>
ME_SUS_PWR_ACK <20>
CV2_ON <37>
RESET_OUT# <7,20>
12
@
RE3080_0402_5%
AC_PRESENT <20>
SIO_PWRBTN# <7,20>
DOCK_TNY_SMB_DAT <41,49>
DOCK_TNY_SMB_CLK <41,49>
A_ON <44>
SIO_EXT_WAKE# <21>
SUSACK# <20>
ENVDD_PCH <16,30>
UPD_GPU_SMBDAT <49,51>
UPD_GPU_SMBCLK <49,51>
CHARGER_SMBDAT <66>
CHARGER_SMBCLK <66>
PBAT_PRES# <57,66,67>
USH_SMBDAT <37>
USH_SMBCLK <37>
12
EC_FPM_EN <37>
ACAV_IN <66,67>
ALWON <58>
POA_WAKE# <37>
I_ADP <66>
12
C
2
B
E
QE3
3 1
LMBT3904WT1G SC70-3
LMBT3904WT1G SC70-3
31
E
B
2
C
QE7
C
2
B
E
QE6
3 1
LMBT3904WT1G SC70-3
2
CE44@
1 2
1U_0402_6.3V6K
DOCK_PWR_BTN# < 41>
VCCST_PWRGD <7>
Reserve
RC76 43K_0402_1%1 2
1 2
RE57 1K_0402_5%
100K_0402_5%
RE58
H_PECI <7,16>
H_PROCHOT# <7,51,63,66,67>
I_BATT <66>
I_SYS <63,66>
REM_DIODE1_P
REM_DIODE1_N
100P_0402_50V8J
12
C
CE37@
E
3 1
LMBT3904WT1G SC70-3
100P_0402_50V8J
12
CE51@
IMVP_VR_ON_EC
SIO_SLP_S3#
RUN_ON_EC
8/21 CRB1.0 change to 0603 1/10W
10/30 move to EC side
RE59 0_0402_5%@
0.1U_0201_10V6K
CE25
12
+1.0VS_VCCIO
2
B
QE5
LMBT3904WT1G SC70-3
31
E
QE9
TB@
B
2
C
1
2
UE3
TC7SH08FU_SSOP5~D
UE5
TC7SH08FU_SSOP5~D
SIO_SLP_SUS# <11,20,44,60,62>
+3.3V_ALW2
1 2
REM_DIODE3_P
REM_DIODE3_N
SIO_SLP_S3#
2
G
1 3
D
S
QE11
L2N7002WT1G_SC-70-3
1 2
RE90 0_0402_5%@
REM_DIODE2_P
REM_DIODE2_N
REM_DIODE4_P
REM_DIODE4_N
@
+3.3V_ALW
0.1U_0402_25V6K
5
P
B
O
A
G
3
1 2
@
@
+3.3V_ALW
5
1
P
B
2
A
G
3
+1.0VS_VCCIO
REM_DIODE3_P <51>
REM_DIODE3_N <51>
0.1U_0402_25V6
12
CE38
12
RE3070_0402_5%
@
CE53
1 2
4
RE2800_0402_5%
12
RE2920_0402_5%
@
CE52
1 2
0.1U_0402_25V6K
4
O
TDOCK_PWR_BTN#_EC TDOCK_PWR_BTN#
THERMATRIP3#
CHARGER_SMBDAT
CHARGER_SMBCLK
AC_PRESENT
1 2
RE70 2.2K_0402_5%
H_THERMTRIP#<7,14,15,16>
VSET_5085
1.58K_0402_1%
12
RE77
IMVP_VR_ON
IMVP_VR_ON <63>
DOCK_TNY_SMB_DAT
DOCK_TNY_SMB_CLK
UPD_GPU_SMBDAT
UPD_GPU_SMBCLK
BC_DAT_ECE1117
POA_WAKE#
TDOCK_PWR_BTN#_EC
DMN65D8LW-7_SOT323-3
RE301 10K_0402_5%
RE302 2.2K_0402_5%
RE303 2.2K_0402_5%
RE309 10K_0402_5%
PCH_RSMRST#
JFAN1
ACES_50271-0040N-001
CONN@
THSEL_STRAP
1
NC
2
A
3
GND
74AUP1G07GW_TSSOP5
RUN_ON <36,44,61>
2.2K_0804_8P4R_5%
100K_0804_8P4R_5%
+3.3V_ALW
2
1 3
D
QE10
1 2
1 2
1 2
1 2
1
1
2
2
3
3
4
4
5
GND1
6
GND2
+3.3V_ALW
2
B
E
RE78 1K_0402_5%
DELL CONFIDENTIAL/PROPRIETARY
Title
Title
Title
Size
Document Number Re v
Size
Document Number Re v
Size
Document Number Re v
Date: Shee t o f
Date: Shee t o f
Date: Shee t o f
1
+3.3V_ALW
UE4
5
VCC
VCCST_PWRGDSIO_SLP_S3#
4
Y
+3.3V_ALW
RPE3
1
8
2
7
3
6
4 5
+3.3V_ALW
RPE5
1
8
2
7
3
6
4 5
100K_0402_5%
12
RE310
G
S
+3.3V_ALW
1 2
RE8810K_0402_5%
FAN1_PWM
FAN1_TACH
RB751S40T1G_SOD523-2
10U_0603_6.3V6M
12
CE32
2 1
8.2K_0402_5%
12
RE69
THERMATRIP2#
LMBT3904WT1G SC70-3
0.1U_0402_25V6
C
QE4
CE36
12
3 1
1 2
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
MEC5085
MEC5085
MEC5085
LA-C841P
LA-C841P
LA-C841P
1
+RTC_CELL
TDOCK_PWR_BTN# <49>
+5V_RUN
@
DE1
36 74Tuesday, September 08, 2015
36 74Tuesday, September 08, 2015
36 74Tuesday, September 08, 2015
0.1
0.1
0.1
Vinafix.com
5
4
3
2
1
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
0.1U_0201_10V6K
1
@
CZ10
2
E-T_6705K-Y26N-00L
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
GND
GND
JUSH1
CONN@
+3.3V_ALW+3.3V_RUN+5V_RUN
0.1U_0201_10V6K
1
@
CZ11
2
0.1U_0201_10V6K
1
@
CZ12
2
@
RZ85 0_0402_5%
+PWR_SRC
+3.3V_ALW2
TPM_PIRQ#
TPM_PIRQ#<19>
PLTRST_TPM#<19>
+3.3V_M_TPM+3.3V_M
+3.3V_M_TPM+3.3V_ALW_PCH
7/18 vender suggest.
+3.3V_RUN
@
10K_0402_5%
1 2
PCH_SPI_D1_2_R
PCH_SPI_D0_2_R
PCH_SPI_CLK_2_R
PCH_SPI_CS#2_R
12
RZ108
TPM_LPM#
TPM_GPIO4
10K_0402_5%
RZ62
+3.3V_M_TPM
+3.3V_RUN
UZ12
29
GPIO0/SDA/XOR_OUT
30
GPIO1/SCL
3
GPIO2/GPX
6
GPIO3/BADD
24
LAD0/MISO
21
LAD1/MOSI
18
LAD2/SPI_IRQ#
15
LAD3
19
LCKL/SCLK
20
LFRAME#/SCS#
17
LRESET#/SPI_RST#/SRESET#
27
SERIRQ
13
CLKRUN#/GPIO4/SINT#
28
LPCPD#
4
PP
5
TEST
NPCT650JAAYX_QFN32_5X5
1 2
@
RZ88 0_0402_5%
1 2
RZ89 0_0402_5%
1
VSB
+UZ12_TPM
8
VDD
14
VDD
22
VDD
2
NC
7
NC
10
NC
11
NC
25
NC
26
NC
31
NC
9
GND
16
GND
23
GND
32
GND
33
PGND
12
Reserved
D D
SIO_SLP_S0#<11,20,37>
C C
PCH_SPI_D1_R1<19>
PCH_SPI_D0_R1<19>
PCH_SPI_CLK_R1<19>
PCH_SPI_CS#2<19>
+3.3V_M_TPM
RZ72 0_0603_5%@
1 2
PJP11
1 2
PAD-OPEN1x1m
1 2
RZ69 10K_0402_5%
1 2
RZ112 0_0402_5%
RZ58 33_0402_5%
1 2
RZ59 33_0402_5%
1 2
RZ60 33_0402_5%
1 2
RZ61 0_0402_5%@
1 2
+3.3V_ALW
1 2
RZ8 2.2K_0402_5%@
1 2
RZ9 2.2K_0402_5%@
1 2
RZ10 1M_0402_5%
+UZ12_TPM
0.1U_0201_10V6K
1
CZ112
2
+3.3V_M_TPM
0.1U_0201_10V6K
1
1
CZ74
2
2
0.1U_0201_10V6K
1
CZ75
2
USH_SMBCLK
USH_SMBDAT
USH_PWR_STATE#
1
2
10U_0603_6.3V6M
CZ76
+3.3V_ALW
0.1U_0201_10V6K
CZ71
+3.3V_ALW
@
+5V_ALW2
+5V_ALW
+3.3V_RUN
+5V_RUN
PCH_PLTRST#_AND<19,32,33,38>
USH_RST#<35>
10U_0603_6.3V6M
1
CZ72
2
RZ86 0_0402_5%
RZ114 0_0402_5%@
RZ115 0_0402_5%@
USH_DET#<35>
PCH_PLTRST#_AND
.047U_0402_16V7K
EMC@
12
CZ68
For ESD solution
RZ84 0_0402_5%@
1 2
1 2
1 2
@
RZ87 0_0402_5%
1 2
1 2
BCM5882_ALERT#<35>
+5V_ALW2_R
USH_RST#_R
1 2
DZ7
2 1
RB751S40T1G_SOD523-2
+PWR_SRC_R
+3.3V_ALW2_R
CV2_ON<36>
POA_WAKE#<36>
EC_FPM_EN<36>
USB20_N10<17>
USB20_P10<17>
USH_SMBCLK<36>
USH_SMBDAT<36>
USH_PWR_STATE#<35>
CONTACTLESS_DET#<16>
USH_DET#_R
+3.3V_ALW2+5V_ALW2
0.1U_0201_10V6K
0.1U_0201_10V6K
1
1
2
@
@
CZ24
CZ94
2
+3.3V_M_TPM
12
@
RZ109
B B
PCH_SPI_CS#2_R
PCH_SPI_CS#2_R
A A
100K_0402_5%
TPM_LPM#
1
D
@
2
QZ8
G
L2N7002WT1G_SC-70-3
S
3
1 2
RZ113 100_0402_5%
+3.3V_M_TPM
G
2
1 3
LP2301ALT1G_SOT23-3
S
QZ9
D
12
RZ111
10K_0402_5%
TPM_LPM#
1 2
@
RZ110 0_0402_5%
TPM_GPIO4PCH_SPI_CS#2_R
PCH_SPI_CLK_2_R
33_0402_5%
@EMC@
RZ63
0.1U_0402_25V6
1 2
@EMC@
12
CZ77
Check ME about wire to board PN
+3.3V_ALW_PCH
SIO_SLP_S3#<11,20,36,46,61,62>
+3.3V_ALW
SIO_SLP_S5#<20,36>
SIO_SLP_S4#<11,20,36,59,71>
SIO_SLP_A#<20,36>
+3.3V_ALW
PCH_RTCRST#<20>
POWER_SW#_MB<36,43>
SYS_RESET#<17,20>
SIO_SLP_S0#<11,20,37>
Intel Management Engine Test Suite
JAPS1
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
GND
20
GND
CONN@
ACES_50506-01841-P01
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size
Size
Size
Date: Sheet o f
Date: Sheet o f
5
4
3
2
Date: Sheet o f
Compal Electronics, Inc.
USH & TPM
USH & TPM
Document Number Rev
Document Number Rev
Document Number Rev
USH & TPM
LA-C841P
LA-C841P
LA-C841P
1
37 74Tuesday, September 08, 2015
37 74Tuesday, September 08, 2015
37 74Tuesday, September 08, 2015
0.1
0.1
0.1
Vinafix.com
5
+3.3V_HDD_M2
0.1U_0201_10V6K
0.1U_0201_10V6K
@
CN41
1
D D
+3.3V_HDD_M2
1 2
RN37@ 10K_0402_5%
C C
1
2
8/5 CKLT0.9
M2_DEVSLP
2
22U_0603_6.3V6M
CN42
12
CZ60
4
22U_0603_6.3V6M
12
CZ61
PCIE_PRX_DTX_N12<16>
PCIE_PRX_DTX_P12<16>
PCIE_PTX_DRX_N12<16>
PCIE_PTX_DRX_P12<16>
PCIE_PRX_DTX_N11<16>
PCIE_PRX_DTX_P11<16>
PCIE_PTX_DRX_N11<16>
PCIE_PTX_DRX_P11<16>
PCIE_PRX_DTX_N10<16>
PCIE_PRX_DTX_P10<16>
PCIE_PTX_DRX_N10<16>
PCIE_PTX_DRX_P10<16>
PCIE_PRX_DTX_P9<16>
PCIE_PRX_DTX_N9<16>
PCIE_PTX_DRX_N9<16>
PCIE_PTX_DRX_P9<16>
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
CN310.22U_0402_10V6K
CN320.22U_0402_10V6K
CN220.22U_0402_10V6K
CN210.22U_0402_10V6K
CN560.22U_0402_10V6K
CN550.22U_0402_10V6K
CN520.22U_0402_10V6K
CN510.22U_0402_10V6K
CLK_PCIE_N9<18>
CLK_PCIE_P9<18>
PCIE_PTX_C_DRX_N12
PCIE_PTX_C_DRX_P12
PCIE_PTX_C_DRX_N11
PCIE_PTX_C_DRX_P11
PCIE_PTX_C_DRX_N10
PCIE_PTX_C_DRX_P10
PCIE_PTX_C_DRX_N9
PCIE_PTX_C_DRX_P9
3
NGFF slot C Key M
JNGFF3
1
GND
3
GND
5
PERn3
7
PERp3
9
GND
11
PETn3
13
PETp3
15
GND
17
PERn2
19
PERp2
21
GND
23
PETn2
25
PETp2
27
GND
29
PERn1
31
PERp1
33
GND
35
PETn1
37
PETp1
39
GND
41
PERn0/SATA-B+
43
PERp0/SATA-B-
45
GND
47
PETn0/SATA-A-
49
PETp0/SATA-A+
51
GND
53
REFCLKN
55
REFCLKP
57
GND
3P3VAUX
3P3VAUX
DAS/DSS#
3P3VAUX
3P3VAUX
3P3VAUX
3P3VAUX
DEVSLP
PERST#
CLKREQ#
PEWake#
2
+3.3V_RUN
1 2
@
RZ100 0_0402_5%
+3.3V_HDD_M2
1 2
@
RZ101 0_0402_5%
+3.3V_HDD_M2
PJP54
@
2
4
6
NC
8
NC
10
12
14
16
18
20
NC
22
NC
24
NC
26
NC
28
NC
30
NC
32
NC
34
NC
36
NC
38
40
NC
42
NC
44
NC
46
NC
48
NC
50
52
54
56
NC
58
NC
NVME_LED#
PCIE_WAKE#
@
1 2
PAD-OPEN1x2m
1 2
RZ118 0_0402_5%
M2_DEVSLP <20>
PCH_PLTRST#_AND <19,32,33,37>
CLKREQ_PCIE#9 <18>
PCIE_WAKE# <33,35,46>
+3.3V_RUN
PCH_SATA_LED# <16,43>
1
HDD_PWR_P <44,45>
HDD_PWR_N <44,45>
59
NC
IFDET_SATA#_PCIE<16>
B B
A A
61
PEDET(NC-PCIE/GND-SATA)
63
GND
65
GND
67
GND
BELLW_SD-80159-4221
CONN@
SUSCLK(32kHz)
3P3VAUX
3P3VAUX
3P3VAUX
GND1
GND2
60
62
64
66
68
69
SUSCLK_R
1 2
@
RN99 0_0402_5%
SUSCLK <20,33>
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size
Size
Size
Date: Sheet o f
Date: Sheet o f
5
4
3
2
Date: Sheet o f
Compal Electronics, Inc.
HDD CONN
HDD CONN
Document Number Rev
Document Number Rev
Document Number Rev
HDD CONN
LA-C841P
LA-C841P
LA-C841P
1
38 74Tuesday, September 08, 2015
38 74Tuesday, September 08, 2015
38 74Tuesday, September 08, 2015
0.1
0.1
0.1
Vinafix.com
5
D D
C C
4
3
2
1
+USB_REAR_PWR
DI6
USB3_PRX_DTX_P4<20>
USB3_PRX_DTX_N4<20>
B B
USB3_PTX_C_DRX_P4
USB3_PTX_DRX_P4<20>
USB3_PTX_DRX_N4<20>
A A
12
CI28 0.1U_0402_25V6
CI27 0.1U_0402_25V6
USB3_PTX_C_DRX_N4
12
1 2
@
RI23 0_0402_5%
1 2
@
RI24 0_0402_5%
1 2
@
RI25 0_0402_5%
1 2
@
RI26 0_0402_5%
USB3_PRX_L_DTX_P4
USB3_PRX_L_DTX_N4
USB3_PTX_L_DRX_P4
USB3_PTX_L_DRX_N4
USB20_N3<17>
USB20_P3<17>
USB20_N3
USB20_P3 USB20_P3_R
EMC@
1
2
4
5
3
8
L05ESDL5V0NA-4_SLP2510P8-10-9
MCM1012B900F06BP_4P
1
1
4
4
EMC@
8/19 for layout routing change
USB3_PRX_L_DTX_N4USB3_PRX_L_DTX_N4
9
USB3_PRX_L_DTX_P4USB3_PRX_L_DTX_P4
8
USB3_PTX_L_DRX_N4USB3_PTX_L_DRX_N4
7
USB3_PTX_L_DRX_P4USB3_PTX_L_DRX_P4
6
USB20_N3_R
2
2
3
3
LI4
+5V_ALW
12
100U_1206_6.3V6M
0.1U_0201_10V6K
CI10
1
12
CI8
2
223
0.1U_0201_10V6K
10U_0603_6.3V6M
@
CI12
CI11
1
2
3
1
1
USB_PWR_EN2#<35>
USB20_N3_R
USB20_P3_R
USB3_PRX_L_DTX_N4
USB3_PRX_L_DTX_P4
AZC199-02SPR7G_SOT23-3
USB3_PTX_L_DRX_N4
USB3_PTX_L_DRX_P4
EMC@
DI3
JUSB2
1
VBUS
2
D-
3
D+
4
GND
5
SSRX-
6
SSRX+
7
GND
8
SSTX-
9
SSTX+
ACON_TARAV-9R1U91
UI2
OUT
5
IN
GND
4
EN
OCB
SY6288D20AAC_SOT23-5
9/3 change to SOT23 package
CONN@
GND
GND
GND
GND
+USB_REAR_PWR
1
2
3
USB_OC2# <17>
10
11
12
13
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size
Size
Size
Date: Sheet of
Date: Sheet o f
5
4
3
2
Date: Sheet o f
Compal Electronics, Inc.
USB SW
USB SW
Document Number Re v
Document Number Rev
Document Number Rev
USB SW
LA-C841P
LA-C841P
LA-C841P
1
39 74Tuesday, September 08, 2015
39 74Tuesday, September 08, 2015
39 74Tuesday, September 08, 2015
0.1
0.1
0.1
Vinafix.com
5
USB3_PTX_DRX_P3
CI4 0.1U_0402_25V6
USB3_PTX_DRX_N3
CI5 0.1U_0402_25V6
USB3_PRX_DTX_P3
USB3_PRX_DTX_N3
12
12
USB3_PTX_C_DRX_P3
USB3_PTX_C_DRX_N3
USB3_PRX_DTX_P3<20>
USB3_PRX_DTX_N3<20>
D D
USB3_PTX_DRX_P3<20>
USB3_PTX_DRX_N3<20>
1 2
@
RI19 0_0402_5%
1 2
@
RI20 0_0402_5%
1 2
@
RI21 0_0402_5%
1 2
@
RI22 0_0402_5%
4
USB3_PRX_L_DTX_P3
USB3_PRX_L_DTX_N3
USB3_PTX_L_DRX_P3
USB3_PTX_L_DRX_N3
3
DI1
USB3_PRX_L_DTX_N3 USB3_PRX_L_DTX_N3
USB3_PRX_L_DTX_P3 USB3_PRX_L_DTX_P3
USB3_PTX_L_DRX_N3 USB3_PTX_L_DRX_N3
USB3_PTX_L_DRX_P3 USB3_PTX_L_DRX_P3
USB20_P2<17>
USB20_N2<17>
USB20_P2
USB20_N2
EMC@
1
2
4
5
3
8
L05ESDL5V0NA-4_SLP2510P8-10-9
MCM1012B900F06BP_4P
1
1
4
4
EMC@
9
8
7
6
2
2
3
3
LI3
USB20_P2_R
USB20_N2_R
+USB_LEFT_PWR
100U_1206_6.3V6M
12
CI1
2
JUSB1
CONN@
1
USB20_N2_R
223
1
1
USB20_P2_R
USB3_PRX_L_DTX_N3
USB3_PRX_L_DTX_P3
AZC199-02SPR7G_SOT23-3
USB3_PTX_L_DRX_N3
EMC@
USB3_PTX_L_DRX_P3
DI2
0.1U_0201_10V6K
CI3
1
3
2
VBUS
2
D-
3
D+
4
GND
5
SSRX-
6
SSRX+
7
GND
8
SSTX-
9
SSTX+
ACON_TARAV-9R1U91
GND
GND
GND
GND
1
10
11
12
13
8/19 for layout routing change
+5V_ALW
0.1U_0201_10V6K
10U_0603_6.3V6M
@
1
12
CI6
2
C C
LI7
+5V_USB_CHG_PWR
2
2
3
3
100U_1206_6.3V6M
1
CI32
2
USB20_N1_R
USB20_P1_R
+5V_ALW
USB3_PRX_L_DTX_P1
USB3_PRX_L_DTX_N1
USB3_PTX_L_DRX_P1
USB3_PTX_L_DRX_N1
UI3
1
IN
2
DM_OUT
3
DP_OUT
13
FAULT#
4
ILIM_SEL
5
EN
6
CTL1
7
CTL2
8
CTL3
PI5USB2544ZHEX_TQFN16_3X3
DP_IN
DM_IN
ILIM_LO
ILIM_HI
GNDP
OUT
GND
NC
+5V_USB_CHG_PWR
12
SW_USB20_P1
10
SW_USB20_N1
11
15
16
RI14
9
14
17
DI4
USB3_PRX_L_DTX_N1 USB3_PRX_L_DTX_N1
USB3_PRX_L_DTX_P1
USB3_PTX_L_DRX_N1
USB3_PTX_L_DRX_P1
12
22.1K_0402_1%
EMC@
1
2
4
5
3
8
L05ESDL5V0NA-4_SLP2510P8-10-9
9
8
7
6
SW_USB20_N1
SW_USB20_P1
USB3_PRX_L_DTX_P1
USB3_PTX_L_DRX_N1
USB3_PTX_L_DRX_P1
1
4
MCM1012B900F06BP_4P
1
4
EMC@
USB3_PRX_DTX_P1<20>
USB3_PRX_DTX_N1<20>
USB3_PTX_C_DRX_P1
B B
+5V_ALW
1
2
CI19 near UI3.1
+5V_ALW
USB3_PTX_DRX_P1<20>
USB3_PTX_DRX_N1<20>
10U_0402_6.3V6M
0.1U_0201_10V6K
@
CI19
1
CI31
2
ILIM_SEL
RI13
12
10K_0402_5%
12
CI16 0.1U_0402_25V6
USB3_PTX_C_DRX_N1
12
CI13 0.1U_0402_25V6
USB20_N1<17>
USB20_P1<17>
USB_OC0#<17>
USB_PWR_SHR_VBUS_EN<35>
USB_PWR_SHR_EN#<35>
1 2
@
RI15 0_0402_5%
1 2
@
RI16 0_0402_5%
1 2
@
RI17 0_0402_5%
1 2
@
RI18 0_0402_5%
ILIM_SEL
USB_PWR_EN1#<35>
CI7
0.1U_0201_10V6K
CI17
1
2
AZC199-02SPR7G_SOT23-3
3
EMC@
223
DI5
1
1
UI1
5
IN
4
EN
SY6288D20AAC_SOT23-5
USB20_N1_R
USB20_P1_R
USB3_PRX_L_DTX_N1
USB3_PRX_L_DTX_P1
USB3_PTX_L_DRX_N1
USB3_PTX_L_DRX_P1
+USB_LEFT_PWR
1
OUT
2
GND
3
OCB
9/3 change to SOT23 package
JUSB3
1
VBUS
2
D-
3
D+
4
GND
5
SSRX-
6
SSRX+
7
GND
8
SSTX-
9
SSTX+
ACON_TARAV-9R1U91
USB_OC1# <17>
CONN@
10
GND
11
GND
12
GND
13
GND
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size
Size
Size
Date: Sheet o f
Date: Sheet o f
5
4
3
2
Date: Sheet o f
Compal Electronics, Inc.
USB3.0
USB3.0
Document Number Rev
Document Number Rev
Document Number Rev
USB3.0
LA-C841P
LA-C841P
LA-C841P
1
40 74Tuesday, September 08, 2015
40 74Tuesday, September 08, 2015
40 74Tuesday, September 08, 2015
0.1
0.1
0.1
Vinafix.com
5
4
3
2
1
JDOCK1
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
21
23
23
25
25
27
27
29
29
31
31
33
33
35
35
37
37
39
39
41
41
43
43
45
45
47
47
49
49
51
51
53
53
55
55
57
57
59
59
61
61
63
63
65
65
67
67
69
69
71
71
73
73
75
75
77
77
79
79
81
81
83
83
85
85
87
87
89
89
91
91
93
93
95
95
97
97
99
99
101
101
103
103
105
105
107
107
109
109
111
111
113
113
115
115
117
117
119
119
121
121
123
123
125
125
127
127
129
129
131
131
133
133
135
135
137
137
139
139
141
141
143
143
145
GND1
146
PWR1
147
PWR1
148
PWR1
153
Shield_G
154
Shield_G
155
Shield_G
156
Shield_G
157
Shield_G
158
Shield_G
FOX_QL01723-D26771-8H~D
PWR2
PWR2
PWR2
GND2
Shield_G
Shield_G
Shield_G
Shield_G
Shield_G
Shield_G
DOCK_AC_OFF
2
2
4
4
6
6
8
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
149
150
151
152
159
160
161
162
163
164
DOCK_DPB_P0_R
DOCK_DPB_N0_R
DOCK_DPB_P1_R
DOCK_DPB_N1_R
DOCK_DPB_P2_R
DOCK_DPB_N2_R
DOCK_DPB_P3_R
DOCK_DPB_N3_R
DOCK_DPB_HPD
SATA_PRX_C_DTX_P3
SATA_PRX_C_DTX_N3
SATA_PTX_C_DRX_P3
SATA_PTX_C_DRX_N3
DOCK_DET_R#
0.1U_0603_50V7K
C318
12
DOCK_AC_OFF <67>
SW_LAN1_100_ORG# <31>
DOCK_DPB_CADET <27>DOCK_DPA_CADET<26>
R260 33_040 2_5%EMC@
1 2
1 2
R261 33_040 2_5%EMC@
R254 33_040 2_5%EMC@
1 2
R256 33_040 2_5%EMC@
1 2
1 2
R262 33_040 2_5%EMC@
R264 33_040 2_5%EMC@
1 2
R258 33_040 2_5%EMC@
1 2
R267 33_040 2_5%EMC@
1 2
DOCK_DPB_AUXP <27>
DOCK_DPB_AUXN <27>
ACAV_DOCK_SRC# <67>
SW2_VGA2_SDA <29>
SW2_VGA2_SCL <29>
12
12
C312 0 .01U_0402_50V7K
C313 0 .01U_0402_50V7K
1 2
1 2
C314 0 .01U_0402_50V7K
C315 0 .01U_0402_50V7K
USB20_P7 <17>
USB20_N7 <17>
USB20_P5 <17>
USB20_N5 <17>
CLK_KBD <36>
DAT_KBD <36>
USB3_PRX_DTX_N6 <20>
USB3_PRX_DTX_P6 <20>
USB3_PTX_DRX_N6 <20>
USB3_PTX_DRX_P6 <20>
BREATH_LED# < 36,43>
SW_LAN1_ACTLED_YEL# <31>
SW_LAN1_MDIP0 <31>
SW_LAN1_MDIN0 <31>
SW_LAN1_MDIP1 <31>
SW_LAN1_MDIN1 <31>
+LOM_VCT
SW_LAN1_MDIP2 <31>
SW_LAN1_MDIN2 <31>
SW_LAN1_MDIP3 <31>
SW_LAN1_MDIN3 <31>
DOCK_DCIN_IS+ <66>
DOCK_DCIN_IS- <66>
DOCK_POR_RST# <36>
10_0402_5%
12
EMC@
R41
DOCK_DPB_P0_C
DOCK_DPB_N0_C
DOCK_DPB_P1_C
DOCK_DPB_N1_C
DOCK_DPB_P2_C
DOCK_DPB_N2_C
DOCK_DPB_P3_C
DOCK_DPB_N3_C
EMI solution for E-Docking USB
D19
1 2
RB751S40T1G_SOD523-2
10_0402_5%
12
EMC@
R6
C294 0.1U_0402_25V6
C296 0.1U_0402_25V6
C298 0.1U_0402_25V6
C303 0.1U_0402_25V6
C305 0.1U_0402_25V6
C307 0.1U_0402_25V6
C308 0.1U_0402_25V6
C309 0.1U_0402_25V6
SATA_PRX_DTX_P3 <16>
SATA_PRX_DTX_N3 <16>
SATA_PTX_DRX_P3 <16>
SATA_PTX_DRX_N3 <16>
+LOM_VCT
1U_0402_6.3V6K
@
12
C316
CLK_PCI_DOCKDAI_12MHZ# DAI_BCLK#
10_0402_5%
12
R273
EMC@
12
12
12
12
12
12
12
12
DOCK_DET#
DOCK_DPB_P0 <27>
DOCK_DPB_N0 <27>
DOCK_DPB_P1 <27>
DOCK_DPB_N1 <27>
DOCK_DPB_P2 <27>
DOCK_DPB_N2 <27>
DOCK_DPB_P3 <27>
DOCK_DPB_N3 <27>
0.033U_0402_16V7K
@EMC@
12
C311
Close to DOCK
Its for Enhance ESD on dock
iss ue.
DOCK_DPB_HPD
PS8348B HPD Internal PD at 150k ohm
+3.3V_ALW2
1 2
R2721 00K_0402_5%
100K_0402_5%
12
@
R271
SLICE_BAT_PRES#
4.7U_0805_25V6-K
0.1U_0603_50V7K
@
12
C33
DOCK_DET_1
DOCK_DPA_P0_R
DOCK_DPA_N0_R
DOCK_DPA_P1_R
DOCK_DPA_N1_R
DOCK_DPA_P2_R
DOCK_DPA_N2_R
DOCK_DPA_P3_R
DOCK_DPA_N3_R
2
3
C317
1
L30ESD24VC3-2_SOT23-3
D20
@EMC@
SW_LAN1_10_GRN#<31>
C302 0.1U_0402_25V6
DOCK_DPA_P0<26>
DOCK_DPA_N0<26>
D D
C C
DOCK_DPA_P1<26>
DOCK_DPA_N1<26>
DOCK_DPA_P2<26>
DOCK_DPA_N2<26>
DOCK_DPA_P3<26>
DOCK_DPA_N3<26>
DOCK_DPA_HPD
100K_0402_5%
12
@
R268
12
12
C295 0.1U_0402_25V6
C297 0.1U_0402_25V6
12
C299 0.1U_0402_25V6
12
12
C304 0.1U_0402_25V6
C306 0.1U_0402_25V6
12
C300 0.1U_0402_25V6
12
C301 0.1U_0402_25V6
12
DOCK_DPA_HPD<26> DOCK_DPB_HPD <27>
Close to DOCK
Its for Enhance ESD on
dock issue.
PS8349B HPD Internal PD at 150k ohm
B B
DOCK_DPA_P0_C
DOCK_DPA_N0_C
DOCK_DPA_P1_C
DOCK_DPA_N1_C
DOCK_DPA_P2_C
DOCK_DPA_N2_C
DOCK_DPA_P3_C
DOCK_DPA_N3_C
R259 33_0402_5%EMC@
1 2
1 2
R252 33_0402_5%EMC@
R253 33_0402_5%EMC@
1 2
R255 33_0402_5%EMC@
1 2
1 2
R257 33_0402_5%EMC@
R263 33_0402_5%EMC@
1 2
R265 33_0402_5%EMC@
1 2
R266 33_0402_5%EMC@
1 2
DOCK_DPA_AUXP<26>
DOCK_DPA_AUXN<26>
0.033U_0402_16V7K
12
C310
+DOCK_PWR_BAR +DOCK_PWR_BAR
DOCK_DPA_HPD
+NBDOCK_DC_IN_SS
@EMC@
SW2_VGA2_BLUE<29>
SW2_VGA2_RED<29>
SW2_VGA2_GREEN<29>
SW2_VGA2_HSYNC<29>
SW2_VGA2_VSYNC<29>
CLK_MSE<36>
DAT_MSE<36>
DAI_BCLK#<34>
DAI_LRCK#<34>
DAI_DI<34>
DAI_DO#<34>
DAI_12MHZ#<34>
D_LAD0<35>
D_LAD1<35>
D_LAD2<35>
D_LAD3<35>
D_LFRAME#<35>
D_CLKRUN#<35>
D_SERIRQ<35>
D_DLDRQ1#<35>
CLK_PCI_DOCK<20>
DOCK_TNY_SMB_CLK<36,49>
DOCK_TNY_SMB_DAT<36,49>
DOCK_TNY_SMBUS_ALRT#<35,57>
SLICE_BAT_PRES#<35,57,67> DOCK_DET# <35,67 >
DOCK_PSID<57>
DOCK_PWR_BTN#<36>
12
4.7P_0402_50V8C
12
C43
EMC@
A A
4.7P_0402_50V8C
12
C42
EMC@
4.7P_0402_50V8C
12
C319
EMC@
EMI depop location
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size
Size
Size
Date : Sheet o f
Date : Sheet o f
5
4
3
2
Date : Sheet o f
Compal Electronics, Inc.
E-Dock
E-Dock
Document Number Re v
Document Number Rev
Document Number Rev
E-Dock
LA-C841P
LA-C841P
LA-C841P
1
41 74Tuesday, September 08, 2015
41 74Tuesday, September 08, 2015
41 74Tuesday, September 08, 2015
0.1
0.1
0.1
Vinafix.com
5
D D
DAT_TP_SIO<36>
CLK_TP_SIO<3 6>
+3.3V_TP +3.3V_TP
4.7K_0402_5%
4.7K_0402_5%
12
12
RZ20
C C
I2C_1_SDA<21>
I2C_1_SCL<21>
RZ21
4
+3.3V_TP
4.7K_0402_5%
12
RZ18
EMC@
330P_0402_50V7K
12
CZ30
RZ26 0_0402_5%@
RZ29 0_0402_5%@
Reserve for future use
12
12
4.7K_0402_5%
12
RZ19
EMC@
330P_0402_50V7K
12
CZ31
I2C_1_SDA_R
I2C_1_SCL_R
@
RZ22 0_0402_5%
@
RZ23 0_0402_5%
12
12
10K_0402_5%
12
RZ116
DAT_TP_SIO_R
CLK_TP_SIO_R
10K_0402_5%
12
RZ117
3
+3.3V_RUN +3.3V_TP
PJP16
1 2
PAD-OPEN1x1m
KB_DET#<21>
+5V_RUN
+3.3V_ALW
BC_INT#_ECE1117<36>
BC_DAT_ECE1117<36>
BC_CLK_ECE1117<36>
+3.3V_TP
TOUCHPAD_INTR#<19>
Reserve for future use
2
DAT_TP_SIO_R
CLK_TP_SIO_R
I2C_1_SDA_R
I2C_1_SCL_R
JKBTP1
CONN@
22
GND2
21
GND1
20
20
19
19
18
18
17
17
16
16
15
15
14
14
13
13
12
12
11
11
10
10
9
9
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
ACES_50506-02041-P01
1
+5V_RUN+3.3V_ALW+3.3V_TP
0.1U_0201_10V6K
0.1U_0201_10V6K
1
@
CZ27
2
0.1U_0201_10V6K
1
1
@
@
CZ28
CZ29
2
2
eDP Cable W CAM@
Part Number
DC02C007600 H-CONN SET 13D MB-EDP-CAMERA
eDP TS Cable W CAM@
Part Number
DC02C007C00 H-CONN SET 13D MB-EDP-CAMERA-TS
eDP Cable W/O CAM@
Part Number
DC02C007D00 H-CONN SET 13D MB-EDP
B B
A A
SATA SPINDLE Cable@
Part Number
DC02C007500 H-CONN SET 13D MB-SPINDLE HDD
SATA Cable@
Part Number
DC02C007400 H-CONN SET 13D MB-MSATA HDD
DC-IN Cable@
Part Number
DC30100Q100 CONN SET 13F DCJACK-MB 2DW1003-041110F
BATT Cable@
Part Number
DC02001X800 H-CONN SET 13D MB-BATT CABLE
Description
Description
Description
Description
Description
Description
Description
LED FFC@
Part Number
NBX0001JG00 FFC 10P F P0.5 PAD0.3 172MM MB-LED/B 13D
FP FFC@
Part Number
NBX0001JK00 FFC 8P F P0.5 PAD.3 123MM MB-FP VALIDITY
TP FFC@
Part Number
NBX0001JI00 FFC 16P F P0.5 PAD=0.3 119MM MB-TP 13D
USH Board FFC@
Part Number
NBX0001JJ00 FFC 26P G P0.5 PAD.3 88MM MB-USH/B 13D
RTC BATT@
Part Number
GC02001DS00 BATT CR2032 3V 225MAH PA 5 W/C 30MM
@FAN
Part Number Description
DC28A000800
@Speak
Part Number Description
PK230003Q0L
Description
Description
Description
Description
Description
FAN SET DAQ20 DC5V AB7405HB-HB3 ADDA
SPK PACK ZJX 2.0W 4 OHM FG
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size
Size
Size
Date: Sheet of
Date: Sheet o f
5
4
3
2
Date: Sheet o f
Compal Electronics, Inc.
Keyboard
Keyboard
Document Number Re v
Document Number Rev
Document Number Rev
Keyboard
LA-C841P
LA-C841P
LA-C841P
1
42 74Tuesday, September 08, 2015
42 74Tuesday, September 08, 2015
42 74Tuesday, September 08, 2015
0.1
0.1
0.1
Vinafix.com
5
+3.3V_ALW
10K_0402_5%
12
RZ24
QZ3B
D D
PCH_SATA_LED#<16,38>
MASK_SATA_LED#<35>
LED_SATA_DIAG_OUT#<35>
DMN65D8LDW-7_SOT363-6
5
DZ3
34
1 2 RZ25 220_0402_5%
RB751S40T1G_SOD523-2
DZ4
1 2
RB751S40T1G_SOD523-2
SYS_LED_MASK#
QZ3A
DMN65D8LDW-7_SOT363-6
4
SATA_LED
SATA_LED#
61
2
2
QZ4
DDTA114EUA-7-F_SOT323-3
1 3
1 2
RZ27 220_0402_5%
3
BAT2_LED#<36>
BAT1_LED#<36>
2
1 2
1 2
RZ28 330_0402_5%
1
BATT_WHITE#
BATT_YELLOW#
LED P/N change to SC50000FL00 from SC50000BA00
C C
BREATH_LED#<36,41>
+3.3V_ALW
@
CZ48
1 2
0.1U_0201_10V6K
5
1
SYS_LED_MASK#<31,35>
LID_CL#<35,43>
B B
POWER_SW#_MB<36,37 >
2
SW3
2
4
SKRBAAE010_4P
P
B
O
A
G
TC7SH08FU_SSOP5~D
3
1
3
MASK_BASE_LEDS#
4
UZ10
QZ7B
DMN65D8LDW-7_SOT363-6
BREATH_LED#_Q
34
5
MASK_BASE_LEDS#
BREATH_WHITE_LED_SNIFF#
1 2
RZ32 150_0402_5%
1 2
RZ34 220_0402_5%
BREATH_WHITE_LED#
LTW-C193DC-C_WHITE
+3.3V_ALW
LID_CL#<35,43>
BATT_WHITE#
BATT_YELLOW#
SATA_LED
BREATH_WHITE_LED#
+5V_ALW
LED3
21
+5V_ALW
CONN@
JLED1
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
GND1
10
GND2
ACES_50506-00841-P01
LED Circuit Control Table
FD1@
1
FIDUCIAL MARK~D
FD2@
A A
1
FIDUCIAL MARK~D
FD3@
1
FIDUCIAL MARK~D
FD4@
1
FIDUCIAL MARK~D
5
Mask All LEDs (Unobtrusive mode)
Mask Base MB LEDs (Lid Closed)
Do not Mask LEDs (Lid Opened)
H3P8
H3@
H2@
H1@
H3P8
H3P8
1
1
1
H3P8
H6@
H4@
H5@
H_3P3
H_3P3
1
1
1
SYS_LED_MASK# LID_CL#
0
1 0
H_3P2
H7@
H20@
H_3P2
1
H9@
H10@
H8@
H_2P8
H_2P8
H_2P8
1
1
1
4
X
11
H12@
H11@
H_2P8
H_2P8
H_2P8
1
1
1
H24@
H_2P2N
1
H13@
H14@
H15@
H_2P8
H_2P8
1
1
1
H25@
H_2P2X2P6N
H16@
H_2P8
1
H30@
H31@
H_0P9N
H_0P8N
1
1
H17@
H_2P8
1
H19@
H18@
H_2P8
H_2P8
1
1
1
3
H_2P8
H27@
H26@
H_2P8
H_2P8
1
H21@
1
H29@
H28@
H_2P8
H_2P8
1
1
1
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size
Size
Size
Date: Sheet of
Date: Sheet o f
2
Date: Sheet o f
Compal Electronics, Inc.
PAD, LED
PAD, LED
PAD, LED
Document Number Rev
Document Number Rev
Document Number Rev
LA-C841P
LA-C841P
LA-C841P
1
43 74Tuesday, September 08, 2015
43 74Tuesday, September 08, 2015
43 74Tuesday, September 08, 2015
0.1
0.1
0.1
Vinafix.com
5
+3.3V_ALW
D D
3.3V_WWAN_EN<35>
C C
SIO_SLP_WLAN#<20,35>
AUX_EN_WOWL<35>
B B
A A
3.3V_WWAN_EN
RZ40
100K_0402_5%
1 2
1 2
RZ38 100K_0402_5%
SIO_SLP_LAN#<20,36>
8/5 CKLT0.9
1 2
RZ71 0_0402_5%@
AUX_EN_WOWL
1 2
@
RZ70 0_0402_5%
+5V_ALW
RUN_ON
AUX_EN_WOWL
+5V_ALW
WLAN_PWR_ON
BL_PWR_P<30>
BL_PWR_N<30>
LCDVDD_PWR_P<30>
LCDVDD_PWR_N<30>
HDD_PWR_P<38,45>
HDD_PWR_N<38,45>
+3.3V_ALW
UZ2
1
VIN1
VOUT1
2
VIN1
VOUT1
3
ON1
VBIAS
GND
ON2
VIN2
VOUT2
VIN27VOUT2
GPAD
UZ3
VIN1
VOUT1
VIN1
VOUT1
ON1
VBIAS
GND
ON2
VIN2
VOUT2
VIN27VOUT2
GPAD
UZ25
A3
IN1+
A2
IN1-
A1
IN2+
B1
IN2-
D1
IN3+
C1
IN3-
D3
IN4+
D2
IN4-
CT1
CT2
CT1
CT2
MAX34407EWE+T_WLP16
4
5
6
EM5209VF_SON14_2X3
1
2
3
4
5
6
EM5209VF_SON14_2X3
SWAP for BC12 layout routing
WLAN_PWR_P
WLAN_PWR_N
14
13
12
11
10
9
8
15
14
13
12
11
10
9
8
15
@
4
+3.3V_WWAN_UZ2
+3.3V_RUN_UZ2
+3.3V_LAN_UZ3
+3.3V_WLAN_UZ3
VDD
VIO
SCL
SDA
PDN#
SLOW
ADDR
GND
PJP23
1 2
PAD-OPEN1x3m
1 2
@
CZ39 0.1U_0201_10V6K
1 2
CZ38 470P_0402_50V7K
1 2
CZ46 470P_0402_50V7K
1 2
@
CZ47 0.1U_0201_10V6K
PJP22
1 2
PAD-OPEN1x3m
PJP13
PAD-OPEN1x1m
1 2
1 2
@
CZ50 0.1U_0201_10V6K
1 2
CZ23 470P_0402_50V7K
1 2
CZ37 470P_0402_50V7K
1 2
@
CZ36 0.1U_0201_10V6K
PJP53
PAD-OPEN1x1m
1 2
12
0_0402_5%
RZ97
@
WLAN_PWR_P WLAN_PWR_N
+3.3V_RUN_UZ25
0.1U_0201_10V6K
1
@
CZ103
2
A4
B2
C4
D4
B3
C3
C2
B4
12
CZ104
1 2
0.1U_0201_10V6K
@
RZ105
0_0402_1%
@
+3.3V_WWAN
+3.3V_RUN
+3.3V_LAN
+3.3V_WLAN
12
0_0402_5%
RZ98
@
+3.3V_RUN
PJP50
1 2
PAD-OPEN1x1m
ME3_SMBCLK <20>
ME3_SMBDAT <20>
3
+3.3V_ALW
A_ON<36>
+5V_ALW
RUN_ON<36,61>
PCH_ALW_ON<36>
SIO_SLP_SUS#<11,20,36,60,62>
RZ65 0_0402_5%@
@
RZ64 0_0402_5%
1 2
1 2
+3.3V_ALW
1
2
3
4
UZ8
@
VOUT
VIN
VOUT
VIN
ON
VBIAS
GND
GND
AOZ1336_DFN8_2X2
+5V_ALW
2
7
8
6
CT
5
9
+3.3V_M_UZ8
UZ4
1
VIN1
VOUT1
2
VIN1
VOUT1
3
ON1
4
VBIAS
5
ON2
6
VIN2
VOUT2
VIN27VOUT2
EM5209VF_SON14_2X3
GND
GPAD
14
13
12
CT1
11
10
CT2
9
8
15
PJP20
1 2
PAD-OPEN1x1m
1 2
@
CZ43 0.1U_0201_10V6K
1 2
@
CZ42 470P_0402_50V7K
+5V_RUN_UZ4
@
CZ44 0.1U_0201_10V6K
CZ45 470P_0402_50V7K
+3.3V_ALW_PCH_UZ4
+3.3V_M
PJP21
1 2
PAD-OPEN1x2m
1 2
1 2
1 2
CZ69 470P_0402_50V7K
1 2
@
CZ64 0.1U_0201_10V6K
PJP19
1 2
PAD-OPEN1x1m
1
+5V_RUN
+3.3V_ALW_PCH
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size
Size
Size
Date : Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Compal Electronics, Inc.
Power control
Power control
Document Number R ev
Document Number Re v
Document Number Re v
Power control
LA-C841P
LA-C841P
LA-C841P
1
44 74Tuesday, September 08, 2015
44 74Tuesday, September 08, 2015
44 74Tuesday, September 08, 2015
0.1
0.1
0.1
Vinafix.com
5
SATA Repeater
D D
CN47 0.01U_0402_50V7K
SATA_PTX_DRX_P2<16>
SATA_PTX_DRX_N2<16>
SATA_PRX_DTX_N2<16>
SATA_PRX_DTX_P2<16>
1 2
CN50 0.01U_0402_50V7K
1 2
1 2
CN45 0.01U_0402_50V7K
CN48 0.01U_0402_50V7K
1 2
Pericom PI3EQX6741ST
TI SN75LVCP601
C C
DEW2
DEW1
HDD_A_EQ HDD_B_EQ
SATA_PTX_C_RD_DRX_P2
SATA_PTX_C_RD_DRX_N2
SATA_PRX_C_RD_DTX_N2
SATA_PRX_C_RD_DTX_P2
HDD_B_E Q
HDD_A_E Q
PIN1 7
PIN19
NC
(RN16)
PD
(RN13)
PD
(RN16)
(RN13)
UN7
6
NC
16
NC
3
TDet_B#
17
A_EQ
9
A_EM
7
EN
1
AI+
2
AI-
4
BO-
5
BO+
21
GND
PI3EQX6741STZDEX_TQFN20_4X4
HDD_A_E Q2
PIN18
PD
PD
(RN83)
PD
NC
(RN83)
PD
PD
(RN83)
4
+3.3V_HDD
0.1U_0201_10V6K
0.01U_0402_50V7K
1
1
CN49
CN46
2
X76@
10
VDD
20
VDD
HDD_B_EQ2
13
TDet_A#
19
B_EQ
HDD_B_PREHDD_A_PRE
8
B_EM
HDD_A_EQ2
18
TDeT_EN
SATA_PTX_RD_DRX_P2
15
AO+
SATA_PTX_RD_DRX_N2
14
AO-
SATA_PRX_RD_DTX_N2
12
BI-
SATA_PRX_RD_DTX_P2
11
BI+
HDD_B_EQ2 DEW 2 HDD_A _PRE HDD_B_PRE
PD
(RN23)
PD
(RN23)
PDParade PS8527C
(RN23)
(1/2 VDD)
2
DEW1
NC
NC
PIN6
NCNC
NC
(IPU)
PD
(RN19)
NC
(IPU)
PH
(RN8)
NC
(1/2 VDD)
PIN1 6PIN13 PIN9 P IN8
(IPU)
PD
(RN11)
PH
(RN10)
NC
(1/2 VDD)
3
+3.3V_HDD
X76@
HDD_A_PRE
HDD_B_PRE
HDD_A_EQ
HDD_B_EQ
DEW2
DEW1
HDD_B_EQ2
HDD_A_EQ2
X76@
4.7K_0402_5%
4.7K_0402_5%
4.7K_0402_5%
12
RN8
4.7K_0402_5%
@
RN9
1 2
@
RN10
RN12
1 2
X76@
X76@
4.7K_0402_5%
4.7K_0402_5%
RN11
RN13
1 2
4.7K_0402_5%
4.7K_0402_5%
12
@
@
RN18
RN14
1 2
X76@
X76@
4.7K_0402_5%
7.87K_0402_1%
RN16
RN19
1 2
1 2
DDR_XDP_WAN_SMBDAT<7,14,15,20>
DDR_XDP_WAN_SMBCLK<7,14,15,20>
2
4.7K_0402_5%
12
@
RN20
4.7K_0402_5%
@
RN21
1 2
4.7K_0402_5%
4.7K_0402_5%
12
1 2
12
12
@
@
RN84
RN22
FFS_INT2<19>
DMN65D8LDW-7_SOT363-6
4.7K_0402_5%
4.7K_0402_5%
12
12
RN23
RN83
+3.3V_RUN
10U_0603_6.3V6M
0.1U_0201_10V6K
12
12
CN1
CN2
+3.3V_RUN
100K_0402_5%
QN1A
FFS_INT2
2
UN1
LNG2DM
10
VDD_IO
9
VDD
3
SDO/SA0
4
SDA/SDI/SDO
SCL/SPC1GND
2
CS
LNG2DMTR_LGA12_2X2
12
RN2
61
RES
INT 1
INT 2
GND
GND
1
+5V_HDD
100K_0402_5%
12
RN1@
FFS_INT2_Q
34
QN1B
DMN65D8LDW-7_SOT363-6
5
5
12
FFS_INT2
11
6
7
8
HDD_FALL_INT <20>
+3.3V_HDD
HDD_DEVSLP
1 2
B B
+3.3V_ALW
12
RN6
@
10K_0402_5%
A A
HDD_EN
12
10K_0402_5%
RN7@
(M = VDD/2)
SATA_PTX_RD_DRX_P2
SATA_PTX_RD_DRX_N2
SATA_PRX_RD_DTX_N2
SATA_PRX_RD_DTX_P2
+3.3V_RUN
+5V_HDD +3.3V_HDD
0.1U_0201_10V6K
1000P_0402_50V7K
CN14
CN13
12
+5V_HDD_UZ23
1 2
@
RZ103 0_0402_5%
PJP55
@
+5V_ALW
HDD_EN<21>
5
UZ23
1
VOUT
VIN
2
VOUT
VIN
3
ON
4
VBIAS
GND
GND
AOZ1336_DFN8_2X2
7
+5V_HDD_UZ23
8
6
CT
5
9
4
@
12
PAD-OPEN1x1m
1 2
CZ99 0.1U_0201_10V6K
1 2
CZ100 470P_0402_50V7K
+5V_HDD
+5V_HDD
1 2
@
RZ104 0_0402_5%
3
HDD_PWR_P <38,44>
HDD_PWR_N <38,44>
12
1 2
0.1U_0201_10V6K
@
12
CN15
PJP36
PAD-OPEN1x2m
12
2
RN5@ 10K_0402_5%
12
CN43 0.01U_0402_50V7K
CN44 0.01U_0402_50V7K
12
CN18 0.01U_0402_50V7K
12
CN17 0.01U_0402_50V7K
12
+3.3V_HDD
HDD_DEVSLP<20>
HDD_DET#<16>
+5V_HDD
0.1U_0201_10V6K
CN16
HDD_DET#
ESD request,Place near JSATA1 side.
JSATA1
1
SATA_PTX_C_DRX_P2
SATA_PTX_C_DRX_N2
SATA_PRX_C_DTX_N2
SATA_PRX_C_DTX_P2
FFS_INT2_Q
CC309 0.1U_0402_25V6
12
@EMC@
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
G1
22
G2
23
G3
24
G4
STARC_115B20-000000-G2-R
CONN@
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size
Size
Size
Date: Sheet of
Date: Sheet o f
Date: Sheet o f
Compal Electronics, Inc.
HDD CONN
HDD CONN
Document Number Re v
Document Number Rev
Document Number Rev
HDD CONN
LA-C841P
LA-C841P
LA-C841P
1
45 74Tuesday, September 08, 2015
45 74Tuesday, September 08, 2015
45 74Tuesday, September 08, 2015
1.0
1.0
1.0
Vinafix.com
5
+3.3V_TBT_FLASH_R+3.3V_TBT_FLASH_R
TBT_ROM_CS#
TBT_ROM_DO
TBT_ROM_WP#
0.22U_0201_6.3V6K1 2
0.22U_0201_6.3V6K1 2
0.22U_0201_6.3V6K1 2
0.22U_0201_6.3V6K1 2
1 2
12
RT2
RT3
TB@
TB@
3.3K_0402_5%
3.3K_0402_5%
PCIE_PTX_C_DRX_P5
PCIE_PTX_C_DRX_N5
PCIE_PTX_C_DRX_P6
PCIE_PTX_C_DRX_N6
PCIE_PTX_C_DRX_P7
PCIE_PTX_C_DRX_N7
PCIE_PTX_C_DRX_P8
PCIE_PTX_C_DRX_N8
CLK_PCIE_P5
CLK_PCIE_N5
CLKREQ_PCIE#5
SW2_DP1_P0_C
SW2_DP1_N0_C
SW2_DP1_P1_C
SW2_DP1_N1_C
SW2_DP1_P2_C
SW2_DP1_N2_C
SW2_DP1_P3_C
SW2_DP1_N3_C
SW2_DP1_AUXP_C
SW2_DP1_AUXN_C
SW2_DP1_HPD
DPSNK0_DDC_CLK
DPSNK0_DDC_DATA
SW1_DP1_P0_C
SW1_DP1_N0_C
SW1_DP1_P1_C
SW1_DP1_N1_C
SW1_DP1_P2_C
SW1_DP1_N2_C
SW1_DP1_P3_C
SW1_DP1_N3_C
SW1_DP1_AUXP_C
SW1_DP1_AUXN_C
SW1_DP1_HPD
DPSNK1_DDC_CLK
DPSNK1_DDC_DATA
TBT_JTAG_TDI
TBT_JTAG_TMS
TBT_JTAG_TCK
TBT_JTAG_TDO
TBT_A_USB20_P
TBT_A_USB20_N
TBT_USB2_RBIAS
12
RT1
TB@
D D
C C
B B
A A
3.3K_0402_5%
PCIE_PTX_DRX_P5<17>
PCIE_PTX_DRX_N5<17>
PCIE_PTX_DRX_P6<17>
PCIE_PTX_DRX_N6<17>
PCIE_PTX_DRX_P7<17>
PCIE_PTX_DRX_N7<17>
PCIE_PTX_DRX_P8<17>
PCIE_PTX_DRX_N8<17>
SW2_DP1_AUXN<27>
SW1_DP1_AUXP<26>
SW1_DP1_AUXN<26>
TBT_ROM_HOLD#
TBT_ROM_CLK
TBT_ROM_DI
SW2_DP1_P0<27>
SW2_DP1_N0< 27>
SW2_DP1_P1<27>
SW2_DP1_N1< 27>
SW2_DP1_P2<27>
SW2_DP1_N2< 27>
SW2_DP1_P3<27>
SW2_DP1_N3< 27>
SW2_DP1_AUXP<27>
SW1_DP1_P0<26>
SW1_DP1_N0< 26>
SW1_DP1_P1<26>
SW1_DP1_N1< 26>
SW1_DP1_P2<26>
SW1_DP1_N2< 26>
SW1_DP1_P3<26>
SW1_DP1_N3< 26>
TBT_A_AUXP_C<49>
TBT_A_AUXN_C<49>
CT41
TB@
0.1U_0201_10V6K
TBT_A_RX_P1<49>
TBT_A_RX_N1<49>
TBT_A_TX_P1_C<49>
TBT_A_TX_N1_C<49>
TBT_A_TX_P0_C<49>
TBT_A_TX_N0_C<49>
TBT_A_RX_P0<49>
TBT_A_RX_N0<49>
12
8
7
6
5
TBT_A_LSTX<49>
TBT_A_LSRX<49>
TBT_A_HPD< 49>
TB@
VCC
HOLD#(IO3)
CLK
DI(IO0)
W25Q80DVSSIG_SO8
TB@
TB@
TB@
TB@
TB@
TB@
TB@
TB@
TB@
TB@
UT1
1
CS#
2
DO(IO1)
3
WP#(IO2)
4
GND
1 2
CT2 0.22U_0201_6.3V6KTB@
1 2
CT43 0.22U_0201_6.3V6KTB@
1 2
CT48 0.22U_0201_6.3V6KTB@
1 2
CT50 0.22U_0201_6.3V6KTB@
1 2
CT52 0.22U_0201_6.3V6KTB@
CT54 0.22U_0201_6.3V6KTB@ 1 2
CT56 0.22U_0201_6.3V6KTB@ 1 2
CT58 0.22U_0201_6.3V6KTB@ 1 2
CLK_PCIE_P5<18>
CLK_PCIE_N5<18>
CLKREQ_PCIE#5<18>
CT163 0.1U_0201_10V6K
1 2
CT165 0.1U_0201_10V6K
1 2
CT162 0.1U_0201_10V6K
1 2
CT164 0.1U_0201_10V6K
1 2
CT167 0.1U_0201_10V6K
1 2
CT166 0.1U_0201_10V6K
1 2
CT168 0.1U_0201_10V6K
1 2
CT169 0.1U_0201_10V6K
1 2
CT170 0.1U_0201_10V6K
1 2
CT171 0.1U_0201_10V6K
1 2
SW2_DP1_HPD<27>
CT60 0.1U_0201_10V6KTB@ 1 2
CT44 0.1U_0201_10V6KTB@ 1 2
CT63 0.1U_0201_10V6KTB@ 1 2
CT65 0.1U_0201_10V6KTB@ 1 2
CT45 0.1U_0201_10V6KTB@ 1 2
CT68 0.1U_0201_10V6KTB@ 1 2
CT46 0.1U_0201_10V6KTB@ 1 2
CT71 0.1U_0201_10V6KTB@ 1 2
CT73 0.1U_0201_10V6KTB@ 1 2
CT74 0.1U_0201_10V6KTB@ 1 2
SW1_DP1_HPD<26>
1 2
RT34 4.75K_0402_1%TB@
TB@
CT77
TB@
CT78
TB@
CT79
TB@
CT80
TB@
CT81 0.1U_0201_10V6K
1 2
TB@
CT82 0.1U_0201_10V6K
1 2
TBT_A_USB20_P<49>
TBT_A_USB20_N<49>
RT35 499_0402_1%TB@
12
RT4
TB@
3.3K_0402_5%
12
RT3214K_0402_1%~D TB@
TBT_RBIAS
TBT_RSENSE
TBT_A_TX_P1
TBT_A_TX_N1
TBT_A_TX_P0
TBT_A_TX_N0
TBT_A_AUXP
TBT_A_AUXN
4
12
Y23
Y22
T23
T22
M23
M22
H23
H22
V19
T19
AC5
AB7
AC7
AB9
AC9
AB11
AC11
AB13
AC13
Y11
W11
AA2
Y5
R4
AB15
AC15
AB17
AC17
AB19
AC19
AB21
AC21
Y12
W12
Y6
Y8
N4
Y18
Y4
V4
T4
W4
H6
J6
A15
B15
A17
B17
A19
B19
B21
A21
Y15
W15
E20
D20
A5
A4
M4
H19
AC23
AB23
V18
AC1
L15
N15
C23
C22
+3.3V_TBT_LC
12
12
RT27
RT26
10K_0402_5%
TB@
UT2A
PCIE_RX0_P
PCIE_RX0_N
PCIE_RX1_P
PCIE_RX1_N
PCIE_RX2_P
PCIE_RX2_N
PCIE_RX3_P
PCIE_RX3_N
PCIE_REFCLK_100_IN_P
PCIE_REFCLK_100_IN_N
PCIE_CLKREQ_N
DPSNK0_ML0_P
DPSNK0_ML0_N
DPSNK0_ML1_P
DPSNK0_ML1_N
DPSNK0_ML2_P
DPSNK0_ML2_N
DPSNK0_ML3_P
DPSNK0_ML3_N
DPSNK0_AUX_P
DPSNK0_AUX_N
DPSNK0_HPD
DPSNK0_DDC_CLK
DPSNK0_DDC_DATA
DPSNK1_ML0_P
DPSNK1_ML0_N
DPSNK1_ML1_P
DPSNK1_ML1_N
DPSNK1_ML2_P
DPSNK1_ML2_N
DPSNK1_ML3_P
DPSNK1_ML3_N
DPSNK1_AUX_P
DPSNK1_AUX_N
DPSNK1_HPD
DPSNK1_DDC_CLK
DPSNK1_DDC_DATA
DPSNK_RBIAS
TDI
TMS
TCK
TDO
RBIAS
RSENSE
PA_RX1_P
PA_RX1_N
PA_TX1_P
PA_TX1_N
PA_TX0_P
PA_TX0_N
PA_RX0_P
PA_RX0_N
PA_DPSRC_AUX_P
PA_DPSRC_AUX_N
PA_USB2_D_P
PA_USB2_D_N
PA_LSTX
PA_LSRX
PA_DPSRC_HPD
PA_USB2_RBIAS
THERMDA
THERMDA
PCIE_ATEST
TEST_EDM
FUSE_VQPS_64
FUSE_VQPS_128
MONDC_CIO_0
MONDC_CIO_1
ALPINE-RIDGE_BGA337
RT28
10K_0402_5%
10K_0402_5%
TB@
TB@
Rework Debug Pin1 +3.3V_TBT_LC, Pin6 GND
TB@
POC
12
MISC
Port A
DEBUG
SINK PORT 0
SINK PORT 1
RT29
TB@
PCIe GEN3
TBT PORTS
12
TBT_JTAG_TDI
10K_0402_5%
TBT_JTAG_TMS
TBT_JTAG_TCK
TBT_JTAG_TDO
SOURCE PORT 0
LC GPIOPOC GPIO
Misc
PORT B
POC
PCIE_TX0_P
PCIE_TX0_N
PCIE_TX1_P
PCIE_TX1_N
PCIE_TX2_P
PCIE_TX2_N
PCIE_TX3_P
PCIE_TX3_N
PERST_N
PCIE_RBIAS
DPSRC_ML0_P
DPSRC_ML0_N
DPSRC_ML1_P
DPSRC_ML1_N
DPSRC_ML2_P
DPSRC_ML2_N
DPSRC_ML3_P
DPSRC_ML3_N
DPSRC_AUX_P
DPSRC_AUX_N
DPSRC_HPD
DPSRC_RBIAS
GPIO_0
GPIO_1
GPIO_2
GPIO_3
GPIO_4
GPIO_5
GPIO_6
GPIO_7
GPIO_8
POC_GPIO_0
POC_GPIO_1
POC_GPIO_2
POC_GPIO_3
POC_GPIO_4
POC_GPIO_5
POC_GPIO_6
TEST_EN
TEST_PWR_GOOD
RESET_N
XTAL_25_IN
XTAL_25_OUT
EE_DI
EE_DO
EE_CS_N
EE_CLK
PB_RX1_P
PB_RX1_N
PB_TX1_P
PB_TX1_N
PB_TX0_P
PB_TX0_N
PB_RX0_P
PB_RX0_N
PB_DPSRC_AUX_P
PB_DPSRC_AUX_N
PB_USB2_D_P
PB_USB2_D_N
PB_LSTX
PB_LSRX
PB_DPSRC_HPD
PB_USB2_RBIAS
MONDC_SVR
ATEST_P
ATEST_N
USB2_ATEST
MONDC_DPSNK_0
MONDC_DPSNK_1
MONDC_DPSRC
3
PCIE_PRX_C_DTX_P5
V23
PCIE_PRX_C_DTX_N5
V22
PCIE_PRX_C_DTX_P6
P23
PCIE_PRX_C_DTX_N6
P22
PCIE_PRX_C_DTX_P7
K23
PCIE_PRX_C_DTX_N7
K22
PCIE_PRX_C_DTX_P8
F23
PCIE_PRX_C_DTX_N8
F22
PLTRST_TBT#
L4
TBT_PCIE_RBIAS
N16
R2
R1
N2
N1
L2
L1
J2
J1
W19
Y19
TBT_SRC_HPD
G1
N6
U1
U2
V1
V2
W1
W2
Y1
Y2
AA1
J4
E2
D4
H4
F2
D2
F1
E1
AB5
F4
D22
D23
AB3
AC4
AC3
AB4
B7
A7
A9
B9
A11
B11
A13
B13
Y16
W16
E19
D19
B4
B5
G2
F19
D6
A23
B23
E18
W13
W18
AB2
RT221TB@ 1M_ 0402_5%1 2
TBT_DP_RBIAS
RT25 1 4K_0402_1%~DTB@
TBT_I2C_SDA
TBT_I2C_SCL
TBT_ROM_WP#
TBT_TMU_CLK_OUT
PCIE_WAKE#
TBT_CIO_PLUG_EVENT#
TBT_DP_CTRL_DATA
TBT_DP_CTRL_CLK
TBT_SRC_CFG1
TBT_A_I2C_INT
TBT_B_I2C_INT
RTD3_USB_PWR_EN
TBT_FORCE_PWR
TDOCK_BATLOW#
SIO_SLP_S3#
RTD3_CIO_PWR_EN
TEST_EN
1 2
RT30 100_0402_5%TB@
TEST_PWRGD
1 2
RT31 100_0402_5%TB@
PD_RESET#
XTAL_25_IN
XTAL_25_OUT XTAL_25_OUT_R
TBT_ROM_DI
TBT_ROM_DO
TBT_ROM_CS#
TBT_ROM_CLK
TBT_B_LSTX
TBT_B_LSRX
TBT_B_HPD
TBT_B_USB2_RBIAS
TB@
RT162 499_0402_1%
1 2
CT42 0.22U_0201_6.3V6KTB@
1 2
CT47 0.22U_0201_6.3V6KTB@
1 2
CT49 0.22U_0201_6.3V6KTB@
1 2
CT51 0.22U_0201_6.3V6KTB@
1 2
CT53 0.22U_0201_6.3V6KTB@
CT55 0.22U_0201_6.3V6KTB@ 1 2
CT57 0.22U_0201_6.3V6KTB@ 1 2
CT59 0.22U_0201_6.3V6KTB@ 1 2
PLTRST_TBT# <19>
1 2
RT13 3.01K_0402_1%TB@
1 2
TBT_I2C_SDA <49>
TBT_I2C_SCL <49>
PCIE_WAKE# <33,35,38>
TBT_CIO_PLUG_EVENT# <16>
TBT_A_I2C_INT <49>
RTD3_USB_PWR_EN <35>
TBT_FORCE_PWR <19>
TDOCK_BATLOW# <35>
SIO_SLP_S3# <11,20,36,37,61,62>
RTD3_CIO_PWR_EN <19,35>
PD_RESET# <49>
12
@
RT330_0402_5%
1 2
TB@
20P_0402_50V8
+3.3V_TBT_LC+3.3V_TBT_FLASH_R +3.3V_TBT_FLASH
12
RT2130_0402_5%
TB@
12
RT2120_0402_5% @
PCIE_PRX_DTX_P5 <17>
PCIE_PRX_DTX_N5 <17>
PCIE_PRX_DTX_P6 <17>
PCIE_PRX_DTX_N6 <17>
PCIE_PRX_DTX_P7 <17>
PCIE_PRX_DTX_N7 <17>
PCIE_PRX_DTX_P8 <17>
PCIE_PRX_DTX_N8 <17>
3
4
12
CT75
25MHZ_18PF_7V25000034
2
PI3WVR31313A has internal PD 120Kohm
PI3WVR31310 has internal PD 120Kohm
YT1
TB@
1
IN
OUT
2
GND
GND
10/30
PLTRST_TBT#_BUFFPD_RESET#
12
RT2340_0402_5%
TB@
PD_RESET#
TBT_DP_CTRL_DATA
TBT_DP_CTRL_CLK
TBT_A_I2C_INT
10/27 follow UPD reference circuit
TBT_ROM_DI
TBT_ROM_DO
TBT_ROM_CS#
TBT_ROM_CLK
12
CT76
TB@
20P_0402_50V8
TBT_B_I2C_INT
TBT_I2C_SDA
TBT_I2C_SCL
TDOCK_BATLOW#
TBT_A_LSRX
TBT_A_LSTX
TBT_A_HPD
SW1_DP1_HPD
RTD3_CIO_PWR_EN
RTD3_USB_PWR_EN
TBT_FORCE_PWR
TBT_TMU_CLK_OUT
SW2_DP1_HPD
TBT_SRC_CFG1
TBT_B_LSTX
TBT_B_LSRX
TBT_B_HPD
DPSNK0_DDC_CLK
DPSNK0_DDC_DATA
DPSNK1_DDC_CLK
DPSNK1_DDC_DATA
PD_RESET#
UT23
VCC
EN
4
OUT
SENSE
2
GND
CT
TPS3895ADRYT_SON6
TB@
6
1
3
5
RT233
@
1 2
0_0402_5%
2700P_0402_50V7K
CT201
1
2
TB@
TB@
TB@
TB@
TB@
TB@
TB@
TB@
TB@
+3.3V_TBT
1
1 2
RT199 10K_0402_5%@
1 2
RT9 2.2K_0402_5%TB@
1 2
RT10 2.2K_0402_5%TB@
1 2
RT11 10K_0402_5%TB@
1 2
RT6 10K_0402_5%TB@
1 2
RT7 2.2K_0402_5%
1 2
RT12 2.2K_0402_5%
1 2
RT75 10K_0402_5%TB@
RT15TB@ 1M_0402_5%1 2
RT16TB@ 1M_0402_5%1 2
RT17TB@ 100K_0402_5%1 2
RT18@ 100K_0402_5%1 2
RT19TB@ 100K_0402_5%1 2
RT20TB@ 100K_0402_5%1 2
RT21TB@ 100K_0402_5%1 2
RT22TB@ 100K_0402_5%1 2
RT148@ 100K_0402_5%1 2
RT24TB@ 1M_0402_5%1 2
RT163 100K_0402_5%
1 2
RT164 100K_0402_5%
1 2
RT165 100K_0402_5%
1 2
RT224 100K_0402_5%TB@ 1 2
RT225 100K_0402_5%
1 2
RT222 100K_0402_5%
1 2
RT223 100K_0402_5%
1 2
CT199 100P_0402_50V8J@ 1 2
RT1880 _0402_5%@ 12
TBT_ROM_DI_R <49>
RT1900 _0402_5%@ 12
TBT_ROM_DO_R <49>
RT1890 _0402_5%@ 12
TBT_ROM_CS#_R <49>
RT1910 _0402_5%@ 12
TBT_ROM_CLK_R <49>
100K_0402_5%
TB@
RT232
0.1U_0201_10V6K
CT200
1
1 2
2
TB@
31.6K_0402_1%
12
RT235
TB@
+3.3V_TBT
+3.3V_TBT_SX
5
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size
Size
Size
Date: S heet o f
Date: S heet o f
4
3
2
Date: S heet o f
Compal Electronics, Inc.
TBT-AR-SP(1/4) DP, PCIE
TBT-AR-SP(1/4) DP, PCIE
TBT-AR-SP(1/4) DP, PCIE
Document Number R ev
Document Number R ev
Document Number R ev
LA-C841P
LA-C841P
LA-C841P
1
46 74Tuesday, September 08, 2015
46 74Tuesday, September 08, 2015
46 74Tuesday, September 08, 2015
0.1
0.1
0.1
Vinafix.com
A
+0.9V_TBT_DP
1
1
CT104
CT105
2
1U_0201_6.3V6M
TB@
1 1
TB@
+0.9V_TBT_PCIE
1
CT121
CT122
2
1U_0201_6.3V6M
TB@
TB@
2 2
TBT_PWR_EN<35>
3 3
4 4
1
1
CT107
CT106
2
2
1U_0201_6.3V6M
1U_0201_6.3V6M
1
2
1U_0201_6.3V6M
TBT_PWR_EN
12
+3.3V_TBT_L +3.3V_TBT
CT113
TB@
TB@
CT118
TB@
+5V_ALW
10K_0402_5%
TB@
12
1U_0402_6.3V6K
1
2
1U_0201_6.3V6M
+3.3V_ALW
RT230
TB@
A
TB@
CT123
TB@
CT203
47U_0805_6.3V6M
1
CT108
2
2
1U_0201_6.3V6M
1U_0201_6.3V6M
TB@
11/4
1
2
1U_0201_6.3V6M
TB@
UT13
1
VIN
2
VIN
3
ON
4
VBIAS
AOZ1336_DFN8_2X2
1
1
CT204
TB@
2
2
47U_0805_6.3V6M
1
CT109
CT110
2
1U_0201_6.3V6M
1U_0201_6.3V6M
TB@
TB@
+0.9V_TBT_CIO
CT141
TB@
7
VOUT
8
VOUT
6
CT
5
GND
9
GND
change pn to SHI0000N600
TB@
1 2
LT2 1UH_LQM18NN1R0K00D_10%
1 2
LT3 1UH_LQM18NN1R0K00D_10%
@
+0.9V_TBT_USB
1
CT133
2
1
2
1U_0201_6.3V6M
1U_0201_6.3V6M
TB@
1
CT143
CT142
2
1U_0201_6.3V6M
TB@
TB@
2
1
470P_0402_50V7K
TB@
1
2
CT144
2
+3.3V_TBT_SX
1
CT134
2
TB@
1
2
1U_0201_6.3V6M
PJP1
@
JUMP_43X79
10U_0402_6.3V6M
TB@
CT145
B
+3.3V_TBT_SX +3.3V_TBT_AR
PJP42
@
1 2
PAD-OPEN1x1m
1
2
1U_0201_6.3V6M
+3.3V_TBT+3.3V_TBT_PWR
112
B
CT139
TB@
1
2
1U_0201_6.3V6M
+0.9V_TBT_DP
+0.9V_TBT_PCIE
+0.9V_TBT_USB
+0.9V_TBT_CIO
+VCC3V3_ANA_PCIE
+VCC3V3_ANA_USB2
1
CT140
2
1U_0201_6.3V6M
TB@
C
+3.3V_TBT_LC
11/4
UT2B
L8
VCC0P9_DP
L11
VCC0P9_DP
L12
VCC0P9_DP
M8
VCC0P9_DP
T11
VCC0P9_DP
T12
VCC0P9_DP
L6
VCC0P9_ANA_DPSRC
M6
VCC0P9_ANA_DPSRC
V11
VCC0P9_ANA_DPSNK
V12
VCC0P9_ANA_DPSNK
V13
VCC0P9_ANA_DPSNK
M13
VCC0P9_PCIE
M15
VCC0P9_PCIE
M16
VCC0P9_PCIE
L19
VCC0P9_ANA_PCIE_1
N19
VCC0P9_ANA_PCIE_1
L18
VCC0P9_ANA_PCIE_2
M18
VCC0P9_ANA_PCIE_2
N18
VCC0P9_ANA_PCIE_2
R15
VCC0P9_USB
R16
VCC0P9_USB
R8
VCC0P9_CIO
R9
VCC0P9_CIO
R11
VCC0P9_CIO
R12
VCC0P9_CIO
L16
VCC3P3_ANA_PCIE
J16
VCC3P3_ANA_USB2
A6
VSS_ANA
A8
VSS_ANA
A10
VSS_ANA
A12
VSS_ANA
A14
VSS_ANA
A16
VSS_ANA
A18
VSS_ANA
A20
VSS_ANA
A22
VSS_ANA
B6
VSS_ANA
B8
VSS_ANA
B10
VSS_ANA
B12
VSS_ANA
B14
VSS_ANA
B16
VSS_ANA
B18
VSS_ANA
B20
VSS_ANA
B22
VSS_ANA
D8
VSS_ANA
D9
VSS_ANA
D11
VSS_ANA
D12
VSS_ANA
D13
VSS_ANA
D15
VSS_ANA
D16
VSS_ANA
D18
VSS_ANA
E8
VSS_ANA
E9
VSS_ANA
E11
VSS_ANA
E15
VSS_ANA
E16
VSS_ANA
E22
VSS_ANA
E23
VSS_ANA
F9
VSS_ANA
F16
VSS_ANA
F20
VSS_ANA
G22
VSS_ANA
G23
VSS_ANA
H1
VSS_ANA
H2
VSS_ANA
H12
VSS_ANA
H13
VSS_ANA
H15
VSS_ANA
H16
VSS_ANA
H20
VSS_ANA
J5
VSS_ANA
J18
VSS_ANA
J19
VSS_ANA
J20
VSS_ANA
J22
VSS_ANA
J23
VSS_ANA
K1
VSS_ANA
K2
VSS_ANA
L5
VSS_ANA
L20
VSS_ANA
L22
VSS_ANA
L23
VSS_ANA
M1
VSS_ANA
M2
VSS_ANA
M5
VSS_ANA
M19
VSS_ANA
M20
VSS_ANA
N5
VSS_ANA
N20
VSS_ANA
N22
VSS_ANA
N23
VSS_ANA
C
D
1
CT114
2
1U_0201_6.3V6M
TB@
+TBT_SVR_IND
+3.3V_ALW
1
1
CT116
CT115
TB@
TB@
11/4
1
CT180
2
1U_0201_6.3V6M
TB@
LT1 0.6UH_MND-04ABIR60M-XGL_20%
TB@
2
10U_0402_6.3V6M
1
CT179
2
1U_0201_6.3V6M
TB@
1 2
2
10U_0402_6.3V6M
CT124
TB@
1
CT135
CT136
TB@
TB@
2
10U_0402_6.3V6M
D
1 2
RT131 0_0603_5%@
1 2
R13
H9
VCC3P3_SVR
VCC3P3_SVR
VCC3P3_SVR
VCC3P3A
VCC3P3_S0
VCC0P9_SVR
VCC0P9_SVR
VCC0P9_SVR_ANA
VCC0P9_SVR_ANA
VCC0P9_SVR_ANA
VCC0P9_SVR_ANA
VCC0P9_SVR_ANA
VCC0P9_SVR_ANA
VCC0P9_SVR_SENSE
VCC0P9_LVR
VCC0P9_LVR
VCC0P9_LVR
VCC0P9_LVR_SENSE
VSS_ANA
VSS_ANAT1VSS_ANAT2VSS_ANAT5VSS_ANA
VSS_ANA
VSS_ANA
T20
U23
U22
RT132 0_0603_5%@
SVR_IND
SVR_IND
SVR_IND
SVR_VSS
SVR_VSS
SVR_VSS
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
A2
A3
B3
L9
M9
E12
E13
F11
F12
F13
F15
J9
C1
C2
D1
A1
B1
B2
F18
H18
J11
H11
V5
V6
V8
V9
V15
V16
V20
W5
W6
W8
W9
W20
W22
W23
Y9
Y13
Y20
AA22
AA23
AB6
AB8
AB10
AB12
AB14
AB16
AB18
AB20
AB22
AC6
AC8
AC10
AC12
AC14
AC16
AC18
AC20
AC22
D5
E4
E5
E6
F5
F6
H5
H8
J8
J12
J13
J15
L13
M11
M12
N8
N9
N11
N12
N13
T6
T8
T9
T13
T15
T16
T18
AB1
AC2
+3.3V_TBT_L
1
1
CT112
CT111
TB@
2
2
1U_0201_6.3V6M
1U_0201_6.3V6M
TB@
F8
R6
VCC3P3_LC
VCC3P3_SX
GND VCC
VSS_ANAP1VSS_ANAP2VSS_ANAR5VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
R18
R19
R20
R22
R23
+3.3V_TBT
1
1
CT120
CT117
TB@
TB@
1
2
1U_0201_6.3V6M
1
2
10U_0402_6.3V6M
2
10U_0402_6.3V6M
TB@
10U_0402_6.3V6M
1
CT125
2
1U_0201_6.3V6M
TB@
1
CT129
2
10U_0402_6.3V6M
+0.9V_TBT_LVR_OUT
1
CT137
2
1U_0201_6.3V6M
TB@
2
1
CT126
CT127
2
1U_0201_6.3V6M
1U_0201_6.3V6M
TB@
TB@
1
CT131
CT130
TB@
TB@
2
10U_0402_6.3V6M
10U_0402_6.3V6M
1
CT138
2
1U_0201_6.3V6M
TB@
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size
Size
Size
Date: Sheet o f
Date: Sheet o f
Date: Sheet o f
Compal Electronics, Inc.
TBT-AR-SP(2/4) PWR,VSS
TBT-AR-SP(2/4) PWR,VSS
TBT-AR-SP(2/4) PWR,VSS
Document Number Rev
Document Number Rev
Document Number Rev
+0.9V_TBT_SVR
1
1
CT128
2
2
1U_0201_6.3V6M
TB@
1
1
CT206
TB@
2
2
10U_0402_6.3V6M
LA-C841P
LA-C841P
LA-C841P
E
Share Same GND plane
with S VR_VSS of AR
E
0.1
0.1
47 74Tuesday, September 08, 2015
47 74Tuesday, September 08, 2015
47 74Tuesday, September 08, 2015
0.1
Vinafix.com
+5V_ALW
11/11
5
4
3
2
1
DT3
TB@
DT6
12
DT23
TB@
12
+5V_TBT_VBUS_D
+5V_TBT_VBUS
1N4148WS-7-F_SOD323-2
D D
C C
1N4148WS-7-F_SOD323-2
TB@
1 2
1N4148WS-7-F_SOD3 23-2
1U_0402_6.3V6K
1
CT173
2
TB@
+5V_PD_VDD +3.3V_VDD_PIC
@
1U_0402_6.3V6K
0.1U_0201_10V6K
1
1
CT147
2
UT17
TB@
VCC
3
VOUT
GND
AP2204R-5.0TRG1_SOT89-3
11/11
CT146
1
2
2
TB@
+PP_HV
1 2
RT77 10K_0402_5%
TB@
1U_0603_50V6K
TB@
1
CT172
2
UT14
VCC1VOUT
2
GND
EN3ADJ/NC
AP2112K-3.3TRG1_SOT23-5
1
@
CT205
100P_0402_50V8J
2
TB@
11/11
5
4
+3.3V_TBT_SX
PJP3
TB@
1 2
PAD-OPEN 1x3m
TB@
0.1U_0402_25V6
2.2U_0805_25V6K
12
12
@
CT150
CT149
B B
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
TBT-AR-SP(3/4) PD
TBT-AR-SP(3/4) PD
TBT-AR-SP(3/4) PD
LA-C841P
LA-C841P
LA-C841P
1
48 74Tuesday, Se ptember 08, 2015
48 74Tuesday, Se ptember 08, 2015
48 74Tuesday, Se ptember 08, 2015
5
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
4
3
2
Title
Title
Title
Size Docu ment Numb er Re v
Size Docu ment Numb er Re v
Size Docu ment Numb er Re v
Date : Sheet o f
Date : Sheet o f
Date : Sheet o f
0.1
0.1
0.1
Vinafix.com
5
+3.3V_TBT_FLASH+3.3V_TBT_FLASH
12
12
CT193
RT180
3.3K_0402_5%
0.1U_0402_25V6
JDB1
1
1
2
2
3
3
4
4
5
5
GND
6
6
GND
ACES_50506-00641-P01
CONN@
1
2
CT186
+3.3V_TBT_FLASH
PWR_SRC_ON_PC<73>
PWR_SRC_ILIMIT<73>
UART_TX
1 2
1 2
T219@ PAD~D
T220@ PAD~D
RT152 100K_0402_5%
TBT_A_LSTX<46>
TBT_A_LSRX<46>
TBT_A_LSTX
TBT_A_LSRX
DOCK_AC_OK<73>
SYSTEM_WAKE#
+3.3V_TBT_FLASH
VCC1V8D_TBTA_LDO
8
7
6
5
TBT_ROM_CLK_PD_R
TBT_ROM_DI_PD_R
TBT_ROM_DO_PD_R
TBT_ROM_CS#_PD_R
1
2
2.2U_0402_16V6K
EN_PD_HV<66,73>
TBT_A_HPD<46>
TBT_ROM_HOLD#_PD
TBT_ROM_CLK_PD_R
TBT_ROM_DI_PD_R
D D
TBT_ROM_CLK_PD_R
TBT_ROM_DI_PD_R
TBT_ROM_DO_PD_R
TBT_ROM_CS#_PD_R
7
8
C C
TI is 3x1uf
+3.3V_ALW
T216@ PAD~D
T217@ PAD~D
SYSTEM_WAKE#
T218@ PAD~D
TBT_ROM_CLK_R<46>
TBT_ROM_DI_R<46>
TBT_ROM_DO_R<46>
TBT_ROM_CS#_R<46>
RT208 100K_0402_5%
B B
RT211 1M_0402_5%
DOCK_TNY_SMB_CLK<36,41>
DOCK_TNY_SMB_DAT<36,41>
A A
UT20
CS#
VCC
DO(IO1)
HOLD#(IO3)
WP#(IO2)
CLK
GND
DI(IO0)
W25Q80DVSSIG_SO8
12
+3.3V_TBT_FLASH
TBTA_LDO_BMC
VCC1V8D_TBTA_LDO
VCC1V8A_TBTA_LDO
1
2
CT187
CT188
2.2U_0402_16V6K
2.2U_0402_16V6K
1 2
RT202 3.3K_0402_5%@
1 2
RT150 3.3K_0402_5%@
RT161 10K_0402_5%@ 1 2
RT169 0_0402_5%@
RT170 0_0402_5%@
RT172 0_0402_5%@ 12
RT174 0_0402_5%@
12
TBT_A_USB20_P<46>
TBT_A_USB20_N<46>
RT176 0_0402_5%@ 12
1 2
1 2
RT216 0_0402_5%TB@
1 2
RT217 0_0402_5%TB@
1 2
RT153 0_0402_5%TB@
1 2
RT154 0_0402_5%TB@
1 2
RT228 0_0402_5%@
1 2
RT226 0_0402_5%TB@
1 2
RT227 0_0402_5%TB@
@
RT175 0_0402_5%
1 2
RT210 100K_0402_5%
RT209 100K_0402_5%1 2
12
12
RT245
RT205
@
0_0402_5%
0_0402_5%
TB@
12
RT206
@
0_0402_5%
TBT_ROM_CS#_PD_R
1
TBT_ROM_DO_PD_R
2
TBT_ROM_WP#_PD
3
4
TBT_ROM_CLK_PD
RT1920_0402_5%
TBT_ROM_DI_PD
RT1940_0402_5% 12
TBT_ROM_DO_PD
RT1930_0402_5% 12
TBT_ROM_CS#_PD
RT1950_0402_5% 12
+3.3V_TBT_SX
TBT_I2C_SDA<46>
TBT_I2C_SCL<46>
TBT_A_I2C_INT<46>
RT1840_0402_5% @12
RT1850_0402_5% @
RT1860_0402_5% @12
RT1870_0402_5% @12
12
TBT_A_AUXP_C<46>
TBT_A_AUXN_C<46>
TI is 1x47uf+1x0.1uf
1
CT182
2
22U_0805_25V6M
1
RT207 0_0402_5%@
CT190
2
1U_0402_6.3V6K
UPD_SMBUS_DAT
UPD_SMBUS_CLK
UPD_SMBUS_ALERT#
12
12
12
TBT_ROM_CLK_PD
TBT_ROM_DI_PD
TBT_ROM_DO_PD
TBT_ROM_CS#_PD
12
RT1960_0402_5% @
RT1970_0402_5% @12
TBTA_MRESET
TBT_A_LSTX_R
TBT_A_LSRX_R
TBTA_DEBUG3
TBTA_DEBUG4
DEBUG1
DEBUG2
TBTA_ROSC
12
RT160
15K_0402_1%
12
12
12
RT181
RT183
RT182
3.3K_0402_5%
3.3K_0402_5%
3.3K_0402_5%
+5V_ALW +PP_HV
1
1
1
CT184
CT183
CT185
2
2
2
22U_0805_25V6M
22U_0805_25V6M
22U_0805_25V6M
+3.3V_TBT_SX_PD
PJP41
@
1 2
PAD-OPEN1x1m
12
UT19
F1
I2C_ADDR
D1
I2C_SDA1
D2
I2C_SCL1
C1
I2C_IRQ1_N
A5
I2C_SDA2
B5
I2C_SCL2
B6
I2C_IRQ2_N
RT1680_0402_5% @12
B2
GPIO0
C2
GPIO1
D10
GPIO2
G11
RT1710_0402_5% @12
GPIO3
C10
GPIO4
E10
RT1730_0402_5% @12
GPIO5
G10
GPIO6
D7
GPIO7
RT1570_0402_5% @12
H6
GPIO8
A3
SPI_CLK
B4
SPI_MOSI
A4
SPI_MISO
B3
SPI_SS_N
L5
USB_RP_P
K5
USB_RP_N
E2
UART_TX
F2
UART_RX
F4
SWD_DATA
G4
SWD_CLK
E11
MRESET
L4
TBT_LSTX/R2P
K4
TBT_LSRX/P2R
L3
DIG_AUD_P/DEBUG3
K3
DIG_AUD_N/DEBUG4
L2
DEBUG1
K2
DEBUG2
J1
AUX_P
J2
AUX_N
F10
BUSPOWER_N
G2
R_OSC
4
+3.3V_TBT_SX
UPD_GPU_SMBCLK<36,51>
UPD_GPU_SMBDAT<36,51>
UPD_SMBUS_ALERT#_EC<35>
TDOCK_PWR_BTN#<3 6>
@
PJP43
1 2
PAD-OPEN 1x3m
+5V_ALW_PD
B11
H1
B1
VDDIO
VIN_3V3
H10
K1
A2
LDO_1V8A
LDO_1V8D
GND
GND
GNDE5GND
E7
E6
A1
D6
12
TB@
RT237
100K_0402_5%
GND
E1
LDO_BMC
GND
F5
GND
G5
A11
PP_CABLE
GND
GND
GNDH4GND
E8
B8
D8
H5
0.22U_0402_10V6K
C11
D11
PP_5V0
PP_5V0
PP_5V0
GND
GNDF6GNDF7GND
F8
TB@
@
DMN66D0LDW-7_SOT363-6
RT200 0_0402_5%
RT83 0_0402_5%1 2
RT158 0_0402_5%@ 12
PJP4
@
1 2
TI is 1x10uf+1x0.1uf
PP_HV
1
CT189
2
4.7U_0805_25V6-K
B7
PP_HVA6PP_HVA7PP_HVA8PP_HV
PP_5V0
GND
GND
GNDG7GND
SSH7GNDL1GND
H8
G6
G8
L11
1
CT202
2
126
QT10A
PAD-OPEN1x1m
B10
SENSEP
12
UPD_SMBUS_CLK
1 2
5
QT10B
@
DMN66D0LDW-7_SOT363-6
RT167 0_0402_5%1 2
12
@
RT1590_0402_5%
SENSEP <73>
SENSEN <73>
HV_GATE1
HV_GATE2
A10
A9
SENSEN
HV_GATE1B9HV_GATE2
H11
VBUS
J10
VBUS
J11
VBUS
K11
VBUS
H2
VOUT_3V3
G1
LDO_3V3
K6
C_USB_TP
L6
C_USB_TN
K7
C_USB_BP
L7
C_USB_BN
L9
C_CC1
L10
C_CC2
WHEN CONNECT BUSPOWERZ TO GND,
CONNECT ALSO RPD_Gn to C_CCn
K9
RPD_G1
K10
RPD_G2
E4
DEBUG_CTL1
D5
DEBUG_CTL2
K8
C_SBU1
L8
C_SBU2
F11
RESET_N
TPS65982_BGA96
RT236
0_0402_5%
@
UPD_SMBUS_DAT
34
UPD_SMBUS_ALERT#
SYSTEM_WAKE#
12
+Vbus_1
TI has 1x1uf
+3.3V_PD_VOUT
1U_0603_25V6-K~D
1
2
TBT_A_USB20_P1
TBT_A_USB20_N1
DOCK_TNY_SW_CLK
DOCK_TNY_SW_DAT
TI has 2x220pf
RT203 0_0402_5%@ 1 2
RT204 0_0402_5%@ 1 2
TBTA_DBG_CTL1
TBTA_DBG_CTL2
TBT_A_SBU1_R
TBT_A_SBU2_R
PD_RESET#_R
3
TBT_A_TX_P0_C<46>
TBT_A_TX_N0_C<46>
1 2
TB@
CT94 0.47U_0201_25V
TBT_A_CC1<49>
TBT_A_USB20_P1_R
TBT_A_USB20_N1_R
TBT_A_SBU1
TB@
RT1770_0402_5% @
RT1780_0402_5% @12
+3.3V_TBT_FLASH
CT196
RT218 0_0402_5%@
RT219 0_0402_5%@
1
CT191
2
1U_0402_6.3V6K
RT147 10K_0402_5%1 2
RT201 10K_0402_5%1 2
1 2
1 2
1
2
CT192
10U_0603_6.3V6M
TBT_A_SBU1
TBT_A_SBU2
12
TBT_A_CC1 <49>
+3.3V_TBT_FLASH
@
RT1980_0402_5%
TBT_A_CC2 <49>
TBT_A_CC1
1 2
CT96 0.47U_0201_25V
TBT_A_RX_N1<46>
TBT_A_RX_P1<46>
1
2
PD_RESET# <46>
2
+TBT_VBUS +TBT_VBUS
1 2
1 2
1 2
1 2
ESD8011MUT5G_X3DFN2-2
TB@
DT8
ESD8011MUT5G_X3DFN2-2
TB@
DT10
ESD8011MUT5G_X3DFN2-2
TB@
DT12
ESD8011MUT5G_X3DFN2-2
TB@
DT14
CONN@
B12
GND
B11
SSRXP1
B10
SSRXN1
B9
VBUS
B8
RFU2
B7
DN2
B6
DP2
B5
CC2
B4
VBUS
TOP
12
12
12
12
B3
SSTXN2
B2
SSTXP2
Bottom
B1
GND
2
GND
4
GND
6
GND
TBT_A_USB20_P1_RTBT_A_USB20_P1
TBT_A_USB20_N1_RTBT_A_USB20_N1
DOCK_TNY_SW_CLK_RDOCK_TNY_SW_CLK
DOCK_TNY_SW_DAT_RDOCK_TNY_SW_DAT
ESD8011MUT5G_X3DFN2-2
ESD8011MUT5G_X3DFN2-2
ESD8011MUT5G_X3DFN2-2
ESD8011MUT5G_X3DFN2-2
JTHB1
A1
GND
A2
SSTXP1
A3
SSTXN1
A4
VBUS
A5
CC1
A6
DP1
A7
DN1
A8
RFU1
A9
VBUS
A10
SSRXN2
A11
SSRXP2
A12
GND
1
GND
3
GND
5
GND
JAE_DX07B024JJ1
RT137 0_0402_5%TB@
RT138 0_0402_5%TB@
RT139 0_0402_5%TB@
RT140 0_0402_5%TB@
TBT_A_TX_P0_C
TBT_A_TX_N0_C
TB@
12
DT7
TBT_A_RX_N1
TBT_A_RX_P1
TB@
12
DT9
TBT_A_RX_P0
TBT_A_RX_N0
1
2
CT194
CT195
220P_0402_50V8J
220P_0402_50V8J
TBT_A_TX_P1_C
TBT_A_TX_N1_C
TB@
12
DT11
TB@
12
DT13
1
TBT_A_SBU2
DOCK_TNY_SW_DAT_R
DOCK_TNY_SW_CLK_R
TBT_A_CC2
TBT_A_TX_N1_C <46>
2
3
@
DT24
PESD24VS2UT_SOT23-3
1
TBT_A_USB20_P1_R
TBT_A_USB20_N1_R
TBT_A_SBU1
TBT_A_SBU2
DOCK_TNY_SW_DAT_R
DOCK_TNY_SW_CLK_R
TBT_A_CC1
TBT_A_CC2
TBT_A_RX_P0 <46>
TBT_A_RX_N0 <46>
1 2
TB@
CT95 0.47U_0201_25V
1 2
TB@
CT97 0.47U_0201_25V
TBT_A_TX_P1_C <46>
ESD8011MUT5G_X3DFN2-2
TB@
TB@
12
DT15
DT16
ESD8011MUT5G_X3DFN2-2
@
@
12
DT25
DT26
ESD8011MUT5G_X3DFN2-2
TB@
TB@
12
DT20
DT19
ESD8011MUT5G_X3DFN2-2
@
@
12
DT27
DT28
TBT_A_CC2 <49>
ESD8011MUT5G_X3DFN2-2
12
ESD8011MUT5G_X3DFN2-2
12
ESD8011MUT5G_X3DFN2-2
12
ESD8011MUT5G_X3DFN2-2
12
5
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
4
3
2
Title
Title
Title
Size Docu ment Num ber Re v
Size Docu ment Num ber Re v
Size Docu ment Num ber Re v
Date : Sheet o f
Date : Sheet o f
Date : Sheet o f
Compal Electronics, Inc.
TBT-AR-SP(4/4) AUX SW,conn
TBT-AR-SP(4/4) AUX SW,conn
TBT-AR-SP(4/4) AUX SW,conn
LA-C841P
LA-C841P
LA-C841P
49 74Tuesday, S eptember 08, 2015
49 74Tuesday, S eptember 08, 2015
49 74Tuesday, S eptember 08, 2015
1
0.1
0.1
0.1
Vinafix.com
5
PEG_CTX_C_GRX_P[0..15]<6>
PEG_CTX_C_GRX_N[0..15]<6>
PEG_CRX_GTX_P[0..15]<6>
PEG_CRX_GTX_N[0..15]<6>
D D
C C
B B
A A
PEG_CTX_C_GRX_P[0..15]
PEG_CTX_C_GRX_N[0..15]
PEG_CRX_GTX_P[0..15]
PEG_CRX_GTX_N[0..15]
DGPU_HOLD_RST#<21>
5
PLTRST_GPU#<19>
@
RV39
100K_0402_5%
DGPU_PEX_RST
+3.3V_ALW
12
5
1
P
B
4
O
2
A
G
12
74AHC1G09GW_TSSOP5
3
UV22
4
CLK_PEG_P0<18>
CLK_PEG_N0<18>
RV306 1K_0402_1%
RV23 0_0402_5%@
0.1U_0201_10V6K
+3.3V_RUN_GFX
12
CV158
2.2K_0402_5%
@
DGPU_PEX_RST
4
1 2
1 2
RV30
PEG_CTX_C_GRX_P0
PEG_CTX_C_GRX_N0
PEG_CTX_C_GRX_P1
PEG_CTX_C_GRX_N1
PEG_CTX_C_GRX_P2
PEG_CTX_C_GRX_N2
PEG_CTX_C_GRX_P3
PEG_CTX_C_GRX_N3
PEG_CTX_C_GRX_P4
PEG_CTX_C_GRX_N4
PEG_CTX_C_GRX_P5
PEG_CTX_C_GRX_N5
PEG_CTX_C_GRX_P6
PEG_CTX_C_GRX_N6
PEG_CTX_C_GRX_P7
PEG_CTX_C_GRX_N7
PEG_CTX_C_GRX_P8
PEG_CTX_C_GRX_N8
PEG_CTX_C_GRX_P9
PEG_CTX_C_GRX_N9
PEG_CTX_C_GRX_P10
PEG_CTX_C_GRX_N10
PEG_CTX_C_GRX_P11
PEG_CTX_C_GRX_N11
PEG_CTX_C_GRX_P12
PEG_CTX_C_GRX_N12
PEG_CTX_C_GRX_P13
PEG_CTX_C_GRX_N13
PEG_CTX_C_GRX_P14
PEG_CTX_C_GRX_N14
PEG_CTX_C_GRX_P15
PEG_CTX_C_GRX_N15
CLK_PEG_P0
CLK_PEG_N0
DGPU_PEX_RST_R
DGPU_PEX_RST <51>
UV1A
AA38
PCIE_RX0P
Y37
PCIE_RX0N
Y35
PCIE_RX1P
W36
PCIE_RX1N
W38
PCIE_RX2P
V37
PCIE_RX2N
V35
PCIE_RX3P
U36
PCIE_RX3N
U38
PCIE_RX4P
T37
PCIE_RX4N
T35
PCIE_RX5P
R36
PCIE_RX5N
R38
PCIE_RX6P
P37
PCIE_RX6N
P35
PCIE_RX7P
N36
PCIE_RX7N
N38
PCIE_RX8P
M37
PCIE_RX8N
M35
PCIE_RX9P
L36
PCIE_RX9N
L38
PCIE_RX10P
K37
PCIE_RX10N
K35
PCIE_RX11P
J36
PCIE_RX11N
J38
PCIE_RX12P
H37
PCIE_RX12N
H35
PCIE_RX13P
G36
PCIE_RX13N
G38
PCIE_RX14P
F37
PCIE_RX14N
F35
PCIE_RX15P
E37
PCIE_RX15N
CLOCK
AB35
PCIE_REFCLKP
AA36
PCIE_REFCLKN
AH16
PWRGOOD
AA30
PERSTB
S IC 216-0866000 TROPO XT2 FCBGA962P C38
DIS@
PCI EXPRESS INTERFACE
CALIBRATION
3
PCIE_TX0P
PCIE_TX0N
PCIE_TX1P
PCIE_TX1N
PCIE_TX2P
PCIE_TX2N
PCIE_TX3P
PCIE_TX3N
PCIE_TX4P
PCIE_TX4N
PCIE_TX5P
PCIE_TX5N
PCIE_TX6P
PCIE_TX6N
PCIE_TX7P
PCIE_TX7N
PCIE_TX8P
PCIE_TX8N
PCIE_TX9P
PCIE_TX9N
PCIE_TX10P
PCIE_TX10N
PCIE_TX11P
PCIE_TX11N
PCIE_TX12P
PCIE_TX12N
PCIE_TX13P
PCIE_TX13N
PCIE_TX14P
PCIE_TX14N
PCIE_TX15P
PCIE_TX15N
PCIE_CALRP
PCIE_CALRN
3
Y33
Y32
W33
W32
U33
U32
U30
U29
T33
T32
T30
T29
P33
P32
P30
P29
N33
N32
N30
N29
L33
L32
L30
L29
K33
K32
J33
J32
K30
K29
H33
H32
Y30
Y29
PEG_CRX_C_GTX_P0
PEG_CRX_C_GTX_N0
PEG_CRX_C_GTX_P1
PEG_CRX_C_GTX_N1
PEG_CRX_C_GTX_P2
PEG_CRX_C_GTX_N2
PEG_CRX_C_GTX_P3
PEG_CRX_C_GTX_N3
PEG_CRX_C_GTX_P4
PEG_CRX_C_GTX_N4
PEG_CRX_C_GTX_P5
PEG_CRX_C_GTX_N5
PEG_CRX_C_GTX_P6
PEG_CRX_C_GTX_N6
PEG_CRX_C_GTX_P7
PEG_CRX_C_GTX_N7
PEG_CRX_C_GTX_P8
PEG_CRX_C_GTX_N8
PEG_CRX_C_GTX_P9
PEG_CRX_C_GTX_N9
PEG_CRX_C_GTX_P10
PEG_CRX_C_GTX_N10
PEG_CRX_C_GTX_P11
PEG_CRX_C_GTX_N11
PEG_CRX_C_GTX_P12
PEG_CRX_C_GTX_N12
PEG_CRX_C_GTX_P13
PEG_CRX_C_GTX_N13
PEG_CRX_C_GTX_P14
PEG_CRX_C_GTX_N14
PEG_CRX_C_GTX_P15
PEG_CRX_C_GTX_N15
1 2
RV297 1.69K_0402_1%
1 2
RV299 1K_0402_1%
+VGA_PCIE
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
2
Tropo@
Tropo@
Tropo@
Tropo@
Tropo@
Tropo@
Tropo@
Tropo@
Tropo@
Tropo@
Tropo@
Tropo@
Tropo@
Tropo@
Tropo@
Tropo@
PEG_CRX_GTX_P0
PEG_CRX_GTX_N0
PEG_CRX_GTX_P1
PEG_CRX_GTX_N1
PEG_CRX_GTX_P2
PEG_CRX_GTX_N2
PEG_CRX_GTX_P3
PEG_CRX_GTX_N3
PEG_CRX_GTX_P4
PEG_CRX_GTX_N4
PEG_CRX_GTX_P5
PEG_CRX_GTX_N5
PEG_CRX_GTX_P6
PEG_CRX_GTX_N6
PEG_CRX_GTX_P7
PEG_CRX_GTX_N7
PEG_CRX_GTX_P8
PEG_CRX_GTX_N8
PEG_CRX_GTX_P9
PEG_CRX_GTX_N9
PEG_CRX_GTX_P10
PEG_CRX_GTX_N10
PEG_CRX_GTX_P11
PEG_CRX_GTX_N11
PEG_CRX_GTX_P12
PEG_CRX_GTX_N12
PEG_CRX_GTX_P13
PEG_CRX_GTX_N13
PEG_CRX_GTX_P14
PEG_CRX_GTX_N14
PEG_CRX_GTX_P15
PEG_CRX_GTX_N15
CV300.22U_0402_10V6K
CV250.22U_0402_10V6K
CV330.22U_0402_10V6K
CV240.22U_0402_10V6K
CV200.22U_0402_10V6K
CV320.22U_0402_10V6K
CV310.22U_0402_10V6K
CV340.22U_0402_10V6K
CV10060.22U_0402_10V6K
CV10110.22U_0402_10V6K
CV10070.22U_0402_10V6K
CV10080.22U_0402_10V6K
CV10050.22U_0402_10V6K
CV10040.22U_0402_10V6K
CV10100.22U_0402_10V6K
CV10090.22U_0402_10V6K
CV10140.22U_0402_10V6K
CV10190.22U_0402_10V6K
CV10150.22U_0402_10V6K
CV10160.22U_0402_10V6K
CV10130.22U_0402_10V6K
CV10120.22U_0402_10V6K
CV10180.22U_0402_10V6K
CV10170.22U_0402_10V6K
CV10220.22U_0402_10V6K
CV10270.22U_0402_10V6K
CV10230.22U_0402_10V6K
CV10240.22U_0402_10V6K
CV10210.22U_0402_10V6K
CV10200.22U_0402_10V6K
CV10260.22U_0402_10V6K
CV10250.22U_0402_10V6K
1
UV1G
LVDS CONTROL
TXCLK_UP_DPF3P
TXCLK_UN_DPF3N
TXOUT_U0P_DPF2P
TXOUT_U0N_DPF2N
TXOUT_U1P_DPF1P
TXOUT_U1N_DPF1N
TXOUT_U2P_DPF0P
TXOUT_U2N_DPF0N
LVTMDP
TXCLK_LP_DPE3P
TXCLK_LN_DPE3N
TXOUT_L0P_DPE2P
TXOUT_L0N_DPE2N
TXOUT_L1P_DPE1P
TXOUT_L1N_DPE1N
TXOUT_L2P_DPE0P
TXOUT_L2N_DPE0N
S IC 216-0866000 TROPO XT2 FCBGA962P C38
DIS@
VARY_BL
DIGON
TXOUT_U3P
TXOUT_U3N
TXOUT_L3P
TXOUT_L3N
AK27
AJ27
AK35
AL36
AJ38
AK37
AH35
AJ36
AG38
AH37
AF35
AG36
AP34
AR34
AW37
AU35
AR37
AU39
AP35
AR35
AN36
AP37
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size
Size
Size
Date : Sheet of
Date : Sheet of
2
Date : Sheet of
Compal Electronics, Inc.
Meso-PCIE
Meso-PCIE
Document Number R ev
Document Number R ev
Document Number R ev
LA-C841P
LA-C841P
LA-C841P
Meso-PCIE
1
50 74Tuesday, September 08, 2015
50 74Tuesday, September 08, 2015
50 74Tuesday, September 08, 2015
0.1
0.1
0.1
Vinafix.com
5
+3.3V_RUN_GFX
1 2
RV113 10K_0402_5%
1 2
DIS@
RV630 100K_0402_5%
1 2
DIS@
RV631 100K_0402_5%
RV639 2.2K_0402_5%@
1 2
H_PROCHOT#<7,36,63,66,67>
RPV3
@
10K_8P4R_5%
1 2
GPU_PWR_LEVEL
GPU_PWR_LEVEL<35>
D D
+1.0VS_VCCIO
+3.3V_RUN_GFX
Need to discuss with ME place these parts in door.(bottom)
C C
CLKREQ_PEG#0<18>
B B
A A
GPU_HOT#_R
GPU_SMBDAT_R
GPU_SMBCLK_R
GPU_HOT#_R
1 2
RV94 0_0402_5%@
LMBT3904WT1G SC70-3
@
C
QV361
2
B
E
3 1
45
36
27
18
GPU_JTAG_TDO
GPU_JTAG_TDI
GPU_JTAG_TMS
GPU_JTAG_TRSTB
GPU_JTAG_TCK
RV9310K_0402_5%
+3.3V_RUN_GFX
12
10K_0402_5%
12
@
RV1990_0402_5%
+1.8V_RUN_GFX
BLM15BD121SN1D_0402
+VGA_PCIE
LV4
BLM15BD121SN1D_0402
+3.3V_RUN_GFX
12
RV675
10K_0402_5%
@DIS@
12
RV674
10K_0402_5%
DIS@
5
0.1U_0402_25V6
@
1
CV620
2
RV200
@
GFX_CLK_REQ#_Q
LV33
DIS@
12
(125mA)
DIS@
12
TS_FDO
12
RV6380_0402_5% @
(75mA)
1
CV1065
2
DIS@
10U_0603_6.3V6M
0.95V @Venus
1
CV1062
2
DIS@
10U_0603_6.3V6M
1
CV21
2
1U_0402_6.3V6K
DIS@
1
CV1064
2
1U_0402_6.3V6K
DIS@
GPU_HOT# <69>
GPU_SVI2_SVD<69>
GPU_SVI2_SVC<69>
+DPLL_PVDD
1
CV22
2
DIS@
0.1U_0201_10V6K
+DPLL_VDDC
1
CV1063
2
DIS@
0.1U_0201_10V6K
GPU_SMBCLK_R
+1.8VGS
1 2
RV672 10K_0402_5%@
1 2
RV671 10K_0402_5%@
1 2
RV669 10K_0402_5%@
1 2
RV668 10K_0402_5%@
1 2
RV9 10K_0402_5%@
1 2
RV670 10K_0402_5%@
1 2
RV726 10K_0402_5%@
1 2
RV727 10K_0402_5%@
REM_DIODE3_P<36>
REM_DIODE3_N<36>
(8mA)
+1.8V_RUN_GFX
1 2
RV723 0_0402_5%@
@
4
@
1 2
RV724 0_0402_5%@
4
+3.3V_RUN_GFX
T136
T135
T119
T134
T138
12
RV50 0_0402_5%@
12
RV721 0_0402_5%@
T124
0.60 V level, Please
VREFG Divider ans
cap close to ASIC
+1.8V_RUN_GFX
DIS@
12
RV31 499_0402_1%
DIS@
12
RV673 249_0402_1%
DIS@
12
RV678
CV19 0.1U_0201_10V6K
1 2
0_0402_5%
XTALIN
Voltage Swing: 1.8 V
12
RV106 10K_0402_5%
12
RV111 10K_0402_5%
100P_0402_50V8J
CE49@
1 2
DIS@
LV5
(1.8V@8mA TSVDD)
1 2
BLM15BD121SN1D_0402
QV14B
UPD_GPU_SMBCLK
3
DMN66D0LDW-7_SOT363-6
5
2
DMN66D0LDW-7_SOT363-6
UPD_GPU_SMBDATGPU_SMBDAT_R
61
QV14A
4
VRAM_ID0
VRAM_ID1
VRAM_ID2
VRAM_ID3
VRAM_ID0
VRAM_ID1
VRAM_ID2
VRAM_ID3
12
12
RV118
RV124
@
@
4.7K_0402_5%
4.7K_0402_5%
GPU_SMBDAT_R
GPU_SMBCLK_R
GPU_HOT#_R
GPU_SVI2_SVD_R
GPU_THERMAL_INT
THERMTRIP_VGA
GPU_SVI2_SVC_R
GFX_CLK_REQ#_Q
GPU_JTAG_TRSTB
GPU_JTAG_TDI
GPU_JTAG_TCK
GPU_JTAG_TMS
GPU_JTAG_TDO
20mil
+VREFG_GPU
20mil
+DPLL_PVDD
DPLL_PVSS
20mil
+DPLL_VDDC
GPU_XTALIN
GPU_XTALOUT
GPU_XO_IN
GPU_XO_IN2
TS_FDO
+TSVDD
10mil
1
1
1
CV29
CV28
CV1066
2
2
2
DIS@
DIS@
DIS@
1U_0402_6.3V6K
0.1U_0201_10V6K
10U_0603_6.3V6M
UPD_GPU_SMBCLK <36,49>
1 2
RV725@ 0_0402_5%
1 2
RV722 0_0402_5%@
UPD_GPU_SMBDAT <3 6,49>
UV1B
MUTI GFX
AR8
DVPCNTL_MVP_0
AU8
DVPCNTL_MVP_1
AP8
DVPCNTL_0
AW8
DVPCNTL_1
AR3
DVPCNTL_2
AR1
DVPCLK
AU1
DVPDATA_0
AU3
DVPDATA_1
AW3
DVPDATA_2
AP6
DVPDATA_3
AW5
DVPDATA_4
AU5
DVPDATA_5
AR6
DVPDATA_6
AW6
DVPDATA_7
AU6
DVPDATA_8
AT7
DVPDATA_9
AV7
DVPDATA_10
AN7
DVPDATA_11
AV9
DVPDATA_12
AT9
DVPDATA_13
AR10
DVPDATA_14
AW10
DVPDATA_15
AU10
DVPDATA_16
AP10
DVPDATA_17
AV11
DVPDATA_18
AT11
DVPDATA_19
AR12
DVPDATA_20
AW12
DVPDATA_21
AU12
DVPDATA_22
AP12
DVPDATA_23
AJ21
SWAPLOCKA
AK21
SWAPLOCKB
I2C
AK26
SCL
AJ26
SDA
GENERAL PURPOSE I/O
AH20
GPIO_0
AH18
GPIO_1
AN16
GPIO_2
AH23
GPIO_3_SMBDATA
AJ23
GPIO_4_SMBCLK
AH17
GPIO_5_AC_BATT
AJ17
GPIO_6
AK17
GPIO_7_BLON
AJ13
GPIO_8_ROMSO
AH15
GPIO_9_ROMSI
AJ16
GPIO_10_ROMSCK
AK16
GPIO_11
AL16
GPIO_12
AM16
GPIO_13
AM14
GPIO_14_HPD2
AM13
GPIO_15_PWRCNTL_0
AK14
GPIO_16
AG30
GPIO_17_THERMAL_INT
AN14
GPIO_18_HPD3
AM17
GPIO_19_CTF
AL13
GPIO_20_PWRCNTL_1
AJ14
GPIO_21_BB_EN
AK13
GPIO_22_ROMCSB
AN13
GPIO_23_CLKREQB
AM23
JTAG_TRSTB
AN23
JTAG_TDI
AK23
JTAG_TCK
AL24
JTAG_TMS
AM24
JTAG_TDO
AJ19
GENERICA
AK19
GENERICB
AJ20
GENERICC
AK20
GENERICD
AJ24
GENERICE_HPD4
AH26
GENERICF_HPD5
AH24
GENERICG_HPD6
AK24
HPD1
AH13
VREFG
AM32
DPLL_PVDD
AN32
DPLL_PVSS
PLL/CLOCK
AN31
DPLL_VDDC
AV33
XTALIN
AU34
XTALOUT
AW34
XO_IN
AW35
XO_IN2
AF29
DPLUS
THERMAL
AG29
DMINUS
AK32
TS_FDO
AL31
TS_A/NC
AJ32
TSVDD
AJ33
TSVSS
S IC 216-0866000 TROPO XT2 FCBGA962P C38
DIS@
DGPU_PEX_RST
+3.3V_RUN_GFX
DPA
DPB
DPC
DPD
DAC1
DAC2
V2SYNC/GENLK_VSYNC
DDC/AUX
CV163
10P_0402_50V8C
TXCAP_DPA3P
TXCAM_DPA3N
TX0P_DPA2P
TX0M_DPA2N
TX1P_DPA1P
TX1M_DPA1N
TX2P_DPA0P
TX2M_DPA0N
TXCBP_DPB3P
TXCBM_DPB3N
TX3P_DPB2P
TX3M_DPB2N
TX4P_DPB1P
TX4M_DPB1N
TX5P_DPB0P
TX5M_DPB0N
TXCCP_DPC3P
TXCCM_DPC3N
TX0P_DPC2P
TX0M_DPC2N
TX1P_DPC1P
TX1M_DPC1N
TX2P_DPC0P
TX2M_DPC0N
TXCDP_DPD3P
TXCDM_DPD3N
TX3P_DPD2P
TX3M_DPD2N
TX4P_DPD1P
TX4M_DPD1N
TX5P_DPD0P
TX5M_DPD0N
HSYNC
VSYNC
AVSSQ
VDD1DI
VSS1DI
R2/NC
R2B/NC
G2/NC
G2B/NC
B2/NC
B2B/NC
COMP/NC
H2SYNC/GENLK_CLK
VDD2DI/NC
VSS2DI/NC
A2VDD/NC
A2VDDQ/NC
A2VSSQ/TSVSSQ
R2SET/NC
DDC1CLK
DDC1DATA
AUX1P
AUX1N
DDC2CLK
DDC2DATA
AUX2P
AUX2N
DDCCLK_AUX3P
DDCDATA_AUX3N
DDCCLK_AUX4P
DDCDATA_AUX4N
DDCCLK_AUX5P
DDCDATA_AUX5N
DDC6CLK
DDC6DATA
DDCCLK_AUX7P
DDCDATA_AUX7N
GPU_XTALOUT
12
@
RV92
0_0402_5%
GPU_XTALOUT_R
1
2
3
AU24
AV23
AT25
AR24
AU26
AV25
AT27
AR26
AR30
AT29
AV31
AU30
AR32
AT31
AT33
AU32
AU14
AV13
AT15
AR14
AU16
AV15
AT17
AR16
AU20
AT19
AT21
AR20
AU22
AV21
AT23
AR22
AD39
R
AD37
RB
AE36
G
AD35
GB
AF37
B
AE38
BB
AC36
AC38
DIS@
AB34
RSET
AVDD
C/NC
Y/NC
RV15 499_0402_1%
10mil
+AVDD
AD34
AE34
10mil
+VDD1DI
AC33
AC34
AC30
AC31
AD30
PS_1
AD31
AF30
AF31
AC32
AD32
AF32
AD29
AC29
PS_2
AG31
AG32
AG33
PS_3
AD33
AF33
AA29
AM26
AN26
AM27
AL27
AM19
AL19
AN20
AM20
AL30
AM30
AL29
AM29
AN21
AM21
AJ30
AJ31
AK30
AK29
RV101
1M_0402_5%
YV3
27MHZ_12PF_X1E000021042600
3
IN
OUT
4
GND
GND
3
MLPS Bit
PS0:
PS1:
PS2:
PS3:
1 2
(1.8V@65mA AVDD)
(1.8V@100mA VDD1DI)
1
1
CV13
CV14
2
2
DIS@
DIS@
1U_0402_6.3V6K
0.1U_0201_10V6K
10U_0603_6.3V6M
RV26
+DPLL_PVDD
1 2
0_0402_5%@DIS@
RV27
DPLL_PVSS
1 2
0_0402_5%@DIS@
RV677
1 2
0_0402_5%
GPU_XTALIN
1
1
2
CV164
10P_0402_50V8C
2
1
CV15
2
DIS@
11001
11001
11000
11001
100mA
1 2
DIS@
LV2
BLM15BD121SN1D_0402
DGPU_PEX_RST<50>
AMD recommended setting
R_PU R _PD Cstrap
RV247=8.45K
RV254=8.45K
RV253=NC
RV246=8.45K
+1.8V_RUN_GFX
0.1U_0201_10V6K
DGPU_PEX_RST
GPU_THERMAL_INT
THERMTRIP_VGA
RV248=2K CV358=NC
RV249=2K CV347=NC
RV252=4.75K
1
1
CV1059
CV1060
2
2
DIS@
DIS@
1U_0402_6.3V6K
2
CV346=NC
CV345=NCRV245=2K
65mA
1 2
DIS@
LV32
BLM15BD121SN1D_0402
1
CV1061
2
DIS@
10U_0603_6.3V6M
PS_0 PS_3PS_1 PS_2
PS_0<53>
@
RV634
10K_0402_5%
GPU_SVI2_SVD
GPU_SVI2_SVC
RV636
@
10K_0402_5%
DV7
1 2
RB751S40T1G_SOD523-2
1 2
RV56 47K_0402_5%
1 2
RV57 47K_0402_5%
12
RV105 10K_0402_5%
2
1
+1.8V_RUN_GFX
+1.8V_RUN_GFX +1.8V_RUN_GFX +1.8V_RUN_GFX +1.8V_RUN_GFX
12
RV247
8.45K_0402_1%
12
1
RV248
CV358
2
2K_0402_1%
0.082U_0402_16V7K
12
@
RV6320_0402_5%
12
12
RV635
@
10K_0402_5%
12
12
RV637
10K_0402_5%
1 2
1 2
RV95 0_0402_5%
@
@
1 2
2.2K_0402_5%
1K_0402_5%
RV62
12
RV254
8.45K_0402_1%
12
1
RV249
CV347
2
2K_0402_1%
0.68U_0402_10V
+3.3V_RUN_GFX+1.8V_RUN_GFX
12
RV6330_0402_5%
SVC SVD
0
0
1
1
RV72
2
B
0.1U_0402_25V6
1
CV139
2
1
CV346
2
@
0.68U_0402_10V
0
1
0
1
LMBT3904WT1G SC70-3
C
QV360
E
3 1
12
RV253
@
8.45K_0402_1%
12
CV345
RV252
@
0.68U_0402_10V
4.75K_0402_1%
Output Voltage (V)
1.1
1.0
0.9
0.8
THERMATRIP3# <36>
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size
Size
Size
Date: Sheet of
Date: Sheet of
Date: Sheet of
Meso - GPIO
Meso - GPIO
Meso - GPIO
Document Number Re v
Document Number Re v
Document Number Re v
LA-C841P
LA-C841P
LA-C841P
1
12
RV246
8.45K_0402_1%
DIS_X76@
12
1
RV245
2
2K_0402_1%
DIS_X76@
0.1
0.1
51 74Tuesday, September 08, 2015
51 74Tuesday, September 08, 2015
51 74Tuesday, September 08, 2015
0.1
Vinafix.com
5
+1.35V_MEM_GFX
D D
10U_0603_6.3V6M
+1.8V_RUN_GFX
(150 mA)
+VGA_PCIE
+3.3V_RUN_GFX
1 2
BLM15BD121SN1D_0402
LV13
1 2
C C
B B
CHILISIN PBY100505T-300Y-N 0402
1
CV70
2
DIS@
1
CV93
2
DIS@
10U_0603_6.3V6M
(75m A)
LV11
DIS@
2A
1
1
CV61
CV71
2
2
DIS@
DIS@
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
1 2
BLM15BD121SN1D_0402
(60mA)
1
1
CV94
CV95
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
DIS@
DIS@
CHILISIN PBY100505T-300Y-N 0402
DIS@
10U_0603_6.3V6M
1
CV107
2
DIS@
10U_0603_6.3V6M
1
1
1
CV74
CV73
CV72
2
2
2
DIS@
DIS@
DIS@
10U_0603_6.3V6M
10U_0603_6.3V6M
(250mA)
LV8
DIS@
10U_0603_6.3V6M
1
CV96
2
DIS@
+1.8V_RUN_GFX
LV30
1 2
BLM15BD121SN1D_0402
(150mA)
+1.8V_RUN_GFX
LV10
1 2
(1.8V@75mA SPV18)
1
1
1
CV105
CV106
CV104
2
2
2
1U_0402_6.3V6K
DIS@
DIS@
DIS@
0.1U_0201_10V6K
(150mA SPV10)
1
1
CV108
CV109
2
2
1U_0402_6.3V6K
DIS@
DIS@
0.1U_0201_10V6K
GPU_VDDC_SEN<69>
GPU_VDDC_RTN<69>
1
1
1
CV75
CV1040
CV1086
2
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
DIS@
DIS@
DIS@
+1.35V_MEM_GFX
1
1
CV83
CV84
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
DIS@
DIS@
(1.8V@250mA VDD_CT)
1
1
DIS@
1
CV88
2
DIS@
DIS@
CV89
2
1U_0402_6.3V6K
DIS@
1
CV90
CV91
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
DIS@
DIS@
(300mA)
1
CV1087
2
1U_0402_6.3V6K
DIS@
10U_0603_6.3V6M
1
CV101
2
1U_0402_6.3V6K
DIS@
10U_0603_6.3V6M
GPU_VDDC_SEN
GPU_VDDC_RTN
AD11
AG10
1
1
1
CV63
CV76
CV1041
2
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
DIS@
DIS@
DIS@
1
1
1
CV86
CV65
CV85
2
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
DIS@
DIS@
DIS@
0.1U_0201_10V6K
+VDDC_CT+1.8V_RUN_GFX
1
CV92
2
DIS@
0.1U_0201_10V6K
1
CV97
2
DIS@
1
CV102
2
DIS@
0.1U_0201_10V6K
1
CV98
2
1U_0402_6.3V6K
DIS@
1
CV103
2
DIS@
10mi l
20mi l
+GPU_CORE
20mil
+VDDR4
20mil
+MPV18
+SPV18
+SPV10
12
RV659
10_0402_1%
DIS@
12
RV65
10_0402_1%DIS@
20mi l
AG26
AG27
10mi l
AG23
AG24
AG13
AG15
AD12
AG11
AM10
AN10
10mil
10mil
AG28
AH29
AF26
AF27
AF23
AF24
AF13
AF15
AF11
AF12
AF28
4
UV1E
MEM I/O
AC7
VDDR1#1
VDDR1#2
AF7
VDDR1#3
VDDR1#4
AJ7
VDDR1#5
AK8
VDDR1#6
AL9
VDDR1#7
G11
VDDR1#8
G14
VDDR1#9
G17
VDDR1#10
G20
VDDR1#11
G23
VDDR1#12
G26
VDDR1#13
G29
VDDR1#14
H10
VDDR1#15
J7
VDDR1#16
J9
VDDR1#17
K11
VDDR1#18
K13
VDDR1#19
K8
VDDR1#20
L12
VDDR1#21
L16
VDDR1#22
L21
VDDR1#23
L23
VDDR1#24
L26
VDDR1#25
L7
VDDR1#26
M11
VDDR1#27
N11
VDDR1#28
P7
VDDR1#29
R11
VDDR1#30
U11
VDDR1#31
U7
VDDR1#32
Y11
VDDR1#33
Y7
VDDR1#34
LEVEL
TRANSLATION
VDD_CT#1
VDD_CT#2
VDD_CT#3
VDD_CT#4
I/O
VDDR3#1
VDDR3#2
VDDR3#3
VDDR3#4
VDDR4#4
VDDR4#5
VDDR4#7
VDDR4#8
VDDR4#1
VDDR4#2
VDDR4#3
VDDR4#6
M20
NC_VDDRHA
M21
NC_VSSRHA
V12
NC_VDDRHB
U12
NC_VSSRHB
PLL
H7
MPV18#1
H8
MPV18#2
SPV18
AN9
SPV10
SPVSS
VOLTAGE
SENESE
FB_VDDC
FB_VDDCI
FB_GND
S IC 216-0866000 TROPO XT2 FCBGA962P C38
DIS@
PCIE_VDDR/PCIE_PVDD
PCIE
PCIE_VDDR#1
PCIE_VDDR#2
PCIE_VDDR#3
PCIE_VDDR#4
PCIE_VDDR#5
PCIE_VDDR#6
PCIE_VDDR#7
PCIE_VDDR#8
PCIE_VDDC#1
PCIE_VDDC#2
PCIE_VDDC#3
PCIE_VDDC#4
PCIE_VDDC#5
PCIE_VDDC#6
PCIE_VDDC#7
PCIE_VDDC#8
PCIE_VDDC#9
PCIE_VDDC#10
PCIE_VDDC#11
PCIE_VDDC#12
VDDC#1
CORE
VDDC#2
VDDC#3
VDDC#4
VDDC#5
VDDC#6
VDDC#7
VDDC#8
VDDC#9
VDDC#10
VDDC#11
VDDC#12
VDDC#13
VDDC#14
VDDC#15
POWER
VDDC#16
VDDC#17
VDDC#18
VDDC#19
VDDC#20
VDDC#21
VDDC#22
VDDC#23
VDDC#24
VDDC#25
VDDC#26
VDDC#27
VDDC#28
VDDC#29
VDDC#30
VDDC#31
VDDC#32
VDDC/BIF_VDDC#33
VDDC#34
VDDC#35
VDDC#36
VDDC#37
VDDC#38
VDDC#39
VDDC#40
VDDC#41
VDDC/BIF_VDDC#42
VDDC#43
VDDC#44
VDDC#45
VDDC#46
VDDC#47
VDDC#48
VDDC#49
VDDC#50
VDDC#51
VDDC#52
VDDC#53
VDDC#54
VDDC#55
VDDC#56
VDDC#57
VDDC#58
VDDCI#1
VDDCI#2
VDDCI#3
VDDCI#4
VDDCI#5
VDDCI#6
VDDCI#7
VDDCI#8
VDDCI#9
VDDCI#10
VDDCI#11
VDDCI#12
VDDCI#13
VDDCI#14
VDDCI#15
ISOLATED
VDDCI#16
CORE I/O
VDDCI#17
VDDCI#18
VDDCI#19
VDDCI#20
VDDCI#21
VDDCI#22
40mi l
AA31
AA32
AA33
AA34
V28
W29
W30
Y31
AB37
G30
G31
H29
H30
J29
J30
L28
M28
N28
R28
T28
U28
AA15
AA17
AA20
AA22
AA24
AA27
AB16
AB18
AB21
AB23
AB26
AB28
AC17
AC20
AC22
AC24
AC27
AD18
AD21
AD23
AD26
AF17
AF20
AF22
AG16
AG18
AG21
AH22
AH27
AH28
M26
N24
N27
R18
R21
R23
R26
T17
T20
T22
T24
T27
U16
U18
U21
U23
U26
V17
V20
V22
V24
V27
Y16
Y18
Y21
Y23
Y26
Y28
+0.9V_VDDCI
AA13
AB13
AC12
AC15
AD13
AD16
M15
M16
M18
M23
N13
N15
N17
N20
N22
R12
R13
R16
T12
T15
V15
Y13
+PCIE_VDDR
1
1
CV1045
CV1044
2
2
0.1U_0201_10V6K
0.1U_0201_10V6K
@DIS@
@DIS@
@DIS@1 2
RV61 0_0402_5%
@DIS@1 2
RV660 0_0402_5%
+PCIE_PVDD
1
1
CV1089
CV1090
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
DIS@
DIS@
+GPU_CORE
(65A)
1.2A
+BIF_VDDC
1
CV99
CV100
2
1U_0402_6.3V6K
1U_0402_6.3V6K
DIS@
DIS@
(GDDR5 0.9V@7A VDDCI)
7A
3
BLM15BD121SN1D_0402
1
1
1
CV60
CV1043
CV1042
2
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0603_6.3V6M
@DIS@
@DIS@
@DIS@
+BIF_VDDC
1
1
1
CV80
CV81
CV79
2
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
DIS@
DIS@
DIS@
For non-BACO designs, connect BIF_VDDC to VDDC.
For BACO designs - see BACO reference schematics
1U_0402_6.3V6K
1U_0402_6.3V6K
1
2
1
CV1046
2
@DIS@
+PCIE_VDDR
1
CV78
2
DIS@
1
CV1091
2
DIS@
10U_0603_6.3V6M
+1.8V_RUN_GFX
LV31
@DIS@
1 2
(TROPO)
200mA
1
1
1
CV68
CV1047
CV1085
2
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
DIS@
DIS@
DIS@
0.1U_0201_10V6K
1
CV82
2
1U_0402_6.3V6K
DIS@
+0.9V_VDDCI +GPU_CORE
10U_0603_6.3V6M
+VGA_PCIE
1
1
CV64
CV1088
2
2
DIS@
DIS@
10U_0603_6.3V6M
10U_0603_6.3V6M
+0.9V_VDDCI +GPU_CORE
PJP1903 & RV1082, RV1083 Colay
LV7
DIS@
1 2
BLM15BD121SN1D_0402
1
CV69
2
DIS@
JUMP_43X118
Litho@
1 2
Litho@
RV1082 0_1206_5%
1 2
Litho@
RV1083 0_1206_5%
2
+1.8V_RUN_GFX
(TRO PO)
(PCIe 2.0 => +0.95V@1.9A PCIE_VDDC)
(PCIe 3.0 => +0.95V@2.5A PCIE_VDDC)
PJP1903
2
112
RV63
@
1 2
0_0805_5%
1
+BIF_VDDC+VGA_PCIE
100mil
1
CV1058
22U_0805_6.3V6MDIS@
2
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size
Size
Size
Date: Sheet o f
Date: Sheet o f
5
4
3
2
Date: Sheet o f
Compal Electronics, Inc.
Meso - Power
Meso - Power
Document Number Rev
Document Number Rev
Document Number Rev
Meso - Power
LA-C841P
LA-C841P
LA-C841P
52 74Tuesday, September 08, 2015
52 74Tuesday, September 08, 2015
1
52 74Tuesday, September 08, 2015
0.1
0.1
0.1
Vinafix.com
5
D D
UV1H
Tropo@
1U_0402_6.3V6K
CV42
1
2
1
2
0.1U_0201_10V6K
+DPEF_VDD18
CV1053
DIS@
0.1U_0201_10V6K
+DPEF_VDD18
+DPEF_VDD10
+DPCD_VDD18
+DPCD_VDD10
+DPCD_VDD18
+DPCD_VDD10
+DPEF_VDD18
+DPEF_VDD10
1
2
PS_0
DIS@
RV59
150_0402_1%
20mil
20mil
20mil
20mil
20mil
20mil
20mil
20mil
AP20
AP21
AP13
AT13
AN17
AP16
AP17
AW14
AW16
AP22
AP23
AP14
AP15
AN19
AP18
AP19
AW20
AW22
AW18
RV53150_0402_1% Tropo@ 12
AH34
AJ34
AL33
AM33
AN34
AP39
AR39
AU37
AF34
AG34
AK33
AK34
AF39
AH39
AK39
AL34
AM34
AM39
12
DP C/D POWER
DPCD/DPC_VDD18#1
DPCD/DPC_VDD18#2
DPCD/DPC_VDD10#1
DPCD/DPC_VDD10#2
DP/DPC_VSSR#1
DP/DPC_VSSR#2
DP/DPC_VSSR#3
DP/DPC_VSSR#4
DP/DPC_VSSR#5
DPCD/DPD_VDD18#1
DPCD/DPD_VDD18#2
DPCD/DPD_VDD10#1
DPCD/DPD_VDD10#2
DP/DPD_VSSR#1
DP/DPD_VSSR#2
DP/DPD_VSSR#3
DP/DPD_VSSR#4
DP/DPD_VSSR#5
DPCD_CALR
DP E/F POWER
DPEF/DPE_VDD18#1
DPEF/DPE_VDD18#2
DPEF/DPE_VDD10#1
DPEF/DPE_VDD10#2
DP/DPE_VSSR#1
DP/DPE_VSSR#2
DP/DPE_VSSR#3
DP/DPE_VSSR#4
DPEF/DPF_VDD18#1
DPEF/DPF_VDD18#2
DPEF/DPF_VDD10#1
DPEF/DPF_VDD10#2
DP/DPF_VSSR#1
DP/DPF_VSSR#2
DP/DPF_VSSR#3
DP/DPF_VSSR#4
DP/DPF_VSSR#5
DPEF_CALR
S IC 216-0866000 TROPO XT2 FCBGA962P C38
DIS@
DP A/B POWER
DPAB/DPA_VDD18#1
DPAB/DPA_VDD18#2
DPAB/DPA_VDD10#1
DPAB/DPA_VDD10#2
DP/DPA_VSSR#1
DP/DPA_VSSR#2
DP/DPA_VSSR#3
DP/DPA_VSSR#4
DP/DPA_VSSR#5
DPAB/DPB_VDD18#1
DPAB/DPB_VDD18#2
DPAB/DPB_VDD10#1
DPAB/DPB_VDD10#2
DP/DPB_VSSR#1
DP/DPB_VSSR#2
DP/DPB_VSSR#3
DP/DPB_VSSR#4
DP/DPB_VSSR#5
DP PLL POWER
DPAB_VDD18/DPA_PVDD
DP_VSSR/DPA_PVSS
DPAB_VDD18/DPB_PVDD
DP_VSSR/DPB_PVSS
DPCD_VDD18/DPC_PVDD
DP_VSSR/DPC_PVSS
DPCD_VDD18/DPD_PVDD
DP_VSSR/DPD_PVSS
DPEF_VDD18/DPE_PVDD
DP_VSSR/DPE_PVSS
DPEF_VDD18/DPF_PVDD
DP_VSSR/DPF_PVSS
DPAB_CALR
+1.8V_RUN_GFX +DPCD_VDD18
Tropo@
+VGA_PCIE
RV663
0_0402_5%
C C
(222mA )
+VGA_PCIE
RV665 0_0402_5%@
B B
RV46
12
0_0402_5%
(222mA )
(1.0V@222mA DPCD_VDD10)
0.95V@Ve nus
12
1
CV46
2
Tropo@
10U_0603_6.3V6M
(270mA )
+1.8V_RUN_GFX
12
RV664 0_0402_5%@
(1.0V@222mA DPEF_VDD10)
0.95V @Venus
12
CV1054
DIS@
(1.8V@237mA DPCD_VDD18)
1
CV40
CV41
Tropo@
Tropo@
2
1U_0402_6.3V6K
10U_0603_6.3V6M
+DPCD_VDD10
+DPCD_VDD10
1
1
CV48
CV47
2
2
Tropo@
Tropo@
1U_0402_6.3V6K
0.1U_0201_10V6K
(1.8V@2370mA DPEF_VDD18)
1
CV49
CV1052
2
DIS@
DIS@
10U_0603_6.3V6M
+DPEF_VDD10
+DPEF_VDD10
1
1
1
CV1055
CV1056
DIS@
DIS@
2
2
2
1U_0402_6.3V6K
0.1U_0201_10V6K
10U_0603_6.3V6M
1
2
PS_0<51>
(270mA )
Tropo@
4
(1.8V@237mA DPAB_VDD18)
+DPAB_VDD18
CV37
20mil
130mA
AN24
Tropo@
AP24
0.1U_0201_10V6K
(1.0V@222mA DPAB_VDD10)
20mil
110mA
0.95V @Venus
+DPAB_VDD10
AP31
AP32
CV43
AN27
AP27
AP28
DIS@
AW24
AW26
+DPAB_VDD18
AP25
130mA
AP26
+DPAB_VDD10
AN33
110mA
AP33
AN29
AP29
AP30
AW30
AW32
1 2
AW28
+DPAB_VDD18
10mil
AU28
AV27
+DPAB_VDD18
10mil
AV29
AR28
+DPCD_VDD18
10mil
AU18
AV17
+DPCD_VDD18
10mil
AV19
AR18
+DPEF_VDD18
10mil
AM37
AN38
+DPEF_VDD18
10mil
AL38
AM35
1
CV38
2
Tropo@
1
2
0.1U_0201_10V6K
Tropo@
RV662
150_0402_1%
(270mA )
1
2
1U_0402_6.3V6K
1
CV44
2
DIS@
1U_0402_6.3V6K
CV39
Tropo@
1
2
10U_0603_6.3V6M
CV45
DIS@
10U_0603_6.3V6M
(222mA )
1
2
+DPAB_VDD10
Tropo@
RV666
0_0402_5%
RV667 0_0402_5%@
3
UV1F
AB39
PCIE_VSS#1
E39
PCIE_VSS#2
F34
PCIE_VSS#3
F39
PCIE_VSS#4
G33
PCIE_VSS#5
G34
PCIE_VSS#6
H31
PCIE_VSS#7
+1.8V_RUN_GFX+DPAB_VDD18
12
+VGA_PCIE
12
H34
PCIE_VSS#8
H39
PCIE_VSS#9
J31
PCIE_VSS#10
J34
PCIE_VSS#11
K31
PCIE_VSS#12
K34
PCIE_VSS#13
K39
PCIE_VSS#14
L31
PCIE_VSS#15
L34
PCIE_VSS#16
M34
PCIE_VSS#17
M39
PCIE_VSS#18
N31
PCIE_VSS#19
N34
PCIE_VSS#20
P31
PCIE_VSS#21
P34
PCIE_VSS#22
P39
PCIE_VSS#23
R34
PCIE_VSS#24
T31
PCIE_VSS#25
T34
PCIE_VSS#26
T39
PCIE_VSS#27
U31
PCIE_VSS#28
U34
PCIE_VSS#29
V34
PCIE_VSS#30
V39
PCIE_VSS#31
W31
PCIE_VSS#32
W34
PCIE_VSS#33
Y34
PCIE_VSS#34
Y39
PCIE_VSS#35
GND
F15
GND#100
F17
GND#101
F19
GND#102
F21
GND#103
F23
GND#104
F25
GND#105
F27
GND#106
F29
GND#107
F31
GND#108
F33
GND#109
F7
GND#110
F9
GND#111
G2
GND#112
G6
GND#113
H9
GND#114
J2
GND#115
J27
GND#116
J6
GND#117
J8
GND#118
K14
GND#119
K7
GND#120
L11
GND#121
L17
GND#122
L2
GND#123
L22
GND#124
L24
GND#125
L6
GND#126
M17
GND#127
M22
GND#128
M24
GND#129
N16
GND#130
N18
GND#131
N2
GND#132
N21
GND#133
N23
GND#134
N26
GND#135
N6
GND#136
R15
GND#137
R17
GND#138
R2
GND#139
R20
GND#140
R22
GND#141
R24
GND#142
R27
GND#143
R6
GND#144
T11
GND#145
T13
GND#146
T16
GND#147
T18
GND#148
T21
GND#149
T23
GND#150
T26
GND#151
U15
GND#153
U17
GND#154
U2
GND#155
U20
GND#156
U22
GND#157
U24
GND#158
U27
GND#159
U6
GND#160
V11
GND#161
V16
GND#163
V18
GND#164
V21
GND#165
V23
GND#166
V26
GND#167
W2
GND#168
W6
GND#169
Y15
GND#170
Y17
GND#171
Y20
GND#172
Y22
GND#173
Y24
GND#174
Y27
GND#175
U13
GND#152
V13
GND#162
S IC 216-0866000 TROPO XT2 FCBGA962P C38
DIS@
GND#1
GND#2
GND#3
GND#4
GND#5
GND#6
GND#7
GND#8
GND#9
GND#10
GND#11
GND#12
GND#13
GND#14
GND#15
GND#16
GND#17
GND#18
GND#19
GND#20
GND#21
GND#22
GND#23
GND#24
GND#25
GND#26
GND#27
GND#28
GND#29
GND#30
GND#31
GND#32
GND#33
GND#34
GND#35
GND#36
GND#37
GND#38
GND#39
GND#40
GND#41
GND#42
GND#43
GND#44
GND#45
GND#46
GND#47
GND#48
GND#49
GND#50
GND#51
GND#52
GND#53
GND#54
GND#55
GND#56
GND#57
GND#58
GND#59
GND#60
GND/PX_EN#61
GND#62
GND#63
GND#64
GND#65
GND#66
GND#67
GND#68
GND#69
GND#70
GND#71
GND#72
GND#73
GND#74
GND#75
GND#76
GND#77
GND#78
GND#79
GND#80
GND#81
GND#82
GND#83
GND#84
GND#85
GND#86
GND#87
GND#88
GND#89
GND#90
GND#91
GND#92
GND#93
GND#94
GND#95
GND#96
GND#97
GND#98
VSS_MECH#1
VSS_MECH#2
VSS_MECH#3
A3
A37
AA16
AA18
AA2
AA21
AA23
AA26
AA28
AA6
AB12
AB15
AB17
AB20
AB22
AB24
AB27
AC11
AC13
AC16
AC18
AC2
AC21
AC23
AC26
AC28
AC6
AD15
AD17
AD20
AD22
AD24
AD27
AD9
AE2
AE6
AF10
AF16
AF18
AF21
AG17
AG2
AG20
AG22
AG6
AG9
AH21
AJ10
AJ11
AJ2
AJ28
AJ6
AK11
AK31
AK7
AL11
AL14
AL17
AL2
AL20
AL21
AL23
AL26
AL32
12
AL6
@DIS@
AL8
RV661
AM11
AM31
4.7K_0402_5%
AM9
AN11
AN2
AN30
AN6
AN8
AP11
AP7
AP9
AR5
B11
B13
B15
B17
B19
B21
B23
B25
B27
B29
B31
B33
B7
B9
C1
C39
E35
E5
F11
F13
A39
AW1
AW39
DGPU_PWR_EN<18,21>
2
+1.0V_PRIM
UV27
+5V_ALW
VGA_PCIE_ON
+3.3V_RUN
@
0.1U_0402_25V6
1 2
CV617
1
VIN1
2
VIN2
7
VIN thermal
3
VBIAS
4
ON
AOZ1334DI-02_DFN8-7_3X3
UV25
1
VIN1
2
VIN1
3
ON1
4
VBIAS
5
ON2
6
VIN2
VIN27VOUT2
EM5209VF_SON14_2X3
+VGA_PCIE_UV27
6
VOUT
5
12
GND
+3.3V_RUN_GFX_UV25
14
VOUT1
13
VOUT1
12
CT1
11
GND
10
CT2
9
VOUT2
+1.8V_RUN_GFX_UV25
8
15
GPAD
CV176
0.1U_0201_10V6K
+3.3V_RUN_GFX
12
PJP38
PAD-OPEN1x1m
@
CV177 0.1U_0201_10V6K
CV159 1000P_0402_50V7K@
CV155 470P_0402_50V7K
1 2
CV190
12
1U_0402_6.3V6K
12
CV189
0.1U_0201_10V6K
1 2
+3.3V_RUN_GFX
@
RV625 1K_0402_5%
1 2
+1.8V_RUN_GFX
@
RV640 0_0402_5%
DGPU_PWR_EN DGPU_PWR_EN_3P3
1 2
RV194 0_0402_5%@
DGPU_PWR_EN DGPU_PWR_EN_1P8
RV198 0_0402_5%@
1 2
+5V_ALW
+1.8V_PRIM
check CT setting and confirm 0.95V source from which CPU rail
1 2
RV626 0_0402_5%@
SI4164DY
VDS RDS(on) ID(A)
30 0.0032ohm at VGS=10V 30A
30 0.0039ohm at VGS=4.5V 26.3A
RV627
PXS_PWREN <69,74>
0.01U_0402_50V7K
12
CV618
QV358A
DGPU_PWR_EN
DMN65D8LDW-7_SOT363-6
+3.3V_RUN
2
100K_0402_5%
12
61
DGPU_PWROK<20, 35,69> VRAM_EN <72>
+3.3V_RUN
470K_0402_5%
12
RV628
DGPU_PWR_ON#
12
34
QV358B
DMN65D8LDW-7_SOT363-6
5
0.01U_0402_50V7K
@
CV619
0.1U_0201_10V6K
1 2
1 2
1 2
1 2
PAD-OPEN1x1m
CV179
200K_0402_5%
12
PJP28
PAD-OPEN1x1m
+1.8V_RUN_GFX
PJP39@
@
RV210
1
+VGA_PCIE
12
A A
DELL CONFIDENTIAL/PROPRIETARY
5
4
3
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Meso - DP Power,GND
Meso - DP Power,GND
Meso - DP Power,GND
Size
Size
Size
Document Number Rev
Document Number Rev
Document Number Rev
LA-C841P
LA-C841P
LA-C841P
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
53 74Tuesday, September 08, 2015
53 74Tuesday, September 08, 2015
53 74Tuesday, September 08, 2015
0.1
0.1
0.1
Vinafix.com
5
DQA0_[0..31]<55>
DQA1_[0..31]<55>
MAA0_[0..8]<55>
MAA1_[0..8]<55>
EDCA0_[0..3]<55>
EDCA1_[0..3]<55>
DBIA0_[0..3]<55>
D D
DBIA1_[0..3]<55>
Place close to UV1
+1.35V_MEM_GFX
12
RV158
40.2_0402_1%
12
RV157
100_0402_1%
+1.35V_MEM_GFX
12
RV153
40.2_0402_1%
C C
12
RV154
100_0402_1%
B B
DQA0_[0..31]
DQA1_[0..31]
MAA0_[0..8]
MAA1_[0..8]
EDCA0_[0..3]
EDCA1_[0..3]
DBIA0_[0..3]
DBIA1_[0..3]
+VDD_MEM15_REFDA DQA0_22
1
CV62
1U_0402_6.3V6K
2
+VDD_MEM15_REFSA
1
CV67
1U_0402_6.3V6K
2
+VDD_MEM15_REFDA
+VDD_MEM15_REFSA
MEM_CALRP0
1 2
RV40 120_0402_1%
DQA0_0
DQA0_1
DQA0_2
DQA0_3
DQA0_4
DQA0_5
DQA0_6
DQA0_7
DQA0_8
DQA0_9
DQA0_10
DQA0_11
DQA0_12
DQA0_13
DQA0_14
DQA0_15
DQA0_16
DQA0_17
DQA0_18
DQA0_19
DQA0_20
DQA0_21
DQA0_23
DQA0_24
DQA0_25
DQA0_26
DQA0_27
DQA0_28
DQA0_29
DQA0_30
DQA0_31
DQA1_0
DQA1_1
DQA1_2
DQA1_3
DQA1_4
DQA1_5
DQA1_6
DQA1_7
DQA1_8
DQA1_9
DQA1_10
DQA1_11
DQA1_12
DQA1_13
DQA1_14
DQA1_15
DQA1_16
DQA1_17
DQA1_18
DQA1_19
DQA1_20
DQA1_21
DQA1_22
DQA1_23
DQA1_24
DQA1_25
DQA1_26
DQA1_27
DQA1_28
DQA1_29
DQA1_30
DQA1_31
UV1C
DDR2
GDDR3/GDDR5
DDR3
C37
DQA0_0/DQA_0
C35
DQA0_1/DQA_1
A35
DQA0_2/DQA_2
E34
DQA0_3/DQA_3
G32
DQA0_4/DQA_4
D33
DQA0_5/DQA_5
F32
DQA0_6/DQA_6
E32
DQA0_7/DQA_7
D31
DQA0_8/DQA_8
F30
DQA0_9/DQA_9
C30
DQA0_10/DQA_10
A30
DQA0_11/DQA_11
F28
DQA0_12/DQA_12
C28
DQA0_13/DQA_13
A28
DQA0_14/DQA_14
E28
DQA0_15/DQA_15
D27
DQA0_16/DQA_16
F26
DQA0_17/DQA_17
C26
DQA0_18/DQA_18
A26
DQA0_19/DQA_19
F24
DQA0_20/DQA_20
C24
DQA0_21/DQA_21
A24
DQA0_22/DQA_22
E24
DQA0_23/DQA_23
C22
DQA0_24/DQA_24
A22
DQA0_25/DQA_25
F22
DQA0_26/DQA_26
D21
DQA0_27/DQA_27
A20
DQA0_28/DQA_28
F20
DQA0_29/DQA_29
D19
DQA0_30/DQA_30
E18
DQA0_31/DQA_31
C18
DQA1_0/DQA_32
A18
DQA1_1/DQA_33
F18
DQA1_2/DQA_34
D17
DQA1_3/DQA_35
A16
DQA1_4/DQA_36
F16
DQA1_5/DQA_37
D15
DQA1_6/DQA_38
E14
DQA1_7/DQA_39
F14
DQA1_8/DQA_40
D13
DQA1_9/DQA_41
F12
DQA1_10/DQA_42
A12
DQA1_11/DQA_43
D11
DQA1_12/DQA_44
F10
DQA1_13/DQA_45
A10
DQA1_14/DQA_46
C10
DQA1_15/DQA_47
G13
DQA1_16/DQA_48
H13
DQA1_17/DQA_49
J13
DQA1_18/DQA_50
H11
DQA1_19/DQA_51
G10
DQA1_20/DQA_52
G8
DQA1_21/DQA_53
K9
DQA1_22/DQA_54
K10
DQA1_23/DQA_55
G9
DQA1_24/DQA_56
A8
DQA1_25/DQA_57
C8
DQA1_26/DQA_58
E8
DQA1_27/DQA_59
A6
DQA1_28/DQA_60
C6
DQA1_29/DQA_61
E6
DQA1_30/DQA_62
A5
DQA1_31/DQA_63
L18
MVREFDA
L20
MVREFSA
L27
MEM_CALRN0
N12
MEM_CALRN1
AG12
MEM_CALRN2
M12
MEM_CALRP1
M27
MEM_CALRP0
AH12
MEM_CALRP2
S IC 216-0866000 TROPO XT2 FCBGA962P C38
DIS@
4
DDR2
GDDR5/GDDR3
DDR3
MAA0_0/MAA_0
MAA0_1/MAA_1
MAA0_2/MAA_2
MAA0_3/MAA_3
MAA0_4/MAA_4
MAA0_5/MAA_5
MAA0_6/MAA_6
MAA0_7/MAA_7
MAA1_0/MAA_8
MAA1_1/MAA_9
MAA1_2/MAA_10
MAA1_3/MAA_11
MAA1_4/MAA_12
MAA1_5/MAA_13_BA2
MAA1_6/MAA_14_BA0
MAA1_7/MAA_A15_BA1
WCKA0_0/DQMA_0
WCKA0B_0/DQMA_1
WCKA0_1/DQMA_2
WCKA0B_1/DQMA_3
WCKA1_0/DQMA_4
WCKA1B_0/DQMA_5
WCKA1_1/DQMA_6
WCKA1B_1/DQMA_7
GDDR5/DDR2/GDDR3
EDCA0_0/QSA_0/RDQSA_0
MEMORY INTERFACE A
EDCA0_1/QSA_1/RDQSA_1
EDCA0_2/QSA_2/RDQSA_2
EDCA0_3/QSA_3/RDQSA_3
EDCA1_0/QSA_4/RDQSA_4
EDCA1_1/QSA_5/RDQSA_5
EDCA1_2/QSA_6/RDQSA_6
EDCA1_3/QSA_7/RDQSA_7
DDBIA0_0/QSA_0B/WDQSA_0
DDBIA0_1/QSA_1B/WDQSA_1
DDBIA0_2/QSA_2B/WDQSA_2
DDBIA0_3/QSA_3B/WDQSA_3
DDBIA1_0/QSA_4B/WDQSA_4
DDBIA1_1/QSA_5B/WDQSA_5
DDBIA1_2/QSA_6B/WDQSA_6
DDBIA1_3/QSA_7B/WDQSA_7
ADBIA0/ODTA0
ADBIA1/ODTA1
CLKA0
CLKA0B
CLKA1
CLKA1B
RASA0B
RASA1B
CASA0B
CASA1B
CSA0B_0
CSA0B_1
CSA1B_0
CSA1B_1
CKEA0
CKEA1
WEA0B
WEA1B
MAA0_8
MAA1_8
GDDR5
3
DQB0_[0..31]<56>
DQB1_[0..31]<56>
MAB0_[0..8]<56>
MAB1_[0..8]<56>
MAA0_0
G24
MAA0_1
J23
MAA0_2
H24
MAA0_3
J24
MAA0_4
H26
MAA0_5
J26
MAA0_6
H21
MAA0_7
G21
MAA1_0
H19
MAA1_1
H20
MAA1_2
L13
MAA1_3
G16
MAA1_4
J16
MAA1_5
H16
MAA1_6
J17
MAA1_7
H17
WCKA0_0
A32
WCKA0_0#
C32
WCKA0_1
D23
WCKA0_1#
E22
WCKA1_0
C14
WCKA1_0#
A14
WCKA1_1
E10
WCKA1_1#
D9
EDCA0_0
C34
EDCA0_1
D29
EDCA0_2
D25
EDCA0_3
E20
EDCA1_0
E16
EDCA1_1
E12
EDCA1_2
J10
EDCA1_3
D7
DBIA0_0
A34
DBIA0_1
E30
DBIA0_2
E26
DBIA0_3
C20
DBIA1_0
C16
DBIA1_1
C12
DBIA1_2
J11
DBIA1_3
F8
ADBIA0
J21
ADBIA1
G19
CLKA0
H27
CLKA0#
G27
CLKA1
J14
CLKA1#
H14
RASA0#
K23
RASA1#
K19
CASA0#
K20
CASA1#
K17
CSA0#_0
K24
K27
CSA1#_0
M13
K16
CKEA0
K21
CKEA1
J20
WEA0#
K26
WEA1#
L15
MAA0_8
H23
MAA1_8
J19
WCKA0_0 <55>
WCKA0_0# <55>
WCKA0_1 <55>
WCKA0_1# <55>
WCKA1_0 <55>
WCKA1_0# <55>
WCKA1_1 <55>
WCKA1_1# <55>
ADBIA0 <55>
ADBIA1 <55>
CLKA0 <55>
CLKA0# <55>
CLKA1 <55>
CLKA1# <55>
RASA0# <55>
RASA1# <55>
CASA0# <55>
CASA1# <55>
CSA0#_0 <55>
CSA1#_0 <55>
CKEA0 <55>
CKEA1 <55>
WEA0# <55>
WEA1# <55>
0.1U_0402_25V6
51.1_0402_1%
12
CV166@
12
RV55@
EDCB0_[0..3]<56>
EDCB1_[0..3]<56>
DBIB0_[0..3]<56>
DBIB1_[0..3]<56>
Place close to UV1
+1.35V_MEM_GFX
12
RV657
40.2_0402_1%
1
12
RV655
100_0402_1%
RV658
40.2_0402_1%
RV656
100_0402_1%
+1.35V_MEM_GFX
12
12
+3.3V_RUN_GFX
CLKTESTA
CLKTESTB
12
CV154@
0.1U_0402_25V6
12
RV48@
51.1_0402_1%
2
1
2
1 2
12
DQB0_[0..31]
DQB1_[0..31]
MAB0_[0..8]
MAB1_[0..8]
EDCB0_[0..3]
EDCB1_[0..3]
DBIB0_[0..3]
DBIB1_[0..3]
+VDD_MEM15_REFDB
CV1035
1U_0402_6.3V6K
+VDD_MEM15_REFSB
CV1034
1U_0402_6.3V6K
RV42
@
5.11K_0402_1%
TESTEN
RV52
1K_0402_5%
route 50ohms single-ended/100ohms diff
and keep short
Debug only, for clock observation,
if not needed, DNI 5mil 5mil
2
DQB0_0
DQB0_1
DQB0_2
DQB0_3
DQB0_4
DQB0_5
DQB0_6
DQB0_7
DQB0_8
DQB0_9
DQB0_10
DQB0_11
DQB0_12
DQB0_13
DQB0_14
DQB0_15
DQB0_16
DQB0_17
DQB0_18
DQB0_19
DQB0_20
DQB0_21
DQB0_22
DQB0_23
DQB0_24
DQB0_25
DQB0_26
DQB0_27
DQB0_28
DQB0_29
DQB0_30
DQB0_31
DQB1_0
DQB1_1
DQB1_2
DQB1_3
DQB1_4
DQB1_5
DQB1_6
DQB1_7
DQB1_8
DQB1_9
DQB1_10
DQB1_11
DQB1_12
DQB1_13
DQB1_14
DQB1_15
DQB1_16
DQB1_17
DQB1_18
DQB1_19
DQB1_20
DQB1_21
DQB1_22
DQB1_23
DQB1_24
DQB1_25
DQB1_26
DQB1_27
DQB1_28
DQB1_29
DQB1_30
DQB1_31
+VDD_MEM15_REFDB
+VDD_MEM15_REFSB
TESTEN
UV1D
DDR2
GDDR3/GDDR5
DDR3
C5
DQB0_0/DQB_0
C3
DQB0_1/DQB_1
E3
DQB0_2/DQB_2
E1
DQB0_3/DQB_3
F1
DQB0_4/DQB_4
F3
DQB0_5/DQB_5
F5
DQB0_6/DQB_6
G4
DQB0_7/DQB_7
H5
DQB0_8/DQB_8
H6
DQB0_9/DQB_9
J4
DQB0_10/DQB_10
K6
DQB0_11/DQB_11
K5
DQB0_12/DQB_12
L4
DQB0_13/DQB_13
M6
DQB0_14/DQB_14
M1
DQB0_15/DQB_15
M3
DQB0_16/DQB_16
M5
DQB0_17/DQB_17
N4
DQB0_18/DQB_18
P6
DQB0_19/DQB_19
P5
DQB0_20/DQB_20
R4
DQB0_21/DQB_21
T6
DQB0_22/DQB_22
T1
DQB0_23/DQB_23
U4
DQB0_24/DQB_24
V6
DQB0_25/DQB_25
V1
DQB0_26/DQB_26
V3
DQB0_27/DQB_27
Y6
DQB0_28/DQB_28
Y1
DQB0_29/DQB_29
Y3
DQB0_30/DQB_30
Y5
DQB0_31/DQB_31
AA4
DQB1_0/DQB_32
AB6
DQB1_1/DQB_33
AB1
DQB1_2/DQB_34
AB3
DQB1_3/DQB_35
AD6
DQB1_4/DQB_36
AD1
DQB1_5/DQB_37
AD3
DQB1_6/DQB_38
AD5
DQB1_7/DQB_39
AF1
DQB1_8/DQB_40
AF3
DQB1_9/DQB_41
AF6
DQB1_10/DQB_42
AG4
DQB1_11/DQB_43
AH5
DQB1_12/DQB_44
AH6
DQB1_13/DQB_45
AJ4
DQB1_14/DQB_46
AK3
DQB1_15/DQB_47
AF8
DQB1_16/DQB_48
AF9
DQB1_17/DQB_49
AG8
DQB1_18/DQB_50
AG7
DQB1_19/DQB_51
AK9
DQB1_20/DQB_52
AL7
DQB1_21/DQB_53
AM8
DQB1_22/DQB_54
AM7
DQB1_23/DQB_55
AK1
DQB1_24/DQB_56
AL4
DQB1_25/DQB_57
AM6
DQB1_26/DQB_58
AM1
DQB1_27/DQB_59
AN4
DQB1_28/DQB_60
AP3
DQB1_29/DQB_61
AP1
DQB1_30/DQB_62
AP5
DQB1_31/DQB_63
Y12
MVREFDB
AA12
MVREFSB
AD28
TESTEN
AK10
CLKTESTA
AL10
CLKTESTB
S IC 216-0866000 TROPO XT2 FCBGA962P C38
DIS@
GPU_DRAM_RST<55,56>
49.9_0402_1%
1
DDR2
GDDR5/GDDR3
DDR3
MAB0_0/MAB_0
MAB0_1/MAB_1
MAB0_2/MAB_2
MAB0_3/MAB_3
MAB0_4/MAB_4
MAB0_5/MAB_5
MAB0_6/MAB_6
MAB0_7/MAB_7
MAB1_0/MAB_8
MAB1_1/MAB_9
MAB1_2/MAB_10
MAB1_3/MAB_11
MAB1_4/MAB_12
MAB1_5/BA2
MAB1_6/BA0
MAB1_7/BA1
WCKB0_0/DQMB_0
WCKB0B_0/DQMB_1
WCKB0_1/DQMB_2
WCKB0B_1/DQMB_3
WCKB1_0/DQMB_4
WCKB1B_0/DQMB_5
WCKB1_1/DQMB_6
WCKB1B_1/DQMB_7
GDDR5/DDR2/GDDR3
EDCB0_0/QSB_0/RDQSB_0
EDCB0_1/QSB_1/RDQSB_1
MEMORY INTERFACE B
EDCB0_2/QSB_2/RDQSB_2
EDCB0_3/QSB_3/RDQSB_3
EDCB1_0/QSB_4/RDQSB_4
EDCB1_1/QSB_5/RDQSB_5
EDCB1_2/QSB_6/RDQSB_6
EDCB1_3/QSB_7/RDQSB_7
DDBIB0_0/QSB_0B/WDQSB_0
DDBIB0_1/QSB_1B/WDQSB_1
DDBIB0_2/QSB_2B/WDQSB_2
DDBIB0_3/QSB_3B/WDQSB_3
DDBIB1_0/QSB_4B/WDQSB_4
DDBIB1_1/QSB_5B/WDQSB_5
DDBIB1_2/QSB_6B/WDQSB_6
DDBIB1_3/QSB_7B/WDQSB_7
ADBIB0/ODTB0
ADBIB1/ODTB1
CLKB0
CLKB0B
CLKB1
CLKB1B
RASB0B
RASB1B
CASB0B
CASB1B
CSB0B_0
CSB0B_1
CSB1B_0
CSB1B_1
CKEB0
CKEB1
WEB0B
WEB1B
MAB0_8
MAB1_8
DRAM_RST
GDDR5
Place RV187~RV189, CV348,CV349
RV187
close to UV1 within 1000mil
RV188
12
10_0402_1%
12
CV348
120P_0402_50V9
12
MAB0_0
P8
MAB0_1
T9
MAB0_2
P9
MAB0_3
N7
MAB0_4
N8
MAB0_5
N9
MAB0_6
U9
MAB0_7
U8
MAB1_0
Y9
MAB1_1
W9
MAB1_2
AC8
MAB1_3
AC9
MAB1_4
AA7
MAB1_5
AA8
MAB1_6
Y8
MAB1_7
AA9
WCKB0_0
H3
WCKB0_0#
H1
WCKB0_1
T3
WCKB0_1#
T5
WCKB1_0
AE4
WCKB1_0#
AF5
WCKB1_1
AK6
WCKB1_1#
AK5
EDCB0_0
F6
EDCB0_1
K3
EDCB0_2
P3
EDCB0_3
V5
EDCB1_0
AB5
EDCB1_1
AH1
EDCB1_2
AJ9
EDCB1_3
AM5
DBIB0_0
G7
DBIB0_1
K1
DBIB0_2
P1
DBIB0_3
W4
DBIB1_0
AC4
DBIB1_1
AH3
DBIB1_2
AJ8
DBIB1_3
AM3
T7
W7
L9
L8
AD8
AD7
T10
Y10
W10
AA10
P10
L10
AD10
AC10
U10
AA11
N10
AB11
MAB0_8
T8
MAB1_8
W8
GPU_DRST
AH11
5.11K_0402_1%
RV189
1 2
ADBIB0
ADBIB1
CLKB0
CLKB0#
CLKB1
CLKB1#
RASB0#
RASB1#
CASB0#
CASB1#
CSB0#_0
CSB1#_0
CKEB0
CKEB1
WEB0#
WEB1#
GPU_DRST
12
CV349
@
68P_0402_50V9
WCKB0_0 <56>
WCKB0_0# <56>
WCKB0_1 <56>
WCKB0_1# <56>
WCKB1_0 <56>
WCKB1_0# <56>
WCKB1_1 <56>
WCKB1_1# <56>
ADBIB0 <56>
ADBIB1 <56>
CLKB0 <56>
CLKB0# <56>
CLKB1 <56>
CLKB1# <56>
RASB0# <56>
RASB1# <56>
CASB0# <56>
CASB1# <56>
CSB0#_0 <56>
CSB1#_0 <56>
CKEB0 <56>
CKEB1 <56>
WEB0# <56>
WEB1# <56>
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size
Size
Size
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Compal Electronics, Inc.
Meso-MEM Interface A
Meso-MEM Interface A
Meso-MEM Interface A
Document Number Re v
Document Number Re v
Document Number Re v
LA-C841P
LA-C841P
LA-C841P
1
54 74Tuesday, September 08, 2015
54 74Tuesday, September 08, 2015
54 74Tuesday, September 08, 2015
0.1
0.1
0.1
Vinafix.com
A
12
RV43
60.4_0402_1%
+1.35V_MEM_GFX
2
CV373
1
10U_0603_6.3V6M
DQA0_[0..31]
DQA1_[0..31]
MAA0_[0..8]
MAA1_[0..8]
EDCA0_[0..3]
EDCA1_[0..3]
DBIA0_[0..3]
DBIA1_[0..3]
GPU_DRAM_RST<54,55,56>
2
CV160
1
10U_0603_6.3V6M
UV17
EDCA0_0
C2
EDCA0_1
C13
EDCA0_2
R13
EDCA0_3
R2
DBIA0_0
D2
DBIA0_1
D13
DBIA0_2
P13
DBIA0_3
P2
J12
CLKA0 CLKA1
CLKA0#
J11
CKEA0
MAA0_8
MAA0_7
MAA0_6
MAA0_5
MAA0_4
MAA0_3
MAA0_2
MAA0_1
MAA0_0
12
12
12
ADBIA0
RASA0#
CSA0#_0
CASA0#
WEA0#
WCKA0_0#
WCKA0_0
WCKA0_1#
WCKA0_1
+1.35V_MEM_GFX
1
CV1037
2
1U_0603_25V6
J3
J5
K4
K5
K10
K11
H10
H11
H5
H4
A5
U5
J1
J10
J13
J4
G3
G12
L3
L12
D5
D4
P5
P4
A10
U10
J14
J2
G1
L1
G4
L4
C5
R5
C10
R10
D11
G11
L11
P11
G14
L14
H1
K1
B5
G5
L5
T5
B10
D10
G10
L10
P10
T10
H14
K14
K4G41325FC-HC04_FBGA170~D
1
CV1039
2
1U_0603_25V6
CKEA0<54> CKEA1<54>
12
RV44
60.4_0402_1%
RV116
1K_0402_1%
RV641
1K_0402_1%
RV676
121_0402_1%
ADBIA0<54>
RASA0#<54>
CSA0#_0<54>
CASA0#<54>
WEA0#<54>
WCKA0_0#<54>
WCKA0_0<54>
WCKA0_1#<54>
WCKA0_1<54>
+FBA_VREF_DQA0
+FBA_VREF_CA0
GPU_DRAM_RST
1
1
CV162
CV161
2
2
1U_0603_25V6
1U_0603_25V6
DQA0_[0..31]<54>
DQA1_[0..31]<54>
MAA0_[0..8]<54>
MAA1_[0..8]<54>
EDCA0_[0..3]<54>
EDCA1_[0..3]<54>
DBIA0_[0..3]<54>
1 1
+1.35V_MEM_GFX
12
RV144
2 2
2.37K_0402_1%
5.49K_0402_1%
12
RV112
+1.35V_MEM_GFX
12
RV139
2.37K_0402_1%
5.49K_0402_1%
12
RV110
3 3
4 4
DBIA1_[0..3]<54>
CLKA0<54>
CLKA0#<54>
+1.35V_MEM_GFX +1.35V_MEM_GFX
+FBA_VREF_DQA0
12
CV336
0.1U_0402_25V6
+FBA_VREF_CA0
12
CV327
0.1U_0402_25V6
B
DIS_X76@
MF=0 MF=1 MF=0MF=1
EDC0 EDC3
EDC1 EDC2
EDC2 EDC1
EDC3 EDC0
DBI0# DBI3#
DBI1# DBI2#
DBI2# DBI1#
DBI3# DBI0#
CK
CK#
CKE#
A12/A13
A8/A7 A10/A0
A11/A6 A9/A1
BA1/A5 BA3/A3
BA2/A4 BA0/A2
BA3/A3 BA1/A5
BA0/A2 BA2/A4
A9/A1 A11/A6
A10/A0 A8/A7
NC
NC
MF
SEN
ZQ
ABI#
RAS# CAS#
CS# WE#
CAS# RAS#
WE# CS#
WCK01# WCK23#
WCK01 WCK23
WCK23# WCK01#
WCK23 WCK01
VREFD
VREFD
VREFC
RESET#
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
170-BALL
SGRAM GDDR5
1
1
CV165
2
0.1U_0402_25V6
1
CV1036
2
2
0.1U_0402_25V6
0.1U_0402_25V6
CV167
1
2
0.1U_0402_25V6
DQ24 DQ0
DQ25 DQ1
DQ26 DQ2
DQ27 DQ3
DQ28 DQ4
DQ29 DQ5
DQ30 DQ6
DQ31 DQ7
DQ16 DQ8
DQ17 DQ9
DQ18 DQ10
DQ19 DQ11
DQ20 DQ12
DQ21 DQ13
DQ22 DQ14
DQ23 DQ15
DQ8 DQ16
DQ9 DQ17
DQ10 DQ18
DQ11 DQ19
DQ12 DQ20
DQ13 DQ21
DQ14 DQ22
DQ15 DQ23
DQ0 DQ24
DQ1 DQ25
DQ2 DQ26
DQ3 DQ27
DQ4 DQ28
DQ5 DQ29
DQ6 DQ30
DQ7 DQ31
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
1
CV375
CV1038
2
0.1U_0402_25V6
A4
A2
B4
B2
E4
E2
F4
F2
A11
A13
B11
B13
E11
E13
F11
F13
U11
U13
T11
T13
N11
N13
M11
M13
U4
U2
T4
T2
N4
N2
M4
M2
B1
D1
F1
M1
P1
T1
G2
L2
B3
D3
F3
H3
K3
M3
P3
T3
E5
N5
E10
N10
B12
D12
F12
H12
K12
M12
P12
T12
G13
L13
B14
D14
F14
M14
P14
T14
A1
C1
E1
N1
R1
U1
H2
K2
A3
C3
E3
N3
R3
U3
C4
R4
F5
M5
F10
M10
C11
R11
A12
C12
E12
N12
R12
U12
H13
K13
A14
C14
E14
N14
R14
U14
1
2
0.1U_0402_25V6
DQA0_2
DQA0_1
DQA0_3
DQA0_0
DQA0_4
DQA0_6
DQA0_5
DQA0_7
DQA0_9
DQA0_10
DQA0_11
DQA0_8
DQA0_13
DQA0_14
DQA0_12
DQA0_15
DQA0_20
DQA0_22
DQA0_21
DQA0_23
DQA0_19
DQA0_16
DQA0_18
DQA0_17
DQA0_24
DQA0_28
DQA0_25
DQA0_29
DQA0_26
DQA0_31
DQA0_27
DQA0_30
+1.35V_MEM_GFX
1
CV378
CV376
2
0.1U_0402_25V6
C
EDCA1_0
EDCA1_1
EDCA1_2
ADBIA1<54>
CASA1#<54>
WEA1#<54>
RASA1#<54>
CSA1#_0<54>
1
2
1U_0603_25V6
EDCA1_3
DBIA1_0
DBIA1_1
DBIA1_2
DBIA1_3
CLKA1#
CKEA1
MAA1_8
MAA1_0
MAA1_1
MAA1_3
MAA1_2
MAA1_5
MAA1_4
MAA1_6
MAA1_7
12
RV117
1K_0402_1%
RV119
12
1K_0402_1%
RV123
12
121_0402_1%
ADBIA1
CASA1#
WEA1#
RASA1#
CSA1#_0
WCKA1_0#
WCKA1_0
WCKA1_1#
WCKA1_1
+FBA_VREF_DQA1
+FBA_VREF_CA1
GPU_DRAM_RST
+1.35V_MEM_GFX
1
CV171
CV170
2
1U_0603_25V6
1U_0603_25V6
BYTE0
BYTE1
BYTE2
CLKA1<54>
CLKA1#<54>
12
RV643
60.4_0402_1%
12
RV642
60.4_0402_1%
BYTE3
+1.35V_MEM_GFX
+1.35V_MEM_GFX
12
RV647
2.37K_0402_1%
+FBA_VREF_DQA1
5.49K_0402_1%
12
RV646
12
CV1030
0.1U_0402_25V6
+1.35V_MEM_GFX
12
RV648
2.37K_0402_1%
+FBA_VREF_CA1
5.49K_0402_1%
12
RV649
12
CV1031
0.1U_0402_25V6
+1.35V_MEM_GFX
2
1
1
CV377
2
0.1U_0402_25V6
1
CV380
CV379
2
2
0.1U_0402_25V6
0.1U_0402_25V6
CV381
1
10U_0603_6.3V6M
10U_0603_6.3V6M
WCKA1_0#<54>
WCKA1_0<54>
WCKA1_1#<54>
WCKA1_1<54>
GPU_DRAM_RST<54,55,56>
2
1
CV168
CV169
1
2
1U_0603_25V6
UV18
C2
C13
R13
R2
D2
D13
P13
P2
J12
J11
J3
J5
K4
K5
K10
K11
H10
H11
H5
H4
A5
U5
J1
J10
J13
J4
G3
G12
L3
L12
D5
D4
P5
P4
A10
U10
J14
J2
G1
L1
G4
L4
C5
R5
C10
R10
D11
G11
L11
P11
G14
L14
H1
K1
B5
G5
L5
T5
B10
D10
G10
L10
P10
T10
H14
K14
K4G41325FC-HC04_FBGA170~D
1
1
CV172
2
2
0.1U_0402_25V6
D
DIS_X76@
MF=0 MF=1 MF=0MF=1
EDC0 EDC3
EDC1 EDC2
EDC2 EDC1
EDC3 EDC0
DBI0# DBI3#
DBI1# DBI2#
DBI2# DBI1#
DBI3# DBI0#
CK
CK#
CKE#
A12/A13
A8/A7 A10/A0
A11/A6 A9/A1
BA1/A5 BA3/A3
BA2/A4 BA0/A2
BA3/A3 BA1/A5
BA0/A2 BA2/A4
A9/A1 A11/A6
A10/A0 A8/A7
NC
NC
MF
SEN
ZQ
ABI#
RAS# CAS#
CS# WE#
CAS# RAS#
WE# CS#
WCK01# WCK23#
WCK01 WCK23
WCK23# WCK01#
WCK23 WCK01
VREFD
VREFD
VREFC
RESET#
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
170-BALL
SGRAM GDDR5
1
1
CV174
CV173
0.1U_0402_25V6
CV175
2
2
0.1U_0402_25V6
0.1U_0402_25V6
1
2
CV384
0.1U_0402_25V6
DQ24 DQ0
DQ25 DQ1
DQ26 DQ2
DQ27 DQ3
DQ28 DQ4
DQ29 DQ5
DQ30 DQ6
DQ31 DQ7
DQ16 DQ8
DQ17 DQ9
DQ18 DQ10
DQ19 DQ11
DQ20 DQ12
DQ21 DQ13
DQ22 DQ14
DQ23 DQ15
DQ8 DQ16
DQ9 DQ17
DQ10 DQ18
DQ11 DQ19
DQ12 DQ20
DQ13 DQ21
DQ14 DQ22
DQ15 DQ23
DQ0 DQ24
DQ1 DQ25
DQ2 DQ26
DQ3 DQ27
DQ4 DQ28
DQ5 DQ29
DQ6 DQ30
DQ7 DQ31
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
1
1
CV383
2
2
0.1U_0402_25V6
A4
A2
B4
B2
E4
E2
F4
F2
A11
A13
B11
B13
E11
E13
F11
F13
U11
U13
T11
T13
N11
N13
M11
M13
U4
U2
T4
T2
N4
N2
M4
M2
B1
D1
F1
M1
P1
T1
G2
L2
B3
D3
F3
H3
K3
M3
P3
T3
E5
N5
E10
N10
B12
D12
F12
H12
K12
M12
P12
T12
G13
L13
B14
D14
F14
M14
P14
T14
A1
C1
E1
N1
R1
U1
H2
K2
A3
C3
E3
N3
R3
U3
C4
R4
F5
M5
F10
M10
C11
R11
A12
C12
E12
N12
R12
U12
H13
K13
A14
C14
E14
N14
R14
U14
CV382
0.1U_0402_25V6
DQA1_5
DQA1_1
DQA1_7
DQA1_0
DQA1_6
DQA1_3
DQA1_4
DQA1_2
DQA1_8
DQA1_9
DQA1_11
DQA1_10
DQA1_13
DQA1_14
DQA1_12
DQA1_15
DQA1_23
DQA1_20
DQA1_22
DQA1_21
DQA1_18
DQA1_19
DQA1_16
DQA1_17
DQA1_29
DQA1_30
DQA1_28
DQA1_31
DQA1_25
DQA1_24
DQA1_27
DQA1_26
+1.35V_MEM_GFX
1
1
CV387
2
2
0.1U_0402_25V6
E
BYTE7
BYTE6
BYTE5
BYTE4
1
1
CV385
CV386
0.1U_0402_25V6
CV388
2
2
0.1U_0402_25V6
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size
Size
Size
Date: Sheet of
Date: Sheet of
A
B
C
D
Date: Sheet of
Compal Electronics, Inc.
GDDR5 VRAM A
GDDR5 VRAM A
Document Number Re v
Document Number Re v
Document Number Re v
GDDR5 VRAM A
LA-C841P
LA-C841P
LA-C841P
E
55 74Tuesday, September 08, 2015
55 74Tuesday, September 08, 2015
55 74Tuesday, September 08, 2015
0.1
0.1
0.1
Vinafix.com
A
DQB0_[0..31]<54>
DQB1_[0..31]<54>
MAB0_[0..8]<54>
MAB1_[0..8]<54>
EDCB0_[0..3]<54>
EDCB1_[0..3]<54>
DBIB0_[0..3]<54>
+FBA_VREF_DQB0
0.01U_0402_50V7K
CV227
1
2
+FBA_VREF_CB0
0.01U_0402_50V7K
CV220
1
2
DBIB1_[0..3]<54>
1 1
CLKB0<54>
CLKB0#<54>
+1.35V_MEM_GFX
2.37K_0402_1%
12
RV150
2 2
5.49K_0402_1%
12
RV143
+1.35V_MEM_GFX
2.37K_0402_1%
12
RV149
5.49K_0402_1%
12
RV142
3 3
4 4
DQB0_[0..31]
DQB1_[0..31]
MAB0_[0..8]
MAB1_[0..8]
EDCB0_[0..3]
EDCB1_[0..3]
DBIB0_[0..3]
DBIB1_[0..3]
12
RV66
60.4_0402_1%
+1.35V_MEM_GFX
2
CV389
1
10U_0603_6.3V6M
UV19
EDCB0_0
C2
EDCB0_1
C13
EDCB0_2
R13
EDCB0_3
R2
DBIB0_0
D2
DBIB0_1
D13
DBIB0_2
P13
DBIB0_3
P2
J12
CLKB0 CLKB1
CLKB0#
J11
CKEB0
MAB0_8
MAB0_7
MAB0_6
MAB0_5
MAB0_4
MAB0_3
MAB0_2
MAB0_1
MAB0_0
12
12
12
ADBIB0
RASB0#
CSB0#_0
CASB0#
WEB0#
WCKB0_0#
WCKB0_0
WCKB0_1#
WCKB0_1
+1.35V_MEM_GFX
1
CV182
CV181
2
1U_0603_25V6
J3
J5
K4
K5
K10
K11
H10
H11
H5
H4
A5
U5
J1
J10
J13
J4
G3
G12
L3
L12
D5
D4
P5
P4
A10
U10
J14
J2
G1
L1
G4
L4
C5
R5
C10
R10
D11
G11
L11
P11
G14
L14
H1
K1
B5
G5
L5
T5
B10
D10
G10
L10
P10
T10
H14
K14
K4G41325FC-HC04_FBGA170~D
1
CV183
2
1U_0603_25V6
CKEB0<54> CKEB1<54>
12
RV67
60.4_0402_1%
RV132
1K_0402_1%
RV134
1K_0402_1%
RV136
121_0402_1%
ADBIB0<54>
RASB0#<54>
CSB0#_0<54>
CASB0#<54>
WEB0#<54>
WCKB0_0#<54>
WCKB0_0<54>
WCKB0_1#<54>
WCKB0_1<54>
+FBA_VREF_DQB0
+FBA_VREF_CB0
GPU_DRAM_RST
2
1
CV200
1
10U_0603_6.3V6M
1
CV180
2
2
1U_0603_25V6
1U_0603_25V6
B
DIS_X76@
MF=0 MF=1 MF=0MF=1
EDC0 EDC3
EDC1 EDC2
EDC2 EDC1
EDC3 EDC0
DBI0# DBI3#
DBI1# DBI2#
DBI2# DBI1#
DBI3# DBI0#
CK
CK#
CKE#
A12/A13
A8/A7 A10/A0
A11/A6 A9/A1
BA1/A5 BA3/A3
BA2/A4 BA0/A2
BA3/A3 BA1/A5
BA0/A2 BA2/A4
A9/A1 A11/A6
A10/A0 A8/A7
NC
NC
MF
SEN
ZQ
ABI#
RAS# CAS#
CS# WE#
CAS# RAS#
WE# CS#
WCK01# WCK23#
WCK01 WCK23
WCK23# WCK01#
WCK23 WCK01
VREFD
VREFD
VREFC
RESET#
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
170-BALL
SGRAM GDDR5
1
1
CV184
2
0.1U_0402_25V6
1
CV185
2
2
0.1U_0402_25V6
0.1U_0402_25V6
CV186
DQ24 DQ0
DQ25 DQ1
DQ26 DQ2
DQ27 DQ3
DQ28 DQ4
DQ29 DQ5
DQ30 DQ6
DQ31 DQ7
DQ16 DQ8
DQ17 DQ9
DQ18 DQ10
DQ19 DQ11
DQ20 DQ12
DQ21 DQ13
DQ22 DQ14
DQ23 DQ15
DQ8 DQ16
DQ9 DQ17
DQ10 DQ18
DQ11 DQ19
DQ12 DQ20
DQ13 DQ21
DQ14 DQ22
DQ15 DQ23
DQ0 DQ24
DQ1 DQ25
DQ2 DQ26
DQ3 DQ27
DQ4 DQ28
DQ5 DQ29
DQ6 DQ30
DQ7 DQ31
1
CV392
2
0.1U_0402_25V6
C
DQB0_0
A4
DQB0_1
A2
DQB0_3
B4
DQB0_2
B2
DQB0_7
E4
DQB0_4
E2
DQB0_6
F4
DQB0_5
F2
DQB0_9
A11
DQB0_10
A13
DQB0_8
B11
DQB0_11
B13
DQB0_15
E11
DQB0_13
E13
DQB0_14
F11
DQB0_12
F13
DQB0_16
U11
DQB0_19
U13
DQB0_17
T11
DQB0_18
T13
DQB0_22
N11
DQB0_23
N13
DQB0_21
M11
DQB0_20
M13
DQB0_27
U4
DQB0_29
U2
DQB0_28
T4
DQB0_24
T2
DQB0_26
N4
DQB0_30
N2
DQB0_25
M4
DQB0_31
M2
+1.35V_MEM_GFX
B1
VDDQ
D1
VDDQ
F1
VDDQ
M1
VDDQ
P1
VDDQ
T1
VDDQ
G2
VDDQ
L2
VDDQ
B3
VDDQ
D3
VDDQ
F3
VDDQ
H3
VDDQ
K3
VDDQ
M3
VDDQ
P3
VDDQ
T3
VDDQ
E5
VDDQ
N5
VDDQ
E10
VDDQ
N10
VDDQ
B12
VDDQ
D12
VDDQ
F12
VDDQ
H12
VDDQ
K12
VDDQ
M12
VDDQ
P12
VDDQ
T12
VDDQ
G13
VDDQ
L13
VDDQ
B14
VDDQ
D14
VDDQ
F14
VDDQ
M14
VDDQ
P14
VDDQ
T14
VDDQ
A1
VSSQ
C1
VSSQ
E1
VSSQ
N1
VSSQ
R1
VSSQ
U1
VSSQ
H2
VSSQ
K2
VSSQ
A3
VSSQ
C3
VSSQ
E3
VSSQ
N3
VSSQ
R3
VSSQ
U3
VSSQ
C4
VSSQ
R4
VSSQ
F5
VSSQ
M5
VSSQ
F10
VSSQ
M10
VSSQ
C11
VSSQ
R11
VSSQ
A12
VSSQ
C12
VSSQ
E12
VSSQ
N12
VSSQ
R12
VSSQ
U12
VSSQ
H13
VSSQ
K13
VSSQ
A14
VSSQ
C14
VSSQ
E14
VSSQ
N14
VSSQ
R14
VSSQ
U14
VSSQ
1
1
CV390
2
0.1U_0402_25V6
1
CV391
2
2
0.1U_0402_25V6
0.1U_0402_25V6
BYTE0
BYTE1
BYTE2
CLKB1<54>
CLKB1#<54>
12
+1.35V_MEM_GFX+1.35V_MEM_GFX
RV645
60.4_0402_1%
12
RV644
60.4_0402_1%
BYTE3
+1.35V_MEM_GFX
+1.35V_MEM_GFX
2.37K_0402_1%
12
RV650
WCKB1_0#<54>
WCKB1_0<54>
GPU_DRAM_RST<54,55,56>GPU_DRAM_RST<54,55,56>
+1.35V_MEM_GFX
2
CV397
1
10U_0603_6.3V6M
WCKB1_1#<54>
WCKB1_1<54>
10U_0603_6.3V6M
+FBA_VREF_DQB1
5.49K_0402_1%
0.01U_0402_50V7K
12
RV651
CV1032
1
2
+1.35V_MEM_GFX
2.37K_0402_1%
12
RV653
+FBA_VREF_CB1
0.01U_0402_50V7K
5.49K_0402_1%
12
1
1
CV393
CV395
2
2
0.1U_0402_25V6
0.1U_0402_25V6
CV1033
RV652
1
2
1
CV394
CV396
2
0.1U_0402_25V6
ADBIB1<54>
CASB1#<54>
WEB1#<54>
RASB1#<54>
CSB1#_0<54>
2
CV187
1
EDCB1_0
EDCB1_1
EDCB1_2
EDCB1_3
DBIB1_0
DBIB1_1
DBIB1_2
DBIB1_3
CLKB1#
CKEB1
MAB1_8
MAB1_0
MAB1_1
MAB1_3
MAB1_2
MAB1_5
MAB1_4
MAB1_6
MAB1_7
12
RV131
1K_0402_1%
RV133
12
1K_0402_1%
RV135
12
121_0402_1%
ADBIB1
CASB1#
WEB1#
RASB1#
CSB1#_0
WCKB1_0#
WCKB1_0
WCKB1_1#
WCKB1_1
+FBA_VREF_DQB1
+FBA_VREF_CB1
GPU_DRAM_RST
+1.35V_MEM_GFX
1
CV188
2
1U_0603_25V6
1U_0603_25V6
UV20
C2
C13
R13
R2
D2
D13
P13
P2
J12
J11
J3
J5
K4
K5
K10
K11
H10
H11
H5
H4
A5
U5
J1
J10
J13
J4
G3
G12
L3
L12
D5
D4
P5
P4
A10
U10
J14
J2
G1
L1
G4
L4
C5
R5
C10
R10
D11
G11
L11
P11
G14
L14
H1
K1
B5
G5
L5
T5
B10
D10
G10
L10
P10
T10
H14
K14
K4G41325FC-HC04_FBGA170~D
1
1
CV202
CV201
2
2
1U_0603_25V6
D
DIS_X76@
MF=0 MF=1 MF=0MF=1
EDC0 EDC3
EDC1 EDC2
EDC2 EDC1
EDC3 EDC0
DBI0# DBI3#
DBI1# DBI2#
DBI2# DBI1#
DBI3# DBI0#
CK
CK#
CKE#
A12/A13
A8/A7 A10/A0
A11/A6 A9/A1
BA1/A5 BA3/A3
BA2/A4 BA0/A2
BA3/A3 BA1/A5
BA0/A2 BA2/A4
A9/A1 A11/A6
A10/A0 A8/A7
NC
NC
MF
SEN
ZQ
ABI#
RAS# CAS#
CS# WE#
CAS# RAS#
WE# CS#
WCK01# WCK23#
WCK01 WCK23
WCK23# WCK01#
WCK23 WCK01
VREFD
VREFD
VREFC
RESET#
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
170-BALL
SGRAM GDDR5
1
CV191
2
1U_0603_25V6
1
1
CV192
2
2
0.1U_0402_25V6
0.1U_0402_25V6
CV193
DQ24 DQ0
DQ25 DQ1
DQ26 DQ2
DQ27 DQ3
DQ28 DQ4
DQ29 DQ5
DQ30 DQ6
DQ31 DQ7
DQ16 DQ8
DQ17 DQ9
DQ18 DQ10
DQ19 DQ11
DQ20 DQ12
DQ21 DQ13
DQ22 DQ14
DQ23 DQ15
DQ8 DQ16
DQ9 DQ17
DQ10 DQ18
DQ11 DQ19
DQ12 DQ20
DQ13 DQ21
DQ14 DQ22
DQ15 DQ23
DQ0 DQ24
DQ1 DQ25
DQ2 DQ26
DQ3 DQ27
DQ4 DQ28
DQ5 DQ29
DQ6 DQ30
DQ7 DQ31
1
CV194
2
0.1U_0402_25V6
E
DQB1_7
A4
DQB1_0
A2
DQB1_5
B4
DQB1_1
B2
DQB1_4
E4
DQB1_2
E2
DQB1_6
F4
DQB1_3
F2
DQB1_13
A11
DQB1_14
A13
DQB1_12
B11
DQB1_15
B13
DQB1_11
E11
DQB1_8
E13
DQB1_10
F11
DQB1_9
F13
DQB1_20
U11
DQB1_23
U13
DQB1_22
T11
DQB1_21
T13
DQB1_19
N11
DQB1_18
N13
DQB1_16
M11
DQB1_17
M13
DQB1_30
U4
DQB1_31
U2
DQB1_28
T4
DQB1_29
T2
DQB1_25
N4
DQB1_27
N2
DQB1_24
M4
DQB1_26
M2
+1.35V_MEM_GFX
B1
VDDQ
D1
VDDQ
F1
VDDQ
M1
VDDQ
P1
VDDQ
T1
VDDQ
G2
VDDQ
L2
VDDQ
B3
VDDQ
D3
VDDQ
F3
VDDQ
H3
VDDQ
K3
VDDQ
M3
VDDQ
P3
VDDQ
T3
VDDQ
E5
VDDQ
N5
VDDQ
E10
VDDQ
N10
VDDQ
B12
VDDQ
D12
VDDQ
F12
VDDQ
H12
VDDQ
K12
VDDQ
M12
VDDQ
P12
VDDQ
T12
VDDQ
G13
VDDQ
L13
VDDQ
B14
VDDQ
D14
VDDQ
F14
VDDQ
M14
VDDQ
P14
VDDQ
T14
VDDQ
A1
VSSQ
C1
VSSQ
E1
VSSQ
N1
VSSQ
R1
VSSQ
U1
VSSQ
H2
VSSQ
K2
VSSQ
A3
VSSQ
C3
VSSQ
E3
VSSQ
N3
VSSQ
R3
VSSQ
U3
VSSQ
C4
VSSQ
R4
VSSQ
F5
VSSQ
M5
VSSQ
F10
VSSQ
M10
VSSQ
C11
VSSQ
R11
VSSQ
A12
VSSQ
C12
VSSQ
E12
VSSQ
N12
VSSQ
R12
VSSQ
U12
VSSQ
H13
VSSQ
K13
VSSQ
A14
VSSQ
C14
VSSQ
E14
VSSQ
N14
VSSQ
R14
VSSQ
U14
VSSQ
1
1
CV399
CV400
2
2
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
BYTE7
BYTE6
BYTE5
BYTE4
1
1
CV402
CV398
2
2
0.1U_0402_25V6
1
1
CV403
2
0.1U_0402_25V6
1
CV401
CV404
2
2
0.1U_0402_25V6
0.1U_0402_25V6
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size
Size
Size
Date: Sheet of
Date: Sheet of
A
B
C
D
Date: Sheet of
Compal Electronics, Inc.
GDDR5 VRAM B
GDDR5 VRAM B
Document Number Re v
Document Number Re v
Document Number Re v
GDDR5 VRAM B
LA-C841P
LA-C841P
LA-C841P
E
56 74Tuesday, September 08, 2015
56 74Tuesday, September 08, 2015
56 74Tuesday, September 08, 2015
0.1
0.1
0.1
Vinafix.com
5
4
3
2
1
+COINCELL
COIN RTC Battery
12
PR2
PD1
PBAT_PRES# <36,66,67>PBAT_SMBCLK <36>
PQ2
1 3
1
2
12
PESD5V0U2BT_SOT23-3
3
3
2
PC4
1500P_0402_50V7K
1
2
1K_0402_5%
+Z4012
2
+RTC_CELL
1
1
PC2
1U_0603_25V6K
2
DOCK_TNY_SMBUS_ALRT# <35,41>
PU1
NO
GND
NC3COM
TS5A63157DCKR_SC70-6~D
6
IN
5
V+
4
+COINCELL
+3.3V_RTC_LDO
D D
1
PD2
EMC@
TVNST52302AB0_SOT523-3
2
Primary Battery Connector
PBATT1
@
1
1
2
2
3
3
4
4
5
5
12
PC3
EMC@
2200P_0402_50V7K
C C
B B
6
6
7
7
8
8
9
9
10
10
11
GND
12
GND
DEREN_40-42251-01001RHF
NB_PSID
PBAT_SMBCLK_C
PBAT_SMBDAT_C
PBAT_PRES#_C
GND
2
3
PD6
PESD5V0U2BT_SOT23-3
1
PL4
EMC@
BLM15AG102SN1D_2P
EMC@
PRP1
100_0804_8P4R_5%
12
3
18
27
36
45
100K_0402_1%
15K_0402_1%
PR8
PR10
1
2
1 2
1 2
PD3
EMC@
TVNST52302AB0_SOT523-3
3
PBAT_SMBDAT <36>
PR5
@
1 2
0_0402_5%
1 3
D
G
2
C
2
B
E
3 1
PBATT+_C
PR7
33_0402_5%
1 2
S
PQ3
FDV301N-G_SOT23-3
PQ4
MMST3904-7-F_SOT323~D
PL2
EMC@
FBMJ4516HS720NT_2P
1 2
PL3
EMC@
FBMJ4516HS720NT_2P
1 2
+5V_ALW
12
PR9
10K_0402_1%
1 2
10K_0402_5%
PR11
@
+PBATT
SLICE_BAT_PRES#<35,41,67>
+3.3V_ALW
PR6
2.2K_0402_5%
1 2
+3.3V_ALW
12
PR3
100K_0402_5%
PD4
1 2
SDMK0340L-7-F_SOD323-2~D
DOCK_PSID<41>
NB_PSID_TS5A63157
PSID_DISABLE# <35>
PR4
@
1 2
0_0402_5%
2
3
1
BAS40CW SOT-323
DMG2301U-7 1P SOT23-3
EMC@
PD7
12
PC8
2200P_0402_50V7K
@EMC@
1
ACES_50271-0020N-001
GPIO_PSID_SELECT <35>
+5V_ALW
PS_ID <36>
JRTC1
@
3
1
G
4
22G
DC_IN+ Source
+DC_IN_SS
12
PC7
100K_0402_5%
10U_0805_25V6K
PC5
DCX124EK-7-F PNP/NPN_SC74-6~D
AC_DIS <35,66,67>
+DC_IN
1 2
0.022U_0805_50V7K
12
PR1
1M_0402_5%
EMC@
PL5
HCB2012KF-121T50_0805
1 2
EMC@
PL1
HCB2012KF-121T50_0805
1 2
PQ1B
@
PJPDC1
@
7
GND
6
GND
-DCIN_JACK-DCIN_JACK
5
5
4
4
+DCIN_JACK
3
3
A A
2
2
1
1
CVILU_CI0805M1HRC-NH
12
PC1
EMC@
1000P_0603_50V7K
12
PC6
@EMC@
0.1U_0603_25V7K
2
16
12
PR13
4.7K_0805_5%
@
DCX124EK-7-F PNP/NPN_SC74-6~D
@
PQ1A
4 3
5
FDMC6679AZ_MLP8-5
1
2
3 5
PR14
1 2
10K_0402_5%
12
PR15
1M_0402_5%
PQ5
4
SOFT_START_GC <67>
12
PR12
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, I NC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
2
Title
Size
Size
Size
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
+DCIN
+DCIN
+DCIN
Document Number Re v
Document Number Re v
Document Number Re v
LA-C841P
LA-C841P
LA-C841P
1
57 79Tuesday, September 08, 2015
57 79Tuesday, September 08, 2015
57 79Tuesday, September 08, 2015
0.1
0.1
0.1
Vinafix.com
A
1 1
+PWR_SRC
PJP100
PAD-OPEN 1x2m~D
2 2
21
+3.3V_ALW
PC100
0.1U_0402_25V6
@EMC@
12
PC103
2200P_0402_50V7K
@EMC@
PR107
100K_0402_5%
1 2
PGOOD_3V
12
3V_VIN
PC105
12
PC104
@
10U_0805_25V6K
10U_0805_25V6K
+PWR_SRC
PJP101
PR114
@
0_0402_5%
1 2
21
12
PAD-OPEN 1x2m~D
3 3
ALWON<36>
4 4
5V_VIN
12
12
12
PC116
PC115
0.1U_0402_25V6
@EMC@
PR116
1M_0402_1%
2200P_0402_50V7K
@EMC@
+3.3V_ALW
3V5V_EN
12
PC128
4.7U_0402_6.3V6M
PC117
10U_0805_25V6K
PC118
10U_0805_25V6K
PR113
100K_0402_5%
1 2
PGOOD_5V
EN1 and EN2 dont't floating
12
B
0.1U_0402_10V7K
PGOOD_3V
PGOOD_5V
BST_3V
2
EN112EN2
EN112EN2
IN
IN3IN4IN
FF13OUT14NC
PC113
1000P_0402_50V7K
3V_FB
2
1
IN
IN3IN4IN
FF13OUT14LDO
15
12
BS
GND
VCC
GND
1
BS
GND
LDO
GND
15
LX
LX
NC
5V_FB
20
LX
19
LX
NC
1 2
BST_5V
18
17
16
21
20
19
18
17
16
21
12
PR108
1K_0402_5%
1 2
@
1 2
0_0603_5%
PC119
1 2
4.7U_0603_6.3V6K
1 2
1 2
PC111
4.7U_0603_6.3V6K
PR111
+5V_ALW2
5V LDO 150mA~300mA
PC126
4.7U_0603_6.3V6K
PC127
1000P_0402_50V7K
1 2
1K_0402_5%
1 2
5
12
LX_3V
3V5V_EN
LX_5V
PU102
6
7
8
9
10
PU100
6
LX
7
GND
8
SY8288BRAC QFN 20P PWM
GND
9
PG
10
NC
11
ENLDO_3V5V
5
LX
GND
SY8286CRAC_QFN20_3X3
GND
PG
NC
11
3V5V_EN
ENLDO_3V5V
C
+3.3V_ALW
PC101
@
1 2
@
1 2
0_0603_5%
PR104
@
0_0402_5%
PR105
@
0_0402_5%
PR100
LX_3V
TC7SH08FU_SSOP5~D
5
PU101
@
1
P
B
O
2
A
G
3
+3.3V_ALW2
+3.3V_RTC_LDO
4
PC102
1 2
0.1U_0603_25V7K
3.3V LDO 150mA~300mA
PC114
1 2
0.1U_0603_25V7K
LX_5V
PR117
PR119
@
0_0402_5%
1 2
@
PR101
0_0402_5%
1 2
1 2
PR120
@
0_0402_5%
12
PR112
@EMC@
5V_SN
12
PC125
@EMC@
ALW_PWRGD_3V_5V <7>
PL100
1.5UH_PCMC063T-1R5MN_9A_20%
1 2
PR106
12
Update PH401 change
to Common Part
4.7_1206_5%
SH000016800 20141202
@EMC@
3V_SN
12
PC112
680P_0603_50V7K
@EMC@
12
PR109
@
150K_0402_1%
12
PR110
@
150K_0402_1%
PL101
2.2UH +-20% 7.8A 7X7X3 MOLDING
1 2
Update PH401 change
to Common P art
4.7_1206_5%
SH000016800 20141202
680P_0603_50V7K
ENLDO_3V5V
12
PR115
@
150K_0402_1%
12
PR118
@
150K_0402_1%
D
PR102
499K_0402_1%
1 2
12
PR103
499K_0402_1%
12
12
PC106
22U_0805_6.3V6M
12
12
PC107
PC108
22U_0805_6.3V6M
22U_0805_6.3V6M
Vout is 3.234V~3.366V
+3.3V_ALWP +3.3V_ALW
12
12
12
PC121
PC120
22U_0805_6.3V6M
22U_0805_6.3V6M
+PWR_SRC
12
12
PC110
PC109
22U_0805_6.3V6M
22U_0805_6.3V6M
12
PC123
PC122
22U_0805_6.3V6M
22U_0805_6.3V6M
E
+3.3V_ALWP
PC129
@
22U_0805_6.3V6M
PJP102
2
112
JUMP_43X118
PJP103
112
JUMP_43X118
2
+5V_ALW+5V_ALWP
+5V_ALWP
12
12
PC124
PC130
@
22U_0805_6.3V6M
22U_0805_6.3V6M
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
Title
Size
Size
Size
Date : Sheet o f
Date : Sheet o f
Date : Sheet o f
Compal Electronics, Inc.
+5V_ALW/3.3V_ALW
+5V_ALW/3.3V_ALW
+5V_ALW/3.3V_ALW
Document Number Re v
Document Number Re v
Document Number Re v
LA-C841P
LA-C841P
LA-C841P
58 79Tuesday, September 08, 2015
58 79Tuesday, September 08, 2015
58 79Tuesday, September 08, 2015
E
0.1
0.1
0.1
Vinafix.com
5
4
3
2
1
D D
+PWR_SRC
+1.2V_MEN_P
C C
B B
12
12
12
PC218
PC220
22U_0603_6.3V6M
22U_0603_6.3V6M
PJP202
PAD-OPEN 1x2m~D
12
PC216
PC217
22U_0603_6.3V6M
22U_0603_6.3V6M
1.2V_B+
21
12
12
PC201
10U_0805_25V6K
PC215
22U_0603_6.3V6M
PL201
1 2
12
PC219
22U_0603_6.3V6M
1UH_PCMB063T-1R0MS_12A_20%
12
PC202
@
10U_0805_25V6K
12
SNUB_1.2V
12
12
PC203
2200P_0402_50V7K
@EMC@
AON6994 2N DFN5X6D
PR204
4.7_1206_5%
@EMC@
PC211
680P_0603_50V7K
@EMC@
SIO_SLP_S4#<11,20,36,37,71>
12
PC204
@EMC@
PQ201
0.1U_0402_25V6
S2
3
PR208
1 2
0_0402_5%
PR202
1 2
2.2_0603_5%
12
PC205
0.22U_0603_16V7K
7
1D12
G1
S1/D2
S2
G26S2
4
5
PR205
1 2
5.1_0603_5%
+5V_ALW
BOOT_1.2V
PR203
5.1K_0402_1%
1 2
1U_0603_10V6K
PC209
1U_0603_10V6K
DH_1.2V
SW_1.2V
DL_1.2V
PC207
VDD_1.2V
CS_1.2V
12
PR201
2.2_0603_5%
PU201
15
LGATE
14
PGND
13
CS
12
VDDP
11
VDD
+VLDOIN_1.2V
16
18
17
PHASE
RT8207PGQW_WQFN20_3X3
PGOOD
9
10
19
BOOT
UGATE
VLDOIN
S5
S3
TON
8
7
20
VTT
PAD
VTTGND
VTTSNS
GND
VTTREF
VDDQ
FB
6
1.2V_FB
+5V_ALW
PR207
1 2
453K_0402_1%
PR210
1 2
0_0402_5%
12
PC214
@
.1U_0402_16V7K
1.2V_B+
S5_1.2V
0.6V_DDR_VTT_ON<14>
PJP203
1 2
PAD-OPEN1x1m
21
1
2
3
+V_DDR_REF
4
5
+1.2V_MEN_P
12
PC206
22U_0603_6.3V6M
+1.2V_MEN_P
FB sense trace
when FB pull down to GND
PR206
12K_0402_1%
1 2
PC212
100P_0402_50V8J
1 2
12
PR209
20K_0402_1%
12
PC213
@
.1U_0402_16V7K
+0.6V_P
+V_DDR_REF
PC210
0.033U_0402_16V7K
+1.2V_MEN_P
FB sense trace
PJP204
2
112
JUMP_1x3m
A A
+1.2V_MEN_P
5
4
PJP201
112
JUMP_1x3m
2
+1.2V_MEM
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
+0.6V_P
3
PJP205
1 2
PAD-OPEN1x1m
+0.6V_DDR_VTT
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size
Size
Size
Date : Sheet o f
Date : Sheet o f
Date : Sheet o f
Compal Electronics, Inc.
+1.2V_MEN/+0.6V_DDR_VTT
+1.2V_MEN/+0.6V_DDR_VTT
+1.2V_MEN/+0.6V_DDR_VTT
Document Number Re v
Document Number Re v
Document Number Re v
LA-C841P
LA-C841P
LA-C841P
59 79Tuesday, September 08, 2015
59 79Tuesday, September 08, 2015
59 79Tuesday, September 08, 2015
1
0.1
0.1
0.1
Vinafix.com
5
D D
4
3
PR312
0_0402_5%
1 2
2
SIO_SLP_SUS# <11,20,36,44,62>
1
EN_+1VALWP
PL302
EMC@
FBMA-L11-201209-121LMA50T_0805
1 2
PJP301
@
21
C C
PAD-OPEN 1x2m~D
12
12
PC301
PC303
0.1U_0402_25V6
2200P_0402_50V7K
@EMC@
@EMC@
10U_0805_25V6K
12
PC305
EMC@
+1VALWP_B+
12
PC306
10U_0805_25V6K
ILMT_+1VALWP
+3.3V_ALW
12
PR307
@
0_0402_5%
ILMT_+1VALWP
12
PR310
@
0_0402_5%
B B
The current limit is set to 8A, 12A or 16A when this pin
is pull low, floating or pull high
PU301
8
IN
EN
GND
ILMT
PG
BS
LX
FB
BYP
LDO
9
3
2
SYX198DQNC_QFN10_3X3
1
BST_+1VALWP
6
10
4
7
5
12
0.1U_0603_25V7K
1 2
SW_+1VALWP
12
PC312
PC313
4.7U_0603_6.3V6K
PC304
BST_+1VALWP_C
+3.3V_ALW
4.7U_0603_6.3V6K
12
PR304
2.2_0603_5%
1 2
1M_0402_1%
PR302
PR303
EMC@
4.7_1206_5%
1 2
PL301
0.68UH_MMD-05CZ-R68M-X2L_8.5A_20%
1 2
FB_+1VALWP
EMC@
SNB_+1VALWP
12
PR306
9.09K_0402_1%
12
PR311
13.3K_0402_1%
PC302
680P_0603_50V7K
1 2
12
PC307
12
330P_0402_50V7K
PR308
1K_0402_5%
+1VALWP
12
12
PC308
47U_0805_6.3V6M
PJP302
2
112
JUMP_43X118
+1.0V_PRIM
+1VALWP
12
12
PC310
PC309
@
47U_0805_6.3V6M
PC311
22U_0805_6.3VAM
22U_0805_6.3VAM
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE C USTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
3
2
Size
Size
Size
Date : Sheet o f
Date : Sheet o f
Date : Sheet o f
Compal Electronics, Inc.
+1VALWP
+1VALWP
+1VALWP
Document Number Re v
Document Number Re v
Document Number Re v
LA-C841P
LA-C841P
LA-C841P
60 79Tuesday, September 08, 2015
60 79Tuesday, September 08, 2015
60 79Tuesday, September 08, 2015
1
0.1
0.1
0.1
Vinafix.com
5
4
3
2
1
D D
PJP402
21
+3.3V_ALW
12
PR401
@
0_0402_5%
ILMT_1VS_VCCIO
12
PR408
C C
@
0_0402_5%
The current limit is set to 6A, 9A or 12A when this pin
is pull low, f loating or pull high
PAD-OPEN 1x2m~D
12
12
PC407
PC405
@EMC@
2200P_0402_50V7K
PC404
@
10U_0805_25V6K
@EMC@
0.1U_0402_25V6
B+_1VS_VCCIO
12
12
PC408
10U_0805_25V6K
ILMT_1VS_VCCIO
EN pin don't floating
If have pull do wn resistor at HW side, pls delete PR2
12
12
PC415
+3.3V_ALW
4.7U_0603_6.3V6K
@
0.1U_0402_16V7K
PC406
0.1U_0603_25V7K
1 2
PU401
8
IN
EN
BS
9
LX
GND
FB
3
BYP
ILMT
2
PG
LDO
SYX196DQNC_QFN10_3X3
1M_0402_1%
PR403
1
BST_1VS_VCCIO BST_1VS_VCCIO_C
6
10
4
7
5
Pin 7 BYP is for CS.
Common NB can delete +3VALW and PC15
LX_1VS_VCCIO
12
PC413
4.7U_0603_6.3V6K
PR405
0_0603_5%
1 2
12
PC414
PR402
0_0402_5%
1 2
PR417
@
0_0402_5%
1 2
PR404
@EMC@
4.7_1206_5%
1 2
1UH_PCMB042T-1R0MS_4.5A_20%
1 2
FB = 0.6V
RUN_ON <36,44>
SIO_SLP_S3# <11,20,36,37,46,62>
PC403
@EMC@
SNB_1VS_VCCIO
Rdow n
680P_0603_50V7K
1 2
PL401
12
12
PR410
1K_0402_5%
12
PR409
17.4K_0402_1%
VFB=0.6V
Vout=0.6V* (1+Rup/Rdown)
PC409
330P_0402_50V7K
PR413
10.2K_0402_1%
1 2
Rup
12
PR414
10_0402_1%
12
PC410
PR415
0_0402_1%
1 2
PR416
0_0402_1%
1 2
22U_0805_6.3VAM
12
PC411
12
PC412
22U_0805_6.3VAM
22U_0805_6.3VAM
VCC_IO_SENSE <11>
VSS_IO_SENSE <11>
PJP401
2
112
JUMP_43X118
12
PC401
22U_0805_6.3VAM
Vout=0.95V
B B
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
3
2
Title
Size
Size
Size
Date: Sheet o f
Date: Sheet o f
Date: Sheet o f
Compal Electronics, Inc.
+1VS_VCCIO
+1VS_VCCIO
+1VS_VCCIO
Document Number Rev
Document Number Rev
Document Number Rev
LA-C841P
LA-C841P
LA-C841P
1
61 79Tuesday, September 08, 2015
61 79Tuesday, September 08, 2015
61 79Tuesday, September 08, 2015
0.1
0.1
0.1
Vinafix.com
5
D D
4
3
2
PJP502
JUMP_43X79
+1.8VALWP
112
1
2
+1.8V_PRIM
PC502
22U_0603_6.3V6M
1 2
PJP501
JUMP_43X79
PR505
1M_0402_1%
112
12
+3.3V_ALW
PR504
SIO_SLP_SUS#<11,20,36,44,60>
C C
1 2
0_0402_5%
Note :
When design Vin=5V, please stuff snubber
to prevent Vin damage
2
12
@
0.1U_0402_16V7K
VIN_1.8VALW
EN_1.8VALW
PC505
PU501
SY8032ABC_SOT23-6
4
IN
LX
5
PG
GND
FB6EN
3
2
1
LX_1.8VALW
Imax= 2A, Ipeak= 3A
FB=0 .6V
PL501
1UH_1277AS-H-1R0N-P2_3.3A_30%
1 2
12
@EMC@
4.7_0603_5%
PR502
PR501
20K_0402_1%
12
Rup
SNUB_1.8VALW
12
@EMC@
680P_0402_50V7K
FB_1.8VALW
PC506
PR506
10K_0402_1%
12
Rdown
Vout=0.6V* (1+Rup/Rdown)
+1.8VALWP
12
12
PC503
68P_0402_50V8J
12
PC501
PC504
22U_0603_6.3V6M
22U_0603_6.3V6M
+3.3V_RUN
+5V_ALW
PAD-OPEN1x1m
12
PC507
1U_0402_6.3V6K
B B
SIO_SLP_S3#<11,20,36,37,46,61>
+3.3V_RUN
100K_0402_5%
@
PR507
1 2
PR509
47K_0402_5%
PR511
47K_0402_5%
1 2
12
12
PU502
7
POK
8
EN
PC510
@EMC@
.1U_0402_16V7K
6
VIN
VOUT
VCNTL
VOUT
FB
VIN
GND
1
AP7175SP-13_SO-8EP-8
5
4
3
2
9
PJP503
12
+1.5V_VIN
12
PC508
4.7U_0805_6.3V6K
PR508
8.87K_0402_1%
12
12
PR510
10.2K_0402_1%
1.5VSP
12
0.01U_0402_25V7K
PC509
PAD-OPEN1x1m
12
PC511
22U_0805_6.3V6M
PJP504
1 2
+1.5V_RUN
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
3
2
Title
Size
Size
Size
Date: Sheet o f
Date: Sheet o f
Date: Sheet o f
Compal Electronics, Inc.
+1.8VALWP/+1.5VSP
+1.8VALWP/+1.5VSP
+1.8VALWP/+1.5VSP
Document Number Rev
Document Number Rev
Document Number Rev
LA-C841P
LA-C841P
LA-C841P
1
62 79Tuesday, September 08, 2015
62 79Tuesday, September 08, 2015
62 79Tuesday, September 08, 2015
0.1
0.1
0.1
Vinafix.com
5
4
3
2
1
H_PROCHOT#<7,36,51,66,67>
12
12
PR608
0_0402_5%
1 2
1 2
1 2
PR646
10.5K_0402_1%
1 2
PC637
68P_0402_50V8J
PR602
45.3_0402_1%
VR_SVID_CLK_A
VR_SVID_ALERT#_A
VR_SVID_DATA_A
PR617
1 2
1.91K_0402_1%
PR622
0_0402_5%
1 2
12
PR630
0_0402_5%
12
1 2
12
PR603
@
75_0402_1%
PR625
0_0402_5%
1 2
1
PSYS
2
IMON_B
3
NTC_B
4
COMP_B
5
FB_B
6
RTN_B
7
ISUMP_B
8
ISUMN_B
9
ISEN1_B
10
ISEN2_B
11
FCCM_B
12
PWM1_B
49
EP
PR652
3.6K_0402_1%
PC639
2200P_0402_25V7K
PR604
D D
VR_SVID_CLK<7>
PR610 0_0402_5%
PR616
10.5K_0402_1%
1 2
12
PR627
1K_0402_1%
PC620
1 2
2200P_0402_50V7K
PC627
1 2
PC629
0.022U_0402_25V7K
1 2
PC636
1 2
330P_0402_50V7K
VR_SVID_ALERT#<7>
PR6130_0402_5%
VR_SVID_DATA<7>
+3.3V_RUN
PCH_PWROK<20>
IMVP_VR_ON<36>
I_SYS<36,66>
ISEN2_GT <65>
ISEN1_GT <65>
PH605
PR649
1 2
27.4K_0402_1%
12
470K_0402_5%_TSM0B474J4702RE
PR612
1 2
100K_0402_1%
PC606
1 2
330P_0402_50V7K
PC607
1 2
68P_0402_50V8J
PR623
PC608
1 2
1 2
12
PR636
12
2.61K_0402_1%
10K_0402_5%_ERTJ0ER103J
PH604
4.87K_0402_1%
12
PR637
11K_0402_1%
2200P_0402_25V7K
C C
ISUMP_GT<65>
ISUMN_GT<65>
B B
FCCM_GT<65>
PWM1_GT<65>
PWM2_GT<65>
A A
VCC_GT_SENSE<1 2>
VSS_GT_SENSE<12>
12
PC618
12
1 2
PH602
470K_0402_5%_TSM0B474J4702RE
1 2
PR615
27.4K_0402_1%
PC609
680P_0402_50V7K
+VCC_GT
680P_0402_50V7K
12
PR707
100_0402_1%
12
12
PC615
PR708
0.01UF_0402_25V7K
100_0402_1%
12
PC619
.1U_0402_16V7K
0.033U_0402_16V7K
PC625
.1U_0402_16V7K
PR648
95.3K_0402_1%
12
PC610
1 2
PR633
2.94K_0402_1%
1 2
1K_0402_1%
12
PR624
2K_0402_1%
1 2
12
PR639
PR641
1 2
402_0402_1%
0.022U_0402_25V7K
1 2
100_0402_1%
12
PC603
0.1U_0402_25V6
1 2
1 2
1 2
46
47
48
VR_READY
VR_ENABLE
PWM2_B13NTC_A15COMP_A16FB_A17RTN_A18ISUMP_A19ISUMN_A
IMON_A
14
PR6110_0402_5%
PR61410_0402_1%
44
45
SCLK
VR_HOT#
12
12
12
47P_0402_50V8J~D
PR60949.9_0402_1%
VR_SVID_CLK_B
41
42
43
VIN
SDA
VCC
ALERT#
20
2200P_0402_50V7K
PR650
2K_0402_1%
PC638
680P_0402_50V7K
VR_SVID_ALERT#_B
40
PC602
PR605
VR_SVID_DATA_B
39
ISEN1_A21ISEN2_A22ISEN3_A23FCCM_A
PC633
1 2
12
0_0402_5%
38
PROG2
PROG3
+5V_ALW
CPU_B++1.0V_VCCST
12
12
PR607
PR606
0_0402_5%
1_0402_5%
0.22U_0603_16V7K
PU601
ISL95855HRTZ-TS2778 TQFN48 CPU CODE
PROG437PROG1
36
PROG5
35
PWM_C
34
FCCM_C
33
ISUMN_C
32
ISUMP_C
31
RTN_C
30
FB_C
29
COMP_C
28
IMON_C
27
PWM3_A
26
PWM2_A
25
PWM1_A
24
PR653
0_0402_5%
1 2
ISEN2_VCORE<64>
PR642
1 2
412_0402_1%
PR644
1 2
1K_0402_1%
ISEN1_VCORE<64>
1 2
PR647
1K_0402_1%
PC604
1U_0402_6.3V6K
1 2
1 2
PC605
12
PR651
2.15K_0402_1%
12
12
PR619
PR618
16.9K_0402_1%
165K_0402_1%
PR628
48.7K_0402_1%
1 2
+5V_ALW
PC628 0.022U_0402_25V7K
PC630 0.022U_0402_25V7K
12
PC634
680P_0402_50V7K
12
12
PR620
20.5K_0402_1%
PWM_SA <65>
FCCM_SA <65>
PWM2_VCORE <64>
PWM1_VCORE <64>
FCCM_VCORE <64>
1 2
1 2
PR621
110K_0402_1%
PR640
110K_0402_1%
PC611
2200P_0402_50V7K
12
PR626
1.1K_0402_1%
1 2
12
12
PC622
PR629
330P_0402_50V7K
12
1K_0402_1%
12
12
PR709
+VCC_SA
ISUMN_SA <65>
ISUMP_SA <65>
VCC_SA_SENSE <11>
100_0402_1%
12
PR710
100_0402_1%
VSS_SA_SENSE <11>
12
PC617
0.01UF_0402_25V7K
12
10K_0402_5%_ERTJ0ER103J
PR634
PR631
11K_0402_1%
1 2
2.74K_0402_1%
12
1 2
PC616
1500P_0402_50V7K
PR635
PH603
PR632
2.61K_0402_1%
12
12
PC621
68P_0402_50V8J
PC613
12
PR601
4.53K_0402_1%
12
PC623
2200P_0402_50V7K
PC612
@
.1U_0402_16V7K
12
12
PC614
6800P_0402_25V7K
0.033U_0402_16V7K
1 2
316_0402_1%
12
PR638
2K_0402_1%
12
PC624
330P_0402_50V7K
ISUMN_VCORE <64>
3.6K_0402_1%
ISUMP_VCORE <64>
VCC_SENSE <12>
12
PC631
12
.1U_0402_16V7K
VSS_SENSE <12>
12
PC635
0.01UF_0402_25V7K
12
12
12
PC601
PC632
0.033U_0402_16V7K
.1U_0402_16V7K
PR643
11K_0402_1%
10K_0402_5%_ERTJ0ER103J
PH601
12
PR645
DELL CONFIDENTIAL/PROPRIETARY
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
VCORE_ISL95855
VCORE_ISL95855
VCORE_ISL95855
Size
Size
Size
Document Number Rev
Document Number R ev
Document Number R ev
LA-C841P
LA-C841P
1
LA-C841P
Date: Sheet of
Date: Sheet of
Date: Sheet of
63 79Tuesday, September 08, 2015
63 79Tuesday, September 08, 2015
63 79Tuesday, September 08, 2015
0.1
0.1
0.1
Vinafix.com
5
D D
+PWR_SRC
CPU_B+
rating 9A
PL602
EMC@
1 2
FBMA-L11-453215800LMA90T_2P
PJP601
@
2
112
JUMP_43X118
1
1
12
+
+
PC647
PC648
PC646
PC645
2
2
@
10U_0805_25VAK
10U_0805_25VAK
100U_D_20VM_R55M
100U_D_20VM_R55M
FCCM_VCORE<63,64>
12
12
12
12
PC649
10U_0805_25VAK
PC651
PC650
@EMC@
0.1U_0402_25V6
2200P_0402_50V7K
@EMC@
Polymer cap for noise issue
+5V_RUN
C C
PC654
4.7U_0402_6.3V6M
PR668
FCCM_VCORE<63,64>
12
12
12
12
12
PC699
PC700
10U_0805_25VAK
10U_0805_25VAK
B B
PC702
PC701
10U_0805_25VAK
@EMC@
0.1U_0402_25V6
0_0402_5%
1 2
PC684
1 2
0.22U_0603_16V7K
1 2
PR666
4.7_0603_5%
PC703
2200P_0402_50V7K
@EMC@
+5V_RUN
PC653
12
4.7U_0402_6.3V6M
PR658
0_0402_5%
1 2
PC642
1 2
0.22U_0603_16V7K
1 2
PR656
4.7_0603_5%
12
PR664
1_0402_5%
12
4
12
PR655
1_0402_5%
PR674
0_0402_5%
1 2
PU603
1
ZCD_EN#
2
VCIN
3
NC
4
BOOT
5
PHASE
PR673
0_0402_5%
1 2
PU602
1
ZCD_EN#
2
VCIN
3
NC
4
BOOT
5
PHASE
12
11
13GL9
PWM
CGND
VIN6PGND
VIN6PGND
PC683
1 2
4.7U_0402_6.3V6M
10
VDRV
PGND
VSWH
7
PC641
1 2
4.7U_0402_6.3V6M
PR654
1 2
0_0402_5%
PT1@
PAD~D
SIC530CDT1GE_POWERPAKMLP22-13
12
11
13GL9
10
PWM
VDRV
PGND
CGND
8
VSWH
PR657
7
10_1206_5%
@EMC@
PC652
@EMC@
33P_0603_50V8J
PR665
1 2
PWM2_VCORE <63>
0_0402_5%
PT2@
PAD~D
SIC530CDT1GE_POWERPAKMLP22-13
8
12
PR667
10_1206_5%
@EMC@
VCC_CORE_SNUB2
12
PC704
33P_0603_50V8J
@EMC@
PWM1_VCORE <63>
12
VCC_CORE_SNUB1
12
SW1_VCC_CORE
3.65K_0603_1%
1 2
ISUMP_VCORE
SW2_VCC_CORE
3.65K_0603_1%
PR659
PR669
1 2
ISUMP_VCORE
3
CORE_V2N
0.15UH_MMD06CZER15MG_37A_20%
4
3
PR660
100K_0402_1%
1 2
ISEN1_VCORE<63>
@
PR662
100K_0402_1%
1 2
<63,64>
0.15UH_MMD06CZER15MG_37A_20%
4
3
PR670
100K_0402_1%
1 2
ISEN2_VCORE<63>
@
PR672
100K_0402_1%
CORE_V1N
1 2
<63,64>
PL603
PL604
1
2
1
2
CORE_V1N
CORE_V2N
2
VCC_c ore
TDC 49A
Peak Current 60A
OCP current 72A
Choke DCR 0.9 +-7%m ohm
1
+VCC_CORE
PR661
1 2
10_0402_1%
<63,64>
ISUMN_VCORE
PR671
1 2
10_0402_1%
<63,64>
ISUMN_VCORE
A A
DELL CONFIDENTIAL/PROPRIETARY
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
VCORE
VCORE
VCORE
Size
Document Number Rev
Size
Document Number Rev
Size
Document Number Rev
LA-C841P
LA-C841P
Date: Sheet of
Date: Sheet of
Date: Sheet of
LA-C841P
64 79Tuesday, September 08, 2015
64 79Tuesday, September 08, 2015
64 79Tuesday, September 08, 2015
1
0.1
0.1
0.1
Vinafix.com
5
4
3
2
1
12
13GL9
CGND
VIN6PGND
13GL9
VIN6PGND
112
11
PWM
12
CGND
PC776
1 2
4.7U_0402_6.3V6M
PR684
1 2
0_0402_5%
PT3@
PAD~D
SIC530CDT1GE_POWERPAKMLP22-13
10
VDRV
PGND
8
VSWH
7
PC784
1 2
4.7U_0402_6.3V6M
PR694
1 2
0_0402_5%
PT4@
PAD~D
SIC530CDT1GE_POWERPAKMLP22-13
11
10
PWM
VDRV
PGND
8
VSWH
7
12
12
12
PC792
PC791
PC793
@EMC@
0.1U_0402_25V6
2200P_0402_50V7K
@EMC@
10U_0805_25VAK
DL_VCC_SA
PWM1_GT <63>
PR687
@EMC@
PC780
@EMC@
PWM2_GT <63>
@EMC@
PC790
@EMC@
DH_VCC_SA
12
PC794
10U_0805_25VAK
SW1_VCC_GT
12
4.7_1206_5%
VCC_GT_SNUB1
12
680P_0603_50V7K
12
PR696
4.7_1206_5%
VCC_GT_SNUB2
12
680P_0603_50V7K
12
PC795
10U_0805_25VAK
3.65K_0603_1%
ISUMP_GT
SW2_VCC_GT
3.65K_0603_1%
ISUMP_GT
1D12
S2
S2
4
3
PR689
1 2
GT_V2N
<63,65>
PR698
1 2
GT_V1N
<63,65>
PQ601
7
AON6994 2N DFN5X6D
G1
S1/D2
G26S2
5
PL607
0.15UH_MMD06CZER15MG_37A_20%
4
3
PR690
100K_0402_1%
1 2
ISEN1_GT<63>
@
PR692
100K_0402_1%
1 2
PL608
0.15UH_MMD06CZER15MG_37A_20%
4
3
PR699
100K_0402_1%
1 2
ISEN2_GT<63>
@
PR701
100K_0402_1%
1 2
12
PR704
@EMC@
VCC_SA_SNUB
12
PC797
@EMC@
+VCC_GT
1
GT_V1N
2
PR691
1 2
10_0402_1%
<63,65>
ISUMN_GT
1
GT_V2N
2
PR700
1 2
10_0402_1%
<63,65>
ISUMN_GT
PL609
0.47UH_MMD05CZR47M_12A_20%
1
2
12
PR705
3.65K_0603_1%
4.7_1206_5%
680P_0603_50V7K
SW_VCC_SA
ISUMP_SA<63>
ISUMN_SA<63>
VCC_GT
TDC 41A
Peak Current 55A
OCP current 66A
Choke DCR 0.9 +-7%m ohm
VCC_SA
TDC 10A
Peak Current 11.1A
OCP current 13.32A
Choke DCR 6.2+-5%m ohm
+VCC_SA
4
3
PR683
0_0402_5%
1 2
PR675
0_0402_5%
12
12
12
PR685
1_0402_5%
12
PR693
1_0402_5%
+5V_RUN
PC796
1 2
4.7U_0402_6.3V6M
0.22U_0603_16V7K
1 2
PU606
1
ZCD_EN#
2
VCIN
3
NC
4
BOOT
5
PHASE
PR676
0_0402_5%
1 2
PU605
1
ZCD_EN#
2
VCIN
3
NC
4
BOOT
5
PHASE
PJP603
2
JUMP_43X118
FCCM_SA <63>
PC798
1 2
+5V_RUN
+PWR_SRC
rating 9A
PL606
@EMC@
D D
1 2
FBMA-L11-453215800LMA90T_2P
PJP602
2
112
JUMP_43X118
VCCGT_B+
12
12
12
PC782
PC781
10U_0805_25VAK
12
PC778
PC779
10U_0805_25VAK
@EMC@
10U_0805_25VAK
0.1U_0402_25V6
FCCM_GT<63,65>
12
4.7U_0402_6.3V6M
0.22U_0603_16V7K
2.2_0603_5%
PC783
2200P_0402_50V7K
@EMC@
PC655
PR688
0_0402_5%
1 2
PC777
1 2
1 2
PR686
+5V_RUN
C C
PC656
4.7U_0402_6.3V6M
PR697
0_0402_5%
FCCM_GT<63,65>
1 2
PC785
1 2
0.22U_0603_16V7K
1 2
PR695
2.2_0603_5%
12
PC786
PC775
10U_0805_25VAK
10U_0805_25VAK
B B
PR703
0_0402_5%
PWM_SA<63>
A A
1 2
12
12
12
PC787
10U_0805_25VAK
BST_VCC_SA
12
PC788
@EMC@
0.1U_0402_25V6
PU607
ISL95808HRZ-TS2778 DFN MOSFET DRIVE
1
UGATE
2
BOOT
3
PWM
GND4LGATE
TP
9
PC789
@EMC@
PHASE
FCCM
VCC
1 2
2.2_0603_5%
2200P_0402_50V7K
PR706
8
7
6
5
+PWR_SRC
PR702
0_0402_5%
1 2
BST_VCC_SA_C
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, I NC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
2
Title
Size
Size
Size
Date: Sheet o f
Date: Sheet o f
Date: Sheet o f
Compal Electronics, Inc.
VGT_VSA
VGT_VSA
VGT_VSA
Document Number Rev
Document Number Rev
Document Number Rev
LA-C841P
LA-C841P
LA-C841P
1
65 79Tuesday, September 08, 2015
65 79Tuesday, September 08, 2015
65 79Tuesday, September 08, 2015
0.1
0.1
0.1
Vinafix.com
A
+DC_IN_SS
SDMK0340L-7-F_SOD323-2~D
PD805
PD@
12
1M_0402_5%
12
PR842
1M_0402_5%
PQ809
PR827
1K_0402_5%
PR829
@
154K_0402_1%
PD@
2
G
12
PR837
1M_0402_1%
12
BQ24770_REGN
12
12
+SDC_IN
PR844
PD@
2
13
D
S
12
100K_0402_1%
154K_0402_1%
1 1
PD@
PR843
CHARGER_SMBCLK
CHARGER_SMBDAT
pull up 10K in HW side (R827 R828)
2 2
ACAV_IN<36,67>
AC_DIS<35,57,67>
DMN65D8LW-7_SOT323-3
3 3
PQ802
SI4835DDY-T1-GE3_SO8
8
7
5
PR841
1 2
0_0402_5%
1M_0402_5%
61
PQ812A
PD@
PR845
DMN65D8LDW-7_SOT363-6
PD@
BQ24770_REGN
12
PR801
12
PR817
4
1 2
12
1M_0402_5%
1
2
36
PR803
@PD@
100K_0402_5%
3
5
4
DC_BLOCK_GC<66,67>
I_ADP<36>
I_BATT<36>
I_SYS<36,63>
H_PROCHOT#<7,36,51,63,67>
PBAT_PRES#<36,57,67>
12
12
PC838
PR846
@PD@
1M_0402_5%
@PD@
DC_BLOCK_GC <66,67>
PR849
@PD@
1 2
0_0402_5%
DCIN_ACOK# <73>
PQ812B
PD@
DMN65D8LDW-7_SOT363-6
CHARGER_SMBDAT<36>
CHARGER_SMBCLK<36>
PR8160_0402_5%
1 2
PR819
1 2
PR820
1 2
0.022U_0603_50V7K
AO3409 P-CHANNEL SOT-23
6.49K_0402_1%
0_0402_5%
0_0402_5%
S
@PD@
PQ813
G
2
D
1 3
2
G
PR813
PC815
12
0.1U_0402_25V6
PC823
0_0402_5%
1 2
12
PR847
100K_0402_5%
12
PR848
100K_0402_5%
13
D
S
12
1 2
100P_0402_50V8J
PR828
@PD@
@PD@
CSS_GC<67,73>
+DOCK_PWR_BAR
PQ814
SDMK0340L-7-F_SOD323-2~D
+DC_IN_SS
@PD@
SDMK0340L-7-F_SOD323-2~D
DMN65D8LW-7_SOT323-3
SDMK0340L-7-F_SOD323-2~D
SDMK0340L-7-F_SOD323-2~D
+SDC_IN
PR812
34K_0402_1%
1 2
PC824
PR822
1 2
@
100P_0402_50V8J
28.7K_0402_1%
B
+SDC_IN
PR802
0.01_1206_1%
1
4
3
D
S
PR805
100_0402_1%
PC809
0_0402_5%
0.1U_0402_25V6
1 2
4
2
ACP
ACDRV
PR822
UMA@
2
CSSN
13
2
G
CSSN_1
12
12
PR807
PC810
0.1U_0402_25V6
1
ACN
REGN
BTST
HIDRV
PHASE
LODRV
GND
NC
SRP
SRN
/BATDRV
BAT
22K_0402_1%
D
PQ803
DMP3056L-7 1P SOT23-3
S
DMP3056L-7 1P SOT23-3
CSSN_1 <73>CSSP_1 <73>
PR808
100K_0402_1%
0_0402_5%
1 2
24
2.2_0603_5%
1 2
25
26
27
23
22
PR821
21
1 2
10K_0402_1%
20
19
18
1 2
17
PR826
10_0603_1%
1 2
PC828
1U_0603_25V6K
PR822
DSC@
PQ804
S
G
2
12
BQ24770_REGN
PR814
PR825
4.02K_0402_1%
1 2
D
13
PR809
100K_0402_1%
0.047U_0603_16V7K
BQ24770_REGN
@
12
12
12
12
PR811
12
1 2
12
PC802
0.1U_0603_25V7K
PQ801
DMP3056L-7 1P SOT23-3
PC808
1U_0603_25V6K
1 2
12
+DCIN
28
3
6
11
12
5
7
8
9
10
CMPIN
13
CMPOUT
14
15
16
29
CSSP
13
2
G
CSSP_1
12
PR806
PU801
VCC
CMSRC
ACDET
SDA
SCL
ACOK
IADP
IDCHG
ISYS
/PROCHOT
CMPIN
CMPOUT
/BATPRES
CELL
PWPD
BQ24777RUYR_WQFN28_4x4
CSS_GC_1<73>
PR804
@PD@
1 2
0_0402_5%
PD802
PD801
PD803
PD@
PD804
10_1206_5%
PC814
10U_0805_25V6K
0_0402_5%
PR836
1 2
PR8350_0402_5%
1 2
PR8150_0402_5%
1 2
PR818 100_0402_1%
1 2
/BATPRES<67>
26.7K_0402_1%
C
PL802
EMC@
1UH +-20% 6.6A
@
PJP801
1 2
PAD-OPEN 4x4m
PQ805
DMP3056L-7 1P SOT23-3
S
D
13
12
G
2
PR810
0_0402_5%
PC813
1 2
PC821
12
CHG_UGATE
CHG_SW
CHG_LGATE
12
12
1U_0603_10V6K
DOCK_DCIN_IS+ <41>
DOCK_DCIN_IS- <41>
DK_CSS_GC <67>
5
4
5
4
123
D
CHAGER_SRC+PWR_SRC_AC
Near PL701
+PWR_SRC
12
12
12
PC803
PC804
10U_0805_25V6K
10U_0805_25V6K
+PWR_SRC+P WR_SRC
12
PC811
10U_0805_25V6K
PC820
PC830
1 2
22U_0805_25V6M
12
PC840
PD@
1
2
12
PC841
22U_0805_25V6M
22U_0805_25V6M
PD@
+VCHGR
PC831
@
0.1U_0402_25V6
1 2
12
PC825
@EMC@
12
PC817
0.1U_0402_25V6
@EMC@
PQ808
123
MDU1516URH 1N POWERDFN56-8
2.2UH +-20% PCMB103T-2R2MS 13A
5
4
PQ807
MDU1515URH 1N POWERDFN56-8
1 2
PQ810
CHG_SNUB
123
12
PC832
1000P_0603_50V7K
@EMC@
MDU1515URH 1N POWERDFN56-8
12
PC816
2200P_0402_50V7K
@EMC@
PR824
4.7_1206_5%
@EMC@
0.1U_0402_25V6
PL801
PC818
12
22U_0805_25V6M
PC829
1 2
12
PC822
PC819
22U_0805_25V6M
+PWR_SRC
0.01_1206_1%
12
4
3
0.1U_0402_25V6
12
22U_0805_25V6M
PR823
12
12
PC807
PC806
PC805
10U_0805_25V6K
PC812
22U_0805_25V6M
@EMC@
12
PC842
22U_0805_25V6M
PD@
12
0.1U_0603_25V7K
10U_0805_25V6K
10U_0805_25V6K
12
PC826
12
12
PC836
PC835
@
PC839
22U_0805_25V6M
PD@
12
10U_0805_25V6K
PC837
@
@
10U_0805_25V6K
10U_0805_25V6K
12
10U_0805_25V6K
1
1
+
+
PC844
PC843
2
2
PD@
PD@
33U_D2_25VM_R40M
33U_D2_25VM_R40M
12
12
PC827
PC801
10U_0805_25V6K
10U_0805_25V6K
@
12
+DC_IN
12
PR830
ACAV_IN_NB<36,66,67>
PR838
@PD@
0_0402_5%
1 2
@PD@
PQ811A
61
DMN65D8LDW-7_SOT363-6
@PD@
PR839
2
4 4
3
4
12
100K_0402_5%
@PD@
PQ811B
DMN65D8LDW-7_SOT363-6
PR840
@PD@
1 2
5
0_0402_5%
A
EN_PD_HV <49,73>
DCIN_ACOK <73>
ACAV_IN_NB<36,66,67>
100K_0402_1%
1 2
PR833
0_0402_5%
1 2
PR831
3M_0402_5%
12
+3.3V_ALW
649K_0402_1%
12
PR832
PR834
10K_0402_1%
PC833
100P_0402_50V8J
B
12
CMPIN
CMPOUT
PC834
100P_0402_50V8J
1 2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
BATDRV# <67>
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size
Size
Size
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Charger
Charger
Charger
Document Number Re v
Document Number Re v
Document Number Re v
LA-C841P
LA-C841P
LA-C841P
D
66 79Tuesday, September 08, 2015
66 79Tuesday, September 08, 2015
66 79Tuesday, September 08, 2015
0.1
0.1
0.1
Vinafix.com
5
+PBATT
SDMK0340L-7-F_SOD323-2~D
PD@
PD902
@
D D
C C
B B
+DC_IN
+3.3V_ALW2
ACAV_DOCK_SRC#<41,67>
+SDC_IN
+3.3V_ALW2
A A
+VCHGR
BATDRV#<66>
PR920
1 2
100K_0402_5%
ACAV_IN<36,66,67>
PDS5100H-13_POWERDI5-3
1 2
47_0805_5%~D
0.1U_0603_25V7K
SOFT_START_GC<57>
PR928
100_0603_1%
1 2
DC_BLOCK_GC<66>
PR918
0_0402_5%
1 2
PR932
0_0402_5%
1 2
1
PQ903
SI4835DDY-T1-GE3_SO8
1
2
3 6
4
PR921
PC906
PR923
0_0402_5%
1 2
5
3
2
8
7
5
12
ACAVDK_SRCACAVDK_SRC
PC908
0.1U_0603_25V7K
+DC_IN_SS
CD3301_DCIN
ERC1
ACAVIN
P33ALW2
12
1
2
3
4
5
6
7
8
9
37
DK_CSS_GC<66>
PR935
100_0603_1%
1 2
PU901
DC_IN
SS_GC
ERC1
ACAVDK_SRC
GND
SDC_IN
DC_BLK_GC
ACAV_IN
P33ALW2
TP
CSS_GC<66,73>
PC907
0.047U_0603_25V7M
12
PD@
PR943
1M_0402_5%
12
PR944
1M_0402_5%
12
PR945
0_0402_5%
13
D
S
PQ912
PD@
DMN65D8LW-7_SOT323-3
PR913
0_0402_5%
1 2
AC_DIS<35,57,66>
PR924
100_0603_1%
1 2
PR933
100_0603_1%
1 2
DK_PWRBAR
CD3301_DC_IN_SS
28
29
30NC31
33
34
35
36
32
NC
GND
PBatt+
DC_IN_SS
DK_PWRBAR
CHARGERVR_DCIN
BLKNG_MOSFET_GC
CSS_GC10DK_CSS_GC11ERC312ERC213GND14PWR_SRC
16
15
ERC2
ERC3
12
12
STSTART_DCBLOCK_GC
PC901
3301_PWRSRC
@
0.1U_0402_25V6
PBATT_OFF
BLK_MOSFET_GC
DK_AC_OFF_EN
ACAV_IN_NB
DSCHRG_MOSFET_GC
DK_AC_OFF_EN
SL_BAT_PRES#
NBDK_DCINSS
SS_DCBLK_GC
EN_DK_PWRBAR17P33ALW
18
P33ALW
EN_DK_PWRBAR
27
P50ALW
26
25
24
23
GND
22
21
20
19
CD3301BRHHR_QFN36_6X6~D
PR931
0_0402_5%
1 2
PR939
100_0603_1%
1 2
4
PD906
12
+SDC_IN
12
PD@
PR942
1M_0402_5%
61
2
PD@
H_PROCHOT# <7,36,51,63,66>
+3.3V_ALW
PD@
PU904
PD@
TC7SH08FU_SSOP5~D
4
2
PR916
1 2
10K_0402_5%
PR915
100K_0402_5%
O
G
+DOCK_PWR_BAR
+PBATT
PR937
0_0402_5%
P50ALW
1 2
PR930
0_0402_5%
1 2
CD_PBATT_OFF
DK_AC_OFF
3301_ACAV_IN_NB
DK_AC_OFF_ENCD3301_SDC_IN
SL_BAT_PRES#
+3.3V_ALW
PR934
1 2
1M_0402_5%
+PWR_SRC_AC
4
PR941
@PD@
1 2
0_0402_5%
PQ999A
12
PD@
PR940
1M_0402_5%
DMN65D8LDW-7_SOT363-6
PD@
PC909
PD@
12
0.1U_0402_10V7K
5
0_0402_5%
1
P
B
PR947
2
A
G
0_0402_5%
3
PQ909
DMG2301U-7 1P SOT23-3
3
12
2
13
D
PQ906
DMN65D8LW-7_SOT323-3
2
G
S
+5V_ALW
SLICE_BAT_ON <35>
0_0402_5%
1 2
1 2
PR926
0_0402_5%
1 2
@
PR927
0_0402_5%
1 2
5
PR946
PD@
1
13
2
PR922
PR938
0_0402_5%
3
PQ999B
4
PD@
DMN65D8LDW-7_SOT363-6
STSTART_DCBLOCK_GC
PD@
12
12
PD901
2
3
BAT54CW_SOT323-3
PR901
0_0402_5%
1 2
PDS5100H-13_POWERDI5-3
+DOCK_PWR_BAR
ACAV_DOCK_SRC# <41,67>
PROCHOT_GATE <35>
DMN65D8LDW-7_SOT363-6
DMN65D8LDW-7_SOT363-6
1
12
PR925
10K_0402_5%
ACAV_IN_NB <36,66>
DOCK_AC_OFF_EC <35>
PR929
1 2
1M_0402_5%
SLICE_BAT_PRES# <35,41,57>
+NBDOCK_DC_IN_SS
EN_DOCK_PWR_BAR <35>
PQ911B
354
PR919
0_0402_5%
1 2
DOCK_DET#<35,41,67>
DOCK_AC_OFF <41>
1
PD903
2
FDS6679AZ-G_SO8
PQ911A
61
100K_0402_5%
2
PR917
100K_0402_5%
3
+PWR_SRC_AC
PC902
1 2
0.47U_0805_25V6K
36
241
PQ904
FDS6679AZ-G_SO8
578
3
330K_0402_5%
5
123
1500P_0402_50V7K
36
241
PQ901
578
PD904
SDMK0340L-7-F_SOD323-2~D
PR936
12
12
+3.3V_ALW2
PR911
1 2
100K_0402_5%
3
PR906
0_0402_5%
1 2
PR908
12
PQ905
FDMC6679AZ_MLP8-5
4
@
PC904
12
13
1
2
2
PQ910
3
12
PQ908
DMN65D8LW-7_SOT323-3
PD905
DMP3099L-7 1P SOT23-3
1
BAT54CW_SOT323-3
Purpose: Trigger PROCHOT# when
active battery is removed from
syste m.
Allows EC to re-establish
system performance for battery
next in line.
STSTART_DCBLOCK_GC
PR910
100K_0402_5%
1 2
12
PR912
10K_0402_5%
13
D
2
G
S
3
2
DIS_BAT_PROCHOT#<35>
TC7SH08FU_SSOP5~D
+DC_IN_SS
+NBDOCK_DC_IN_SS
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
+3.3V_ALW
12
PR905
100K_0402_5%
PU903
4
2
PBAT_PRES#<36,57,66>
+3.3V_ALW2
PC905
0.1U_0402_10V7K
5
1
P
B
O
2
A
G
3
2
0_0402_5%
1 2
12
ACAV_IN<36,66,67>
PR907
PC903
0.1U_0402_10V7K
1 2
ACAV_IN#
100K_0402_5%
+3.3V_ALW
5
1
P
B
O
2
A
G
PU902
3
TC7SH08FU_SSOP5~D
1 2
100K_0402_5%
61
DMN65D8LDW-7_SOT363-6
+3.3V_ALW2
12
PR914
3
PQ907B
5
4
2
4
PR909
PQ907A
ACAV_IN#
DMN65D8LDW-7_SOT363-6
+3.3V_ALW
12
PR903
100K_0402_5%
61
PQ902A
2
DMN65D8LDW-7_SOT363-6
+3.3V_ALW2
DOCK_DET# <35,41,67>
1
+3.3V_ALW
12
PR902
100K_0402_5%
PR904
@
0_0402_5%
1 2
3
PQ902B
5
4
DMN65D8LDW-7_SOT363-6
Purpose: Turn on the PQ817
for primary or module bay
battery to provide power to
dock side without AC exist.
/BATPRES <66>
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size
Size
Size
Date: Sheet of
Date: Sheet of
Date: Sheet of
Selector
Selector
Selector
Document Number Rev
Document Number Rev
Document Number Rev
LA-C841P
LA-C841P
LA-C841P
1
0.1
0.1
67 79Tuesday, September 08, 2015
67 79Tuesday, September 08, 2015
67 79Tuesday, September 08, 2015
0.1
Vinafix.com
4 4
3 3
2 2
1 1
+VCC_CORE
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
PC1244
1U_0201_6.3V6M
PC1245
1U_0201_6.3V6M
PC1246
1U_0201_6.3V6M
2
220U_D2_2.5VY_R9M
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
PC1250
VCC_CORE Place on CPU
Back Side.
22U_0603 * 2 pcs + 10U_0402*7 pcs + 1U_0201*3 pcs
Primary Side.
22U_0603 * 2 pcs + 220u_D2*1 pcs
12
PC1241
1U_0201_6.3V6M
12
PC1242
1U_0201_6.3V6M
12
PC1243
1U_0201_6.3V6M
1
2
+
PC1021
330U_D2_2.5V_R6M
1
2
+
PC1022
330U_D2_2.5V_R6M
+VCC_SA
12
12
12
1
+
12
PC1234
10U_0402_6.3V6M
12
PC1235
10U_0402_6.3V6M
12
PC1236
10U_0402_6.3V6M
12
PC1237
10U_0402_6.3V6M
12
PC1238
10U_0402_6.3V6M
12
PC1239
10U_0402_6.3V6M
12
PC1240
10U_0402_6.3V6M
12
PC1215
22U_0603_6.3V6M
12
PC1216
22U_0603_6.3V6M
12
PC1217
22U_0603_6.3V6M
12
PC1218
22U_0603_6.3V6M
12
PC1219
1U_0201_6.3V6M
12
PC1220
1U_0201_6.3V6M
12
PC1221
1U_0201_6.3V6M
12
PC1222
1U_0201_6.3V6M
12
PC1223
1U_0201_6.3V6M
12
PC1224
1U_0201_6.3V6M
12
PC1225
1U_0201_6.3V6M
12
PC1226
1U_0201_6.3V6M
12
PC1227
1U_0201_6.3V6M
12
PC1228
1U_0201_6.3V6M
12
PC1229
1U_0201_6.3V6M
12
PC1230
1U_0201_6.3V6M
12
PC1231
1U_0201_6.3V6M
12
PC1232
1U_0201_6.3V6M
12
PC1233
1U_0201_6.3V6M
12
PC1192
1U_0201_6.3V6M
12
PC1193
1U_0201_6.3V6M
12
PC1194
1U_0201_6.3V6M
12
PC1195
1U_0201_6.3V6M
12
PC1196
1U_0201_6.3V6M
12
PC1197
1U_0201_6.3V6M
12
PC1198
1U_0201_6.3V6M
12
PC1199
1U_0201_6.3V6M
12
PC1200
1U_0201_6.3V6M
12
PC1201
1U_0201_6.3V6M
12
PC1202
1U_0201_6.3V6M
12
PC1203
1U_0201_6.3V6M
12
PC1204
1U_0201_6.3V6M
12
PC1205
1U_0201_6.3V6M
12
PC1206
1U_0201_6.3V6M
12
PC1162
1U_0201_6.3V6M
12
PC1163
1U_0201_6.3V6M
12
PC1164
1U_0201_6.3V6M
12
PC1165
1U_0201_6.3V6M
12
PC1166
1U_0201_6.3V6M
12
PC1167
1U_0201_6.3V6M
12
PC1168
1U_0201_6.3V6M
12
PC1169
1U_0201_6.3V6M
12
PC1170
1U_0201_6.3V6M
12
PC1171
1U_0201_6.3V6M
12
PC1172
1U_0201_6.3V6M
12
PC1173
1U_0201_6.3V6M
12
PC1174
1U_0201_6.3V6M
12
PC1175
1U_0201_6.3V6M
12
PC1176
1U_0201_6.3V6M
12
PC1132
1U_0201_6.3V6M
12
PC1133
1U_0201_6.3V6M
12
PC1134
1U_0201_6.3V6M
12
PC1135
1U_0201_6.3V6M
12
PC1136
1U_0201_6.3V6M
12
PC1137
1U_0201_6.3V6M
12
PC1138
1U_0201_6.3V6M
12
PC1139
1U_0201_6.3V6M
12
PC1140
1U_0201_6.3V6M
12
PC1141
1U_0201_6.3V6M
12
PC1142
1U_0201_6.3V6M
12
PC1143
1U_0201_6.3V6M
12
PC1144
1U_0201_6.3V6M
12
PC1145
1U_0201_6.3V6M
12
PC1146
1U_0201_6.3V6M
12
PC1103
10U_0402_6.3V6M
12
PC1104
10U_0402_6.3V6M
12
PC1105
10U_0402_6.3V6M
12
PC1106
10U_0402_6.3V6M
12
PC1107
10U_0402_6.3V6M
12
PC1108
10U_0402_6.3V6M
12
PC1109
10U_0402_6.3V6M
12
PC1110
10U_0402_6.3V6M
12
PC1111
10U_0402_6.3V6M
12
PC1112
10U_0402_6.3V6M
12
PC1113
10U_0402_6.3V6M
12
PC1114
10U_0402_6.3V6M
12
PC1115
10U_0402_6.3V6M
12
PC1116
10U_0402_6.3V6M
12
PC1074
10U_0402_6.3V6M
12
PC1075
10U_0402_6.3V6M
12
PC1076
10U_0402_6.3V6M
12
PC1077
10U_0402_6.3V6M
12
PC1078
10U_0402_6.3V6M
12
PC1079
10U_0402_6.3V6M
12
PC1080
10U_0402_6.3V6M
12
PC1081
10U_0402_6.3V6M
12
PC1082
10U_0402_6.3V6M
12
PC1083
10U_0402_6.3V6M
12
PC1084
10U_0402_6.3V6M
12
PC1085
10U_0402_6.3V6M
12
PC1086
10U_0402_6.3V6M
12
PC1087
10U_0402_6.3V6M
12
PC1041
22U_0603_6.3V6M
12
PC1042
22U_0603_6.3V6M
12
PC1043
22U_0603_6.3V6M
12
PC1044
22U_0603_6.3V6M
12
PC1045
22U_0603_6.3V6M
12
PC1046
22U_0603_6.3V6M
12
PC1047
22U_0603_6.3V6M
12
PC1048
22U_0603_6.3V6M
12
PC1049
22U_0603_6.3V6M
12
PC1050
22U_0603_6.3V6M
12
PC1051
22U_0603_6.3V6M
12
PC1052
22U_0603_6.3V6M
12
PC1053
22U_0603_6.3V6M
12
PC1054
22U_0603_6.3V6M
12
PC1055
22U_0603_6.3V6M
12
PC1056
22U_0603_6.3V6M
VCC_CORE Place on CPU
Back Side.
22U_0603 * 8 pcs + 10U_0402*28 pcs + 1U_0201*35 pcs
Primary Side.
22U_0603 * 8 pcs+330u_D2*2 pcs
A
B
C
+VCC_GT
12
PC1207
1U_0201_6.3V6M
12
PC1208
1U_0201_6.3V6M
12
PC1209
1U_0201_6.3V6M
12
PC1210
1U_0201_6.3V6M
12
PC1211
1U_0201_6.3V6M
12
PC1212
1U_0201_6.3V6M
D
Size
Size
Size
Title
Date: Sheet o f
Title
Date: Sheet o f
Title
Date: Sheet of
Document Number Re v
Document Number Re v
Document Number Re v
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
PROCESSOR DECOUPLING
PROCESSOR DECOUPLING
PROCESSOR DECOUPLING
LA-C841P
LA-C841P
LA-C841P
E
68 79Tuesday, September 08, 2015
68 79Tuesday, September 08, 2015
68 79Tuesday, September 08, 2015
0.1
0.1
0.1
DELL CONFIDENTIAL/PROPRIETARY
PC1213
1U_0201_6.3V6M
PC1214
1U_0201_6.3V6M
2
@
PC1247
470U_X_2VM_R6M
2
PC1248
470U_X_2VM_R6M
2
PC1249
470U_X_2VM_R6M
12
12
1
+
1
+
1
+
12
PC1177
1U_0201_6.3V6M
12
PC1178
1U_0201_6.3V6M
12
PC1179
1U_0201_6.3V6M
12
PC1180
1U_0201_6.3V6M
12
PC1181
1U_0201_6.3V6M
12
PC1182
1U_0201_6.3V6M
12
PC1183
1U_0201_6.3V6M
12
PC1184
1U_0201_6.3V6M
12
PC1185
1U_0201_6.3V6M
12
PC1186
1U_0201_6.3V6M
12
PC1187
1U_0201_6.3V6M
12
PC1188
1U_0201_6.3V6M
12
PC1189
1U_0201_6.3V6M
12
PC1190
1U_0201_6.3V6M
12
PC1191
1U_0201_6.3V6M
12
PC1147
1U_0201_6.3V6M
12
PC1148
1U_0201_6.3V6M
12
PC1149
1U_0201_6.3V6M
12
PC1150
1U_0201_6.3V6M
12
PC1151
1U_0201_6.3V6M
12
PC1152
1U_0201_6.3V6M
12
PC1153
1U_0201_6.3V6M
12
PC1154
1U_0201_6.3V6M
12
PC1155
1U_0201_6.3V6M
12
PC1156
1U_0201_6.3V6M
12
PC1157
1U_0201_6.3V6M
12
PC1158
1U_0201_6.3V6M
12
PC1159
1U_0201_6.3V6M
12
PC1160
1U_0201_6.3V6M
12
PC1161
1U_0201_6.3V6M
12
PC1117
1U_0201_6.3V6M
12
PC1118
1U_0201_6.3V6M
12
PC1119
1U_0201_6.3V6M
12
PC1120
1U_0201_6.3V6M
12
PC1121
1U_0201_6.3V6M
12
PC1122
1U_0201_6.3V6M
12
PC1123
1U_0201_6.3V6M
12
PC1124
1U_0201_6.3V6M
12
PC1125
1U_0201_6.3V6M
12
PC1126
1U_0201_6.3V6M
12
PC1127
1U_0201_6.3V6M
12
PC1128
1U_0201_6.3V6M
12
PC1129
1U_0201_6.3V6M
12
PC1130
1U_0201_6.3V6M
12
PC1131
1U_0201_6.3V6M
12
PC1088
1U_0201_6.3V6M
12
PC1089
1U_0201_6.3V6M
12
PC1090
1U_0201_6.3V6M
12
PC1091
1U_0201_6.3V6M
12
PC1092
1U_0201_6.3V6M
12
PC1093
1U_0201_6.3V6M
12
PC1094
1U_0201_6.3V6M
12
PC1095
1U_0201_6.3V6M
12
PC1096
1U_0201_6.3V6M
12
PC1097
1U_0201_6.3V6M
12
PC1098
1U_0201_6.3V6M
12
PC1099
1U_0201_6.3V6M
12
PC1100
1U_0201_6.3V6M
12
PC1101
1U_0201_6.3V6M
12
PC1102
1U_0201_6.3V6M
12
PC1057
10U_0402_6.3V6M
12
PC1058
10U_0402_6.3V6M
12
PC1059
10U_0402_6.3V6M
12
PC1060
10U_0402_6.3V6M
12
PC1061
10U_0402_6.3V6M
12
PC1062
10U_0402_6.3V6M
12
PC1063
10U_0402_6.3V6M
12
PC1064
10U_0402_6.3V6M
12
PC1065
10U_0402_6.3V6M
12
PC1066
10U_0402_6.3V6M
12
PC1067
10U_0402_6.3V6M
12
PC1068
10U_0402_6.3V6M
12
PC1069
10U_0402_6.3V6M
12
PC1070
10U_0402_6.3V6M
12
PC1071
10U_0402_6.3V6M
12
PC1072
10U_0402_6.3V6M
12
PC1073
10U_0402_6.3V6M
12
PC1023
10U_0402_6.3V6M
12
PC1024
10U_0402_6.3V6M
12
PC1025
10U_0402_6.3V6M
12
PC1026
10U_0402_6.3V6M
12
PC1027
10U_0402_6.3V6M
12
PC1028
10U_0402_6.3V6M
12
PC1029
10U_0402_6.3V6M
12
PC1030
10U_0402_6.3V6M
12
PC1031
10U_0402_6.3V6M
12
PC1032
10U_0402_6.3V6M
12
PC1033
10U_0402_6.3V6M
12
PC1034
10U_0402_6.3V6M
12
PC1035
10U_0402_6.3V6M
12
PC1036
10U_0402_6.3V6M
12
PC1037
10U_0402_6.3V6M
12
PC1038
10U_0402_6.3V6M
12
PC1039
10U_0402_6.3V6M
12
PC1040
10U_0402_6.3V6M
12
PC1001
22U_0603_6.3V6M
12
PC1002
22U_0603_6.3V6M
12
PC1003
22U_0603_6.3V6M
12
PC1004
22U_0603_6.3V6M
12
PC1005
22U_0603_6.3V6M
12
PC1006
22U_0603_6.3V6M
12
PC1007
22U_0603_6.3V6M
12
PC1008
22U_0603_6.3V6M
12
PC1009
22U_0603_6.3V6M
12
PC1010
22U_0603_6.3V6M
12
PC1011
22U_0603_6.3V6M
12
PC1012
22U_0603_6.3V6M
12
PC1013
22U_0603_6.3V6M
12
PC1014
22U_0603_6.3V6M
12
PC1015
22U_0603_6.3V6M
12
PC1016
22U_0603_6.3V6M
12
PC1017
22U_0603_6.3V6M
12
PC1018
22U_0603_6.3V6M
12
PC1019
22U_0603_6.3V6M
12
PC1020
22U_0603_6.3V6M
VCC_GT Place on CPU
Back Side.
22U_0603 * 8 pcs +10U_0402*35 pcs +1U_0201*68 pcs
Primary Side.
22U_0603 * 12 pcs +470u_D2*2 pcs
D
E
Vinafix.com
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12
12
12
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PR1307
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4.7_1206_5%
PC1317
@EMC@DSC@
680P_0603_50V7K
12
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2200P_0402_50V7K
PC1316
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680P_0603_50V7K
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12
12
12
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31
32
33
34
35
36
37
38
39
40TP41
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@DSC@
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PR1316
1 2
0_0402_5%
1 2
PR1301
133K_0402_1%
12
1 2
1000P_0402_50V7K
PC1327
PC1308
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12
0.1U_0603_25V7K
0.1U_0402_25V6K
470K_0402_5%_TSM0B474J4702RE
604_0402_1%
1 2
1 2
0_0402_5%
VSUM-_VGA
12
PR1328
2.61K_0402_1%
12
PC1329
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ENABLE_VGA
IMON_VGA
PR1320
13.3K_0402_1%
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HDSC@
1
2
3
4
5
6
7
8
9
10
PC1325
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12
11K_0402_1%
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649 +-1% 0402
PU1301
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VDDIO
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IMON
12
PC1319
0.033U_0402_16V7K
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HPDSC@
ISEN2_VGA
ISEN1_VGA
PC1314
562_0402_1%
@DSC@
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11
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820P_0402_50V7K
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ISL62771HRTZ-T_TQFN40_5X5
RTN17ISUMN15ISEN1
ISUMP14ISEN212NTC
FB18PGOOD
VSEN
13
16
1000P_0402_50V7K
12
PC1310
330P_0402_50V7K
@DSC@
12
PC1309
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30
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29
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28
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27
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26
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25
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24
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23
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UG1_VGA
22
UGATE1
BST1_VGA
21
BOOT1
20
PC1324
1 2
@DSC@
0_0402_5%
1 2
0_0402_5%
1 2
1 2
PR1329
1.47K_0402_1%
1 2
PR1335
PR1336
PR1326
301_0402_1%
+3.3V_RUN
PR1318
100K_0402_1%
PR1330
137K_0402_1%
1 2
PR1332
2K_0402_1%
1 2
COMP
19
0.01UF_0402_25V7K
PR1314
1 2
1_0603_5%
12
PC1307
PXS_PWREN <53,69,74>
12
12
PR1337
100K_0402_1%
DGPU_PWROK <20,35,53,69>
PC1303
270P_0402_50V7K
1 2
PC1330
390P_0402_50V7K
1 2
PC1328
330P_0402_50V
1 2
GPU_VDDC_SEN <52>
GPU_VDDC_RTN <52>
+5V_ALW
12
1U_0603_10V6K
@
@DSC@
32.4K_0402_1%
1 2
1 2
0_0603_5%
1 2
PR1329
HPDSC@
PR1304
0_0603_5%
PR1321
LG2_VGA
UG1_VGA
PC1321
0.22U_0603_25V7K
1 2
PC1333
0.22U_0603_25V7K
1 2
LG1_VGA
4
PQ1302
123
SIR472DP-T1-GE3_POWERPAK8-5
5
4
PQ1304
123
SIRA06DP-T1-GE_POWERPAKSO-8-5
5
4
PQ1303
123
5
4
PQ1306
123
@DSC@
GPU_CORE PC14 PC15 PC15(Precision)
Meso XT Litho X T Tropo PROL
DDR3 GD DR5 GDDR5
TDC 36A 37A 31A
Peak Current 54A 5 5A 65A
OCP current 6 7A 69A 81A
Loadline 1mO hm NA 1.5mOhm
FSW=30 0kHz
12
PC1305
PC1304
10U_0805_25V6K
5
4
PQ1305
123
@DSC@
SIRA06DP-T1-GE_POWERPAKSO-8-5
12
PC1323
10U_0805_25V6K
SIR472DP-T1-GE3_POWERPAK8-5
5
4
PQ1307
123
DSC@
SIRA06DP-T1-GE_POWERPAKSO-8-5
SIRA06DP-T1-GE_POWERPAKSO-8-5
PC1302
@EMC@DSC@
@EMC@DSC@
PC1322
12
0.1U_0402_25V6K
12
0.1U_0402_25V6
PJP1301
2
112
JUMP_43X79
@EMC@DSC@
FBMJ4516HS720NT_2P
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PR1305
10K_0402_1%
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3.65K_0603_1%
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1_0402_1%
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10K_0402_1%
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3.65K_0603_1%
VSUM+_VGA
1 2
1_0402_1%
VSUM-_VGA
1 2
PL1302
+PWR_SRC
0.22UH_MMD-06DZNR22MEO1L_25A_20%
1 2
PR1322
PR1324
PR1325
PL1301
330U 2V Y D2 LESR9M EEFSX H1.9
1
PC1313
+
2
PL1303
0.22UH_MMD-06DZNR22MEO1L_25A_20%
1 2
330U 2V Y D2 LESR9M EEFSX H1.9
+GPU_CORE
1
PC1301
+
2
330U 2V Y D2 LESR9M EEFSX H1.9
+GPU_CORE
1
PC1311
+
2
4 4
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
+GPU_CORE
+GPU_CORE
+GPU_CORE
Size
Document Number Rev
Size
Document Number Rev
Size
Document Number Rev
LA-C841P
LA-C841P
D
LA-C841P
Date: Sheet of
Date: Sheet of
Date: Sheet of
69 79Tuesday, September 08, 2015
69 79Tuesday, September 08, 2015
69 79Tuesday, September 08, 2015
0.1
0.1
0.1
A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
Vinafix.com
A A
B B
C C
D D
5
5
+GPU_CORE
12
DSC@
PC1458
1U_0201_6.3V6M
12
DSC@
PC1457
1U_0201_6.3V6M
12
DSC@
PC1449
1U_0201_6.3V6M
12
DSC@
PC1448
4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
1U_0201_6.3V6M
12
DSC@
PC1453
1U_0201_6.3V6M
12
DSC@
PC1450
1U_0201_6.3V6M
12
DSC@
PC1451
1U_0201_6.3V6M
12
DSC@
PC1456
1U_0201_6.3V6M
12
DSC@
PC1454
1U_0201_6.3V6M
12
DSC@
PC1455
1U_0201_6.3V6M
12
DSC@
PC1446
1U_0201_6.3V6M
12
DSC@
PC1438
1U_0201_6.3V6M
12
DSC@
PC1437
1U_0201_6.3V6M
12
DSC@
PC1442
1U_0201_6.3V6M
12
DSC@
PC1441
1U_0201_6.3V6M
12
DSC@
PC1440
1U_0201_6.3V6M
12
DSC@
PC1439
1U_0201_6.3V6M
12
DSC@
PC1445
1U_0201_6.3V6M
12
DSC@
PC1443
1U_0201_6.3V6M
12
DSC@
PC1444
1U_0201_6.3V6M
12
HDSC@
PC1426
1U_0201_6.3V6M
12
HDSC@
PC1447
1U_0201_6.3V6M
12
HDSC@
PC1429
1U_0201_6.3V6M
12
HDSC@
PC1428
1U_0201_6.3V6M
12
HDSC@
PC1433
1U_0201_6.3V6M
12
HDSC@
PC1432
1U_0201_6.3V6M
12
HDSC@
PC1431
1U_0201_6.3V6M
12
HDSC@
PC1430
1U_0201_6.3V6M
12
HDSC@
PC1436
1U_0201_6.3V6M
12
PC1435
HDSC@
1U_0201_6.3V6M
12
HDSC@
PC1434
1U_0201_6.3V6M
12
PC1418
HPDSC@
2.2U_0402_6.3V6M
12
HPDSC@
PC1422
2.2U_0402_6.3V6M
12
PC1402
HPDSC@
2.2U_0402_6.3V6M
12
PC1413
HPDSC@
2.2U_0402_6.3V6M
12
PC1414
HPDSC@
2.2U_0402_6.3V6M
12
HPDSC@
PC1415
2.2U_0402_6.3V6M
12
PC1416
HPDSC@
2.2U_0402_6.3V6M
12
DSC@
PC1404
10U_0402_6.3V6M
12
PC1460
HDSC@
10U_0402_6.3V6M
12
HDSC@
PC1459
10U_0402_6.3V6M
12
HPDSC@
PC1405
22U_0603_6.3V6M
12
HPDSC@
PC1407
22U_0603_6.3V6M
12
HPDSC@
PC1408
22U_0603_6.3V6M
12
HPDSC@
PC1409
22U_0603_6.3V6M
12
HPDSC@
PC1425
22U_0603_6.3V6M
4
3
VDDCI
20 *1 uF
2 *22 uF
2 *10 uF
7 *2.2 uF
2 *1 uF
1*10uF
3*1uF
2
VDDC
5 *22 uF
1 *10 uF
7 *2.2 uF
VDDCI
4*10 uF
30*1uF
AMD
Tropo
PROL(P)
VDDC
AMD
Litho XT
3
2
+0.9V_VDDCI
DELL CONFIDENTIAL/PROPRIETARY
Size
Size
Size
Title
Date : Sheet o f
Title
Date : Sheet o f
Title
Date : Sheet o f
Document Number Re v
Document Number Re v
Document Number Re v
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
GPU DECOUPLING
GPU DECOUPLING
GPU DECOUPLING
LA-C841P
LA-C841P
LA-C841P
1
70 79Tuesday, September 08, 2015
70 79Tuesday, September 08, 2015
70 79Tuesday, September 08, 2015
12
PC1427
DSC@
1U_0201_6.3V6M
12
DSC@
PC1452
1U_0201_6.3V6M
12
HPDSC@
PC1412
2.2U_0402_6.3V6M
12
HPDSC@
PC1421
2.2U_0402_6.3V6M
12
HPDSC@
PC1419
2.2U_0402_6.3V6M
12
HPDSC@
PC1411
2.2U_0402_6.3V6M
12
PC1420
HPDSC@
2.2U_0402_6.3V6M
12
HPDSC@
PC1410
2.2U_0402_6.3V6M
12
HPDSC@
PC1423
2.2U_0402_6.3V6M
12
DSC@
PC1403
10U_0402_6.3V6M
12
DSC@
PC1424
10U_0402_6.3V6M
12
HPDSC@
PC1406
22U_0603_6.3V6M
12
HPDSC@
PC1417
22U_0603_6.3V6M
1
0.1
0.1
0.1
Vinafix.com
A
1 1
B
C
D
+3.3V_ALW
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7
POK
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3 3
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12
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12
PC1504
.1U_0402_16V7K
8
EN
@EMC@
PC1500
1U_0402_6.3V6K
6
5
VIN
4
VOUT
VCNTL
3
VOUT
2
FB
9
VIN
GND
1
AP7175SP-13_SO-8EP-8
PJP1501
12
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12
21.5K_0402_1%
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12
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12
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0.01U_0402_25V7K
1 2
PAD-OPEN1x1m
12
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22U_0805_6.3V6M
PJP1500
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4 4
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
+2.5V_MEM
+2.5V_MEM
Document Number Re v
Document Number Re v
Document Number Re v
+2.5V_MEM
LA-C841P
LA-C841P
LA-C841P
D
71 79Tuesday, September 08, 2015
71 79Tuesday, September 08, 2015
71 79Tuesday, September 08, 2015
0.1
0.1
0.1
A
DELL CONFIDENTIAL/PROPRIETARY
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
B
C
Title
Title
Title
Size
Size
Size
Date : Sheet o f
Date : Sheet o f
Date : Sheet o f
Vinafix.com
5
D D
4
3
PR1600
0_0402_5%
1 2
2
VRAM_EN <53>
1
EN_+1.35_VRAM
PJP1600
21
C C
PAD-OPEN 1x2m~D
+3.3V_ALW
12
@DSC@
PR1606
0_0402_5%
ILMT_+1.35_VRAM
12
@DSC@
PR1608
0_0402_5%
B B
The current limit is set to 6A, 9A or 12A when this pin
is pull low, floating or pull high
12
12
PC1600
PC1605
0.1U_0402_25V6
2200P_0402_50V7K
@EMC@DSC@
@EMC@DSC@
PC1602
10U_0805_25V6K
@DSC@
+1.35_VRAM_B+
12
PC1603
10U_0805_25V6K
12
ILMT_+1.35_VRAM
PU1600
8
IN
EN
GND
ILMT
PG
BS
LX
FB
BYP
LDO
9
3
2
SYX196DQNC_QFN10_3X3
1
BST_+1.35_VRAM
6
SW_+1.35_VRAM
10
4
7
5
12
PC1612
PC1601
0.1U_0603_25V7K
1 2
12
PC1611
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
BST_+1.35_VRAM_C
+3.3V_ALW
12
1M_0402_1%
PR1604
0_0603_5%
1 2
PR1602
@EMC@DSC@
4.7_1206_5%
1 2
1UH +-20% 7.9A
FB_+1.35_VRAM
PR1603
PL1600
1 2
@EMC@DSC@
680P_0603_50V7K
SNB_+1.35_VRAM
12
PR1605
30.1K_0402_1%
PR1607
12
PR1609
24K_0402_1%
1 2
12
12
1K_0402_5%
+1.35_VRAMP
PC1604
12
PC1606
330P_0402_50V7K
PJP1601
2
112
JUMP_43X118
+1.35V_MEM_GFX
+1.35_VRAMP
12
PC1608
PC1607
22U_0805_6.3VAM
22U_0805_6.3VAM
12
12
PC1610
PC1609
22U_0805_6.3VAM
22U_0805_6.3VAM
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE C USTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
3
2
Size
Size
Size
Date : Sheet o f
Date : Sheet o f
Date : Sheet o f
Compal Electronics, Inc.
GPU_VRAM(SYX198D)
GPU_VRAM(SYX198D)
GPU_VRAM(SYX198D)
Document Number Re v
Document Number Re v
Document Number Re v
LA-C841P
LA-C841P
LA-C841P
72 79Tuesday, September 08, 2015
72 79Tuesday, September 08, 2015
72 79Tuesday, September 08, 2015
1
0.1
0.1
0.1
Vinafix.com
5
PR1803
PD1801
0_0402_5%
1 2
+DC_IN_SS
+NBDOCK_DC_IN_SS
+3.3V_VDD_PIC
D D
12
12
PR1877
PR1878
200K_0402_1%
100K_0402_1%
(>17.6V)
12
12
PR1858
PC1828
PR1879
29.4K_0402_1%
200K_0402_1%
100P_0402_50V8J~D
+Tbt_Vbus
C C
+Vbus_1 +3.3V_VDD_PIC
B B
+3.3V_VDD_PIC_R
PC1818
12
PR1869
A A
PR1866
@PD@
221K_0402_1%
INA_OUT
12
12
PC1819
200K_0402_1%
100P_0402_50V8J~D
PWR_SRC_ON_PC or PWR_SRC_ON "Low" to reset the OCP latch
3
1 2
2
PR1804
0_0402_5%
BAT54CW_SOT323-3
DCIN_AC_Detector
12
PC1827
@PD@
0.01U_0402_25V7K~D
3
2
12
3
PD1814
1
EMC@PD@
ZEN ROW AZ4024-02S.R7G C/A SOT23 ESD
12
PR1839
150K_0402_1%
12
PC1809
PR1847
100K_0402_1%
LM393DR_SO8~D
12
PC1829
220P_0402_50V8J~D
2
12
PR1841
100K_0402_1%
12
12
PR1848
100P_0402_50V8J
200K_0402_1%
D
S
PQ1811
DMN65D8LW-7_SOT323-3
+Tbt_Vbus OCP
12
SDMK0340L-7-F_SOD323-2
1 2
PR1867
12
3
2
LM393DR_SO8~D
PC1820
220P_0402_50V8J~D
1M_0402_1%
8
+
-
4
5
1 2
PU1802A
P
O
G
0.01U_0402_25V7K~D
1
PR1875
1.8M_0402_1%
1 2
8
PU1804A
P
+
O
-
G
4
PC1817
1000P_0402_50V7K
EMC@PD@
S11 OVP
PD1808
1 2
SDMK0340L-7-F_SOD323-2
PR1862
1 2
1.8M +-1% 0402
12
PC1810
100P_0402_50V8J
13
2
G
12
PD1811
1
DC_IN_SS
1
PC1830
EMI Part
PL1802
5A_Z120_25M_0805_2P
1 2
1 2
PL1801
5A_Z120_25M_0805_2P
12
PC1804
@EMC@PD@
8
PU1803A
3
P
+
O
2
-
G
4
LM393DR_SO8~D
@PD@
PR1892
10K_0402_5%
PR1870
10K_0402_5%
1 2
12
PC1821
1200P_0402_50V7K
PWR_SRC_ON_PC
PWR_SRC_ON
12
PR1865
221K_0402_1%
DCIN_ACOK
12
1200P_0402_50V7K
12
0.1U_0603_25V7K
1
PR1860
0_0402_5%
1 2
0_0402_5%
1 2
12
PR1815
100K_0402_5%
PC1811
PR1893
BAT54CW_SOT323-3
@PD@
PR1872
221K_0402_1%~D
1 2
DCIN_ACOK#
61
2
PQ1821A
DCIN_ACOK <66>
DMN65D8LDW-7_SOT363-6
12
PR1838
100K_0402_1%
PR1844
0_0402_5%
1 2
12
1200P_0402_50V7K
LPS_PROTECT# <35>
1
PD1803
PWR_SRC_ILIMIT <49,73>
(To TI GPIO6)
PR1868
0_0402_5%
1 2
1 2
PR1837
12
0_0402_5%
DCIN_ACOK#<66>
+3.3V_VDD_PIC
5
+
6
-
(From EC)
3
2
+3.3V_VDD_PIC
PR1843
100K_0402_5%
1 2
34
PQ1822B
5
DMN65D8LDW-7_SOT363-6
PC1822
0.01U_0402_25V7K~D
8
PU1803B
P
O
G
LM393DR_SO8~D
4
EN_PD_HV <49,66,73>
PWR_SRC_ON_PC <49,73>
+Vbus_1
+Vbus_1
7
2
4
+AC_IN
VBUS_ACOK#
12
DCIN_ACOK
BAT54CW_SOT323-3
5
12
PC1812
61
PQ1822A
DMN65D8LDW-7_SOT363-6
4
PR1894
0_0402_5%
@PD@
@PD@
PD1802
2
3
+3.3V_VDD_PIC
PR1840
100K_0402_5%
1 2
34
PQ1813B
DMN65D8LDW-7_SOT363-6
0.01U_0402_25V7K~D
@PD@
0_0402_5%
PR1857
1
0_0402_5%
12
PR1911
1M_0402_5%
S11
4
12
61
2
+Tbt_Vbus
PR1846
1 2
12
PR1805
2
100K_0402_5%
12
@PD@
PR1807
100K_0402_5%
TC7SH08FU_SSOP5~D
@PD@
EN_PD_HV<49,66,73>
DCIN_ACOK#
34
5
12
PQ1804B
PQ1808
FDMC6679AZ_MLP8-5
1
2
35
12
1 2
PC1805
1500P_0402_50V7K
PR1823
10K_0402_5%
PQ1813A
DMN65D8LDW-7_SOT363-6
+VBUS_DC_SS
1 2
12
PR1851
200K_0402_1%
(>17.6V)
12
PR1855
S
@PD@
G
PQ1805
D
1 3
1 2
PR1876
AO3409 P-CHANNEL SOT-23
PC18330.1U_0402_10V7K
12
1
B
2
A
EN_PD_HV<49,66,73>
(From TI GPIO1)
DMN65D8LDW-7_SOT363-6
PR1817
1M_0402_5%
+SDC_IN
+3.3V_VDD_PIC
1 2
PR1854
0_0402_5%
12
PR1864
100K_0402_1%
12
PR1852
200K_0402_1%
32.4K_0402_1%
FDMC6679AZ_MLP8-5
12
12
PC1801
PR1801
1M_0402_5%
2200P 50V K X7R 0603
0_0402_5%@PD@
+3.3V_VDD_PIC
5
PU1807
P
4
O
G
3
@PD@
PR1811
1 2
0_0402_5%
12
PR1912
@PD@
100K_0402_5%
PR1822
0_0402_5%
1 2
12
PC1808
0.1U_0402_25V7K
+3.3V_RUN
PR1845
@PD@
0_0402_5%
PR1849
0_0402_5%
1 2
+3.3V_VDD_PIC_R
12
PC1813
@PD@
0.01U_0402_25V7K~D
12
PC1815
100P_0402_50V8J~D
3
S6 S7
PQ1801
1
2
3 5
4
12
PR1806
1M_0402_5%
61
PR1934
0_0402_5%
1 2
2
PQ1804A
DMN65D8LDW-7_SOT363-6
PU1801
1
Out6REF
2
IN-
GND
3
V+
IN+
INA199A1DCKR_SC70-6
12
PR1929
10K_0402_5%
34
PQ1827B
PU1805
TC7SH08FU_SSOP5~D
INA_OUT
PR1819
1 2
20K_0402_5%
5
4
+3.3V_VDD_PIC
12
PC1831
0.1U_0402_10V7K
5
DMN65D8LDW-7_SOT363-6
5
4
O
3
1 2
0_0402_5%
PR1827
@PD@
PR1821
44.2_0402_1%
(From TI GPIO2)
4
O
PU1806
TC7SH08FU_SSOP5~D
1
P
B
DCIN_ACOK#
2
A
G
0.01_1206_1%
1
2
VBUS_CSSN
12
PR1826
0_0402_5%
1 2
PR1828
0_0402_5%
1 2
@PD@
SENSEN
(From EC)
+VBUS_DC_SS
5
EN_PD_HV <49,66,73>
1
P
B
2
A
G
3
34
5
PQ1828B
DMN65D8LDW-7_SOT363-6
PQ1828A
PR1813
4
3
VBUS_CSSP
PR1831
0_0402_5%
1 2
@PD@
<49,73>
SENSEP
PWR_SRC_ON<35,73>
PWR_SRC_ON_PC<49,73>
61
DMN65D8LDW-7_SOT363-6
PR1842
100K_0402_5%
100K_0402_5%
<49,73>
12
12
PR1932
221K_0402_1%~D
PR1933
221K_0402_1%~D
2
12
PC1832
1U_0402_6.3V6K
1 2
2
PR1883
1 2
SDMK0340L-7-F_SOD323-2
BAT54CW_SOT323-3
13
D
S
PQ1824
DMN65D8LW-7_SOT323-3
(From EC)
PR1830
@PD@
0_0402_5%
1 2
12
PR1931
221K_0402_1%~D
1 2
PR1930
100K_0402_5%
DCIN_ACOK#
S
G
PQ1815
D
1 3
PD1818
@PD@
1 2
PD1812
2
1
G
12
PR1913
1M_0402_5%
PR1920
100K_0402_5%
12
2
VBUS_ACOK
DCIN_ACOK#
FDMC6679AZ_MLP8-5
1 2
PC1806
1500P_0402_50V7K
AO3409 P-CHANNEL SOT-23
@PD@
0_0402_5%
1 2
@PD@
0_0402_5%
0_0402_5%
1 2
1 2
3
1 2
2
0_0402_5%
PR1836
0_0402_5%
PR1833
1 2
0_0402_5%
1 2
Dock_AC_OK<49,73>
61
PR1924
PR1900
PR1901
Vbus_AC_Detector
1 2
VBUS_ACOK
12
PR1880
221K_0402_1%~D
1 2
VBUS_ACOK#
61
2
PQ1817A
DMN65D8LDW-7_SOT363-6
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
PR1863
1.8M_0402_1%
1 2
8
PU1802B
5
P
+
O
6
-
G
LM393DR_SO8~D
4
12
PC1814
220P_0402_50V8J~D
PR1850
221K_0402_1%~D
7
PC1816
1200P_0402_50V7K
3
2
PQ1827A
DMN65D8LDW-7_SOT363-6
PR1853
0_0402_5%
PR1882
0_0402_5%
S8
PQ1806
1
2
3 5
4
12
PR1816
1M_0402_5%
1 2
SDMK0340L-7-F_SOD323-2
PR1899
PR1923
10K_0402_5%
1 2
VBUS_AC_OK
PWR_SRC_ILIMIT <49,73>
@PD@
0_0402_5%
1 2
61
2
DMN65D8LDW-7_SOT363-6
34
5
2
PQ1802
FDMC6679AZ_MLP8-5
1
2
35
PD1816
PQ1817B
12
12
PR1925
PQ1814A
DMN65D8LDW-7_SOT363-6
5
2
0_0402_5%
1 2
4
12
34
61
PR1914
1 2
12
12
PR1802
1M_0402_5%
PR1808
10K_0402_5%
DCIN_ACOK
0_0402_5%
PQ1821B
DMN65D8LDW-7_SOT363-6
PQ1812A
DMN65D8LDW-7_SOT363-6
@PD@
S9
PQ1807FDMC6679AZ_MLP8-5
4
+VBUS_DC_SS +VBUS_DC_SS
1 2
PR1926
@PD@
0_0402_5%
1 2
61
PQ1825A
DMN65D8LDW-7_SOT363-6
PJP1807
PAD-OPEN1x1m
1 2
PC1802
1500P_0402_50V7K
AO3409 P-CHANNEL SOT-23
PR1881
PR1895
0_0402_5%
PR1824
10K_0402_5%
2
PJP1808
PAD-OPEN1x1m
S
D
1 3
12
1
2
35
12
G
PQ1803
2
5
12
1 2
PR1825
1M_0402_5%
34
PQ1825B
DMN65D8LDW-7_SOT363-6
+3.3V_VDD_PIC
12
12
34
CSS_GC<66,67>
PC1807
5
PR1809
100K_0402_5%
PR1810
100K_0402_5%
PQ1812B
DMN65D8LDW-7_SOT363-6
0.022U_0603_50V7K
0_0402_5%
1 2
+PWR_SRC+Tbt_Vbus
12
12
12
@PD@
PR1812
PR1873
PR1874
200K_0402_1%
200K_0402_1%
12
PR1856
PR1859
20K_0402_1%
19.6K_0402_1%
100K_0402_5%
12
12
PC1824
100P_0402_50V8J~D
112
JUMP_43X118
PR1897
1 2
@PD@
SENSEP <49,73>SENSEN <49,73>
PR1927
0_0402_5%
1 2
@PD@
PQ1826
DMP3056L-7 1P SOT23-3
1 3
D
PR18890_0402_5%
12
PJP1806
1 2
12
PAD-OPEN 43x118
S
G
PQ1809AO3409 P-CHANNEL SOT-23
PR1814
2
100K_0402_5%
D
1 3
SDMK0340L-7-F_SOD323-2
12
@PD@
SDMK0340L-7-F_SOD323-2
PR1820
100K_0402_5%
BAT54CW_SOT323-3
34
5
PQ1814B
DMN65D8LDW-7_SOT363-6
@PD@
PR1918
0_0402_5%
PR1919
1 2
Vbus_AC_Detector
12
PC1823
@PD@
0.01U_0402_25V7K~D
12
DELL CONFIDENTIAL/PROPRIETARY
Title
Title
Title
Size
Size
Size
Document Number Rev
Document Number Rev
Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
PJP1810
0_0402_5%
@PD@
S
G
2
1 2
PD1817
1 2
PD1804
1
12
PR1916
1M_0402_5%
PR1917
0_0402_5%
1 2
5
6
PC1825
220P_0402_50V8J~D
2
1 2
PR1885
@PD@
PD1815
+
-
100K_0402_1%
@PD@
PR1898
0_0402_5%
1 2
@PD@
PQ1823
PR1928
DMP3056L-7 1P SOT23-3
0_0402_5%
@PD@
1 3
D
G
2
12
12
PR1890
0_0402_5%
1 2
+PWR_SRC
PR1915
@PD@
0_0402_5%
1 2
PR1921
@PD@
0_0402_5%
1 2
PR1922
@PD@
0_0402_5%
PR1834
0_0402_5%
1 2
3
1 2
2
1 2
PR1835
0_0402_5%
(From EC)
PWR_SRC_ON <35,73>
12
PR1818
10K_0402_5%
PWR_SRC_ON_PC <49,73>
PR1871
3M_0402_5%
1 2
8
PU1804B
P
7
O
G
LM393DR_SO8~D
4
+SDC_IN
@PD@
S
PR1884
@PD@
PR1887
100K_0402_1%
DCIN_ACOK
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
ParkCity_TypeC_PD
ParkCity_TypeC_PD
ParkCity_TypeC_PD
LA-C841P
LA-C841P
LA-C841P
1
PR1888
@PD@
0_0402_5%
12
12
CSSN_1<66>
100K_0402_1%
PR18860_0402_5%
@PD@
CSSP_1<66>
12
+VBUS_DC_SS
PR18910_0402_5%
CSS_GC_1<66>
13
D
G
S
PQ1818
DMN65D8LW-7_SOT323-3
Dock_AC_OK <49,73>
VBUS_AC_OK
PWR_SRC_ILIMIT <49,73>
12
PR1861
221K_0402_1%
VBUS_AC_OK
12
PC1826
1200P_0402_50V7K
2
G
73 79Tuesday, September 08, 2015
73 79Tuesday, September 08, 2015
73 79Tuesday, September 08, 2015
12
12
PR1829
2
12
PR1832
13
D
S
DMN65D8LW-7_SOT323-3
0.3
0.3
0.3
100K_0402_5%
100K_0402_5%
PQ1820
@PD@
Vinafix.com
5
4
3
2
1
D D
EN_+VDDCIP
PJP1901
21
C C
PAD-OPEN 1x2m~D
12
12
0.1U_0402_25V6
PC1903
PC1905
2200P_0402_50V7K
+3.3V_ALW
12
@HPDSC@
PR1907
0_0402_5%
ILMT_+VDDCIP
12
@HPDSC@
PR1908
0_0402_5%
B B
@EMC@HPDSC@
@EMC@HPDSC@
10U_0805_25V6K
12
PC1906
@HPDSC@
+VDDCIP_B+
12
PC1904
10U_0805_25V6K
ILMT_+VDDCIP
PU1901
8
IN
EN
GND
ILMT
PG
BS
LX
FB
BYP
LDO
9
3
2
SYX198DQNC_QFN10_3X3
1
BST_+VDDCIP
6
10
4
7
5
12
0.1U_0603_25V7K
SW_+VDDCIP
12
PC1912
4.7U_0603_6.3V6K
PC1901
1 2
PC1913
4.7U_0603_6.3V6K
BST_+VDDCIP_C
+3.3V_ALW
12
PR1905
0_0603_5%
1 2
1M_0402_1%
PR1903
FB_+VDDCIP
PR1902
0_0402_5%
1 2
@EMC@HPDSC@
PR1904
4.7_1206_5%
1 2
0.68UH_MMD-05CZ-R68M-X2L_8.5A_20%
SNB_+VDDCIP
PL1901
1 2
PR1906
@EMC@HPDSC@
680P_0603_50V7K
12
6.65K_0402_1%
PR1910
12
PR1909
13.3K_0402_1%
PXS_PWREN <53,69>
PC1902
1 2
12
PC1907
12
1K_0402_5%
+0.9V_VDDCIP
12
PC1908
47U_0805_6.3V6M
330P_0402_50V7K
PJP1902
2
112
JUMP_43X118
+0.9V_VDDCI
+0.9V_VDDCIP
12
12
PC1909
47U_0805_6.3V6M
@HPDSC@
12
PC1910
PC1911
22U_0805_6.3VAM
22U_0805_6.3VAM
The current limit is set to 8A, 12A or 16A when this pin
is pull low, floating or pull high
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE C USTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
3
2
Size
Size
Size
Date : Sheet o f
Date : Sheet o f
Date : Sheet o f
Compal Electronics, Inc.
GPU_VDDCI(SYX198D)
GPU_VDDCI(SYX198D)
GPU_VDDCI(SYX198D)
Document Number Re v
Document Number Re v
Document Number Re v
LA-C841P
LA-C841P
LA-C841P
74 79Tuesday, September 08, 2015
74 79Tuesday, September 08, 2015
74 79Tuesday, September 08, 2015
1
0.1
0.1
0.1
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Version Change List ( P. I. R.
3
2
1
List )
Item Issue
D D
Page#
Title
Type-C PD74
2
3
4
C C
5
6
7
8
74 Type-C PD
9
B B
10
11
12
13
Date
3/23 Compal74 Type-C PD
3/23 Compal74 Type-C PD
3/23 Compal74 Type-C PD
3/23 CompalCherger67
3/23 Compal67 Cherger
3/23 Compal68 Selector
4/10 Compal X02
4/10 Compal67 Cherger
4/10 Compal X0274 Type-C PD
6/11 CompalType-C PD74
Request Owner
Ensure the DCIN_ACOK voltage level can not
be divide.
Ensure the S6 Mosfet turn on sequency after PQ802
turn off to avoid the +SDC_IN oscillate to cause
audible noise when with M/B AC and TypeC AC
then pulg out M/B AC
Voiad the +Vbus_DC_ss leak to +PWR_SRC when
tininty dock with AC and M/B without AC
Reserve Dock_AC_OK circuit to turn off the S8 and
S9 when trinity dock plug in AC
Provide the charger operate voltage when M/B just
has TypeC AC only
Avoid the +SDC_IN oscillation to cause audible
noise when system with M/B AC and TypeC AC
then plug out M/B AC
Avoid the +SDC_IN oscillation to cause audible
noise when system with E-DOCK AC and TypeC
adapter then plug out E-DOCK AC
Reserve circuit for charger adapter monitor
function when system with trinity dock AC only
Avoid the +SDC_IN oscillation to cause audible
noise when system with M/B AC and TypeC AC
then plug out M/B AC
Add pull down for OVP circuit to enable OVP initial.
Reserve control circuit from GPIO1 and GPIO2 for OVP
function enable.
For reduce inrush current when dual AC
and single AC (Dell request)
For reduce inrush current ( PQ1805 close late),
change method for S6 control
add 1 GPIO to program PROCHOT_GATE 6/11 Compal Add PQ912 PR945 PC909 PU904 PR946 PR94768 Selector
Description
Solution
Description
Change the PR1865 PR1861 to 10K
Change the PR1806 to 40.2K
Depop PD1815 and PR1915
Reserve PR1921 PD1817 PR1922 PR1926 PR1925 PR1923 PR1924 PD1818
Add PD804
Add PD805 PR843 PR842 PQ812 PR845 PR844 PR841 PR838 PQ811 PR839 PR840
Add PD906 PR943 PR944 PQ999 PR942 PR940 PR941
Add PR1927 PR1928 PQ1826 PQ1823 PR1885 PR1888 PR1884 PR1886 PR1887
PR1829 PR1832 PQ1818 PR1889 PR1890 PR1891
Add PR1891 PR1889 PR1890 PR846 PC838 PQ813 PR847 PR848 PQ814 PR849
Add PR1927 PR1928 PQ1826 PQ1823 PR1885 PR1888 PR1884 PR1886 PR1887
PR1829 PR1832 PQ1818 PR1889 PR1890 PR1891
Add PU1805,PU1806,PC1831,PC1832,PQ1828,,PQ1827,PR1929,PR1930,PR1931
,PR1932,PR1933
Depop PR1805,PR1807,PR1811
Add PU1807,PR1934 PC1833
Rev.
X011 3/23 Compal
X01
X01
X01
X01
X01
X01
X02
X02Compal4/29Type-C PD74
X02
X02
14
15
16
A A
17
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size
Size
Size
Date: Sheet of
Date: Sheet o f
Date: Sheet o f
Compal Electronics, Inc.
PWR P.I.R (1/1)
PWR P.I.R (1/1)
PWR P.I.R (1/1)
Document Number Re v
Document Number Rev
Document Number Rev
LA-C841P
LA-C841P
LA-C841P
1
75 79Tuesday, September 08, 2015
75 79Tuesday, September 08, 2015
75 79Tuesday, September 08, 2015
0.3
0.3
0.3
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4
Version Change List ( P. I. R. List )
3
2
1
Title
LAN_WAKE#
PCH-H(2/9)
LAN
MEC5085
VGA
Date
2015/02/28
2015/03/02
2015/03/02
2015/03/09
2015/03/09
Owner
COMPAL
COMPAL
COMPAL
COMPAL
COMPAL
2015/03/09
AR 2015/03/11 COMPAL
Issue
Description
LAN_WAKE# shut down auto pwr on issue
DCI (Direct Connect Interface) test
IEEE EA measurement
AC_PRESENT need PH.
0.1(X00) VGA no function
AR circuit modify Add RT212 ~RT221, Reserve RT212 & RT214AR COMPAL46
Can't have different stencil
for different GPU PWR jump
AR circuit modify LSTX and LSRX link to Debug 3 and 4 0.2(X01)10 46
Pop RH93, Depop RL70
Add RH364, RH365
Change LL2 ~ LL9 to 2.2 ohm Res (RL71~RL78)
Add RE309 PH to +3.3V_ALW
PH 2.2K ohm(RH369) to +3.3V_RUN on UH1.BE6 (DDPD_CTRLDATA)
PJP1903 & RV1082, RV1083 ColayGPU 2015/03/09 COMPAL 0.2(X01)9 52
2
3
4
5
6
7
8
Page#
6, 9 +VCC_IO PC15 H Can't boot issue Change +VCC_IO to +1.0VS_VCCIO2015/02/28 COMPAL 0.2(X01)
20, 21
17
31
36
21
Item
D D
C C
AR 2015/03/11 COMPAL11 46 TBT & HDMI Priority Swap AR DP0 & DP1 0.2(X01)
PCH-H(5/9) 2015/03/1112 20 COMPAL HDD_FALL_INT PH Add RH355 0.2(X01)
AR 2015/03/1213 46 COMPAL AR circuit modify Add RT222, RT223, RT224, RT225 0.2(X01)
Solution
Description
Rev.
0.2(X01)COMPALPCH-H(6/9)211 Align PC14 GPIO for Non-DOCK Reserve RH359 100K Pull down2015/02/28
0.2(X01)
0.2(X01)
0.2(X01)
0.2(X01)
0.2(X01)
0.2(X01)
Request
TPM 2015/03/1214 37 COMPAL TPM circuit modify Add RZ112, RZ113, Depop RZ108 0.2(X01)
B B
15
16
17
18
19 46 2015/03/30 AR ROM PWR RAIL ModifyTBT AR COMPAL Remove RT214, RT215; Add PWR Rail +3.3V_TBT_FLASH_R 0.3(X02)
A A
21 PCH-H(6/9) 2015/03/12 COMPAL DIMM TYPE GPIO Add RH372 0.2(X01)
UV28, UV29 change from Pericom to Parade solution.HDMI & DP EA FailCOMPAL2015/03/19DP DeMux26, 27
49 AR 2015/03/02 COMPAL AR circuit modify DOCK_AC_OK and SYSTEM_WAKE# link to Debug 1 and 2
0.2(X01)
0.2(X01)
0.3(X02)2015/03/27 IR_CAM_DET# GPIO21 PCH-H(6/9) COMPAL IR Camera pin change and new GPIO on GPP_A23, include PU RH373
COMPAL
COMPAL
COMPAL
COMPAL2015/03/30 Modify AR +3.3V_TBT_SX TBT AR DEPOP RT131 0.3(X02)21 47
2015/03/30 COMPAL22 TBT AR
COMPAL
USH RST# 2015/03/30USH & TPM2.03720 0.3(X02)Add RZ114, RZ115 & Depop, USH RST#COMPAL
Add Reset IC for PD_RESET#
AR reset must assert after +3.3V_TBT 100us
Add UT23, CT200, CT201, RT232, RT233, RT234, RT235 0.3(X02)46
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size
Size
Size
Date: Sheet of
Date: Sheet o f
Date: Sheet o f
Compal Electronics, Inc.
EE P.I.R (1/3)
EE P.I.R (1/3)
EE P.I.R (1/3)
Document Number Re v
Document Number R ev
Document Number R ev
LA-C841P
LA-C841P
LA-C841P
1
76 76Tuesday, September 08, 2015
76 76Tuesday, September 08, 2015
76 76Tuesday, September 08, 2015
0.2
0.2
0.2
Vinafix.com
5
4
Version Change List ( P. I. R. List )
3
2
1
Item
D D
Page#
Title
Date
Owner
Request
Issue
Description
Solution
Description
Rev.
0.3(X02)COMPALTBT AR4624 Vendor recommend add PD_RESET# cap Add @CT1992015/03/30
0.3(X02)25 47 TBT AR 2015/03/31 COMPAL Give TBT_PWR_EN default value Add pull down 10k(RT230)
*26 0.3(X02)X'tal 2015/04/01 COMPAL X'tal EA Change CE28, CE29 from 33p to 27p
Change CH4, CH5 from 18p to 15p
Change CH13, CH14 from 22p to 15p
Change CV163, CV163 from 6.8p to 10p
27 49 0.3(X02)TBT-AR 2015/04/02 COMPAL AR PD TPS65982 Soft-start pin Add CT202 0.22u
4828 TBT-AR 2015/04/02 0.3(X02)COMPAL
29 49 TBT-AR 2015/04/02 0.3(X02)COMPAL
30 30 eDP 2015/04/02 0.3(X02)COMPAL IR CAM Pin Define NC JIR1 Pin4
C C
UT17 LDO source change from +Vbus_1
to +PP_HV
AR PD TPS65982 BUSPOWER_N change
to VCC1V8D_TBTA_LDO
UT17 LDO source change from +Vbus_1
to +PP_HV
AR PD TPS65982 BUSPOWER_N change
to VCC1V8D_TBTA_LDO
31 49 TBT-AR 2015/04/02 0.3(X02)COMPAL AR PD DEBUG Add @RT236, RT237
TBT-AR4732 0.3(X02)
Follow CRB0.998COMPAL2015/04/02
change UT2.R13 to +3.3V_TBT_L,add CT203,CT204,LT2.change
CT129,CT130,CT131 to 47uF,remove CT132
33 36 MEC5085 Change RE79 to 33K ohm 0.3(X02)2015/04/03 COMPAL Change Board ID to X02
34 20, 31 LAN SMBUS 2015/04/07 COMPAL +3.3V_ALW_PCH and +3.3V_RUN backdrive EA Pop RH67, RH77; Depop RC19, RC20 0.3(X02)
35 33 JSIM1 2015/04/07 COMPAL ME CONN Change footprint to T-SOL_5-991503004000-6_8P-T 0.3(X02)
36 33 JTHB1 2015/04/07 COMPAL ME CONN Change footprint to JAE_DX07B024XJ1R1100_24P-T 0.3(X02)
37 25 HDMI 2015/04/08 COMPAL HDMI EA Depop RV302, RV654, RV683-RV693; Pop LV3, LV6, LV9, LV12, RV207 0.3(X02)
38 25 HDMI 2015/04/08 COMPAL HDMI EA Remove RV654, RV683, RV684, RV685 0.3(X02)
B B
39 48 TBT-AR 2015/04/09 COMPAL AR LDO PWR EN ADD Cap Add CT205 & Depop 0.3(X02)
40 26 PS8349B 2015/04/10 COMPAL E-DOCK DP Port1 can't display Add RV1102 CPU_DP1_AUXN_C 1M pull high +3.3V_RUN 0.3(X02)
41 21 GPU PWR EN 2015/04/13 COMPAL GPU lost imtermittently Pop RH346, Depop RH349 0.3(X02)
42 35, 51 GPU_PWR_LEVEL 2015/04/13 COMPAL
43 41 DOCK_DP_HPD 2015/04/13 COMPAL
A A
GPIO[A7] (GPU_PWR_LEVEL) need to
seeting to PP, so we can de-pop RV113,RE304.
Depop DOCK_DP_HPD PD resistor for
PS8349B/PS8348B internal PD.
Depop RV113, RE304 0.3(X02)
Depop R268, R271 0.3(X02)
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size
Size
Size
Date: Sheet of
Date: Sheet o f
Date: Sheet o f
Compal Electronics, Inc.
EE P.I.R (2/3)
EE P.I.R (2/3)
EE P.I.R (2/3)
Document Number Re v
Document Number R ev
Document Number R ev
LA-C841P
LA-C841P
LA-C841P
1
77 77Tuesday, September 08, 2015
77 77Tuesday, September 08, 2015
77 77Tuesday, September 08, 2015
0.2
0.2
0.2
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Version Change List ( P. I. R.
3
2
1
List )
Title
Date
Parade DeMux 2015/04/20
45
46
Page#
33 0.4(X03)
35
Item
D D
47
48
49
26,27
46
Request
Owner
2015/04/23
COMPAL
COMPALTBT AR
Issue
Description
Vendor Parade suggest Parade DeMux
ouput to Parade Redriver no need AUX PD/PU
For layout space
JSIM1 CONN 2nd JAE2015/04/14 COMPAL JSIM1 CONN 2nd JAEPAD & ME & LED
Add RI31 for SIM Detect2015/04/14 COMPAL Add SIM Detect for Hot PlugSIM Detect
Add RE311 PU for AR_SMBUS_ALERT#Align PC U & H GPIO for EC common codeEC 2015/04/20 COMPAL
Add RZ116, RZ117Add PU for I2C TP ModuleCOMPAL2015/04/20KB42
Depop RV604, RV608, RV701, RV712
Remove RT149, RT166
Solution
Description
Rev.
0.4(X03)4344
0.4(X03)
0.4(X03)
0.4(X03)
0.4(X03)
2015/04/24 Change CT129~CT131 from 47u to 10u. Add CT206 10uFollow Intel AR Reference 0.4(X03)COMPALTBT AR4650
2015/04/29 Change JTHB1 from Hybrid to SMD typeTBT AR COMPAL CONN Impact Type C return loss 0.4(X03)51 49
C C
TP function sometimes lag2015/05/05 CZ30, CZ31 change from 10p to 330p improve signal quality 0.5(X03)COMPALKB_TP52 42
53 40 USB Charger COMPAL 0.5(X03)2015/05/05 Insert USB HDD Shut Down Issue Add CI32 Poly 150U
54 36 MEC5085 2015/05/05 COMPAL AR no function at AC S5 0.5(X03)UPD_GPU_SMBDAT/UPD_GPU_SMBCLK PU change from +3.3V_RUN to +3.3V_ALW
38 M2280 2015/05/26 COMPAL Insert NVME SATA LED no function JNGFF3.10 connected to PCH_SATA_LED# 0.5(X03)55
35 EC 2015/05/26 COMPAL For Type-C function 1. Add 5048 GPIO(PROCHOT_GATE) and reserve RE313 pull high
0.5(X03)56
2. Add 5048(PD_ACE_DET#) for AR config? and pull high on RE312, PD ON RE314
57 COMPAL 0.5(X03)22
PCH(7/9) 2015/06/01
5.76GHz noise observed on thie Wi-Fi
antenna
1.Add RC349 and CC310 on VCCHDA
2.Add RC350 and CC311 on VCCAPLL_1P0
2015/06/01 Add LT3TBT AR COMPAL AR IC PWR different by version 0.5(X03)58 47
B B
2015/06/09TBT AR COMPAL PWR Consumption measurement Add PJP41, PJP42 0.5(X03)59 47
2015/06/09 0.5(X03)Reserve DT25~DT28ESDCOMPALTBT AR4760
2015/06/10GPU COMPAL For AR SMBUS Depop QV14 0.5(X03)61 51
25 HDMI 2015/06/11 COMPAL Remove HDMI choke Add RV683, RV684, RV685, RV654;
26, 27 * 2015/06/11 COMPAL Dell recommend Change RE312 from 100K to 330K
Pop RV686, RV687, RV688, RV689, RV690, RV691, RV692, RV693;
Depop LV3, LV6, LV9, LV12; Change RV303 from 4.99K to 4.02K
Reserve CV1104, CV1105 for SW1_DP1_HPD & SW2_DP1_HPD
0.5(X03)62
0.5(X03)63
2015/06/11 0.5(X03)Add RE315 PD 100KPROCHOT_GATE default PDCOMPALEC3564
2015/06/11 0.6(X04)Add QE11Win PE Global Reset IssueCOMPALEC3665
A A
2015/06/11 Add UE5 0.6(X04)36 EC COMPAL Intel Sequence Fail66
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size
Size
Size
Date: Sheet of
Date: Sheet o f
Date: Sheet o f
Compal Electronics, Inc.
EE P.I.R (3/3)
EE P.I.R (3/3)
EE P.I.R (3/3)
Document Number Re v
Document Number R ev
Document Number R ev
LA-C841P
LA-C841P
LA-C841P
1
78 78Tuesday, September 08, 2015
78 78Tuesday, September 08, 2015
78 78Tuesday, September 08, 2015
0.2
0.2
0.2
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Version Change List ( P. I. R.
3
2
1
List )
Item
D D
Page#
Title
Date
Request
Owner
Issue
Description
Solution
Description
Rev.
1.0(A00)3767 Change TPM IC VSB from +3.3V_ALW_PCH to +3.3V_ALW2015/07/07 COMPAL Deep Sleep TPM FailTPM
eDP 2015/07/20 COMPAL Material shortage Changed DV1, DV2 and DV3 from SCS00003800 to SCS0000640068 30 1.0(A00)
TPM 2015/07/2069 37 COMPAL Change TPM FW to 1.2 version Changed UZ12 from SA000082D00 to SA00008EL20 1.0(A00)
HW70 40 2015/07/20 COMPAL For Sourcer request CI32 change from SGA00002N80 to SGA00004E10 1.0(A00)
71 36 MEC5085 2015/07/20 COMPAL change BID to A00 change RE79 to 1K ohm. 1.0(A00)
CPU(6/8) 2015/08/03 COMPAL 1.0(A00)72 11 Follow Intel DG1.5 Add load switch (UZ26) control(S3) to +VCCPLL_OC power rail
2015/08/03PCH(7/9)2273
5.76GHz noise observed
on thie Wi-Fi antenna
1.0(A00)COMPAL Change RC349 and RC350 to LC1 and LC2
1.0(A00)Change UV27 to Trise 0.5ms part SA00007T400+VGA_PCIE cause +1.0V_PRIM droopCOMPAL2015/08/03GPU5374
C C
COMPAL Folow intel DG1.5 Add UC9, CZ115 1.0(A00)75 11 CPU 2015/08/11
B B
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size
Size
Size
Date: Sheet of
Date: Sheet o f
Date: Sheet o f
Compal Electronics, Inc.
EE P.I.R (4/4)
EE P.I.R (4/4)
EE P.I.R (4/4)
Document Number Re v
Document Number R ev
Document Number R ev
LA-C841P
LA-C841P
LA-C841P
1
79 79Tuesday, September 08, 2015
79 79Tuesday, September 08, 2015
79 79Tuesday, September 08, 2015
0.2
0.2
0.2
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