Dell N5010 Schematics

5

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D D

4

3

2

1

Berry DG15 Discrete/UMA Schematics Document

Arrandale

C C

Intel PCH

2010-02-03 REV : A00

B B

DY :None Installed UMA:UMA platform installed PARK:DIS PARK platform installed M96:DIS M96 platform installed VRAM_1G:VRAM 128M*16 installed Colay :Manual modify BOM

A A

5

4

www.vinafix.vn

3

2

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document N umber Rev

A3

Date: Sheet of

Berry

Taipei Hsien 221, Taiwan, R.O.C.

Cover Page

1

1 92Wednesd ay, February 10, 2010

A00

5

39,

3

454

4

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##OnMainBoard

1.Park-XT;512MB (64Mx16b*4) Dell P/N:9TGTN$AA HYNIX

D D

Dell P/N:C995R$AA SAMSUNG

2.Park-XT;1GB (128Mx16b*4) Dell P/N:PXFYJ$AA HYNIX Dell P/N:C09DT$AA SAMSUNG

VRAM

1GB/512MB

85,86,87,88

DDR3 800MHz

(1 and 2 co-lay)

Clock Generator

SLG8SP585

7

AMD Graphic

Park-XT (Discrete only)

80,81,82,83,84

C C

HDMI

LCD

57

54

CRT

Left Side: USB x 2

B B

Discreet/UMA Co-lay

LVDS(Dual Channel)

RGB CRT

CRT Board

77

Bluetooth

CAMERA

73

54

4

3

Berry Block Diagram (Discrete/UMA co-lay)

4

HDMI

PCIe x 16

(Discrete only)

FDIx4x2 (UMA only)

Level

57

shifter

USB2.0 x 4

AZALIA

Intel CPU

Arrandale

8,9,10,11,12,13,14

DMIx4

Intel

PCH

14 USB 2.0/1.1 ports

ETHERNET (10/100/1000Mb)

High Definition Audio

SATA ports (6)

PCIE ports (8)

LPC I/F

ACPI 1.1

PCI/PCI BRIDGE

20,21,22,23,24,25,26,27,28

HM57

DDRIII 800/1066 Channel A

DDRIII 800/1066 Channel B

PCIE x 3

SATA x 1

USB 2.0 x 4

USB 2.0 x 1

Project code : 91.4HH01.001 PCB P/N : 48.4HH01.0SA Revision : 09909-1

I/O Board

CardReader

SATAx1 / USB2.0x1

PCIE x 1,USB x 1

Connector

USB 2.0 x 1

76

Realtek RTS5159

DDRIII 8

00/1066

DDRIII 800/1066

PCIE x 1 USB x 1

PCIE x 1

78

2

Slot 0

18

Slot 1

19

10/100 NIC

RTL8103T-VB

ESATA/USB Combo

Mini-Card

SD/MMC+/MS/ MS Pro/xD

Mini-Card

802.11a/b/g

Realtek

WWAN

Right Side: USB x 1

RJ45 CONN

SIM

1

CPU DC/DC

ISL62883

INPUTS

+PWR_SRC

OUTPUTS

+VCC_CORE

SYSTEM DC/DC

TPS51218

INPUTS

+PWR_SRC

OUTPUTS

+1.05V_VTT

SYSTEM DC/DC

RT8205B

INPUTS

+PWR_SRC +5V_ALW

OUTPUTS

+5V_ALW2 +3.3V_RTC_LDO

+3.3V_ALW +15V_ALW

SYSTEM DC/DC

TPS51116

INPUTS

+PWR_SRC

OUTPUTS

+1.5V_SUS +0.75V_DDR_VTT +V_DDR_REF

SYSTEM DC/DC

TPS51611

INPUTS

+PWR_SRC

OUTPUTS

+CPU_GFX_CORE

VGA

RT8208B

INPUTS

+PWR_SRC

OUTPUTS

+VGA_CORE

TI CHARGER

BQ24745

INPUTS

+DC_IN +PBATT

26

SYSTEM DC/DC

OUTPUTS

+PWR_SRC

APL5930

INPUTS

+3.3V_ALW

OUTPUTS

+1.8V_RUN

+1.8V_RUN_VGA

SYSTEM DC/DC

APL5930

INPUTS OUTPUTS

26

+1.5V_SUS +1.0V_RUN_VGA

47

49

46

50

53

89

45

51

90

Switches

INPUTS OUTPUTS

Internal Analog MIC

HP1

MIC IN

A A

Azalia CODEC

IDT 92HD79B1

SPI

Flash ROM

4MB

30

SPI

LPC Bus

62

KBC

NUVOTON

NPCE781BA0DX

SATA x 2

LPC debug port

SMBus

37

70

HDD

ODD

59

2CH SPEAKER

Title

Size Document N umber Rev

A3

Date: Sheet of

Block Diagram

Berry

5

Flash ROM

256kB

4

Touch

62

PAD

68

Int. KB

68 25

www.vinafix.vn

Thermal

Main:G7922 Sec.EMC2102

3

Fan

39

58

2

+1.5V_SUS +5V_ALW

PCB LAYER

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

1

+1.5V_RUN

+3.3V_RUN+3.3V_ALW

L1:Top L2:VCC L3:Signal L4:Signal L5:GND L6:Bottom

2 92Wednesd ay, February 10, 2010

+5V_RUN

A00

5

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4

3

2

1

D D

RT8208B

Adapter

+PWR_SRC TPS51116

+VGA_CORE

ISL62883

For Discrete

TPS51218

TPS51611

AO4407A

+1.0V_RUN_VGA

+0.75V_DDR_VTT+V_DDR_REF

APL5930KAI

+1.5V_SUS

Charger

+CPU_GFX_CORE

For UMA

+3.3V_RUN_VGA

For Discrete

+3.3V_ALW

APL5930KAI

+1.8V_RUN

For Discrete

PA102FMG

+3.3V_LAN

AO4468

+1.5V_RUN

+1.5V_RUN_CPU

Battery

BQ24745

+PBATT

+VCC_CORE

+1.05V_VTT

RT8205B

C C

+15V_ALW

+3.3V_RTC_LDO

SI2301CDS

+KBC_PWR

+5V_ALW2

+5V_ALW

UP7534BRA8

+5V_USB1

I/O Board USB Power CRT Board USB Power

AO4468

+5V_RUN

UP7534BRA8

+5V_USB2

AO4468

+3.3V_RUN

RT9198-33PBG

B B

+3.3V_CRT_LDO

APL5930KAI

+1.8V_RUN_VGA

For Discrete

SI3456BD

+LCDVDD

RTS5159

+3.3V_RUN_CARD

RTL8103T-VB

+1.2V_LOM

Power Shape

A A

5

4

www.vinafix.vn

Regulator LDO Switch

3

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Power Block Diagram

Size Document N umber Rev

A3

Date: Sheet of

2

Date: Sheet of

Power Block Diagram

Berry

Taipei Hsien 221, Taiwan, R.O.C.

3 92Wednesd ay, February 10, 2010

1

A00

A

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PCH SMBus Block Diagram

+3.3V_ALW

‧

SRN2K2J-1-GP

SMBCLK

PCH_SMB_CLK

PCH_SMB_DATA

+3.3V_ALW

‧

SRN2K2J-8-GP

‧

1 1

SMBDATA

+3.3V_RUN

‧

2N7002SPT

B

+3.3V_RUN

‧

SRN2K2J-1-GP

PCH_SMBCLK

‧

PCH_SMBDATA

‧

DIMM 1

SCL

SDA

SMBus Address:A0

C

D

KBC SMBus Block Diagram

+5V_RUN

‧

SRN10KJ-5-GP

TouchPad Conn.

PSDAT1

TPDATA

TPCLKPSCLK1

+KBC_PWR

‧

TPDATA

TPCLK

TPDATA

TPCLK

E

‧

SML1CLK

SML1DATA

SML0CLK

SML0DATA

PCH

2 2

SDVO_CTRLCLK

SDVO_CTRLDATA

L_DDC_CLK

L_DDC_DATA

CRT_DDC_CLK

CRT_DDC_DATA

KBC_SCL1

KBC_SDA1

SML0_CLK

SML0_DATA

+3.3V_RUN

‧

SRN2K2J-1-GP

UMA

PCH_HDMI_CLK

PCH_HDMI_DATA

SRN2K2J-1-GP

UMA

LDDC_CLK_PCH

LDDC_DATA_PCH

PCH_CRT_DDCCLK

PCH_CRT_DDCDATA

To KBC

Level Shift

+3.3V_RUN

‧

UMA

SRN0J-6-GP

2N7002DW-1-GP

PCH_HDMI_CLK

PCH_HDMI_DATA

UMA

+3.3V_RUN_VGA

‧

SRN2K2J-1-GP

+3.3V_ALW

‧

SRN2K2J-1-GP

XDP

‧

PCH_SMBCLK

‧

PCH_SMBDATA

PCH_SMBCLK

PCH_SMBDATA

PCH_SMBCLK

PCH_SMBDATA

PCH_SMBCLK

PCH_SMBDATA

DIMM 2

SCL

SDA

SMBus Address:A4

Clock Generator

SCLK

SDATA

SMBus address:D2

Minicard WLAN

SMB_CLK

SMB_DATA

Minicard W-WAN

SMB_CLK

SMB_DATA

KBC

NPCE781BA0DX

GPIO73/SCL2

GPIO74/SDA2

SCL1

SDA1

BAT_SCL

BAT_SDA

KBC_SCL1

KBC_SDA1

SRN4K7J-8-GP

SRN100J-3-GP

PBAT_SMBCLK1

PBAT_SMBDAT1

2N7002DW-1-GP

Battery Conn.

CLK_SMB

SMBus address:16

DAT_SMB

BQ24745

SCL

SDA

SMBus address:12

+3.3V_RUN

‧

+3.3V_RUN

‧

SRN4K7J-8-GP

THERM_SCL

THERM_SDA

Thermal

SCL

SMBus address:7A

SDA

DIS

3 3

4 4

DDC1CLK

DDC1DATA

DDC2CLK

DDC2DATA

VGA

IFPC_AUX_I2CW_SCL

IFPC_AUX_I2C_SDA#

A

VGA_CRT_DDCCLK

VGA_CRT_DDCDATA

+3.3V_RUN_VGA

SRN2K2J-1-GP

DIS

GPU_HDMI_CLK

GPU_HDMI_DATA

‧

TSCBTD3305CPWR

+5V_RUN

‧

SRN2K2J-1-GP

B

LCD CONN

SRN0J-6-GP

UMA

+3.3V_RUN

UMA

‧

SRN2K2J-1-GP

DIS

UMA

2N7002DW-1-GP

+3.3V_RUN

‧

+5V_RUN

‧

CRT_DDCDATA_CON

SRN2K2J-1-GP

CRT_DDCCLK_CON

CRT CONN

HDMI CONN

C

www.vinafix.vn

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., H sichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., H sichih, Taipei Hsie n 221, Taiwan, R.O.C.

Taipei Hsie n 221, Taiwan, R.O.C.

Title

Size Document Num ber Rev

A2

Berry

Date: Sheet of

D

Date: Sheet of

Taipei Hsie n 221, Taiwan, R.O.C.

SMBUS Block Diagram

4 92Wednesd ay, February 10, 2010

E

4 92Wednesd ay, February 10, 2010

A00

A

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B

C

D

E

Thermal Block Diagram

1 1

Audio Block Diagram

SPKR_PORT_D_L-

SPKR_PORT_D_R+

SPEAKER

Codec

DP1

EMC2102_DP1

SC470P50V3JN-2GP

2 2

DN1

EMC2102_DN1

SC470P50V3JN-2GP

MMBT3904-3-GP

Place near CPU

Thermal

PWM CORE

92HD79B1

HP1_PORT_B_L

H

P1_PORT_B_R

HP

OUT

G7922R61U

DP2

VGA_THERMDA

D

N2

VGA_THERMDC

Place near GPU(DISCRETE only).

3 3

THRMDA

VGA

THRMDC

MMBT3904-3-GP

System Sensor(UMA only)

HP0_PORT_A_L

HP0_PORT_A_R

VREFOUT_A_OR_F

DMIC_CLK/GPIO1

DMIC0/GPIO2

MIC

IN

DP3

EMC2102_DP3

SC470P50V3JN-2GP

MC2102_DN3

DN3

E

Put under CPU(T8 HW shutdown)

4 4

A

B

MMBT3904-3-GP

PORTC_L

PORTC_R

VREFOUT_C

www.vinafix.vn

C

Analog MIC

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Thermal/Audio Block Diagram

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Berry

Taipei Hsien 221, Taiwan, R.O.C.

5 92Wednesday, February 10, 2010

E

A00

A

http://adf.ly/LOM1

Deddy Suyanto

B

C

D

E

Calpella Schematic Checklist Rev.0_7

Name Schematics Notes

SPKR

4 4

INIT3_3V# Weak internal pull-down. Do not pull high.

GNT3#/ GPIO55

INTVRMEN

GNT0#, GNT1#/GPIO51

GNT2#/ GPIO53

GPIO33

3 3

SPI_MOSI

NV_ALE

NC_CLE Weak internal pull-up. Do not pull low.

HAD_DOCK_EN# /GPIO[33]

HDA_SDO Weak internal pull-down. Do not pull high.

HDA_SYNC

GPIO15

GPIO8

GPIO27

2 2

Reboot option at power-up

Internal weak Pull-down.

Default Mode:

Connect to Vcc3_3 with 8.2-kΩ

No Reboot Mode with TCO Disabled:

- 10-kΩ weak pull-up resistor.

Internal pull-up.

Default Mode:

(Connect to ground with 4.7-kΩ weak

Low (0) = Top Block Swap Mode

p

ull-down resistor).

High (1) = Integrated VRM is enabled Low (0) = Integrated VRM is disabled

Left both GNT0# and GNT1# floating. No pull up

Default (SPI):

required.

Connect GNT1# to ground with 1-kΩ pull-down

Boot from PCI:

resistor. Leave GNT0# Floating.

Connect both GNT0# and GNT1# to ground with 1-kΩ

Boot from LPC:

pull-down resistor.

Default - Internal pull-up.

= Configures DMI for ESI compatible operation (for servers

Low (0)

only. Not for mobile/desktops).

Do not pull low.

Default:

Connect to ground with 1-kΩ

Disable ME in Manufacturing Mode:

pull-down resistor.

Connect to Vcc3_3 with 8.2-kΩ weak pull-up resistor.

Enable iTPM:

Left floating, no pull-down required.

Disable iTPM:

Connect to Vcc3_3 with 8.2-kΩ weak pull-up

Enable Danbury:

resistor. Connect to ground with 4.7-kΩ weak pull-down

Disable Danbury:

resistor.

Flash Descriptor Security will be overridden.

Low (0):

Flash Descriptor Security will be in effect.

High (1) :

Weak internal pull-down. Do not pull high.

Weak internal pull-up. Do not pull low.

Default = Do not connect (floating)

High(1) = Enables the internal VccVRM to have a clean supply for analog rails. No need to use on-board filter circuit. Low (0) = Disables the VccVRM. Need to use on-board filter circuits for analog rails.

Pin Name

CFG[4] Disabled - No Physical Display Port attached to

CFG[3]

CFG[0]

CFG[7]

Strap Description Configuration (Default value for each bit is

DisplayPort Presence

PCI-Express Static Lane Reversal

PCI-Express Configuration Select

Reserved Temporarily used for early Clarksfield samples.

1 unless specified otherwise)

1:Embedded

Embedded DisplayPort.

Enabled - An external Display Port device is

0:

connected to the Embedded Display Port.

Normal Operation.

1:

Lane Numbers Reversed 15 -> 0, 14 -> 1, ...

0:

Single PCI-Express Graphics

1:

Bifurcation enabled

0:

-

Clarksfield (only for early samples pre-ES1)

Connect to GND with 3.01K Ohm/5% resistor

Only temporary for early CFD samples

Note:

(rPGA/BGA) [For details please refer to the WW33 MoW and sighting report]. For a common motherboard design (for AUB and CFD), the pull-down resistor should be used. Does not impact AUB functionality.

Calpella Schematic Checklist Rev.0_7

Default Value

1

0

Processor StrappingPCH Strapping

USB TablePCIE Routing

USB

LANE1 RESERVED

LANE2

MiniCard WLAN

LANE3 LAN

LANE4 W-WAN

LANE5

LANE6

1 1

LANE7

LANE8

RESERVED

H55/HM55 no support

Pair

0

1

2

3

4

5

6

7

8

9

10

11

12

13

Device

USB2 (CRT Board)

USB3 (CRT Board)

WLAN (I/O Board)

RESERVED

CARD READER

BLUETOOTH

HM55 no support

USB1 (I/O Board)

USB0 (I/O Board ESATA)

RESERVED

W-WAN (I/O Board)

RESERVED

CAMERA

www.vinafix.vn

SATA Table

SATA

Pair

0

1

2

3

4

5

Device

HDD

ODD

HM55 no support

ESATA

RESERVED

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document N umber Rev

A3

Date: Sheet of

Berry

Taipei Hsien 221, Taiwan, R.O.C.

Table of Content

6 92Wednesd ay, February 10, 2010

A00

5

http://adf.ly/LOM1

SSID = CLOCK

4

3

2

1

12

C702

SC1U6D3V2KX-GP

CLKIN_DMI#23

CLKIN_DMI23

X02-20091222

R701

1 2

0R0603-P AD

12

C701

DY

SC10U10V5ZY-1GP

+3.3V_RU N

R703

1 2

2K2R2J-2 -GP

X02-20091222

RN702

2 3 1

0R4P2R-P AD

CLK_CPU _BCLK#23

CLK_CPU _BCLK23

FSC 0 1

SPEED

133MHz

(Default)

RN

12

4

C703

SCD1U10V2KX-5GP

2 3 1

0R4P2R-P AD

12

C704

SCD1U10V2KX-5GP

CPU_STO P#

CLK_DRE F#23

CLK_DRE F23

CLKIN_DMI#_C CLKIN_DMI_C

RN703

RN

100MHz

12

C705

SCD1U10V2KX-5GP

CLK_PCIE_ SATA#_C CLK_PCIE_ SATA_C

4

12

C706

SCD1U16V2ZY-2GP

U701

4

DOT_96#

3

DOT_96

14

SRC_2#

13

SRC_2

11

SRC_1/SATA#

10

SRC_1/SATA

22

CPU_0#

23

CPU_0

19

CPU_1#

20

CPU_1

SLG8SP5 85VTR-GP

SC12P50 V2JN-3GP

+3.3V_RU N_SL585

12

C707

SCD1U16V2ZY-2GP

+3.3V_RU N_SL585 +1.05V_R UN_SL585_IO

29

17

24

VDD_SRC

VDD_CPU

VSS_REF

GND

21

26

33

CLK_XTA L_IN CLK_XTA L_OUT

X-14D318 18M-37GP

12

82.30005.901

C712

1

VDD_REF

VDD_DOT

VSS_SRC

VSS_CPU

12

X701

1 2

5

VDD_27

VSS_DOT

2

15

18

VDD_SRC_IO

VDD_CPU_IO

CKPWRGD/PD#

REF_0/CPU_SEL

VSS_278VSS_SATA

9

12

27MHZ_SS

CPU_STOP#

XTAL_OUT

C713

C713 SC12P50 V2JN-3GP

SC12P50 V2JN-3GP

27MHZ

XTAL_IN

SDA SCL

+1.05V_V TT

C708

SC1U6D3V2KX-GP

CLK_VGA _27M_NSS_R

6

CLK_VGA _27M_SS_R

7

16 25 30

28 27

31 32

12

DY

CPU_STO P# CK_PW RGD FSC

CLK_XTA L_IN CLK_XTA L_OUT

+1.05V_V TT

DY

1 2

X02-20091222

R702

1 2

0R0603-P AD

X01-20091116

DIS

1 2 1 2

DY

R704

33R2J-2-G P

PCH_SMB CLK 18,19,23,7 6

R706

R706 4K7R2J-2 -GP

4K7R2J-2 -GP

FSC

R707

R707 10KR2J-3 -GP

10KR2J-3 -GP

+1.05V_R UN_SL585_IO

12

C709

C710

SC10U10V5ZY-1GP

33R2J-2-G PR708

33R2J-2-G PR708 33R2J-2-G PR709

33R2J-2-G PR709

12

DY

EC703

SC4D7P5 0V2CN-1GP

PCH_SMB DATA 18,19,23,76

SCD1U16V2ZY-2GP

CLK_PCH _14M 23

12

C711

VR_CLKE N#47

SCD1U16V2ZY-2GP

12

EC701

DY

SC4D7P5 0V2CN-1GP

CK_PW RGD

CLK_VGA _27M_SS 82

+3.3V_RU N_SL585

R705

10KR2J-3 -GP

. .

G

1 2

D

.

. .

.

12

DY

Q701

Q701 2N7002E -1-GP

2N7002E -1-GP

S

CLK_VGA _27M_NSS 82

EC702

EC702 SC4D7P5 0V2CN-1GP

SC4D7P5 0V2CN-1GP

+3.3V_RU N

D D

DY

x01 change tolerant 20091117 x01 change tolerant 20091117

C C

CLK_PCIE_ SATA#23

CLK_PCIE_ SATA23

B B

A A

5

4

www.vinafix.vn

3

2

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Clock Generator SLG8SP585

ize Document Nu mber Rev

Size Document N umber Rev

S

Date: Sheet of

Berry

Taipei Hsien 221, Taiwan, R.O.C.

7 92Monday, March 29 , 2010

1

A00

5

http://adf.ly/LOM1

4

3

2

1

SSID = CPU

D D

1 OF 9

CPU1A

678

SRN1KJ-4 -GP

4 5

RN801

A24 C23 B22 A21

B24 D23 B23 A22

D24 G24 F23 H23

D25 F24 E23 G23

E22 D21 D19 D18 G21 E19 F21 G18

D22 C21 D20 C18 G22 E20 F20 G19

F17 E17

C17

F18 D17

DMI_RX#0 DMI_RX#1 DMI_RX#2 DMI_RX#3

DMI_RX0 DMI_RX1 DMI_RX2 DMI_RX3

DMI_TX#0 DMI_TX#1 DMI_TX#2 DMI_TX#3

DMI_TX0 DMI_TX1 DMI_TX2 DMI_TX3

FDI_TX#0 FDI_TX#1 FDI_TX#2 FDI_TX#3 FDI_TX#4 FDI_TX#5 FDI_TX#6 FDI_TX#7

FDI_TX0 FDI_TX1 FDI_TX2 FDI_TX3 FDI_TX4 FDI_TX5 FDI_TX6 FDI_TX7

FDI_FSYNC0 FDI_FSYNC1

FDI_INT

FDI_LSYNC0 FDI_LSYNC1

CLARKUN F

62.10055.341

CLARKSFIELD

PCI EXPRESS -- GRAPHICS

DMI_PTX_C RXN022 DMI_PTX_C RXN122 DMI_PTX_C RXN222 DMI_PTX_C RXN322

DMI_PTX_C RXP022 DMI_PTX_C RXP122 DMI_PTX_C RXP222 DMI_PTX_C RXP322

DMI_CTX_P RXN022 DMI_CTX_P RXN122 DMI_CTX_P RXN222 DMI_CTX_P RXN322

DMI_CTX_P RXP022 DMI_CTX_P RXP122 DMI_CTX_P RXP222 DMI_CTX_P RXP322

C C

B B

FDI_TXN022 FDI_TXN122 FDI_TXN222 FDI_TXN322 FDI_TXN422 FDI_TXN522 FDI_TXN622 FDI_TXN722

FDI_TXP022 FDI_TXP122 FDI_TXP222 FDI_TXP322 FDI_TXP422 FDI_TXP522 FDI_TXP622 FDI_TXP722

FDI_FSYNC022 FDI_FSYNC122

FDI_INT22

FDI_LSYNC022 FDI_LSYNC122

12

R804

1KR2J-1-G P

DIS

123

SEC. 62.10053.561

A A

www.vinafix.vn

1 OF 9

PEG_RX#0 PEG_RX#1 PEG_RX#2 PEG_RX#3 PEG_RX#4 PEG_RX#5 PEG_RX#6 PEG_RX#7 PEG_RX#8 PEG_RX#9

PEG_RX0 PEG_RX1 PEG_RX2 PEG_RX3 PEG_RX4 PEG_RX5 PEG_RX6 PEG_RX7 PEG_RX8

PEG_RX9 PEG_RX10 PEG_RX11 PEG_RX12 PEG_RX13 PEG_RX14 PEG_RX15

PEG_TX#0 PEG_TX#1 PEG_TX#2 PEG_TX#3 PEG_TX#4 PEG_TX#5 PEG_TX#6 PEG_TX#7 PEG_TX#8 PEG_TX#9

PEG_TX0

PEG_TX1

PEG_TX2

PEG_TX3

PEG_TX4

PEG_TX5

PEG_TX6

PEG_TX7

PEG_TX8

PEG_TX9 PEG_TX10 PEG_TX11 PEG_TX12 PEG_TX13 PEG_TX14 PEG_TX15

B26 A26 B27 A25

K35 J34 J33 G35 G32 F34 F31 D35 E33 C33 D32 B32 C31 B28 B30 A31

J35 H34 H33 F35 G33 E34 F32 D34 F33 B33 D31 A32 C30 A28 B29 A30

L33 M35 M33 M30 L31 K32 M29 J31 K29 H30 H29 F29 E28 D29 D27 C26

L34 M34 M32 L30 M31 K31 M28 H31 K28 G30 G29 F28 E27 D28 C27 C25

PEG_ICOMPI

PEG_ICOMPO

PEG_RCOMPO

PEG_RBIAS

DMI

PEG_RX#10 PEG_RX#11 PEG_RX#12 PEG_RX#13 PEG_RX#14 PEG_RX#15

Intel(R) FDI

PEG_TX#10 PEG_TX#11 PEG_TX#12 PEG_TX#13 PEG_TX#14 PEG_TX#15

PEG_IRCOM P_R

EXP_RBIAS

PEG_RXN 15 PEG_RXN 14 PEG_RXN 13 PEG_RXN 12 PEG_RXN 11 PEG_RXN 10 PEG_RXN 9 PEG_RXN 8 PEG_RXN 7 PEG_RXN 6 PEG_RXN 5 PEG_RXN 4 PEG_RXN 3 PEG_RXN 2 PEG_RXN 1 PEG_RXN 0

PEG_RXP 15 PEG_RXP 14 PEG_RXP 13 PEG_RXP 12 PEG_RXP 11 PEG_RXP 10 PEG_RXP 9 PEG_RXP 8 PEG_RXP 7 PEG_RXP 6 PEG_RXP 5 PEG_RXP 4 PEG_RXP 3 PEG_RXP 2 PEG_RXP 1 PEG_RXP 0

PEG_C_T XN15 PEG_C_T XN14 PEG_C_T XN13 PEG_C_T XN12 PEG_C_T XN11 PEG_C_T XN10 PEG_C_T XN9 PEG_C_T XN8 PEG_C_T XN7 PEG_C_T XN6 PEG_C_T XN5 PEG_C_T XN4 PEG_C_T XN3 PEG_C_T XN2 PEG_C_T XN1 PEG_C_T XN0

PEG_C_T XP15 PEG_C_T XP14 PEG_C_T XP13 PEG_C_T XP12 PEG_C_T XP11 PEG_C_T XP10 PEG_C_T XP9 PEG_C_T XP8 PEG_C_T XP7 PEG_C_T XP6 PEG_C_T XP5 PEG_C_T XP4 PEG_C_T XP3 PEG_C_T XP2 PEG_C_T XP1 PEG_C_T XP0

R801 49D9R2F-GPR801 49D9R2F-GP

1 2

R802 750R2F-GPR802 750R2F-GP

1 2

PEG_RXN [0..15]

PEG_RXP [0..15]

C816 SCD1U 10V2KX-5GP

1 2

DIS

C815 SCD1U 10V2KX-5GP

1 2

DIS

C814 SCD1U 10V2KX-5GP

1 2

DIS

C813 SCD1U 10V2KX-5GP

1 2

DIS

C812 SCD1U 10V2KX-5GP

1 2

DIS

C811 SCD1U 10V2KX-5GP

1 2

DIS

C810 SCD1U 10V2KX-5GP

1 2

DIS

C809 SCD1U 10V2KX-5GP

1 2

DIS

C808 SCD1U 10V2KX-5GP

1 2

DIS

C807 SCD1U 10V2KX-5GP

1 2

DIS

C806 SCD1U 10V2KX-5GP

1 2

DIS

C805 SCD1U 10V2KX-5GP

1 2

DIS

C804 SCD1U 10V2KX-5GP

1 2

DIS

C803 SCD1U 10V2KX-5GP

1 2

DIS

C802 SCD1U 10V2KX-5GP

1 2

DIS

C801 SCD1U 10V2KX-5GP

1 2

DIS

C832 SCD1U 10V2KX-5GP

1 2

DIS

C831 SCD1U 10V2KX-5GP

1 2

DIS

C830 SCD1U 10V2KX-5GP

1 2

DIS

C829 SCD1U 10V2KX-5GP

1 2

DIS

C828 SCD1U 10V2KX-5GP

1 2

DIS

C827 SCD1U 10V2KX-5GP

1 2

DIS

C826 SCD1U 10V2KX-5GP

1 2

DIS

C825 SCD1U 10V2KX-5GP

1 2

DIS

C824 SCD1U 10V2KX-5GP

1 2

DIS

C823 SCD1U 10V2KX-5GP

1 2

DIS

C822 SCD1U 10V2KX-5GP

1 2

DIS

C821 SCD1U 10V2KX-5GP

1 2

DIS

C820 SCD1U 10V2KX-5GP

1 2

DIS

C819 SCD1U 10V2KX-5GP

1 2

DIS

C818 SCD1U 10V2KX-5GP

1 2

DIS

C817 SCD1U 10V2KX-5GP

1 2

DIS

x01 change tolerant 20091117

PEG_RXN [0..15] 80

PEG_RXP [0..15] 80

PEG_TXN [0..15]

PEG_TXN 15 PEG_TXN 14 PEG_TXN 13 PEG_TXN 12 PEG_TXN 11 PEG_TXN 10 PEG_TXN 9 PEG_TXN 8 PEG_TXN 7 PEG_TXN 6 PEG_TXN 5 PEG_TXN 4 PEG_TXN 3 PEG_TXN 2 PEG_TXN 1 PEG_TXN 0

PEG_TXP 15 PEG_TXP 14 PEG_TXP 13 PEG_TXP 12 PEG_TXP 11 PEG_TXP 10 PEG_TXP 9 PEG_TXP 8 PEG_TXP 7 PEG_TXP 6 PEG_TXP 5 PEG_TXP 4 PEG_TXP 3 PEG_TXP 2 PEG_TXP 1 PEG_TXP 0

Title

Size Document N umber Rev

Date: Sheet of

PEG_TXP [0..15]

CPU (PCIE/DMI/FDI)

Berry

PEG_TXN [0..15] 80

PEG_TXP [0..15] 80

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

8 92Monday, March 29 , 2010

A00

5

http://adf.ly/LOM1

+1.05V_VTT

D D

X01 20091121 VTTPWRGOOD signal must be clean and close to CPU

For EMI

C C

B B

SCD1U10V2KX- 5GP

x01 change tolerant 20091117

Processor Pullups

DY

SCD1U10V2KX-5GP

R924

R924 1K1R2F-GP

1K1R2F-GP

R926

DY

H_PWRG D

H_PWRG D_XDP

PM_DRAM_PW RGD22

1 2

12

EC905

H_THERMT RIP#25,37,42,82

H_VTTPW RGD49

H_CATERR #

H_PROCHO T#

H_CPURST #

H_PECI25

H_PM_SYNC22

H_PWRG D25,42

EC904

1 2

SCD1U10V2KX-5GP

+1.5V_RUN_C PU+1.5V_SUS

12

DY

X01 20091112

SML0_DATA23

R901 49D 9R2F-GPR901 49D 9R2F-GP

1 2

R907 68R 2-GPR907 68R2- GP

1 2

R906 68R 2-GP

1 2

DY

XDP_RST#_R VCCPWR GOOD VDDPWR GOOD_R H_VTTPW RGD PLT_RST#_R XDP_DBRESE T#

EC906

DY

1 2

x01 change tolerant 20091117

12

DY

VDDPWR GOOD_R

3KR2F-GP

+1.05V_VTT

PM_PWRBT N#_R22

12

C902

DY

SCD1U10V2KX-5GP

R925

R925 1K1R2F-GP

1K1R2F-GP

R935 1KR2J -1-GP

R935 1KR2J -1-GP R937 0R2J- 2-GP

R937 0R2J- 2-GP

R938 0R2J- 2-GP

SML0_CLK23

Processor Compensation Signals

R902 20R 2F-GPR902 20R 2F-GP

R903 20R 2F-GPR903 20R 2F-GP

R904 49D 9R2F-GPR904 49D 9R2F-GP

R905 49D 9R2F-GPR905 49D 9R2F-GP

H_PROCHO T#47

X02-20091222

R910

1 2

0R0402-PAD

R912

1 2

0R0402-PAD

PLT_RST#21,37,70,76,78,80

EC902

EC901

EC903

1 2

1 2 1 2

1 2

EC901

DY

1 2

SCD1U10V2KX-5GP

DY

DY DY

DY

1 2

TP901T PAD14-GP TP901TPAD14-GP

1

H_PWRG D_XDP

1 2

R917

1K54R2F-GP

SCD1U10V2KX-5GP

XDP_PREQ# XDP_PRDY#

XDP_OBS0 XDP_OBS1

XDP_OBS2 XDP_OBS3

XDP_OBS4 XDP_OBS5

XDP_OBS6 XDP_OBS7

H_CPUPW RGD_XDP PM_PWRBT N#_XDP

PCIE_CLK_XDP_P

XDP_TCLK

SKTOCC#_R

H_CATERR #

H_CPURST #

VCCPWR GOOD

VDDPWR GOOD_R

H_COMP3

H_COMP2

H_COMP1

H_COMP0

PLT_RST#_R

12

R918

R918 750R2F-GP

750R2F-GP

XDP1

1 2

3 4 5 6 7 8

9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30

DY

31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60

PAD-60P-GP

CPU1B

AT23

COMP3

AT24

COMP2

G16

COMP1

AT26

COMP0

AH24

SKTOCC#

AK14

CATERR#

AT15

PECI

AN26

PROCHOT#

AK15

THERMTRIP#

AP26

RESET_OBS#

AL15

PM_SYNC

AN14

VCCPWRGOOD_1

AN27

VCCPWRGOOD_0

AK13

SM_DRAMPWROK

AM15

VTTPWRGOOD

AM26

TAPPWRGOOD

AL14

RSTIN#

CLARKUNF

A00-20100226

0D75V_EN50

NP1 61

62

63 64 NP2

4

SSID = CPU

MISC THERMAL

CLOCKS

CLARKSFIELD

DDR3

PWR MANAGEMENT

JTAG & BPM

U901

1

A

VCC

2

B GND3Y

NL17SZ08DFT 2G-GP

VDDPWR GOOD_R

DPLL_REF_SSCLK

DPLL_REF_SSCLK#

SM_DRAMRST#

PM_EXT_TS#0 PM_EXT_TS#1

MISC

+3.3V_RUN

5

VTT_PWR GD_C

4

2 OF 9

BCLK

BCLK#

BCLK_ITP

BCLK_ITP#

PEG_CLK

PEG_CLK#

SM_RCOMP0 SM_RCOMP1 SM_RCOMP2

PRDY# PREQ#

TRST#

TDI_M

TDO_M

DBR#

BPM#0 BPM#1 BPM#2 BPM#3 BPM#4 BPM#5 BPM#6 BPM#7

12

+1.05V_VTT

TCK TMS

TDO

x01 change tolerant 20091117

12

C901

SCD1U10V2KX- 5GP

BCLK_ITP_P BCLK_ITP_N

R939 1KR2J-1-GP

XDP_TRST# XDP_TDI XDP_TMS

XDP_RST#_R

SCD1U10V2KX- 5GP

1 2

DY

H_CPURST #XDP_RST#_R

1 2

DY

R940 0R2J -2-GP

12

TDI

R927

R927 1K54R2F-GP

1K54R2F-GP

R941

1 2

1K54R2F-GP

R930

R930 750R2F-GP

750R2F-GP

R936

R936 51R2J-2-GP

51R2J-2-GP

XDP_TDO

BCLK_CPU_C _P

A16

BCLK_CPU_C _N

B16

BCLK_ITP_P

AR30

BCLK_ITP_N

AT30

CLK_EXP_C_P

E16

CLK_EXP_C_N

D16

A18 A17

F6

AL1 AM1 AN1

AN15 AP15

AT28 AP27

AN28 AP28 AT27

AT29 AR27 AR29 AP29

AN25

AJ22 AK22 AK24 AJ24 AJ25 AH22 AK23 AH23

DY

PLT_RST# 21,37,70,76 ,78,80

X02-20091222

RN901

1 2 3

0R4P2R-PAD

RN902

1 2 3

0R4P2R-PAD

SM_RCOMP_0 SM_RCOMP_1 SM_RCOMP_2

PM_EXTTS#0_C PM_EXTTS#1_C

XDP_PRDY# XDP_PREQ#

XDP_TCLK XDP_TMS XDP_TRST#

XDP_TDI_R XDP_TDO_R XDP_TDI_M XDP_TDO_M

H_DBR#_R

XDP_OBS0 XDP_OBS1 XDP_OBS2 XDP_OBS3 XDP_OBS4 XDP_OBS5 XDP_OBS6 XDP_OBS7

VDDPWR GOOD_KBC 37

XDP_DBRESE T# 22,23

RN

4

RN

4

X03-20100118

X02-20091222

R911

1 2

0R0402-PAD

3

BCLK_CPU_P 25 BCLK_CPU_N 25

CLK_EXP_P 23 CLK_EXP_N 23

SM_DRAMRST #

PM_EXTTS#0_C 53

RN903

4

RN

SRN10KJ-5-G P

1

4

2 3

RN904

0R4P2R-PAD

XDP_DBRESE T#

SM_DRAMRST #

X02-20091224

+1.05V_VTT 1 23

+1.5V_RUN_C PU

DY

XDP_TDI_R

XDP_TDO_M

XDP_TDI_M

XDP_TDO_R

Scan Chain (Default) CPU Only

GMCH Only

S3_RST_GATE# 25

X01 20091117

Q901

. .

G

...

D

S

2N7002E-1-GP

DY

1 2

R909 0R2J- 2-GP

x01 change tolerant 20091117

PM_EXTTS#0 18 PM_EXTTS#1 19

12

R915

R915 1KR2J-1-GP

1KR2J-1-GP

DDR3 Compensation Signals

SM_RCOMP_0

SM_RCOMP_1

SM_RCOMP_2

XDP_TMS

XDP_TDI_R

XDP_PREQ#

XDP_TCLK

X01 20091111

12

R921

R921 100KR2J-1-GP

100KR2J-1-GP

1 2

DY

R928 0R2J-2-GP

1 2

DY

R929 0R2J-2-GP

12

R931

R931 0R0402-PAD

0R0402-PAD

1 2

DY

R933 0R2J-2-GP

R934

1 2

0R0402-PAD

X02-20091222

Stuff --> R928, R931, R934 No Stuff --> R929, R933 Stuff --> R928, R929 No Stuff --> R931, R934, R933 Stuff --> R933, R934 No Stuff --> R928, R929, R931

+1.5V_SUS

12

R908

R908 1KR2J-1-GP

1KR2J-1-GP

DDR3_DR AMRST# 18,19

12

C903

C903 SCD1U10V2KX- 5GP

SCD1U10V2KX- 5GP

R913 100R2F -L1-GP-UR913 100R2F -L1-GP-U

1 2

R914 24D9R 2F-L-GPR914 24D9R 2F-L-GP

1 2

R916 130R2F -1-GPR916 130R2F-1-GP

1 2

DY

R919 51R2J -2-GP

1 2

DY

R920 51R2J -2-GP

1 2

DY

R922 51R2J -2-GP

1 2

DY

R923 51R2J -2-GP

XDP_TDI

XDP_TDO

JTAG MAPPING

XDP_TRST#

+1.05V_VTT

12

51R2J-2-GP

2

R932

1

A00-20100208

A A

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., H sichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., H sichih, Taipei Hsie n 221, Taiwan, R.O.C.

Taipei Hsie n 221, Taiwan, R.O.C.

Berry

Taipei Hsie n 221, Taiwan, R.O.C.

1

A00

9 92Monday, March 29, 2010

A00

5

Title

CPU (THERMAL/CLOCK/PM )

ize Document Num ber Rev

Size Document Num ber Rev

S

Date: Sheet of

4

www.vinafix.vn

3

2

Date: Sheet of

5

http://adf.ly/LOM1

SSID = CPU

CPU1C

4

3 OF 9

3

CPU1D

2

4 OF 9

1

W8

AA6

SA_CK0

AA7

M_A_DQ[6 3..0]18

D D

C C

B B

M_A_DQ[6 3..0]

M_A_BS018 M_A_BS118 M_A_BS218

M_A_CAS #18 M_A_RAS #18 M_A_W E#18

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ1 0 M_A_DQ1 1 M_A_DQ1 2 M_A_DQ1 3 M_A_DQ1 4 M_A_DQ1 5 M_A_DQ1 6 M_A_DQ1 7 M_A_DQ1 8 M_A_DQ1 9 M_A_DQ2 0 M_A_DQ2 1 M_A_DQ2 2 M_A_DQ2 3 M_A_DQ2 4 M_A_DQ2 5 M_A_DQ2 6 M_A_DQ2 7 M_A_DQ2 8 M_A_DQ2 9 M_A_DQ3 0 M_A_DQ3 1 M_A_DQ3 2 M_A_DQ3 3 M_A_DQ3 4 M_A_DQ3 5 M_A_DQ3 6 M_A_DQ3 7 M_A_DQ3 8 M_A_DQ3 9 M_A_DQ4 0 M_A_DQ4 1 M_A_DQ4 2 M_A_DQ4 3 M_A_DQ4 4 M_A_DQ4 5 M_A_DQ4 6 M_A_DQ4 7 M_A_DQ4 8 M_A_DQ4 9 M_A_DQ5 0 M_A_DQ5 1 M_A_DQ5 2 M_A_DQ5 3 M_A_DQ5 4 M_A_DQ5 5 M_A_DQ5 6 M_A_DQ5 7 M_A_DQ5 8 M_A_DQ5 9 M_A_DQ6 0 M_A_DQ6 1 M_A_DQ6 2 M_A_DQ6 3

C10

D10

H10

G10

AH5 AF5 AK6 AK7 AF6 AG5

AJ10

AL10 AK12

AK8

AK11

AN8

AM10

AR11 AL11

AM9

AN9 AT11 AP12

AM12

AN12

AM13

AT14 AT12 AL13 AR14 AP14

AC3

AB2

AE1

AB3

AE9

A10

B10

E10

F10

J10

AJ7 AJ6

AJ9

AL7

AL8

SA_DQ0 SA_DQ1

C7

SA_DQ2

A7

SA_DQ3 SA_DQ4 SA_DQ5 SA_DQ6

A8

SA_DQ7

D8

SA_DQ8 SA_DQ9

E6

SA_DQ10

F7

SA_DQ11

E9

SA_DQ12

B7

SA_DQ13

E7

SA_DQ14

C6

SA_DQ15 SA_DQ16

G8

SA_DQ17

K7

SA_DQ18

J8

SA_DQ19

G7

SA_DQ20 SA_DQ21

J7

SA_DQ22 SA_DQ23

L7

SA_DQ24

M6

SA_DQ25

M8

SA_DQ26

L9

SA_DQ27

L6

SA_DQ28

K8

SA_DQ29

N8

SA_DQ30

P9

SA_DQ31 SA_DQ32 SA_DQ33 SA_DQ34 SA_DQ35 SA_DQ36 SA_DQ37 SA_DQ38 SA_DQ39 SA_DQ40 SA_DQ41 SA_DQ42 SA_DQ43 SA_DQ44 SA_DQ45 SA_DQ46 SA_DQ47 SA_DQ48 SA_DQ49 SA_DQ50 SA_DQ51 SA_DQ52 SA_DQ53 SA_DQ54 SA_DQ55 SA_DQ56 SA_DQ57 SA_DQ58 SA_DQ59 SA_DQ60 SA_DQ61 SA_DQ62 SA_DQ63

SA_BS0 SA_BS1

U7

SA_BS2

SA_CAS# SA_RAS# SA_WE#

SA_CK#0

P7

SA_CKE0

Y6

SA_CK1

Y5

SA_CK#1

P6

SA_CKE1

AE2

SA_CS#0

AE8

SA_CS#1

CLARKSFIELD

DDR SYSTEM MEMORY A

SA_ODT0 SA_ODT1

SA_DM0 SA_DM1 SA_DM2 SA_DM3 SA_DM4 SA_DM5 SA_DM6 SA_DM7

SA_DQS#0 SA_DQS#1 SA_DQS#2 SA_DQS#3 SA_DQS#4 SA_DQS#5 SA_DQS#6 SA_DQS#7

SA_DQS0 SA_DQS1 SA_DQS2 SA_DQS3 SA_DQS4 SA_DQS5 SA_DQS6 SA_DQS7

SA_MA0 SA_MA1 SA_MA2 SA_MA3 SA_MA4 SA_MA5 SA_MA6 SA_MA7 SA_MA8

SA_MA9 SA_MA10 SA_MA11 SA_MA12 SA_MA13 SA_MA14 SA_MA15

AD8 AF9

B9 D7 H7 M7 AG6 AM7 AN10 AN13

C9 F8 J9 N9 AH7 AK9 AP11 AT13

C8 F9 H9 M9 AH8 AK10 AN11 AR13

Y3 W1 AA8 AA3 V1 AA9 V8 T1 Y9 U6 AD4 T2 U3 AG8 T3 V9

M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7

M_A_DQS #0 M_A_DQS #1 M_A_DQS #2 M_A_DQS #3 M_A_DQS #4 M_A_DQS #5 M_A_DQS #6 M_A_DQS #7

M_A_DQS 0 M_A_DQS 1 M_A_DQS 2 M_A_DQS 3 M_A_DQS 4 M_A_DQS 5 M_A_DQS 6 M_A_DQS 7

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

M_CLK_D DR0 18 M_CLK_D DR#0 18 M_CKE0 18

M_CLK_D DR1 18 M_CLK_D DR#1 18 M_CKE1 18

M_CS#0 18 M_CS#1 18

M_ODT0 18 M_ODT1 18

M_B_DQ[6 3..0]19

M_A_DM[7 ..0] 18

M_A_DQS #[7..0] 1 8

M_A_DQS [7..0] 18

M_A_A[15 ..0] 18

M_B_DQ[6 3..0]

M_B_BS019 M_B_BS119 M_B_BS219

M_B_CAS #19 M_B_RAS #19 M_B_W E#19

M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ1 0 M_B_DQ1 1 M_B_DQ1 2 M_B_DQ1 3 M_B_DQ1 4 M_B_DQ1 5 M_B_DQ1 6 M_B_DQ1 7 M_B_DQ1 8 M_B_DQ1 9 M_B_DQ2 0 M_B_DQ2 1 M_B_DQ2 2 M_B_DQ2 3 M_B_DQ2 4 M_B_DQ2 5 M_B_DQ2 6 M_B_DQ2 7 M_B_DQ2 8 M_B_DQ2 9 M_B_DQ3 0 M_B_DQ3 1 M_B_DQ3 2 M_B_DQ3 3 M_B_DQ3 4 M_B_DQ3 5 M_B_DQ3 6 M_B_DQ3 7 M_B_DQ3 8 M_B_DQ3 9 M_B_DQ4 0 M_B_DQ4 1 M_B_DQ4 2 M_B_DQ4 3 M_B_DQ4 4 M_B_DQ4 5 M_B_DQ4 6 M_B_DQ4 7 M_B_DQ4 8 M_B_DQ4 9 M_B_DQ5 0 M_B_DQ5 1 M_B_DQ5 2 M_B_DQ5 3 M_B_DQ5 4 M_B_DQ5 5 M_B_DQ5 6 M_B_DQ5 7 M_B_DQ5 8 M_B_DQ5 9 M_B_DQ6 0 M_B_DQ6 1 M_B_DQ6 2 M_B_DQ6 3

AF3 AG1

AK1 AG4 AG3

AH4 AK3

AK4 AM6 AN2

AK5

AK2 AM4 AM3

AP3 AN5

AT4 AN6 AN4 AN3

AT5

AT6 AN7

AP6

AP8

AT9

AT7

AP9

AR10

AT10

AB1

AC5

AC6

B5

SB_DQ0

A5

SB_DQ1

C3

SB_DQ2

B3

SB_DQ3

E4

SB_DQ4

A6

SB_DQ5

A4

SB_DQ6

C4

SB_DQ7

D1

SB_DQ8

D2

SB_DQ9

F2

SB_DQ10

F1

SB_DQ11

C2

SB_DQ12

F5

SB_DQ13

F3

SB_DQ14

G4

SB_DQ15

H6

SB_DQ16

G2

SB_DQ17

J6

SB_DQ18

J3

SB_DQ19

G1

SB_DQ20

G5

SB_DQ21

J2

SB_DQ22

J1

SB_DQ23

J5

SB_DQ24

K2

SB_DQ25

L3

SB_DQ26

M1

SB_DQ27

K5

SB_DQ28

K4

SB_DQ29

M4

SB_DQ30

N5

SB_DQ31 SB_DQ32 SB_DQ33

AJ3

SB_DQ34 SB_DQ35 SB_DQ36 SB_DQ37

AJ4

SB_DQ38 SB_DQ39 SB_DQ40 SB_DQ41 SB_DQ42 SB_DQ43 SB_DQ44 SB_DQ45 SB_DQ46 SB_DQ47 SB_DQ48 SB_DQ49 SB_DQ50 SB_DQ51 SB_DQ52 SB_DQ53 SB_DQ54 SB_DQ55 SB_DQ56 SB_DQ57 SB_DQ58 SB_DQ59 SB_DQ60 SB_DQ61 SB_DQ62 SB_DQ63

SB_BS0

W5

SB_BS1

R7

SB_BS2

SB_CAS#

Y7

SB_RAS# SB_WE#

CLARKSFIELD

DDR SYSTEM MEMORY - B

SB_CK0 SB_CK#0 SB_CKE0

SB_CK1 SB_CK#1 SB_CKE1

SB_CS#0 SB_CS#1

SB_ODT0 SB_ODT1

SB_DM0

SB_DM1

SB_DM2

SB_DM3

SB_DM4

SB_DM5

SB_DM6

SB_DM7

SB_DQS#0 SB_DQS#1 SB_DQS#2 SB_DQS#3 SB_DQS#4 SB_DQS#5 SB_DQS#6 SB_DQS#7

SB_DQS0 SB_DQS1 SB_DQS2 SB_DQS3 SB_DQS4 SB_DQS5 SB_DQS6 SB_DQS7

SB_MA0

SB_MA1

SB_MA2

SB_MA3

SB_MA4

SB_MA5

SB_MA6

SB_MA7

SB_MA8

SB_MA9 SB_MA10 SB_MA11 SB_MA12 SB_MA13 SB_MA14 SB_MA15

W9 M3

V7 V6 M2

AB8 AD6

AC7 AD1

D4 E1 H3 K1 AH1 AL2 AR4 AT8

D5 F4 J4 L4 AH2 AL4 AR5 AR8

C5 E3 H4 M5 AG2 AL5 AP5 AR7

U5 V2 T5 V3 R1 T8 R2 R6 R4 R5 AB5 P3 R3 AF7 P5 N1

M_B_DM0 M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7

M_B_DQS #0 M_B_DQS #1 M_B_DQS #2 M_B_DQS #3 M_B_DQS #4 M_B_DQS #5 M_B_DQS #6 M_B_DQS #7

M_B_DQS 0 M_B_DQS 1 M_B_DQS 2 M_B_DQS 3 M_B_DQS 4 M_B_DQS 5 M_B_DQS 6 M_B_DQS 7

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15

M_CLK_D DR2 19 M_CLK_D DR#2 19 M_CKE2 19

M_CLK_D DR3 19 M_CLK_D DR#3 19 M_CKE3 19

M_CS#2 19 M_CS#3 19

M_ODT2 19 M_ODT3 19

M_B_DM[7 ..0] 19

M_B_DQS #[7..0] 1 9

M_B_DQS [7..0] 19

M_B_A[15 ..0] 19

CLARKUN F

A A

5

4

www.vinafix.vn

3

CLARKUN F

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document N umber Rev

Date: Sheet of

2

Date: Sheet of

Berry

Taipei Hsien 221, Taiwan, R.O.C.

CPU (DDR)

1

A00

10 92Mon day, March 29, 2010

A00

5

http://adf.ly/LOM1

4

3

2

1

SSID = CPU

5 OF 9

CPU1E

D D

CFG0

CFG3

C C

CFG4

CFG7

B B

DIS

DY

12

R1101

R1101 3KR2F-GP

3KR2F-GP

R1104

R1104 3KR2J-2-GP

3KR2J-2-GP

R1105

R1105 3KR2F-GP

3KR2F-GP

R1106

R1106 3KR2F-GP

3KR2F-GP

PCI-Express Configuration Select

1:Single PEG

CFG0

0:Bifurcation enabled

CFG3 - PCI-Express Static Lane Reversal

1 :Normal Operation

CFG3

0 :Lane Numbers Reversed 15 -> 0, 14 -> 1, ...

CFG4 - Display Port Presence

1:Disabled; No Physical Display Port

CFG4

attached to Embedded Display Port 0:Enabled; An external Display Port device is connected to the Embedded Display Port

CFG7(Reserved) - Temporarily used for early Clarksfield sampl es.

CFG7 Clarks field (only for early samples pre-ES1) -

Connect to GND with 3.01K Ohm/5% resistor.

Note: Only temporary for early CFD sample (rPGA/BGA) [For details please refer to the WW33 MoW and sightin g report]. For a common M/B design (for AUB and CFD), the pull-down resistor shouble be used. Does not impact AUB functionality.

TP1101TPAD14-GP TP1101TPAD14-GP

1

TP1102TPAD14-GP TP1102TPAD14-GP

1

TP1103TPAD14-GP TP1103TPAD14-GP

1

TP1104TPAD14-GP TP1104TPAD14-GP

1

TP1105TPAD14-GP TP1105TPAD14-GP

1

TP1106TPAD14-GP TP1106TPAD14-GP

1

TP1107TPAD14-GP TP1107TPAD14-GP

1

TP1108TPAD14-GP TP1108TPAD14-GP

1

TP1109TPAD14-GP TP1109TPAD14-GP

1

TP1110TPAD14-GP TP1110TPAD14-GP

1

TP1111TPAD14-GP TP1111TPAD14-GP

1

TP1112TPAD14-GP TP1112TPAD14-GP

1

TP1113TPAD14-GP TP1113TPAD14-GP

1

TP1114TPAD14-GP TP1114TPAD14-GP

1

TP1115TPAD14-GP TP1115TPAD14-GP

1

CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15 CFG16 CFG17

AP25

AL25 AL24 AL22 AJ33

AM30 AM28 AP31

AL32

AL30 AM31 AN29 AM32 AK32 AK31 AK28

AJ28 AN30 AN32

AJ32

AJ29

AJ30 AK30

AG9 M27

L28 J17

H17 G25 G17

E31

E30

H16

B19

A19

A20

B20

U9 T9

AC9 AB9

J29 J28

RSVD#AP25 RSVD#AL25 RSVD#AL24 RSVD#AL22 RSVD#AJ33 RSVD#AG9 RSVD#M27 RSVD#L28 SA_DIMM_VREF SB_DIMM_VREF RSVD#G25 RSVD#G17 RSVD#E31 RSVD#E30

CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15 CFG16 CFG17 RSVD_TP_86

RSVD#B19 RSVD#A19

RSVD#A20 RSVD#B20

RSVD#U9 RSVD#T9

RSVD#AC9 RSVD#AB9

RSVD#J29 RSVD#J28

CLARKUNF

CLARKSFIELD

RESERVED

5 OF 9

RSVD#AJ13 RSVD#AJ12

RSVD#AH25 RSVD#AK26

RSVD#AL26

RSVD_NCTF_37

RSVD#AJ26 RSVD#AJ27

RSVD#AL28 RSVD#AL29 RSVD#AP30 RSVD#AP32 RSVD#AL27 RSVD#AT31 RSVD#AT32 RSVD#AP33 RSVD#AR33

RSVD#AR32

RSVD_TP#E15 RSVD_TP#F15

RSVD#D15

RSVD#C15 RSVD#AJ15 RSVD#AH15

SA_CK2 SA_CK#2 SA_CKE2 SA_CS#2

SA_ODT2

SA_CK3 SA_CK#3 SA_CKE3 SA_CS#3

SA_ODT3

SB_CK2 SB_CK#2

SB_CKE2

SB_CS#2

SB_ODT2

SB_CK3 SB_CK#3

SB_CKE3

SB_CS#3

SB_ODT3

AJ13 AJ12

AH25 AK26

AL26 AR2

AJ26 AJ27

AL28 AL29 AP30 AP32 AL27 AT31 AT32 AP33 AR33

AR32

E15 F15 A2

KEY

D15 C15 AJ15 AH15

AA5 AA4 R8 AD3 AD2 AA2 AA1 R9 AG7 AE3

V4 V5 N2 AD5 AD7 W3 W2 N3 AE5 AD9

AP34

VSS

VSS (AP34) can be left NC is CRB implementation; EDS/DG recommendation to GND.

R1107

RSVD_VSS

R1107

1 2

0R0402-PAD

X02-20091224

A A

5

4

3

2

www.vinafix.vn

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet of

CPU (RESERVED)

Berry

Taipei Hsien 221, Taiwan, R.O.C.

11 92Wednesday, February 10, 2010

1

A00

SSID = CPU

http://adf.ly/LOM1

5

4

CPU1F

3

6 OF 9

2

1

+VCC_CORE

PROCESSOR CORE POWER

+VCC_CORE

D D

x01 change tolerant 20091117

C1206

C1207

C1201

C1205

12

SC10U6D3V5KX-1GP

C1207

12

SC10U6D3V5KX-1GP

DY

C1215

C1208

12

SC10U6D3V5KX-1GP

DY

48A

x01 change tolerant 20091117

C1220

C1219

12

SC22U6D3V5MX-2GP

SC10U6D3V5KX-1GP

DY

C1226

12

C1225

SC10U6D3V5MX-3GP

SC10U6D3V5KX-1GP

DY

C C

C1222

C1223

C1224

C1221

12

DY

12

C1227

SC10U6D3V5KX-1GP

C1228

12

SC10U6D3V5KX-1GP

SC10U6D3V5MX-3GP

DY

C1224

12

SC10U6D3V5KX-1GP

DY

x01 change tolerant 20091117

C1229

12

SC10U6D3V5MX-3GP

C1231

C1230

12

SC10U6D3V5KX-1GP

DY

C1232

12

SC10U6D3V5KX-1GP

SC10U6D3V5MX-3GP

DY

SC10U6D3V5MX-3GP

DY

x01 change tolerant 20091117

C1235

C1236

C1237

12

SC10U6D3V5KX-1GP

DY

12

C1243

DY

SC22U6D3V5MX-2GP

B B

C1237

12

SC10U6D3V5KX-1GP

DY

C1238

12

C1239

C1240

SC10U6D3V5KX-1GP

DY

SC10U6D3V5KX-1GP

C1240

12

SC10U6D3V5MX-3GP

SC10U6D3V5KX-1GP

C1241

12

C1242

12

SC10U6D3V5KX-1GP

SC22U6D3V5MX-2GP

AG35 AG34 AG33 AG32 AG31 AG30 AG29 AG28 AG27 AG26 AF35 AF34 AF33 AF32 AF31 AF30 AF29 AF28 AF27 AF26 AD35 AD34 AD33 AD32 AD31 AD30 AD29 AD28 AD27 AD26 AC35 AC34 AC33 AC32 AC31 AC30 AC29 AC28 AC27 AC26 AA35 AA34 AA33 AA32 AA31 AA30 AA29 AA28 AA27 AA26

VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC

Y35

VCC

Y34

VCC

Y33

VCC

Y32

VCC

Y31

VCC

Y30

VCC

Y29

VCC

Y28

VCC

Y27

VCC

Y26

VCC

V35

VCC

V34

VCC

V33

VCC

V32

VCC

V31

VCC

V30

VCC

V29

VCC

V28

VCC

V27

VCC

V26

VCC

U35

VCC

U34

VCC

U33

VCC

U32

VCC

U31

VCC

U30

VCC

U29

VCC

U28

VCC

U27

VCC

U26

VCC

R35

VCC

R34

VCC

R33

VCC

R32

VCC

R31

VCC

R30

VCC

R29

VCC

R28

VCC

R27

VCC

R26

VCC

P35

VCC

P34

VCC

P33

VCC

P32

VCC

P31

VCC

P30

VCC

P29

VCC

P28

VCC

P27

VCC

P26

VCC

CLARKSFIELD

1.1V RAIL POWER

CPU CORE SUPPLY

PROC_DPRSLPVR

CPU VIDS

POWER

VTT_SELECT

VCC_SENSE

VSS_SENSE_VTT

SENSE LINES

VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0

VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0

PSI#

ISENSE

VSS_SENSE

VTT_SENSE

VID VID VID VID VID VID VID

AH14 AH12 AH11 AH10 J14 J13 H14 H12 G14 G13 G12 G11 F14 F13 F12 F11 E14 E12 D14 D13 D12 D11 C14 C13 C12 C11 B14 B12 A14 A13 A12 A11

AF10 AE10 AC10 AB10 Y10 W10 U10 T10 J12 J11 J16 J15

AN33

H_VID0

AK35

H_VID1

AK33

H_VID2

AK34

H_VID3

AL35

H_VID4

AL33

H_VID5

AM33

H_VID6

AM35 AM34

G15

AN35

AJ34 AJ35

B15

TP_VSS_SENSE_VTT

A15

x01 change tolerant 20091117

H_VTTVID1

H_VTTVID1 = Low, 1.1V H_VTTVID1 = High, 1.05V

x01 change tolerant 20091117

12

C1209

12

C1202

SC10U10V5ZY-1GP

DY

12

C1210

SC10U6D3V5KX-1GP

SC10U10V5ZY-1GP

DY

x01 change tolerant 20091117

12

C1233

SC10U6D3V5KX-1GP

DY

PSI# 47

H_VID[6..0] 47

PM_DPRSLPVR 47

TP1201 TPAD14-GPTP1201 TPAD14-GP

1

IMVP_IMON 47

VTT_SENSE 49

1

TP1202

TPAD14-GP

C1234

C1211

SC10U6D3V5MX-3GP

SC10U6D3V5KX-1GP

C1216

12

C1212

SC10U6D3V5KX-1GP

+VCC_CORE

12

C1203

SC10U6D3V5KX-1GP

C1217

12

SC10U6D3V5KX-1GP

DY

12

R1201

R1201 100R2F-L1-GP-U

100R2F-L1-GP-U

12

R1202

R1202 100R2F-L1-GP-U

100R2F-L1-GP-U

12

SC10U6D3V5KX-1GP

C1218

12

SC10U6D3V5MX-3GP

+1.05V_VTT

C1204

SC10U10V5ZY-1GP

DY

+1.05V_VTT

12

+1.05V_VTT

12

C1214

C1213

SC10U10V5ZY-1GP

DY

The decoupling capacitors, filter recommendations and sense resistors on the CPU/PCH Rails are specific to the CRB Implementation. Customers need to follow the recommendations in the Calpella Platform Design Guide.

Please note that the VTT Rail Values are Auburndale VTT=1.05V; Clarksfield VTT=1.1V

VCC_SENSE 47 VSS_SENSE 47

A A

CLARKUNF

5

4

3

2

www.vinafix.vn

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet of

CPU (VCC_CORE)

Berry

Taipei Hsien 221, Taiwan, R.O.C.

12 92Monday, March 29, 2010

1

A00

5

http://adf.ly/LOM1

4

3

2

1

SSID = CPU

+CPU_GF X_CORE

7 OF 9

CPU1G

AT21 AT19 AT18

AT16 AR21 AR19 AR18 AR16 AP21 AP19 AP18 AP16 AN21 AN19 AN18 AN16 AM21 AM19 AM18 AM16

AL21

AL19

AL18

AL16 AK21 AK19 AK18 AK16

AJ21

AJ19

AJ18

AJ16 AH21 AH19 AH18 AH16

J24 J23 H25

K26 J27 J26 J25

H27 G28 G27 G26

F26 E26 E25

CPU1G

VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG

VTT1 VTT1 VTT1

VTT1 VTT1 VTT1 VTT1 VTT1 VTT1 VTT1 VTT1 VTT1 VTT1 VTT1

CLARKUN F

SENSE

GRAPHICS

CLARKSFIELD

FDI PEG & DMI

POWER

LINES

GRAPHICS VIDs

22A

D D

C1301

C1302

12

SC10U6D3V5MX-3GP

DY

C1303

C1304

C1305

12

SC10U6D3V5MX-3GP

DY

UMA

12

SC10U6D3V5MX-3GP

C1306

UMA

SC10U6D3V5MX-3GP

C1307

C1308

12

UMA

SC10U6D3V5MX-3GP

Please note that the VTT Rail

C C

+1.05V_V TT

B B

Values are: Auburndale VTT=1.05V Clarksfield VTT=1.1V

12

C1316

SC10U6D 3V5KX-1GP

C1316

x01 change tolerant 20091117

18A

C1321

12

C1320

SC10U6D 3V5KX-1GP

C1320

DY

SC10U6D3V5KX-1GP

12

C1322

12

R1302

DIS

0R3J-0-U-G P

C1317

12

SC10U6D3V5KX-1GP

C1323

12

SC10U6D3V5KX-1GP

7 OF 9

GFX_VID GFX_VID GFX_VID GFX_VID GFX_VID GFX_VID GFX_VID

GFX_IMON

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VTT0 VTT0 VTT0 VTT0

VTT1 VTT1 VTT1 VTT1 VTT1 VTT1

VCCPLL VCCPLL VCCPLL

AR22 AT22

AM22 AP22 AN22 AP23 AM23 AP24 AN24

R1305 4K7R2J-2 -GP

AR25 AT25

GFX_IMON_ C

AM24

AJ1 AF1 AE7 AE4 AC1 AB7 AB4 Y1 W7 W4 U1 T7 T4 P1 N7 N4 L1 H1

P10 N10 L10 K10

SC10U6D 3V5KX-1GP

J22 J20 J18 H21

x01 change tolerant 20091117

H20 H19

SC10U6D 3V5KX-1GP

L26 L27 M26

SC1U6D3 V2KX-GP

VAXG_SENSE

VSSAXG_SENSE

GFX_VR_EN

GFX_DPRSLPVR

DDR3 - 1.5V RAILS

1.1V1.8V

VCC_AXG _SENSE 53 VSS_AXG _SENSE 53

12

UMA

1 2

DY

R1304 0R2J-2-GP

1 2

DIS

R1303 1KR2J-1-GP

12

C1309

C1326

SC1U6D3V2KX-GP

C1318

C1324

C1310

1 2

SC1U6D3V2KX-GP

12

C1327

12

C1311

DY

SC1U6D3V2KX-GP

12

C1313

C1312

SC1U6D3V2KX-GP

12

C1319

C1319 SC10U6D 3V5KX-1GP

SC10U6D 3V5KX-1GP

12

C1325

SC4D7U6 D3V3KX-GP

12

C1328

1 2

GFX_VID0 5 3 GFX_VID1 5 3 GFX_VID2 5 3 GFX_VID3 5 3 GFX_VID4 5 3 GFX_VID5 5 3 GFX_VID6 5 3

GFX_VR_ EN 53 GFX_DPR SLPVR 53 GFX_IMON 53

+1.5V_RU N_CPU

3A

12

C1314

SC1U6D3V2KX-GP

SC22U6D3V5MX-2GP

x01 change tolerant 20091117

C1315

12

SC22U6D3V5MX-2GP

DY

TC1301

SE330U2 D5VDM-2GP

C1331

SCD1U10V2KX-5GP

S3 Reduction

12

C1332

DY

x01 change tolerant 20091117

+1.05V_V TT

2.6A

+1.05V_V TT

1.35A

12

C1329

SC4D7U6D3V3KX-GP

SC2D2U6D3V3KX-GP

x01 change tolerant 20091117

+1.8V_RU N

12

C1330

SC10U6D 3V5MX-3GP

+1.5V_SU S

12

DY

C1334

12

SCD1U10V2KX-5GP

DY

12

C1333

SCD1U10V2KX-5GP

DY

A A

5

4

www.vinafix.vn

3

2

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (VCC_GFXCORE)

ize Document Nu mber Rev

Size Document N umber Rev

S

Date: Sheet of

CPU (VCC_GFXCORE)

Berry

Taipei Hsien 221, Taiwan, R.O.C.

13 92Mon day, March 29, 2010

1

A00

5

http://adf.ly/LOM1

4

3

2

1

SSID = CPU

8 OF 9

CPU1H

AT20

VSS

AT17

VSS

AR31

VSS

AR28

VSS

AR26

VSS

AR24

VSS

D D

C C

B B

AR23 AR20 AR17 AR15 AR12

AR9 AR6

AR3 AP20 AP17 AP13 AP10

AP7

AP4

AP2 AN34 AN31 AN23 AN20 AN17

AM29 AM27 AM25 AM20 AM17 AM14 AM11

AM8

AM5

AM2

AL34 AL31 AL23 AL20 AL17 AL12

AK29 AK27 AK25 AK20 AK17

AJ31 AJ23 AJ20 AJ17 AJ14 AJ11

AH35 AH34 AH33 AH32 AH31 AH30 AH29 AH28 AH27 AH26 AH20 AH17 AH13

AH9

AH6

AH3 AG10

AF8

AF4

AF2 AE35

AL9 AL6 AL3

AJ8 AJ5 AJ2

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

CLARKSFIELD

VSS

8 OF 9

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

AE34 AE33 AE32 AE31 AE30 AE29 AE28 AE27 AE26 AE6 AD10 AC8 AC4 AC2 AB35 AB34 AB33 AB32 AB31 AB30 AB29 AB28 AB27 AB26 AB6 AA10 Y8 Y4 Y2 W35 W34 W33 W32 W31 W30 W29 W28 W27 W26 W6 V10 U8 U4 U2 T35 T34 T33 T32 T31 T30 T29 T28 T27 T26 T6 R10 P8 P4 P2 N35 N34 N33 N32 N31 N30 N29 N28 N27 N26 N6 M10 L35 L32 L29 L8 L5 L2 K34 K33 K30

G34 G31 G20

K27

H35 H32 H28 H26 H24 H22 H18 H15 H13 H11

F30 F27 F25 F22 F19 F16 E35 E32 E29 E24 E21 E18 E13 E11

D33 D30 D26

C34 C32 C29 C28 C24 C22 C20 C19 C16 B31 B25 B21 B18 B17 B13 B11

A29 A27 A23

CPU1I

VSS

K9

VSS

K6

VSS

K3

VSS

J32

VSS

J30

VSS

J21

VSS

J19

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

H8

VSS

H5

VSS

H2

VSS VSS VSS VSS

G9

VSS

G6

VSS

G3

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

E8

VSS

E5

VSS

E2

VSS VSS VSS VSS

D9

VSS

D6

VSS

D3

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

B8

VSS

B6

VSS

B4

VSS VSS VSS VSS

A9

VSS

CLARKSFIELD

VSS

NCTF

NCYF TEST PIN:

A35,AT1,AT35,B1,A3,A33,A34,

AP1,AP35,AR1,AR35,AT2,AT3,

AT33,AT34,C1,C35,B35

NCYF TEST PIN:

A35,AT1,AT35,B1,A3,A33,A34,

AP1,AP35,AR1,AR35,AT2,AT3,

AT33,AT34,C1,C35,B35

9 OF 9

VSS_NCTF VSS_NCTF VSS_NCTF

VSS_NCTF#A35 VSS_NCTF#AT1

VSS_NCTF#AT35

VSS_NCTF#B1

RSVD_NCTF#A3 RSVD_NCTF#A33 RSVD_NCTF#A34

RSVD_NCTF#AP1

RSVD_NCTF#AP35

RSVD_NCTF#AR1

RSVD_NCTF#AR35

RSVD_NCTF#AT2 RSVD_NCTF#AT3

RSVD_NCTF#AT33 RSVD_NCTF#AT34

RSVD_NCTF#C1 RSVD_NCTF#C35 RSVD_NCTF#B35

AR34 B34 B2

A35 AT1 AT35 B1 A3 A33 A34 AP1 AP35 AR1 AR35 AT2 AT3 AT33 AT34 C1 C35 B35

TP_MCP_ VSS_NCTF1 TP_MCP_ VSS_NCTF2 TP_MCP_ VSS_NCTF3 TP_MCP_ VSS_NCTF4

TP1401TP1401

1

TP1402TP1402

1

TP1403TP1403

1

TP1404TP1404

1

CLARKUN F

A A

5

4

www.vinafix.vn

3

CLARKUN F

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document N umber Rev

Date: Sheet of

2

Date: Sheet of

Berry

Taipei Hsien 221, Taiwan, R.O.C.

CPU (VSS)

1

A00

14 92W ednesday, February 10, 2010

A00

5

http://adf.ly/LOM1

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

www.vinafix.vn

3

2

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document N umber Rev

A3

Date: Sheet of

Berry

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

15 92W ednesday, February 10, 2010

A00

5

http://adf.ly/LOM1

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

www.vinafix.vn

3

2

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document N umber Rev

A3

Date: Sheet of

Berry

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

16 92W ednesday, February 10, 2010

A00

5

http://adf.ly/LOM1

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

www.vinafix.vn

3

2

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document N umber Rev

A3

Date: Sheet of

Berry

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

17 92W ednesday, February 10, 2010

A00

5

http://adf.ly/LOM1

SSID = MEMORY

D D

M_A_BS210

M_A_BS010 M_A_BS110

M_A_DQ[63..0]10

C C

+V_DDR_RE F

B B

+0.75V_DDR_VT T

x01 change tolerant 20091117

x01 change tolerant 20091118

12

C1811

SCD1U10V2KX- 5GP

+0.75V_DDR_VT T

12

C1818

DY

SC10U6D3V5KX- 1GP

Place these caps close to VTT1 and VTT2.

12

C1821

C1819

DY

SC1U6D3V2KX-GP

C1821

C1820

SC1U6D3V2KX-GP

12

DY

SC1U6D3V2KX-GP

C1812

SC2D2U6D3V 3KX-GP

12

C1822

SC1U6D3V2KX-GP

12

C1813

C1813 SCD1U10V2KX- 5GP

SCD1U10V2KX- 5GP

DDR3_DR AMRST#9,19

M_ODT010 M_ODT110

+0.75V_DDR_VT T

+V_DDR_RE F

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63

M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7

M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7

4

H =4mm

DM1

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12

119

A13

80

A14

78

A15

79

A16/BA2

109

BA0

108

BA1

5

DQ0

7

DQ1

15

DQ2

17

DQ3

4

DQ4

6

DQ5

16

DQ6

18

DQ7

21

DQ8

23

DQ9

33

DQ10

35

DQ11

22

DQ12

24

DQ13

34

DQ14

36

DQ15

39

DQ16

41

DQ17

51

DQ18

53

DQ19

40

DQ20

42

DQ21

50

DQ22

52

DQ23

57

DQ24

59

DQ25

67

DQ26

69

DQ27

56

DQ28

58

DQ29

68

DQ30

70

DQ31

129

DQ32

131

DQ33

141

DQ34

143

DQ35

130

DQ36

132

DQ37

140

DQ38

142

DQ39

147

DQ40

149

DQ41

157

DQ42

159

DQ43

146

DQ44

148

DQ45

158

DQ46

160

DQ47

163

DQ48

165

DQ49

175

DQ50

177

DQ51

164

DQ52

166

DQ53

174

DQ54

176

DQ55

181

DQ56

183

DQ57

191

DQ58

193

DQ59

180

DQ60

182

DQ61

192

DQ62

194

DQ63

10

DQS0#

27

DQS1#

45

DQS2#

62

DQS3#

135

DQS4#

152

DQS5#

169

DQS6#

186

DQS7#

12

DQS0

29

DQS1

47

DQS2

64

DQS3

137

DQS4

154

DQS5

171

DQS6

188

DQS7

116

ODT0

120

ODT1

126

VREF_CA

1

VREF_DQ

30

RESET#

203

VTT1

204

VTT2

DDR3-204P- 47-GP

62.10017.P31

RAS#

CAS#

CS0# CS1#

CKE0 CKE1

CK0#

CK1#

EVENT#

VDDSPD

NC#1 NC#2

NC#/TEST

VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8

VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18

3

M_A_DM[7..0] 10

M_A_DQS#[7..0] 1 0

M_A_DQS[7..0] 10

+1.5V_SUS

M_A_A[15..0] 10

M_A_RAS# 10 M_A_WE# 1 0 M_A_CAS# 10

M_CS#0 10 M_CS#1 10

M_CKE0 10 M_CKE1 10

M_CLK_DDR0 10 M_CLK_DDR#0 10

M_CLK_DDR1 10 M_CLK_DDR#1 10

PCH_SMBDAT A 7,19,23 ,76 PCH_SMBCLK 7,19,23,76

PM_EXTTS#0 9

SCD1U10V2KX- 5GP

C1801

12

SA0_DIM0

SA1_DIM0

12

+3.3V_RUN

x01 change tolerant 20091117

12

C1802

DY

SC2D2U6D3V 3KX-GP

+1.5V_SUS

Layout Note: Place these Caps near SO-DIMMA.

2

S3 Power Reduction

PS_S3CNTRL42,50

R1803

R1803 10KR2J-3-GP

10KR2J-3-GP

Note: If SA0 DIM0 = 0, SA1_DIM0 = 0 SO-DIMMA SPD Address is 0xA0 SO-DIMMA TS Address is 0x30

12

If SA0 DIM0 = 1, SA1_DIM0 = 0

R1804

SO-DIMMA SPD Address is 0xA2

10KR2J-3-GP

SO-DIMMA TS Address is 0x32

SODIMM A DECOUPLING

x01 change tolerant 20091117

C1803

TC1801

Q1801

2N7002E-1-GP

84.2N702.D31

SE330U2D5VDM-2GP

12

DY

C1814

12

SCD1U10V2KX-5GP

+0.75V_DDR_VT T

12

R1806

R1806 22R2J-2-GP

22R2J-2-GP

DISCHARGE_0D75V

D

.

. .

.

. .

S

G

C1804

SC10U6D3V5KX-1GP

12

C1816

C1815

12

SCD1U10V2KX-5GP

C1805

SC10U10V5ZY-1GP

SCD1U10V2KX-5GP

NP1

NP2

110 113

WE#

115

114 121

73 74

101

CK0

103

102

CK1

104

M_A_DM0

11

DM0

M_A_DM1

28

DM1

M_A_DM2

46

DM2

M_A_DM3

63

DM3

M_A_DM4

136

DM4

M_A_DM5

153

DM5

M_A_DM6

170

DM6

M_A_DM7

187

DM7

200

SDA

202

SCL

198

199

SA0_DIM0

197

SA0

SA1_DIM0

201

SA1

77 122 125

75 76 81 82 87 88 93 94 99 100 105 106 111 112 117 118 123 124

2

VSS

3

VSS

8

VSS

9

VSS

13

VSS

14

VSS

19

VSS

20

VSS

25

VSS

26

VSS

31

VSS

32

VSS

37

VSS

38

VSS

43

VSS

44

VSS

48

VSS

49

VSS

54

VSS

55

VSS

60

VSS

61

VSS

65

VSS

66

VSS

71

VSS

72

VSS

127

VSS

128

VSS

133

VSS

134

VSS

138

VSS

139

VSS

144

VSS

145

VSS

150

VSS

151

VSS

155

VSS

156

VSS

161

VSS

162

VSS

167

VSS

168

VSS

172

VSS

173

VSS

178

VSS

179

VSS

184

VSS

185

VSS

189

VSS

190

VSS

195

VSS

196

VSS

205

VSS

206

VSS

2

C1810

C1808

C1810

C1809

SC10U6D3V5KX-1GP

SC10U10V5ZY-1GP

12

DY

C1806

C1807

SC10U6D3V5KX-1GP

12

DY

C1817

12

x01 change tolerant 20091117

SCD1U10V2KX-5GP

1

SC10U6D3V5KX-1GP

12

DY

SEC. 62.10017.P11

A A

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., H sichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., H sichih, Taipei Hsie n 221, Taiwan, R.O.C.

Taipei Hsie n 221, Taiwan, R.O.C.

DDR3-SODIMM1

Berry

1

A00

18 92Monday, March 29, 2010

A00

5

Title

Size Document Num ber Rev

Date: Sheet of

4

3

2

Date: Sheet of

www.vinafix.vn

5

http://adf.ly/LOM1

SSID = MEMORY

D D

C C

B B

+V_DDR_RE F

x01 change tolerant 20091118

12

C1915

SCD1U10V2KX- 5GP

Place these caps close to VTT1 and VTT2.

12

C1916

DY

SC2D2U6D3V 3KX-GP

12

DY

x01 change tolerant 20091117

12

C1917

C1917 SCD1U10V2KX- 5GP

SCD1U10V2KX- 5GP

+0.75V_DDR_VT T

12

C1919

C1920

C1918

SC1U6D3V2KX-GP

C1920

DY

SC1U6D3V2KX-GP

M_B_BS210

M_B_BS010 M_B_BS110

M_B_DQ[63..0]10

M_ODT210 M_ODT310

+V_DDR_RE F

DDR3_DR AMRST#9,18

12

C1921

SC1U6D3V2KX-GP

Note: SO-DIMMB SPD Address is 0xA4 SO-DIMMB TS Address is 0x34

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15

M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63

M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7

M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7

4

DM2

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12

119

A13

80

A14

78

A15

79

A16/BA2

109

BA0

108

BA1

5

DQ0

7

DQ1

15

DQ2

17

DQ3

4

DQ4

6

DQ5

16

DQ6

18

DQ7

21

DQ8

23

DQ9

33

DQ10

35

DQ11

22

DQ12

24

DQ13

34

DQ14

36

DQ15

39

DQ16

41

DQ17

51

DQ18

53

DQ19

40

DQ20

42

DQ21

50

DQ22

52

DQ23

57

DQ24

59

DQ25

67

DQ26

69

DQ27

56

DQ28

58

DQ29

68

DQ30

70

DQ31

129

DQ32

131

DQ33

141

DQ34

143

DQ35

130

DQ36

132

DQ37

140

DQ38

142

DQ39

147

DQ40

149

DQ41

157

DQ42

159

DQ43

146

DQ44

148

DQ45

158

DQ46

160

DQ47

163

DQ48

165

DQ49

175

DQ50

177

DQ51

164

DQ52

166

DQ53

174

DQ54

176

DQ55

181

DQ56

183

DQ57

191

DQ58

193

DQ59

180

DQ60

182

DQ61

192

DQ62

194

DQ63

10

DQS0#

27

DQS1#

45

DQS2#

62

DQS3#

135

DQS4#

152

DQS5#

169

DQS6#

186

DQS7#

12

DQS0

29

DQS1

47

DQS2

64

DQS3

137

DQS4

154

DQS5

171

DQS6

188

DQS7

116

ODT0

120

ODT1

126

VREF_CA

1

VREF_DQ

30

RESET#

203

VTT1

204

VTT2

H = 8mm

DDR3-204P- 55-GP

62.10017.Q31

SEC. 62.10017.N71

NP1

NP2

110

RAS#

113

WE#

115

CAS#

114

CS0#

121

CS1#

73

CKE0

74

CKE1

101

CK0

103

CK0#

102

CK1

104

CK1#

M_B_DM0

11

DM0

M_B_DM1

28

DM1

M_B_DM2

46

DM2

M_B_DM3

63

DM3

M_B_DM4

136

DM4

M_B_DM5

153

DM5

M_B_DM6

170

DM6

M_B_DM7

187

DM7

200

SDA

202

SCL

198

EVENT#

199

VDDSPD

NC#/TEST

VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18

SO-DIMMB is placed farther from the Processor than SO-DIMMA

NC#1 NC#2

VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9

SA0_DIM1

197

SA0

SA1_DIM1

201

SA1

77 122 125

75 76 81 82 87 88 93 94 99 100 105 106 111 112 117 118 123 124

2

VSS

3

VSS

8

VSS

9

VSS

13

VSS

14

VSS

19

VSS

20

VSS

25

VSS

26

VSS

31

VSS

32

VSS

37

VSS

38

VSS

43

VSS

44

VSS

48

VSS

49

VSS

54

VSS

55

VSS

60

VSS

61

VSS

65

VSS

66

VSS

71

VSS

72

VSS

127

VSS

128

VSS

133

VSS

134

VSS

138

VSS

139

VSS

144

VSS

145

VSS

150

VSS

151

VSS

155

VSS

156

VSS

161

VSS

162

VSS

167

VSS

168

VSS

172

VSS

173

VSS

178

VSS

179

VSS

184

VSS

185

VSS

189

VSS

190

VSS

195

VSS

196

VSS

205

VSS

206

VSS

+1.5V_SUS

M_B_RAS# 10 M_B_WE# 1 0 M_B_CAS# 10

M_CS#2 10 M_CS#3 10

M_CKE2 10 M_CKE3 10

M_CLK_DDR2 10 M_CLK_DDR#2 10

M_CLK_DDR3 10 M_CLK_DDR#3 10

PCH_SMBDAT A 7,18,23 ,76 PCH_SMBCLK 7,18,23,76

PM_EXTTS#1 9

SCD1U10V2KX- 5GP

3

M_B_DM[7..0] 10

M_B_DQS#[7..0] 1 0

M_B_DQS[7..0] 10

M_B_A[15..0] 10

12

C1902

DY

C1902

SC2D2U6D3V 3KX-GP

C1901

x01 change tolerant 20091118

+1.5V_SUS

x01 change tolerant 20091117

Layout Note: Place these Caps near SO-DIMMB.

+3.3V_RUN

SODIMM B DECOUPLING

C1903

SC10U10V5ZY-1GP

12

DY

C1912

C1911

12

SCD1U10V2KX-5GP

SA1_DIM1

SA0_DIM1

12

R1903

R1903 10KR2J-3-GP

10KR2J-3-GP

x01 change tolerant 20091117

C1905

C1904

C1913

C1905

SC10U6D3V5KX-1GP

SC10U10V5ZY-1GP

12

DY

C1914

12

SCD1U10V2KX-5GP

C1906

C1908

C1907

SC10U6D3V5KX-1GP

12

DY

SC10U10V5ZY-1GP

2

+3.3V_RUN

12

C1909

12

R1902

R1902 10KR2J-3-GP

10KR2J-3-GP

SC10U6D3V5KX-1GP

12

Note: If SA0 DIM0 = 0, SA1_DIM0 = 0 SO-DIMMA SPD Address is 0xA0 SO-DIMMA TS Address is 0x30

If SA0 DIM0 = 1, SA1_DIM0 = 0 SO-DIMMA SPD Address is 0xA2 SO-DIMMA TS Address is 0x32

C1910

SC10U6D3V5KX-1GP

12

DY

1

A A

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., H sichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., H sichih, Taipei Hsie n 221, Taiwan, R.O.C.

Taipei Hsie n 221, Taiwan, R.O.C.

DDR3-SODIMM2

Berry

1

A00

19 92Monday, March 29, 2010

A00

5

Title

Size Document Num ber Rev

Date: Sheet of

4

3

2

Date: Sheet of

www.vinafix.vn

5

http://adf.ly/LOM1

RN2001

D D

R2002

12

DY

100KR2J -1-GP

+3.3V_RU N

GPU_LVD S_CLK54,82 GPU_LVD S_DATA54,82

PCH_LCD VDD_EN

Place near PCH

RN2001

1 2 3

UMA

SRN0J-6-G P

UMA

4

12

R2001

R2001 2K37R2F -GP

2K37R2F -GP

Impedance:85 ohm

123

45

RN2002

C C

B B

UMA

678

RN2002 SRN2K2J -4-GP

SRN2K2J -4-GP

LCTRL_D ATA

LCTRL_C LK LDDC_CL K_PCH LDDC_DA TA_PCH

PCH_CRT _BLUE77

PCH_CRT _GREEN77

PCH_CRT _RED77

Close to ball <600mil

RN2005

SRN150F -1-GP

678

UMA

4 5

123

4

PCH_VGA _BLEN55

PCH_LCD VDD_EN55

PCH_LBK LT_CTL55

LVDS_VB G

TP2001TPAD14-G P T P2001TPA D14-GP

1

RN2004

1 2 3

UMA

SRN0J-6-G P

PCH_LVD SA_TXC#55 PCH_LVD SA_TXC55

PCH_LVD SA_TX0#55 PCH_LVD SA_TX1#55 PCH_LVD SA_TX2#55

PCH_LVD SA_TX055 PCH_LVD SA_TX155 PCH_LVD SA_TX255

PCH_LVD SB_TXC#55 PCH_LVD SB_TXC55

PCH_LVD SB_TX0#55 PCH_LVD SB_TX1#55 PCH_LVD SB_TX2#55

PCH_LVD SB_TX055 PCH_LVD SB_TX155 PCH_LVD SB_TX255

Need Level Shift

PCH_CRT _DDCCLK77 PCH_CRT _DDCDATA77

PCH_CRT _HSYNC77 PCH_CRT _VSYNC77

2.5V Tolerance

1KR2J-1-G P

LDDC_CL K_PCH LDDC_DA TA_PCH

LCTRL_C LK LCTRL_D ATA

LIBG

LVD_VRE FH

4

LVD_VRE FL

CRT_IREF

12

R2007

U2001D

T48

L_BKLTEN

T47

L_VDD_EN

Y48

L_BKLTCTL

AB48

L_DDC_CLK

Y45

L_DDC_DATA

AB46

L_CTRL_CLK

V48

L_CTRL_DATA

AP39

LVD_IBG

AP41

LVD_VBG

AT43

LVD_VREFH

AT42

LVD_VREFL

AV53

LVDSA_CLK#

AV51

LVDSA_CLK

BB47

LVDSA_DATA#0

BA52

LVDSA_DATA#1

AY48

LVDSA_DATA#2

AV47

LVDSA_DATA#3

BB48

LVDSA_DATA0

BA50

LVDSA_DATA1

AY49

LVDSA_DATA2

AV48

LVDSA_DATA3

AP48

LVDSB_CLK#

AP47

LVDSB_CLK

AY53

LVDSB_DATA#0

AT49

LVDSB_DATA#1

AU52

LVDSB_DATA#2

AT53

LVDSB_DATA#3

AY51

LVDSB_DATA0

AT48

LVDSB_DATA1

AU50

LVDSB_DATA2

AT51

LVDSB_DATA3

AA52

CRT_BLUE

AB53

CRT_GREEN

AD53

CRT_RED

V51

CRT_DDC_CLK

V53

CRT_DDC_DATA

Y53

CRT_HSYNC

Y51

CRT_VSYNC

AD48

DAC_IREF

AB51

CRT_IRTN

IBEXPEAK-M -GP-NF

3

4 OF 10

DDPB_HPD

DDPB_0N DDPB_0P DDPB_1N DDPB_1P DDPB_2N DDPB_2P DDPB_3N DDPB_3P

DDPC_0N DDPC_0P DDPC_1N DDPC_1P DDPC_2N DDPC_2P DDPC_3N DDPC_3P

DDPD_0N DDPD_0P DDPD_1N DDPD_1P DDPD_2N DDPD_2P DDPD_3N DDPD_3P

BJ46 BG46

BJ48 BG48

BF45 BH45

T51 T53

BG44 BJ44 AU38

BD42 BC42 BJ42 BG42 BB40 BA40 AW38 BA38

Y49 AB49

BE44 BD44 AV40

BE40 BD40 BF41 BH41 BD38 BC38 BB36 BA36

U50 U52

BC46 BD46 AT38

BJ40 BG40 BJ38 BG38 BF37 BH37 BE36 BD36

SDVO_TVCLKINN SDVO_TVCLKINP

SDVO_STALLN SDVO_STALLP

SDVO_INTN SDVO_INTP

SDVO_CTRLCLK

SDVO_CTRLDATA

DDPB_AUXN DDPB_AUXP

LVDS

DDPC_CTRLCLK

DDPC_CTRLDATA

DDPC_AUXN DDPC_AUXP

DDPC_HPD

Digital Display Interface

DDPD_CTRLCLK

DDPD_CTRLDATA

DDPD_AUXN DDPD_AUXP

DDPD_HPD

CRT

2

+3.3V_RU N

4

RN2006

RN2006 SRN2K2J -1-GP

SRN2K2J -1-GP

UMA

1

2 3

PCH_HDM I_CLK 57 PCH_HDM I_DATA 57

HDMI_DATA 2#_C HDMI_DATA 2_C HDMI_DATA 1#_C HDMI_DATA 1_C HDMI_DATA 0#_C HDMI_DATA 0_C HDMI_CLK# _C HDMI_CLK_ C

UMA

UMA UMA

UMA

C2001 SCD1U10 V2KX-5GP

1 2

C2002 SCD1U10 V2KX-5GP

1 2

C2003 SCD1U10 V2KX-5GP

1 2

C2004 SCD1U10 V2KX-5GP

1 2

C2005 SCD1U10 V2KX-5GP

1 2

C2006 SCD1U10 V2KX-5GP

1 2

C2007 SCD1U10 V2KX-5GP

1 2

C2008 SCD1U10 V2KX-5GP

1 2

HDMI_PCH_ DET 57

HDMI_PCH_ DATA2# 57,82 HDMI_PCH_ DATA2 57,82 HDMI_PCH_ DATA1# 57,82 HDMI_PCH_ DATA1 57,82 HDMI_PCH_ DATA0# 57,82 HDMI_PCH_ DATA0 57,82 HDMI_PCH_ CLK# 57,82 HDMI_PCH_ CLK 57,82

Close to VGA

Impedance:85 ohm Impedance:100 ohm

1

A A

5

4

www.vinafix.vn

3

2

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

ize Document Nu mber Rev

Size Document N umber Rev

S

Date: Sheet of

PCH (LVDS/CRT/DDI)

Berry

Taipei Hsien 221, Taiwan, R.O.C.

20 92Mon day, March 29, 2010

1

A00

5

http://adf.ly/LOM1

RN2101

PCI_TRDY# PCI_DEVSE L# INT_PIRQA#

+3.3V_RU N

D D

+3.3V_RU N

PCI_IRDY#

INT_PIRQH# INT_PIRQB# INT_PIRQF# PCI_REQ3#

+3.3V_RU N

RN2101

1 2 3 4 5 6

SRN8K2J -2-GP-U

RN2103

1 2 3 4 5 6

SRN8K2J -2-GP-U

RN2102

1 2 3 4 5

SRN8K2J -4-GP

PCI_STOP#

8

INT_PIRQE#

7

INT_PIRQC#

6

INT_PIRQG#

10 9 8 7

PCI_FRAME # PCI_REQ2# INT_PIRQD# PCI_SERR#

PCI_REQ1# PCI_PLOCK # PCI_PERR# PCI_REQ0#

+3.3V_RU N

PLT_RST #9,37,70,76 ,78,80

BOOT BIOS Strap

PCI_GNT#1 BOOT BIOS Locati onPCI_GNT#0

0 0 LPC

C C

+3.3V_AL W

B B

A16 swap overrid e Strap/Top-Blo ck Swap Override ju mper

PCI_GNT#3 Low = A16 swap

0 1 Reserved

01

11

RN2104

USB_OC# 2_3

SMC_W AKE_SCI#_R

PCI_GNT3#

RN2104

1 2 3 4 5 6

SRN8K2J -2-GP-U

R2105

1 2

DY

4K7R2J-2 -GP

override/Top-Blo ck Swap Override en abled High = Default

PCI

SPI(Default)

10

USB_OC# 12_13

9

USB_OC# 8_9USB_OC# 6_7

8

USB_OC# 10_11US B_OC#0_1

7

USB_OC# 4_5

+3.3V_AL W

PCLK_FW H70 CLK_PCI_F B23 PCLK_KB C37

4

SSID = PCH

+3.3V_RU N

5

VCC

DY

4

Y

NL17SZ0 8DFT2G-GP

1 2

R2101 0R0402-P ADR21 01 0R0402-P AD

12

C2101

DY

SC220P5 0V2KX-3GP

1 2

R2107 22R2J-2-G PR2107 22R2J-2-G P

1 2

R2108 22R2J-2-G PR2108 22R2J-2-G P

1 2

R2109 22R2J-2-G PR2109 22R2J-2-G P

1 2

DY

U2101

1

A

PCI_PLTRS T#

2

B

3

GND

EC2101

EC2101 SC4D7P5 0V2CN-1GP

SC4D7P5 0V2CN-1GP

3

5 OF 10

U2001E

H40

AD0

N34

AD1

C44

AD2

A38

AD3

C36

AD4

J34

AD5

A40

AD6

D45

AD7

E36

AD8

H48

AD9

E40

AD10

C40

AD11

M48

AD12

M45

AD13

F53

AD14

M40

AD15

M43

AD16

J36

AD17

K48

AD18

F40

AD19

C42

AD20

K46

AD21

M51

AD22

J52

AD23

K51

AD24

L34

AD25

F42

AD26

J40

AD27

G46

AD28

F44

AD29

M47

AD30

H36

AD31

J50

C/BE0#

G42

C/BE1#

H47

C/BE2#

G34

INT_PIRQA# INT_PIRQB# INT_PIRQC# INT_PIRQD#

PCI_REQ0# PCI_REQ1# PCI_REQ2# PCI_REQ3#

TP2102TPAD14-G P T P2102TPA D14-GP TP2103TPAD14-G P T P2103TPA D14-GP TP2104TPAD14-G P T P2104TPA D14-GP

TP2110TPAD14-G P T P2110TPA D14-GP

TP2115TPAD14-G P T P2115TPA D14-GP

PCI_GNT0#

1

PCI_GNT1#

1

PCI_GNT2#

1

PCI_GNT3#

INT_PIRQE# INT_PIRQF# INT_PIRQG# INT_PIRQH#

PCIRST#

1

PCI_SERR# PCI_PERR#

PCI_IRDY#

PCI_DEVSE L# PCI_FRAME #

PCI_PLOCK #

PCI_STOP# PCI_TRDY#

PCH_PME #

1

PCI_PLTRS T#

PCLK_FW H_R CLK_PCI_F B_R PCLK_KB C_R

C/BE3#

G38

PIRQA#

H51

PIRQB#

B37

PIRQC#

A44

PIRQD#

F51

REQ0#

A46

REQ1#/GPIO50

B45

REQ2#/GPIO52

M53

REQ3#/GPIO54

F48

GNT0#

K45

GNT1#/GPIO51

F36

GNT2#/GPIO53

H53

GNT3#/GPIO55

B41

PIRQE#/GPIO2

K53

PIRQF#/GPIO3

A36

PIRQG#/GPIO4

A48

PIRQH#/GPIO5

K6

PCIRST#

E44

SERR#

E50

PERR#

A42

IRDY#

H44

PAR

F46

DEVSEL#

C46

FRAME#

D49

PLOCK#

D41

STOP#

C48

TRDY#

M7

PME#

D5

PLTRST#

N52

CLKOUT_PCI0

P53

CLKOUT_PCI1

P46

CLKOUT_PCI2

P51

CLKOUT_PCI3

P48

CLKOUT_PCI4

IBEXPEAK-M -GP-NF

PCI

NV_CE#0 NV_CE#1 NV_CE#2 NV_CE#3

NV_DQS0 NV_DQS1

NV_DQ0/NV_IO0 NV_DQ1/NV_IO1 NV_DQ2/NV_IO2 NV_DQ3/NV_IO3 NV_DQ4/NV_IO4 NV_DQ5/NV_IO5 NV_DQ6/NV_IO6 NV_DQ7/NV_IO7 NV_DQ8/NV_IO8

NV_DQ9/NV_IO9 NV_DQ10/NV_IO10 NV_DQ11/NV_IO11

NVRAM

NV_DQ12/NV_IO12 NV_DQ13/NV_IO13 NV_DQ14/NV_IO14 NV_DQ15/NV_IO15

NV_RCOMP

NV_WR#0_RE# NV_WR#1_RE#

NV_WE#_CK0 NV_WE#_CK1

USBP0N

USBP1N

USBP2N

USBP3N

USBP4N

USBP5N

USBP6N

USBP7N

USBP8N

USBP9N

USB

USBP10N USBP10P USBP11N USBP11P USBP12N USBP12P USBP13N USBP13P

USBRBIAS#

USBRBIAS

OC0#/GPIO59 OC1#/GPIO40 OC2#/GPIO41 OC3#/GPIO42 OC4#/GPIO43

OC5#/GPIO9 OC6#/GPIO10 OC7#/GPIO14

5 OF 10

NV_ALE NV_CLE

NV_RB#

USBP0P

USBP1P

USBP2P

USBP3P

USBP4P

USBP5P

USBP6P

USBP7P

USBP8P

USBP9P

AY9 BD1 AP15 BD8

AV9 BG8

AP7 AP6 AT6 AT9 BB1 AV6 BB3 BA4 BE4 BB6 BD6 BB7 BC8 BJ8 BJ6 BG6

BD3 AY6

AU2

AV7

AY8 AY5

AV11 BF5

H18 J18 A18 C18 N20 P20 J20 L20 F20 G20 A20 C20 M22 N22 B21 D21 H22 J22 E22 F22 A22 C22 G24 H24 L24 M24 A24 C24

B25

D25

N16 J16 F16 L16 E14 G16 F12 T15

2

NV_ALE NV_CLE

NV_RCOM P

1

USB_RBIAS _PN

USB_OC# 0_1 USB_OC# 2_3 USB_OC# 4_5 USB_OC# 6_7 USB_OC# 8_9 USB_OC# 10_11 USB_OC# 12_13 SMC_W AKE_SCI#_R

DMI Termination Voltage

NV_CLE Set to Vss when low .

TP2105 TPAD 14-GPTP2105 TPAD14-G P

Set to Vcc when high.

Danbury Technolo gy: Disabled when Lo w. Enable when High .

Pair

USB_PN0 77 USB_PP0 77 USB_PN1 77 USB_PP1 77 USB_PN2 76 USB_PP2 76

USB_PN4 78 USB_PP4 78 USB_PN5 73 USB_PP5 73

0

1

2

3

4

5

6

7

USB_PN8 76 USB_PP8 76 USB_PN9 76 USB_PP9 76

USB_PN1 1 76 USB_PP1 1 76

USB_PN1 3 54 USB_PP1 3 54

1 2

R2106

R2106 22D6R2F -L1-GP

22D6R2F -L1-GP

8

9

10

11

12

13

USB_OC# 0_1 63

USB_OC# 8_9 63

1

+V_NVRA M_VCCQ

12

R2102

R2102 1KR2J-1-G P

1KR2J-1-G P

DY

NV_CLE

+V_NVRA M_VCCQ

12

R2103

R2103 1KR2J-1-G P

1KR2J-1-G P

DY

NV_ALE

USB

Device

USB2 (CRT Board)

USB3 (CRT Board)

WLAN (I/O Board)

X

CARD READER

BLUETOOTH

X

USB1 (I/O Board)

ESATA (I/O Board COMBO)

X

W-WAN (I/O Board)

X

CAMERA

KBC CLK EMI

A A

5

4

www.vinafix.vn

3

2

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document N umber Rev

Date: Sheet of

PCH (PCI/USB/NVRAM)

Berry

Taipei Hsien 221, Taiwan, R.O.C.

21 92Mon day, March 29, 2010

1

A00

5

http://adf.ly/LOM1

4

3

2

1

SSID = PCH

RN2201

FDI_PCH_T XP3 FDI_PCH_T XN3

3 OF 10

U2001C

DMI_CTX_P RXN08 DMI_CTX_P RXN18 DMI_CTX_P RXN28

R2202

1 2

49D9R2F -GP

DMI_CTX_P RXN38

DMI_CTX_P RXP08 DMI_CTX_P RXP18 DMI_CTX_P RXP28 DMI_CTX_P RXP38

DMI_PTX_C RXN08 DMI_PTX_C RXN18 DMI_PTX_C RXN28 DMI_PTX_C RXN38

DMI_PTX_C RXP08 DMI_PTX_C RXP18 DMI_PTX_C RXP28 DMI_PTX_C RXP38

DMI_IRCOMP_R

D D

+1.05V_V TT

C C

XDP_DBR ESET#9,23

X02-20091222

R2204

PM_PW ROK3 7

PM_DRAM _PWRGD9

PCH_RSM RST#37 PM_SLP_ S4# 37,50

SUS_PW R_DN_ACK37

PM_PW RBTN#_R9

PM_PW RBTN#37

B B

AC_PRES ENT_EC3 7

1 2

0R0402-P AD

RN2207

4

SRN10KJ -5-GP

X02-20091222

R2218

1 2

0R0402-P AD

PM_BATL OW#_R

PM_RI#

PM_PW RGD

23 1

X02-20091224

TP2206TP AD14-GP T P2206TPAD14-GP

R2213

1 2

0R0402-P AD

R2215

1 2

0R0402-P AD

R2219

1 2

0R0402-P AD

X02-20091222

R2206

1 2

0R0402-P AD

LAN_RST #1

1

PM_RSMR ST#_R

PM_PW RBTN#_R

AC_PRESENT

BC24

DMI0RXN

BJ22

DMI1RXN

AW20

DMI2RXN

BJ20

DMI3RXN

BD24

DMI0RXP

BG22

DMI1RXP

BA20

DMI2RXP

BG20

DMI3RXP

BE22

DMI0TXN

BF21

DMI1TXN

BD20

DMI2TXN

BE18

DMI3TXN

BD22

DMI0TXP

BH21

DMI1TXP

BC20

DMI2TXP

BD18

DMI3TXP

BH25

DMI_ZCOMP

BF25

DMI_IRCOMP

T6

SYS_RESET#

M6

SYS_PWROK

B17

PWROK

K5

MEPWROK

A10

LAN_RST#

D9

DRAMPWROK

C16

RSMRST#

M1

SUS_PWR_DN_ACK/GPIO30

P5

PWRBTN#

P7

ACPRESENT/GPIO31

A6

BATLOW#/GPIO72

F14

RI#

IBEXPEAK-M -GP-NF

DMI

System Power Management

3 OF 10

FDI_RXN0 FDI_RXN1 FDI_RXN2 FDI_RXN3 FDI_RXN4 FDI_RXN5 FDI_RXN6 FDI_RXN7

FDI_RXP0 FDI_RXP1 FDI_RXP2 FDI_RXP3 FDI_RXP4 FDI_RXP5 FDI_RXP6 FDI_RXP7

FDI_INT

FDI_FSYNC0

FDI

FDI_FSYNC1

FDI_LSYNC0

FDI_LSYNC1

WAKE#

CLKRUN#/GPIO32

SUS_STAT#/GPIO61

SUSCLK/GPIO62

SLP_S5#/GPIO63

SLP_S4#

SLP_S3#

SLP_M#

TP23

PMSYNCH

SLP_LAN#/GPIO29

BA18 BH17 BD16 BJ16 BA16 BE14 BA14 BC12

BB18 BF17 BC16 BG16 AW16 BD14 BB14 BD12

BJ14

BF13

BH13

BJ12

BG14

J12

Y1

P8

F3

E4

H7

P12

K8

N2

BJ10

F6

FDI_PCH_T XN0 FDI_PCH_T XN1 FDI_PCH_T XN2 FDI_PCH_T XN3 FDI_PCH_T XN4 FDI_PCH_T XN5 FDI_PCH_T XN6 FDI_PCH_T XN7

FDI_PCH_T XP0 FDI_PCH_T XP1 FDI_PCH_T XP2 FDI_PCH_T XP3 FDI_PCH_T XP4 FDI_PCH_T XP5 FDI_PCH_T XP6 FDI_PCH_T XP7

FDI_INT_C

FDI_FSYNC0_C

FDI_FSYNC1_C

FDI_LSYNC0_C

FDI_LSYNC1_C

PM_SUS_ STAT#MEPW ROK

PCH_SUS CLK

PCH_SLP _S5#

PM_SLP_ S4#_R

PM_SLP_ S3#_R

SIO_SLP_M #_R

PM_SLP_ DSW#

H_PM_SYNC

PM_SLP_ LAN#

R2201

1 2

UMA

0R2J-2-GP

PCIE_W AKE# 76

PM_CLKR UN# 37

TP2201

TP2201 TPAD14-G P

TPAD14-G P

1

TP2203TPAD14-GPTP2203TPAD14-GP

1

TP2204TPAD14-GPTP2204TPAD14-GP

1

TP2205TPAD14-GPTP2205TPAD14-GP

TP2202

TP2202 TPAD14-G P

TPAD14-G P

FDI_INT 8

A00-20100204

1 2

R2209 0R0402-PADR2209 0R0402-PAD

1 2

R2211 10R2J-2-G PR2211 10R2J-2-G P

1 2

R2214 0R0402-PADR2214 0R0402-PAD

1 2

R2216 0R0402-PADR2216 0R0402-PAD

X02-20091222

Option to " Disable " clkrun. Pulling it down will keep the clks running.

FDI_PCH_T XN1 FDI_PCH_T XP1

FDI_PCH_T XN4 FDI_PCH_T XP4 FDI_PCH_T XP0 FDI_PCH_T XN0

FDI_PCH_T XP6 FDI_PCH_T XN6 FDI_PCH_T XN2 FDI_PCH_T XP2

FDI_PCH_T XN7 FDI_PCH_T XP7 FDI_PCH_T XP5 FDI_PCH_T XN5

FDI_LSYNC1_C FDI_FSYNC1_C FDI_LSYNC0_C FDI_FSYNC0_C

PM_SLP_ S3# 37,4 2,47,50,51,89

H_PM_SYNC 9

RN2201

1 2 3

UMA

4 5

SRN0J-7-G P

RN2202

1 2 3

UMA

4 5

SRN0J-7-G P

RN2203

1 2

UMA

3 4 5

SRN0J-7-G P

RN2204

1 2

UMA

3 4 5

SRN0J-7-G P

RN2205

1 2

UMA

3 4 5

SRN0J-7-G P

PCH_SUS CLK_2102 39

PCH_SUS CLK_KBC 3 7

8 7 6

FDI_TXP3 8 FDI_TXN3 8 FDI_TXN1 8 FDI_TXP1 8

FDI_TXN4 8 FDI_TXP4 8 FDI_TXP0 8 FDI_TXN0 8

FDI_TXP6 8 FDI_TXN6 8 FDI_TXN2 8 FDI_TXP2 8

FDI_TXN7 8 FDI_TXP7 8 FDI_TXP5 8 FDI_TXN5 8

FDI_LSYNC1 8 FDI_FSYNC1 8 FDI_LSYNC0 8 FDI_FSYNC0 8

PM_BATL OW#_R PM_RI# AC_PRES ENT_EC SUS_PW R_ACK

PCIE_W AKE#

PCH_RSM RST#SUS_PW R_ACK

RN2206

1 2 3 4 5

SRN10KJ -6-GP

1 2

R2210 1KR2J-1-G PR2210 1 KR2J-1-GP

R2217

1 2

10KR2J-3 -GP

PM_CLKR UN#

12

R2221

DY

10KR2J-3 -GP

DY

8 7 6

+3.3V_AL W

1 2

R2220

R2220 10KR2J-3 -GP

10KR2J-3 -GP

+3.3V_RU N

A A

5

4

www.vinafix.vn

3

2

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

S

ize Document Nu mber Rev

Size Document N umber Rev

Date: Sheet of

PCH (DM I/FDI/PM)

Berry

Taipei Hsien 221, Taiwan, R.O.C.

22 92Mon day, March 29, 2010

1

A00

5

http://adf.ly/LOM1

4

3

2

1

SSID = PCH

12

RN2303

2 3 1

SRN2K2J -1-GP

Q2301

6

5

2N7002E DW-GP

UMA

+3.3V_AL W

PEG_CLK REQ#_C

4

1

2

34

DIS uses 0ohm 63.R0034.1DL UMA uses 12pF 78.12034.1FL

X2301

X2301 XTAL-25M HZ-96GP

XTAL-25M HZ-96GP

1 2

C2307

UMA

SC12P50 V2JN-3GP

X01 2009/11/05

2 OF 10

U2001B

BG30

PERN1

BJ30

PERP1

BF29

PETN1

BH29

PETP1

D D

PCIE_RXN276

PCIE_RXP276 PCIE_TXN276 PCIE_TXP276

PCIE_RXN376

PCIE_RXP376 PCIE_TXN376 PCIE_TXP376

PCIE_RXN476

PCIE_RXP476 PCIE_TXN476 PCIE_TXP476

C2301 SCD1U10V 2KX-5GPC 2301 SC D1U10V2KX-5GP C2302 SCD1U10V 2KX-5GPC 2302 SC D1U10V2KX-5GP

C2303 SCD1U10V 2KX-5GPC 2303 SC D1U10V2KX-5GP C2306 SCD1U10V 2KX-5GPC 2306 SC D1U10V2KX-5GP

C2304 SCD1U10V 2KX-5GPC 2304 SC D1U10V2KX-5GP C2305 SCD1U10V 2KX-5GPC 2305 SC D1U10V2KX-5GP

1 2 1 2

PCIE_C_TX N2 PCIE_C_TX P2

PCIE_C_TX N3 PCIE_C_TX P3

PCIE_C_TX N4 PCIE_C_TX P4

x01 change tolerant 20091117

C C

PCIECLKRQ{0,3,4,5,6,7}# should have a 10K pull-up to +3.3V_ALW. PCIECLKRQ{1,2} should have a 10K pull-up to +3.3_RUN

PCIE_CLK_ RQ1#

CLK_PCIE_ WLAN#76 CLK_PCIE_ WLAN76

WLAN _CLKREQ#76

CLK_PCIE_ LAN#76 CLK_PCIE_ LAN76

B B

+3.3V_AL W

RN2307

1

8

2

7

3

6

4 5

SRN10KJ -6-GP

R2304 10KR2J-3 -GPR2304 10KR2J-3 -GP

CLK_PCIE_ WWAN#7 6 CLK_PCIE_ WWAN76

WW AN_CLKREQ#76

WW AN_CLKREQ# PCIE_CLK_ RQ0# PEG_B_C LKRQ# PCIE_CLK_ RQ5#

12

PCIE_CLK_ RQ3#

PCIE_CLK_ RQ5#

PEG_B_C LKRQ#

AW30

PERN2

BA30

PERP2

BC30

PETN2

BD30

PETP2

AU30

PERN3

AT30

PERP3

AU32

PETN3

AV32

PETP3

BA32

PERN4

BB32

PERP4

BD32

PETN4

BE32

PETP4

BF33

PERN5

BH33

PERP5

BG32

PETN5

BJ32

PETP5

BA34

PERN6

AW34

PERP6

BC34

PETN6

BD34

PETP6

AT34

PERN7

AU34

PERP7

AU36

PETN7

AV36

PETP7

BG34

PERN8

BJ34

PERP8

BG36

PETN8

BJ36

PETP8

AK48

CLKOUT_PCIE0N

AK47

CLKOUT_PCIE0P

P9

PCIECLKRQ0#/GPIO73

AM43

CLKOUT_PCIE1N

AM45

CLKOUT_PCIE1P

U4

PCIECLKRQ1#/GPIO18

AM47

CLKOUT_PCIE2N

AM48

CLKOUT_PCIE2P

N4

PCIECLKRQ2#/GPIO20

AH42

CLKOUT_PCIE3N

AH41

CLKOUT_PCIE3P

A8

PCIECLKRQ3#/GPIO25

AM51

CLKOUT_PCIE4N

AM53

CLKOUT_PCIE4P

M9

PCIECLKRQ4#/GPIO26

AJ50

CLKOUT_PCIE5N

AJ52

CLKOUT_PCIE5P

H6

PCIECLKRQ5#/GPIO44

AK53

CLKOUT_PEG_B_N

AK51

CLKOUT_PEG_B_P

P13

PEG_B_CLKRQ#/GPIO56

IBEXPEAK-M -GP-NF

WLAN

LAN

W-WAN

SMBus

PCI-E*

Link

Controller

PEG_A_CLKRQ#/GPIO47

PEG

CLKOUT_DP_N/CLKOUT_BCLK1_N CLKOUT_DP_P/CLKOUT_BCLK1_P

From CLK BUFFER

CLKIN_SATA_N/CKSSCD_N CLKIN_SATA_P/CKSSCD_P

Clock Flex

CLKIN_PCILOOPBACK

CLKOUTFLEX0/GPIO64

CLKOUTFLEX1/GPIO65

CLKOUTFLEX2/GPIO66

CLKOUTFLEX3/GPIO67

2 OF 10

SMBALERT#/GPIO11

SMBCLK

SMBDATA

SML0ALERT#/GPIO60

SML0CLK

SML0DATA

SML1ALERT#/GPIO74

SML1CLK/GPIO58

SML1DATA/GPIO75

CL_CLK1

CL_DATA1

CL_RST1#

CLKOUT_PEG_A_N CLKOUT_PEG_A_P

CLKOUT_DMI_N CLKOUT_DMI_P

CLKIN_DMI_N CLKIN_DMI_P

CLKIN_BCLK_N CLKIN_BCLK_P

CLKIN_DOT_96N CLKIN_DOT_96P

REFCLK14IN

XTAL25_IN

XTAL25_OUT

XCLK_RCOMP

B9

PCH_SMB _CLK

H14

PCH_SMB _DATA

C8

TPM_ID1

J14

SML0_CL K

C6

SML0_DA TA

G8

LPD_SPI_INTR #

M14

KBC_SCL 1

E10

KBC_SDA 1

G12

CL_CLK

T13

CL_DATA

T11

CL_RST#

T9

PEG_CLK REQ#_C

H1

CLK_PCIE_ VGA#

AD43

CLK_PCIE_ VGA

AD45

CLK_EXP _N

AN4

CLK_EXP _P

AN2

AT1 AT3

CLKIN_DMI#

AW24

CLKIN_DMIPCIE_CLK_ RQ0#

BA24

CLK_CPU _BCLK#

AP3

CLK_CPU _BCLK

AP1

F18 E18

AH13 AH12

CLK_PCH _14M

P41

CLK_PCI_F B

J42

XTAL25_ IN

AH51

XTAL25_ OUT

AH53

XCLK_RC OMP

AF38

CLK_PCH _GPIO64

T45

P43

T42

N50

1

X01 20091118

CLK48_G PIO

PCH_GPIO1 1 25

SML0_CL K 9

SML0_DA TA 9

KBC_SCL 1 37

KBC_SDA 1 37

TP2302 T PAD14-GPT P2302 TPAD14-G P

TP2303 T PAD14-GPT P2303 TPAD14-G P

TP2304 T PAD14-GPT P2304 TPAD14-G P

DY

1 2

R2310 0R2J-2-GP

CLK_PCIE_ VGA# 80 CLK_PCIE_ VGA 80

CLK_EXP _N 9 CLK_EXP _P 9

CLKIN_DMI# 7 CLKIN_DMI 7

CLK_CPU _BCLK# 7 CLK_CPU _BCLK 7

CLK_DRE F# 7 CLK_DRE F 7

CLK_PCIE_ SATA# 7 CLK_PCIE_ SATA 7

CLK_PCH _14M 7

CLK_PCI_F B 21

R2306 90D9R2F -1-GPR2306 90D9R2F -1-GP

1 2

TP2301

TPAD14-G P

TP2307

TPAD14-G P

1

PEG_CLK REQ# 82

+3.3V_AL W

RN2309

SRN2K2J -1-GP

SML0_DA TA

SML0_CL K

+1.05V_V TT

TPM_ID1

R2305 10K R2J-3-GPR2305 10K R2J-3-GP

LPD_SPI_INTR #

R2311 10K R2J-3-GPR2311 10K R2J-3-GP

4

1

2 3

PCH_SMB _DATA

PCH_SMB _CLK

XTAL25_ IN

UMA

XTAL25_ OUT

4

RN2301

RN2301 SRN2K2J -1-GP

SRN2K2J -1-GP

1

2 3

KBC_SCL 1

KBC_SDA 1

+3.3V_RU N

1 2

84.27002.F3F

R2303

R2303 1M1R2J-G P

1M1R2J-G P

+3.3V_AL W

PCH_SMB _CLK

PCH_SMB _DATA

+3.3V_AL W

UMA

DIS

PCH_SMB DATA 7,18,19,76

PCH_SMB CLK 7,18,19,76

X01 2009/11/06

C2308

12

COLAY

SC12P50 V2JN-3GP

12

1

4

12

R2308

R2308 10KR2J-3 -GP

10KR2J-3 -GP

12

R2309

R2309 10KR2J-3 -GP

10KR2J-3 -GP

23

RN2302

RN2302 SRN2K2J -1-GP

SRN2K2J -1-GP

A A

5

+3.3V_RU N

4

RN2308

4 5 3 2 1

SRN10KJ -6-GP

XDP_DBR ESET# WLAN _CLKREQ#

6

INT_SERIRQ

7

PCIE_CLK_ RQ1#

8

www.vinafix.vn

XDP_DBR ESET# 9,22

INT_SERIRQ 24,37

3

2

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

PCH (PCI-E/SMBUS/CLOCK/CL)

ize Document Nu mber Rev

Size Document N umber Rev

S

Date: Sheet of

Berry

Taipei Hsien 221, Taiwan, R.O.C.

23 92Mon day, March 29, 2010

1

A00

5

http://adf.ly/LOM1

4

3

2

1

PCH_RTC X1

1 2

R2402 10MR2J-L-GPR2402 10MR2J-L-GP

X2401

D D

12

C2403

SC15P50V2JN-2-GP

2 3

X-32D768 KHZ-65-GP

82.30001.A41

PCH_RTC X2

41

12

C2401

C2401 SC15P50 V2JN-2-GP

SC15P50 V2JN-2-GP

X01 X01

PCH_AZ_ CODEC_SYNC30

PCH_SDO UT_CODEC30

C C

+3.3V_RU N

NO REBOOT STRAP

1 2

DY

R2410 1KR2J-1-G P

PCH_AZ_ CODEC_BITCLK30

ACZ_SPK R

PCH_AZ_ CODEC_RST#30

No Reboot Strap R23

HDA_SPKR

Low = Default High = No Reboot

For EMI

B B

PCH_AZ_ CODEC_BITCLK PCH_AZ_ CODEC_RST#

EC2402

SCD1U10 V2KX-5GP

DY

1 2

DY

1 2

EC2401

EC2401 SC22P50 V2JN-4GP

SC22P50 V2JN-4GP

+RTC_CE LL

R2401

1 2

20KR2J-L 2-GP

+RTC_CE LL

20KR2J-L 2-GP

R2403

1 2

20KR2J-L 2-GP

SC1U6D3 V2KX-GP

C2404

12

C2402

C2402 SC1U6D3 V2KX-GP

SC1U6D3 V2KX-GP

12

X01 20091118 layout swap

RN2403

1 2 3

SRN33J-5 -GP-U

RN2402

SRN33J-5 -GP-U

1 2 3

ACZ_SYNC_ R

4

ACZ_SDA TAOUT_R

4

PCH_SPI_C LK62

PCH_SPI_C S0#62

PCH_SPI_D O62

PCH_SPI_D I62

ACZ_RST #_R ACZ_BIT_C LK

PCH_SPI_C LK

PCH_SPI_C S0#

PCH_SPI_D O

PCH_SPI_D I

21

G2401

G2401 GAP-OPEN

GAP-OPEN

+RTC_CE LL

TP2404TPAD14-G P T P2404TPA D14-GP

TP2405TPAD14-G P T P2405TPA D14-GP

TP2406TPAD14-G P T P2406TPA D14-GP

TP2407TPAD14-G P T P2407TPA D14-GP

TP2408TPAD14-G P T P2408TPA D14-GP

R2413 15R2J-GPR2413 15R2J-GP

1 2

R2414 15R2J-GPR2414 15R2J-GP

1 2

R2415 0R2 J-2-GP

R2416 15R2J-GPR2416 15R2J-GP

1 2

INTVRMEN- Integrated SUS

1.1V VRM Enable High - Enable internal VRs

R2407

1M1R2J-G P

R2404 330 KR2F-L-GPR2404 330KR2F -L-GP

ACZ_SPK R30

PCH_SDIN_ CODEC3 0

ME_UNLO CK#37

DY

12

1 2

ACZ_RST #_R

ACZ_SDA TAOUT_R

1

PCH_RTC X1 PCH_RTC X2

PCH_RTC RST#

SRTCRST #

SM_INTRUD ER#

PCH_INTVR MEN

ACZ_BIT_C LK

ACZ_SYNC_ R

PCH_JTA G_TCK

PCH_JTA G_TMS

PCH_JTA G_TDI

PCH_JTA G_TDO

PCH_JTA G_RST#

SPI_CLK_R

SPI_CS#0_ R

SPI_CS1#

SPI_MOSI_R

SSID = PCH

U2001A

B13

RTCX1

D13

RTCX2

C14

RTCRST#

D17

SRTCRST#

A16

INTRUDER#

A14

INTVRMEN

A30

HDA_BCLK

D29

HDA_SYNC

P1

SPKR

C30

HDA_RST#

G30

HDA_SDIN0

F30

HDA_SDIN1

E32

HDA_SDIN2

F32

HDA_SDIN3

B29

HDA_SDO

H32

HDA_DOCK_EN#/GPIO33

J30

HDA_DOCK_RST#/GPIO13

M3

JTAG_TCK

K3

JTAG_TMS

K1

JTAG_TDI

J2

JTAG_TDO

J4

TRST#

BA2

SPI_CLK

AV3

SPI_CS0#

AY3

SPI_CS1#

AY1

SPI_MOSI

AV1

SPI_MISO

IBEXPEAK-M -GP-NF

RTCIHDA

SPI JTAG

FWH0/LAD0 FWH1/LAD1 FWH2/LAD2 FWH3/LAD3

FWH4/LFRAME#

LDRQ1#/GPIO23

LPC

SATA

SATAICOMPO

SATAICOMPI

SATA0GP/GPIO21

SATA1GP/GPIO19

1 OF 10

LDRQ0#

SERIRQ

SATA0RXN SATA0RXP SATA0TXN SATA0TXP

SATA1RXN SATA1RXP SATA1TXN SATA1TXP

SATA2RXN SATA2RXP SATA2TXN SATA2TXP

SATA3RXN SATA3RXP SATA3TXN SATA3TXP

SATA4RXN SATA4RXP SATA4TXN SATA4TXP

SATA5RXN SATA5RXP SATA5TXN SATA5TXP

SATALED#

LPC_LAD [0..3]

LPC_LAD 0

D33

LPC_LAD 1

B33

LPC_LAD 2

C32

LPC_LAD 3

A32

C34

A34 F34

AB9

LPC_LFR AME# 37,70

INT_SERIRQ 23,37

x01 Change tolerant 20091117

AK7 AK6 AK11 AK9

AH6 AH5 AH9 AH8

AF11 AF9 AF7 AF6

AH3 AH1 AF3 AF1

AD9 AD8 AD6 AD5

AD3 AD1 AB3 AB1

AF16

AF15

T3

Y9

V1

SATA_TX N0_C SATA_TX P0_C

SATA_TX N1_C SATA_TX P1_C

SATA_TX N4_C SATA_TX P4_C

C2409 SCD01U1 6V2KX-3GPC2409 SCD01U1 6V2KX-3GP C2410 SCD01U1 6V2KX-3GPC2410 SCD01U1 6V2KX-3GP

C2405 SCD01U1 6V2KX-3GPC2405 SCD01U1 6V2KX-3GP C2406 SCD01U1 6V2KX-3GPC2406 SCD01U1 6V2KX-3GP

C2407 SCD01U1 6V2KX-3GPC2407 SCD01U1 6V2KX-3GP C2408 SCD01U1 6V2KX-3GPC2408 SCD01U1 6V2KX-3GP

R2412

SATAICOMP

SATA_DE T#0_R

SATA_DE T#1_R

R2412

1 2

37D4R2F -GP

SATA_LE D# 66

1 2 1 2

+1.05V_V TT

LPC_LAD [0..3] 37,70

+3.3V_RU N

4

RN2401

RN2401 SRN10KJ -5-GP

SRN10KJ -5-GP

1

2 3

SATA_RX N0_C 59 SATA_RX P0_C 59 SATA_TX N0 59 SATA_TX P0 5 9

SATA_RX N1_C 59 SATA_RX P1_C 59 SATA_TX N1 59 SATA_TX P1 5 9

SATA_RX N4_C 76 SATA_RX P4_C 76 SATA_TX N4 76 SATA_TX P4 7 6

HDD

ODD

ESATA

x01 Change tolerant 20091117

A A

5

4

www.vinafix.vn

3

2

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

PCH (SPI/RTC/LPC/SATA/IHDA)

Size Document N umber Rev

Date: Sheet of

Berry

Taipei Hsien 221, Taiwan, R.O.C.

24 92Mon day, March 29, 2010

1

A00

5

http://adf.ly/LOM1

4

3

2

1

SSID = PCH

6 OF 10

U2001F

S_GPIO

SIO_EXT_S CI#37

D D

RN2502

PCH_GPIO2 2 PCH_GPIO3 7 PCH_GPIO3 6 PCH_GPIO4 8

C C

B B

+3.3V_RU N

PCH_GPIO3 9 STP_PCI#

SRN100K J-6-GP

PCH_GPIO1 7 PCH_GPIO6

SIO_EXT_S CI#

SIO_EXT_W AKE#

PCH_GPIO2 4

PCH_GPIO1 2 SIO_EXT_S MI# PCH_GPIO2 8 HOST_AL TERT#1

+3.3V_AL W

RN2502

1 2 3 4 5 6

SRN10KJ -L3-GP

RN2503

4

RN2504

1 2 3 4 5

SRN10KJ -6-GP

R2515 100KR2J -1-GP

RN2501

1 2 3 4 5 6

SRN10KJ -L3-GP

DY

1 23

8 7 6

+3.3V_RU N

SIO_EXT_W AKE#37

SC47P50 V2JN-3GP

+3.3V_RU N

10

PCH_GPIO3 8

9

DGPU_HO LD_RST#

8 7

PCH_TEM P_ALERT#_C

S3_RST_ GATE#9

+3.3V_AL W

12

10

S3_RST_ GATE#

9

PCH_GPIO4 5

8 7

PCH_GPIO5 7

C2501

SC47P50 V2JN-3GP

S_GPIO

PCH_TEM P_ALERT#37

12

DY

C2502

PCH_GPIO1 1 23

SIO_EXT_S MI#37

PCH_GPIO2 2

12

DY

R2508

R2508 10KR2J-3 -GP

10KR2J-3 -GP

1 2

C2503 SCD047U 16V2KX-1-GPC 2503 SCD04 7U16V2KX-1-GP

TP2502TPAD14-G P T P2502TPA D14-GP

R2510

1 2

0R0402-P AD

X02-20091222

TP2503TPAD14-G P T P2503TPA D14-GP

TP2504TPAD14-G P T P2504TPA D14-GP

TP2505TPAD14-G P T P2505TPA D14-GP

TP2507TPAD14-G P T P2507TPA D14-GP

SIO_EXT_S CI#

PCH_GPIO6

SIO_EXT_W AKE#

SIO_EXT_S MI#

PCH_GPIO1 2

HOST_AL TERT#1

DGPU_HO LD_RST#

PCH_GPIO1 7

PCH_GPIO2 4

PCH_GPIO2 7

1

PCH_GPIO2 8

STP_PCI#

CLK_SAT A_OE#

PCH_GPIO3 6

PCH_GPIO3 7

PCH_GPIO3 8

PCH_GPIO3 9

PCH_GPIO4 5

PCH_GPIO4 8

PCH_TEM P_ALERT#_C

PCH_GPIO5 7

PCH_NCT F_1

1

PCH_NCT F_2

1

PCH_NCT F_3

1

PCH_NCT F_4

1

Y3

BMBUSY#/GPIO0

C38

TACH1/GPIO1

D37

TACH2/GPIO6

J32

TACH3/GPIO7

F10

GPIO8

K9

LAN_PHY_PWR_CTRL/GPIO12

T7

GPIO15

AA2

SATA4GP/GPIO16

F38

TACH0/GPIO17

Y7

SCLOCK/GPIO22

H10

GPIO24

AB12

GPIO27

V13

GPIO28

M11

STP_PCI#/GPIO34

V6

SATACLKREQ#/GPIO35

AB7

SATA2GP/GPIO36

AB13

SATA3GP/GPIO37

V3

SLOAD/GPIO38

P3

SDATAOUT0/GPIO39

H3

PCIECLKRQ6#/GPIO45

F1

PCIECLKRQ7#/GPIO46

AB6

SDATAOUT1/GPIO48

AA4

SATA5GP/GPIO49

F8

GPIO57

A4

VSS_NCTF_1

A49

VSS_NCTF_2

A5

VSS_NCTF_3

A50

VSS_NCTF_4

A52

VSS_NCTF_5

A53

VSS_NCTF_6

B2

VSS_NCTF_7

B4

VSS_NCTF_8

B52

VSS_NCTF_9

B53

VSS_NCTF_10

BE1

VSS_NCTF_11

BE53

VSS_NCTF_12

BF1

VSS_NCTF_13

BF53

VSS_NCTF_14

BH1

VSS_NCTF_15

BH2

VSS_NCTF_16

BH52

VSS_NCTF_17

BH53

VSS_NCTF_18

BJ1

VSS_NCTF_19

BJ2

VSS_NCTF_20

BJ4

VSS_NCTF_21

BJ49

VSS_NCTF_22

BJ5

VSS_NCTF_23

BJ50

VSS_NCTF_24

BJ52

VSS_NCTF_25

BJ53

VSS_NCTF_26

D1

VSS_NCTF_27

D2

VSS_NCTF_28

D53

VSS_NCTF_29

E1

VSS_NCTF_30

E53

VSS_NCTF_31

IBEXPEAK-M -GP-NF

MISC

CLKOUT_BCLK0_N/CLKOUT_PCIE8N

CLKOUT_BCLK0_P/CLKOUT_PCIE8P

GPIO

CPU

NCTF

RSVD

6 OF 10

CLKOUT_PCIE6N CLKOUT_PCIE6P

CLKOUT_PCIE7N CLKOUT_PCIE7P

A20GATE

PECI

RCIN#

PROCPWRGD

THRMTRIP#

TP10

TP11

TP12

TP13

TP14

TP15

TP16

TP17

TP18

TP19

NC_1

NC_2

NC_3

NC_4

NC_5

INIT3_3V#

TP24

TP1

TP2

TP3

TP4

TP5

TP6

TP7

TP8

TP9

AH45 AH46

AF48 AF47

U2

AM3

AM1

BG10

T1

BE10

BD10

BA22

AW22

BB22

AY45

AY46

AV43

AV45

AF13

M18

N18

AJ24

AK41

AK42

M32

N32

M30

N30

H12

AA23

AB45

AB38

AB42

AB41

T39

P6

C10

INIT3_3V#

BCLK_CP U_N 9

BCLK_CP U_P 9

H_PECI 9

SIO_RCIN# 37

1

H_PW RGD 9,42

TP2506TPAD14-GPTP2506TPAD14-GP

PCH_THE RMTRIP_R

SIO_A20GA TE 37

+1.05V_V TT

1 2

R2506 54D9R2F-L1 -GPR2506 54D9R2F-L1 -GP

1 2

Placed Within 2" from PCH

R2504

R2504 56R2J-4-G P

56R2J-4-G P

H_THERM TRIP# 9,37,42 ,82

A A

5

4

www.vinafix.vn

3

2

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

ize Document Nu mber Rev

Size Document N umber Rev

S

Date: Sheet of

PCH (GPIO/CPU)

Berry

Taipei Hsien 221, Taiwan, R.O.C.

25 92Mon day, March 29, 2010

1

A00

5

http://adf.ly/LOM1

4

3

2

1

SSID = PCH

DIS

1 2

R2601 0R2J-2-GP

+1.05V_V TT

1.524A

SC10U6D 3V5KX-1GP

D D

SC10U6D 3V5KX-1GP

C2602

12

C2601

C2601 SC1U6D3 V2KX-GP

SC1U6D3 V2KX-GP

DY

x01 change tolerant 20091117

+1.05V_V TT

SC1U6D3V2KX-GP

12

C2618

SC1U6D3V2KX-GP

+3.3V_RU N

357mA

VCCAFDI_V RM

VCCFDIPLL

1

TPAD14-G P

VCCAPLL EXP

TP2602 TPAD14-G PTP26 02 TPAD14-GP

1

C C

+1.05V_V TT

3.208A

C2614

x01 change tolerant 20091117

12

C2615

SC1U6D3V2KX-GP

UMA

SC1U6D3V2KX-GP

SC10U6D3V5KX-1GP

12

C2616

SC1U6D3V2KX-GP

UMA

C2617

x01 change tolerant 20091117

C2621

SCD1U10 V2KX-5GP

B B

+1.05V_V TT

C2621

TP2601

U2001G

AB24 AB26 AB28 AD26 AD28

AF26 AF28 AF30

AF31 AH26 AH28 AH30 AH31

AJ30

AJ31

AK24

BJ24

AN20 AN22 AN23 AN24 AN26 AN28

BJ26

BJ28

AT26

AT28 AU26 AU28 AV26 AV28

AW26 AW28

BA26 BA28 BB26 BB28 BC26 BC28 BD26 BD28 BE26 BE28 BG26 BG28 BH27

AN30 AN31

AN35

AT22

BJ18

AM23

IBEXPEAK-M -GP-NF

VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE

VCCIO

VCCAPLLEXP

VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO

VCCIO VCCIO

VCC3_3

VCCVRM[1]

VCCFDIPLL

VCCIO

POWER

VCC CORE

DMI

PCI E*

NAND / SPI

FDI

CRTLVDS

HVCMOS

7 OF 10

VCCADAC

VSSA_DAC

VCCALVDS

VSSA_LVDS

VCCTX_LVDS VCCTX_LVDS VCCTX_LVDS VCCTX_LVDS

VCC3_3

VCCVRM

VCCDMI

VCCPNAND VCCPNAND VCCPNAND VCCPNAND VCCPNAND VCCPNAND VCCPNAND VCCPNAND VCCPNAND

VCCME3_3 VCCME3_3 VCCME3_3 VCCME3_3

AE50

AE52

AF53

AF51

AH38

AH39

AP43 AP45 AT46 AT45

AB34

AB35

AD35

AT24

AT16

AU16

AM16 AK16 AK20 AK19 AK15 AK13 AM12 AM13 AM15

AM8 AM9 AP11 AP9

+VCCA_D AC_1_2

12

UMA

DIS

1 2

R2604 0R2J-2-GP

+1.8VS_V CCTX_LVDS

R2605

DIS

1 2

0R2J-2-GP

12

C2611

C2611 SCD1U10 V2KX-5GP

SCD1U10 V2KX-5GP

35mA

+1.05VS_ VCC_DMI

12

C2619

SC1U6D3 V2KX-GP

12

C2620

C2620 SCD1U10 V2KX-5GP

SCD1U10 V2KX-5GP

PCH_VCC ME3_3

12

C2623

C2623 SCD1U10 V2KX-5GP

SCD1U10 V2KX-5GP

12

C2603

SCD01U16V2KX-3GP

+3VS_VC CA_LVD

SCD01U16V2KX-3GP

12

C2607

UMA

357mA

156mA

85mA

69mA

12

C2604

SCD1U10V2KX-5GP

UMA

C2606

SCD1U10 V2KX-5GP

SCD01U16V2KX-3GP

12

C2608

UMA

+3.3V_RU N

+1.8V_RU N

X02-20091222

1 2

0R0402-P AD

+3.3V_RU N

C2605

SC10U6D3V5MX-3GP

1 2

DY

12

DY

R2606

X02-20091222

12

R2609

R2609 0R0402-P AD

0R0402-P AD

1 2

L2602 HCB1608 KF-181-GP

R2603 0R3J-0-U-G P

UMA

1 2

R2611 0R5 J-5-GP

C2609

X01 Change location-20091116

SC10U6D 3V5MX-3GP

61mA

+V_NVRA M_VCCQ

R2601 0R2J-2-GP

+3.3V_CR T_LDO

UMA

300mA

12

59mA

+1.05V_V TT

A00-20100204

UMA

1 2

R2602 0R2J-2-GP

+3.3V_RU N

+1.8V_RU N

+5V_RUN +3.3V_CR T_LDO

C2612

SC1U10V 2KX-1GP

+1.8V_RU N

12

R2607

R2607 0R0402-P AD

0R0402-P AD

+3.3V_RU N

3.3V CRT LDO

U2601

12

DY

VIN3VOUT

2

GND

1

EN

RT9198-3 3PBG-GP

DY

NC#5

4

5

DY

Second 74.09091.H3F

x01 change tolerant 20091117

+3.3V_RU N

12

R2608

DY

0R2J-2-GP

12

C2613

C2613 SC1U6D3 V2KX-GP

SC1U6D3 V2KX-GP

X02-20091222

R2610

4

R2610

1 2

0R0402-P AD

VCCAFDI_V RM

A A

5

+1.8V_RU N

www.vinafix.vn

3

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document N umber Rev

Date: Sheet of

2

Date: Sheet

Berry

Taipei Hsien 221, Taiwan, R.O.C.

PCH (POWER1)

1

A00

of

26 92W ednesday, February 10, 2010

A00

5

http://adf.ly/LOM1

4

3

2

1

10 OF 10

HDA

10 OF 10

VCCIO VCCIO VCCIO VCCIO

VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3

VCCSUS3_3

VCCIO

V5REF_SUS

V5REF

VCC3_3

VCCSATAPLL VCCSATAPLL

VCCIO

VCCVRM

VCCIO

VCCIO VCCIO VCCIO VCCIO

VCCME VCCME VCCME VCCME

VCCSUSHDA

V24 V26 Y24 Y26

V28 U28 U26 U24 P28 P26 N28 N26 M28 M26 L28 L26 J28 J26 H28 H26 G28 G26 F28 F26 E28 E26 C28 C26 B27 A28 A26

U23

V23

F24

K49

J38

L38

M36

N36

P36

U35

AD13

AK3 AK1

AH22

AT20

AH19

AD20

AF22

AD19 AF20 AF19 AH20

AB19 AB20 AB22 AD22

AA34 Y34 Y35 AA35

L30

+VCCSUS HDA

12

C2705

C2705 SC1U6D3 V2KX-GP

SC1U6D3 V2KX-GP

DY

x01 change tolerant 20091117

12

C2706

C2706 SCD1U10 V2KX-5GP

SCD1U10 V2KX-5GP

+3.3V_AL W

x01 change tolerant 20091117

+5VALW _PCH_VCC5R EFSUS

+5VS_PC H_VCC5REF

12

C2718

C2718 SCD1U10 V2KX-5GP

SCD1U10 V2KX-5GP

x01 change tolerant 20091117

VCCSATA PLL

1

TPAD14-G P

+1.8V_RU N

X02-20091222

R2703

1 2

0R0402-P AD

12

C2733

SC1U6D3 V2KX-GP

POWER

U2001J

TP2701

D D

x01 change tolerant 20091117

+1.05V_V TT

C2707

SC10U6D 3V5KX-1GP

+1.05V_V TT

C C

X01 20091121

L2702

1 2

IND-10UH-218 -GP

SC10U6D 3V5MX-3GP

L2703

1 2

IND-10UH-218 -GP

SC10U6D 3V5MX-3GP

C2711

C2716

DY

+1.05VS_ VCCA_A_DPL

12

+1.05VS_ VCCA_B_DPL

12

C2707

C2712

C2712 SC1U6D3 V2KX-GP

SC1U6D3 V2KX-GP

12

C2717

C2717 SC1U6D3 V2KX-GP

SC1U6D3 V2KX-GP

1.998A

12

DY

x01 change tolerant 20091118

SCD1U10 V2KX-5GP

72mA 73mA

+1.05V_V TT

x01 change tolerant 20091117

12

C2720

SC1U6D3 V2KX-GP

B B

x01 change tolerant 20091117

C2725

SCD1U10 V2KX-5GP

+3.3V_AL W

+1.05V_V TT

163mA

12

C2728

C2728 SCD1U10 V2KX-5GP

SCD1U10 V2KX-5GP

x01 change tolerant 20091117

1mA

SC10U6D 3V5KX-1GP

A A

+RTC_CE LL

C2721

SC1U6D3 V2KX-GP

12

+3.3V_RU N

12

C2730

2mA

VCCACLK

1

TPAD14-G P

SCD1U10 V2KX-5GP

C2704

SC10U6D3V5MX-3GP

C2710

SC1U6D3 V2KX-GP

12

C2714

+1.05VS_ VCCA_A_DPL

+1.05VS_ VCCA_B_DPL

12

SC1U6D3 V2KX-GP

+VCCSST

+1.05VAL W_INT_VCCSU S

12

C2726

C2726 SCD1U10 V2KX-5GP

SCD1U10 V2KX-5GP

C2729

SCD1U10 V2KX-5GP

C2729

SCD1U10V2KX-5GP

12

C2731

SCD1U10V2KX-5GP

12

C2734

C2703

SC1U6D3V2KX-GP

+1.8V_RU N

C2722

SCD1U10V2KX-5GP

DCPSUSB YP

12

C2708

12

DY

+VCCRTC EXT

12

C2732

12

C2735

AP51

VCCACLK

AP53

VCCACLK

AF23

VCCLAN

AF24

VCCLAN

Y20

DCPSUSBYP

AD38

VCCME

AD39

VCCME

AD41

VCCME

AF43

VCCME

AF41

VCCME

AF42

VCCME

V39

VCCME

V41

VCCME

V42

VCCME

Y39

VCCME

Y41

VCCME

Y42

VCCME

V9

DCPRTC

AU24

VCCVRM

BB51

VCCADPLLA

BB53

VCCADPLLA

BD51

VCCADPLLB

BD53

VCCADPLLB

AH23

VCCIO

AJ35

VCCIO

AH35

VCCIO

AF34

VCCIO

AH34

VCCIO

AF32

VCCIO

V12

DCPSST

Y22

DCPSUS

P18

VCCSUS3_3

U19

VCCSUS3_3

U20

VCCSUS3_3

U22

VCCSUS3_3

V15

VCC3_3

V16

VCC3_3

Y16

VCC3_3

AT18

V_CPU_IO

AU18

V_CPU_IO

A12

VCCRTC

IBEXPEAK-M -GP-NF

POWER

USB

Clock and Miscellaneous

PCI/GPIO/LPC

SATA

PCI/GPIO/LPC

CPU

RTC

x01 change tolerant 20091117

5

4

www.vinafix.vn

3

+1.05V_V TT

+3.3V_AL W

12

C2709

C2709 SCD1U10 V2KX-5GP

SCD1U10 V2KX-5GP

TP2702

+1.05V_V TT

+3.3V_RU N

12

21

D2701

D2701 CH751H-4 0PT-GP

CH751H-4 0PT-GP

R2702 10R 2J-2-GPR 2702 10R2J-2-GP

12

C2713

C2713 SC1U10V 2KX-1GP

SC1U10V 2KX-1GP

C2719

C2719 SCD1U10 V2KX-5GP

SCD1U10 V2KX-5GP

1 2

x01 change tolerant 20091117

12

C2727

C2727 SC1U6D3 V2KX-GP

SC1U6D3 V2KX-GP

+1.05V_V TT

6mA

+3.3V_AL W

2

Title

Size Document N umber Rev

Date: Sheet of

+5V_ALW

12

C2715

C2715 SC1U10V 2KX-1GP

SC1U10V 2KX-1GP

+3.3V_RU N

+1.05V_V TT

PCH (POWER2)

Berry

SSID = PCH

+3.3V_RU N

21

D2702

D2702 CH751H-4 0PT-GP

CH751H-4 0PT-GP

1 2

R2701 10R 2J-2-GPR 2701 10R2J-2-GP

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

27 92W ednesday, February 10, 2010

1

+5V_RUN

A00

5

http://adf.ly/LOM1

4

3

2

1

SSID = PCH

D D

C C

B B

A A

5

U2001H

AB16

VSS

AA19

VSS

AA20

VSS

AA22

VSS

AM19

VSS

AA24

VSS

AA26

VSS

AA28

VSS

AA30

VSS

AA31

VSS

AA32

VSS

AB11

VSS

AB15

VSS

AB23

VSS

AB30

VSS

AB31

VSS

AB32

VSS

AB39

VSS

AB43

VSS

AB47

VSS

AB5

VSS

AB8

VSS

AC2

VSS

AC52

VSS

AD11

VSS

AD12

VSS

AD16

VSS

AD23

VSS

AD30

VSS

AD31

VSS

AD32

VSS

AD34

VSS

AU22

VSS

AD42

VSS

AD46

VSS

AD49

VSS

AD7

VSS

AE2

VSS

AE4

VSS

AF12

VSS

Y13

VSS

AH49

VSS

AU4

VSS

AF35

VSS

AP13

VSS

AN34

VSS

AF45

VSS

AF46

VSS

AF49

VSS

AF5

VSS

AF8

VSS

AG2

VSS

AG52

VSS

AH11

VSS

AH15

VSS

AH16

VSS

AH24

VSS

AH32

VSS

AV18

VSS

AH43

VSS

AH47

VSS

AH7

VSS

AJ19

VSS

AJ2

VSS

AJ20

VSS

AJ22

VSS

AJ23

VSS

AJ26

VSS

AJ28

VSS

AJ32

VSS

AJ34

VSS

AT5

VSS

AJ4

VSS

AK12

VSS

AM41

VSS

AN19

VSS

AK26

VSS

AK22

VSS

AK23

VSS

AK28

VSS

IBEXPEAK-M -GP-NF

8 OF 10

4

AK30

VSS

AK31

VSS

AK32

VSS

AK34

VSS

AK35

VSS

AK38

VSS

AK43

VSS

AK46

VSS

AK49

VSS

AK5

VSS

AK8

VSS

AL2

VSS

AL52

VSS

AM11

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BB44

VSS

AD24

VSS

AM20

VSS

AM22

VSS

AM24

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AM26

VSS

AM28

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BA42

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AM30

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AM31

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AM32

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AM34

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AM35

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AM38

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AM39

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AM42

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AU20

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AM46

VSS

AV22

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AM49

VSS

AM7

VSS

AA50

VSS

BB10

VSS

AN32

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AN50

VSS

AN52

VSS

AP12

VSS

AP42

VSS

AP46

VSS

AP49

VSS

AP5

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AP8

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AR2

VSS

AR52

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AT11

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BA12

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AH48

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AT32

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AT36

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AT41

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AT47

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AT7

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AV12

VSS

AV16

VSS

AV20

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AV24

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AV30

VSS

AV34

VSS

AV38

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AV42

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AV46

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AV49

VSS

AV5

VSS

AV8

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AW14

VSS

AW18

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AW2

VSS

BF9

VSS

AW32

VSS

AW36

VSS

AW40

VSS

AW52

VSS

AY11

VSS

AY43

VSS

AY47

VSS

www.vinafix.vn

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B11

VSS

B15

VSS

B19

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B23

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B31

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B35

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B39

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B43

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B47

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B7

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BG12

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BB12

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BB16

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BB30

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BB34

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BB38

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BB42

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BB49

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BB5

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BC10

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BC14

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BC18

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BC2

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BC22

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BC32

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BC36

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BC40

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BC44

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BC52

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BH9

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BD48

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BD49

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BD5

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BE12

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BE16

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BE20

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BE24

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BE30

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BE34

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BE38

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BE42

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BE46

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BE48

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BE50

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BE6

VSS

BE8

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BF3

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BF49

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BF51

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BG18

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BG24

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BG4

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BH15

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BH19

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BH23

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BH31

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BH35

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BH39

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BH43

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BH47

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BH7

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C12

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C50

VSS

D51

VSS

E12

VSS

E16

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E20

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E24

VSS

E30

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E34

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E38

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E42

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E46

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E6

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F49

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F5

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G14

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G22

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G32

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G36

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G40

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G44

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G52

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AF39

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H16

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H20

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H30

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H34

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H38

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H42

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IBEXPEAK-M -GP-NF

3

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VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

H49 H5 J24 K11 K43 K47 K7 L14 L18 L2 L22 L32 L36 L40 L52 M12 M16 M20 N38 M34 M38 M42 M46 M49 M5 M8 N24 P11 AD15 P22 P30 P32 P34 P42 P45 P47 R2 R52 T12 T41 T46 T49 T5 T8 U30 U31 U32 U34 P38 V11 P16 V19 V20 V22 V30 V31 V32 V34 V35 V38 V43 V45 V46 V47 V49 V5 V7 V8 W2 W52 Y11 Y12 Y15 Y19 Y23 Y28 Y30 Y31 Y32 Y38 Y43 Y46 P49 Y5 Y6 Y8 P24 T43 AD51 AT8 AD47 Y47 AT12 AM6 AT13 AM5 AK45 AK39 AV14

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document N umber Rev

Date: Sheet of

2

Date: Sheet of

Berry

Taipei Hsien 221, Taiwan, R.O.C.

PCH (VSS)

1

A00

28 92W ednesday, February 10, 2010

A00

Dell N5010 Schematics

Specifications and Main Features

Frequently Asked Questions

User Manual