Dell INSPIRON ONE 2320 Schematic

5

www.teknisi-indonesia.com

IPPSB-FA

PAGE

D D

C C

B B

01 02 03

04~09

10 11 12 13 PLTRST_CPU# & SMbus

14 15~16 17~25 27~28 29~30 31~32 33~35

36 37~38

39

40

41

42 43~44

45

46

47

48

49

50

51

52

53

54

55

56

57

58 59~61

62 63~64

65 66~67

68

69 70~71

72

73

74

75

76

77 MXM.NVVDD

78 Card Reader RTS5139-GR

TITLE

BLOCK DIAGRAM POWER FLOW POWER SEQUENCE CPU_LGA1155_DDR3_A 1-6 DDR3 CHANNEL A_G/F DDR3 CHANNEL B_G/F DDR3 TERMINATION A&B

Converter Controllor LVDS&AV CONN INTEL_PCH 1-9 LAN CODEC&CONN AMP&SWITCH USB&HUB&BT HPD_DET MINI CARD(WL&TVT&DMC) Misc. conn&Touch&Wcam&RTC FAN PWR LED & Button* IR LEDs EC 8519 SM BUS & SPI ROM SCREW HOLE UVP, OVP & +19VSB LOAD_SWITCH +3P3VSB&+5VSB +1P5V_DUAL & +1P2V Current Monitor +12V & +1P8V +1P05V_CPUIO&+0P925V_SA POWER_PROTECT +1P05V_CPUIO CAP +VTT_DDR +V_AXG DRIVER +VCORE CONTROLLER +VCORE CAP +1P05V&+1P05V_PCH CPU&PCH XDP DEBUG CONNECTOR VGA CONN GPU DDR3 VGA-N12P_STRAPPING+EEPROM MXM.VGA-N12P_Xtal/Thermal GPU HDMI(DMC&AV) GPU CTRL GPU.VGA_N12P_PCI-E I/F GPU PCI-E_LVDS_VGA MXM.GPU Discharge GPU_POWER&GND

EDP CH751179

4

LVDSpanel

Nvidia N12P/N12M

HDMI

LVDS

AV Board

Option

EDID rom

HDMI

Real USB 4 rear PORTS

Side USB 2 side PORTS

webcam + Dmic

PS8615

Touch

EDID rom

Card reader

Realtek/RTS5139

WLAN SLOT + BT

Realtek 8111E

GBE

IR learning/receiver /blaster

XDP

Debug port

3

100MHz

PCI-E BUS

USB 2.0

480Mb/s

USB 2.0

480Mb/s

USB 2.0

480Mb/s

USB 2.0

480Mb/s

USB 2.0

480Mb/s

USB 2.0

480Mb/s

PCIE BUS

100MHz

eDP

PCIE BUS

100MHz

Intel Processor

Sandy Bridge

LGA-1155 Pin Socket

FDI LINK

INTEL

Cougar Point

PCH

H61

942 Pin

27mm X 27mm

33MHz

LPC BUS

45W/65W

DMI

LPC BUS

33MHz

EC

IT8519E

Channel A

Channel B

3Gbps

SATA BUS

SPI

HDA

PCIE BUS

100MHz

2

Dual-Channel Memory x 2 Slots

DDR3 1066/1333

SATA0

SATA1

SPI FLASH

AUDIO CODEC ALC269Q-VA6

Mic

MINI SOLT(TVT)

Line-out

32MB

Option

AV Board

Audio Switch

1

AMP

TPA3110D2

SPK

A A

5

4

3

PEGATRON DT-MB RESTRICTED SECRET

PEGATRON C ORPORATION

Size Project Name

A2

Date: Sheet of

2

Date: Sheet of

IPPSB-FA

1

Title :

Engineer:

BLOVK DIAGRAM

Jerry Chung

1 79Tuesday, April 26, 2011

Rev

1.01

5

www.teknisi-indonesia.com

Adapter

+19VA_VIN

D D

+19VA

OVP/UVP

+19VSB_R

INA199A3

Current Monitor

+19VSB

4

+1P05V_CPUIO

SUSB#_PWR

+1P05V_PCH_PWRGD

+5V_DUAL

3

NCP6121S52MNR2G IRFH7914PBF*1+NTMFS4839NHT1G*2 (3-phase)

IRFH7914PBF*2+NTMFS4839NHT1G*2 (1-phase)

RT8204LGQW IRF8707PBF*1+IRF8707PBF*1

RT8204LGQW IRF8707PBF*1+IRFH7914*2

2

18.3A

+1P05V_CPUIO_PWRGD

22.66A

IPDH6N03LAG

RT9045GSP

1

+VCORE

S0/S1

75A

+V_AXG

S0/S1

35A

+12V

3.3A

S0/S1

+1P05V_CPUIO

9.5A

+0P925V_SA

8.8A

+1P5V_DUAL

13.75A

+VTTDDR

1.5A

S0/S1

S0/S1/S3

www.rosefix.com

SUSB#_PWR

C C

+1P05V

10.03A

NVVDD_PWRGD

RT8204LGQW IRF8707PBF*1+IRF8707PBF*2

IRF8707PBF

+1P5V

1.5A

+1P5V_GPU

5.91A

+1P05_PCH

6.2A

+1P05V

S0/S1

3.83A

RT8208AGQW

+3P3V_GPU

TPS51125ARGER IRFH7914PBF*1+NTMFS4839NHT1G*1

B B

IRFH7914PBF*1+NTMFS4839NHT1G*2

+1P5V_GPU

31.56A

IPDH6N03LAG

NVVDD

31.56A

+3P3VSB16.63A

5.67A

+1P8V_FSR

2.5A

+1P8V

0.3A

SUSB#_PWR

SUSC#_PWR

IRFH7914PBF*1+NTMFS4839NHT1G*1

A A

Power Rail

SPDT Linear

Control signal

5

Switching

4

3

SUSC#_PWR

SUSB#_PWR

IRF8707PBF

IRF8707PBF*2

IRF8707PBF

2

0413

PEGATRO N CORPORATION

Size Project Name

A3

Date: Sheet of

IPPSB-FA

+3P3V

4.43A

+3P3V_GPU

1.38A

+3P3V_DUAL

2.35A

+5VSB18.07A

1.57A

+5V_DUAL

10A

6.5A

Title :

Engineer:

1

S0/S1

S0 ~ S5

S0/S1/S3

S0 ~ S5

S0/S1/S3

+5V

POWER FLOW

XXXX-XX

2 79Tuesday, April 26, 2011

S0/S1

Rev

1.01

5

www.teknisi-indonesia.com

4

3

2

1

+19VSB

TPS51125

+5VA +3VA

D D

+3VA_EC

ENTRIP1

TPS51125

ENTRIP2

+3P3VSB

+3VA_EC

1

VSUS_ON

3

SUS_PWRGD

4

+5VSB

SUSC#_PWR

www.rosefix.com

C C

+12VSUS

+5V_DUAL

+3P3V_DUAL

+5VO

+3VO

UMC4N

5903 NMOS

AND

1Kohm

11

ALL_SYSTEM_PWRGD

+1P5V_DUAL

8202

+VTT_DDR

+1P1VSB_USB

LIN REG.

RT9045

+1P5V_DUAL_PWRGD

SUSB#_PWR

1Kohm

Reset circuit

SUSC_EC#

9

SUSB_EC#

10

1-1

WRST#

2

EC IT8519E

ALL_SYSTEM_PWRGD

PWR_SW#

6

5

1-2

PCH_PWROK

PM_PWRBTN#

PM_RSMRST#

DPWROK

14

PWROK

Power Button

PWRBTN#

RSMRST#

DPWROK

Cougar Point

APWROK PWROK

SYS_PWROK

DRAMPWROK

15

7

8

Intel

PCH

16

SLP_S4#

SLP_S3#

SLP_S4#

PLTRST#

PROCPWRGD

CPUPWRGD

LAN XDP EC etc.

PLTRST#

3.3V TO 1.1V SHIFTER

DRAM_PWROK

+12V

B B

+12VSUS

+5V

+3P3V

+1P8V_SFR

+1P5V

+10P5V_PCH

+5VO

+3VO

+1.8V

4502

5903 NMOS

2304 NMOS

9024 LIN REG.

17

SYS_PWROK

SM_DRAMPWROK

Sandy Bridge

UNCOREPWRGOOD

RESET#

PLTRST_CPU#

18

+10P5V_CPUIO

+0P925V_SA

A A

+V_AXG

5

+1.8V

9026 LDO

+1P05V_PCH_PWRGD

+1P05V_CPUIO_PWRGD

CPU_VRON

VR_ON

Vcore

PGOOD

4

12

VRM_PWRGD

13

0413

Title :

POWER SEQUENCE

Title :

POWER SEQUENCE

Title :

POWER SEQUENCE

Mike Yen

Engineer:

PEGATRO N CORPORATION

Size Project Name

A3

Date: Sheet of

3

2

Date: Sheet of

IPPSB-FA

Engineer:

Mike Yen

3 79Tuesday, April 26, 2011

1

3 79Tuesday, April 26, 2011

Rev

1.01

5

www.teknisi-indonesia.com

M_CHA_D Q[0..63][10]

M_CHA_D QS0[10] M_CHA_D QS0#[10]

D D

M_CHA_D QS1[10] M_CHA_D QS1#[10]

M_CHA_D QS2[10] M_CHA_D QS2#[10]

C C

B B

A A

5

M_CHA_D QS3[10] M_CHA_D QS3#[10]

M_CHA_D QS4[10] M_CHA_D QS4#[10]

M_CHA_D QS5[10] M_CHA_D QS5#[10]

M_CHA_D QS6[10] M_CHA_D QS6#[10]

M_CHA_D QS7[10] M_CHA_D QS7#[10]

4

XU1A

M_CHA_D QS0 M_CHA_D QS0#

M_CHA_D Q0 M_CHA_D Q1 M_CHA_D Q2 M_CHA_D Q3 M_CHA_D Q4 M_CHA_D Q5 M_CHA_D Q6 M_CHA_D Q7

M_CHA_D QS1 M_CHA_D QS1#

M_CHA_D Q8 M_CHA_D Q9 M_CHA_D Q10 M_CHA_D Q11 M_CHA_D Q12 M_CHA_D Q13 M_CHA_D Q14 M_CHA_D Q15

M_CHA_D QS2 M_CHA_D QS2#

M_CHA_D Q16 M_CHA_D Q17 M_CHA_D Q18

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4

M_CHA_D Q19 M_CHA_D Q20 M_CHA_D Q21 M_CHA_D Q22 M_CHA_D Q23

M_CHA_D QS3 M_CHA_D QS3#

M_CHA_D Q24 M_CHA_D Q25 M_CHA_D Q26 M_CHA_D Q27 M_CHA_D Q28 M_CHA_D Q29 M_CHA_D Q30 M_CHA_D Q31

M_CHA_D QS4 M_CHA_D QS4#

M_CHA_D Q32 M_CHA_D Q33 M_CHA_D Q34 M_CHA_D Q35 M_CHA_D Q36 M_CHA_D Q37 M_CHA_D Q38 M_CHA_D Q39

M_CHA_D QS5 M_CHA_D QS5#

M_CHA_D Q40 M_CHA_D Q41 M_CHA_D Q42 M_CHA_D Q43 M_CHA_D Q44 M_CHA_D Q45 M_CHA_D Q46 M_CHA_D Q47

M_CHA_D QS6 M_CHA_D QS6#

M_CHA_D Q48 M_CHA_D Q49 M_CHA_D Q50 M_CHA_D Q51 M_CHA_D Q52 M_CHA_D Q53 M_CHA_D Q54 M_CHA_D Q55

M_CHA_D QS7 M_CHA_D QS7#

M_CHA_D Q56 M_CHA_D Q57 M_CHA_D Q58 M_CHA_D Q59 M_CHA_D Q60 M_CHA_D Q61 M_CHA_D Q62 M_CHA_D Q63

AK3 AK2

AJ3 AJ4 AL3 AL4 AJ2 AJ1 AL2 AL1

AP3 AP2

AN1 AN4 AR3 AR4 AN2 AN3 AR2 AR1

AW4

AV4

AV2

AW3

AV5

AW5

AU2 AU3 AU5 AY5

AV8

AW8

AY7 AU7 AV9 AU9

AV7 AW7 AW9

AY9

AV37 AV36

AU35

AW37

AU39 AU36

AW35

AY36 AU38 AU37

AP38 AP39

AR40 AR37 AN38 AN37 AR39 AR38 AN39 AN40

AK38 AK39

AL40 AL37 AJ38 AJ37 AL39 AL38 AJ39 AJ40

AF38 AF39

AG40 AG37 AE38 AE37 AG39 AG38 AE39 AE40

SA_DQS_0 SA_DQS#_0

SA_DQ_0 SA_DQ_1 SA_DQ_2 SA_DQ_3 SA_DQ_4 SA_DQ_5 SA_DQ_6 SA_DQ_7

SA_DQS_1 SA_DQS#_1

SA_DQ_8 SA_DQ_9 SA_DQ_10 SA_DQ_11 SA_DQ_12 SA_DQ_13 SA_DQ_14 SA_DQ_15

SA_DQS_2 SA_DQS#_2

SA_DQ_16 SA_DQ_17 SA_DQ_18 SA_DQ_19 SA_DQ_20 SA_DQ_21 SA_DQ_22 SA_DQ_23

SA_DQS_3 SA_DQS#_3

SA_DQ_24 SA_DQ_25 SA_DQ_26 SA_DQ_27 SA_DQ_28 SA_DQ_29 SA_DQ_30 SA_DQ_31

SA_DQS_4 SA_DQS#_4

SA_DQ_32 SA_DQ_33 SA_DQ_34 SA_DQ_35 SA_DQ_36 SA_DQ_37 SA_DQ_38 SA_DQ_39

SA_DQS_5 SA_DQS#_5

SA_DQ_40 SA_DQ_41 SA_DQ_42 SA_DQ_43 SA_DQ_44 SA_DQ_45 SA_DQ_46 SA_DQ_47

SA_DQS_6 SA_DQS#_6

SA_DQ_48 SA_DQ_49 SA_DQ_50 SA_DQ_51 SA_DQ_52 SA_DQ_53 SA_DQ_54 SA_DQ_55

SA_DQS_7 SA_DQS#_7

SA_DQ_56 SA_DQ_57 SA_DQ_58 SA_DQ_59 SA_DQ_60 SA_DQ_61 SA_DQ_62 SA_DQ_63

SOCKET_ 1155P

I

3

SM_DRAMRST#

SA_ECC_CB_0 SA_ECC_CB_1 SA_ECC_CB_2 SA_ECC_CB_3 SA_ECC_CB_4 SA_ECC_CB_5 SA_ECC_CB_6 SA_ECC_CB_7

DDR3_A

3

SA_MA_0 SA_MA_1 SA_MA_2 SA_MA_3 SA_MA_4 SA_MA_5 SA_MA_6 SA_MA_7 SA_MA_8

SA_MA_9 SA_MA_10 SA_MA_11 SA_MA_12 SA_MA_13 SA_MA_14 SA_MA_15

SA_WE# SA_CAS# SA_RAS#

SA_BS_0 SA_BS_1 SA_BS_2

SA_CS#_0 SA_CS#_1 SA_CS#_2 SA_CS#_3

SA_CKE_0 SA_CKE_1 SA_CKE_2 SA_CKE_3

SA_ODT_0 SA_ODT_1 SA_ODT_2 SA_ODT_3

SA_CK_0

SA_CK#_0

SA_CK_1

SA_CK#_1

SA_CK_2

SA_CK#_2

SA_CK_3

SA_CK#_3

SA_DQS_8

SA_DQS#_8

M_CHA_M AA0

AV27

M_CHA_M AA1

AY24

M_CHA_M AA2

AW24

M_CHA_M AA3

AW23

M_CHA_M AA4

AV23

M_CHA_M AA5

AT24

M_CHA_M AA6

AT23

M_CHA_M AA7

AU22

M_CHA_M AA8

AV22

M_CHA_M AA9

AT22

M_CHA_M AA10

AV28

M_CHA_M AA11

AU21

M_CHA_M AA12

AT21

M_CHA_M AA13

AW32

M_CHA_M AA14

AU20

M_CHA_M AA15

AT20

AW29 AV30 AU28

AY29 AW28 AV20

AU29 AV32 AW30 AU33

AV19 AT19 AU18 AV18

AV31 AU32 AU30 AW33

AY25 AW25 AU24 AU25 AW27 AY27 AV26 AW26

VP

HR1

SM_DRAM RST#

AW18

AV13 AV12

AU12

NOTE:

AU14 AW13

Sugar Bay platform does not support ECC

AY13 AU13 AU11 AY12 AW12

HR1

1 2

0

2

M_CHA_M AA[0..15] [10]

M_CHA_W E# [10] M_CHA_C AS# [10] M_CHA_R AS# [10]

M_CHA_B A0 [10] M_CHA_B A1 [10] M_CHA_B A2 [10]

M_CHA_C S#0 [10] M_CHA_C S#1 [10]

M_CHA_C KE0 [10] M_CHA_C KE1 [10]

M_CHA_O DT0 [10] M_CHA_O DT1 [10]

M_CHA_C LK0 [10] M_CHA_C LK0# [10] M_CHA_C LK1 [10] M_CHA_C LK1# [10]

12

NI

HC1

HC1 Do Not Stuff

Do Not Stuff

X7R 10%

GND

2

1

DDR3_DR AMRST# [10,11]

PEGATRON DT-MB RESTRICTED SECRET

Title :

Engineer:

PEGATRO N CORPORATION

Size Project Name

A3

Date: Sheet of

Engineer:

IPPSB-FA

1

DDR3_A 1-6

Mike Yen

4 79Wednesd ay, April 27, 2011

Rev

1.01

5

www.teknisi-indonesia.com

M_CHB_D Q[0..63][11]

M_CHB_D QS0[11] M_CHB_D QS0#[11]

D D

M_CHB_D QS1[11] M_CHB_D QS1#[11]

M_CHB_D QS2[11] M_CHB_D QS2#[11]

C C

M_CHB_D QS3[11] M_CHB_D QS3#[11]

M_CHB_D QS4[11] M_CHB_D QS4#[11]

B B

A A

5

M_CHB_D QS5[11] M_CHB_D QS5#[11]

M_CHB_D QS6[11] M_CHB_D QS6#[11]

M_CHB_D QS7[11] M_CHB_D QS7#[11]

4

XU1B

M_CHB_D QS0 M_CHB_D QS0#

M_CHB_D Q0 M_CHB_D Q1 M_CHB_D Q2 M_CHB_D Q3 M_CHB_D Q4 M_CHB_D Q5 M_CHB_D Q6 M_CHB_D Q7

M_CHB_D QS1 M_CHB_D QS1#

M_CHB_D Q13 M_CHB_D Q9 M_CHB_D Q11 M_CHB_D Q15 M_CHB_D Q12 M_CHB_D Q8 M_CHB_D Q14 M_CHB_D Q10

M_CHB_D QS2 M_CHB_D QS2#

M_CHB_D Q16 M_CHB_D Q17

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4

M_CHB_D Q18 M_CHB_D Q19 M_CHB_D Q20 M_CHB_D Q21 M_CHB_D Q22 M_CHB_D Q23

M_CHB_D QS3 M_CHB_D QS3#

M_CHB_D Q24 M_CHB_D Q25 M_CHB_D Q26 M_CHB_D Q27 M_CHB_D Q28 M_CHB_D Q29 M_CHB_D Q30 M_CHB_D Q31

M_CHB_D QS4 M_CHB_D QS4#

M_CHB_D Q32 M_CHB_D Q33 M_CHB_D Q34 M_CHB_D Q35 M_CHB_D Q36 M_CHB_D Q37 M_CHB_D Q38 M_CHB_D Q39

M_CHB_D QS5 M_CHB_D QS5#

M_CHB_D Q40 M_CHB_D Q41 M_CHB_D Q42 M_CHB_D Q43 M_CHB_D Q44 M_CHB_D Q45 M_CHB_D Q46 M_CHB_D Q47

M_CHB_D QS6 M_CHB_D QS6#

M_CHB_D Q48 M_CHB_D Q52 M_CHB_D Q55 M_CHB_D Q51 M_CHB_D Q54 M_CHB_D Q49 M_CHB_D Q53 M_CHB_D Q50

M_CHB_D QS7 M_CHB_D QS7#

M_CHB_D Q56 M_CHB_D Q57 M_CHB_D Q58 M_CHB_D Q59 M_CHB_D Q60 M_CHB_D Q61 M_CHB_D Q62 M_CHB_D Q63

AH7 AH6

AG7 AG8

AG5 AG6

AM8 AL8

AL7 AM7

AM10

AL10

AL6 AM6 AL9 AM9

AR8 AP8

AP7 AR7

AP10

AR10

AP6 AR6 AP9 AR9

AN13 AN12

AM12 AM13

AR13 AP13

AL12

AL13 AR12 AP12

AN29 AN28

AR28 AR29

AL28

AL29 AP28 AP29

AM28 AM29

AP33 AR33

AP32 AP31 AP35 AP34 AR32 AR31 AR35 AR34

AL33

AM33

AM32 AM31

AL35

AL32

AM34

AL31

AM35

AL34

AG35 AG34

AH35 AH34 AE34 AE35

AJ35

AJ34 AF33 AF35

AJ9 AJ8

AJ6 AJ7

SB_DQS_0 SB_DQS#_0

SB_DQ_0 SB_DQ_1 SB_DQ_2 SB_DQ_3 SB_DQ_4 SB_DQ_5 SB_DQ_6 SB_DQ_7

SB_DQS_1 SB_DQS#_1

SB_DQ_8 SB_DQ_9 SB_DQ_10 SB_DQ_11 SB_DQ_12 SB_DQ_13 SB_DQ_14 SB_DQ_15

SB_DQS_2 SB_DQS#_2

SB_DQ_16 SB_DQ_17 SB_DQ_18 SB_DQ_19 SB_DQ_20 SB_DQ_21 SB_DQ_22 SB_DQ_23

SB_DQS_3 SB_DQS#_3

SB_DQ_24 SB_DQ_25 SB_DQ_26 SB_DQ_27 SB_DQ_28 SB_DQ_29 SB_DQ_30 SB_DQ_31

SB_DQS_4 SB_DQS#_4

SB_DQ_32 SB_DQ_33 SB_DQ_34 SB_DQ_35 SB_DQ_36 SB_DQ_37 SB_DQ_38 SB_DQ_39

SB_DQS_5 SB_DQS#_5

SB_DQ_40 SB_DQ_41 SB_DQ_42 SB_DQ_43 SB_DQ_44 SB_DQ_45 SB_DQ_46 SB_DQ_47

SB_DQS_6 SB_DQS#_6

SB_DQ_48 SB_DQ_49 SB_DQ_50 SB_DQ_51 SB_DQ_52 SB_DQ_53 SB_DQ_54 SB_DQ_55

SB_DQS_7 SB_DQS#_7

SB_DQ_56 SB_DQ_57 SB_DQ_58 SB_DQ_59 SB_DQ_60 SB_DQ_61 SB_DQ_62 SB_DQ_63

DDR3_B

SOCKET_ 1155P

I

3

SB_MA_0 SB_MA_1 SB_MA_2 SB_MA_3 SB_MA_4 SB_MA_5 SB_MA_6 SB_MA_7 SB_MA_8

SB_MA_9 SB_MA_10 SB_MA_11 SB_MA_12 SB_MA_13 SB_MA_14 SB_MA_15

SA_CK[2]

SA_CK[1]

SA_ODT[2]

SB_BS_0 SB_BS_1 SB_BS_2

SB_CS#_0 SB_CS#_1 SB_CS#_2 SB_CS#_3

SB_CKE_0 SB_CKE_1 SB_CKE_2 SB_CKE_3

SB_ODT_0 SB_ODT_1 SB_ODT_2 SB_ODT_3

SB_CK_0 SB_CK#_0

SB_CK_1 SB_CK#_1

SB_CK_2 SB_CK#_2

SB_CK_3 SB_CK#_3

SB_DQS_8

SB_DQS#_8

SB_ECC_CB_0 SB_ECC_CB_1 SB_ECC_CB_2 SB_ECC_CB_3 SB_ECC_CB_4 SB_ECC_CB_5 SB_ECC_CB_6 SB_ECC_CB_7

3

M_CHB_M AA0

AK24

M_CHB_M AA1

AM20

M_CHB_M AA2

AM19

M_CHB_M AA3

AK18

M_CHB_M AA4

AP19

M_CHB_M AA5

AP18

M_CHB_M AA6

AM18

M_CHB_M AA7

AL18

M_CHB_M AA8

AN18

M_CHB_M AA9

AY17

M_CHB_M AA10

AN23

M_CHB_M AA11

AU17

M_CHB_M AA12

AT18

M_CHB_M AA13

AR26

M_CHB_M AA14

AY16

M_CHB_M AA15

AV16

AR25 AK25 AP24

AP23 AM24 AW17

AN25 AN26 AL25 AT26

AU16 AY15 AW15 AV15

AL26 AP26 AM26 AK26

AL21 AL22 AL20 AK20 AL23 AM22 AP21 AN21

AN16 AN15

AL16

NOTE:

AM16 AP16

Sugar Bay platform does not support ECC

AR16 AL15 AM15 AR15 AP15

2

M_CHB_M AA[0..15] [11]

M_CHB_W E# [11] M_CHB_C AS# [11] M_CHB_R AS# [11]

M_CHB_B A0 [11] M_CHB_B A1 [11] M_CHB_B A2 [11]

M_CHB_C S#0 [11] M_CHB_C S#1 [11]

M_CHB_C KE0 [11] M_CHB_C KE1 [11]

M_CHB_O DT0 [11] M_CHB_O DT1 [11]

M_CHB_C LK0 [11] M_CHB_C LK0# [11] M_CHB_C LK1 [11] M_CHB_C LK1# [11]

2

1

PEGATRON DT-MB RESTRICTED SECRET

Title :

Engineer:

PEGATRO N CORPORATION

Size Project Name

A3

Date: Sheet of

Engineer:

IPPSB-FA

1

DDR3_B 2-6

Mike Yen

5 79Wednesd ay, April 27, 2011

Rev

1.01

5

www.teknisi-indonesia.com

4

3

2

1

PEG_RXP [0..15][73]

PEG_RXN [0..15][73]

PEG_RXP0 PEG_TXP0

PEG_RXP 0

PEG_RXN0

PEG_RXN 0

PEG_RXP1

PEG_RXP 1

PEG_RXN1

D D

C C

DMI_RXP0[18] DMI_RXN0[18]

DMI_RXP1[18] DMI_RXN1[18]

DMI_RXP2[18] DMI_RXN2[18]

B B

A A

DMI_RXP3[18] DMI_RXN3[18]

NOBOM

PEG_RXN 1

PEG_RXP2

PEG_RXP 2

PEG_RXN2

PEG_RXN 2

PEG_RXP3

PEG_RXP 3

PEG_RXN3

PEG_RXN 3

PEG_RXP4

PEG_RXP 4

PEG_RXN4

PEG_RXN 4

PEG_RXP5

PEG_RXP 5

PEG_RXN5

PEG_RXN 5

PEG_RXP6

PEG_RXP 6

PEG_RXN6

PEG_RXN 6

PEG_RXP7

PEG_RXP 7

PEG_RXN7

PEG_RXN 7

PEG_RXP8

PEG_RXP 8

PEG_RXN8

PEG_RXN 8

PEG_RXP9

PEG_RXP 9

PEG_RXN9

PEG_RXN 9

PEG_RXP10

PEG_RXP 10

PEG_RXN10

PEG_RXN 10

PEG_RXP11

PEG_RXP 11

PEG_RXN11

PEG_RXN 11

PEG_RXP12

PEG_RXP 12

PEG_RXN12

PEG_RXN 12

PEG_RXP13

PEG_RXP 13

PEG_RXN13

PEG_RXN 13

PEG_RXP14

PEG_RXP 14

PEG_RXN14

PEG_RXN 14

PEG_RXP15

PEG_RXP 15

PEG_RXN15

PEG_RXN 15

HT26

1

HT27

1

HT28

1

5

XU1C

B11

PEG_RX_0

B12

PEG_RX#_0

D12

PEG_RX_1

D11

PEG_RX#_1

C10

PEG_RX_2

C9

PEG_RX#_2

E10

PEG_RX_3

E9

PEG_RX#_3

B8

PEG_RX_4

B7

PEG_RX#_4

C6

PEG_RX_5

C5

PEG_RX#_5

A5

PEG_RX_6

A6

PEG_RX#_6

E2

PEG_RX_7

E1

PEG_RX#_7

F4

PEG_RX_8

F3

PEG_RX#_8

G2

PEG_RX_9

G1

PEG_RX#_9

H3

PEG_RX_10

H4

PEG_RX#_10

J1

PEG_RX_11

J2

PEG_RX#_11

K3

PEG_RX_12

K4

PEG_RX#_12

L1

PEG_RX_13

L2

PEG_RX#_13

M3

PEG_RX_14

M4

PEG_RX#_14

N1

PEG_RX_15

N2

PEG_RX#_15

W5

DMI_RX_0

W4

DMI_RX#_0

V3

DMI_RX_1

V4

DMI_RX#_1

Y3

DMI_RX_2

Y4

DMI_RX#_2

AA4

DMI_RX_3

AA5

DMI_RX#_3

P3

PE_RX_0

P4

PE_RX#_0

R2

PE_RX_1

R1

PE_RX#_1

T4

PE_RX_2

T3

PE_RX#_2

U2

PE_RX_3

U1

PE_RX#_3

SOCKET_ 1155P

I

Processor PCI Express* Receive/ Transmit Differential Pair. These signals are available for Workstation only.

PEG

DMI

GEN

PEG_TX_0

PEG_TX#_0

PEG_TX_1

PEG_TX#_1

PEG_TX_2

PEG_TX#_2

PEG_TX_3

PEG_TX#_3

PEG_TX_4

PEG_TX#_4

PEG_TX_5

PEG_TX#_5

PEG_TX_6

PEG_TX#_6

PEG_TX_7

PEG_TX#_7

PEG_TX_8

PEG_TX#_8

PEG_TX_9

PEG_TX#_9

PEG_TX_10

PEG_TX#_10

PEG_TX_11

PEG_TX#_11

PEG_TX_12

PEG_TX#_12

PEG_TX_13

PEG_TX#_13

PEG_TX_14

PEG_TX#_14

PEG_TX_15

PEG_TX#_15

DMI_TX_0

DMI_TX#_0

DMI_TX_1

DMI_TX#_1

DMI_TX_2

DMI_TX#_2

DMI_TX_3

DMI_TX#_3

PEG_ICOMPO

PEG_RCOMPO

PEG_COMPI

PE_TX_0

PE_TX#_0

PE_TX_1

PE_TX#_1

PE_TX_2

PE_TX#_2

PE_TX_3

PE_TX#_3

C13 C14

E14 E13

G14 G13

F12 F11

J14 J13

D8 D7

D3 C3

E6 E5

F8 F7

G10 G9

G5 G6

K7 K8

J5 J6

M8 M7

L6 L5

N5 N6

V7 V6

W7 W8

Y6 Y7

AA7 AA8

B5 C4 B4

P8 P7

T7 T8

R6 R5

U5 U6

4

PEG_TXP 0

PEG_TXN0

PEG_TXN 0

PEG_TXP1

PEG_TXP 1

PEG_TXN1

PEG_TXN 1

PEG_TXP2

PEG_TXP 2

PEG_TXN2

PEG_TXN 2

PEG_TXP3

PEG_TXP 3

PEG_TXN3

PEG_TXN 3

PEG_TXP4

PEG_TXP 4

PEG_TXN4

PEG_TXN 4

PEG_TXP5

PEG_TXP 5

PEG_TXN5

PEG_TXN 5

PEG_TXP6

PEG_TXP 6

PEG_TXN6

PEG_TXN 6

PEG_TXP7

PEG_TXP 7

PEG_TXN7

PEG_TXN 7

PEG_TXP8

PEG_TXP 8

PEG_TXN8

PEG_TXN 8

PEG_TXP9

PEG_TXP 9

www.rosefix.com

PEG_TXN9

PEG_TXN 9

PEG_TXP10

PEG_TXP 10

PEG_TXN10

PEG_TXN 10

PEG_TXP11

PEG_TXP 11

PEG_TXN11

PEG_TXN 11

PEG_TXP12

PEG_TXP 12

PEG_TXN12

PEG_TXN 12

PEG_TXP13

PEG_TXP 13

PEG_TXN13

PEG_TXN 13

PEG_TXP14

PEG_TXP 14

PEG_TXN14

PEG_TXN 14

PEG_TXP15

PEG_TXP 15

PEG_TXN15

PEG_TXN 15

+1P05V_ CPUIO

12

HR3

24.9

1%

PEG_COM P

1%

SHORT B4 & C4 TOGETHER, ROUTE AS A SINGLE 4 MIL TRACE TO HR3.2 ROUTE B5 TO HR3.2 AS A SEPERATE 10 MIL TRACE

HT39

1

NOBOM

DMI_TXP0 [18] DMI_TXN0 [18]

DMI_TXP1 [18] DMI_TXN1 [18]

DMI_TXP2 [18] DMI_TXN2 [18]

DMI_TXP3 [18] DMI_TXN3 [18]

I

PEG_TXP [0..15] [73]

PEG_TXN [0..15] [73]

XU1D

+1P05V_ CPUIO

12

I

HR2

24.9

1%

FDI_COMP

AE2

FDI_COMPIO

AE1

FDI_ICOMPO

FDI

FDI_FSYNC_0[22] FDI_LSYNC_0[22]

FDI_FSYNC_1[22] FDI_LSYNC_1[22]

FDI_INT[22]

AC5

FDI_FSYNC_0

AC4

FDI_LSYNC_0

AE5

FDI_FSYNC_1

AE4

FDI_LSYNC_1

AG3

FDI_INT

SOCKET_ 1155P

I

FDI_TX_0

FDI_TX#_0

FDI_TX_1

FDI_TX#_1

FDI_TX_2

FDI_TX#_2

FDI_TX_3

FDI_TX#_3

FDI_TX_4

FDI_TX#_4

FDI_TX_5

FDI_TX#_5

FDI_TX_6

FDI_TX#_6

FDI_TX_7

FDI_TX#_7

AC8 AC7

AC2 AC3

AD2 AD1

AD4 AD3

AD7 AD6

AE7 AE8

AF3 AF2

AG2 AG1

FDI_TXP0 [22] FDI_TXN0 [22]

FDI_TXP1 [22] FDI_TXN1 [22]

FDI_TXP2 [22] FDI_TXN2 [22]

FDI_TXP3 [22] FDI_TXN3 [22]

FDI_TXP4 [22] FDI_TXN4 [22]

FDI_TXP5 [22] FDI_TXN5 [22]

FDI_TXP6 [22] FDI_TXN6 [22]

FDI_TXP7 [22] FDI_TXN7 [22]

PEGATRON DT-MB RESTRICTED SECRET

Title :

Engineer:

PEGATRO N CORPORATION

Size Project Name

A3

Date: Sheet of

3

2

Date: Sheet of

Engineer:

IPPSB-FA

1

PCIE/DMI/FDI 3-6

Mike Yen

6 79Wednesd ay, April 27, 2011

Rev

1.01

5

www.teknisi-indonesia.com

CK_100M _DMI[22] CK_100M _DMI#[22]

D D

VIDSCLK[58] VIDSOUT[58] VIDALERT#[58]

PLTRST_ CPU#[13] CPUPW RGD[20 ,64] DRAM_PW ROK[20]

C C

HR21 Do Not Stuff

1 2

NI

PECI_PCH[19]

H_PECI[4 3]

PROCHOT #[58]

H_THMTR IP#[19,54] PM_SYNC[19]

SKTOCC#[20 ] PROC_SE L[22]

NI

HR20 0

1 2

VP

CK_100M _CPU_XDP[64] CK_100M _CPU_XDP#[64]

+1P05V_ CPUIO

12

I

HR58

HR58 1K

1K

NI

HR5

HR5 Do Not Stuff

Do Not Stuff

1%

NOTE:

12

HR6

HR6 110

110

1%

12

CFG[2]: PCI Express* Static x16 Lane Numbering Reversal.

B B

+1P5V_D UAL

A A

- 1 = Normal operation

- 0 = Lane numbers reversed

CFG[0~15] is IPU

NOTE:

CFG6 CFG5

1 1

1 0

12

I

D3R39

D3R39 100

100

1%

12

I

D3R40

D3R40 100

100

1%

GND GND

0 1

0 0

H_DDR_V REF

12

I

D3CB17

0.1UF/16V

X7R 10%

5

CPU_CFG 0[64]

Description

X16(Default)

2X8

Reserved

X8, X4/X4

Place near CPU

12

I

HR7

HR7 75

75

1%

I

12

HR14

2.2K

4

W2 W1

C40 D40

Place HR57 near CPU 2"~3"

NOTE:

+1P5V_D UAL

12

I

www.rosefix.com

NOTE:

For VR Debug

NI

HR4

HR4 Do Not Stuff

Do Not Stuff

HR11

I

HR70

1 2

I

HR57

HR57 200

200

1%

1 2

44.2

1%

120

1%

H_VIDALER T#

SM_DPW ROK

12

NI

HR59

HR59 Do Not Stuff

Do Not Stuff

AJ19

C37 B37 A37

F36

J40

TBD: CRB 0.7 is NI

+1P05V_ CPUIO+1P8V_S FR

NI

HR16

HR16 Do Not Stuff

Do Not Stuff

GND

NOBOM

NOBOM NOBOM

NOBOM

4

12

HR17

HR17 Do Not Stuff

Do Not Stuff

NI

ST29

ST29 ST48

ST48

12

GNDGND

NOTE:

CRB UN-STUFF

12

NI

I

HR18

HR18 51

51

HR24Do No t StuffNIHR24Do No t Stuff

12

HR25Do No t StuffNIHR25Do No t Stuff

12

HR27Do No t StuffNIHR27Do No t Stuff

12

HR26Do No t StuffNIHR26Do No t Stuff

12

HR28Do No t StuffNIHR28Do No t Stuff

12

HR29Do No t StuffNIHR29Do No t Stuff

12

HR30Do No t StuffNIHR30Do No t Stuff

12

HR32Do No t StuffNIHR32Do No t Stuff

12

HR31Do No t StuffNIHR31Do No t Stuff

12

HR33Do No t StuffNIHR33Do No t Stuff

12

HR34Do No t StuffNIHR34Do No t Stuff

12

HR35Do No t StuffNIHR35Do No t Stuff

12

HR37Do No t StuffNIHR37Do No t Stuff

12

HR36Do No t StuffNIHR36Do No t Stuff

12

HR39Do No t StuffNIHR39Do No t Stuff

12

HR38Do No t StuffNIHR38Do No t Stuff

12

1 1

NI

HR19

HR19 Do Not Stuff

Do Not Stuff

H_PECI_R CATERR_ R#

H_DDR_V REF

PROC_SE L

NI

H_CFG1

NI

H_CFG2

NI

H_CFG3

NI

H_CFG4

NI

H_CFG5

NI

H_CFG6

NI

H_CFG7

NI

H_CFG8

NI

H_CFG9

NI

H_CFG10

NI

H_CFG11

NI

H_CFG12

NI

H_CFG13

NI

H_CFG14

NI

H_CFG15

NI

H_CFG16 _SNB_PCUSTB0 H_CFG17 _SNB_PCUSTB1

E37 H34 G35 E38

AJ22

AJ33

K32

H36

K36

N35

M36

M38 N36 N38 N39 N37 N40

G37 G36

AT14

AY3

J35

J36 J37

L36

L37

J38 L35

H7 H8

3

XU1E

BCLK_0 BCLK#_0

RSVD_001 RSVD_002

VIDSCLK VIDSOUT VIDALERT#

RESET# UNCOREPWRGOOD SM_DRAMPWROK

PECI CATERR# PROCHOT# THERMTRIP# PM_SYNC

SM_VREF

SKTOCC# PROC_SEL

CFG_0 CFG_1 CFG_2 CFG_3 CFG_4 CFG_5 CFG_6 CFG_7 CFG_8 CFG_9 CFG_10 CFG_11 CFG_12 CFG_13 CFG_14 CFG_15

CFG_16 CFG_17

RSVD_016

RSVD_023

RSVD_028 RSVD_029

SOCKET_ 1155P

I

3

MISC

VCCSA_VID

VCCSA_SENSE

VCC_SENSE

VSS_SENSE

VCCIO_SENSE VSSIO_SENSE

VCCAXG_SENSE VSSAXG_SENSE

VCCP_SELECT

TDO

TCK TMS

TRST#

PRDY# PREQ#

DBR#

BPM#_0 BPM#_1 BPM#_2 BPM#_3 BPM#_4 BPM#_5 BPM#_6 BPM#_7

RSVD_024 RSVD_030 RSVD_037 RSVD_036 RSVD_033

RSVD_040 RSVD_039

RSVD_018 RSVD_020

RSVD_038 RSVD_032 RSVD_034

RSVD_035

RSVD_050 RSVD_053

RSVD_051 RSVD_052

2

P34 T2

A36 B36

AB4 AB3

L32 M32

+5V

12

I

HR52

HR52 10K

10K

P33

L39 L40

TDI

M40 L38 J39

12

I

HR53

4.7K

NOTE:

TBD: CRB is NI

K38 K40 E39

H40 H38 G38 G40 G39 F38 E40 F40

B39 J33 L34 L33 K34

N33 M34

AV1 AW2

L9 J9 K9

L31

J31 K31

AD34 AD35

HR54 0

1 2

VP

BPM0# [64] BPM1# [64] BPM2# [64] BPM3# [64] BPM4# [64] BPM5# [64] BPM6# [64] BPM7# [64]

2

+1P05V_ CPUIO +1P05V_ CPUIO

12

NOTE:

Place near CPU

+3P3VSB

12

NI

HR15

HR15 Do Not Stuff

Do Not Stuff

HR8

HR8 51

51

12

I

12

GNDGND

PEGATRON DT-MB RESTRICTED SECRET

PEGATRO N CORPORATION

Size Project Name

A3

Date: Sheet of

I

HR9

HR9 51

51

I

HR12

HR12 51

51

12

GND

1

VCCSA_V ID [53] VCCSA_S ENSE [53]

VCC_SEN SE [58] VSS_SEN SE [58]

VCCIO_SEN SE [53] VSSIO_SEN SE [53]

VCCAXG_ SENSE [58] VSSAXG_ SENSE [58]

NOTE:

I

HR10

Place near XDP connector

51

VCCIO_SEL [53]

TDO [64] TDI [64] TCK [64] TMS [64] TRST# [64]

I

HR13

HR13 51

51

H_PRDY# [6 4] H_PREQ# [64] SYS_RESET _DBR# [20,63,64]

Title :

Engineer:

IPPSB-FA

Mike Yen

1

MISC 4-6

7 79Wednesd ay, April 27, 2011

Rev

1.01

5

www.teknisi-indonesia.com

4

3

2

1

D D

C C

B B

A A

A12 A13 A14 A15 A16 A18 A24 A25 A27 A28 B15 B16 B18 B24 B25 B27 B28 B30 B31 B33 B34 C15 C16 C18 C19 C21 C22 C24 C25 C27 C28 C30 C31 C33 C34 C36 D13 D14 D15 D16 D18 D19 D21 D22 D24 D25 D27 D28 D30 D31 D33 D34 D35 D36 E15 E16 E18 E19 E21 E22 E24 E25 E27 E28 E30 E31 E33 E34 E35 F15 F16 F18 F19 F21 F22 F24 F25 F27 F28 F30 F31

XU1F

VCC_001 VCC_002 VCC_003 VCC_004 VCC_005 VCC_006 VCC_007 VCC_008 VCC_009 VCC_010 VCC_011 VCC_012 VCC_013 VCC_014 VCC_015 VCC_016 VCC_017 VCC_018 VCC_019 VCC_020 VCC_021 VCC_022 VCC_023 VCC_024 VCC_025 VCC_026 VCC_027 VCC_028 VCC_029 VCC_030 VCC_031 VCC_032 VCC_033 VCC_034 VCC_035 VCC_036 VCC_037 VCC_038 VCC_039 VCC_040 VCC_041 VCC_042 VCC_043 VCC_044 VCC_045 VCC_046 VCC_047 VCC_048 VCC_049 VCC_050 VCC_051 VCC_052 VCC_053 VCC_054 VCC_055 VCC_056 VCC_057 VCC_058 VCC_059 VCC_060 VCC_061 VCC_062 VCC_063 VCC_064 VCC_065 VCC_066 VCC_067 VCC_068 VCC_069 VCC_070 VCC_071 VCC_072 VCC_073 VCC_074 VCC_075 VCC_076 VCC_077 VCC_078 VCC_079 VCC_080 VCC_081

VCC_082 VCC_083 VCC_084 VCC_085 VCC_086 VCC_087 VCC_088 VCC_089 VCC_090 VCC_091 VCC_092 VCC_093 VCC_094 VCC_095 VCC_096 VCC_097 VCC_098 VCC_099 VCC_100 VCC_101 VCC_102 VCC_103 VCC_104 VCC_105 VCC_106 VCC_107 VCC_108 VCC_109 VCC_110 VCC_111 VCC_112 VCC_113 VCC_114 VCC_115 VCC_116 VCC_117 VCC_118 VCC_119 VCC_120 VCC_121 VCC_122 VCC_123 VCC_124 VCC_125 VCC_126 VCC_127 VCC_128 VCC_129 VCC_130 VCC_131 VCC_132 VCC_133 VCC_134 VCC_135 VCC_136 VCC_137 VCC_138 VCC_139 VCC_140 VCC_141 VCC_142 VCC_143 VCC_144 VCC_145 VCC_146 VCC_147 VCC_148 VCC_149 VCC_150 VCC_151 VCC_152 VCC_153 VCC_154 VCC_155 VCC_156 VCC_157 VCC_158 VCC_159 VCC_160 VCC_161

F32 F33 F34 G15 G16 G18 G19 G21 G22 G24 G25 G27 G28 G30 G31 G32 G33 H13 H14 H15 H16 H18 H19 H21 H22 H24 H25 H27 H28 H30 H31 H32 J12 J15 J16 J18 J19 J21 J22 J24 J25 J27 J28 J30 K15 K16 K18 K19 K21 K22 K24 K25 K27 K28 K30 L13 L14 L15 L16 L18 L19 L21 L22 L24 L25 L27 L28 L30 M14 M15 M16 M18 M19 M21 M22 M24 M25 M27 M28 M30

+VCORE+VCORE

www.rosefix.com

+1P05V_ CPUIO

+0P925V _SA

+1P8V_S FR

AC24

4.7UF/6.3V

1 2

X5R 10%

I

mx_c0805

GND

M13

A11

AA3 AB8 AF8

AG33

AJ16 AJ17 AJ26 AJ28

AJ32 AK15 AK17 AK19 AK21 AK23 AK27 AK29 AK30

D10

H10 H11 H12

K10 K11 L11

L12 M10 M11 M12

AK11 AK12

A7

B9

D6 E3

E4 G3 G4

J3

J4

J7

J8

L3

L4

L7

N3

N4

N7

R3

R4

R7

U3

U4

U7

V8 W3

J10

XU1H

VCCIO_34

VCCIO_01 VCCIO_02 VCCIO_03 VCCIO_04 VCCIO_05 VCCIO_06 VCCIO_07 VCCIO_08 VCCIO_09 VCCIO_10 VCCIO_11 VCCIO_12 VCCIO_13 VCCIO_14 VCCIO_15 VCCIO_16 VCCIO_17 VCCIO_18 VCCIO_19 VCCIO_20 VCCIO_21 VCCIO_22 VCCIO_23 VCCIO_24 VCCIO_25 VCCIO_26 VCCIO_27 VCCIO_28 VCCIO_29 VCCIO_30 VCCIO_31 VCCIO_32 VCCIO_33 VCCIO_35 VCCIO_36 VCCIO_37 VCCIO_38 VCCIO_39 VCCIO_40 VCCIO_41 VCCIO_42 VCCIO_43 VCCIO_44 VCCIO_45

VCCSA_01 VCCSA_02 VCCSA_03 VCCSA_04 VCCSA_05 VCCSA_06 VCCSA_07 VCCSA_08 VCCSA_09 VCCSA_10 VCCSA_11

VCCPLL_01 VCCPLL_02

SOCKET_ 1155P

I

VDDQ_01 VDDQ_02 VDDQ_04 VDDQ_05 VDDQ_06 VDDQ_07 VDDQ_08 VDDQ_09 VDDQ_10 VDDQ_11 VDDQ_12 VDDQ_13 VDDQ_14 VDDQ_15 VDDQ_16 VDDQ_17 VDDQ_18 VDDQ_19 VDDQ_20 VDDQ_21 VDDQ_22 VDDQ_23

VDDQ_03

AJ13 AJ14 AJ23 AJ24 AR20 AR21 AR22 AR23 AR24 AU19 AU23 AU27 AU31 AV21 AV24 AV25 AV29 AV33 AW31 AY23 AY26 AY28

AJ20

+1P5V_D UAL

Place on the bottom under XU1

12

I

HCB1

HCB1 22UF/6.3V

22UF/6.3V

X5R 20%

X5R 20% mx_c0805_ small

mx_c0805_ small

GND GND GND

12

I

HCB6

HCB6 22UF/6.3V

22UF/6.3V

X5R 20%

X5R 20% mx_c0805_ small

mx_c0805_ small

12

I

HCB3

HCB3 22UF/6.3V

22UF/6.3V

X5R 20%

X5R 20% mx_c0805_ small

mx_c0805_ small

+V_AXG

AB33 AB34 AB35 AB36 AB37 AB38 AB39 AB40 AC33 AC34 AC35 AC36 AC37 AC38 AC39 AC40

W33 W34 W35 W36 W37 W38

T33 T34 T35 T36 T37 T38 T39 T40 U33 U34 U35 U36 U37 U38 U39 U40

Y33 Y34 Y35 Y36 Y37 Y38

XU1G

VCCAXG_01 VCCAXG_02 VCCAXG_03 VCCAXG_04 VCCAXG_05 VCCAXG_06 VCCAXG_07 VCCAXG_08 VCCAXG_09 VCCAXG_10 VCCAXG_11 VCCAXG_12 VCCAXG_13 VCCAXG_14 VCCAXG_15 VCCAXG_16 VCCAXG_17 VCCAXG_18 VCCAXG_19 VCCAXG_20 VCCAXG_21 VCCAXG_22 VCCAXG_23 VCCAXG_24 VCCAXG_25 VCCAXG_26 VCCAXG_27 VCCAXG_28 VCCAXG_29 VCCAXG_30 VCCAXG_31 VCCAXG_32 VCCAXG_33 VCCAXG_34 VCCAXG_35 VCCAXG_36 VCCAXG_37 VCCAXG_38 VCCAXG_39 VCCAXG_40 VCCAXG_41 VCCAXG_42 VCCAXG_43 VCCAXG_44

SOCKET_ 1155P

I

SOCKET_ 1155P

I

5

4

3

PEGATRON DT-MB RESTRICTED SECRET

Title :

Engineer:

PEGATRO N CORPORATION

Size Project Name

A3

Date: Sheet of

2

Date: Sheet of

Engineer:

IPPSB-FA

1

VCC 5 - 6

Mike Yen

8 79Tuesday, April 26, 2011

Rev

1.01

5

www.teknisi-indonesia.com

XU1I

A17

VSS_001

A23

VSS_002

A26

VSS_003

A29

VSS_004

D D

C C

B B

A A

A35

VSS_005

AA33

VSS_006

AA34

VSS_007

AA35

VSS_008

AA36

VSS_009

AA37

VSS_010

AA38

VSS_011

AA6

VSS_012

AB5

VSS_013

AC1

VSS_014

AC6

VSS_015

AD33

VSS_016

AD36

VSS_017

AD38

VSS_018

AD39

VSS_019

AD40

VSS_020

AD5

VSS_021

AD8

VSS_022

AE3

VSS_023

AE33

VSS_024

AE36

VSS_025

AF1

VSS_026

AF34

VSS_027

AF36

VSS_028

AF37

VSS_029

AF40

VSS_030

AF5

VSS_031

AF6

VSS_032

AF7

VSS_033

AG36

VSS_034

AH2

VSS_035

AH3

VSS_036

AH33

VSS_037

AH36

VSS_038

AH37

VSS_039

AH38

VSS_040

AH39

VSS_041

AH40

VSS_042

AH5

VSS_043

AH8

VSS_044

AJ12

VSS_045

AJ15

VSS_046

AJ18

VSS_047

AJ21

VSS_048

AJ25

VSS_049

AJ27

VSS_050

AJ36

VSS_051

AJ5

VSS_052

AK1

VSS_053

AK10

VSS_054

AK13

VSS_055

AK14

VSS_056

AK16

VSS_057

AK22

VSS_058

AK28

VSS_059

AK31

VSS_060

AK32

VSS_061

AK33

VSS_062

AK34

VSS_063

AK35

VSS_064

AK36

VSS_065

AK37

VSS_066

AK4

VSS_067

AK40

VSS_068

AK5

VSS_069

AK6

VSS_070

AK7

VSS_071

AK8

VSS_072

AK9

VSS_073

AL11

VSS_074

AL14

VSS_075

AL17

VSS_076

AL19

VSS_077

AL24

VSS_078

AL27

VSS_079

AL30

VSS_080

AL36

VSS_081

AL5

VSS_082

AM1

VSS_083

AM11

VSS_084

AM14

VSS_085

AM17

VSS_086

AM2

VSS_087

AM21

VSS_088

AM23

VSS_089

AM25

VSS_090

A4

VSS_NCTF_01

AV39

VSS_NCTF_02

GND GND GND GND

SOCKET_ 1155P

I

5

GND

VSS_091 VSS_092 VSS_093 VSS_094 VSS_095 VSS_096 VSS_097 VSS_098 VSS_099 VSS_100 VSS_101 VSS_102 VSS_103 VSS_104 VSS_105 VSS_106 VSS_107 VSS_108 VSS_109 VSS_110 VSS_111 VSS_112 VSS_113 VSS_114 VSS_115 VSS_116 VSS_117 VSS_118 VSS_119 VSS_120 VSS_121 VSS_122 VSS_123 VSS_124 VSS_125 VSS_126 VSS_127 VSS_128 VSS_129 VSS_130 VSS_131 VSS_132 VSS_133 VSS_134 VSS_135 VSS_136 VSS_137 VSS_138 VSS_139 VSS_140 VSS_141 VSS_142 VSS_143 VSS_144 VSS_145 VSS_146 VSS_147 VSS_148 VSS_149 VSS_150 VSS_151 VSS_152 VSS_153 VSS_154 VSS_155 VSS_156 VSS_157 VSS_158 VSS_159 VSS_160 VSS_161 VSS_162 VSS_163 VSS_164 VSS_165 VSS_166 VSS_167 VSS_168 VSS_169 VSS_170 VSS_171 VSS_172 VSS_173 VSS_174 VSS_175 VSS_176 VSS_177 VSS_178 VSS_179 VSS_180

AM27 AM3 AM30 AM36 AM37 AM38 AM39 AM4 AM40 AM5 AN10 AN11 AN14 AN17 AN19 AN22 AN24 AN27 AN30 AN31 AN32 AN33 AN34 AN35 AN36 AN5 AN6 AN7 AN8 AN9 AP1 AP11 AP14 AP17 AP22 AP25 AP27 AP30 AP36 AP37 AP4 AP40 AP5 AR11 AR14 AR17 AR18 AR19 AR27 AR30 AR36 AR5 AT1 AT10 AT12 AT13 AT15 AT16 AT17 AT2 AT25 AT27 AT28 AT29 AT3 AT30 AT31 AT32 AT33 AT34 AT35 AT36 AT37 AT38 AT39 AT4 AT40 AT5 AT6 AT7 AT8 AT9 AU1 AU15 AU26 AU34 AU4 AU6 AU8 AV10

4

XU1J

AV11

VSS_181

AV14

VSS_182

AV17

VSS_183

AV3

VSS_184

AV35

VSS_185

AV38

VSS_186

AV6

VSS_187

AW10

VSS_188

AW11

VSS_189

AW14

VSS_190

AW16

VSS_191

AW36

VSS_192

AW6

VSS_193

AY11

VSS_194

AY14

VSS_195

AY18

VSS_196

AY35

VSS_197

AY4

VSS_198

AY6

VSS_199

AY8

VSS_200

B10

VSS_201

B13

VSS_202

B14

VSS_203

B17

VSS_204

B23

VSS_205

B26

VSS_206

B29

VSS_207

B32

www.rosefix.com

VSS_208

B35

VSS_209

B38

VSS_210

B6

VSS_211

C11

VSS_212

C12

VSS_213

C17

VSS_214

C20

VSS_215

C23

VSS_216

C26

VSS_217

C29

VSS_218

C32

VSS_219

C35

VSS_220

C7

VSS_221

C8

VSS_222

D17

VSS_223

D2

VSS_224

D20

VSS_225

D23

VSS_226

D26

VSS_227

D29

VSS_228

D32

VSS_229

D37

VSS_230

D39

VSS_231

D4

VSS_232

D5

VSS_233

D9

VSS_234

E11

VSS_235

E12

VSS_236

E17

VSS_237

E20

VSS_238

E23

VSS_239

E26

VSS_240

E29

VSS_241

E32

VSS_242

E36

VSS_243

E7

VSS_244

E8

VSS_245

F1

VSS_246

F10

VSS_247

F13

VSS_248

F14

VSS_249

F17

VSS_250

F2

VSS_251

F20

VSS_252

F23

VSS_253

F26

VSS_254

F29

VSS_255

F35

VSS_256

F37

VSS_257

F39

VSS_258

F5

VSS_259

F6

VSS_260

F9

VSS_261

G11

VSS_262

G12

VSS_263

G17

VSS_264

G20

VSS_265

G23

VSS_266

G26

VSS_267

G29

VSS_268

G34

VSS_269

G7

VSS_270

AY37

VSS_NCTF_03

B3

VSS_NCTF_04

GND

SOCKET_ 1155P

I

4

VSS_271 VSS_272 VSS_273 VSS_274 VSS_275 VSS_276 VSS_277 VSS_278 VSS_279 VSS_280 VSS_281 VSS_282 VSS_283 VSS_284 VSS_285 VSS_286 VSS_287 VSS_288 VSS_289 VSS_290 VSS_291 VSS_292 VSS_293 VSS_294 VSS_295 VSS_296 VSS_297 VSS_298 VSS_299 VSS_300 VSS_301 VSS_302 VSS_303 VSS_304 VSS_305 VSS_306 VSS_307 VSS_308 VSS_309 VSS_310 VSS_311 VSS_312 VSS_313 VSS_314 VSS_315 VSS_316 VSS_317 VSS_318 VSS_319 VSS_320 VSS_321 VSS_322 VSS_323 VSS_324 VSS_325 VSS_326 VSS_327 VSS_328 VSS_329 VSS_330 VSS_331 VSS_332 VSS_333 VSS_334 VSS_335 VSS_336 VSS_337 VSS_338 VSS_339 VSS_340 VSS_341 VSS_342 VSS_343 VSS_344 VSS_345 VSS_346 VSS_347 VSS_348 VSS_349 VSS_350 VSS_351 VSS_352 VSS_353 VSS_354 VSS_355 VSS_356 VSS_357 VSS_358 VSS_359 VSS_360

G8 H1 H17 H2 H20 H23 H26 H29 H33 H35 H37 H39 H5 H6 H9 J11 J17 J20 J23 J26 J29 J32 K1 K12 K13 K14 K17 K2 K20 K23 K26 K29 K33 K35 K37 K39 K5 K6 L10 L17 L20 L23 L26 L29 L8 M1 M17 M2 M20 M23 M26 M29 M33 M35 M37 M39 M5 M6 M9 N8 P1 P2 P36 P38 P40 P5 P6 R33 R35 R37 R39 R8 T1 T5 T6 U8 V1 V2 V33 V34 V35 V36 V37 V38 V39 V40 V5 W6 Y5 Y8

3

1

Do Not Stuff

1

Do Not Stuff

1

Do Not Stuff

1

Do Not Stuff

3

H28

NOBOM

H29

NOBOM

H30

NOBOM

H31

NOBOM

XU1K

AB7

RSVD_04

AD37

RSVD_05

AG4

RSVD_08

AJ29

RSVD_10

AJ30

RSVD_11

AJ31

RSVD_12

AV34

RSVD_19

AW34

RSVD_21

P35

RSVD_43

P37

RSVD_44

P39

RSVD_45

R34

RSVD_46

R36

RSVD_47

R38

RSVD_48

R40

RSVD_49

A38

NCTF_01

AU40

NCTF_02

AW38

NCTF_03

C2

NCTF_04

D1

NCTF_05

SOCKET_ 1155P

I

BACKPLATE1

INTEL LGA 1156P BACK PLATE,3 SCREW

PT44P11 -6401

FC_AH1 FC_AH4

RSVD_15 RSVD_14 RSVD_13 RSVD_17 RSVD_22

RSVD_07 RSVD_03 RSVD_06 RSVD_09

RSVD_27 RSVD_26 RSVD_25 RSVD_31 RSVD_41

NP_NC1 NP_NC2 NP_NC3 NP_NC4 NP_NC5 NP_NC6 NP_NC7

SFA 1.01

AH1 AH4

AT11 AP20 AN20 AU10 AY10

AF4 AB6 AE6 AJ11

D38 C39 C38 J34 N34

1 2 3 4 5 6 7

2

SA_DIMM_V R SB_DIMM_V R

I

ILM1

SOCKET1 156_ILM

2

HR42 0

1 2

IVB

HR43 0

1 2

IVB

12

GND GND

I

HC2

0.1UF/16V

12

I

HC3

0.1UF/16V

Stuff resistors HR42/HR43 for future IVB VREF capability

INTEL LGA1156 SOCKET ILM

PEGATRON DT-MB RESTRICTED SECRET

PEGATRO N CORPORATION

Size Project Name

A3

Date: Sheet of

1

DIMM_VREF _A [10] DIMM_VREF _B [11]

Title :

Engineer:

IPPSB-FA

1

VSS 6 - 6

Mike Yen

9 79Wednesd ay, April 27, 2011

Rev

1.01

5

www.teknisi-indonesia.com

4

3

2

1



D D

M_CHA_M AA0 M_CHA_M AA1 M_CHA_M AA2 M_CHA_M AA3 M_CHA_M AA4 M_CHA_M AA5 M_CHA_M AA6 M_CHA_M AA7 M_CHA_M AA8 M_CHA_M AA9 M_CHA_M AA10 M_CHA_M AA11 M_CHA_M AA12 M_CHA_M AA13 M_CHA_M AA14 M_CHA_M AA15

M_CHA_C LK1[4] M_CHA_C LK1#[4] M_CHA_C LK0[4]

C C

B B

M_CHA_C LK0#[4]

M_CHA_C S#1[4] M_CHA_C S#0[4]

M_CHA_O DT1[4] M_CHA_O DT0[4]

M_CHA_W E#[4] M_CHA_R AS#[4] M_CHA_C AS#[4]

M_CHA_B A2[4] M_CHA_B A1[4] M_CHA_B A0[4]

M_CHA_C KE1[4] M_CHA_C KE0[4]

M_CHA_D QS7[4]

M_CHA_D QS7#[4]

M_CHA_D QS6[4]

M_CHA_D QS6#[4]

M_CHA_D QS5[4]

M_CHA_D QS5#[4]

M_CHA_D QS4[4]

M_CHA_D QS4#[4]

M_CHA_D QS3[4]

M_CHA_D QS3#[4]

M_CHA_D QS2[4]

M_CHA_D QS2#[4]

M_CHA_D QS1[4]

M_CHA_D QS1#[4]

M_CHA_D QS0[4]

M_CHA_D QS0#[4]

GND

SMB_CLK _M[11,37,38,4 5,63,64,79] SMB_DAT A_M[11,37,38,4 5,63,64,79]

GND

5.2H

DIMMA0A

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12/BC#

119

A13

80

A14

78

A15

102

CK1

104

CK1#

101

CK0

103

CK0#

121

S1#

114

S0#

120

ODT1

116

ODT0

113

WE#

110

RAS#

115

CAS#

79

BA2

108

BA1

109

BA0

74

CKE1

73

CKE0

201

SA1

197

SA0

188

DQS7

186

DQS#7

171

DQS6

169

DQS#6

154

DQS5

152

DQS#5

137

DQS4

135

DQS#4

64

DQS3

62

DQS#3

47

DQS2

45

DQS#2

29

DQS1

27

DQS#1

12

DQS0

10

DQS#0

187

DM7

170

DM6

153

DM5

136

DM4

63

DM3

46

DM2

28

DM1

11

DM0

202

SCL

200

SDA

DDR3_DIMM _204P

I

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8

DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63

RESET#

M_CHA_M AA[0..15] [4]

M_CHA_D Q[0..63] [4]

M_CHA_D Q1

5

M_CHA_D Q5

7

M_CHA_D Q2

15

M_CHA_D Q3

17

M_CHA_D Q0

4

M_CHA_D Q4

6

M_CHA_D Q7

16

M_CHA_D Q6

18

M_CHA_D Q13

21

M_CHA_D Q12

23

M_CHA_D Q15

33

M_CHA_D Q14

35

M_CHA_D Q8

22

M_CHA_D Q9

24

M_CHA_D Q11

34

M_CHA_D Q10

36

M_CHA_D Q17

39

www.rosefix.com

M_CHA_D Q20

41

M_CHA_D Q23

51

M_CHA_D Q18

53

M_CHA_D Q16

40

M_CHA_D Q21

42

M_CHA_D Q19

50

M_CHA_D Q22

52

M_CHA_D Q29

57

M_CHA_D Q28

59

M_CHA_D Q31

67

M_CHA_D Q30

69

M_CHA_D Q24

56

M_CHA_D Q25

58

M_CHA_D Q27

68

M_CHA_D Q26

70

M_CHA_D Q33

129

M_CHA_D Q36

131

M_CHA_D Q38

141

M_CHA_D Q39

143

M_CHA_D Q32

130

M_CHA_D Q37

132

M_CHA_D Q34

140

M_CHA_D Q35

142

M_CHA_D Q41

147 149 157 159 146 148 158 160 163 165 175 177 164 166 174 176 181 183 191 193 180 182 192 194

30

M_CHA_D Q45 M_CHA_D Q47 M_CHA_D Q42 M_CHA_D Q44 M_CHA_D Q40 M_CHA_D Q46

M_CHA_D Q43 M_CHA_D Q53 M_CHA_D Q52 M_CHA_D Q51 M_CHA_D Q50 M_CHA_D Q48 M_CHA_D Q49 M_CHA_D Q54 M_CHA_D Q55

M_CHA_D Q57

M_CHA_D Q56

M_CHA_D Q63

M_CHA_D Q62

M_CHA_D Q61

M_CHA_D Q60

M_CHA_D Q59

M_CHA_D Q58

DIMM_VREF _A[9]

DDR3_DR AMRST# [4,11]

+1P5V_D UAL + 1P5V_DUAL

GND

12

I

D3R30

D3R31

1K

1%

12

I

D3R32

D3R22

1K

1%

GND GND GND GND

12

I

D3CB48

0.1UF/16V

X7R 10%

DIMM_CA_V REF_A

+1P5V_D UAL

DIMM_VREF _A

12

I

D3CB15

0.1UF/16V

X7R 10%

I

DIMMA0B

75

VDD1

81

VDD3

87

VDD5

93

VDD7

99

VDD9

105

VDD11

111

VDD13

117

VDD15

123

VDD17

2

VSS1

8

VSS3

13

VSS5

19

VSS7

25

VSS9

31

VSS11

37

VSS13

43

VSS15

48

VSS17

54

VSS19

60

VSS21

65

VSS23

71

VSS25

127

VSS27

133

VSS29

138

VSS31

144

VSS33

150

VSS35

155

VSS37

161

VSS39

167

VSS41

172

VSS43

178

VSS45

184

VSS47

189

VSS49

195

VSS51

198

EVENT#

125

TEST

77

NC1

122

NC2

126

VREFCA

1

VREFDQ

DDR3_DIMM _204P

VDD2 VDD4 VDD6

VDD8 VDD10 VDD12 VDD14 VDD16 VDD18

VSS2

VSS4

VSS6

VSS8 VSS10 VSS12 VSS14 VSS16 VSS18 VSS20 VSS22 VSS24 VSS26 VSS28 VSS30 VSS32 VSS34 VSS36 VSS38 VSS40 VSS42 VSS44 VSS46 VSS48 VSS50 VSS52

GND1 GND2

NP_NC1 NP_NC2

VTT1 VTT2

VDDSPD

76 82 88 94 100 106 112 118 124

3 9 14 20 26 32 38 44 49 55 61 66 72 128 134 139 145 151 156 162 168 173 179 185 190 196

207 208

205 206

203 204

199

C9351

1UF/6.3V

X5R 10%

I

+1P5V_D UAL

12

C9350

1UF/6.3V

X5R 10%

GND

I

+3P3V

GNDGND

12

D3CB1

0.1UF/16V

X7R 10%

I

GND

12

D3CB49

0.1UF/16V

X7R 10%

12

I

4.7UF/6.3V

X5R 10%

mx_c0805_ small

D3CB16

+VTT_DD R

12

I

GNDGND

A A

DDR3 CHANNEL A

Mike Yen

1

Rev

1.01

10 79Wednesday, April 27, 201 1

1.01

5

4

3

Title :

Engineer:

PEGATRO N CORPORATION

Size Project Name

A3

Date: Sheet of

2

Date: Sheet of

Engineer:

IPPSB-FA

5

www.teknisi-indonesia.com

4

3

2

1



D D

M_CHB_M AA0 M_CHB_M AA1 M_CHB_M AA2 M_CHB_M AA3 M_CHB_M AA4 M_CHB_M AA5 M_CHB_M AA6 M_CHB_M AA7 M_CHB_M AA8 M_CHB_M AA9 M_CHB_M AA10 M_CHB_M AA11 M_CHB_M AA12 M_CHB_M AA13 M_CHB_M AA14 M_CHB_M AA15

M_CHB_C LK1[5] M_CHB_C LK1#[5] M_CHB_C LK0[5]

C C

B B

M_CHB_C LK0#[5]

M_CHB_C S#1[5] M_CHB_C S#0[5]

M_CHB_O DT1[5] M_CHB_O DT0[5]

M_CHB_W E#[5] M_CHB_R AS#[5] M_CHB_C AS#[5]

M_CHB_B A2[5] M_CHB_B A1[5] M_CHB_B A0[5]

M_CHB_C KE1[5] M_CHB_C KE0[5]

M_CHB_D QS7[5]

M_CHB_D QS7#[5]

M_CHB_D QS6[5]

M_CHB_D QS6#[5]

M_CHB_D QS5[5]

M_CHB_D QS5#[5]

M_CHB_D QS4[5]

M_CHB_D QS4#[5]

M_CHB_D QS3[5]

M_CHB_D QS3#[5]

M_CHB_D QS2[5]

M_CHB_D QS2#[5]

M_CHB_D QS1[5]

M_CHB_D QS1#[5]

M_CHB_D QS0[5]

M_CHB_D QS0#[5]

GND

SMB_CLK _M[10,37,38,4 5,63,64,79] SMB_DAT A_M[10,37,38,4 5,63,64,79]

+3P3V

GND

5.2H

(5.2H)

DIMMB0A

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12/BC#

119

A13

80

A14

78

A15

102

CK1

104

CK1#

101

CK0

103

CK0#

121

S1#

114

S0#

120

ODT1

116

ODT0

113

WE#

110

RAS#

115

CAS#

79

BA2

108

BA1

109

BA0

74

CKE1

73

CKE0

201

SA1

197

SA0

188

DQS7

186

DQS#7

171

DQS6

169

DQS#6

154

DQS5

152

DQS#5

137

DQS4

135

DQS#4

64

DQS3

62

DQS#3

47

DQS2

45

DQS#2

29

DQS1

27

DQS#1

12

DQS0

10

DQS#0

187

DM7

170

DM6

153

DM5

136

DM4

63

DM3

46

DM2

28

DM1

11

DM0

202

SCL

200

SDA

DDR3_DIMM _204P

I

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8

DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63

RESET#

M_CHB_D Q[0..63] [5]

M_CHB_M AA[0..15] [5]

M_CHB_D Q0

5

M_CHB_D Q4

7

M_CHB_D Q7

15

M_CHB_D Q6

17

M_CHB_D Q1

4

M_CHB_D Q5

6

M_CHB_D Q2

16

M_CHB_D Q3

18

M_CHB_D Q13

21

M_CHB_D Q12

23

M_CHB_D Q15

33

M_CHB_D Q14

35

M_CHB_D Q8

22

M_CHB_D Q9

24

M_CHB_D Q10

34

M_CHB_D Q11

36

M_CHB_D Q20

39

www.rosefix.com

M_CHB_D Q21

41

M_CHB_D Q23

51

M_CHB_D Q22

53

M_CHB_D Q16

40

M_CHB_D Q17

42

M_CHB_D Q18

50

M_CHB_D Q19

52

M_CHB_D Q24

57

M_CHB_D Q25

59

M_CHB_D Q27

67

M_CHB_D Q26

69

M_CHB_D Q28

56

M_CHB_D Q29

58

M_CHB_D Q30

68

M_CHB_D Q31

70

M_CHB_D Q32

129

M_CHB_D Q33

131

M_CHB_D Q38

141

M_CHB_D Q39

143

M_CHB_D Q36

130

M_CHB_D Q37

132

M_CHB_D Q34

140

M_CHB_D Q35

142

M_CHB_D Q40

147

M_CHB_D Q41

149

M_CHB_D Q47

157

M_CHB_D Q46

159

M_CHB_D Q44

146

M_CHB_D Q45

148

M_CHB_D Q42

158

M_CHB_D Q43

160 163 165 175 177 164 166 174 176 181 183 191 193 180 182 192 194

30

M_CHB_D Q52 M_CHB_D Q53 M_CHB_D Q51 M_CHB_D Q50 M_CHB_D Q49 M_CHB_D Q48 M_CHB_D Q54 M_CHB_D Q55 M_CHB_D Q61 M_CHB_D Q60 M_CHB_D Q62 M_CHB_D Q63 M_CHB_D Q57 M_CHB_D Q56 M_CHB_D Q59 M_CHB_D Q58

0.1UF/16V

X7R 10%

D3C4

I

GND

12

DDR3_DR AMRST# [4,10]

DIMM_VREF _B[9]

+1P5V_D UAL +1P5V_DUA L

12

I

D3R33

D3R36

1K

1%

12

I

D3R35

D3R35 1K

1K

1%

GND GND GND GND

I

D3R37

D3R37 1K

1K

1%

12

I

D3CB51

0.1UF/16V

X7R 10%

+1P5V_D UAL

GND

DIMM_CA_V REF_B DIMM_VREF _B

12

I

D3CB50

0.1UF/16V

X7R 10%

DIMMB0B

75

VDD1

81

VDD3

87

VDD5

93

VDD7

99

VDD9

105

VDD11

111

VDD13

117

VDD15

123

VDD17

2

VSS1

8

VSS3

13

VSS5

19

VSS7

25

VSS9

31

VSS11

37

VSS13

43

VSS15

48

VSS17

54

VSS19

60

VSS21

65

VSS23

71

VSS25

127

VSS27

133

VSS29

138

VSS31

144

VSS33

150

VSS35

155

VSS37

161

VSS39

167

VSS41

172

VSS43

178

VSS45

184

VSS47

189

VSS49

195

VSS51

198

EVENT#

125

TEST

77

NC1

122

NC2

126

VREFCA

1

VREFDQ

DDR3_DIMM _204P

I

VDD2 VDD4 VDD6

VDD8 VDD10 VDD12 VDD14 VDD16 VDD18

VSS2 VSS4 VSS6

VSS8 VSS10 VSS12 VSS14 VSS16 VSS18 VSS20 VSS22 VSS24 VSS26 VSS28 VSS30 VSS32 VSS34 VSS36 VSS38 VSS40 VSS42 VSS44 VSS46 VSS48 VSS50 VSS52

GND1 GND2

NP_NC1 NP_NC2

VTT1

VTT2

VDDSPD

+1P5V_D UAL

76 82 88 94 100 106 112 118 124

3 9 14 20 26 32 38 44 49 55 61 66 72 128 134 139 145 151 156 162 168 173 179 185 190 196

207 208

205 206

203 204

199

+3P3V

GND

D3CB52

0.1UF/16V

X7R 10%

12

I

4.7UF/6.3V

X5R 10%

mx_c0805_ small

D3CB5

+VTT_DD R

12

I

GNDGND

A A

DDR3 CHANNEL B

Mike Yen

1

Rev

1.01

11 79Wednesday, April 27, 201 1

1.01

5

4

3

Title :

Engineer:

PEGATRO N CORPORATION

Size Project Name

A3

Date: Sheet of

2

Date: Sheet of

Engineer:

IPPSB-FA

5

www.teknisi-indonesia.com

+1P5V_D UAL

SFA1.01A-EMI

SFA1.01A-EMISFA1.01A-EMI

4

3

2

1

NI

D3CB19

D3CB19 Do Not Stuff

Do Not Stuff

X5R 10%

I

D3CB33

D3CB33 1UF/25V

1UF/25V

mx_c0603

mx_c0603 X5R 10%

X5R 10%

12

I

D3CB34

D3CB34 1UF/25V

1UF/25V

mx_c0603

mx_c0603 X5R 10%

X5R 10%

12

I

D3CB18

D3CB18 1UF/25V

1UF/25V

X5R 10%

GND GND GND

12

GND

12

I

D3CB32

D3CB32 1UF/25V

1UF/25V

mx_c0603

mx_c0603 X5R 10%

X5R 10%

D D

Place those cap between CH A DIMM0 to CH B DIMM0

C C

12

I

D3CB72

D3CB72 22UF/6.3V

22UF/6.3V

X5R 20%

X5R 20% mx_c0805_ small

mx_c0805_ small

GND GND GNDGND GNDGND

12

I

D3CB73

D3CB73 22UF/6.3V

22UF/6.3V

X5R 20%

X5R 20% mx_c0805_ small

mx_c0805_ small

12

I

D3CB74

D3CB74 22UF/6.3V

22UF/6.3V

X5R 20%

X5R 20% mx_c0805_ small

mx_c0805_ small

I

D3CB20

D3CB20 1UF/25V

1UF/25V

X5R 10%

GNDGND GNDGND

12

I

D3CB35

D3CB35 1UF/25V

1UF/25V

mx_c0603

mx_c0603 X5R 10%

X5R 10%

I

D3CB21

D3CB21 1UF/25V

1UF/25V

X5R 10%

NOTE:

Place those cap close to CH A DIMM0

NOTE:

Place those cap close to CH B DIMM0

www.rosefix.com

12

I

D3CB75

D3CB75 22UF/6.3V

22UF/6.3V

X5R 20%

X5R 20% mx_c0805_ small

mx_c0805_ small

12

I

D3CB76

D3CB76 22UF/6.3V

22UF/6.3V

X5R 20%

X5R 20% mx_c0805_ small

mx_c0805_ small

12

I

D3CB77

D3CB77 22UF/6.3V

22UF/6.3V

X5R 20%

X5R 20% mx_c0805_ small

mx_c0805_ small

12

+

D3CE3

D3CE3 Do Not Stuff

Do Not Stuff

NI

GND GND GND GND

12

+

D3CE1

D3CE1 Do Not Stuff

Do Not Stuff

NI

12

+

D3CE2

D3CE2 Do Not Stuff

Do Not Stuff

NI

12

+

D3CE4

D3CE4 Do Not Stuff

Do Not Stuff

NI

TBD

Place D3CB77 near CH B DIMM0

B B

NOTE:

DIMM Placement for different platform

DIMM

2 1 34

A A

LGA1156 LFD/CKD

LGA1155

SNB

CH BCH A

5

DIMM

1 34

2

CH A CH B

4

PEGATRON DT-MB RESTRICTED SECRET

DDR3 TERMINATION A&B

Title :

Engineer:

PEGATRO N CORPORATION

Size Project Name

A3

Date: Sheet of

3

2

Date: Sheet of

Engineer:

IPPSB-FA

1

Mike Yen

12 79Tuesday, April 26, 2011

Rev

1.01

5

www.teknisi-indonesia.com

D D

4

3

2

1

PLTRST_CPU#

www.rosefix.com

178 ohm in CRB and PDG

HR46 180 1%

R1808

C C

PLTRST#[20,43,54,6 3]

CPU_RST #[43 ]

R1808

R1806

0 OhmI

Do Not StuffNI

HR46 180 1%

1 2

I

GND

PLTRST_ CPU# [7]

12

I

HR49

HR49 75

75

HR48 Do Not Stuff

1 2

NI

1%

CPURST_ XDP# [63,64]

+3VA_EC+3VA_ EC +12V

B B

SML0_CL K_EC[43]

SML0_DA TA_EC[43]

EC

A A

5

R1804

R1804 Do Not Stuff

Do Not Stuff

5%

5% NI

NI

R1803

R1803 Do Not Stuff

Do Not Stuff

5%

5% NI

NI

3

R1813

NI

4

D

R1811

+12V

1

G

1

G

NI

Q63

Do Not Stuff

2

S

Q61

2N7002

2

S

I

Do Not Stuff

NI

PCH

0 OhmI

R1812

3

R1814

NI

1

G

Q64

Do Not Stuff

3

2

3

2

D

S

0 OhmI

+3P3V +3 P3V

R1816

R1815

2.2KOHM

I

1

G

Q62

Q62 2N7002

2N7002

2

D

S

I

Do Not Stuff

R1805

R1807

3

0 OhmI

SML1_CL K [17]

SML1_DA TA [17]

GPU TEMP

SMB1_CL K_MXM [69]

SMB1_DA TA_MXM [69]

PEGATRON DT-MB RESTRICTED SECRET

PLTRST_CPU#&SMbus

Title :

Engineer:

PEGATRO N CORPORATION

Size Project Name

A3

Date: Sheet of

2

Date: Sheet of

Engineer:

IPPSB-FA

PLTRST_CPU#&SMbus

XXXX-XX

13 79Wednesday, April 27, 201 1

1

13 79Wednesday, April 27, 201 1

Rev

1.01

5

www.teknisi-indonesia.com

4

3

+5VSB

+5V

+12V

2

1

+3P3V

12

R285

R285 Do Not Stuff

D8827

D8825

1

2

BAT54CW

I

SCL_LCD EN[15,16]

3

1

PCH_LCD PWR_EN[2 5]

+3P3V

12

ENABKL[79]

PCH_BL_ EN[25]

MXM_LCD EN[69 ]

ENAVDD[7 9]

ENABLE_ CONTROL

+3P3V

12

R280

R280 10KOhm

10KOhm

1

G

I

2

S

Q66

Q66 2N7002

2N7002

I

MXM_BL_ EN[69]

R37546 0Ohm

R37534 Do Not Stu ff

1 2

ENABLE_ CONTROL

R120 0Ohm

1 2

R125 Do Not Stuff

1 2

R281

R281 10KOhm

10KOhm

I

3

D

1

1 2

2

I

NI

I

NI

BAT54CW

+19VSB

12

+19V

R287

R287 Do Not Stuff

Do Not Stuff

NI

GND

AVIN_DET#[15,16,1 9,36]

12

R289

R289 10KOhm

10KOhm

I

R291

R291 10KOhm

10KOhm

I

IN

D D

C C

Do Not Stuff

NI

3

+3P3V

Q69

12

2N7002

I

S

12

GND

www.rosefix.com

+3P3V

Q65

12

2N7002

I

R295

R295 Do Not Stuff

Do Not Stuff

NI

G

1

G

+3P3V

12

3

2

3

2

R288

R288 Do Not Stuff

Do Not Stuff

NI

D

S

D

SFA 1.01A

+19VSB

I

12

1%

47KOHM

47KOHM R197

R197

R316

R316 Do Not Stuff

Do Not Stuff

NI

I

R320 220Ohm

1 2

100KOhm

100KOhm R752

R752

I

12

I

C44194

0.1UF/16V

Y5V +80-20%

GND

LVDS_LC DEN_B

1 2

12

NI

C44195

C44195 Do Not Stuff

Do Not Stuff

Y5V +80-20%

GND

B

1

B

1

R129

R129 0 Ohm

0 Ohm

5%

I

12

LVDS_LC DEN_C

3

C

Q310

PMBS390 4

E

E 2

2

R128

R128 Do Not Stuff

Do Not Stuff

5%

1 2

NI

R321

R321 56KOHM

56KOHM

I

I 1%

1%

I

R130

R130 Do Not Stuff

Do Not Stuff

5%

1 2

NI

1 2

I

10KOhm

1%

B

1

B

1

R319

V_LCD_C

3

C

Q308

PMBS390 4

E

E 2

2

V_LCD_G

I

R317 10Ohm

AP2306G N

Q309

D

3

12

I

GND GNDGND GND

1

12

I

S

2

G

C44197

0.1UF/16V

X7R 10%

X7R 10% I

I

+19V

+V_LCD

12

C44196

C44196 10UF/10V

10UF/10V

Y5V +80-20%

Y5V +80-20% I

I

mx_c0805

1

G

SFA1.04

SFA1.04SFA1.04

3

2

GND

1 2

D

S

R37496

R37496 Do Not Stuff

Do Not Stuff

5%

5% NI

NI

Q68

Q68 Do Not Stuff

Do Not Stuff

NI

converter Conn.

D8828

BAT54CW

SCL_BL_ EN[15,16]

+3P3V

12

3

D

1

G

2

SCL_BL_ PWM[15 ,16]

B B

MXM_BL_ PWM[69]

EDPPW M[79]

ENABLE_ CONTROL

A A

1

2

I

SFA1.04

5

4

R322

R322 Do Not Stuff

Do Not Stuff

NI

S

Q67

Q67 2N7002

2N7002

I

12

GND

+3P3V

Do Not Stuff

Do Not Stuff R334

R334

NI

12

GND

R7841

R7841 Do Not Stuff

Do Not Stuff

NI

I

1KOhm

1KOhm R331

R331

ID2 ID1 ID0 Panel

0 0 0 CMI

0 0 1 SAMSUNG

0 1 0 TBD

0 1 1 TBD

21.5" Converter connector

Pin3 ->ID2

Pin6 ->ID1

Pin9 ->ID0

3

ID2 ID1 ID0 Panel

1 0 0 CMI

1 0 1 SAMSUNG

1 1 0 TBD

1 1 1 TBD

23" Converter connector

Pin3 ->ID2

Pin6 ->ID1

Pin9 ->ID0

2

F204

1 2

3A/32V

I

PANEL_ID_ 2_R[19,79]

PANEL_ID_ 1_R[15,16,19,7 9]

PANEL_ID_ 0_R[15,16,19,7 9]

Pegatron Corp.

Size Project Name

A3

Date: Sheet of

IN

GND

Engineer:

IPPSB-FA

INV_EN

INV_ADJ

WAFER_HD_1X9P

Title :

1

CON3

1 2 3

5 6 7 8 9410

I

Converter Controllor

Hugo Liao

14 79Wednesday, April 27, 201 1

Rev

1.01

5

www.teknisi-indonesia.com

4

3

2

1

已已已已已已已已已已已已未未未未未未未未

URN9A

1 2

NI

Do Not Stuff

LVDS_U0N_N B[79]

LVDS_U0P_NB[79]

D D

LVDS_U1N_N B[79]

LVDS_U1P_NB[79]

LVDS_U2N_N B[79]

LVDS_U2P_NB[79]

LVDS_UCLKN _NB[79]

LVDS_UCLKP_N B[79]

LVDS_U3N_N B[79]

LVDS_U3P_NB[79]

LVDS_L0N_NB[79]

LVDS_L0P_NB[79]

C C

IN

Do Not Stuff

23

3 4

NI

1 2

NI

Do Not Stuff

23

3 4

NI

1 2

NI

Do Not Stuff

23

3 4

NI

1 2

NI

Do Not Stuff

23

3 4

NI

1 2

NI

Do Not Stuff

23

3 4

NI

1 2

NI

Do Not Stuff

23

3 4

NI

14

I

90OHM/100MHZ/330m A

90OHM/100MHZ/330m A UL9

UL9

URN9B

Do Not Stuff

URN12A

14

I

90OHM/100MHZ/330m A

90OHM/100MHZ/330m A UL11

UL11

URN12B

Do Not Stuff

URN14A

14

I

90OHM/100MHZ/330m A

90OHM/100MHZ/330m A UL12

UL12

URN14B

Do Not Stuff

URN16A

14

I

90OHM/100MHZ/330m A

90OHM/100MHZ/330m A UL13

UL13

URN16B

Do Not Stuff

URN18A

14

I

90OHM/100MHZ/330m A

90OHM/100MHZ/330m A UL14

UL14

URN18B

Do Not Stuff

URN20A

14

I

90OHM/100MHZ/330m A

90OHM/100MHZ/330m A UL15

UL15

URN20B

Do Not Stuff

LVDS CONN (PCH)

LVDS_U0N_N B_CON LVDS_U0P_NB_C ON LVDS_U1N_N B_CON LVDS_U1P_NB_C ON LVDS_U2N_N B_CON LVDS_U2P_NB_C ON

LVDS_UCLKN _NB_CON LVDS_UCLKP_N B_CON LVDS_U3N_N B_CON LVDS_U3P_NB_C ON LVDS_L0N_NB_C ON LVDS_L0P_NB_C ON

LCD CONN NB & GPU colay

Adjust value on 5/31

12

C44168

2.2PF/50V

I

P174

1

3

5

7

9

11

13

15

17

19

21

23

25

27

29

WtoB_CON _2X15P

I

GND

I

SIDE2

SIDE1

10 12 14 16 18 20 22 24 26 28 30

2 4 6 8

32 2 4 6

R37547 Do N ot StuffNIR37547 Do N ot StuffNI

8 10 12 14 16 18 20 22 24 26 28 30 31

1 2

GND

LVDS_L3P_NB_C ON LVDS_L3N_NB_C ON LVDS_LCLKP_NB _CON LVDS_LCLKN_N B_CON LVDS_L2P_NB_C ON LVDS_L2N_NB_C ON LVDS_L1P_NB_C ON LVDS_L1N_NB_C ON

www.rosefix.com

12

C44169

0.1UF/25V

+V_LCD

I

GNDGNDGND

90OHM/100MHZ/330m A

12

C44170

C44170 1UF/16V

1UF/16V

I

URN22B

URN22A

URN24B

URN24A

URN26B

URN26A

URN28A

URN28B

1.01 20101019 EMI revised

12

C44171

470uF/6.3V

10PF/50V

NPO 5%

NPO 5% I

I

34

Do Not Stuff

14

23

UL16

I

12

NI

Do Not Stuff

34

Do Not Stuff

14

23

UL17

I

12

NI

Do Not Stuff

34

Do Not Stuff

14

23

UL18

I

12

NI

Do Not Stuff

12

Do Not Stuff

I

UL19

1 4

2 3

34

NI

Do Not Stuff

I

C44252

NI

12

+

SFA1.01

SFA1.01SFA1.01

IN

LVDS_L3P_NB [79]

IN

LVDS_L3N_NB [79]

IN

LVDS_LCLKP_NB [79]

IN

LVDS_LCLKN_N B [79]

IN

LVDS_L2P_NB [79]

IN

LVDS_L2N_NB [79]

IN

LVDS_L1P_NB [79]

IN

LVDS_L1N_NB [79]

12

NI

CB4101

CB4101 Do Not Stuff

Do Not Stuff

mx_c0603_small

Y5V +80-20%

+V_LCD

12

NI

CB4102

CB4102 Do Not Stuff

Do Not Stuff

mx_c0603_small

Y5V +80-20%

GND

AV Board connector

1 2

Do Not Stuff

URN100A

NI

I

1 4

3 4

Do Not Stuff

NI

1 2

NI

1 4

3 4

Do Not Stuff

NI

1 2

NI

1 4

3 4

Do Not Stuff

NI

1 2

NI

1 4

3 4

Do Not Stuff

NI

1 2

NI

1 4

3 4

Do Not Stuff

NI

I

90OHM/100MHZ/330m A

90OHM/100MHZ/330m A UL30

UL30

2 3

URN100B

Do Not Stuff

I

90OHM/100MHZ/330m A

90OHM/100MHZ/330m A UL33

UL33

2 3

URN101B

Do Not Stuff

I

90OHM/100MHZ/330m A

90OHM/100MHZ/330m A UL29

UL29

2 3

URN102B

Do Not Stuff

I

90OHM/100MHZ/330m A

90OHM/100MHZ/330m A UL31

UL31

2 3

URN103B

Do Not Stuff

I

90OHM/100MHZ/330m A

90OHM/100MHZ/330m A UL32

UL32

2 3

URN104B

URN101A

URN102A

URN103A

URN104A

HDMI_CLKP_PCH[21]

B B

HDMI_CLKN_PC H[21]

HDMI_TXP0_PCH[21]

HDMI_TXN0_PCH[21]

HDMI_TXP1_PCH[21]

HDMI_TXN1_PCH[21]

HDMI_TXP2_PCH[21]

HDMI_TXN2_PCH[21]

HDMI_CLK_PCH[21]

HDMI_DAT_PCH[21]

SFA1.01

A A

SFA1.01SFA1.01

5

EMI

HDMI_CLKP_PCH _R

HDMI_CLKN_PC H_R

HDMI_TXP0_PCH _R

HDMI_TXN0_PCH _R

HDMI_TXP1_PCH _R

HDMI_TXN1_PCH _R

HDMI_TXP2_PCH _R

HDMI_TXN2_PCH _R

HDMI_CLK_PCH _R

HDMI_DAT_PCH _R

修修修修修修修修

(PCH)

BACKLIGHT_UP[16,19,35,79]

UART_TX[16,43]

UART_RX[16,43 ] V_UP[16,17,35] V_DOWN[16,17,35] SLP_S3#[16,2 0,43,44]

Check if we need com port

4

OUT IN IN IN IN

R185 0OhmIR185 0OhmI R186 0OhmIR186 0OhmI R190 0OhmIR190 0OhmI

IN

1 2 1 2 1 2

+3P3V

1 2

R232

2.2KOHM

I

I 5%

5%

R257

2.2KOHM

I

1 2

5%

12

C44156

C44156 Do Not Stuff

Do Not Stuff

NI

12

C44155

C44155 Do Not Stuff

Do Not Stuff

NI

GNDGND GNDGND GNDGND

GNDGND

已已已已已已已已已已已已未未未未未未未未未未未未

AP_VOLUME_DO WN_NB_R

AP_VOLUME_UP_ NB_R

C44150

C44150 Do Not Stuff

Do Not Stuff

NI

12

C44151

C44151 Do Not Stuff

Do Not Stuff

NI

3

12

C44149

C44149 Do Not Stuff

Do Not Stuff

NI

12

C44154

C44154 Do Not Stuff

Do Not Stuff

NI

1.01 20101020 EMI revised

C44152

C44152 Do Not Stuff

Do Not Stuff

NI

12

C44153

C44153 Do Not Stuff

Do Not Stuff

NI

GPIO208_NB_N

1.01 20101019 EMI revised

+5VSB

+5V

12

I

+V_LCD

1.01 20101019 EMI revised

Adjust value on 5/31

12

C90

0.1UF/10V

I

CN8

1 3 5 7

9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39

GND GNDGND

1 3 5 7 9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

SIDE141SIDE2

WtoB_CON _2X20P

I

2

4

6

8

10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42

GND

5VSB_CN8

NB_PANEL_ID0 NB_PANEL_ID1

3VSB_CN8

2668_DETECT_N _NB_R 2668_LVDD_EN_N B_R 2668_BK_ENA_NB_R 2668_BK_PWM_N B_R PC_MODE_NB_ R AV_MODE_NB_R AUDIO_INDICATE_N B_R AUDIO_MUTE_N B_R PC_STATUS_ NB_R INR_NB_R INL_NB_R SPDIF-OUT_N B_R

2

I

12

C91

C44199

2.2PF/50V

2.2PF/50V Do Not Stuff

Do Not Stuff

NPO 5%

NPO 5% NI

NI

GND GND

IN

BACKLIGHT_DO WN [16,19,35 ,79]

R254 0OhmIR254 0OhmI

1 2

R255 0OhmIR255 0OhmI

1 2

R230 0OhmIR230 0OhmI

1 2

R229 0OhmIR229 0OhmI

1 2

R226 0OhmIR226 0OhmI

1 2

R227 0OhmIR227 0OhmI

1 2

R225 0OhmIR225 0OhmI

1 2

R224 0OhmIR224 0OhmI

1 2

R223 0OhmIR223 0OhmI

1 2

R221 0OhmIR221 0OhmI

1 2

R209 0OhmIR209 0OhmI

1 2

R208 0OhmIR208 0OhmI

1 2

R118 0OhmIR118 0OhmI

1 2

R204 0OhmIR204 0OhmI

1 2

I

Modified for Sc alar application on 5/26

Modified on 4/6

12

0Ohm

R37495

12

C44198

C44198 1UF/16V

1UF/16V

X7R 10%

X7R 10% I

I

GND

IN

PANEL_ID_0_R [14,16,19,79]

IN

PANEL_ID_1_R [14,16,19,79]

IN

AVIN_DET# [14,16,19,36]

IN

SCL_LCDEN [14,16]

IN

SCL_Bl_EN [14,16]

IN

SCL_Bl_PW M [14,16]

IN

PC_MODE [16,17 ]

IN

AV_MODE [16,17]

IN

AUDIO_INDICATE [16,29,32]

IN

AUDIO_MUTE [16,31]

IN

PC_STATUS [1 6,19]

IN

INR [16,32]

IN

INL [16,32]

IN

SPDIF-OUT [16,29]

NI

Do Not Stuff

R37512

SFA1.01

SFA1.01SFA1.01

+3P3VSB

C111

C111 Do Not Stuff

Do Not Stuff

NPO 5%

NPO 5% NI

NI

+3P3V

12

I

NI

0Ohm

Do Not Stuff

R215

R239

12

C88

C75

0.1UF/10V

I

GND GND Modified on 5/20

PEGATRON C ORPORATION

Size Project Name

A2

Date: Sheet of

IPPSB-FA

1

1.01 20101019 EMI revised

12

C113

C113 Do Not Stuff

Do Not Stuff

NPO 5%

NPO 5% NI

NI

LVDS CON

Title :

Engineer:

Mike Yen

Rev

1.01

15 79Wednesd ay, April 27, 2011

5

www.teknisi-indonesia.com

4

3

2

1

12

C234

0.1UF/25V

+V_LCD

I

GNDGNDGND

12

C235

C235 1UF/16V

1UF/16V

I

1.01 20101019 EMI revised

12

C236

C236 10PF/50V

10PF/50V

NPO 5%

NPO 5% I

I

URN41B

UL25

90OHM/100MHZ/330m A

URN41A

URN43B

UL26

90OHM/100MHZ/330m A

URN43A

URN45B

UL27

90OHM/100MHZ/330m A

URN45A

URN47A

90OHM/100MHZ/330m A

UL28

URN47B

34

NI

Do Not Stuff

IN

14

23

I

12

NI

Do Not Stuff

34

NI

Do Not Stuff

14

23

I

12

NI

Do Not Stuff

34

NI

Do Not Stuff

14

23

I

12

NI

Do Not Stuff

12

Do Not Stuff

NI

I

1 4

2 3

34

Do Not Stuff

NI

IN

LVDS_L3N_MXM [74]

IN

LVDS_LCLKP_MXM [74]

IN

LVDS_LCLKN_MX M [74]

IN

LVDS_L2N_MXM [74]

IN

LVDS_L3P_MXM [74]

LVDS_L2P_MXM [74]

LVDS_L1P_MXM [74]

LVDS_L1N_MXM [74]

Adjust value on 5/31

已已已已已已已已已已已已未未未未未未未未

3 4

Do Not Stuff

URN32B

NI

1 2

NI

1 4

3 4

Do Not Stuff

NI

1 2

NI

1 4

3 4

Do Not Stuff

NI

3 4

NI

14

1 2

Do Not Stuff

NI

1 2

NI

1 4

3 4

Do Not Stuff

NI

3 4

NI

14

1 2

Do Not Stuff

NI

14

1 2

NI

Do Not Stuff

I

90OHM/100MHZ/330m A

90OHM/100MHZ/330m A UL24

UL24

2 3

URN39B

Do Not Stuff

I

90OHM/100MHZ/330m A

90OHM/100MHZ/330m A UL20

UL20

2 3

URN31B

Do Not Stuff

23

UL22

UL22 90OHM/100MHZ/330m A

90OHM/100MHZ/330m A

I

URN35A

Do Not Stuff

I

90OHM/100MHZ/330m A

90OHM/100MHZ/330m A UL23

UL23

2 3

URN37B

Do Not Stuff

23

UL21

UL21 90OHM/100MHZ/330m A

90OHM/100MHZ/330m A

I

URN33A

SFA1.01

SFA1.01SFA1.01

Do Not Stuff

URN39A

URN31A

URN35B

URN37A

URN33B

23

UL10

UL10 90OHM/100MHZ/330m A

90OHM/100MHZ/330m A

I

URN32A

LVDS_U0N_MXM[74]

D D

C C

LVDS_U0P_MXM[74]

LVDS_U1N_MXM[74]

LVDS_U1P_MXM[74]

LVDS_U2N_MXM[74]

LVDS_U2P_MXM[74]

LVDS_UCLKN _MXM[74]

LVDS_UCLKP_M XM[74]

LVDS_U3N_MXM[74]

LVDS_U3P_MXM[74]

LVDS_L0N_MXM[74]

LVDS_L0P_MXM[74]

IN

LVDS CONN (GPU)

LVDS_U0N_MXM_ CON LVDS_U0P_MXM_C ON LVDS_U1N_MXM_ CON LVDS_U1P_MXM_C ON LVDS_U2N_MXM_ CON LVDS_U2P_MXM_C ON

LVDS_UCLKN _MXM_CON LVDS_UCLKP_M XM_CON LVDS_U3N_MXM_ CON LVDS_U3P_MXM_C ON LVDS_L0N_MXM_C ON LVDS_L0P_MXM_CO N

P7

1

3

5

7

9

11

13

15

17

19

21

23

25

27

29

WtoB_CON _2X15P

I

GND

I

SIDE2

SIDE1

32 2

2

4

6

R337 Do Not StuffNIR337 Do Not StuffNI

8

1 2

8

10

12

14

16

18

20

22

24

26

28

30

31

GND

www.rosefix.com

12

C233

2.2PF/50V

I

LVDS_L3P_MXM_CO N LVDS_L3N_MXM_C ON LVDS_LCLKP_MXM_C ON LVDS_LCLKN_MX M_CON LVDS_L2P_MXM_CO N LVDS_L2N_MXM_C ON LVDS_L1P_MXM_CO N LVDS_L1N_MXM_C ON

12

NI

CB21

CB21 Do Not Stuff

Do Not Stuff

mx_c0603_small

Y5V +80-20%

+V_LCD

12

NI

CB22

CB22 Do Not Stuff

Do Not Stuff

mx_c0603_small

Y5V +80-20%

GND

B B

AV Board connector

3 4

Do Not Stuff

URN105B

NI

14

1 2

Do Not Stuff

NI

3 4

NI

Do Not Stuff

14

1 2

NI

3 4

NI

Do Not Stuff

14

1 2

NI

3 4

NI

Do Not Stuff

14

1 2

NI

3 4

I

0

14

1 2

I

23

UL34

UL34 90OHM/100MHZ/330m A

90OHM/100MHZ/330m A

I

URN105A

URN106B

23

UL35

UL35 90OHM/100MHZ/330m A

90OHM/100MHZ/330m A

I

URN106A

Do Not Stuff

URN107B

23

UL36

UL36 90OHM/100MHZ/330m A

90OHM/100MHZ/330m A

I

URN107A

Do Not Stuff

URN108B

23

UL37

UL37 90OHM/100MHZ/330m A

90OHM/100MHZ/330m A

I

URN108A

Do Not Stuff

URN109B

23

UL38

UL38 Do Not Stuff

Do Not Stuff

NI

URN109A

0

HDMI_CLKP_GPU[71]

HDMI_CLKN_GPU[71]

HDMI_TXP0_GPU[71]

HDMI_TXN0_GPU[71]

HDMI_TXP1_GPU[71]

HDMI_TXN1_GPU[71]

HDMI_TXP2_GPU[71]

A A

HDMI_TXN2_GPU[71]

HDMI_DDC_C LK[71]

HDMI_DDC_D AT[71]

5

EMI

HDMI_CLKP_GPU _R

HDMI_CLKN_GPU _R

HDMI_TXP0_GPU_ R

HDMI_TXN0_GPU _R

HDMI_TXP1_GPU_ R HDMI_TXN1_GPU _R HDMI_TXP2_GPU_ R HDMI_TXN2_GPU _R

修修修修修修修修

(GPU)

HDMI_DDC_C LK_R

HDMI_DDC_D AT_R

UART_TX[15,43]

UART_RX[15,43 ] V_UP[15,17,35] V_DOWN[15,17,35] SLP_S3#[15,20,43,44]

Check if we need com port

4

OUT IN IN IN IN

R352 0OhmIR352 0OhmI R355 0OhmIR355 0OhmI R357 0OhmIR357 0OhmI

1 2 1 2 1 2

+3P3V

已已已已已已已已已已已已未未未未未未未未未未未未

+V_LCD

12

C237

0.1UF/10V

GND

5VSB_CN26

GPU_PANEL_ID0 GPU_PANEL_ID1

3VSB_CN26

2668_DETECT_N _GPU_R 2668_LVDD_EN_G PU_R 2668_BK_ENA_GPU _R 2668_BK_PWM_G PU_R PC_MODE_GPU _R AV_MODE_GPU_ R AUDIO_INDICATE_G PU_R AUDIO_MUTE_G PU_R PC_STATUS_ GPU_R INR_GPU_R

INL_GPU_R

SPDIF-OUT_G PU_R

1.01 20101019 EMI revised

Adjust value on 5/31

12

C238

2.2PF/50V

2.2PF/50V Do Not Stuff

Do Not Stuff

I

NPO 5%

GND GND GND

NI

IN

BACKLIGHT_DO WN [15,19,35 ,79]

R344 0OhmIR344 0OhmI

1 2

R343 0OhmIR343 0OhmI

1 2

R345 0OhmIR345 0OhmI

1 2

R347 0OhmIR347 0OhmI

1 2

R346 0OhmIR346 0OhmI

1 2

R348 0OhmIR348 0OhmI

1 2

R350 0OhmIR350 0OhmI

1 2

R349 0OhmIR349 0OhmI

1 2

R351 0OhmIR351 0OhmI

1 2

R354 0OhmIR354 0OhmI

1 2

R353 0OhmIR353 0OhmI

1 2

R356 0OhmIR356 0OhmI

1 2

R358 0OhmIR358 0OhmI

1 2

R359 0OhmIR359 0OhmI

1 2

2

R339

R340

2.2KOHM

I

1 2

I

I 5%

5%

1 2

5%

BACKLIGHT_UP[15,19,35,79]

12

C245

C44253

Do Not Stuff

NI

12

C44254

C44254 Do Not Stuff

Do Not Stuff

NI

GNDGND GNDGND GNDGND

GNDGND

12

C248

C248 Do Not Stuff

Do Not Stuff

NI

12

C246

C246 Do Not Stuff

Do Not Stuff

NI

IN

AP_VOLUME_DO WN_GPU_R

AP_VOLUME_UP_ GPU_R

12

C247

C247 Do Not Stuff

Do Not Stuff

NI

12

C250

C249

Do Not Stuff

NI

1.01 20101020 EMI revised

3

GPIO208_GPU_N

CN26

1 3 5 7

9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39

GND GNDGND

1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 SIDE141SIDE2

Do Not Stuff

NI

2

4

6

8

10

12

14

16

18

20

22

24

26

28

30

32

34

36

38

40

42

C241

I

Modified for Sc alar application on 5/26

IN IN

Modified on 4/6

IN IN IN IN IN IN IN IN IN IN IN IN

+5VSB

+5V

12

I

12

0Ohm

R341

R37575

1.01 20101019 EMI revised

12

C239

C239 1UF/16V

1UF/16V

X7R 10%

X7R 10% I

I

PANEL_ID_0_R [14,15,19,79] PANEL_ID_1_R [14,15,19,79]

AVIN_DET# [14,15,19,36] SCL_LCDEN [14,15] SCL_Bl_EN [14,15] SCL_Bl_PW M [14,15] PC_MODE [15,17 ] AV_MODE [15,17] AUDIO_INDICATE [15,29,32]

AUDIO_MUTE [15,31] PC_STATUS [1 5,19] INR [15,32] INL [15,32] SPDIF-OUT [15,29]

NI

Do Not Stuff

+3P3VSB

C240

C240 Do Not Stuff

Do Not Stuff

NPO 5%

NPO 5% NI

NI

+3P3V

12

GND GND Modified on 5/20

PEGATRON C ORPORATION

Date: Sheet of

I

0Ohm

R342

C242

0.1UF/10V

I

Size Project Name

A2

R37576

12

NI

Do Not Stuff

C243

0.1UF/10V

I

12

IPPSB-FA

1.01 20101019 EMI revised

C244

C244 Do Not Stuff

Do Not Stuff

NPO 5%

NPO 5% NI

NI

LVDS CON

Title :

Engineer:

Mike Yen

16 79Wednesd ay, April 27, 2011

1

Rev

1.01

5

www.teknisi-indonesia.com

Strapping Options Flash

NOTE:

SATA1GP /GPIO19

0 0

D D

C C

1 0

+3P3V

I2C/en(dis)able/S3 for accelerometer

B B

A A

11

Boot DeviceGNT1#

I

XY5

Crystal Holder

5

LPC

PCI

SPI

SMB_CLK[27,45] SMB_DAT A[27,45]

SRTCRST #[39]

3 4 7 8 1 2 1 2

SML1_CL K[13] SML1_DA TA[13]

RTCRST#[39]

CK_33M_ PCIFB[22]

8.2KOHM

5%

8.2KOHM

5%

I

8.2KOHM

5%

I

I 5%

5%

I

I I

I

+3P3VSB

RN5023B

RN5023B RN5026D

RN5026D RN5026A

RN5026A RN5022A

RN5022A

+3P3V

12

PC_MODE[15,16] AV_MODE[15,16]

V_DOW N[15,16,35]

SR5

2.7K

NI

SC1

SC1 Do Not Stuff

Do Not Stuff

NPO 5%

12

V_UP[15,16,35]

I

SC8

SC8 18PF/50V

18PF/50V

NPO 5%

4

12

NI

SR4

SR4 Do Not Stuff

Do Not Stuff

1 2 5 6 5 6 5 6 3 4 7 8 7 8 7 8

12

I

SR6

2.7K

12

NI

SC2

SC2 Do Not Stuff

Do Not Stuff

NPO 5%

I

Y5

32.768Kh z

1

GND GND

324

3

4

3

+3P3V

IPU 20K

RN5024A

8.2KOHM

5%

8.2KOHM

I

8.2KOHM

5%

8.2KOHM

5%

I

8.2KOHM

5%

I

8.2KOHM

5%

I

8.2KOHM

5%

I

8.2KOHM

5%

I

I 5%

5%

I

I I

I

12

GNDGNDGNDGND

I

VP

SR14

1 2

0

RN5024A

RN5024C

RN5024C RN5026B

RN5026B RN5024B

RN5024B RN5023A

RN5023A RN5023C

RN5023C RN5022B

RN5022B RN5024D

RN5024D

IPU 20K IPU 20K

NI

SR1

SR1 Do Not Stuff

Do Not Stuff

12

I

SR9

2.2K

12

NI

SC5

SC5 Do Not Stuff

Do Not Stuff

NPO 5%

Native CoreIPU 20K Native Core Native Core

Native Core Native Core Native Core

GPI Core GPI Core GPI Core GPI Core

12

I

SR10

2.2K

Native Sus Native Sus

12

NI

SC6

SC6 Do Not Stuff

Do Not Stuff

NPO 5%

PCH_RTC X1

PCH_RTC X2

12

I

SC9

SC9 18PF/50V

18PF/50V

NPO 5%

1 2

5 6 3 4 3 4 1 2 5 6 3 4 7 8

12

NI

SR3

SR2

Do Not Stuff

www.rosefix.com

RN5025A

8.2KOHM

8.2KOHM RN5026C

RN5026C

8.2KOHM

5%

RN5025C

8.2KOHM

5%

I

RN5022C

8.2KOHM

5%

I

RN5025B

8.2KOHM

5%

I

RN5023D

8.2KOHM

5%

I

RN5025D

8.2KOHM

5%

I

RN5022D

8.2KOHM

5%

I

I 5%

5%

I

I I

I

12

I

SR7

SR8

2.2K

12

NI

SC3

SC44

Do Not Stuff

NPO 5%

GNDGNDGNDGND GNDGND

I

SR15

SR15 10M

10M

1 2

mx_r0603_small

Y5_RTC

2

4

GND GNDGND

I

U2A

AV14

PCIRST#

AV15

PME#

BH8

PAR

BH9

DEVSEL#

BD15

CLKIN_PCILOOPBACK

BF11

IRDY#

BR6

SERR#

BC12

STOP#

BA17

PLOCK#

BC8

TRDY#

BM3

PERR#

BC11

FRAME#

BE2

GNT3#/GPIO55

BU12

GNT2#/GPIO53

AV8

GNT1#/GPIO51

BA15

GNT0#

AV11

REQ3#/GPIO54

BK8

REQ2#/GPIO52

BT5

REQ1#/GPIO50

BG5

REQ0#

BK10

PIRQA#

BJ5

PIRQB#

BM15

PIRQC#

BP5

PIRQD#

BN9

PIRQE#/GPIO2

AV9

PIRQF#/GPIO3

BT15

PIRQG#/GPIO4

BR4

PIRQH#/GPIO5

BT47

SMBCLK

BR49

SMBDATA

BT51

SML0CLK

BM50

SML0DATA

BJ46

SML1CLK/GPIO58

BK46

SML1DATA/GPIO75

BT41

RTCRST#

BN37

SRTCRST#

BR39

RTCX1

BN39

RTCX2

COUGARP OINT

PCI

SMBUS

SMBALERT#/GPIO11

SML0ALERT#/GPIO60

SML1ALERT#/PCHHOT#/GPIO74

Rev=1.0

3

SPIRTC

SPI_CS1#

SPI_CS0# SPI_MOSI SPI_MISO

C/BE0# C/BE1# C/BE2# C/BE3#

AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8

AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31

SPI_CLK

BN4 BP7 BG2 BP13

12/6 0200-00JK000--->0200-00KJ000

BF15 BF17 BT7 BT13 BG12 BN11 BJ12 BU9 BR12 BJ3 BR9 BJ10 BM8 BF3 BN2 BE4 BE6 BG15 BC6 BT11 BA14 BL2 BC4 BL4 BC2 BM13 BA9 BF9 BA8 BF8 AV17 BK12

Native Sus

BN49

Native Sus

BU49

Native Sus

BR46

AR56 AT57 AU53 AT55 AR54

IPD 20K IPU 20K

PCH_SPI_C S1# PCH_SPI_C S0# PCH_SPI_M OSI

PCH_SPI_C LK

2

+3P3VSB +3P3VSB+3P 3VSB

12

+3P3VSB

2

I

SR16

SR16 10K

10K

12

NI

SR19

SR19 Do Not Stuff

Do Not Stuff

12

1

12

I

SR17

2.2K

ST39

I

SR18

SR18 10K

10K

NOBOM

0413

PEGATRON DT-MB RESTRICTED SECRET

PEGATRO N CORPORATION

Size Project Name

A3

Date: Sheet of

IPPSB-FA

SPI_CS0# [45] SPI_MOSI [4 5] SPI_MISO [4 5] SPI_CLK [45]

Title :

Engineer:

1

PCI/SM/SPI/RTC 1-9

Mike Yen

17 79W ednesday, April 27, 2011

Rev

1.01

5

www.teknisi-indonesia.com

D D

NOTE:

Used for for DMI, PCIe(PCIe 2.0 jitter spec compliant).

12

C C

GND GND

4

DMI_TXN0[6] DMI_TXP0[6] DMI_RXN0[6] DMI_RXP0[6]

DMI_TXN1[6] DMI_TXP1[6] DMI_RXN1[6] DMI_RXP1[6]

DMI_TXN2[6] DMI_TXP2[6] DMI_RXN2[6] DMI_RXP2[6]

DMI_TXN3[6] DMI_TXP3[6] DMI_RXN3[6] DMI_RXP3[6]

12

I

SR36

SR36 10K

10K

I

SR37

www.rosefix.com

10K

NOTE:

trace length < 450 mils

+1P05V_ PCH

12

DMI2RBIAS

12

I

SR30

49.9

1%

DMICOMP

I

SR31

SR31 750

750

1%

D33 B33

H36

A36 B35 P38 R38

B37 C36 H38

E37 F38 M41 P41

P33 R33

B31 E31

A32

J36

J38

U2B

DMI0RXN DMI0RXP DMI0TXN DMI0TXP

DMI1RXN DMI1RXP DMI1TXN DMI1TXP

DMI2RXN DMI2RXP DMI2TXN DMI2TXP

DMI3RXN DMI3RXP DMI3TXN DMI3TXP

CLKIN_DMI_N CLKIN_DMI_P

DMI

DMI_IRCOMP DMI_ZCOMP

DMI2RBIAS

3

BF36

USB

USBP0N

USBP0P

USBP1N

USBP1P

USBP2N

USBP2P

USBP3N

USBP3P

USBP4N

USBP4P

USBP5N

USBP5P

USBP6N

USBP6P

USBP7N

USBP7P

USBP8N

USBP8P

USBP9N

USBP9P

USBP10N USBP10P

USBP11N USBP11P

USBP12N USBP12P

USBP13N USBP13P

BD36

BC33 BA33

BM33 BM35

BT33 BU32

BR32 BT31

BN29 BM30

BK33 BJ33

BF31 BD31

BN27 BR29

BR26 BT27

BK25 BJ25

BJ31 BK31

BF27 BD27

BJ27 BK27

IPD 20K IPD 20K

USBN0 [35] USBP0 [35]

USBN1 [35] USBP1 [35]

USBN2 [34] USBP2 [34]

USBN3 [34] USBP3 [34]

USBN4 [34] USBP4 [34]

USBN5 [34] USBP5 [34]

USBN8 [39] USBP8 [39]

USBN9 [78] USBP9 [78]

USBN_W eb [39]

USBP_W eb [3 9]

2

side x2

Rear x4

Touch Panel

CARD READER

Web Can

+3P3VSB

#1 USB Debug port

R179 0 Ohm IR179 0 Ohm I R178 0 Ohm IR178 0 Ohm I

R181 Do Not S tuffNIR18 1 Do Not Stuff NI R180 Do Not S tuffNIR18 0 Do Not Stuff NI

#9 USB Debug port

1 2 1 2

USBN10 [37] USBP10 [37 ]

HUB_USB N10 [3 3] HUB_USB P10 [33]

1

WL

HUB

Native Sus

USBRBIAS

BM43 BD41 BG41 BK43 BP43 BJ41 BT45 BM45

BD38 BF38

BP25 BM25

Native Sus Native Sus Native Sus Native Sus Native Sus Native Sus Native Sus

USBRBIAS

12

GND

OC6#/GPIO1 0 OC7#/GPIO1 4

12

I

SR33

SR33 10K

10K

I

SR35

22.6

1%

GND

B B

WLAN

TVT

LAN

for H61, PCIe ports 7 and 8 are disabled.

A A

5

PE1_RXN 0_WLAN[37] PE1_RXP 0_WLAN[3 7] PE1_TXN 0_WLAN[37] PE1_TXP 0_WLAN[37]

PE1_RXN 1_TV[3 8] PE1_RXP 1_TV[38] PE1_TXN 1_TV[38] PE1_TXP 1_TV[38]

PCIE_RXN4 _LAN[27]

PCIE_RXP4 _LAN[27] PCIE_TXN4 _LAN[27 ] PCIE_TXP4 _LAN[27]

SC29 0.1UF/16V X7R 10%

I

I I

I

I I

I

I I

I

12

SC32 0.1UF/16V X7R 10%

12

SC33 0.1UF/16V X7R 10%

12

SC34 0.1UF/16V X7R 10%

12

SC15 0.1UF/16V X7R 10%

12

SC16 0.1UF/16V X7R 10%

12

ST16

NOBOM

ST14

NOBOM

ST13

NOBOM

ST15

NOBOM

ST9

NOBOM

ST10

NOBOM

ST11

NOBOM

ST12

NOBOM

4

PE1_TXN 0_WLAN_C PE1_TXP 0_WLAN_C

PE1_TXN 1_TV_C PE1_TXP 1_TV_C

PCH_PE1 _TXN1_C PCH_PE1 _TXP1_C

TP_PCH_ RN7

1

TP_PCH_ RP7

1

TP_PCH_ TN7

1

TP_PCH_ TP7

1

TP_PCH_ RN8

1

TP_PCH_ RP8

1

TP_PCH_ TN8

1

TP_PCH_ TP8

1

J20 L20 F25 F23

P20 R20 C22 A22

H17

J17 E21 B21

P17 M17 F18 E17

N15 M15 B17 C16

J15 L15 A16 B15

J12 H12 F15 F13

H10

J10 B13 D13

COUGARP OINT

PERn1 PERp1 PETn1 PETp1

PERn2 PERp2 PETn2 PETp2

PERn3 PERp3 PETn3 PETp3

PERn4 PERp4 PETn4 PETp4

PERn5 PERp5 PETn5 PETp5

PERn6 PERp6 PETn6 PETp6

PERn7 PERp7 PETn7 PETp7

PERn8 PERp8 PETn8 PETp8

PCIE

OC0#/GPIO59 OC1#/GPIO40 OC2#/GPIO41 OC3#/GPIO42 OC4#/GPIO43

OC5#/GPIO9 OC6#/GPIO10 OC7#/GPIO14

CLKIN_DOT_96N CLKIN_DOT_96P

USBRBIAS#

3

OC01# [35] OC23# [34] OC48# [34]

7 8

8.2KOHM

1 2 5 6

I

3 4

I I I

R37567D

R37567D R37567A8.2KOHMIR37567A8.2KOHM R37567C8.2KOHMIR37567C8.2KOHM R37567B8.2KOHMIR37567B8.2KOHM

12

I

SR32

SR32 10K

10K

NOTE:

Used for integrated graphics, generate USB backbone,

24MHz HDA bit, and 48MHz clock.

12

I

SR34

SR34 10K

10K

GNDGND

NOTE:

trace length < 200 mils

0413

PEGATRON DT-MB RESTRICTED SECRET

PEGATRO N CORPORATION

Size Project Name

A3

Date: Sheet of

2

Date: Sheet of

IPPSB-FA

Title :

Engineer:

1

PCIE/USB/DMI 2-9

Mike Yen

18 79W ednesday, April 27, 2011

Rev

1.01

5

www.teknisi-indonesia.com

4

3

2

1

NOTE:

SR40 SR41

I NI

NI I

D D

SR41 0

1 2

I

PCH_PW ROK[2 0,43]

+3P3V

C C

B B

+3P3V

SR59 10K

1 2

I

SR56 10K

1 2

I

SR57 10K

1 2

I

SR58 10K

1 2

I

A A

I

3 4 7 8 3 4 7 8 5 6 5 6 1 2 1 2

CLPW D#[39]

PC_STAT US[15,16]

5

10KOHM

10KOHM 10KOHM

10KOHM

5%

10KOHM

5%

I

10KOHM

5%

I

10KOHM

5%

I

10KOHM

5%

I

10KOHM

5%

I

10KOHM

5%

I

I 5%

5%

I

I I

I

RN5027B

RN5027B RN5027D

RN5027D RN5028B

RN5028B RN5028D

RN5028D RN5028C

RN5028C RN5027C

RN5027C RN5027A

RN5027A RN5028A

RN5028A

PANEL_ID_ 2_R[14,79]

SDATAOU T0/GPIO39

Description

iAMT

non iAMT

TOUCH_E N[39] BACKLIGHT _UP[15,16,35,7 9] BACKLIGHT _DOWN[15,16,35,7 9]

GND

12

NOBOM

NOBOM NOBOM

NOBOM

NI

SC30

SC30 Do Not Stuff

Do Not Stuff

NPO 5%

U2C

CLINK

BF50 BF49

BT21

CLINK

CL_CLK1 CL_DATA1 CL_RST1#

APWROK

PWM0 PWM1 PWM2 PWM3

FAN

ST24

ST24 ST25

ST25 ST26

ST26 ST27

ST27

IPU 32/ IPD 100 IPU 32/ IPD 100

PCH_MEP WROK

TP_PCH_ PWM0

1

TP_PCH_ PWM1

1

TP_PCH_ PWM2

1

TP_PCH_ PWM3

1

BA50

BC46

BN21

BM20 BN19

www.rosefix.com

GPI Core GPI Core GPI Core GPI Core GPI Core

GPI Core Native Core Native Core

SST

IPD 10K

12

NI

SC31

SC31 Do Not Stuff

Do Not Stuff

X7R 10%

GND

GPI Core

12

I

SR38

SR38 10K

10K

GND GND

NI

SR71

SR71 Do Not Stuff

Do Not Stuff

AW53

12

SR39

SR39 10K

10K

BT17

TACH0/GPIO17

BR19

TACH1/GPIO1

BA22

TACH2/GPIO6

BR16

TACH3/GPIO7

BU16

TACH4/GPIO68

BM18

TACH5/GPIO69

BN17

TACH6/GPIO70

BP15

TACH7/GPIO71

BC43

SST

BA53

SCLOCK/GPIO22

BE54

SLOAD/GPIO38

BF55

SDATAOUT0/GPIO39 SDATAOUT1/GPIO48

AF55

CLKIN_SATA_N

AG56

CLKIN_SATA_P

I

AY20

NC_1

COUGARP OINT

GPIO

1 2

4

NI

SR69

SR69 Do Not Stuff

Do Not Stuff

GNDGND

IPU 20K IPU 20K IPU 20K IPU 20K IPU 20K IPU 20K IPU 20K IPU 20K

1 2

SATA0RXN SATA0RXP SATA0TXN SATA0TXP

SATA1RXN SATA1RXP SATA1TXN SATA1TXP

SATA2RXN SATA2RXP SATA2TXN SATA2TXP

SATA3RXN SATA3RXP SATA3TXN SATA3TXP

SATA4RXN SATA4RXP SATA4TXN SATA4TXP

SATA5RXN SATA5RXP SATA5TXN SATA5TXP

SATA0GP/GPIO21 SATA1GP/GPIO19 SATA2GP/GPIO36 SATA3GP/GPIO37 SATA4GP/GPIO16 SATA5GP/GPIO49

SATAICOMPI

SATAICOMPO

SATA3COMPI

SATA3RCOMPO

SATALED#

TP16

SATA3RBIAS

HOST

A20GATE

INIT3_3V#

RCIN#

SERIRQ

THRMTRIP#

PMSYNCH

3

PECI

AC56 AB55 AE46 AE44

AA53 AA56 AG49 AG47

AL50 AL49 AL56 AL53

AN46 AN44 AN56 AM55

AN49 AN50 AT50 AT49

AT46 AT44 AV50 AV49

GPI Core

BC54

GPI Core

AY52

GPI Core

BB55

GPI Core

BG53

GPI Core

AU56

GPI Core

BA56

NOTE:

trace length

< 450 mils

AJ55 AJ53

AE54 AE52

OD

BF57

AE50

SATA3RB IAS

AC52

BB57

IPU 20K

BN56 BG56 AV52 E56

IPD 0.35K

H48 F55

IPU 20K IPD 20K IPD 20K

SATAICOMP

SATA3CO MP

12

GND

INIT3_3V#

SATA2GP _GPIO36 SATA3GP _GPIO37 SATA4GP _GPIO16

+1P05V_ PCH

12

I

SR66

37.4

1%

NOTE:

trace length < 450 mils

I

SR70

SR70 750

750

1%

12

NI

SR79

SR79 Do Not Stuff

Do Not Stuff

+3P3V

GND

GPU_TRIP#[43,54,6 9]

SATA_RX N0 [26] SATA_RX P0 [26]

SATA_TX N0 [26] SATA_TX P0 [2 6]

SATA_RX N1 [26] SATA_RX P1 [26]

SATA_TX N1 [26] SATA_TX P1 [2 6]

SFA1.02

+1P05V_ PCH

12

I

SR67

49.9

1%

GND GND

NOTE:

trace length < 200 mils

+3P3V +3P3V

+3P3V

I

SR74

SR74 10K

10K

12

I

SR72

SR72 10K

10K

3

1

G

2

NI

2

12

1 2

SR304 Do No t Stuff

12

D

S

I

SR138

SR138 10K

10K

Q9359

Q9359 Do Not Stuff

Do Not Stuff

NI

SFA1.04

12

I

SR298

SR298 10K

10K

12

I

SR73

SR73 10K

10K

PANEL_ID_ 0_R [14,15,16,79]

PANEL_ID_ 1_R [1 4,15,16,79]

I

SR6010K

12

SR6110K

12

I

SR62Do Not Stuff

12

NI

SR63Do Not Stuff

12

NI

I

SR6410K

12

SR6510K

12

I

12

R37602

0 Ohm

I

A20GATE [43]

RST_KB# [43]

SERIRQ [43]

H_THMTR IP# [7 ,54] PECI_PCH [7] PM_SYNC [7]

0413

PEGATRON DT-MB RESTRICTED SECRET

PEGATRO N CORPORATION

Size Project Name

A3

Date: Sheet of

AVIN_DET# [14,15,16,3 6]

+3P3V

12

I

SR68

SR68 10K

10K

IPPSB-FA

+3P3V

SFA1.02

HD_LED# [41]

Title :

Engineer:

1

SATA/HOST/FAN 3-9

Mike Yen

19 79W ednesday, April 27, 2011

Rev

1.01

5

www.teknisi-indonesia.com

+3P3V

12

NI

D D

LPC_FRA ME#[43,44]

HDA_SYNC

NOTE:

NI

SR81

SR81 Do Not Stuff

Do Not Stuff

+3P3V

NI

SR80

SR80 Do Not Stuff

Do Not Stuff

1 2

LDRQ1#_ GPIO23

LAD0[4 3,44] LAD1[4 3,44] LAD2[4 3,44] LAD3[4 3,44]

On-die PLL VR voltage selector.

Hi: supplied by 1.5V.

Low: supplied by 1.8V.

HDA_SDO

NOTE:

SFA 1.01A

Disable ME in Manufacturing Mode

C C

--> connect to 3.3VSB.

AZ_SDAT A_OUT[29]

AZ_SYNC[29]

AZ_BITCLK[29 ]

AZ_RST#[29]

J3106:23

MINI_JUMPER

I

12

NI

SC35

SC35 Do Not Stuff

Do Not Stuff

NPO 5%

GND GND GND GND

TBD

CRB 0.7 is 1.1K ohm with 1%

For platform not supporting deep sleep connect directly to RSMRST#.

The DSW rails must be stable for at least 10 ms

B B

before DPWROK is asserted to PCH.

VRM_PW RGD[43,54,58,6 4]

CPUPW RGD[7,64] DRAM_PW ROK[7] PCH_PW ROK[1 9,43]

SYS_PW ROK[43]

12

NI

SR96

SR96 Do Not Stuff

Do Not Stuff

PLTRST#[13,43,54,6 3]

SYS_RESET _DBR#[7,63,64]

PM_RSMR ST#[43]

DPWR OK[43,6 3]

A A

NI

SR191

B

1

B

1 2

Do Not Stuff

1

GND

5

SLP_SUS #

AZ_SDAT A_IN0[29]

J3106

+3P3VSB

12

NI

SC36

SC36 Do Not Stuff

Do Not Stuff

NPO 5%

SR186 D o Not Stuff

NI

12

NI

SC40

SC40 Do Not Stuff

Do Not Stuff

X5R 20%

X5R 20% mx_c0805_ small

mx_c0805_ small

SR134 0

VP

SR137 0

VP

SR143 D o Not Stuff

NI

3

C

NI

SQ3

SQ3 Do Not Stuff

Do Not Stuff

E

E 2

2

HEADER_ 1X3P

I

GND

12

NI

SC37

SC37 Do Not Stuff

Do Not Stuff

NPO 5%

1 2

12

I

SR97

SR97 10K

10K

GND GNDGNDG ND

1 2 1 2 1 2

+3VA

12

NI

SR190

SR190 Do Not Stuff

Do Not Stuff

RSMRST_ CUTOFF

J3106

213

SR113 Do Not Stuff

NI

SR85 33

I

SR86 33

I

SR87 33

I

SR88 33

I

NI

SC38

SC38 Do Not Stuff

Do Not Stuff

NPO 5%

NOBOM

NOBOM NOBOM

NOBOM

+3P3VSB

1 2

12

NI

SC41

SC41 Do Not Stuff

Do Not Stuff

NPO 5%

NI

SQ8

SQ8 Do Not Stuff

Do Not Stuff

ST30

1

ST31

1

ST32

1

1 2

NI

1 2

I

12

GND

PCH_JTA G_TMS[63] PCH_JTA G_TDO[63] PCH_JTA G_TDI[63] PCH_JTA G_TCK[63] PCH_JTA G_RST[63]

+3P3VSB

12

I

SR182

SR182 10K

10K

TBD: Both are 390Kohm in CRB 0.7

+BATT

12

I

SR144

SR144 10K

10K

12

NI

SR84

SR84 Do Not Stuff

Do Not Stuff

SQ8_C

3

C

B

1

B

1

E

E 2

2

GND

4

TP_PCH_ SDIN1 TP_PCH_ SDIN2 TP_PCH_ SDIN3

SR82 Do Not Stuff

SR82 Do Not Stuff SR83 1K

SR83 1K

HDA_SDO _R

HDA_SYNC_ R

HDA_BITCL K_24MHZ_R

HDA_AZR ST#_R

NI

SC53

SC53 Do Not Stuff

Do Not Stuff

+BATT+3P3V

12

I

SR92

SR94

390K

DSWV RMEN PCH_INTVR MEN

PCH_RSM RST#

PCH_DPO WEROK

12

NI

SC42

SR93

Do Not Stuff

NPO 5%

12

GNDGND

GND

4

3

U2D

LPC

BJ17 BJ20

BF22

BJ22

BT23

BF47

LPC

LDRQ1#/GPIO23

FWH0/LAD0 FWH1/LAD1 FWH2/LAD2 FWH3/LAD3

LDRQ0#

FWH4/LFRAME#

AUDIO

HDA_SDIN0 HDA_SDIN1 HDA_SDIN2 HDA_SDIN3

HDA_SDO

HDA_SYNC

HDA_BCLK

HDA_RST#

JTAG_TMS JTAG_TDO JTAG_TDI JTAG_TCK TP12

BMBUSY#/GPIO0

CLKRUN#/GPIO32

HDA_DOCK_EN#/GPIO33

STP_PCI#/GPIO34

GPIO35

LAN_PHY_PWR_CTRL/GPIO12

HDA_DOCK_RST#/GPIO13

PCIECLKRQ2#/GPIO20 PCIECLKRQ5#/GPIO44 PCIECLKRQ6#/GPIO45 PCIECLKRQ7#/GPIO46

SUSWARN#/SUSPWRDNACK/GPIO30

GPIO8

GPIO15

GPIO24/MEM_LED

GPIO28

SLP_LAN#/GPIO29

GPIO27 GPIO31

GPIO57

BATLOW#/GPIO72

SUSACK#

SUSCLK/GPIO62

SUS_STAT#/GPIO61

AW55 BC56 BC25 BL56 BJ57 BP51 BK50 BA25 BM55 BP53 BJ55 BH49 BJ43 BG43

AV43 BL54 AV44 BP55 BT53

AV46

BU46

BP45

BA47

BN54

GPI Core GPO Core GPO Core GPI Core GPO Core GPO Sus Native Sus GPI Sus GPO Sus GPO Sus GPO Sus GPI Sus GPI DSW GPI DSW

Native Core Native Sus Native Sus Native Sus GPI Sus

GPI DSW

IPU TBD

Native Sus

Native CoreIPU 20K

BA20

IPU 20K

BK15

IPU 20K IPU 20K IPU 20K

BG20

IPU 20K

BK17

BG17

IPD 20K

BD22

IPD 20K IPD 20K

BK22

IPD 20K

www.rosefix.com

IPD 20K

BP23

BU22

BC22

IPU 20K

BC50

IPU 20K

BC52

IPD 20K

BA43 BC49

NOTE:

SUSACK# and SUSWARN#

can be tied together if EC/SIO

does not want to involve in

12

NI

SC54

SC54 Do Not Stuff

Do Not Stuff

GND

NPO 5%

I

SR95

SR95 100K

100K

GND

BG46

BR42 BN41 BK48 BE52

BK38

12

I

SR98

SR98 100K

100K

D53

BJ38 BJ53

BT37

PROCPWRGD DRAMPWROK PWROK SYS_PWROK

DSWVRMEN INTVRMEN PLTRST# SYS_RESET#

RSMRST# DPWROK

COUGARP OINT

the handshake mechanism

for the Deep Sleep state

entry and exit.

BJ48

RI#

BC44

WAKE#

SPKR

PWRBTN#

SLP_S3# SLP_S4#

SLP_A#

SLP_SUS#

3

BM38

BE56

BT43

BM53 BN52 BH50 BC41 BD43

INTRUDER#

SLP_S5#/GPIO63

IPD 20K

IPU 20K

Native Sus

O

12

I

SR100

SR100 10K

10K

CLKRUN# _GPIO32 HDA_DOC K_EN#_GPIO33 STP_PCI#_ GPIO34

IPU 20K

IPD 20K

GPIO24_ME M_LED

IPU 20K

GPIO27

IPU 20K IPD TBD

12

GND

PCIECLKRQ 2#_GPIO20

IPU TBD IPU 20K IPU 20K

IPU 20KNative Sus

PCH_SUS WARN#

SR158 0

I

PCH_SUS ACK#

SUSCLK_ GPIO62

12

NI

SR183

SR183 Do Not Stuff

Do Not Stuff

GND

modem_wak e_event

INTRUDER#

PCH_PW RBTN#

SLP_A#

GND

2

NOTE:

+3P3V

PDG 0.7 is 1Kohm

12

NI

I

SR101

SR300

Do Not Stuff

10K

NI

SR305 Do Not Stuff

12

NI

SR155

SR155 Do Not Stuff

Do Not Stuff

1 2

12

SC45

SC45 Do Not Stuff

Do Not Stuff

NPO 5%

NI

SR111

SR112

SR112 Do Not Stuff

Do Not Stuff

GND GND

+3P3VSB

12

I

SR124

SR124 10K

10K

NI

+3P3VSB +3P3V+BATT +3P3VSB

12

I

SR75

SR75 10K

10K

TBD

+3VA

12

NI

SR159

SR159 Do Not Stuff

Do Not Stuff

12

I

SR76

SR76 1M

1M

I

SLP_S3# [15,16 ,43,44] SLP_S4# [43,44 ]

ST36

1

SLP_SUS # [43]

2

+3P3VSB +3VA

12

I

NI

SR301

SR106

10K

Do Not Stuff

12

+3P3V

12

I

SR115

SR115 10K

10K

12

NI

SR133

SR133 Do Not Stuff

Do Not Stuff

SR123 Do Not Stuff

NI

SR132 Do Not Stuff

NI

ST38

1

+3P3VSB

12

I

SR116

SR116 10K

10K

12

NI

SR117

SR117 Do Not Stuff

Do Not Stuff

GND GND

1 2

12

NOBOM

NOTE:NOTE:

PIN HIGH LOW DESCRIPTION

GPIO15

GPIO28

I

SR77

SR77 1K

1K

12

SR139 0

NOBOM

1

+3P3VSB

12

NI

SR107

SR107 Do Not Stuff

Do Not Stuff

12

NI

SR108

SR108 Do Not Stuff

Do Not Stuff

12

I

SR109

SR109 10K

10K

12

I

SR110

SR110 10K

10K

NI

12

I

SR303

SR302

10K

SHUT_DO WN# [2 9,31] PM_CLKR UN# [43] AMP_GAN 0 [31]

AMP_GAN 1 [31]

EXT_SMI# [43] EXT_SCI# [43]

SR114 Do Not Stuff

1

Market_ID [39]

ST37

12

NOBOM

SKTOCC# [7]

NOTE:

GPIO27 can be configured as wake input

to allow wakes from Deep Sleep.

12

GND

I

SR118

SR118 10K

10K

NI

SR256

SR256 Do Not Stuff

Do Not Stuff

12

I

SR119

SR119 10K

10K

12

NI

SR180

SR180 Do Not Stuff

Do Not Stuff

GNDGND

PCH_SUS _WARN# [43 ]

SUS_ACK # [4 3]

NOTE:

12

I

External PU resistor required

SR129

SR129 10K

10K

if used for CLKREQ# functionality.

WLA N_CLKREQ# [37] TVT_CLK REQ# [38]

LED_PW REN [41]

12

NI

SR130

SR130 Do Not Stuff

Do Not Stuff

Enable Disable TLS confidentiality

Enable Disable On-Die PLL VR

NI

SR78

SR78 Do Not Stuff

Do Not Stuff

PCIE_W AKE# [27,37,3 8]

SPKR [29]

PM_PW RBTN# [43]

0413

PEGATRON DT-MB RESTRICTED SECRET

AUDIO/LPC/MISC 4-9

Title :

Engineer:

PEGATRO N CORPORATION

Size Project Name

A3

Date: Sheet of

IPPSB-FA

Engineer:

Mike Yen

20 79W ednesday, April 27, 2011

1

20 79W ednesday, April 27, 2011

Rev

1.01

5

www.teknisi-indonesia.com

U2E

Y18

TP6

Y17

TP7

AB18

TP8

AB17

TP9

R393 0 Ohm 5%

R393 0 Ohm 5% R389 0 Ohm 5%

ST72

ST72 ST73

ST73

ST76

ST76 ST77

ST77

R389 0 Ohm 5%

TP_PCH_DD PBAUXP

1

TP_PCH_DD PBAUXN

1

TP_PCH_DD PDAUXP

1

TP_PCH_DD PDAUXN

1

C57 0.1UF /10V

C57 0.1UF /10V C58 0.1UF /10V

C58 0.1UF /10V

VGA_DDCA_C LK[65,74] VGA_DDCA_D ATA[6 5,74]

D D

+3P3V

NR111

+3P3V

NR118

Do Not Stuff

I

+3P3V

NI

NR111

2.2KOHM

I

NR113

2.2KOHM

I

DP_AUX_PCH _D[79]

DP_AUX#_PCH _D[79]

NOBOM

NOBOM NOBOM

NOBOM

HDMI_HPD_DMC[36]

NOBOM

NOBOM NOBOM

NOBOM

HDMI_HPD_PC H[3 6]

SFA 1.01A

NR112

2.2KOHM

R236 0Ohm

1 2

I

HDMI_CLK_DMC[37] HDMI_DATA_DM C[37]

C C

R237 0Ohm

HDMI_CLK_PCH[15]

HDMI_DAT_PCH[15]

I

1 2

I

NR114

2.2KOHM

SFA 1.01A

To enable portD

R240 0Ohm

1 2

I

EDP_HPD_PC H_D[36,79]

B B

1 2 1 2

IPD 20K

12

I

5%

100KOHM

100KOHM SR120

SR120

GND

12

I

5%

100KOHM

100KOHM SR121

SR121

GND

12 12

IPD 20K

NI

12

5%

Do Not Stuff

Do Not Stuff SR122

SR122

GND

I

AW3

I

AW1

R8 R9

AL15 AL17

T1

U14 U12

AL12 AL14

N2

N6

I

R6

I

AL9 AL8

M1

CRT_DDC_CLK CRT_DDC_DATA

DDPB_AUXP DDPB_AUXN

SDVO_CTRLCLK SDVO_CTRLDATA

DDPB_HPD

DDPC_AUXP DDPC_AUXN

DDPC_CTRLCLK DDPC_CTRLDATA

DDPC_HPD

DDPD_AUXP DDPD_AUXN

DDPD_CTRLCLK DDPD_CTRLDATA

DDPD_HPD

COUGARPO INT

I

4

VGA_HSYNC_3P3V

AR4

CRT_HSYNC CRT_VSYNC

CRT_RED

CRT_GREEN

CRT_BLUE

DAC_IREF

CRT_IRTN

DDPB_0P DDPB_0N DDPB_1P DDPB_1N DDPB_2P DDPB_2N DDPB_3P DDPB_3N

SDVO_INTP SDVO_INTN

SDVO_STALLP SDVO_STALLN

SDVO_TVCLKINP

SDVO_TVCLKINN

DDPC_0P DDPC_0N DDPC_1P DDPC_1N DDPC_2P DDPC_2N DDPC_3P DDPC_3N

DDPD_0P DDPD_0N DDPD_1P DDPD_1N DDPD_2P DDPD_2N DDPD_3P DDPD_3N

VGA_VSYNC_3P3V

AR2

VGA_RED_S

AN6

VGA_GREEN_S

AN2

VGA_BLUE_S

AM1

12

NI

SC50

SC50 Do Not Stuff

Do Not Stuff

12

Place capacitors close to PCH for EMI

DACREFSET

AT3

AM6

GND

IPD 50 IPD 50

IPD 50

DDPC_0P DDPC_0N DDPC_1P DDPC_1N DDPC_2P DDPC_2N DDPC_3P DDPC_3N

DDPB_0P DDPB_0N DDPB_1P DDPB_1N DDPB_2P DDPB_2N DDPB_3P DDPB_3N

SDVO_INTP SDVO_INTN

SDVO_STALLP SDVO_STALLN

SDVO_TVCLKINP

SDVO_TVCLKINN

R14 R12 M11 M12 H8 K8 L5 M3

U2 T3

www.rosefix.com

W3 U5

U8

U9

L2 J3 G2 G4 F3 F5 E4 E2

D5 B5 C6 D7 B7 C9 E11 B11

C32 0.1UF /10V

C32 0.1UF /10V C33 0.1UF /10V

C33 0.1UF /10V C34 0.1UF /10V

C34 0.1UF /10V C35 0.1UF /10V

C35 0.1UF /10V C36 0.1UF /10V

C36 0.1UF /10V C37 0.1UF /10V

C37 0.1UF /10V C38 0.1UF /10V

C38 0.1UF /10V C39 0.1UF /10V

C39 0.1UF /10V

1 1

1

DP2_PCH_D DP2#_PCH_D DP3_PCH_D DP3#_PCH_D

12

GND

ST78

ST78 ST79

ST79

ST83

ST83 ST84

ST84

ST85

ST86

JP20 Do Not Stuff

JP21 Do Not Stuff

JP22 Do Not Stuff

12

NI

SC51

SC52

Do Not Stuff

GNDGND GND

I

SR131

Replace DACREFSET resistor

1K

close to PCH within 500mils

1%

R205 0Ohm

12

I

R206 0Ohm

12

I

R207 0Ohm

12

I

R210 0Ohm

12

I

R211 0Ohm

12

I

R212 0Ohm

12

I

R213 0Ohm

12

I

R214 0Ohm

12

I

NOBOM

NOBOM NOBOM

NOBOM

NOBOM NOBOM

NOBOM

ST96

1

NOBOM

ST97

1

NOBOM

ST98

1

NOBOM

ST99

1

NOBOM

1 2

I

1 2

I

1 2

I

1 2

I

1 2

I

1 2

I

1 2

I

1 2

I

EDP0_PCH_D [79] EDP0#_PCH_D [79]

3

HDMI_TXP2_PCH [15] HDMI_TXN2_PCH [15]

HDMI_TXP1_PCH [15]

HDMI_TXN1_PCH [15] HDMI_TXP0_PCH [15] HDMI_TXN0_PCH [15]

HDMI_CLKP_PCH [15]

HDMI_CLKN_PC H [15]

EDP1_PCH_D [79] EDP1#_PCH_D [79 ]

NOBOM

SR245 33

I

SR246 33

I

12

I

SR247

SR248

150

1%

GND G ND GND

NOTE:

R220 Do Not S tuff

R220 Do Not S tuff R222 Do Not S tuff

R222 Do Not S tuff R228 Do Not S tuff

R228 Do Not S tuff R217 Do Not S tuff

R217 Do Not S tuff R219 Do Not S tuff

R219 Do Not S tuff R231 Do Not S tuff

R231 Do Not S tuff R216 Do Not S tuff

R216 Do Not S tuff R218 Do Not S tuff

R218 Do Not S tuff

R396

1 2 1 2

VGA_RED_J

VGA_GREEN_J

VGA_BLUE_J

12

I

SR249

SR249 150

150

1%

R394 0 Ohm 5%

R395 0 Ohm 5%

1 2

0 Ohm 5%

VGA_HSYNC [65,74] VGA_VSYNC [65,74]

I

VGA_RED [65,74]

I

VGA_GREEN [65,74]

I

VGA_BLUE [65,74]

Place RGB resistors close to PCH within 250mils

HDMI_TXP2_DMC [37] HDMI_TXN2_DMC [37]

HDMI_TXP1_DMC [37]

HDMI_TXN1_DMC [37] HDMI_TXP0_DMC [37] HDMI_TXN0_DMC [37]

HDMI_CLKP_DMC [37]

1 2

NI

1 2

NI

1 2

NI

1 2

NI

1 2

NI

1 2

NI

1 2

NI

1 2

NI

HDMI_CLKN_DM C [37]

HDMI_TXP2_MXM [70] HDMI_TXN2_MXM [70] HDMI_TXP1_MXM [70] HDMI_TXN1_MXM [70] HDMI_TXP0_MXM [70] HDMI_TXN0_MXM [70] HDMI_CLKP_MXM [70] HDMI_CLKN_MXM [70]

2

Digital Display Interface Differential Pairs

DDSP_B_TX0_DN DDSP_B_TX0_DP DDSP_B_TX1_DN DDSP_B_TX1_DP DDSP_B_TX2_DN DDSP_B_TX2_DP DDSP_B_TX3_DN DDSP_B_TX3_DP TMDSB_CLK

DDPB_HPD

SDVO_CTRLCLK

SDVO_CTRLDATA

HDMI Signals

TMDSB_DATA2# TMDSB_DATA2 TMDSB_DATA1# TMDSB_DATA1 TMDSB_DATA0# TMDSB_DATA0 TMDSB_CLK#

DDSP_B_HPD0 HDMIB_CTRL_CLK HDMIB_CTRL_DATA

1

PCH Digital Display Interface Pins

DDPB_0N DDPB_0P DDPB_1N DDPB_1P DDPB_2N DDPB_2P DDPB_3N DDPB_3P

Hot plug detect used by HDMI Port B.

HDMI DDC lines for Port B

A A

PEGATRON DT-MB RESTRICTED SECRET

0413

5

4

3

0413

PEGATRON C ORPORATION

Size Project Name

A2

IPPSB-FA

Date: Sheet of

2

Date: Sheet of

IPPSB-FA

1

Title :

Engineer:

VGA/DP/HDMI 5-9

Mike Yen

21 79Wednesd ay, April 27, 2011

Rev

1.01

5

www.teknisi-indonesia.com

FDI_TXN0[6] FDI_TXP0[6] FDI_TXN1[6] FDI_TXP1[6] FDI_TXN2[6] FDI_TXP2[6] FDI_TXN3[6]

D D

HR23 4.7K

I

PROC_SE L[7 ]

I

FDI_TXP3[6] FDI_TXN4[6] FDI_TXP4[6] FDI_TXN5[6] FDI_TXP5[6] FDI_TXN6[6] FDI_TXP6[6] FDI_TXN7[6] FDI_TXP7[6]

12

Place HR23 close to NVRAM connector

and minimize this stub to <100 mils

with PCH and NVRAM connector

C C

12

B B

A A

12

I

SC55

SC55 27PF/50V

27PF/50V

NPO 5%

GND GND GND

5

12

I

SR125

SR125 10K

10K

GND GND GND GND

SR140

1 2

1MOHM

I

Y12

Y12 25Mhz

25Mhz

I

1 2

SR142

1 2

GND

0

1 2

12

I

SR126

SR127

10K

GND

1%I SR140

1%I

Y10_R

3

12

4

DF_TVS

+1P05V_ PCH

12

PCH_CLK IN_BCLK_GND0# PCH_CLK IN_BCLK_GND0

PCH_CLK IN_DMI2_GND1# PCH_CLK IN_DMI2_GND1

12

I

SR128

SR128 10K

10K

SR157 10K

I

SC56

SC56 27PF/50V

27PF/50V

NPO 5%

4

3

U2F

C42

FDI_RXN0

B43

FDI_RXP0

F45

FDI_RXN1

F43

FDI_RXP1

H41

FDI_RXN2

J41

FDI_RXP2

C46

FDI_RXN3

D47

FDI_RXP3

B45

FDI_RXN4

A46

FDI_RXP4

B47

FDI_RXN5

C49

FDI_RXP5

J43

FDI_RXN6

H43

FDI_RXP6

M43

FDI_RXN7

P43

FDI_RXP7

M48

AB46

W53

R47 Y41 M50 M49 U43

G56

K49 K50

Y44 L53

AL2

V52

R27 P27

AN8

AJ3

AJ5

H31

C29 E29

L27 F28 E27

L25 C26 B27 L22

B25 D25

J57

J31

J27

J25

J22

Reserved_001 DF_TVS Reserved_002 Reserved_003 Reserved_004 Reserved_005 Reserved_006

Reserved_007 Reserved_008 Reserved_009 Reserved_010

Reserved_011 Reserved_012

XCLK_RCOMP

CLKIN_GND0_N CLKIN_GND0_P

CLKIN_GND1_N CLKIN_GND1_P

REFCLK14IN

XTAL25_IN

XTAL25_OUT

TP21 TP25 TP29 TP33 TP22 TP26 TP30 TP34 TP23 TP27 TP31 TP35 TP24 TP28 TP32 TP36

COUGARP OINT

CLOCK

IPD 20K

www.rosefix.com

I

SR136

90.9

1%

XCLK_RC OMP

12

XTAL_25 M_PCH_IN

XTAL_25 M_PCH_OUT

FDI_FSYNC0 FDI_LSYNC0

FDI_FSYNC1 FDI_LSYNC1

FDI

RSD

Reserved_013 Reserved_014 Reserved_015 Reserved_016 Reserved_017 Reserved_018 Reserved_019 Reserved_020 Reserved_021 Reserved_022 Reserved_023 Reserved_024 Reserved_025 Reserved_026 Reserved_027 Reserved_028

Reserved_029

CLKOUT_ITPXDP_N CLKOUT_ITPXDP_P

CLKOUT_DMI_N CLKOUT_DMI_P

CLKOUT_DP_N

CLKOUT_DP_P

CLKOUT_PCIE7N

CLKOUT_PCIE7P

CLKOUT_PCIE6N

CLKOUT_PCIE6P

CLKOUT_PCIE5N

CLKOUT_PCIE5P

CLKOUT_PCIE4N

CLKOUT_PCIE4P

CLKOUT_PCIE3N

CLKOUT_PCIE3P

CLKOUT_PCIE2N

CLKOUT_PCIE2P

CLKOUT_PCIE1N

CLKOUT_PCIE1P

CLKOUT_PCIE0N

CLKOUT_PCIE0P

CLKOUT_PEG_A_N CLKOUT_PEG_A_P

CLKOUT_PEG_B_N CLKOUT_PEG_B_P

CLKOUT_PCI0 CLKOUT_PCI1 CLKOUT_PCI2 CLKOUT_PCI3 CLKOUT_PCI4

CLKOUTFLEX0/GPIO64 CLKOUTFLEX1/GPIO65 CLKOUTFLEX2/GPIO66 CLKOUTFLEX3/GPIO67

FDI_INT

B51 E49

C52 D51

H46

AB50 Y50 AB49 AB44 U49 R44 U50 U46 U44 H50 K46 L56 J55 F53 H52 E52

TP_NV_R COMP

R50

CLKOUT_ ITPXDP#

R52

CLKOUT_ ITPXDP

N52

CLKOUT_ DMI#

P31

CLKOUT_ DMI

R31

TP_CLKO UT_DP#_CLKOU T_BCLK1#

N56

TP_CLKO UT_DP_CLKOUT _BCLK1

M55

AE2 AF1

CLKOUT_ PCIE6#

AB3

CLKOUT_ PCIE6

AA2

CLKOUT_ PCIE5#

AF3

CLKOUT_ PCIE5

AG2

TP_CLKO UT_PCIE4#

Y9

TP_CLKO UT_PCIE4

Y8

AB9 AB8

CLKOUT_ PCIE2#

AB12

CLKOUT_ PCIE2

AB14

AA5 W5

AE6 AC6

CLKOUT_ PEG_A#

AG8

CLKOUT_ PEG_A

AG9

TP_CLKO UT_PEG_B#

AE12

TP_CLKO UT_PEG_B

AE11

IPD 20K

AT11

IPD 20K

AN14

IPD 20K

AT12

IPD 20K

AT17

IPD 20K

AT14

IPD 20K

AT9

IPD 20K

BA5

IPD 20K

AW5

IPD 20K

BA2

NOTE:

1.Prioritize 27/14/24/48/25-MHz FLEX on FLEX1/3.

2.Do not configure 27/14/24/48/25-MHz FLEX clock on FLEX0/2

if more than 2 PCI clocks + PCI loopback are routed.

3.With 2 PCI clocks routed (or less), prioritize the FLEX clocks to FLEX1/3

a. 27MHz(SSC/non-SSC) b.14.31818MHz c.24/48 d.25MHz

3

1

SR147 0

VP

SR148 0

VP

SR229 0

VP

SR230 0

VP

SR153 0

I

SR154 0

I

SR233 0

VP

SR234 0

VP

SR241 0

VP

SR242 0

VP

SR235 0

VP

SR236 0

VP

SR239 0

VP

SR240 0

VP

PCH_CLK OUT_PCI0

PCH_CLK OUT_PCI2 PCH_CLK OUT_PCI3 PCH_CLK OUT_PCI4

PCH_CLK OUTFLEX3_48M TP_CLKO UTFLEX1_GPIO65 TP_CLKO UTFLEX2_GPIO66 TP_CLKO UTFLEX0_GPIO64

SR265 Do Not Stuff

NI

SR264 22 OHM

I

SR266 22 OHM

I

FDI_FSYNC_0 [6] FDI_LSYNC_0 [6]

FDI_FSYNC_1 [6] FDI_LSYNC_1 [6]

FDI_INT [6]

ST1

NOBOM

1 2 1 2

ST40

1

ST41

1

1 2 1 2

ST54

1

ST55

1

SR262 22 OHM

I

SR251 22 OHM

I

SR253 22 OHM

I

ST3

1 1 2 1 2 1 2

NOBOM

NOBOM NOBOM

NOBOM

SFA1.01

SFA1.01SFA1.01

NOBOM

NOBOM NOBOM

NOBOM

1 2

ST56

1 1 2

NOBOM

2

NOBOM

2

1

CK_100M _CPUXDP# [64] CK_100M _CPUXDP [64]

CK_100M _DMI# [7] CK_100M _DMI [7]

CLK_100 M_MINI4# [38 ] CLK_100 M_MINI4 [38]

CLK_100 M_MINI1# [37 ] CLK_100 M_MINI1 [37]

CK_100M _PCHXDP# [63] CK_100M _PCHXDP [63]

FRO REAR I/O MODULE, LAN

CK_100M _LAN# [27] CK_100M _LAN [27]

CLK_PEG A# [73] CLK_PEG A [73]

CLK_DBG PCI1 [4 4]

CLK_KBC PCI [43 ]

CK_33M_ PCIFB [17]

CK_27M_ eDP [7 9] CK_48M_ CR [78] CK_27M_ GPU [69]

PEGATRON DT-MB RESTRICTED SECRET

0413

PEGATRO N CORPORATION

Date: Sheet of

FRO REAR I/O MODULE, USB3.0

Title :

Engineer:

Size Project Name

A3

IPPSB-FA

Engineer:

1

CLK/NVRAM/FDI 6-9

Mike Yen

22 79W ednesday, April 27, 2011

Rev

1.01

5

www.teknisi-indonesia.com

+1P05V_ PCH

D D

NOTE:

Splitting 2 power trace/shape

on pin Y20/Y22/V22 to other pins.

C C

NOTE:

Splitting 2 power trace/shape

B B

A A

NOTE:

Install those cap during initial power-on.

12

I

SCB1

SCB1 10UF/6.3V

10UF/6.3V

X5R 10%

X5R 10% mx_c0805_ small

mx_c0805_ small

GND GND GND GND

12

I

SCB2

SCB2 10UF/6.3V

10UF/6.3V

X5R 10%

X5R 10% mx_c0805_ small

mx_c0805_ small

12

I

SCB5

0.1UF/16V

GND GND

12

I

SCB3

0.1UF/16V

12

SCB6

0.1UF/16V

NOTE:

Trace needs to be at least 20 mils width with full VSS/ VCC reference plane

+1P05V_PCH

12

I

SCB12

SCB12 10UF/6.3V

10UF/6.3V

X5R 10%

X5R 10% mx_c0805_ small

mx_c0805_ small

GND

12

I

SCB10

SCB10 1UF/16V

1UF/16V

X7R 10%

X7R 10% mx_c0603_ small

mx_c0603_ small

GND GND

12

I

SCB11

SCB11 1UF/16V

1UF/16V

X7R 10%

X7R 10% mx_c0603_ small

mx_c0603_ small

NOTE:

Install SCB12 during initial power-on.

5

12

SCB4

0.1UF/16V

I

+1P05V_ CPUIO

12

SCB7

SCB7 1UF/16V

1UF/16V

X7R 10%

X7R 10% mx_c0603_ small

mx_c0603_ small

GND

+1P05V_ PCH

12

SCB8

SCB8 1UF/16V

1UF/16V

X7R 10%

X7R 10% mx_c0603_ small

mx_c0603_ small

GND

+1P05V_ PCH

12

SCB9

SCB9 1UF/16V

1UF/16V

X7R 10%

X7R 10% mx_c0603_ small

mx_c0603_ small

GND

12

SCB16

SCB16 Do Not Stuff

Do Not Stuff

X7R 10%

X7R 10% mx_c0603_ small

mx_c0603_ small

GND

+1P05V_PCH

12

SCB13

SCB13 Do Not Stuff

Do Not Stuff

GND

F20 F30

V25

I

NI

V27 V31 V33 Y24 Y26 Y30 Y32 Y34 V22

AA34 AA36

Y20 Y22

B41 E41

AL40 AN40 AN41

BA38

AG38 AG40 AG41

AJ38

AG24 AG26 AG28

AJ24

AJ26

AJ28

AL24

AL28 AN22 AN24 AN26 AN28 AR24 AR26 AR28 AR30 AR36 AR38 AU30 AU36

AU34 AV36 AU32

4

U2G

VccIO_024 VccIO_025 VccIO_026 VccIO_027 VccIO_028 VccIO_029 VccIO_030 VccIO_031 VccIO_032 VccIO_033 VccIO_034 VccIO_035

VccIO_022 VccIO_023

VccIO_036 VccIO_037

VccDMI_02 VccDMI_01

VccIO_008 VccIO_009 VccIO_010

VccIO_019

VccIO_020 VccIO_021 VccIO_007 VccIO_011

VccASW_004 VccASW_005 VccASW_006 VccASW_007 VccASW_008 VccASW_009 VccASW_010 VccASW_011 VccASW_012 VccASW_013 VccASW_014 VccASW_015 VccASW_016 VccASW_017 VccASW_018 VccASW_019 VccASW_020 VccASW_021 VccASW_022 VccASW_023

VccASW_003 VccASW_002 VccASW_001

COUGARP OINT

4

3

VccCore_001 VccCore_002 VccCore_003 VccCore_004 VccCore_005 VccCore_006 VccCore_007 VccCore_008 VccCore_009 VccCore_010 VccCore_011 VccCore_012 VccCore_013 VccCore_014 VccCore_015 VccCore_016 VccCore_017 VccCore_018 VccCore_019 VccCore_020 VccCore_021 VccCore_022

AC24 AC26 AC28 AC30 AC32 AE24 AE28 AE30 AE32 AE34 AE36 AG32 AG34 AJ32 AJ34 AJ36 AL32 AL34 AN32 AN34 AR32 AR34

12

I

SCB14

SCB14 1UF/10V

1UF/10V

mx_c0603_ small

GND

+1P05V_ PCH

12

I

SCB15

SCB15 10UF/6.3V

10UF/6.3V

X5R 10%

X5R 10% mx_c0805_ small

mx_c0805_ small

GND

NOTE:

VccAPLLEXP, VccAPLLSATA, and VccAPLLDMI2 can be NC

in On-Die VR mode.

NOTE:

Splitting 2 power trace/shape

+1P05V_ PCH

VccIO_018

VccIO_001 VccIO_002 VccIO_003 VccIO_004

VccIO_013

VccIO_012

VccIO_014

AE40 AC20 AE20

AV24 AV26 AY25 AY27

V36

Y36

Y28

www.rosefix.com

VccSSC_01 VccSSC_02

on pins AV24/AV26 to AY25/AY27,

and AE40 to AG38/AG40.

NOTE:

12

GND GND

I

SCB32

SCB32 1UF/16V

1UF/16V

X7R 10%

X7R 10% mx_c0603_ small

mx_c0603_ small

12

I

SCB33

SCB33 1UF/16V

1UF/16V

X7R 10%

X7R 10% mx_c0603_ small

mx_c0603_ small

Splitting 2 power traces

on pins AC20 to AE20.

+1P05V_ PCH

VccAClk

VccClkDMI

VccADAC

AE15 AE17 AG15

VCCFDIPLL

C54

VCCACLK PLL

AL5

NOTE:

VccAFDIPLL and VccAClk can be NC in on-die VR mode.

VCCAPLL EXP

B53

VCCAPLL SATA

U56

VCCAPLL DMI2

A19

VCCCLKD MI

AJ20

VCCADAC

AT1

VCCA_DP LLA

AB1

VCCA_DP LLB VCCA_DP LLB_R

AC2

12

I

SCB65

SCB65 1UF/16V

1UF/16V

X7R 10%

X7R 10% mx_c0603_ small

mx_c0603_ small

GND

NI

SR160

Do Not Stuff

+1P05V_ PCH+1P05V_ PCH

12

NI

SR161

12

Do Not Stuff

3

VccDIFFCLKN_01 VccDIFFCLKN_02 VccDIFFCLKN_03

VccAFDIPLL

VccAPLLEXP

VccAPLLSATA

VccAPLLDMI2

VccADPLLA

VccADPLLB

2

NI

SR168

12

Do Not Stuff

12

GND

12

GND GND

12

NOTE:

If filter is unstuffed, 0 ohm resistor(SR163) must be stuffed in R and L site.

12

SCB28

SCB28 Do Not Stuff

Do Not Stuff

X7R 10%

X7R 10% mx_c0603_ small

mx_c0603_ small

GND

12

SCB29

SCB29 1UF/16V

1UF/16V

X7R 10%

X7R 10% mx_c0603_ small

mx_c0603_ small

GND

12

SCB30

SCB30 1UF/16V

1UF/16V

X7R 10%

X7R 10% mx_c0603_ small

mx_c0603_ small

GND

12

GND

NI

I

NI

SCB20

SCB20 Do Not Stuff

Do Not Stuff

X7R 10%

X7R 10% mx_c0603_ small

mx_c0603_ small

NI

SCB22

SCB22 Do Not Stuff

Do Not Stuff

mx_c0603_ small

NI

SCB24

SCB24 Do Not Stuff

Do Not Stuff

X7R 10%

X7R 10% mx_c0603_ small

mx_c0603_ small

I

SCB26

SCB26 1UF/16V

1UF/16V

X7R 10%

X7R 10% mx_c0603_ small

mx_c0603_ small

2

12

NI

SCB21

SCB21 Do Not Stuff

Do Not Stuff

X5R 10%

mx_c0805_ small

GND

12

NI

SCB23

SCB23 Do Not Stuff

Do Not Stuff

X5R 10%

mx_c0805_ small

12

NI

SCB25

SCB25 Do Not Stuff

Do Not Stuff

X5R 10%

mx_c0805_ small

GND

12

I

SCB27

SCB27 10UF/6.3V

10UF/6.3V

X5R 10%

mx_c0805_ small

GND

12

+

SCE4

SCE4 220UF/16 V

220UF/16 V

I

GND

12

+

SCE5

SCE5 220UF/16 V

220UF/16 V

I

GND

12

+

SCE6

SCE6 220UF/16 V

220UF/16 V

I

GND

1

NI

SL1

VCCAPLL EXP_R

NI

SR162

12

Do Not Stuff

VCCAPLL DMI2_R

SL1

2 1

Do Not Stuff

mx_l0805_small

NI

SL2

2 1

Do Not Stuff

mx_l0805_small

NI

SL3

2 1

Do Not Stuff

mx_l0805_small

NOTE:

Backup to 0 ohm 1/8W(0805)JUMP

if power noise is pass on SL3 and SL4.

I

SR163

VCCIOPLL_ R

12

1

NOTE:

CRB 0.7:

SR174

1 2

0 Ohm

5%

5% I

I

SCB27 is NI and

SR163 is 0 ohm.

I

SL5

2 1

600Ohm/1 00Mhz/0.5A

mx_l0603_small

+3P3V

NOTE:

Backup SL5 to 10X2121R0040(1 ohm/0402)

if have no power noise issue.

I

VP

SR165

0

VCCA_DP LLA_R

12

I

SL6

2 1

10UH/125 mA

mx_l0805_small

NOTE:

Backup to 0 ohm 1/8W(0805)JUMP

if power noise is pass on SL6 and SL7.

I

VP

SR167

12

0

0413

PEGATRON DT-MB RESTRICTED SECRET

PEGATRO N CORPORATION

Size Project Name

A3

Date: Sheet of

I

SL7

2 1

10UH/125 mA

mx_l0805_small

IPPSB-FA

Title :

Engineer:

1

VCC/PLL 7-9

+1P05V_ PCH

Mike Yen

23 79Tu esday, April 26, 2011

Rev

1.01

5

www.teknisi-indonesia.com

+3P3VSB

12

I

SCB35

0.1UF/16V

D D

0.1UF/16V

X7R 10%

+3P3VSB

NOTE:

Place SCB59 and SCB66 near pin AU20,

SCB60 near pin AL38,

SCB61 and SCB67 near BC17.

+3P3V

NOTE:

Splitting 2 power trace/shape on

pin AV20/AU20 and AU22.

12

I

SCB58

SCB58 22UF/6.3V

22UF/6.3V

X5R 20%

C C

X5R 20% mx_c0805_ small

mx_c0805_ small

12

SCB59

SCB59 1UF/16V

1UF/16V

X7R 10%

X7R 10% mx_c0603_ small

mx_c0603_ small

GND GND GNDGND

12

I

NI

SCB66

SCB66 Do Not Stuff

Do Not Stuff

X7R 10%

X7R 10% mx_c0603_ small

mx_c0603_ small

BOTTOM

12

I

SCB60

0.1UF/16V

X7R 10%

12

+3P3V

I

SCB61

0.1UF/16V

X7R 10%

NOTE:

Install SCB58 during initial power-on.

12

I

SCB38

0.1UF/16V

X7R 10%

GND GND

+1P05V_ CPUIO

B B

I

SCB41

0.1UF/16V

X7R 10%

12

SCB42

SCB42 Do Not Stuff

Do Not Stuff

X7R 10%

NI

12

A A

GND GND GND GND GND

12

GND

12

I

SCB40

4.7UF/6.3V

X5R 10%

NI

SCB43

SCB43 Do Not Stuff

Do Not Stuff

X7R 10%

12

I

SCB62

0.1UF/16V

X7R 10%

GND GND

+1P5V_S TBY_INT

+1P1V_D SW_INT

+1P1V_INT _DCPSUS1

12

NI

SCB44

SCB44 Do Not Stuff

Do Not Stuff

X7R 10%

NOTE:

Just for measurement.

5

4

12

NI

SCB36

SCB36 Do Not Stuff

Do Not Stuff

X7R 10%

BOTTOM

GNDGND

12

I

SCB37

SCB37 1UF/16V

1UF/16V

X7R 10%

mx_c0603_ small

GND

12

I

SCB67

0.1UF/16V

X7R 10%

GNDGND

12

I

SCB39

0.1UF/16V

X7R 10%

12

I

SCB63

0.1UF/16V

X7R 10%

VCCSUS_ INT +1P1V_U SB

12

NI

SCB45

SCB45 Do Not Stuff

Do Not Stuff

X7R 10%

CRB 0.7 is 1uF

4

3

U2H

V5REF_S US

V5REF

VccRTC

DcpRTC

BT25

BF1

AJ1 R2 R54 R56

T55 T57

BT35

AV30 AV32 AY31 AY33 BJ36 BK36 BM36

AT40 AU38

U31

AV40

BU42

BR54 BT56

V5REF

VCC_XCK PLL VCC_DMIVR M VCC_XCK PLL_AFDI

DCPRTC_ NCTF

3

12

I

SCB48

SCB48 1UF/16V

1UF/16V

X7R 10%

mx_c0603_ small

GND

+1P8V_S FR

12

VP

SR172

SR172 0

0

12

NI

SCB49

SCB49 Do Not Stuff

Do Not Stuff

X7R 10%

GND

+1P8V_S FR

12

NI

SCB52

SCB52 Do Not Stuff

Do Not Stuff

X7R 10%

GND

12

I

SCB53

0.1UF/16V

X7R 10%

GND GND

+3VA

12

I

SCB55

0.1UF/16V

X7R 10%

GND

12

I

SCB57

0.1UF/16V

X7R 10%

GND

+1P8V_S FR +1P8V _SFR

AV28

VccSusHDA

AN52

VccSPI

AU20

Vcc3_3_09

AV20

Vcc3_3_10

AU22

www.rosefix.com

Vcc3_3_07

AL38

Vcc3_3_05

AN38

Vcc3_3_06

BC17

Vcc3_3_02

BD17

Vcc3_3_03

BD20

Vcc3_3_04

A12

Vcc3_3_08

AF57

Vcc3_3_01

D55

V_PROC_IO

B56

V_PROC_IO_NCTF

BA46

DcpSST

AV41

DcpSusByp

AA32

DcpSus_01

AT41

DcpSus_02

A39

DcpSus_03

COUGARP OINT

V5REF_Sus

VccVRM_01 VccVRM_04 VccVRM_03 VccVRM_02

VccDFTERM_01 VccDFTERM_02

VccSus3_3_011

VccSus3_3_002 VccSus3_3_003 VccSus3_3_004 VccSus3_3_005 VccSus3_3_006 VccSus3_3_007 VccSus3_3_008

VccSus3_3_009 VccSus3_3_010

VccSus3_3_001

VccDSW3_3

DcpRTC_NCTF

12

NI

SCB46

GND

VP

12

I

SCB69

2.2UF/6.3V

X5R 10%

X5R 10% mx_c0603_ small

mx_c0603_ small

SCB46 Do Not Stuff

Do Not Stuff

NOTE:

Install SCB31 during initial power-on.

I

SR171

SR171 10

10

12

VP

SR173

SR173 0

0

12

I

SCB31

SCB31 10UF/6.3V

10UF/6.3V

X5R 10%

X5R 10% mx_c0805_ small

mx_c0805_ small

GND

12

I

SCB54

0.1UF/16V

X7R 10%

+5V

12

SR175

SR175 0

0

+3P3VSB

GND

NOTE:

Place SCB56 near PCH within 40mils.

+BATT

12

I

C59

C59 1UF/16V

1UF/16V

X7R 10%

X7R 10% mx_c0603_ small

mx_c0603_ small

GND

12

I

SCB56

0.1UF/16V

X7R 10%

2

I

GND

12

I

SCB47

0.1UF/16V

I

SR170

SR170 10

10

+5VSB

I

3

BAT54CW

SD1

I

12

NOTE:

NI or install is decided to DSW support or not.

I

SD2

3

BAT54CW

NOTE:

Splitting 2 power trace/shape on

pin AV28, AY31/AY33, and AV30/AV32.

NOTE:

Place SCB53 near pin BT35, SCB54 near pin U31.

,and SCB69 near pin AV30/AT40.

0413

PEGATRON DT-MB RESTRICTED SECRET

PEGATRO N CORPORATION

Size Project Name

A3

Date: Sheet of

2

Date: Sheet of

1

2

1

2

IPPSB-FA

1

+3P3VSB

+3P3V

Title :

Engineer:

1

VCCSUS 8-9

Mike Yen

24 79Tu esday, April 26, 2011

Rev

1.01

Dell INSPIRON ONE 2320 Schematic

Specifications and Main Features

Frequently Asked Questions

User Manual