Dell D630 Schematics REV 2B

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GRATIS - FOR FREE

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PWA FP382, PWB UW445,

JM7B-DISCRETE

JM7B M/B PCBJM7B M/B PCB

A A

POWER

AC/BATT
CONNECTOR

PG 54

DDR2-SODIMM1

B B

PG 15,16

SYSTEM
RESET CIRCUIT

BATT
SELECTOR

BATT
CHARGER

RUN POWER SW

+3.3V_SUS/+5V_SUS
+5V/+3.3V/+1.8V

533/667 MHZ DDR II

PG 44

PG 45

PG 46

PG 53

Merom

(478 Micro-FCPGA)

PG 3,4

(Symbol Rev.09)

667/800 MHz FSB

Crestline

1299 uFCBGA

PCIEx16

nVIDIA G86/G72M

PCI EXPRESS GFX

PG 5,6,7,8,9,10

DDR2-SODIMM2

PG 15,16

533/667 MHZ DDR II

(Symbol Rev.09)

USB2.0 (P0,P1)
USB2.0 (P2,P3)

Internal Media Bay
CD-ROM

PG 26

USB1.0

SMART CARD

OZ77CR6LN

PG 28

C C

AUDIO/AMP

PG 38,39

IDE

SATA - HDD

PG 26

SATA

USB2.0 (P4)

IHDA

MDC

PG 30

S/PDIF
for Dock

PG 43

S/PDIF

Audio
Jacks

PG 39

RJ11
for Dock

PG 43

Tip
Ring

PG 30

for MINI DIN 7

PG 23

D D

3

USER

Keyboard
Controllor

PG 34

Keyboard Touchpad/

INTERFACE

PG 36

1

PG 36

2

BCECE1077

FLASH

PG 34

DMI interface

ICH8-M

676 BGA

PG 11,12,13,14

SPI

SIO

MEC5025
128KB Flash
TMKBC

128 Pins VTQFP

PG 31

SPI PS/2

Stick point

PG 35

3

(Symbol Rev.09)

LPC

SIO

ECE5028

BC

128 Pins VTQFP

PG 32

Serial Port

PG 33

4

USB2.0 (P8)

33MHz PCI

PCIEx1
USB2.0 (P6)
PCIEx2
USB2.0 (P9)
USB2.0 (P7)

USB2.0 (P5)

PCIEx1

IrDA

PG 35

Biometric

PG 35

DOCK LPC

POWER

VGA DC/DC

CPU VR

DC/DC

+3.3V_ALW/+5V_ALW/+15V_ALW

PG 18,19,20,21,22

(EXT SIDE)
(EXT BACK)

PG 50

PG 51

PG 52

POWER USB & USB

Bluetooth

BCM5755M
/BCM5752

PG 40

FAN & THERMAL

EMC4001

PG 37

5

REGULATOR

+1.8V_SUS/+0.9V_DDR_VTT

REGULATOR

+1.25V_RUN/+1.05V_VCCP/
+1.25V_GFX_PCle

REGULATOR

+1.5V_RUN

LVDS
DVI
TVOUT

VGA

PG 33

CARDBUS/1394

OZ711EZ1TN

PG 27

MINI-CARD

WLAN
PG 29

PG 35

E-Switch

PI3L500

+3.3V_LAN

PG 41

6

SCHEM PM333. (128MB)
VER : 2B

PG 47

PG 48

PG 49

Panel Connector

MINI DIN 7

PG 23

CRT CONN.

PG 25

EXPRESS-CARD

PG 24

Q-SWITCH

PG 42

R5538
PG 28

MINI-CARD

WWAN
PG 29

RJ45/Magnetics

PG 41

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet

COMPUTER

Schematic Block Diagram

Schematic Block Diagram

Schematic Block Diagram

JM7B 2B

JM7B 2B

JM7B 2B

7

CLOCK

CK410M+LP

PG 17

DOCKING
CONNECTOR

PG 43

157Wednesday, November 01, 2006

157Wednesday, November 01, 2006

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INDEX Power States

Pg# Description

Schematic Block Diagram

1
2

Front Page

3-4

Merom

5-10

Crestline
ICH8M

A A

B B

C C

11-14

DDRII SO-DIMM(200P)

15-16

17

Clock Generator

18-23

VGA

24

LCD Conn. & SSP

25

CRT Conn

26

SATA & IDE Conn

27

PCCARD/Conn & 1394
Express Card & Smart Card

28
29

Mini Card
MDC Conn.

30
31

SIO (MEC5025)

32

SIO (MEC5018)

33

SERIAL PORT & USB

34

Flash ROM, RTC & ECE1077
TP,BT & FIR

35
36

Switch,Keyboard & LED
FAN & Thermal

37

Audio CODEC(STAC9205)/Phone Jack

38-39

LOM (Nineveh)/Switch

40-41
42-43

Docking Conn/Q-Switch
System Reset Circuit

44

Battery Selector & Charger

45-46

47

DDR2_1.8VSUS, 0.9V

48

1.5VSUS,1.05V(VTT)

49

VGA DC/DC,1.25V,1.05V
CPU_MAX8786(3phase)

50

D/D Power

51
52

RUN Power Switch

53

DCIN,Batt
PAD& SCREW

54
55

EMI CAP
SMBUS BLOCK

56

Power Rail S3/M1

+3.3V_ALW
+5V_ALW
+3.3V_LAN
+1.25V_SRC_M
+1.05V_M
+1.8V_SUS
+0.9V_DDR_VTT
+5V_SUS
+3.3V_SUS
+5V_RUN
+3.3V_RUN
+1.8V_RUN
+1.25V_RUN
+1.5V_RUN
+1.05V_VCCP
VCC_VCRE
+LCDVCC
+5V_MOD
+VCC_GFX_CORE
+1.25V_GFX_PCIe
+2.5V_RUN

Control
Signal

S0/M0

S3/M1 S4/M1

S3/
M-off

S4/
M-off

S5/
M-off

D D

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

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6

Date: Sheet

COMPUTER

Index & Power Status

Index & Power Status

Index & Power Status

JM7B 2C

JM7B 2C

JM7B 2C

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257Friday, October 20, 2006

257Friday, October 20, 2006

257Friday, October 20, 2006

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H_A#[3..16]5

A A

H_ADSTB#05
H_REQ#[0..4]5

H_A#[17..35]5

B B

H_ADSTB#15

H_A20M#11

H_FERR#11

H_IGNNE#11
H_STPCLK#11

H_INTR11
H_NMI11
H_SMI#11

C C

H_A#[3..16]

H_REQ#[0..4]

H_A#[17..35]

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35

U7A

U7A

J4

A[3]#

L5

A[4]#

L4

A[5]#

K5

A[6]#

M3

A[7]#

N2

A[8]#

J1

A[9]#

N3

A[10]#

P5

A[11]#

P2

A[12]#

L2

A[13]#

P4

A[14]#

P1

A[15]#

R1

A[16]#

M1

ADSTB[0]#

K3

REQ[0]#

H2

REQ[1]#

K2

REQ[2]#

J3

REQ[3]#

L1

REQ[4]#

Y2

A[17]#

U5

A[18]#

R3

A[19]#

W6

A[20]#

U4

A[21]#

Y5

A[22]#

U1

A[23]#

R4

A[24]#

T5

A[25]#

T3

A[26]#

W2

A[27]#

W5

A[28]#

Y4

A[29]#

U2

A[30]#

V4

A[31]#

W3

A[32]#

AA4

A[33]#

AB2

A[34]#

AA3

A[35]#

V1

ADSTB[1]#

A6

A20M#

A5

FERR#

C4

IGNNE#

D5

STPCLK#

C6

LINT0

B4

LINT1

A3

SMI#

M4

RSVD[01]

N5

RSVD[02]

T2

RSVD[03]

V3

RSVD[04]

B2

RSVD[05]

C3

RSVD[06]

D2

RSVD[07]

D22

RSVD[08]

D3

RSVD[09]

F6

RSVD[10]

Merom Ball-out Rev 1a

Merom Ball-out Rev 1a

ADDR GROUP 0

ADDR GROUP 0

CONTROL

CONTROL

ADDR GROUP 1

ADDR GROUP 1

XDP/ITP SIGNALS

XDP/ITP SIGNALS

THERMAL

THERMAL

PROCHOT#

THERMDA
THERMDC

ICH

ICH

THERMTRIP#

H CLK

H CLK

RESERVED

RESERVED

ADS#
BNR#

BPRI#

DEFER#

DRDY#
DBSY#

BR0#

IERR#

INIT#

LOCK#

RESET#

RS[0]#
RS[1]#
RS[2]#

TRDY#

HIT#

HITM#

BPM[0]#
BPM[1]#
BPM[2]#
BPM[3]#

PRDY#
PREQ#

TCK

TDO
TMS

TRST#

DBR#

BCLK[0]
BCLK[1]

H1
E2
G5

H5
F21
E1

F1
D20

B3
H4
C1

F3
F4
G3
G2

G6
E4

AD4
AD3
AD1
AC4
AC2
AC1
AC5
AA6

TDI

AB3
AB5
AB6
C20

D21
A24
B25

C7

A22
A21

H_THERMDA H_THERMDC

R416 56R416 56

H_IERR#

1 2

R663 0R663 0

1 2

ITP_BPM#0
ITP_BPM#1
ITP_BPM#2
ITP_BPM#3
ITP_BPM#4
ITP_BPM#5
ITP_TCK
ITP_TDI
ITP_TDO
ITP_TMS
ITP_TRST#
ITP_DBRESET#

R415 56R415 56

H_PROCHOT#
H_THERMDA
H_THERMDC

H_THERMTRIP#

H_THERMTRIP#

R425 56R425 56

1 2

C111

C111

2200P/50V_NC

2200P/50V_NC

12

1 2

H_ADS# 5
H_BNR# 5
H_BPRI# 5

H_DEFER# 5
H_DRDY# 5
H_DBSY# 5
H_BR0# 5

+1.05V_VCCP
H_INIT# 11
H_LOCK# 5

H_RESET#

H_RS#0 5
H_RS#1 5
H_RS#2 5
H_TRDY# 5

H_HIT# 5
H_HITM# 5

ITP_DBRESET# 13,32

+1.05V_VCCP

T69PAD T69PAD

H_THERMDA 37

H_THERMDC 37
H_THERMTRIP# 37

+1.05V_VCCP

CLK_CPU_BCLK 17
CLK_CPU_BCLK# 17

+1.05V_VCCP

12

H_PROCHOT#

Layout Note:
Place R421
close to

R421

R421
51/F_NC

51/F_NC

CPU.

H_RESET# 5

Layout Note:
Place voltage
divider within

0.5" of GTLREF
pin

+1.05V_VCCP

R382

R382
1K/F

1K/F

1 2

R381

R381
2K/F

2K/F

1 2

+1.05V_VCCP

+3.3V_ALW

2

Q62

Q62

31

2N7002W-7-F_NC

2N7002W-7-F_NC

1 2

H_D#[0..63]5

H_DSTBN#05
H_DSTBP#05
H_DINV#05

H_D#[0..63]5

H_DSTBN#15
H_DSTBP#15
H_DINV#15

CPU_MCH_BSEL06,17
CPU_MCH_BSEL16,17
CPU_MCH_BSEL26,17

Voltage Level shift

R420

R420

2.2K_NC

2.2K_NC

CPU_PROCHOT# 31

Populate ITP700Flex for bringup

+1.05V_VCCP

Layout Note:

12

12

R9

R751R7

51/FR951/F

51

ITP_TDI
ITP_TMS
ITP_TCK
ITP_TDO
ITP_TRST#

H_RESET# ITP_DBRESET#

ITP_TCK

D D

CLK_CPU_ITP#17
CLK_CPU_ITP17

R5 27/FR5 27/F

R4 649/FR4 649/F

1

R6 0R6 0

Layout Note:
Place R8 close ITP.

ITP_TCK

12

ITP_TRST#

12

12

R3
39/FR339/F

1 2

R8 22.6/FR8 22.6/F

1 2

12

R2
150R2150

JITP1

JITP1

1

TDI

2

TMS

5

TCK

7

TDO

3

TRST#

12

RESET#

11

FBO

8

BCLKN

9

BCLKP

10

GND0

14

GND1

16

GND2

18

GND3

20

GND4

22

GND5

2

Place couple 0.1uF Decoupling
caps with in 0.1" ITP connector.

+1.05V_VCCP +3.3V_SUS

C4 0.1U/10VC4 0.1U/10V

27

VTT0
VTT1

VTAP

DBR#
DBA#

BPM0#
BPM1#
BPM2#
BPM3#
BPM4#
BPM5#

NC0

NC1
GND_0
GND_1

ITP700Flex_NC

ITP700Flex_NC

28
26

25
24

23
21
19
17
15
13
4
6
29
30

C3 0.1U/10VC3 0.1U/10V

ITP_BPM#0
ITP_BPM#1
ITP_BPM#2
ITP_BPM#3
ITP_BPM#4
ITP_BPM#5

3

12

12

R10 150R10 150

Signal Resistor Value Connect To Resistor Placement

ITP700 layout guidelines

TDI

150 ohm ± 5%

TMS

39 ohm ± 1%
500 to 680

TRST#

12

ohm ± 5%

27 ohm ± 1%

TCK

TDO

51 ohm ± 5% Place the pull-up near ITP

22.6 ohm ± 1%
series resistor

RESET# VCCP

and pullup 51
ohm ± 1%.

4

VCCP
VCCP

GND

GND

VCCP

H_D#[0..63] H_D#[0..63]

H_D#[0..63]

Place C close to the
CPU_TEST4 pin. Make sure
CPU_TEST4 routing is
reference to GND and away
from other noisy signal.

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15

H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31

V_CPU_GTLREF
CPU_TEST1
CPU_TEST2
CPU_TEST3
CPU_TEST4
CPU_TEST5
CPU_TEST6

R424 1K/F_NCR424 1K/F_NC

1 2

R419 1K/F_NCR419 1K/F_NC

1 2

C442 0.1U/10V_NCC442 0.1U/10V_NC

12

R423 0_NCR423 0_NC

1 2

U7B

U7B

E22

D[0]#

F24

D[1]#

E26

D[2]#

G22

D[3]#

F23

D[4]#

G25

D[5]#

E25

D[6]#

E23

D[7]#

K24

D[8]#

G24

D[9]#

J24

D[10]#

J23

D[11]#

H22

D[12]#

F26

D[13]#

K22

D[14]#

H23

D[15]#

J26

DSTBN[0]#

H26

DSTBP[0]#

H25

DINV[0]#

N22

D[16]#

K25

D[17]#

P26

D[18]#

R23

D[19]#

L23

D[20]#

M24

D[21]#

L22

D[22]#

M23

D[23]#

P25

D[24]#

P23

D[25]#

P22

D[26]#

T24

D[27]#

R24

D[28]#

L25

D[29]#

T25

D[30]#

N25

D[31]#

L26

DSTBN[1]#

M26

DSTBP[1]#

N24

DINV[1]#

AD26

GTLREF

C23

TEST1

D25

TEST2

C24

TEST3

AF26

TEST4

AF1

TEST5

A26

TEST6

B22

BSEL[0]

B23

BSEL[1]

C21

BSEL[2]

Merom Ball-out Rev 1a

Merom Ball-out Rev 1a

CPU_TEST1
CPU_TEST2
CPU_TEST4
CPU_TEST6

Y22

D[32]#

AB24

D[33]#

V24

D[34]#

V26

D[35]#

V23

D[36]#

T22

D[37]#

U25

D[38]#
D[39]#
D[40]#
D[41]#
D[42]#
D[43]#
D[44]#
D[45]#
D[46]#

D[47]#
DSTBN[2]#
DSTBP[2]#

DINV[2]#

D[48]#

D[49]#

D[50]#

D[51]#

D[52]#

D[53]#

D[54]#

D[55]#

D[56]#

D[57]#

D[58]#

D[59]#

D[60]#

D[61]#

D[62]#

D[63]#
DSTBN[3]#
DSTBP[3]#

DINV[3]#
COMP[0]

COMP[1]
COMP[2]
COMP[3]

DPRSTP#

DPSLP#

DPWR#

SLP#

PSI#

T21

T21

PAD

PAD

T58

T58

PAD

PAD

BCLK

133
166
200

U23
Y25
W22
Y23
W24
W25
AA23
AA24
AB25
Y26
AA26
U22

AE24
AD24
AA21
AB22
AB21
AC26
AD20
AE22
AF23
AC25
AE21
AD21
AC22
AD23
AF22
AC23
AE25
AF24
AC20

R26
U26
AA1
Y1

E5
B5
D24
D6
D7
AE6

DATA GRP 0 DATA GRP 1

DATA GRP 0 DATA GRP 1

DATA GRP 2DATA GRP 3

DATA GRP 2DATA GRP 3

MISC

MISC

PWRGOOD

For the purpose of testability, route these signals
through a ground referenced Z0 = 55ohm trace that
ends in a via that is near a GND via and is
accessible through an oscilloscope connection.

FSB
533 0 0
667
800

Place the pull-up near CPU
Within 200ps of ITP connector

Place the pull-down near CPU
Connect to TCK pin of CPU and then

connect it to FBO pin of ITP connector
in daisy chain. Place the pull-down
near TCK0 pin of ITP connector

Connect to CPURST# pin of GMCH through
the series resistor placed within
200ps of ITP connector. Place the
pull-up after the series resistor from
ITP connector.

5

6

Title

Title

Title

Merom Processor (HOST BUS)

Merom Processor (HOST BUS)

Merom Processor (HOST BUS)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

JM7B 2C

JM7B 2C

JM7B 2C

Date: Sheet of

Date: Sheet of

Date: Sheet

H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47

H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

COMP0
COMP1
COMP2
COMP3

CPU_TEST3
CPU_TEST5

H_D#[0..63]

Note:
H_DPRTSTP need to daisy chain
from ICH8 to IMVP6 to CPU.

H_D#[0..63] 5

H_DSTBN#2 5
H_DSTBP#2 5
H_DINV#2 5

H_D#[0..63] 5

H_DSTBN#3 5
H_DSTBP#3 5
H_DINV#3 5

H_DPRSTP# 6,11,51
H_DPSLP# 11
H_DPWR# 5
H_PWRGOOD 11
H_CPUSLP# 5
H_PSI# 51

BSEL2 BSEL1 BSEL0

1

0

COMP0
COMP1
COMP2
COMP3

Comp0,2 connect with Zo=27.4ohm,Comp1,3
connect with Zo=55ohm, make those traces
length shorter than 0.5".Trace should be
at least 25 mils away from any other
toggling signal.

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

COMPUTER

7

1

1

00

1

R403

R403

R401

R392

R392

54.9/F

54.9/F

1 2

R401

R390

R390

27.4/F

27.4/F

1 2

27.4/F

27.4/F

54.9/F

54.9/F

1 2

1 2

357Thursday, October 26, 2006

357Thursday, October 26, 2006

357Thursday, October 26, 2006

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+VCC_CORE +VCC_CORE

+VCC_CORE

A A

+VCC_CORE

All use 10U 4V(+-20%,X6S,0805)Pb-Free.

12

12

C479

C479
10U/4V

10U/4V

C458

C458
10U/4V

10U/4V

12

12

C87

C87
10U/4V

10U/4V

C459

C459
10U/4V

10U/4V

12

12

C86

C86
10U/4V

10U/4V

C83

C83
10U/4V

10U/4V

12

12

C85

C85
10U/4V

10U/4V

C82

C82
10U/4V

10U/4V

12

12

C84

C84
10U/4V

10U/4V

C533

C533
10U/4V

10U/4V

8 inside cavity, north side, secondary layer.

+VCC_CORE

12

B B

+VCC_CORE

12

C463

C463
10U/4V

10U/4V

C556

C556
10U/4V

10U/4V

12

12

C464

C464
10U/4V

10U/4V

C557

C557
10U/4V

10U/4V

12

12

C460

C460
10U/4V

10U/4V

C465

C465
10U/4V

10U/4V

12

12

C461

C461
10U/4V

10U/4V

C554

C554
10U/4V

10U/4V

12

12

C462

C462
10U/4V

10U/4V

C555

C555
10U/4V

10U/4V

8 inside cavity, south side, secondary layer.

+VCC_CORE

12

C483

C483
10U/4V

10U/4V

12

C537

C537
10U/4V

10U/4V

12

C561

C561
10U/4V

10U/4V

12

C560

C560
10U/4V

10U/4V

12

C559

C559
10U/4V

10U/4V

12

C558

C558
10U/4V

10U/4V

6 inside cavity, north side, primary layer.

+VCC_CORE

C C

12

C104

C104
10U/4V

10U/4V

12

C103

C103
10U/4V

10U/4V

12

C102

C102
10U/4V

10U/4V

12

C101

C101
10U/4V

10U/4V

12

C100

C100
10U/4V

10U/4V

12

C99

C99
10U/4V

10U/4V

6 inside cavity, south side, primary layer.

+1.05V_VCCP

C480

C480

0.1U/10V

0.1U/10V

12

12

Layout out:
Place these inside socket cavity on North side secondary.

D D

C534

C534

0.1U/10V

0.1U/10V

12

C481

C481

0.1U/10V

0.1U/10V

12

C535

C535

0.1U/10V

0.1U/10V

12

C482

C482

0.1U/10V

0.1U/10V

12

C536

C536

0.1U/10V

0.1U/10V

+PWR_SRC

12

C78

C78

+

+

100U/25V

100U/25V

Layout Note:
Need to add 100uF cap on PWR_SRC for cap singing.
Place on PWR_SRC near +VCC_CORE.

U7C

U7C

A7

VCC[001]

A9

VCC[002]

A10

VCC[003]

A12

VCC[004]

A13

VCC[005]

A15

VCC[006]

A17

VCC[007]

A18

VCC[008]

A20

VCC[009]

B7

VCC[010]

B9

VCC[011]

B10

VCC[012]

B12

VCC[013]

B14

VCC[014]

B15

VCC[015]

B17

VCC[016]

B18

VCC[017]

B20

VCC[018]

C9

VCC[019]

C10

VCC[020]

C12

VCC[021]

C13

VCC[022]

C15

VCC[023]

C17

VCC[024]

C18

VCC[025]

D9

VCC[026]

D10

VCC[027]

D12

VCC[028]

D14

VCC[029]

D15

VCC[030]

D17

VCC[031]

D18

VCC[032]

E7

VCC[033]

E9

VCC[034]

E10

VCC[035]

E12

VCC[036]

E13

VCC[037]

E15

VCC[038]

E17

VCC[039]

E18

VCC[040]

E20

VCC[041]

F7

VCC[042]

F9

VCC[043]

F10

VCC[044]

F12

VCC[045]

F14

VCC[046]

F15

VCC[047]

F17

VCC[048]

F18

VCC[049]

F20

VCC[050]

AA7

VCC[051]

AA9

VCC[052]

AA10

VCC[053]

AA12

VCC[054]

AA13

VCC[055]

AA15

VCC[056]

AA17

VCC[057]

AA18

VCC[058]

AA20

VCC[059]

AB9

VCC[060]

AC10

VCC[061]

AB10

VCC[062]

AB12

VCC[063]

AB14

VCC[064]

AB15

VCC[065]

AB17

VCC[066]

AB18

VCC[067]

Merom Ball-out Rev 1a

Merom Ball-out Rev 1a

12

+

+

C88

C88
100U/25V

100U/25V

VCC[068]
VCC[069]
VCC[070]
VCC[071]
VCC[072]
VCC[073]
VCC[074]
VCC[075]
VCC[076]
VCC[077]
VCC[078]
VCC[079]
VCC[080]
VCC[081]
VCC[082]
VCC[083]
VCC[084]
VCC[085]
VCC[086]
VCC[087]
VCC[088]
VCC[089]
VCC[090]
VCC[091]
VCC[092]
VCC[093]
VCC[094]
VCC[095]
VCC[096]
VCC[097]
VCC[098]
VCC[099]
VCC[100]

VCCP[01]
VCCP[02]
VCCP[03]
VCCP[04]
VCCP[05]
VCCP[06]
VCCP[07]
VCCP[08]
VCCP[09]
VCCP[10]
VCCP[11]
VCCP[12]
VCCP[13]
VCCP[14]
VCCP[15]
VCCP[16]

VCCA[01]
VCCA[02]

VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]

VCCSENSE

VSSSENSE

AB20
AB7
AC7
AC9
AC12
AC13
AC15
AC17
AC18
AD7
AD9
AD10
AD12
AD14
AD15
AD17
AD18
AE9
AE10
AE12
AE13
AE15
AE17
AE18
AE20
AF9
AF10
AF12
AF14
AF15
AF17
AF18
AF20

G21
V6
J6
K6
M6
J21
K21
M21
N21
N6
R21
R6
T21
T6
V21
W21

B26
C26

AD6
AF5
AE5
AF4
AE3
AF3
AE2

AF7

AE7

.

.

12

C108

C108

+

+

100U/25V

100U/25V

VCCSENSE

VSSSENSE

+1.05V_VCCP

12

+

+

VID0 51
VID1 51
VID2 51
VID3 51
VID4 51
VID5 51
VID6 51

VCCSENSE 51

VSSSENSE 51

12

C135

C135

+

+

100U/25V_NC

100U/25V_NC

C544

C544
220U/4V

220U/4V

12

C573

C573

0.01U/25V

0.01U/25V

Layout Note:
Place C105 near PIN
B26.

+VCC_CORE

VCCSENSE
VSSSENSE

Route VCCSENSE and VSSSENSE
traces at 27.4ohms and
length matched to within 25
mil. Place PU and PD within
2 inch of CPU.

+1.5V_RUN

12

12

R379

R379
100/F

100/F

12

R376

R376
100/F

100/F

C575

C575
10U/4V

10U/4V

U7D

U7D

A4

VSS[001]

A8

VSS[002]

A11

VSS[003]

A14

VSS[004]

A16

VSS[005]

A19

VSS[006]

A23

VSS[007]

AF2

VSS[008]

B6

VSS[009]

B8

VSS[010]

B11

VSS[011]

B13

VSS[012]

B16

VSS[013]

B19

VSS[014]

B21

VSS[015]

B24

VSS[016]

C5

VSS[017]

C8

VSS[018]

C11

VSS[019]

C14

VSS[020]

C16

VSS[021]

C19

VSS[022]

C2

VSS[023]

C22

VSS[024]

C25

VSS[025]

D1

VSS[026]

D4

VSS[027]

D8

VSS[028]

D11

VSS[029]

D13

VSS[030]

D16

VSS[031]

D19

VSS[032]

D23

VSS[033]

D26

VSS[034]

E3

VSS[035]

E6

VSS[036]

E8

VSS[037]

E11

VSS[038]

E14

VSS[039]

E16

VSS[040]

E19

VSS[041]

E21

VSS[042]

E24

VSS[043]

F5

VSS[044]

F8

VSS[045]

F11

VSS[046]

F13

VSS[047]

F16

VSS[048]

F19

VSS[049]

F2

VSS[050]

F22

VSS[051]

F25

VSS[052]

G4

VSS[053]

G1

VSS[054]

G23

VSS[055]

G26

VSS[056]

H3

VSS[057]

H6

VSS[058]

H21

VSS[059]

H24

VSS[060]

J2

VSS[061]

J5

VSS[062]

J22

VSS[063]

J25

VSS[064]

K1

VSS[065]

K4

VSS[066]

K23

VSS[067]

K26

VSS[068]

L3

VSS[069]

L6

VSS[070]

L21

VSS[071]

L24

VSS[072]

M2

VSS[073]

M5

VSS[074]

M22

VSS[075]

M25

VSS[076]

N1

VSS[077]

N4

VSS[078]

N23

VSS[079]

N26

VSS[080]
VSS[081]P3VSS[162]

Merom Ball-out Rev 1a

Merom Ball-out Rev 1a

VSS[082]
VSS[083]
VSS[084]
VSS[085]
VSS[086]
VSS[087]
VSS[088]
VSS[089]
VSS[090]
VSS[091]
VSS[092]
VSS[093]
VSS[094]
VSS[095]
VSS[096]
VSS[097]
VSS[098]
VSS[099]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]

VSS[163]

P6
P21
P24
R2
R5
R22
R25
T1
T4
T23
T26
U3
U6
U21
U24
V2
V5
V22
V25
W1
W4
W23
W26
Y3
Y6
Y21
Y24
AA2
AA5
AA8
AA11
AA14
AA16
AA19
AA22
AA25
AB1
AB4
AB8
AB11
AB13
AB16
AB19
AB23
AB26
AC3
AC6
AC8
AC11
AC14
AC16
AC19
AC21
AC24
AD2
AD5
AD8
AD11
AD13
AD16
AD19
AD22
AD25
AE1
AE4
AE8
AE11
AE14
AE16
AE19
AE23
AE26
A2
AF6
AF8
AF11
AF13
AF16
AF19
AF21
A25
AF25

.

.

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

1

2

3

4

5

6

Date: Sheet

COMPUTER

Merom Processor (POWER)

Merom Processor (POWER)

Merom Processor (POWER)

JM7B 2C

JM7B 2C

JM7B 2C

7

of

of

of

457Thursday, October 26, 2006

457Thursday, October 26, 2006

457Thursday, October 26, 2006

8

1

[e-mail]
GRATIS - FOR FREE

2

3

4

5

6

7

8

U12A

M10
N12

W10

AD12

AE3
AD9
AC9

AC7
AC14
AD11
AC11

AB2

AD7

AB1

AC6

AE2

AC5

AG3

AH8

AJ14

AE9
AE11
AH12

AH5

AE7

AE5

AH2
AH13

E2
G2
G7
M6
H7
H3
G4

F3
N8
H2

N9
H5

P13

K9
M2

Y8

V4
M3

J1
N5
N3
W6
W9
N2

Y7
Y9

P4
W3
N1

Y3

AJ9

AJ5
AJ6
AJ7

AJ2
AJ3

B3
C2

W1
W2

B6

E5

B9

A9

U12A

H_D#_0
H_D#_1
H_D#_2
H_D#_3
H_D#_4
H_D#_5
H_D#_6
H_D#_7
H_D#_8
H_D#_9
H_D#_10
H_D#_11
H_D#_12
H_D#_13
H_D#_14
H_D#_15
H_D#_16
H_D#_17
H_D#_18
H_D#_19
H_D#_20
H_D#_21
H_D#_22
H_D#_23
H_D#_24
H_D#_25
H_D#_26
H_D#_27
H_D#_28
H_D#_29
H_D#_30
H_D#_31
H_D#_32
H_D#_33
H_D#_34
H_D#_35
H_D#_36
H_D#_37
H_D#_38
H_D#_39
H_D#_40
H_D#_41
H_D#_42
H_D#_43
H_D#_44
H_D#_45
H_D#_46
H_D#_47
H_D#_48
H_D#_49
H_D#_50
H_D#_51
H_D#_52
H_D#_53
H_D#_54
H_D#_55
H_D#_56
H_D#_57
H_D#_58
H_D#_59
H_D#_60
H_D#_61
H_D#_62
H_D#_63

H_SWING
H_RCOMP

H_SCOMP
H_SCOMP#

H_CPURST#
H_CPUSLP#

H_AVREF
H_DVREF

CRESTLINE_1p0

CRESTLINE_1p0

H_ADSTB#_0
H_ADSTB#_1

HOST

HOST

H_DSTBN#_0
H_DSTBN#_1
H_DSTBN#_2
H_DSTBN#_3

H_DSTBP#_0
H_DSTBP#_1
H_DSTBP#_2
H_DSTBP#_3

H_A#_3
H_A#_4
H_A#_5
H_A#_6
H_A#_7
H_A#_8

H_A#_9
H_A#_10
H_A#_11
H_A#_12
H_A#_13
H_A#_14
H_A#_15
H_A#_16
H_A#_17
H_A#_18
H_A#_19
H_A#_20
H_A#_21
H_A#_22
H_A#_23
H_A#_24
H_A#_25
H_A#_26
H_A#_27
H_A#_28
H_A#_29
H_A#_30
H_A#_31
H_A#_32
H_A#_33
H_A#_34
H_A#_35

H_ADS#

H_BNR#

H_BPRI#

H_BREQ#

H_DEFER#

H_DBSY#

HPLL_CLK

HPLL_CLK#

H_DPWR#

H_DRDY#

H_HIT#
H_HITM#

H_LOCK#
H_TRDY#

H_DINV#_0
H_DINV#_1
H_DINV#_2
H_DINV#_3

H_REQ#_0
H_REQ#_1
H_REQ#_2
H_REQ#_3
H_REQ#_4

H_RS#_0
H_RS#_1
H_RS#_2

J13
B11
C11
M11
C15
F16
L13
G17
C14
K16
B13
L16
J17
B14
K19
P15
R17
B16
H20
L19
D17
M17
N16
J19
B18
E19
B17
B15
E17
C18
A19
B19
N19

G12
H17
G20
C8
E8
F12
D6
C10
AM5
AM7
H8
K7
E4
C6
G10
B7

K5
L2
AD13
AE13

M7
K3
AD2
AH11

L7
K2
AC2
AJ10

M14
E13
A11
H13
B12

E12
D7
D8

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35

H_D#[0..63]3

A A

+1.05V_VCCP

12

R434

R434
221/F

221/F

H_SWING

12

R433

R433
100/F

100/F

B B

+1.05V_VCCP

12

R465

R465

54.9/F

54.9/F

12

R432

R432

24.9/F

24.9/F

Layout Note:
H_RCOMP trace should be
10-mil wide with 20-mil

C C

spacing.

12

R461

R461

54.9/F

54.9/F

1 2

H_SCOMP
H_SCOMP#

H_RCOMP

C602

C602

0.1U/10V

0.1U/10V

+1.05V_VCCP

R436

R436
1K/F

1K/F

1 2

12

R435

R435
2K/F

2K/F

H_D#[0..63]

H_RESET#3

H_CPUSLP#3

12

C615

C615

0.1U/10V

0.1U/10V

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

H_SWING
H_RCOMP

H_SCOMP
H_SCOMP#

R669 0R669 0

1 2

H_REF

H_A#[3..35]

H_ADS# 3
H_ADSTB#0 3
H_ADSTB#1 3
H_BNR# 3
H_BPRI# 3
H_BR0# 3
H_DEFER# 3
H_DBSY# 3
CLK_MCH_BCLK 17
CLK_MCH_BCLK# 17
H_DPWR# 3
H_DRDY# 3
H_HIT# 3
H_HITM# 3
H_LOCK# 3
H_TRDY# 3

H_DINV#0 3
H_DINV#1 3
H_DINV#2 3
H_DINV#3 3

H_DSTBN#0 3
H_DSTBN#1 3
H_DSTBN#2 3
H_DSTBN#3 3

H_DSTBP#0 3
H_DSTBP#1 3
H_DSTBP#2 3
H_DSTBP#3 3

H_REQ#0 3
H_REQ#1 3
H_REQ#2 3
H_REQ#3 3
H_REQ#4 3

H_RS#0 3
H_RS#1 3
H_RS#2 3

H_A#[3..35] 3

Layout Note:
Place the 0.1 uF

D D

1

2

decoupling capacitor
within 100 mils from
GMCH pins.

3

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

4

5

6

Date: Sheet

COMPUTER

Crestline (HOST)

Crestline (HOST)

Crestline (HOST)

JM7B 2C

JM7B 2C

JM7B 2C

7

557Thursday, October 26, 2006

557Thursday, October 26, 2006

557Thursday, October 26, 2006

of

8

1

+1.8V_SUS

12

R498

R498
1K/F

SM_RCOMP_VOH

12

A A

SM_RCOMP_VOL

12

Santa Rosa Platform MOW WW15
For 4Gb DRAM support,
change Pin-BJ29 to DDR_A_MA14,
change Pin-BE24 to DDR_B_MA14.

+3.3V_RUN

B B

+1.05V_VCCP

Layout Note:
Location of all MCH_CFG strap
resistors needs to be close to
minmize stub.

CPU_MCH_BSEL03,17
CPU_MCH_BSEL13,17
CPU_MCH_BSEL23,17

C C

+3.3V_RUN

THERMTRIP_MCH#37

D D

12

C694

C696

C696

0.01U/25V

0.01U/25V

C698

C698

0.01U/25V

0.01U/25V

R452 10KR452 10K
R449 10KR449 10K

PM_BMBUSY#13

H_DPRSTP#3,11,51
PM_EXTTS#015
PM_EXTTS#115
ICH_PWRGD13,44

DPRSLPVR13,51

C694

2.2U/10V

2.2U/10V

12

C702

C702

2.2U/10V

2.2U/10V

DDR_A_MA1415,16
DDR_B_MA1415,16

1 2
1 2

R456 56R456 56

1 2

T70

T70

PAD

PAD

T25

T25

PAD

PAD

R446 4.02K/F_NCR446 4.02K/F_NC

T81

T81

PAD

PAD

T71

T71

PAD

PAD

T76

T76

PAD

PAD

R440 4.02K/F_NCR440 4.02K/F_NC

T82

T82

PAD

PAD

T72

T72

PAD

PAD

T78

T78

PAD

PAD

T73

T73

PAD

PAD

T75

T75

PAD

PAD

T80

T80

PAD

PAD

R455 4.02K/F_NCR455 4.02K/F_NC

T79

T79

PAD

PAD

T77

T77

PAD

PAD

R453 4.02K/F_NCR453 4.02K/F_NC
R448 4.02K/F_NCR448 4.02K/F_NC

SB_NB_PCIE_RST#12

PLTRST#12,28,29,31,32,40

1

1K/F

12

R499

R499

3.01K/F

3.01K/F

12

R494

R494
1K/F

1K/F

PM_EXTTS#0
PM_EXTTS#1

THERMTRIP_MCH#

12

12

12

12
12

PM_EXTTS#0
PM_EXTTS#1

PLTRST#_R
THERMTRIP_MCH#

1 2

R442 0R442 0

R472 0_NCR472 0_NC

1 2

R474 0R474 0

1 2

CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
CFG20

P36
P37
R35

N35
AR12
AR13

AM12

AN13

J12

AR37

AM36

AL36

AM37

D20

H10

B51

BJ20
BK22
BF19
BH20
BK18

BJ18
BF23
BG23
BC23
BD24

BJ29
BE24
BH39

AW20

BK20

C48
D47
B44
C44
A35
B37
B36
B34
C34

P27
N27
N24
C21
C23
F23
N23
G23

J20
C20
R24

L23

J23
E23
E20
K23
M20
M24

L32
N33

L35

G41

L39

L36

J36

AW49

AV20

N20
G36

BJ51
BK51
BK50

BL50

BL49

BL3
BL2
BK1
BJ1

E1

A5
C51
B50
A50
A49
BK2

CRESTLINE_1p0

CRESTLINE_1p0

R471 100R471 100

2

U12B

U12B

RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
RSVD6
RSVD7
RSVD8
RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14

RSVD20
RSVD21
RSVD22
RSVD23
RSVD24
RSVD25
RSVD26
RSVD27
RSVD28
RSVD29
RSVD30
RSVD31
RSVD32
RSVD33
RSVD34
RSVD35
RSVD36
RSVD37
RSVD38
RSVD39
RSVD40
RSVD41
RSVD42
RSVD43
RSVD44
RSVD45

CFG_0
CFG_1
CFG_2
CFG_3
CFG_4
CFG_5
CFG_6
CFG_7
CFG_8
CFG_9
CFG_10
CFG_11
CFG_12
CFG_13
CFG_14
CFG_15
CFG_16
CFG_17
CFG_18
CFG_19
CFG_20

PM_BM_BUSY#
PM_DPRSTP#
PM_EXT_TS#_0
PM_EXT_TS#_1
PWROK
RSTIN#
THERMTRIP#
DPRSLPVR

NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
NC_7
NC_8
NC_9
NC_10
NC_11
NC_12
NC_13
NC_14
NC_15
NC_16

12

2

PLTRST#_R

DDR MUXINGCLKDMI

DDR MUXINGCLKDMI

CFGRSVD

CFGRSVD

PM

PM

GRAPHICS VIDME

GRAPHICS VIDME

NC

NC

MISC

MISC

3

SM_CK_0
SM_CK_1
SM_CK_3
SM_CK_4

SM_CK#_0
SM_CK#_1
SM_CK#_3
SM_CK#_4

SM_CKE_0
SM_CKE_1
SM_CKE_3
SM_CKE_4

SM_CS#_0
SM_CS#_1
SM_CS#_2
SM_CS#_3

SM_ODT_0
SM_ODT_1
SM_ODT_2
SM_ODT_3

SM_RCOMP

SM_RCOMP#

SM_RCOMP_VOH

SM_RCOMP_VOL

SM_VREF_0
SM_VREF_1

DPLL_REF_CLK

DPLL_REF_CLK#

DPLL_REF_SSCLK

DPLL_REF_SSCLK#

PEG_CLK

PEG_CLK#

DMI_RXN_0
DMI_RXN_1
DMI_RXN_2
DMI_RXN_3

DMI_RXP_0
DMI_RXP_1
DMI_RXP_2
DMI_RXP_3

DMI_TXN_0
DMI_TXN_1
DMI_TXN_2
DMI_TXN_3

DMI_TXP_0
DMI_TXP_1
DMI_TXP_2
DMI_TXP_3

GFX_VID_0
GFX_VID_1
GFX_VID_2
GFX_VID_3

GFX_VR_EN

CL_CLK

CL_DATA

CL_PWROK

CL_RST#

CL_VREF

SDVO_CTRL_CLK

SDVO_CTRL_DATA

CLK_REQ#

ICH_SYNC#

TEST_1
TEST_2

3

AV29
BB23
BA25
AV23

AW30
BA23
AW25
AW23

BE29
AY32
BD39
BG37

BG20
BK16
BG16
BE13

BH18
BJ15
BJ14
BE16

BL15
BK14

BK31
BL31

AR49
AW4

B42
C42
H48
H47

K44
K45

AN47
AJ38
AN42
AN46

AM47
AJ39
AN41
AN45

AJ46
AJ41
AM40
AM44

AJ47
AJ42
AM39
AM43

E35
A39
C38
B39
E36

AM49
AK50
AT43
AN49
AM50

H35
K36
G39
G40

A37
R32

M_CLK_DDR0 15
M_CLK_DDR1 15
M_CLK_DDR3 15
M_CLK_DDR4 15

M_CLK_DDR#0 15
M_CLK_DDR#1 15
M_CLK_DDR#3 15
M_CLK_DDR#4 15

DDR_CKE0_DIMMA 15,16
DDR_CKE1_DIMMA 15,16
DDR_CKE3_DIMMB 15,16
DDR_CKE4_DIMMB 15,16

DDR_CS0_DIMMA# 15,16
DDR_CS1_DIMMA# 15,16
DDR_CS2_DIMMB# 15,16
DDR_CS3_DIMMB# 15,16

M_ODT0 15,16
M_ODT1 15,16
M_ODT2 15,16
M_ODT3 15,16

SMRCOMPP
SMRCOMPN

SM_RCOMP_VOH
SM_RCOMP_VOL

V_DDR_MCH_REF

CLK_MCH_3GPLL 17
CLK_MCH_3GPLL# 17

DMI_MRX_ITX_N0 12
DMI_MRX_ITX_N1 12
DMI_MRX_ITX_N2 12
DMI_MRX_ITX_N3 12

DMI_MRX_ITX_P0 12
DMI_MRX_ITX_P1 12
DMI_MRX_ITX_P2 12
DMI_MRX_ITX_P3 12

DMI_MTX_IRX_N0 12
DMI_MTX_IRX_N1 12
DMI_MTX_IRX_N2 12
DMI_MTX_IRX_N3 12

DMI_MTX_IRX_P0 12
DMI_MTX_IRX_P1 12
DMI_MTX_IRX_P2 12
DMI_MTX_IRX_P3 12

T74

T74
T23

T23
T22

T22
T26

T26
T24

T24

CL_CLK0 13
CL_DATA0 13
ICH_CL_PWROK 13,31

ICH_CL_RST0# 13

MCH_CLVREF

CLK_3GPLLREQ# 17
MCH_ICH_SYNC# 13

R458

R458
20K

20K

1 2

1 2

PAD

PAD
PAD

PAD
PAD

PAD
PAD

PAD
PAD

PAD

R4370R437
0

4

4

SMRCOMPP
SMRCOMPN

+1.25V_RUN

Non-iAMT

MCH_CLVREF

C663

C663

0.1U/10V

0.1U/10V

1 2

SDVO_CRTL_DATA

+1.8V_SUS

R488

R488
20/F

20/F

R216

R216
20/F

20/F

CFG5

CFG9

CFG16

CFG19

CFG20

12

R468

R468
1K/F

1K/F

12

R469

R469
392/F

392/F

12

12

5

U12C

U12C

J40

L_BKLT_CTRL

H39

L_BKLT_EN

E39

L_CTRL_CLK

E40

L_CTRL_DATA

C37

L_DDC_CLK

D35

L_DDC_DATA

K40

L_VDD_EN

L41

LVDS_IBG

L43

LVDS_VBG

N41

LVDS_VREFH

N40

LVDS_VREFL

D46

LVDSA_CLK#

C45

LVDSA_CLK

D44

LVDSB_CLK#

E42

LVDSB_CLK

G51

LVDSA_DATA#_0

E51

LVDSA_DATA#_1

F49

LVDSA_DATA#_2

G50

LVDSA_DATA_0

E50

LVDSA_DATA_1

F48

LVDSA_DATA_2

G44

LVDSB_DATA#_0

B47

LVDSB_DATA#_1

B45

LVDSB_DATA#_2

E44

LVDSB_DATA_0

A47

LVDSB_DATA_1

A45

LVDSB_DATA_2

E27

TVA_DAC

G27

TVB_DAC

K27

TVC_DAC

F27

TVA_RTN

J27

TVB_RTN

L27

TVC_RTN

M35

TV_DCONSEL_0

P33

TV_DCONSEL_1

H32

CRT_BLUE

G32

CRT_BLUE#

K29

CRT_GREEN

J29

CRT_GREEN#

F29

CRT_RED

E29

CRT_RED#

K33

CRT_DDC_CLK

G35

CRT_DDC_DATA

F33

CRT_HSYNC

C32

CRT_TVO_IREF

E33

CRT_VSYNC

CRESTLINE_1p0

CRESTLINE_1p0

DMI X2 Select
PCI Express

Graphic Lane
FSB Dynamic

ODT
DMI Lane

Reversal

SDVO/PCIE
Concurrent
Operation

SDVO Present.

5

6

PEG_RX_0
PEG_RX_1
PEG_RX_2
PEG_RX_3
PEG_RX_4
PEG_RX_5
PEG_RX_6
PEG_RX_7
PEG_RX_8
PEG_RX_9

PEG_TX_0
PEG_TX_1
PEG_TX_2
PEG_TX_3
PEG_TX_4
PEG_TX_5
PEG_TX_6
PEG_TX_7
PEG_TX_8
PEG_TX_9

N43
M43

J51
L51
N47
T45
T50
U40
Y44
Y40
AB51
W49
AD44
AD40
AG46
AH49
AG45
AG41

J50
L50
M47
U44
T49
T41
W45
W41
AB50
Y48
AC45
AC41
AH47
AG49
AH45
AG42

N45
U39
U47
N51
R50
T42
Y43
W46
W38
AD39
AC46
AC49
AC42
AH39
AE49
AH44

M45
T38
T46
N50
R51
U43
W42
Y47
Y39
AC38
AD47
AC50
AD43
AG39
AE50
AH43

PEG_COMPI

PEG_COMPO

PEG_RX#_0
PEG_RX#_1
PEG_RX#_2
PEG_RX#_3
PEG_RX#_4
PEG_RX#_5
PEG_RX#_6
PEG_RX#_7
PEG_RX#_8

LVDS

LVDS

TV VGA

TV VGA

Low=DMIx2
High=DMIx4(Default)

Low= Reveise Lane
High=Normal operation

Low=Dynamic ODT Disable
High=Dynamic ODT Enable(default).

Low=Normal(default).
High=Lane Reversed

Low=Only SDVO or PCIEx1 is
operational (defaults)
High=SDVO and PCIEx1 are operating
simultaneously via PEG port

Low=No SDVO Device Present
(default)
High=SDVO Device Present

PEG_RX#_9
PEG_RX#_10
PEG_RX#_11
PEG_RX#_12
PEG_RX#_13
PEG_RX#_14
PEG_RX#_15

PEG_RX_10

PEG_RX_11

PEG_RX_12

PEG_RX_13

PEG_RX_14

PEG_RX_15

PEG_TX#_0

PEG_TX#_1

PEG_TX#_2

PEG_TX#_3

PEG_TX#_4

PEG_TX#_5

PEG_TX#_6

PEG_TX#_7

PEG_TX#_8

PEG_TX#_9

PEG_TX#_10
PEG_TX#_11

PCI-EXPRESS GRAPHICS

PCI-EXPRESS GRAPHICS

PEG_TX#_12
PEG_TX#_13
PEG_TX#_14
PEG_TX#_15

PEG_TX_10

PEG_TX_11

PEG_TX_12

PEG_TX_13

PEG_TX_14

PEG_TX_15

6

7

+VCC_PEG

VCC3G_PCIE_R

PCIE_MRX_GTX_N0
PCIE_MRX_GTX_N1
PCIE_MRX_GTX_N2
PCIE_MRX_GTX_N3
PCIE_MRX_GTX_N4
PCIE_MRX_GTX_N5
PCIE_MRX_GTX_N6
PCIE_MRX_GTX_N7
PCIE_MRX_GTX_N8
PCIE_MRX_GTX_N9
PCIE_MRX_GTX_N10
PCIE_MRX_GTX_N11
PCIE_MRX_GTX_N12
PCIE_MRX_GTX_N13
PCIE_MRX_GTX_N14
PCIE_MRX_GTX_N15

PCIE_MRX_GTX_P0
PCIE_MRX_GTX_P1
PCIE_MRX_GTX_P2
PCIE_MRX_GTX_P3
PCIE_MRX_GTX_P4
PCIE_MRX_GTX_P5
PCIE_MRX_GTX_P6
PCIE_MRX_GTX_P7
PCIE_MRX_GTX_P8
PCIE_MRX_GTX_P9
PCIE_MRX_GTX_P10
PCIE_MRX_GTX_P11
PCIE_MRX_GTX_P12
PCIE_MRX_GTX_P13
PCIE_MRX_GTX_P14
PCIE_MRX_GTX_P15

PCIE_MTX_GRX_C_N0
PCIE_MTX_GRX_C_N1
PCIE_MTX_GRX_C_N2
PCIE_MTX_GRX_C_N3
PCIE_MTX_GRX_C_N4
PCIE_MTX_GRX_C_N5
PCIE_MTX_GRX_C_N6
PCIE_MTX_GRX_C_N7
PCIE_MTX_GRX_C_N8
PCIE_MTX_GRX_C_N9
PCIE_MTX_GRX_C_N10
PCIE_MTX_GRX_C_N11
PCIE_MTX_GRX_C_N12
PCIE_MTX_GRX_C_N13
PCIE_MTX_GRX_C_N14
PCIE_MTX_GRX_C_N15

PCIE_MTX_GRX_C_P0
PCIE_MTX_GRX_C_P1
PCIE_MTX_GRX_C_P2
PCIE_MTX_GRX_C_P3
PCIE_MTX_GRX_C_P4
PCIE_MTX_GRX_C_P5
PCIE_MTX_GRX_C_P6
PCIE_MTX_GRX_C_P7
PCIE_MTX_GRX_C_P8
PCIE_MTX_GRX_C_P9
PCIE_MTX_GRX_C_P10
PCIE_MTX_GRX_C_P11
PCIE_MTX_GRX_C_P12
PCIE_MTX_GRX_C_P13
PCIE_MTX_GRX_C_P14
PCIE_MTX_GRX_C_P15

Title

Title

Title

Crestline (VGA,DMI)

Crestline (VGA,DMI)

Crestline (VGA,DMI)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

JM7B 2C

JM7B 2C

JM7B 2C

Date: Sheet

Date: Sheet

Date: Sheet

R450 24.9/FR450 24.9/F

1 2

PCIE_MRX_GTX_N[0..15] 18

PCIE_MRX_GTX_P[0..15] 18

C113 0.1U/10VC113 0.1U/10V

1 2

C117 0.1U/10VC117 0.1U/10V

1 2

C129 0.1U/10VC129 0.1U/10V

1 2

C140 0.1U/10VC140 0.1U/10V

1 2

C123 0.1U/10VC123 0.1U/10V

1 2

C149 0.1U/10VC149 0.1U/10V

1 2

C115 0.1U/10VC115 0.1U/10V

1 2

C151 0.1U/10VC151 0.1U/10V

1 2

C121 0.1U/10VC121 0.1U/10V

1 2

C159 0.1U/10VC159 0.1U/10V

1 2

C125 0.1U/10VC125 0.1U/10V

1 2

C163 0.1U/10VC163 0.1U/10V

1 2

C127 0.1U/10VC127 0.1U/10V

1 2

C169 0.1U/10VC169 0.1U/10V

1 2

C119 0.1U/10VC119 0.1U/10V

1 2

C173 0.1U/10VC173 0.1U/10V

1 2

C112 0.1U/10VC112 0.1U/10V

1 2

C116 0.1U/10VC116 0.1U/10V

1 2

C128 0.1U/10VC128 0.1U/10V

1 2

C139 0.1U/10VC139 0.1U/10V

1 2

C122 0.1U/10VC122 0.1U/10V

1 2

C147 0.1U/10VC147 0.1U/10V

1 2

C114 0.1U/10VC114 0.1U/10V

1 2

C150 0.1U/10VC150 0.1U/10V

1 2

C120 0.1U/10VC120 0.1U/10V

1 2

C154 0.1U/10VC154 0.1U/10V

1 2

C124 0.1U/10VC124 0.1U/10V

1 2

C161 0.1U/10VC161 0.1U/10V

1 2

C126 0.1U/10VC126 0.1U/10V

1 2

C166 0.1U/10VC166 0.1U/10V

1 2

C118 0.1U/10VC118 0.1U/10V

1 2

C172 0.1U/10VC172 0.1U/10V

1 2

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

COMPUTER

7

8

PCIE_MTX_GRX_N[0..15] 18
PCIE_MTX_GRX_P[0..15] 18

PCIE_MTX_GRX_N0
PCIE_MTX_GRX_N1
PCIE_MTX_GRX_N2
PCIE_MTX_GRX_N3
PCIE_MTX_GRX_N4
PCIE_MTX_GRX_N5
PCIE_MTX_GRX_N6
PCIE_MTX_GRX_N7
PCIE_MTX_GRX_N8
PCIE_MTX_GRX_N9
PCIE_MTX_GRX_N10
PCIE_MTX_GRX_N11
PCIE_MTX_GRX_N12
PCIE_MTX_GRX_N13
PCIE_MTX_GRX_N14
PCIE_MTX_GRX_N15

PCIE_MTX_GRX_P0
PCIE_MTX_GRX_P1
PCIE_MTX_GRX_P2
PCIE_MTX_GRX_P3
PCIE_MTX_GRX_P4
PCIE_MTX_GRX_P5
PCIE_MTX_GRX_P6
PCIE_MTX_GRX_P7
PCIE_MTX_GRX_P8
PCIE_MTX_GRX_P9
PCIE_MTX_GRX_P10
PCIE_MTX_GRX_P11
PCIE_MTX_GRX_P12
PCIE_MTX_GRX_P13
PCIE_MTX_GRX_P14
PCIE_MTX_GRX_P15

of

of

of

657Thursday, October 26, 2006

657Thursday, October 26, 2006

657Thursday, October 26, 2006

8

1

[e-mail]
GRATIS - FOR FREE

2

3

4

5

6

7

8

DDR_A_D[0..63]15

A A

B B

C C

DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63

AR43

AW44

BA45
AY46
AR41
AR45
AT42

AW47

BB45
BF48
BG47

BJ45
BB47
BG50
BH49
BE45

AW43

BE44
BG42
BE40
BF44
BH45
BG40
BF40
AR40

AW40

AT39

AW36
AW41

AY41
AV38
AT38
AV13
AT13

AW11

AV11
AU15
AT11
BA13
BA11
BE10
BD10

BG10

AW9

AM8

AN10

AM9

AN11

BD8
AY9

BD7
BB9
BB5
AY7
AT5
AT7
AY6
BB7
AR5
AR8
AR9
AN3

AT9
AN9

U12D

U12D

SA_DQ_0
SA_DQ_1
SA_DQ_2
SA_DQ_3
SA_DQ_4
SA_DQ_5
SA_DQ_6
SA_DQ_7
SA_DQ_8
SA_DQ_9
SA_DQ_10
SA_DQ_11
SA_DQ_12
SA_DQ_13
SA_DQ_14
SA_DQ_15
SA_DQ_16
SA_DQ_17
SA_DQ_18
SA_DQ_19
SA_DQ_20
SA_DQ_21
SA_DQ_22
SA_DQ_23
SA_DQ_24
SA_DQ_25
SA_DQ_26
SA_DQ_27
SA_DQ_28
SA_DQ_29
SA_DQ_30
SA_DQ_31
SA_DQ_32
SA_DQ_33
SA_DQ_34
SA_DQ_35
SA_DQ_36
SA_DQ_37
SA_DQ_38
SA_DQ_39
SA_DQ_40
SA_DQ_41
SA_DQ_42
SA_DQ_43
SA_DQ_44
SA_DQ_45
SA_DQ_46
SA_DQ_47
SA_DQ_48
SA_DQ_49
SA_DQ_50
SA_DQ_51
SA_DQ_52
SA_DQ_53
SA_DQ_54
SA_DQ_55
SA_DQ_56
SA_DQ_57
SA_DQ_58
SA_DQ_59
SA_DQ_60
SA_DQ_61
SA_DQ_62
SA_DQ_63

CRESTLINE_1p0

CRESTLINE_1p0

DDR_A_BS0

BB19

SA_BS_0
SA_BS_1
SA_BS_2

SA_CAS#
SA_DM_0

SA_DM_1
SA_DM_2
SA_DM_3
SA_DM_4
SA_DM_5
SA_DM_6
SA_DM_7

SA_DQS_0
SA_DQS_1
SA_DQS_2
SA_DQS_3
SA_DQS_4
SA_DQS_5
SA_DQS_6

SA_DQS_7
SA_DQS#_0
SA_DQS#_1
SA_DQS#_2
SA_DQS#_3
SA_DQS#_4
SA_DQS#_5
SA_DQS#_6
SA_DQS#_7

SA_MA_0
SA_MA_1
SA_MA_2
SA_MA_3
SA_MA_4
SA_MA_5
SA_MA_6
SA_MA_7
SA_MA_8

SA_MA_9
SA_MA_10
SA_MA_11
SA_MA_12
SA_MA_13

SA_RAS#

SA_RCVEN#

DDR SYSTEM MEMORY A

DDR SYSTEM MEMORY A

SA_WE#

BK19
BF29

BL17
AT45

BD44
BD42
AW38
AW13
BG8
AY5
AN6

AT46
BE48
BB43
BC37
BB16
BH6
BB2
AP3
AT47
BD47
BC41
BA37
BA16
BH7
BC1
AP2

BJ19
BD20
BK27
BH28
BL24
BK28
BJ27
BJ25
BL28
BA28
BC19
BE28
BG30
BJ16

BE18
AY20

BA19

DDR_A_BS1
DDR_A_BS2

DDR_A_CAS#
DDR_A_DM0

DDR_A_DM1
DDR_A_DM2
DDR_A_DM3
DDR_A_DM4
DDR_A_DM5
DDR_A_DM6
DDR_A_DM7

DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7
DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7

DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13

DDR_A_RAS#

DDR_A_WE#

DDR_A_BS0 15,16
DDR_A_BS1 15,16
DDR_A_BS2 15,16

DDR_A_CAS# 15,16
DDR_A_DM[0..7] 15

DDR_A_DQS[0..7] 15

DDR_A_DQS#[0..7] 15

DDR_A_MA[0..13] 15,16

DDR_A_RAS# 15,16

T83 PADT83 PAD

DDR_A_WE# 15,16

DDR_B_D[0..63]15

DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63

AP49

AR51
AW50
AW51

AN51

AN50

AV50

AV49

BA50

BB50

BA49

BE50

BA51

AY49

BF50

BF49

BJ50
BJ44

BJ43
BL43
BK47
BK49
BK43
BK42

BJ41
BL41

BJ37

BJ36
BK41

BJ40
BL35
BK37
BK13
BE11
BK11
BC11
BC13
BE12
BC12
BG12

BJ10

BK10

BH5
BG1
BC2
BK3
BE4
BD3

BA3
BB3
AR1
AT3
AY2
AY3
AU2
AT2

BL9
BK5
BL5
BK9

BJ8
BJ6
BF4

BJ2

U12E

U12E

SB_DQ_0
SB_DQ_1
SB_DQ_2
SB_DQ_3
SB_DQ_4
SB_DQ_5
SB_DQ_6
SB_DQ_7
SB_DQ_8
SB_DQ_9
SB_DQ_10
SB_DQ_11
SB_DQ_12
SB_DQ_13
SB_DQ_14
SB_DQ_15
SB_DQ_16
SB_DQ_17
SB_DQ_18
SB_DQ_19
SB_DQ_20
SB_DQ_21
SB_DQ_22
SB_DQ_23
SB_DQ_24
SB_DQ_25
SB_DQ_26
SB_DQ_27
SB_DQ_28
SB_DQ_29
SB_DQ_30
SB_DQ_31
SB_DQ_32
SB_DQ_33
SB_DQ_34
SB_DQ_35
SB_DQ_36
SB_DQ_37
SB_DQ_38
SB_DQ_39
SB_DQ_40
SB_DQ_41
SB_DQ_42
SB_DQ_43
SB_DQ_44
SB_DQ_45
SB_DQ_46
SB_DQ_47
SB_DQ_48
SB_DQ_49
SB_DQ_50
SB_DQ_51
SB_DQ_52
SB_DQ_53
SB_DQ_54
SB_DQ_55
SB_DQ_56
SB_DQ_57
SB_DQ_58
SB_DQ_59
SB_DQ_60
SB_DQ_61
SB_DQ_62
SB_DQ_63

CRESTLINE_1p0

CRESTLINE_1p0

DDR_B_BS0

AY17

SB_BS_0
SB_BS_1

SB_BS_2
SB_CAS#
SB_DM_0

SB_DM_1
SB_DM_2
SB_DM_3
SB_DM_4
SB_DM_5
SB_DM_6
SB_DM_7

SB_DQS_0
SB_DQS_1
SB_DQS_2
SB_DQS_3
SB_DQS_4
SB_DQS_5
SB_DQS_6

SB_DQS_7
SB_DQS#_0
SB_DQS#_1
SB_DQS#_2
SB_DQS#_3
SB_DQS#_4
SB_DQS#_5
SB_DQS#_6
SB_DQS#_7

SB_MA_0
SB_MA_1
SB_MA_2
SB_MA_3
SB_MA_4
SB_MA_5
SB_MA_6
SB_MA_7
SB_MA_8

SB_MA_9
SB_MA_10
SB_MA_11
SB_MA_12
SB_MA_13

SB_RAS#

SB_RCVEN#

SB_WE#

DDR SYSTEM MEMORY B

DDR SYSTEM MEMORY B

BG18
BG36

BE17
AR50

BD49
BK45
BL39
BH12
BJ7
BF3
AW2

AT50
BD50
BK46
BK39
BJ12
BL7
BE2
AV2
AU50
BC50
BL45
BK38
BK12
BK7
BF2
AV3

BC18
BG28
BG25
AW17
BF25
BE25
BA29
BC28
AY28
BD37
BG17
BE37
BA39
BG13

AV16
AY18

BC17

DDR_B_BS1
DDR_B_BS2

DDR_B_CAS#
DDR_B_DM0

DDR_B_DM1
DDR_B_DM2
DDR_B_DM3
DDR_B_DM4
DDR_B_DM5
DDR_B_DM6
DDR_B_DM7

DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7
DDR_B_DQS#0
DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#5
DDR_B_DQS#6
DDR_B_DQS#7

DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13

DDR_B_RAS#

DDR_B_WE#

DDR_B_BS0 15,16
DDR_B_BS1 15,16
DDR_B_BS2 15,16

DDR_B_CAS# 15,16
DDR_B_DM[0..7] 15

DDR_B_DQS[0..7] 15

DDR_B_DQS#[0..7] 15

DDR_B_MA[0..13] 15,16

DDR_B_RAS# 15,16

T84 PADT84 PAD

DDR_B_WE# 15,16

D D

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

COMPUTER

Crestline (DDR2)

Crestline (DDR2)

Crestline (DDR2)

JM7B 2C

JM7B 2C

JM7B 2C

7

757Thursday, October 26, 2006

757Thursday, October 26, 2006

757Thursday, October 26, 2006

of

8

1

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

2

3

4

5

6

Date: Sheet

5

+1.05V_VCCP

D D

+1.8V_SUS

C C

B B

A A

AT35
AT34
AH28
AC32
AC31
AK32

AJ31

AJ28
AH32
AH31
AH29
AF32

AU32
AU33
AU35
AV33

AW33
AW35

AY35
BA32
BA33
BA35
BB33
BC32
BC33
BC35
BD32
BD35
BE32
BE33
BE35
BF33
BF34
BG32
BG33
BG35
BH32
BH34
BH35

BJ32

BJ33

BJ34
BK32
BK33
BK34
BK35

BL33
AU30

W13
W14

AA20
AA23
AA26
AA28
AB21
AB24
AB29
AC20
AC21
AC23
AC24
AC26
AC28
AC29
AD20
AD23
AD24
AD28
AF21
AF26
AA31
AH20
AH21
AH23
AH24
AH26
AD31

AJ20
AN14

R30

R20
T14

Y12

5

U12G

U12G

VCC_1
VCC_2
VCC_3
VCC_5
VCC_4
VCC_6
VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12

VCC_13

VCC_SM_1
VCC_SM_2
VCC_SM_3
VCC_SM_4
VCC_SM_5
VCC_SM_6
VCC_SM_7
VCC_SM_8
VCC_SM_9
VCC_SM_10
VCC_SM_11
VCC_SM_12
VCC_SM_13
VCC_SM_14
VCC_SM_15
VCC_SM_16
VCC_SM_17
VCC_SM_18
VCC_SM_19
VCC_SM_20
VCC_SM_21
VCC_SM_22
VCC_SM_23
VCC_SM_24
VCC_SM_25
VCC_SM_26
VCC_SM_27
VCC_SM_28
VCC_SM_29
VCC_SM_30
VCC_SM_31
VCC_SM_32
VCC_SM_33
VCC_SM_34
VCC_SM_35
VCC_SM_36

VCC_AXG_1
VCC_AXG_2
VCC_AXG_3
VCC_AXG_4
VCC_AXG_5
VCC_AXG_6
VCC_AXG_7
VCC_AXG_8
VCC_AXG_9
VCC_AXG_10
VCC_AXG_11
VCC_AXG_12
VCC_AXG_13
VCC_AXG_14
VCC_AXG_15
VCC_AXG_16
VCC_AXG_17
VCC_AXG_18
VCC_AXG_19
VCC_AXG_20
VCC_AXG_21
VCC_AXG_22
VCC_AXG_23
VCC_AXG_24
VCC_AXG_25
VCC_AXG_26
VCC_AXG_27
VCC_AXG_28
VCC_AXG_29
VCC_AXG_30
VCC_AXG_31
VCC_AXG_32
VCC_AXG_33
VCC_AXG_34

CRESTLINE_1p0

CRESTLINE_1p0

VCC CORE

VCC CORE

POWER

POWER

VCC SMVCC GFX

VCC SMVCC GFX

VCC_AXG_NCTF_1
VCC_AXG_NCTF_2
VCC_AXG_NCTF_3
VCC_AXG_NCTF_4
VCC_AXG_NCTF_5
VCC_AXG_NCTF_6
VCC_AXG_NCTF_7
VCC_AXG_NCTF_8

VCC_AXG_NCTF_9
VCC_AXG_NCTF_10
VCC_AXG_NCTF_11
VCC_AXG_NCTF_12
VCC_AXG_NCTF_13
VCC_AXG_NCTF_14
VCC_AXG_NCTF_15
VCC_AXG_NCTF_16
VCC_AXG_NCTF_17
VCC_AXG_NCTF_18
VCC_AXG_NCTF_19
VCC_AXG_NCTF_20
VCC_AXG_NCTF_21
VCC_AXG_NCTF_22
VCC_AXG_NCTF_23
VCC_AXG_NCTF_24
VCC_AXG_NCTF_25
VCC_AXG_NCTF_26
VCC_AXG_NCTF_27
VCC_AXG_NCTF_28
VCC_AXG_NCTF_29
VCC_AXG_NCTF_30
VCC_AXG_NCTF_31
VCC_AXG_NCTF_32
VCC_AXG_NCTF_33
VCC_AXG_NCTF_34
VCC_AXG_NCTF_35
VCC_AXG_NCTF_36
VCC_AXG_NCTF_37
VCC_AXG_NCTF_38
VCC_AXG_NCTF_39
VCC_AXG_NCTF_40
VCC_AXG_NCTF_41
VCC_AXG_NCTF_42
VCC_AXG_NCTF_43
VCC_AXG_NCTF_44
VCC_AXG_NCTF_45
VCC_AXG_NCTF_46
VCC_AXG_NCTF_47
VCC_AXG_NCTF_48
VCC_AXG_NCTF_49
VCC_AXG_NCTF_50
VCC_AXG_NCTF_51
VCC_AXG_NCTF_52
VCC_AXG_NCTF_53
VCC_AXG_NCTF_54
VCC_AXG_NCTF_55

VCC GFX NCTF

VCC GFX NCTF

VCC_AXG_NCTF_56
VCC_AXG_NCTF_57
VCC_AXG_NCTF_58
VCC_AXG_NCTF_59
VCC_AXG_NCTF_60
VCC_AXG_NCTF_61
VCC_AXG_NCTF_62
VCC_AXG_NCTF_63
VCC_AXG_NCTF_64
VCC_AXG_NCTF_65
VCC_AXG_NCTF_66
VCC_AXG_NCTF_67
VCC_AXG_NCTF_68
VCC_AXG_NCTF_69
VCC_AXG_NCTF_70
VCC_AXG_NCTF_71
VCC_AXG_NCTF_72
VCC_AXG_NCTF_73
VCC_AXG_NCTF_74
VCC_AXG_NCTF_75
VCC_AXG_NCTF_76
VCC_AXG_NCTF_77
VCC_AXG_NCTF_78
VCC_AXG_NCTF_79
VCC_AXG_NCTF_80
VCC_AXG_NCTF_81
VCC_AXG_NCTF_82
VCC_AXG_NCTF_83

VCC_SM_LF1
VCC_SM_LF2
VCC_SM_LF3
VCC_SM_LF4
VCC_SM_LF5
VCC_SM_LF6
VCC_SM_LF7

VCC SM LF

VCC SM LF

T17
T18
T19
T21
T22
T23
T25
U15
U16
U17
U19
U20
U21
U23
U26
V16
V17
V19
V20
V21
V23
V24
Y15
Y16
Y17
Y19
Y20
Y21
Y23
Y24
Y26
Y28
Y29
AA16
AA17
AB16
AB19
AC16
AC17
AC19
AD15
AD16
AD17
AF16
AF19
AH15
AH16
AH17
AH19
AJ16
AJ17
AJ19
AK16
AK19
AL16
AL17
AL19
AL20
AL21
AL23
AM15
AM16
AM19
AM20
AM21
AM23
AP15
AP16
AP17
AP19
AP20
AP21
AP23
AP24
AR20
AR21
AR23
AR24
AR26
V26
V28
V29
Y31

AW45
BC39
BE39
BD17
BD4
AW8
AT6

4

VCCSM_LF1
VCCSM_LF2
VCCSM_LF3
VCCSM_LF4
VCCSM_LF5
VCCSM_LF6
VCCSM_LF7

4

12

C667

C667

0.1U/10V

0.1U/10V

+1.05V_VCCP

Layout Note:
370 mils from edge.

12

12

C664

C664

0.1U/10V

0.1U/10V

C686

C686

0.22U/10V

0.22U/10V

12

C688

C688

0.22U/10V

0.22U/10V

12

+

+

C577

C577
220U/2.5V

220U/2.5V

3

12

C625

C625
22U/4V

22U/4V

Layout Note:
Inside GMCH cavity.

+1.05V_VCCP

Non-iAMT

12

C685

C685

0.47U/10V

0.47U/10V

3

+3.3V_RUN

R431 10R431 10

1 2

12

C646

C646

0.22U/10V

0.22U/10V

12

12

Layout Note:
Place close to GMCH edge.

12

12

C684

C684
1U/10V

1U/10V

+VCC_GMCH_L

12

C645

C645

0.22U/10V

0.22U/10V

Layout Note:
Inside GMCH cavity.

12

C658

C658

0.1U/10V

0.1U/10V

12

C213

C213
22U/4V

22U/4V

C673

C673
1U/10V

1U/10V

D28

D28

CH751H-40HPT

CH751H-40HPT

12

C652

C652

0.1U/10V

0.1U/10V

12

C657

C657

0.1U/10V

0.1U/10V

C666

C666

0.22U/10V

0.22U/10V

C661

C661

0.1U/10V

0.1U/10V

12

C665

C665

0.22U/10V

0.22U/10V

+1.8V_SUS

12

Layout Note:
Place C233 where LVDS
and DDR2 taps.

C233

C233

0.1U/10V

0.1U/10V

2

U12F

U12F

21

AB33
AB36
AB37
AC33
AC35
AC36
AD35
AD36
AF33
AF36
AH33
AH35
AH36
AH37

AJ33

AJ35
AK33
AK35
AK36
AK37
AD33

AJ36

AM35

AL33

AL35
AA33
AA35
AA36
AP35
AP36
AR35
AR36

AL24

AL26

AL28

AM26
AM28
AM29
AM31
AM32
AM33

AP29
AP31
AP32
AP33

AL29

AL31

AL32
AR31
AR32
AR33

Y32
Y33
Y35
Y36
Y37

U29
U31
U32
U33
U35
U36
V32
V33
V36
V37

T30
T34
T35

CRESTLINE_1p0

CRESTLINE_1p0

VCC_NCTF_1
VCC_NCTF_2
VCC_NCTF_3
VCC_NCTF_4
VCC_NCTF_5
VCC_NCTF_6
VCC_NCTF_7
VCC_NCTF_8
VCC_NCTF_9
VCC_NCTF_10
VCC_NCTF_11
VCC_NCTF_12
VCC_NCTF_13
VCC_NCTF_14
VCC_NCTF_15
VCC_NCTF_16
VCC_NCTF_17
VCC_NCTF_18
VCC_NCTF_19
VCC_NCTF_20
VCC_NCTF_21
VCC_NCTF_22
VCC_NCTF_23
VCC_NCTF_24
VCC_NCTF_25
VCC_NCTF_26
VCC_NCTF_27
VCC_NCTF_28
VCC_NCTF_29
VCC_NCTF_30
VCC_NCTF_31
VCC_NCTF_32
VCC_NCTF_33
VCC_NCTF_34
VCC_NCTF_35
VCC_NCTF_36
VCC_NCTF_37
VCC_NCTF_38
VCC_NCTF_39
VCC_NCTF_40
VCC_NCTF_41
VCC_NCTF_42
VCC_NCTF_43
VCC_NCTF_44
VCC_NCTF_45
VCC_NCTF_46
VCC_NCTF_47
VCC_NCTF_48
VCC_NCTF_49
VCC_NCTF_50

VCC_AXM_NCTF_1
VCC_AXM_NCTF_2
VCC_AXM_NCTF_3
VCC_AXM_NCTF_4
VCC_AXM_NCTF_5
VCC_AXM_NCTF_6
VCC_AXM_NCTF_7
VCC_AXM_NCTF_8
VCC_AXM_NCTF_9
VCC_AXM_NCTF_10
VCC_AXM_NCTF_11
VCC_AXM_NCTF_12
VCC_AXM_NCTF_13
VCC_AXM_NCTF_14
VCC_AXM_NCTF_15
VCC_AXM_NCTF_16
VCC_AXM_NCTF_17
VCC_AXM_NCTF_18
VCC_AXM_NCTF_19

VCC NCTF

VCC NCTF

POWER

POWER

VCC AXM NCTF

VCC AXM NCTF

1

VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8

VSS_NCTF_9
VSS_NCTF_10
VSS_NCTF_11
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14
VSS_NCTF_15
VSS_NCTF_16

VSS NCTF

VSS NCTF

VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19
VSS_NCTF_20
VSS_NCTF_21

VSS_SCB1
VSS_SCB2
VSS_SCB3
VSS_SCB4
VSS_SCB5
VSS_SCB6

VSS SCBVCC AXM

VSS SCBVCC AXM

VCC_AXM_1
VCC_AXM_2
VCC_AXM_3
VCC_AXM_4
VCC_AXM_5
VCC_AXM_6
VCC_AXM_7

T27
T37
U24
U28
V31
V35
AA19
AB17
AB35
AD19
AD37
AF17
AF35
AK17
AM17
AM24
AP26
AP28
AR15
AR19
AR28

A3
B2
C1
BL1
BL51
A51

AT33
AT31
AK29
AK24
AK23
AJ26
AJ23

+1.05V_VCCP

VCC_SM

12

+

+

C232

C232
330U/6.3V

330U/6.3V

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

2

Date: Sheet

12

12

C700

C700

C701

C701

22U/4V

22U/4V

22U/4V

22U/4V

Layout Note:
Place on the edge.

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

COMPUTER

Crestline (VCC,NCTF)

Crestline (VCC,NCTF)

Crestline (VCC,NCTF)

JM7B 2C

JM7B 2C

JM7B 2C

1

of

of

of

857Friday, October 20, 2006

857Friday, October 20, 2006

857Friday, October 20, 2006

5

[e-mail]
GRATIS - FOR FREE

D D

Non-iAMT

+1.25V_RUN

+VCCA_MPLL_L

12

C C

+1.25V_RUN

B B

45mA MAx.

FB_120ohm+-25%_100mHz
_200mA_0.2ohm DC

L56

L56
BLM11A121S

BLM11A121S

L57

L57
BLM11A121S

BLM11A121S
R470

R470

0.5/F/0603

0.5/F/0603

1 2

C194

C194
22U/10V

22U/10V

FB_220ohm+-25%_100MHz
_2A_0.1ohm DC

+VCCA_HPLL

12

12

C188

C188
22U/10V

22U/10V

+VCCA_MPLL

12

L55

L55

1 2

BLM21PG221SN1D

BLM21PG221SN1D

12

C653

C653

0.1U/10V

0.1U/10V

12

C662

C662

0.1U/10V

0.1U/10V

+1.25V_RUN

Non-iAMT

+VCCA_PEG_PLL

12

R467

R467
1/F/0603

1/F/0603

12

C651

C651
10U/6.3V

10U/6.3V

+1.25V_RUN

1 2

12

C636

C636

0.1U/10V

0.1U/10V

PJP27PJP27

1 2

12

C204

C204

+

+

100U/6.3V

100U/6.3V

12

C689

C689
22U/4V

22U/4V

+1.5V_RUN

PJP26PJP26

C660

C660

4.7U/6.3V

4.7U/6.3V

1 2

12

C674

C674
1U/10V

1U/10V

12

C133

C133
10U/6.3V

10U/6.3V

4

+3.3V_RUN

12

C672

C672
22U/4V

22U/4V

12

C679

C679
1U/10V

1U/10V

12

C627

C627

0.1U/10V

0.1U/10V

+1.25V_RUN

Non-iAMT

12

C624

C624

0.1U/10V

0.1U/10V

12

12

12

C682

C682
22U/4V

22U/4V

C691

C691

0.1U/10V

0.1U/10V

C134

C134

0.022U/16V

0.022U/16V

12

C186

C186

0.1U/10V

0.1U/10V

+VCCA_HPLL
+VCCA_MPLL

+VCCA_PEG_PLL

+VCCA_SM

12

C659

C659
1U/10V

1U/10V

+VCCA_SM_CK

+VCCA_PEG_PLL

12

C640

C640

0.1U/10V

0.1U/10V

H49

AM2

U51

AW18

AV19
AU19
AU18
AU17

AT22
AT21
AT19
AT18
AT17
AR17
AR16

BC29
BB29

C25
C27

M32

N28
AN2
U48

H42

J32

A33
B33

A30
B32

B49

AL2

A41
B41

K50
K49

B25
B27

B28
A28

L29

J41

3

U12H

U12H

VCCSYNC
VCCA_CRT_DAC_1

VCCA_CRT_DAC_2

VCCA_DAC_BG
VSSA_DAC_BG

VCCA_DPLLA
VCCA_DPLLB
VCCA_HPLL
VCCA_MPLL

VCCA_LVDS
VSSA_LVDS

VCCA_PEG_BG
VSSA_PEG_BG

VCCA_PEG_PLL

VCCA_SM_1
VCCA_SM_2
VCCA_SM_3
VCCA_SM_4
VCCA_SM_5

VCCA_SM_7
VCCA_SM_8
VCCA_SM_9
VCCA_SM_10
VCCA_SM_11
VCCA_SM_NCTF_1
VCCA_SM_NCTF_2

VCCA_SM_CK_1
VCCA_SM_CK_2

VCCA_TVA_DAC_1
VCCA_TVA_DAC_2
VCCA_TVB_DAC_1
VCCA_TVB_DAC_2
VCCA_TVC_DAC_1
VCCA_TVC_DAC_2

VCCD_CRT
VCCD_TVDAC

VCCD_QDAC
VCCD_HPLL
VCCD_PEG_PLL
VCCD_LVDS_1

VCCD_LVDS_2

+VTTLF1
+VTTLF2
+VTTLF3

CRTPLLA PEGA SMTV

CRTPLLA PEGA SMTV

POWER

POWER

A CK A LVDS

A CK A LVDS

D TV/CRTLVDS

D TV/CRTLVDS

12

C650

C650

0.47U/10V

0.47U/10V

12

C604

C604

0.47U/10V

0.47U/10V

AXD

AXD

DMI

DMI

VTT_1
VTT_2
VTT_3
VTT_4
VTT_5
VTT_6
VTT_7
VTT_8

VTT_9
VTT_10
VTT_11
VTT_12
VTT_13
VTT_14

VTT

VTT

VTT_15
VTT_16
VTT_17
VTT_18
VTT_19
VTT_20
VTT_21
VTT_22

VCC_AXD_1
VCC_AXD_2
VCC_AXD_3
VCC_AXD_4
VCC_AXD_5
VCC_AXD_6

VCC_AXD_NCTF

VCC_AXF_1
VCC_AXF_2
VCC_AXF_3

AXF

AXF

VCC_DMI

VCC_SM_CK_1
VCC_SM_CK_2
VCC_SM_CK_3
VCC_SM_CK_4

SM CK

SM CK

VCC_TX_LVDS

VCC_HV_1
VCC_HV_2

HV

HV

VCC_PEG_1
VCC_PEG_2
VCC_PEG_3
VCC_PEG_4
VCC_PEG_5

PEG

PEG

VCC_RXR_DMI_1
VCC_RXR_DMI_2

VTTLF1
VTTLF2
VTTLF3

VTTLF

VTTLF

CRESTLINE_1p0

CRESTLINE_1p0

12

C603

C603

0.47U/10V

0.47U/10V

U13
U12
U11
U9
U8
U7
U5
U3
U2
U1
T13
T11
T10
T9
T7
T6
T5
T3
T2
R3
R2
R1

AT23
AU28
AU24
AT29
AT25
AT30

AR29

B23
B21
A21

AJ50

BK24
BK23
BJ24
BJ23

A43

C40
B40

AD51
W50
W51
V49
V50

AH50
AH51

A7
F2
AH1

2

+1.05V_VCCP

C634

C634

2.2U/6.3V

2.2U/6.3V

12

C631

C631

4.7U/10V

4.7U/10V

12

Place on the edge.

C633

C633

0.47U/6.3V

0.47U/6.3V

12

C638

C638

4.7U/10V

4.7U/10V

12

Place on the edge.

+VCC_AXD_L +VCC_AXD_R

12

C671

C671
1U/10V

1U/10V

+1.25V_RUN

+VCC_SM_CK

+3.3V_RUN

12

C613

C613

0.1U/10V

0.1U/10V

+VCC_RXR_DMI

+VTTLF1
+VTTLF2
+VTTLF3

1 2

12

C703

C703
22U/10V

22U/10V

Place caps close
to VCC_AXD.

+VCC_PEG

12

+

+

C181

C181
220U/4V

220U/4V

12

+

+

C205

C205
220U/4V

220U/4V

+VCC_SM_CK

12

C229

C229
22U/10V

22U/10V

+1.05V_VCCP

12

+

+

C178

C178
220U/4V

220U/4V

L61 0L61 0

Reserved L81 pad for
inductor.

+1.25V_RUN

12

C656

C656

0.1U/10V

0.1U/10V

L27

L27

12

91nH/1.5A

91nH/1.5A

91uH+-20%_1.5A

12

C643

C643
10U/6.3V

10U/6.3V

L28

L28
91nH/1.5A

91nH/1.5A

91uH+-20%_1.5A

12

C649

C649
10U/6.3V

10U/6.3V

12

C690

C690

0.1U/10V

0.1U/10V

+1.05V_VCCP

12

L60

L60
1uH/300mA

1uH/300mA

12

1uH+-20%_300mA

R487

R487
1/F/0603

1/F/0603

+VCC_SM_CK_L

12

C695

C695
10U/6.3V

10U/6.3V

Non­iAMT

+1.25V_RUN

PJP28PJP28

12

12

1

VCC_HV

D27

D27
CH751H-40HPT_NC

CH751H-40HPT_NC

+1.05V_VCCP

+1.05V_VCCP

+3.3V_RUN

+1.25V_RUN

12

C606

C606
1U/10V

1U/10V

Place caps close
to VCC_AXF

21

+VCC_HV_L

12

R428

R428
10_NC

10_NC

12

C605

C605
10U/6.3V

10U/6.3V

+1.8V_SUS

A A

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

COMPUTER

Crestline (POWER)

Crestline (POWER)

Crestline (POWER)

JM7B 2C

JM7B 2C

JM7B 2C

957Tuesday, October 24, 2006

957Tuesday, October 24, 2006

957Tuesday, October 24, 2006

1

of

5

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

4

3

2

Date: Sheet

5

U12I

U12I

A13

VSS_1

A15

VSS_2

A17

VSS_3

A24

VSS_4

AA21

VSS_5

AA24

VSS_6

AA29

VSS_7

D D

C C

B B

A A

5

AB20
AB23
AB26
AB28
AB31
AC10
AC13

AC3
AC39
AC43
AC47

AD1
AD21
AD26
AD29

AD3
AD41
AD45
AD49

AD5
AD50

AD8
AE10
AE14

AE6
AF20
AF23
AF24
AF31

AG2
AG38
AG43
AG47
AG50

AH3
AH40
AH41

AH7

AH9

AJ11
AJ13
AJ21
AJ24
AJ29
AJ32
AJ43
AJ45

AJ49
AK20
AK21
AK26
AK28
AK31
AK51

AM11
AM13

AM3

AM4
AM41
AM45

AN1
AN38
AN39
AN43

AN5

AN7

AP4
AP48
AP50
AR11

AR2
AR39
AR44
AR47

AR7
AT10
AT14
AT41
AT49

AU1
AU23
AU29

AU3
AU36
AU49
AU51
AV39
AV48

AW1
AW12
AW16

AL1

VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99

CRESTLINE_1p0

CRESTLINE_1p0

VSS

VSS

4

4

VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
VSS_181
VSS_182
VSS_183
VSS_184
VSS_185
VSS_186
VSS_187
VSS_188
VSS_189
VSS_190
VSS_191
VSS_192
VSS_193
VSS_194
VSS_195
VSS_196
VSS_197
VSS_198

AW24
AW29
AW32
AW5
AW7
AY10
AY24
AY37
AY42
AY43
AY45
AY47
AY50
B10
B20
B24
B29
B30
B35
B38
B43
B46
B5
B8
BA1
BA17
BA18
BA2
BA24
BB12
BB25
BB40
BB44
BB49
BB8
BC16
BC24
BC25
BC36
BC40
BC51
BD13
BD2
BD28
BD45
BD48
BD5
BE1
BE19
BE23
BE30
BE42
BE51
BE8
BF12
BF16
BF36
BG19
BG2
BG24
BG29
BG39
BG48
BG5
BG51
BH17
BH30
BH44
BH46
BH8
BJ11
BJ13
BJ38
BJ4
BJ42
BJ46
BK15
BK17
BK25
BK29
BK36
BK40
BK44
BK6
BK8
BL11
BL13
BL19
BL22
BL37
BL47
C12
C16
C19
C28
C29
C33
C36
C41

3

U12J

U12J

C46

VSS_199

C50

VSS_200

C7

VSS_201

D13

VSS_202

D24

VSS_203

D3

VSS_204

D32

VSS_205

D39

VSS_206

D45

VSS_207

D49

VSS_208

E10

VSS_209

E16

VSS_210

E24

VSS_211

E28

VSS_212

E32

VSS_213

E47

VSS_214

F19

VSS_215

F36

VSS_216

F4

VSS_217

F40

VSS_218

F50

VSS_219

G1

VSS_220

G13

VSS_221

G16

VSS_222

G19

VSS_223

G24

VSS_224

G28

VSS_225

G29

VSS_226

G33

VSS_227

G42

VSS_228

G45

VSS_229

G48

VSS_230

G8

VSS_231

H24

VSS_232

H28

VSS_233

H4

VSS_234

H45

VSS_235

J11

VSS_236

J16

VSS_237

J2

VSS_238

J24

VSS_239

J28

VSS_240

J33

VSS_241

J35

VSS_242

J39

VSS_243

K12

VSS_245

K47

VSS_246

K8

VSS_247

L1

VSS_248

L17

VSS_249

L20

VSS_250

L24

VSS_251

L28

VSS_252

L3

VSS_253

L33

VSS_254

L49

VSS_255

M28

VSS_256

M42

VSS_257

M46

VSS_258

M49

VSS_259

M5

VSS_260

M50

VSS_261

M9

VSS_262

N11

VSS_263

N14

VSS_264

N17

VSS_265

N29

VSS_266

N32

VSS_267

N36

VSS_268

N39

VSS_269

N44

VSS_270

N49

VSS_271

N7

VSS_272

P19

VSS_273

P2

VSS_274

P23

VSS_275

P3

VSS_276

P50

VSS_277

R49

VSS_278

T39

VSS_279

T43

VSS_280

T47

VSS_281

U41

VSS_282

U45

VSS_283

U50

VSS_284

V2

VSS_285

V3

VSS_286

CRESTLINE_1p0

CRESTLINE_1p0

3

VSS

VSS

VSS_287
VSS_288
VSS_289
VSS_290
VSS_291
VSS_292
VSS_293
VSS_294
VSS_295
VSS_296
VSS_297
VSS_298
VSS_299
VSS_300
VSS_301
VSS_302
VSS_303
VSS_304
VSS_305

VSS_306
VSS_307
VSS_308
VSS_309
VSS_310
VSS_311
VSS_312
VSS_313

2

W11
W39
W43
W47
W5
W7
Y13
Y2
Y41
Y45
Y49
Y5
Y50
Y11
P29
T29
T31
T33
R28

AA32
AB32
AD32
AF28
AF29
AT27
AV25
H50

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

2

Date: Sheet

COMPUTER

Crestline (VSS)

Crestline (VSS)

Crestline (VSS)

JM7B 2C

JM7B 2C

JM7B 2C

1

of

of

of

10 57Friday, October 20, 2006

10 57Friday, October 20, 2006

10 57Friday, October 20, 2006

1

1

[e-mail]
GRATIS - FOR FREE

2

3

4

5

6

7

8

+RTC_CELL +RTC_CELL

12

R575

R575
332K/F

332K/F

ICH_INTVRMEN ICH_LAN100_SLP

12

R574

R574
0_NC

0_NC

ICH8M LAN100 SLP Strap

Low = Internal VR Disabled
High = Internal VR Enabled(Default)

U22A

U22A

AG25

RTCX1

AF24

RTCX2

AF23

RTCRST#

AD22

INTRUDER#

AF25

INTVRMEN

AD21

LAN100_SLP

B24

GLAN_CLK

D22

LAN_RSTSYNC

C21

LAN_RXD0

B21

LAN_RXD1

C22

LAN_RXD2

D21

LAN_TXD0

E20

LAN_TXD1

C20

LAN_TXD2

AH21

GLAN_DOCK#/GPIO13

D25

GLAN_COMPI

C25

GLAN_COMPO

AJ16

HDA_BIT_CLK

AJ15

HDA_SYNC

AE14

HDA_RST#

AJ17

HDA_SDIN0

AH17

HDA_SDIN1

AH15

HDA_SDIN2

AD13

HDA_SDIN3

AE13

HDA_SDOUT

AE10

HDA_DOCK_EN#/GPIO33

AG14

HDA_DOCK_RST#/GPIO34

AF10

SATALED#

AF6

SATA0RXN

AF5

SATA0RXP

AH5

SATA0TXN

AH6

SATA0TXP

AG3

SATA1RXN

AG4

SATA1RXP

AJ4

SATA1TXN

AJ3

SATA1TXP

AF2

SATA2RXN

AF1

SATA2RXP

AE4

SATA2TXN

AE3

SATA2TXP

AB7

SATA_CLKN

AC6

SATA_CLKP

AG1

SATARBIAS#

AG2

SATARBIAS

ICH8M REV 1.0

ICH8M REV 1.0

Description

RSVD
Enter XOR Chain
Normal Operation (Default)
Set PCIE port config bit 1

RTC

RTC

CPUPWRGD/GPIO49

LAN / GLAN

LAN / GLAN

IHDA

IHDA

SATA

SATA

+3.3V_RUN

R613

R613
1K_NC

1K_NC

1 2

R594

R594
1K_NC

1K_NC

1 2

5

(Internal VR for VccLAN1.05 and VccCL1.05)

ICH_LAN100_SLP

LDRQ0#

A20GATE

A20M#

DPRSTP#

DPSLP#

FERR#

IGNNE#

INIT#

INTR

RCIN#

SMI#

STPCLK#

DD10
DD11
DD12
DD13
DD14
DD15

DCS1#
DCS3#

DIOR#

DIOW#

DDACK#

IDEIRQ

IORDY

DDREQ

E5
F5
G8
F6

C4
G9

E6
AF13

AG26
AF26

AE26
AD24
AG29
AF27
AE24

AC20
AH14

AD23

NMI

AG28
AA24
AE27
AA23

TP8

V1

DD0

U2

DD1

V3

DD2

T1

DD3

V4

DD4

T5

DD5

AB2

DD6

T6

DD7

T3

DD8

R2

DD9

T4
V6
V5
U1
V2
U6

AA4

DA0

AA1

DA1

AB3

DA2

Y6
Y5

W4
W3
Y2
Y3
Y1
W5

ICH_RSVD 13

FWH0/LAD0
FWH1/LAD1
FWH2/LAD2
FWH3/LAD3

FWH4/LFRAME#

LPC

LPC

LDRQ1#/GPIO23

CPU

CPU

THRMTRIP#

IDE

IDE

ACZ_SDOUT

12

R602

R602
332K/F

332K/F

12

R592

R592
0_NC

0_NC

Low = Internal VR Disabled
High = Internal VR Enabled(Default)

LPC_LAD0 31,32,40
LPC_LAD1 31,32,40
LPC_LAD2 31,32,40
LPC_LAD3 31,32,40

LPC_LFRAME# 31,32,40

LPC_LDRQ0# 32

IDE_DD[0..15]

LPC_LDRQ1# 32
SIO_A20GATE 31

H_A20M# 3
H_DPRSTP# 3,6,51

H_DPSLP# 3

H_INIT# 3
H_INTR 3

SIO_RCIN# 31

H_NMI 3
H_SMI# 3

H_STPCLK# 3

IDE_DA0 26
IDE_DA1 26
IDE_DA2 26

IDE_DCS1# 26
IDE_DCS3# 26

IDE_DIOR# 26
IDE_DIOW# 26
IDE_DDACK# 26
IDE_IRQ 26
IDE_DIORDY 26
IDE_DDREQ 26

SIO_A20GATE

H_DPRSTP#
H_DPSLP#

H_FERR#

SIO_RCIN#

THERMTRIP#_ICH

IDE_DD0
IDE_DD1
IDE_DD2
IDE_DD3
IDE_DD4
IDE_DD5
IDE_DD6
IDE_DD7
IDE_DD8

IDE_DD9
IDE_DD10
IDE_DD11
IDE_DD12
IDE_DD13
IDE_DD14
IDE_DD15

IDE_DA0
IDE_DA1
IDE_DA2

IDE_DCS1#
IDE_DCS3#

6

+1.05V_VCCP

R569

R569

R571

R571

56_NC

56_NC

56_NC

56_NC

1 2

1 2

H_DPRSTP#
H_DPSLP#
H_FERR#

+3.3V_RUN

H_FERR# 3
H_PWRGOOD 3
H_IGNNE# 3

T112PAD T112PAD

IDE_DD[0..15] 26

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet

COMPUTER

ICH8-M (CPU,IDE,SATA,LPC,AC97,LAN)

ICH8-M (CPU,IDE,SATA,LPC,AC97,LAN)

ICH8-M (CPU,IDE,SATA,LPC,AC97,LAN)

JM7B 2C

JM7B 2C

JM7B 2C

7

SIO_A20GATE
SIO_RCIN#

THERMTRIP#_ICH

R616

R616
10K

10K

1 2

+1.05V_VCCP

11 57Thursday, October 26, 2006

11 57Thursday, October 26, 2006

11 57Thursday, October 26, 2006

8

of

R57856R578
56

1 2

R609

R609
10K

10K

1 2

R56856R568
56

1 2

C800

C800
27P/50V_NC

27P/50V_NC

R566 10MR566 10M

W2

W2

1 4
2 3

32.768KHZ

32.768KHZ

R579

R579
20K

20K

1 2

ICH_RTCRST#
ICH_INTRUDER#

12

C792

C792
1U/10V

1U/10V

For debug

12

R565 0R565 0

1 2

ACZ_BIT_CLK

ACZ_SYNC

ACZ_RST#

ACZ_SDOUT

Place within 500mils
of ICH8 ball

R623 0R623 0
R668 0R668 0

SATA1_RX0-

12

SATA1_RX0+

12

ICH_RTCX2ICH_RTCX1

12

Reserved for
Intel Nineveh
design.

+3.3V_SUS

+1.5V_PCIE_ICH

ICH_AZ_CODEC_SDIN038
ICH_AZ_MDC_SDIN130

+3.3V_SUS

SATA_RX0-26
SATA_RX0+26

CLK_PCIE_SATA#17
CLK_PCIE_SATA17

3

C781

C781
12P/50V

12P/50V

ICH8M Internal VR Enable Strap
(Internal VR for VccSus1.05, VccSus1.5, VccCL1.5)

ICH_INTVRMEN

T40 PADT40 PAD

T46 PADT46 PAD
T45 PADT45 PAD
T111 PADT111 PAD
T115 PADT115 PAD
T113 PADT113 PAD
T121 PADT121 PAD

R654 10K_NCR654 10K_NC

12

R573 24.9/FR573 24.9/F

1 2

T47 PADT47 PAD
T135PADT135PAD

R655 10K_NCR655 10K_NC
R656 10K_NCR656 10K_NC

R635 24.9/FR635 24.9/F

12

XOR Chain Entrance Strap

ICH RSVD

HDA SDOUT

0
0
1
1

ICH_RTCX1
ICH_RTCX2

ICH_RTCRST#
ICH_INTRUDER#
ICH_INTVRMEN

ICH_LAN100_SLP
GLAN_CLK

LAN_RXD0
LAN_RXD1
LAN_RXD2
LAN_TXD0
LAN_TXD1
LAN_TXD2

GLAN_COMP
ACZ_BIT_CLK

ACZ_SYNC
ACZ_RST#

ACZ_SDOUT

12
12

SATA_ACT#_R

SATA_TX0-_C
SATA_TX0+_C

SATA1_RX0­SATA1_RX0+

T158 PADT158 PAD
T159 PADT159 PAD

SATABIAS

0
1
0
1

4

32.768KHZ

12

C772

C802

C802
27P/50V_NC

27P/50V_NC

+3.3V_RUN

12

C772
12P/50V

12P/50V

+RTC_CELL

12

R5851MR585
1M

R603 33R603 33

1 2

R604 33R604 33

1 2

1 2

R600 33R600 33

1 2

R599 33R599 33

1 2

R607 33R607 33

1 2

R606 33R606 33

1 2

R612 33R612 33

1 2

R608 33R608 33

1 2

SATA_TX0-_C
SATA_TX0+_C

R621

R621
10K

10K

SATA_ACT#_R

2

A A

B B

ICH_AZ_MDC_BITCLK30
ICH_AZ_CODEC_BITCLK38

1 2

ICH_AZ_MDC_SYNC30
ICH_AZ_CODEC_SYNC38
ICH_AZ_MDC_RST#30
ICH_AZ_CODEC_RST#38
ICH_AZ_MDC_SDOUT30
ICH_AZ_CODEC_SDOUT38

Place all series terms close to ICH8 except for SDIN input
lines,which should be close to source.Placement of R603, R600,

C C

R607 & R612 should equal distance to the T split trace point as
R604, R599, R606 & R608 respective. Basically,keep the same
distance from T for all series termination resistors.

SATA_TX0-26

SATA_TX0+26

Distance between the ICH-8 M and cap on the "P"
signal should be identical distance between the
ICH-8 M and cap on the "N" signal for same pair.

This circuit is
only needed if the
platform has the
SNIFFER.

LED_MASK#32,35

D D

SATA_ACT#36

C820 3900P/25VC820 3900P/25V
C819 3900P/25VC819 3900P/25V

1

2

3 1

Q73

Q73
2N7002W-7-F

2N7002W-7-F
R625 0_NCR625 0_NC

1 2

12
12

1

Place TX DC blocking caps close ICH8.

PCIE_TX1-29
PCIE_TX1+29

PCIE_TX2-29
PCIE_TX2+29

A A

B B

PCIE_TX4-28
PCIE_TX4+28

PCIE_TX6-/GLAN_TX-40
PCIE_TX6+/GLAN_TX+40

Layout Note:
Place R581, R582 within
500 mils from ICH.

R572 15_NCR572 15_NC

SPI_CS0#34

1 2

R302 0R302 0

1 2

C777 0.1U/10VC777 0.1U/10V
C778 0.1U/10VC778 0.1U/10V

C776 0.1U/10VC776 0.1U/10V
C775 0.1U/10VC775 0.1U/10V

C773 0.1U/10VC773 0.1U/10V
C774 0.1U/10VC774 0.1U/10V

C779 0.1U/10VC779 0.1U/10V
C780 0.1U/10VC780 0.1U/10V

U21

U21

4

7SH08_NC

7SH08_NC

WWAN Noise - ICH improvements

OC6#
OC4#
OC5#
OC7#
OC8#
USB_OC2_3#
USB_OC0_1#
OC9#

C C

D D

C871 0.1U/10VC871 0.1U/10V

1 2

C872 0.1U/10VC872 0.1U/10V

1 2

C873 0.1U/10VC873 0.1U/10V

1 2

C878 0.1U/10VC878 0.1U/10V

1 2

C874 0.1U/10VC874 0.1U/10V

1 2

C875 0.1U/10VC875 0.1U/10V

1 2

C877 0.1U/10VC877 0.1U/10V

1 2

C876 0.1U/10VC876 0.1U/10V

1 2

PCI_AD[0..31]27,42

PCI_PIRQA#42

T131 PADT131 PAD
T133 PADT133 PAD

PCI_PIRQD#27

1

PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

+3.3V_ALW

5

2
1

2

ICH_EC_SPI_CLK31

ICH_EC_SPI_DO31

ICH_EC_SPI_DIN31

R57015R570
15

1 2

SIO_SPI_CS# 31

U22B

U22B

D20

AD0

E19

AD1

D19

AD2

A20

AD3

D17

AD4

A21

AD5

A19

AD6

C19

AD7

A18

AD8

B16

AD9

A12

AD10

E16

AD11

A14

AD12

G16

AD13

A15

AD14

B6

AD15

C11

AD16

A9

AD17

D11

AD18

B12

AD19

C12

AD20

D10

AD21

C7

AD22

F13

AD23

E11

AD24

E13

AD25

E12

AD26

D8

AD27

A6

AD28

E8

AD29

D6

AD30

A3

AD31

Interrupt I/F

Interrupt I/F

F9

PIRQA#

B5

PIRQB#

C5

PIRQC#

A10

PIRQD#

ICH8M REV 1.0

ICH8M REV 1.0

2

PCIE_TXN1_C
PCIE_TXP1_C

PCIE_TXN2_C
PCIE_TXP2_C

PCIE_TXN4_C
PCIE_TXP4_C

GLAN_TXN_C
GLAN_TXP_C

ICH_SPI_CS#

Non-iAMT

OC6#
OC4#
OC5#
OC7#

+3.3V_SUS

PCI

PCI

REQ1#/GPIO50

GNT1#/GPIO51

REQ2#/GPIO52

GNT2#/GPIO53

REQ3#/GPIO54

GNT3#/GPIO55

PIRQE#/GPIO2
PIRQF#/GPIO3
PIRQG#/GPIO4
PIRQH#/GPIO5

PCIE_RX1-29
PCIE_RX1+29

MiniWWAN

PCIE_RX2-29
PCIE_RX2+29

MiniWLAN

PCIE_RX4-28
PCIE_RX4+28

Express Card

PCIE_RX6-/GLAN_RX-40
PCIE_RX6+/GLAN_RX+40

Giga Bit LOM

R581 15R581 15

1 2

R582 15R582 15

1 2

USB_OC0_1#33
USB_OC2_3#33

RP50

RP50

6
7
8
9

10

10P8R-10K

10P8R-10K

A4

REQ0#

D7

GNT0#

E18
C18
B19
F18
A11
C10

C17

C/BE0#

E15

C/BE1#

F16

C/BE2#

E17

C/BE3#

C8

IRDY#

D9

PAR

G6

PCIRST#

D16

DEVSEL#

A7

PERR#

B7

PLOCK#

F10

SERR#

C16

STOP#

C9

TRDY#

A17

FRAME#

AG24

PLTRST#

B10

PCICLK

G7

PME#

F8
G11
F12
B3

3

ICH_EC_SPI_CLK_R
ICH_SPI_CS#
ICH_SPI_CS1#_R

ICH_EC_SPI_DO_R

USB_OC0_1#
USB_OC2_3#
OC4#

OC5#
OC6#
OC7#
OC8#
OC9#

+3.3V_SUS

5
4
3
2
1

PCI_REQ0#
PCI_GNT0#
PCI_REQ1#
PCI_GNT1#
SB_WWAN_PCIE_RST#
PCI_GNT2#
SB_LOM_PCIE_RST#
PCI_GNT3#

PCI_IRDY#
PCI_RST#_G

PCI_DEVSEL#
PCI_PERR#
PCI_PLOCK#
PCI_SERR#
PCI_STOP#
PCI_TRDY#
PCI_FRAME#

PCI_PLTRST#
CLK_PCI_ICH

ICH_GPIO2_PIRQE#
SB_WLAN_PCIE_RST#
SB_NB_PCIE_RST#
ICH_GPIO5_PIRQH#

3

PCIE_TXN1_C
PCIE_TXP1_C

PCIE_TXN2_C
PCIE_TXP2_C

PCIE_TXN4_C
PCIE_TXP4_C

GLAN_TXN_C
GLAN_TXP_C

OC8#
USB_OC2_3#
USB_OC0_1#
OC9#

4

U22D

U22D

P27

PERN1

P26

PERP1

N29

PETN1

N28

PETP1

M27

PERN2

M26

PERP2

L29

PETN2

L28

PETP2

K27

PERN3

K26

PERP3

J29

PETN3

J28

PETP3

H27

PERN4

H26

PERP4

G29

PETN4

G28

PETP4

F27

PERN5

F26

PERP5

E29

PETN5

E28

PETP5

D27

PERN6/GLAN_RXN

D26

PERP6/GLAN_RXP

C29

PETN6/GLAN_TXN

C28

PETP6/GLAN_TXP

C23

SPI_CLK

B23

SPI_CS0#

E22

SPI_CS1#

D23

SPI_MOSI

F21

SPI_MISO

AJ19

OC0#

AG16

OC1#/GPIO40

AG15

OC2#/GPIO41

AE15

OC3#/GPIO42

AF15

OC4#/GPIO43

AG17

OC5#/GPIO29

AD12

OC6#/GPIO30

AJ18

OC7#/GPIO31

AD14

OC8#

AH18

OC9#

ICH8M REV 1.0

ICH8M REV 1.0

Short F2 and F3 at the package
and keep length to less than
500mils. Trace Impedance
should be 60ohms +/- 15%.

ICH_SPI_CS1#_R
PCI_GNT0#

PCI_REQ0# 43
PCI_GNT0# 42
PCI_REQ1# 27
PCI_GNT1# 27
SB_WWAN_PCIE_RST# 29

T155PAD T155PAD

SB_LOM_PCIE_RST# 40

T156PAD T156PAD

PCI_C_BE0# 27,42
PCI_C_BE1# 27,42
PCI_C_BE2# 27,42
PCI_C_BE3# 27,42

PCI_IRDY# 27,42
PCI_PAR 27,42

PCI_DEVSEL# 27,42
PCI_PERR# 27,42
PCI_PLOCK# 42
PCI_SERR# 27,42
PCI_STOP# 27,42
PCI_TRDY# 27,42
PCI_FRAME# 27,42

CLK_PCI_ICH 17
ICH_PME# 32

SB_WLAN_PCIE_RST# 29
SB_NB_PCIE_RST# 6

4

5

V27

DMI0RXN

V26

DMI0RXP

U29

DMI0TXN

U28

DMI0TXP

Y27

DMI1RXN

Y26

DMI1RXP

W29

DMI1TXN

W28

DMI1TXP

AB26

DMI2RXN

AB25

DMI2RXP

AA29

DMI2TXN

AA28

DMI2TXP

AD27

DMI3RXN

AD26

DMI3RXP

AC29

DMI3TXN

AC28

DMI3TXP

T26

DMI_CLKN

PCI-Express

PCI-Express

Direct Media Interface

Direct Media Interface

DMI_ZCOMP

DMI_IRCOMP

SPI

SPI

USB

USB

USBRBIAS#

DMI_CLKP

USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P

USBRBIAS

R6281KR628
1K

1 2

1 2

T25
Y23

Y24
G3

G2
H5
H4
H2
H1
J3
J2
K5
K4
K2
K1
L3
L2
M5
M4
M2
M1
N3
N2

F2
F3

R580

R580
1K_NC

1K_NC

DMI_COMP

USBRBIAS

PCI
SPI1001

A16 away override strap.

SB_NB_PCIE_RST#

DOCK
Cardbus or

Cardbus/1394
1394/MediaCard

REQ0

REQ1

REQ2

5

DMI_MTX_IRX_N0 6
DMI_MTX_IRX_P0 6

DMI_MRX_ITX_N0 6
DMI_MRX_ITX_P0 6

DMI_MTX_IRX_N1 6
DMI_MTX_IRX_P1 6

DMI_MRX_ITX_N1 6
DMI_MRX_ITX_P1 6

DMI_MTX_IRX_N2 6
DMI_MTX_IRX_P2 6

DMI_MRX_ITX_N2 6
DMI_MRX_ITX_P2 6

DMI_MTX_IRX_N3 6
DMI_MTX_IRX_P3 6

DMI_MRX_ITX_N3 6
DMI_MRX_ITX_P3 6

CLK_PCIE_ICH# 17
CLK_PCIE_ICH 17

R589 24.9/FR589 24.9/F

12

ICH_USBP0- 33
ICH_USBP0+ 33
ICH_USBP1- 33
ICH_USBP1+ 33

T140PAD T140PAD
T141PAD T141PAD

ICH_USBP3- 33
ICH_USBP3+ 33
ICH_USBP4- 28
ICH_USBP4+ 28
ICH_USBP5- 35
ICH_USBP5+ 35
ICH_USBP6- 28
ICH_USBP6+ 28
ICH_USBP7- 35
ICH_USBP7+ 35
ICH_USBP8- 43
ICH_USBP8+ 43
ICH_USBP9- 29
ICH_USBP9+ 29

R631

R631

22.6/F

22.6/F

1 2

Boot BIOS Strap

GNT0# SPI_CS1#

No stuff

11LPC

No stuff
Stuff

PCI_GNT3#

Low = A16 swap override enabled.
High = Default.

GNT0

PIRQA

PIRQD

GNT1

PIRQC

GNT2

PIRQD

6

+1.5V_PCIE_ICH

Ext Side Top
Ext Side Bottom
Reserved
Power USB
Smart Card
Biometric
Express Card
Blue Tooth
Dock
WWAN

No stuff
Stuff
No stuff

R614

R614
1K_NC

1K_NC

1 2

CLK_PCI_ICH

R306

R306
10_NC

10_NC

1 2

C337

C337

8.2P/16V_NC

8.2P/16V_NC

Reserved for
EMI.Place
resister and cap
close to ICH.

1 2

6

7

Place within 500mils of ICH8

PCI Pullups

6
7
8
9

+3.3V_RUN

PCI_DEVSEL#

+3.3V_RUN

+3.3V_RUN

PCI_PIRQD#

ICH_GPIO5_PIRQH#
PCI_REQ0#
PCI_PLOCK#
PCI_PERR#

SB_WWAN_PCIE_RST#
SB_WLAN_PCIE_RST#
SB_LOM_PCIE_RST#
SB_NB_PCIE_RST#

BIOS should not enable the
internal GPIO pull up resistor.

Non-iAMT

PCI_RST#_G

PCI_PLTRST#

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

+3.3V_SUS

C843

C843

1 2

0.047U/10V

0.047U/10V

+3.3V_SUS

C769

C769

1 2

0.047U/10V

0.047U/10V

ICH8-M (USB,DMI,PCIE,PCI)

ICH8-M (USB,DMI,PCIE,PCI)

ICH8-M (USB,DMI,PCIE,PCI)

JM7B 2C

JM7B 2C

JM7B 2C

10

6
7
8
9

10

6
7
8
9

10

Add Buffers as needed for
Loading and fanout concerns.

5

U48

U48

2
1

7SH32

7SH32

5

U45

U45

2
1

7SH32

7SH32

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

COMPUTER

7

RP45

RP45

10P8R-8.2K

10P8R-8.2K
RP47

RP47

10P8R-8.2K

10P8R-8.2K
RP48

RP48

10P8R-8.2K

10P8R-8.2K

R595 20KR595 20K
R596 20KR596 20K
R615 20KR615 20K
R667 20KR667 20K

4

4

8

+3.3V_RUN

5
4

PCI_STOP#

3

PCI_FRAME#

2

PCI_REQ1#

1

+3.3V_RUN

5

PCI_SERR#

4
3

ICH_GPIO2_PIRQE#

2

PCI_TRDY#

1

+3.3V_RUN

5

PCI_PIRQC#

4

PCI_PIRQB#

3

PCI_PIRQA#

2

PCI_IRDY#

1

12
12
12
12

PCI_RST# 27,28,42

PLTRST# 6,28,29,31,32,40

of

of

of

12 57Thursday, October 26, 2006

12 57Thursday, October 26, 2006

12 57Thursday, October 26, 2006

8

1

[e-mail]
GRATIS - FOR FREE

2

3

4

5

6

7

8

+3.3V_SUS

RP46

RP46

A A

B B

C C

D D

1
3

4P2R-2.2K

4P2R-2.2K

Non-iAMT ASF 2.0

+3.3V_SUS

RP52

RP52

3
1

4P2R-10K_NC

4P2R-10K_NC

ICH_SMBCLK
ICH_SMBDATA

+3.3V_RUN

R620

R620

8.2K

8.2K

1 2

CLKRUN#

12

R619

R619
10_NC

10_NC

Option to " Disable "
clkrun. Pulling it down
will keep the clks
running.

R670 10KR670 10K

+3.3V_RUN

R301 2.2K_NCR301 2.2K_NC

+3.3V_RUN

R611 10KR611 10K
R617 10K_NCR617 10K_NC
R232 10KR232 10K
R308 10KR308 10K

R305 10KR305 10K
R622 10KR622 10K
R309 100KR309 100K

1 2

R269 100KR269 100K

1 2

R626 100KR626 100K

1 2

R307 100KR307 100K

+3.3V_SUS

R510 10KR510 10K
R658 10KR658 10K
R657 10K_NCR657 10K_NC
R664 10KR664 10K

1

Non-iAMT

ICH_SMBDATA

2

ICH_SMBCLK

4

ICH_SMLINK0

4

ICH_SMLINK1

2

R236 0R236 0

1 2

R239 0R239 0

1 2

PLTRST_DELAY#

12

IMVP_PWRGD

12

RSV_THRM#

12

MCH_ICH_SYNC#_R

12

IRQ_SERIRQ

12

RSVD_GPIO6

12

RSVD_GPIO39

12

RSVD_GPIO48

12

PCIE_MCARD1_DET#
USB_MCARD1_DET#
PCIE_MCARD2_DET#
USB_MCARD2_DET#

12

SIO_EXT_SMI#

12

LOM_ICH_SMBALERT#

12

RSV_GPIO27

12

RSV_WOL_EN

12

4

ICH_SMLINK0
ICH_SMLINK1

+3.3V_SUS

R593 10K_NCR593 10K_NC
R598 10KR598 10K
R583 10KR583 10K
R597 1KR597 1K

ICH_SMBCLK28,29,40
ICH_SMBDATA28,29,40

4

ITP_DBRESET#3,32
PM_BMBUSY#6

R534

LOM_SMB_ALERT#31,40

2

MCH_ICH_SYNC#6

H_STP_PCI#17
H_STP_CPU#17

CLKRUN#27,31,32
ICH_PCIE_WAKE#32

IRQ_SERIRQ27,31,32,40

IMVP_PWRGD31,44,51

USB_IDE#26
SIO_EXT_WAKE#32

SIO_EXT_SMI#31

SIO_EXT_SCI#31
PCIE_MCARD1_DET#29
USB_MCARD1_DET#29
PCIE_MCARD2_DET#29
USB_MCARD2_DET#29

IDE_RST_MOD26
SATA_CLKREQ#17
PLTRST_DELAY#18

SPKR38

ICH_RSVD11

R534
0_NC

0_NC

R303 0R303 0

T114 PADT114 PAD
T126 PADT126 PAD
T119 PADT119 PAD

T136 PADT136 PAD

T130 PADT130 PAD

T42 PADT42 PAD

T49 PADT49 PAD

T107 PADT107 PAD

T48 PADT48 PAD
T124 PADT124 PAD

+3.3V_RUN

1 2

12
12
12
12

R627

R627
1K_NC

1K_NC

12

12

No Reboot strap.

SPKR

2

Low = Default.
High = No Reboot.

Non-iAMT

RSV_ICH_CL_RST1#
ICH_RI#
SIO_EXT_SCI#
ICH_PCIE_WAKE#

ICH_SMBCLK
ICH_SMBDATA
RSV_ICH_CL_RST1#
ICH_SMLINK0
ICH_SMLINK1

ICH_RI#
RSV_LPCPD#

LOM_ICH_SMBALERT#

CLKRUN#
ICH_PCIE_WAKE#

IRQ_SERIRQ
RSV_THRM#

IMVP_PWRGD

RSVD_GPIO6
SIO_EXT_WAKE#
SIO_EXT_SMI#
SIO_EXT_SCI#
PCIE_MCARD1_DET#
USB_MCARD1_DET#
PCIE_MCARD2_DET#
USB_MCARD2_DET#
RSV_GPIO27

RSVD_GPIO39
RSVD_GPIO48

SPKR
MCH_ICH_SYNC#_R

SPKR

3

U22C

U22C

AJ26

SMBCLK

AD19

SMBDATA

AG21

LINKALERT#

AC17

SMLINK0

AE19

SMLINK1

AF17

RI#

F4

SUS_STAT#/LPCPD#

AD15

SYS_RESET#

AG12

BMBUSY#/GPIO0

AG22

SMBALERT#/GPIO11

AE20

STP_PCI#/GPIO15

AG18

STP_CPU#/GPIO25

AH11

CLKRUN#/GPIO32

AE17

WAKE#

AF12

SERIRQ

AC13

THRM#

AJ20

VRMPWRGD

AJ22

TP7

AJ8

TACH1/GPIO1

AJ9

TACH2/GPIO6

AH9

TACH3/GPIO7

AE16

GPIO8

AC19

GPIO12

AG8

TACH0/GPIO17

AH12

GPIO18

AE11

GPIO20

AG10

SCLOCK/GPIO22

AH25

QRT_STATE0/GPIO27

AD16

QRT_STATE1/GPIO28

AG13

SATACLKREQ#/GPIO35

AF9

SLOAD/GPIO38

AJ11

SDATAOUT0/GPIO39

AD10

SDATAOUT1/GPIO48

AD9

SPKR

AJ13

MCH_SYNC#

AJ21

TP3

ICH8M REV 1.0

ICH8M REV 1.0

SMbus address D2

These are for
backdrive issue.

ICH_SMBDATA28,29,40 MEM_SDATA 15

4

SATA0GP/GPIO21
SATA1GP/GPIO19
SATA2GP/GPIO36
SATA3GP/GPIO37

SATA

GPIO

SATA

GPIO

SMB

SMB

Clocks

Clocks

S4_STATE#/GPIO26

DPRSLPVR/GPIO16

SYS

GPIO

SYS

GPIO

Power MGTController Link

Power MGTController Link

GPIO

GPIO

MISC

MISC

BATLOW#
PWRBTN#

LAN_RST#

RSMRST#

CK_PWRGD

CLPWROK

CL_DATA0
CL_DATA1

CL_VREF0
CL_VREF1

MEM_LED/GPIO24
ME_EC_ALERT/GPIO10
EC_ME_ALERT/GPIO14

WOL_EN/GPIO9

+3.3V_RUN

2

Q44

Q44

3 1

2N7002W-7-F

2N7002W-7-F

+3.3V_RUN

2

Q45

Q45

3 1

2N7002W-7-F

2N7002W-7-F

CLK14

CLK48
SUSCLK
SLP_S3#

SLP_S4#
SLP_S5#

PWROK

SLP_M#

CL_CLK0
CL_CLK1

CL_RST#

2

1

4

RP44

RP44
4P2R-2.2K

4P2R-2.2K

3

5

AJ12
AJ10
AF11
AG11

CLK_ICH_14M

AG9

CLK_ICH_48M

G5

ICH_SUSCLK

D3
AG23

AF21
AD18

RSV_GPIO26

AH27

ICH_PWRGD

AE23

DPRSLPVR

AJ14

ICH_BATLOW#

AE21
C2

RSV_ICH_LAN_RST#

AH20

ICH_RSMRST#

AG27
E1

ICH_CL_PWROK

E3
AJ25
F23

RSV_ICH_CL_CLK1

AE18
F22

RSV_ICH_CL_DATA1

AF19

CL_VREF0

D24

CL_VREF1

AH23
AJ23

RSV_GPIO24

AJ27

RSV_GPIO10

AJ24

RSV_GPIO14

AF22

RSV_WOL_EN

AG19

Non-iAMT

+3.3V_RUN

1 2

MEM_SCLK 15ICH_SMBCLK28,29,40

R618

R618

8.2K

8.2K

R590 8.2KR590 8.2K

R588 8.2KR588 8.2K

UMA Package:RC0402-C
Discrete Package: RC0402

CLK_ICH_14M 17
CLK_ICH_48M 17

T137PAD T137PAD

SIO_SLP_S3# 31

T109PAD T109PAD

SIO_SLP_S5# 31

T38PAD T38PAD

ICH_PWRGD 6,44
DPRSLPVR 6,51

12

+3.3V_SUS

SIO_PWRBTN# 31

T125PAD T125PAD

ICH_RSMRST# 31
CLK_PWRGD 17
ICH_CL_PWROK 6,31

T108PAD T108PAD

CL_CLK0 6

T123PAD T123PAD

CL_DATA0 6

T127PAD T127PAD

T110PAD T110PAD

ICH_CL_RST0# 6

T39PAD T39PAD

T41PAD T41PAD

T117PAD T117PAD

T120PAD T120PAD

12

+3.3V_SUS

6

Non-iAMT

Non-iAMT

Title

Title

Title

ICH8-M (PM,GPIO,SMB,CL)

ICH8-M (PM,GPIO,SMB,CL)

ICH8-M (PM,GPIO,SMB,CL)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

JM7B 2B

JM7B 2B

JM7B 2B

Date: Sheet of

Date: Sheet of

Date: Sheet

Place these close to ICH8.

CLK_ICH_48M

CLK_ICH_14M

ICH_PWRGD
DPRSLPVR
ICH_RSMRST#
RSV_ICH_LAN_RST#
ICH_CL_PWROK

RSV_GPIO26
RSV_GPIO24
RSV_GPIO10

CL_VREF0

12

C789

C789

0.1U/10V

0.1U/10V

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

COMPUTER

7

R586 10KR586 10K
R610 100KR610 100K
R567 10K_NCR567 10K_NC
R601 1MR601 1M
R629 1MR629 1M

R660 10K_NCR660 10K_NC
R661 10K_NCR661 10K_NC
R659 10KR659 10K

+3.3V_RUN

R576

R576

3.24K/F

3.24K/F

1 2

12

R577

R577
453/F

453/F

1 2

CL_VREF1

12

C798

C798

0.1U/10V_NC

0.1U/10V_NC

12

R632

R632
10_NC

10_NC

12

C818

C818

4.7P/50V_NC

4.7P/50V_NC

12

R624

R624
10_NC

10_NC

12

C816

C816

4.7P/50V_NC

4.7P/50V_NC

12

12
12
12

12
12
12

+3.3V_ALW

1 2

12

13 57Wednesday, November 01, 2006

13 57Wednesday, November 01, 2006

13 57Wednesday, November 01, 2006

8

+3.3V_SUS

R587

R587

3.24K/F_NC

3.24K/F_NC

R584

R584
453/F_NC

453/F_NC

of

1

+RTC_CELL

R304 10R304 10

+5V_RUN

+3.3V_RUN

A A

Non-iAMT

+5V_SUS

+3.3V_SUS

B B

C C

Non-iAMT

Place C788
close to A24.

+1.5V_RUN

D D

1 2

2 1

CH751H-40HPT

CH751H-40HPT

R316 10R316 10

1 2

2 1

CH751H-40HPT

CH751H-40HPT

+1.5V_RUN

12

L65

L65
BLM21PG331SN1D

BLM21PG331SN1D

12

+

+

C321

C321
220U/4V

220U/4V

+1.5V_RUN

12

R3170R317
0

+VCCSATPLL_L

12

L35

L35
10uH/100MA

10uH/100MA

10uH+-20%_100mA

+VCCSATPLL

12

C817

C817
1U/10V

1U/10V

+VCCGLANPLL

C788

C788

0.1U/10V

0.1U/10V

1 2

1

D18

D18

D19

D19

12

C766

C766
1U/10V

1U/10V

+ICH_V5REF_RUN

C336

C336

0.1U/10V

0.1U/10V

1 2

+ICH_V5REF_SUS

C349

C349

0.1U/10V

0.1U/10V

1 2

FB_330ohm+-25%_100mHz_

1.5A_0.09 ohm DC

C791

C791
22U/10V

22U/10V

C352

C352
10U/6.3V

10U/6.3V

12

C771

C771
22U/10V

22U/10V

+1.5V_RUN

12

12

Non-iAMT

+3.3V_RUN

+1.5V_PCIE_ICH

C787

C787

0.1U/10V

0.1U/10V

1 2

+1.5V_PCIE_ICH

1 2

+1.5V_RUN

+1.5V_RUN

+1.5V_RUN

C823

C823

0.1U/10V

0.1U/10V

1 2

T122PADT122PAD
T129PADT129PAD

C799

C799

0.1U/10V

0.1U/10V

2

C794

C794

2.2U/10V

2.2U/10V

1 2

12

C335

C335

4.7U/6.3V

4.7U/6.3V

2

C767

C767

0.1U/10V

0.1U/10V

1 2

+VCCSATPLL

12

C821

C821
1U/10V

1U/10V

12

C809

C809
1U/10V

1U/10V

C350

C350

0.1U/10V

0.1U/10V

1 2

TP_VCCSUSLAN1
TP_VCCSUSLAN2

+VCCGLANPLL

+3.3V_RUN

AD25

AA25
AA26
AA27
AB27
AB28
AB29

G24
H23
H24

K24
K25

M24
M25
N23
N24
N25
P24
P25
R24
R25
R26
R27

U24
U25
V23
V24
V25

W25

Y25

AE7
AF7
AG7
AH7

AC1
AC2
AC3
AC4
AC5

AC10

AC9
AA5

AA6
G12

G17

AC7
AD7

W23

G18

G20
A24
A26

A27
B26
B27
B28

B25

A16

D28
D29
E25
E26
E27
F24
F25

J23
J24

L23
L24
L25

T23
T24
T27
T28
T29

AJ6

AJ7

F17

F19

T7

G4

H7

D1

F1
L6

L7
M6
M7

U22F

U22F

VCCRTC
V5REF[1]

V5REF[2]
V5REF_SUS
VCC1_5_B[01]

VCC1_5_B[02]
VCC1_5_B[03]
VCC1_5_B[04]
VCC1_5_B[05]
VCC1_5_B[06]
VCC1_5_B[07]
VCC1_5_B[08]
VCC1_5_B[09]
VCC1_5_B[10]
VCC1_5_B[11]
VCC1_5_B[12]
VCC1_5_B[13]
VCC1_5_B[14]
VCC1_5_B[15]
VCC1_5_B[16]
VCC1_5_B[17]
VCC1_5_B[18]
VCC1_5_B[19]
VCC1_5_B[20]
VCC1_5_B[21]
VCC1_5_B[22]
VCC1_5_B[23]
VCC1_5_B[24]
VCC1_5_B[25]
VCC1_5_B[26]
VCC1_5_B[27]
VCC1_5_B[28]
VCC1_5_B[29]
VCC1_5_B[30]
VCC1_5_B[31]
VCC1_5_B[32]
VCC1_5_B[33]
VCC1_5_B[34]
VCC1_5_B[35]
VCC1_5_B[36]
VCC1_5_B[37]
VCC1_5_B[38]
VCC1_5_B[39]
VCC1_5_B[40]
VCC1_5_B[41]
VCC1_5_B[42]
VCC1_5_B[43]
VCC1_5_B[44]
VCC1_5_B[45]
VCC1_5_B[46]

VCCSATAPLL
VCC1_5_A[01]

VCC1_5_A[02]
VCC1_5_A[03]
VCC1_5_A[04]
VCC1_5_A[05]

VCC1_5_A[06]
VCC1_5_A[07]
VCC1_5_A[08]
VCC1_5_A[09]
VCC1_5_A[10]

VCC1_5_A[11]
VCC1_5_A[12]

VCC1_5_A[13]
VCC1_5_A[14]

VCC1_5_A[15]
VCC1_5_A[16]
VCC1_5_A[17]

VCC1_5_A[18]
VCC1_5_A[19]

VCCUSBPLL
VCC1_5_A[20]

VCC1_5_A[21]
VCC1_5_A[22]
VCC1_5_A[23]
VCC1_5_A[24]

VCC1_5_A[25]
VCCLAN1_05[1]

VCCLAN1_05[2]
VCCLAN3_3[1]

VCCLAN3_3[2]
VCCGLANPLL
VCCGLAN1_5[1]

VCCGLAN1_5[2]
VCCGLAN1_5[3]
VCCGLAN1_5[4]
VCCGLAN1_5[5]

VCCGLAN3_3

ICH8M REV 1.0

ICH8M REV 1.0

3

VCC1_05[01]
VCC1_05[02]
VCC1_05[03]
VCC1_05[04]
VCC1_05[05]
VCC1_05[06]
VCC1_05[07]
VCC1_05[08]
VCC1_05[09]
VCC1_05[10]
VCC1_05[11]
VCC1_05[12]
VCC1_05[13]
VCC1_05[14]
VCC1_05[15]
VCC1_05[16]

CORE

CORE

VCC1_05[17]
VCC1_05[18]
VCC1_05[19]
VCC1_05[20]
VCC1_05[21]
VCC1_05[22]
VCC1_05[23]
VCC1_05[24]
VCC1_05[25]
VCC1_05[26]
VCC1_05[27]
VCC1_05[28]

VCCA3GP ATXARX

VCCA3GP ATXARX

VCCDMIPLL

VCC_DMI[1]
VCC_DMI[2]

V_CPU_IO[1]
V_CPU_IO[2]

VCC3_3[01]
VCC3_3[02]
VCC3_3[03]

VCC3_3[04]
VCC3_3[05]
VCC3_3[06]

VCCP_COREVCCPSUSVCCPUSB

VCCP_COREVCCPSUSVCCPUSB

VCC3_3[07]
VCC3_3[08]
VCC3_3[09]
VCC3_3[10]
VCC3_3[11]

IDE

IDE

VCC3_3[12]
VCC3_3[13]

VCC3_3[14]
VCC3_3[15]
VCC3_3[16]
VCC3_3[17]
VCC3_3[18]
VCC3_3[19]
VCC3_3[20]

PCI

PCI

VCC3_3[21]
VCC3_3[22]
VCC3_3[23]
VCC3_3[24]

VCCHDA

VCCSUSHDA

VCCSUS1_05[1]
VCCSUS1_05[2]

VCCSUS1_5[1]

VCCSUS1_5[2]
VCCSUS3_3[01]
VCCSUS3_3[02]

VCCSUS3_3[03]
VCCSUS3_3[04]
VCCSUS3_3[05]

USB CORE

USB CORE

VCCSUS3_3[06]
VCCSUS3_3[07]

VCCSUS3_3[08]
VCCSUS3_3[09]
VCCSUS3_3[10]
VCCSUS3_3[11]
VCCSUS3_3[12]
VCCSUS3_3[13]
VCCSUS3_3[14]
VCCSUS3_3[15]
VCCSUS3_3[16]
VCCSUS3_3[17]
VCCSUS3_3[18]
VCCSUS3_3[19]

GLAN POWER

GLAN POWER

VCCCL1_05

VCCCL1_5

VCCCL3_3[1]
VCCCL3_3[2]

3

4

C801

C801

0.1U/10V

0.1U/10V

A13
B13
C13
C14
D14
E14
F14
G14
L11
L12
L14
L16
L17
L18
M11
M18
P11
P18
T11
T18
U11
U18
V11
V12
V14
V16
V17
V18

R29
AE28

AE29
AC23

AC24
AF29
AD2
AC8

AD8
AE8
AF8

AA3
U7
V7
W1
W6
W7
Y7

A8
B15
B18
B4
B9
C15
D13
D5
E10
E7
F11

AC12
AD11
J6

AF20
AC16
J7
C3
AC18

AC21
AC22
AG20
AH28

P6
P7
C1
N7
P1
P2
P3
P4
P5
R1
R3
R5
R6

G22
A22
F20

G21

1 2

+1.5V_DMIPLL

C784

C784

0.01U/25V

0.01U/25V

+VCC_DMI

+V_CPU_IO

C806

C806

0.1U/10V

0.1U/10V

1 2

Non-iAMT

TP_VCCSUS1.05_1
TP_VCCSUS1.05_2

TP_VCCSUS1.5_1
TP_VCCSUS1.5_2
+VCCSUS3_3[0~6]

WWAN Noise - ICH improvements

+VCCSUS3_3[7~19]

TP_VCCCL1.05
+VCCCL1_5

12

C866

C866

0.1U/10V

0.1U/10V

+3.3V_RUN

12

C748

C748

0.1U/10V

0.1U/10V

Non-iAMT

4

C811

C811

0.1U/10V

0.1U/10V

1 2

C782

C782

0.1U/10V

0.1U/10V

1 2

C783

C783

0.1U/10V

0.1U/10V

1 2

C812

C812

0.1U/10V

0.1U/10V

1 2

C790

C790

0.1U/10V

0.1U/10V

1 2

+1.05V_VCCP

C770

C770

10U/6.3V

10U/6.3V

1 2

T134PAD T134PAD
T43PAD T43PAD

T128PAD T128PAD
T132PAD T132PAD

12

C864

C864

0.1U/10V

0.1U/10V

T116PAD T116PAD

5

+1.05V_VCCP +1.5V_RUN

D33

D33

1

2

BAT54C

BAT54C

R591

R591

1 2

3

10/0805

10/0805

1uH+-20%_800mA

L66

12

C325

C325
22U/10V

22U/10V

C825

C825

0.1U/10V

0.1U/10V

1 2

L66
1uH_800MA

1uH_800MA

1 2

+1.25V_RUN

+3.3V_RUN

+1.5V_DMIPLL_R

12

+V_CPU_IO

12

C807

C807

0.1U/10V

0.1U/10V

R563 1R563 1

WWAN Noise - ICH improvements

12

C867

C867

0.1U/10V

0.1U/10V

C815

C815

0.1U/10V

0.1U/10V

1 2

+3.3V_RUN+3.3V_SUS

C808

C808

C810

C810

0.1U/10V

0.1U/10V

1 2

0.1U/10V

0.1U/10V

1 2

Non-iAMT

12

C865

C865

0.1U/10V

0.1U/10V

C797

C797

0.1U/10V_NC

0.1U/10V_NC

1 2

5

12

12

C348

C348

0.022U/16V

0.022U/16V

C796

C796
1U/10V_NC

1U/10V_NC

12

C785

C785

0.022U/16V

0.022U/16V

12

C813

C813

0.1U/10V

0.1U/10V

+1.5V_RUN

12

12

C868

C868

0.1U/10V

0.1U/10V

+3.3V_SUS

6

12

C793

C793

0.1U/10V

0.1U/10V

6

12

C869

C869

0.1U/10V

0.1U/10V

+1.05V_VCCP

12

+3.3V_RUN

12

7

U22E

U22E

A23

VSS[001]

A5

VSS[002]

AA2

VSS[003]

AA7

VSS[004]

A25

VSS[005]

AB1

VSS[006]

AB24

VSS[007]

AC11

VSS[008]

AC14

VSS[009]

AC25

VSS[010]

AC26

VSS[011]

AC27

VSS[012]

AD17

VSS[013]

AD20

VSS[014]

AD28

VSS[015]

AD29

VSS[016]

AD3

VSS[017]

AD4

VSS[018]

AD6

VSS[019]

AE1

VSS[020]

AE12

VSS[021]

AE2

VSS[022]

AE22

VSS[023]

AD1

VSS[024]

AE25

VSS[025]

AE5

VSS[026]

AE6

VSS[027]

AE9

VSS[028]

AF14

VSS[029]

AF16

VSS[030]

AF18

VSS[031]

AF3

VSS[032]

AF4

VSS[033]

AG5

VSS[034]

AG6

VSS[035]

AH10

VSS[036]

AH13

VSS[037]

AH16

VSS[038]

AH19

VSS[039]

AH2

VSS[040]

AF28

VSS[041]

AH22

VSS[042]

AH24

C795

C795

4.7U/10V

4.7U/10V

C870

C870

0.1U/10V

0.1U/10V

Title

Title

Title

ICH8-M (POWER,GND)

ICH8-M (POWER,GND)

ICH8-M (POWER,GND)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

JM7B 2C

JM7B 2C

JM7B 2C

Date: Sheet

Date: Sheet

Date: Sheet

VSS[043]

AH26

VSS[044]

AH3

VSS[045]

AH4

VSS[046]

AH8

VSS[047]

AJ5

VSS[048]

B11

VSS[049]

B14

VSS[050]

B17

VSS[051]

B2

VSS[052]

B20

VSS[053]

B22

VSS[054]

B8

VSS[055]

C24

VSS[056]

C26

VSS[057]

C27

VSS[058]

C6

VSS[059]

D12

VSS[060]

D15

VSS[061]

D18

VSS[062]

D2

VSS[063]

D4

VSS[064]

E21

VSS[065]

E24

VSS[066]

E4

VSS[067]

E9

VSS[068]

F15

VSS[069]

E23

VSS[070]

F28

VSS[071]

F29

VSS[072]

F7

VSS[073]

G1

VSS[074]

E2

VSS[075]

G10

VSS[076]

G13

VSS[077]

G19

VSS[078]

G23

VSS[079]

G25

VSS[080]

G26

VSS[081]

G27

VSS[082]

H25

VSS[083]

H28

VSS[084]

H29

VSS[085]

H3

VSS[086]

H6

VSS[087]

J1

VSS[088]

J25

VSS[089]

J26

VSS[090]

J27

VSS[091]

J4

VSS[092]

J5

VSS[093]

K23

VSS[094]

K28

VSS[095]

K29

VSS[096]

K3

VSS[097]

K6

VSS[098]

ICH8M REV 1.0

ICH8M REV 1.0

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

COMPUTER

7

VSS_NCTF[01]
VSS_NCTF[02]
VSS_NCTF[03]
VSS_NCTF[04]
VSS_NCTF[05]
VSS_NCTF[06]
VSS_NCTF[07]
VSS_NCTF[08]
VSS_NCTF[09]
VSS_NCTF[10]
VSS_NCTF[11]
VSS_NCTF[12]

VSS[099]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]

K7
L1
L13
L15
L26
L27
L4
L5
M12
M13
M14
M15
M16
M17
M23
M28
M29
M3
N1
N11
N12
N13
N14
N15
N16
N17
N18
N26
N27
N4
N5
N6
P12
P13
P14
P15
P16
P17
P23
P28
P29
R11
R12
R13
R14
R15
R16
R17
R18
R28
R4
T12
T13
T14
T15
T16
T17
T2
U12
U13
U14
U15
U16
U17
U23
U26
U27
U3
U5
V13
V15
V28
V29
W2
W26
W27
Y28
Y29
Y4
AB4
AB23
AB5
AB6
AD5
U4
W24

A1
A2
A28
A29
AH1
AH29
AJ1
AJ2
AJ28
AJ29
B1
B29

8

of

of

of

14 57Monday, October 23, 2006

14 57Monday, October 23, 2006

14 57Monday, October 23, 2006

8

1

[e-mail]
GRATIS - FOR FREE

DDR_A_D0
DDR_A_D5

DDR_A_D3
DDR_A_D2

DDR_A_D12
DDR_A_D9

DDR_A_D14
DDR_A_D15

DDR_A_D20
DDR_A_D16

DDR_A_D18
DDR_A_D22

DDR_A_D28
DDR_A_D29

DDR_A_DM3

DDR_A_D26
DDR_A_D31

DDR_A_BS2
DDR_A_MA12

DDR_A_MA9
DDR_A_MA8

DDR_A_MA5
DDR_A_MA3
DDR_A_MA1

DDR_A_MA10
DDR_A_BS0
DDR_A_WE#

DDR_A_CAS#

M_ODT1
DDR_A_D37

DDR_A_D33
DDR_A_DQS#4

DDR_A_DQS4
DDR_A_D39

DDR_A_D34
DDR_A_D41

DDR_A_D40
DDR_A_DM5
DDR_A_D42

DDR_A_D43
DDR_A_D53

DDR_A_D48

DDR_A_DQS#6
DDR_A_DQS6

DDR_A_D54
DDR_A_D51

DDR_A_D60
DDR_A_D57

DDR_A_DM7
DDR_A_D63

DDR_A_D59

MEM_SCLK

+1.8V_SUS

A is required to route to Top
SoDIMM for AMTto function.
Ch.A SODIMM needs to be
populated for Intel AMT support.

DDR_A_DQS#0

A A

B B

DDR_CKE0_DIMMA6,16

DDR_A_BS27,16

DDR_A_BS07,16
DDR_A_WE#7,16

DDR_A_CAS#7,16
DDR_CS1_DIMMA#6,16

M_ODT16,16

C C

D D

MEM_SDATA13
MEM_SCLK13
+3.3V_RUN

Non-iAMT

DDR_A_DQS0

DDR_A_DQS#1
DDR_A_DQS1

DDR_A_DQS#2
DDR_A_DQS2

SMbus address A0 SMbus address A4

1

2

V_DDR_MCH_REF

JDIM1

JDIM1

1

VREF

3

VSS47

5

DQ0

7

DQ1

9

VSS37

11

DQS#0

13

DQS0

15

VSS48

17

DQ2

19

DQ3

21

VSS38

23

DQ8

25

DQ9

27

VSS49

29

DQS#1

31

DQS1

33

VSS39

35

DQ10

37

DQ11

39

VSS50

41

VSS18

43

DQ16

45

DQ17

47

VSS1

49

DQS#2

51

DQS2

53

VSS19

55

DQ18

57

DQ19

59

VSS22

61

DQ24

63

DQ25

65

VSS23

67

DM3

69

NC4

71

VSS9

73

DQ26

75

DQ27

77

VSS4

79

CKE0

81

VDD7

83

NC1

85

A16_BA2

87

VDD9

89

A12

91

A9

93

A8

95

VDD5

97

A5

99

A3

101

A1

103

VDD10

105

A10/AP

107

BA0

109

WE#

111

VDD2

113

CAS#

115

S1#

117

VDD3

119

ODT1

121

VSS11

123

DQ32

125

DQ33

127

VSS26

129

DQS#4

131

DQS4

133

VSS2

135

DQ34

137

DQ35

139

VSS27

141

DQ40

143

DQ41

145

VSS29

147

DM5

149

VSS51

151

DQ42

153

DQ43

155

VSS40

157

DQ48

159

DQ49

161

VSS52

163

NCTEST

165

VSS30

167

DQS#6

169

DQS6

171

VSS31

173

DQ50

175

DQ51

177

VSS33

179

DQ56

181

DQ57

183

VSS3

185

DM7

187

VSS34

189

DQ58

191

DQ59

193

VSS14

195

SDA

197

SCL

199

VDD(SPD)

CLOCK 0,1

2

3

+1.8V_SUS

TOP BOT

2

VSS46

4

DQ4

6

DQ5

8

VSS15

10

DM0

12

VSS5

14

DQ6

16

DQ7

18

VSS16

20

DQ12

22

DQ13

24

VSS17

26

DM1

28

VSS53

30

CK0

32

CK0#

34

VSS41

36

DQ14

38

DQ15

40

VSS54

42

VSS20

44

DQ20

46

DQ21

48

VSS6

50

NC3

52

DM2

54

VSS21

56

DQ22

58

DQ23

60

VSS24

62

DQ28

64

DQ29

66

VSS25

68

DQS#3

70

DQS3

72

VSS10

74

DQ30

76

DQ31

78

VSS8

80

CKE1

82

VDD8

84

A15

86

A14

88

VDD11

90

A11

92

A7

94

A6

96

VDD4

98

SO-DIMM (200P)

SO-DIMM (200P)

PC4800 DDR2 SDRAM

PC4800 DDR2 SDRAM

A4

100

A2

102

A0

104

VDD12

106

BA1

108

RAS#

110

S0#

112

VDD1

114

ODT0

116

A13

118

VDD6

120

NC2

122

VSS12

124

DQ36

126

DQ37

128

VSS28

130

DM4

132

VSS42

134

DQ38

136

DQ39

138

VSS55

140

DQ44

142

DQ45

144

VSS43

146

DQS#5

148

DQS5

150

VSS56

152

DQ46

154

DQ47

156

VSS44

158

DQ52

160

DQ53

162

VSS57

164

CK1

166

CK1#

168

VSS45

170

DM6

172

VSS32

174

DQ54

176

DQ55

178

VSS35

180

DQ60

182

DQ61

184

VSS7

186

DQS#7

188

DQS7

190

VSS36

192

DQ62

194

DQ63

196

VSS13

198

SA0

200

SA1

TYC_1775804-2

TYC_1775804-2

DDR_A_D4
DDR_A_D1

DDR_A_DM0
DDR_A_D6

DDR_A_D7
DDR_A_D8

DDR_A_D13
DDR_A_DM1

DDR_A_D11
DDR_A_D10

DDR_A_D17
DDR_A_D21

PM_EXTTS#0 PM_EXTTS#1
DDR_A_DM2

DDR_A_D23
DDR_A_D19

DDR_A_D24
DDR_A_D25

DDR_A_DQS#3
DDR_A_DQS3

DDR_A_D30
DDR_A_D27

DDR_CKE1_DIMMA 6,16

DDR_A_MA14 6,16 DDR_B_MA14 6,16

DDR_A_MA11
DDR_A_MA7
DDR_A_MA6

DDR_A_MA4
DDR_A_MA2
DDR_A_MA0

DDR_A_BS1
DDR_A_RAS#

DDR_CS0_DIMMA# 6,16

M_ODT0

DDR_A_MA13

DDR_A_D36
DDR_A_D32

DDR_A_DM4
DDR_A_D38

DDR_A_D35
DDR_A_D45

DDR_A_D44
DDR_A_DQS#5

DDR_A_DQS5
DDR_A_D46

DDR_A_D47
DDR_A_D49

DDR_A_D52

DDR_A_DM6
DDR_A_D55

DDR_A_D50
DDR_A_D56

DDR_A_D61
DDR_A_DQS#7

DDR_A_DQS7
DDR_A_D62

DDR_A_D58

R290

R290

R287

R287

10K

10K

10K

10K

1 2

1 2

3

DDR_A_DM[0..7] 7
DDR_A_D[0..63] 7
DDR_A_DQS[0..7] 7
DDR_A_DQS#[0..7] 7
DDR_A_MA[0..13] 7,16

V_DDR_MCH_REF

12

C730

C730

0.1U/10V

0.1U/10V

M_CLK_DDR0 6
M_CLK_DDR#0 6

PM_EXTTS#0 6

DDR_A_BS1 7,16
DDR_A_RAS# 7,16

M_ODT0 6,16

+3.3V_RUN

12

C742

C742

2.2U/6.3V

2.2U/6.3V

M_CLK_DDR1 6
M_CLK_DDR#1 6

4

12

C731

C731

2.2U/6.3V

2.2U/6.3V

DDR_CKE3_DIMMB6,16

DDR_B_BS27,16

DDR_B_BS07,16
DDR_B_WE#7,16

DDR_B_CAS#7,16

DDR_CS3_DIMMB#6,16

Non-iAMT

12

C741

C741

0.1U/10V

0.1U/10V

Non-iAMT

+3.3V_RUN

4

5

+1.8V_SUS +1.8V_SUS

V_DDR_MCH_REF

JDIM2

JDIM2

1

VREF

3

DDR_B_D4
DDR_B_D5

DDR_B_DQS#0
DDR_B_DQS0

DDR_B_D3
DDR_B_D2

DDR_B_D12
DDR_B_D9

DDR_B_DQS#1
DDR_B_DQS1

DDR_B_D15
DDR_B_D11

DDR_B_D17
DDR_B_D20

DDR_B_DQS#2
DDR_B_DQS2

DDR_B_D18
DDR_B_D23

DDR_B_D28
DDR_B_D29

DDR_B_DM3

DDR_B_D31
DDR_B_D26

DDR_B_BS2

DDR_B_MA12

DDR_B_MA9
DDR_B_MA8

DDR_B_MA5
DDR_B_MA3
DDR_B_MA1

DDR_B_MA10

DDR_B_BS0

DDR_B_WE#
DDR_B_CAS#

M_ODT36,16

M_ODT3
DDR_B_D37

DDR_B_D33
DDR_B_DQS#4

DDR_B_DQS4
DDR_B_D35

DDR_B_D34
DDR_B_D40

DDR_B_D41
DDR_B_DM5
DDR_B_D43 DDR_B_D46

DDR_B_D42
DDR_B_D52

DDR_B_D49

DDR_B_DQS#6
DDR_B_DQS6

DDR_B_D54

DDR_B_D56
DDR_B_D60

DDR_B_DM7
DDR_B_D58

DDR_B_D59
MEM_SDATAMEM_SDATA

MEM_SCLK

VSS47

5

DQ0

7

DQ1

9

VSS37

11

DQS#0

13

DQS0

15

VSS48

17

DQ2

19

DQ3

21

VSS38

23

DQ8

25

DQ9

27

VSS49

29

DQS#1

31

DQS1

33

VSS39

35

DQ10

37

DQ11

39

VSS50

41

VSS18

43

DQ16

45

DQ17

47

VSS1

49

DQS#2

51

DQS2

53

VSS19

55

DQ18

57

DQ19

59

VSS22

61

DQ24

63

DQ25

65

VSS23

67

DM3

69

NC4

71

VSS9

73

DQ26

75

DQ27

77

VSS4

79

CKE0

81

VDD7

83

NC1

85

A16_BA2

87

VDD9

89

A12

91

A9

93

A8

95

VDD5

97

A5

99

A3

101

A1

103

VDD10

105

A10/AP

107

BA0

109

WE#

111

VDD2

113

CAS#

115

S1#

117

VDD3

119

ODT1

121

VSS11

123

DQ32

125

DQ33

127

VSS26

129

DQS#4

131

DQS4

133

VSS2

135

DQ34

137

DQ35

139

VSS27

141

DQ40

143

DQ41

145

VSS29

147

DM5

149

VSS51

151

DQ42

153

DQ43

155

VSS40

157

DQ48

159

DQ49

161

VSS52

163

NCTEST

165

VSS30

167

DQS#6

169

DQS6

171

VSS31

173

DQ50

175

DQ51

177

VSS33

179

DQ56

181

DQ57

183

VSS3

185

DM7

187

VSS34

189

DQ58

191

DQ59

193

VSS14

195

SDA

197

SCL

199

VDD(SPD)

FOX_AS0A426-M2SN-7F

FOX_AS0A426-M2SN-7F

CLOCK 2,3

CKE 2,3CKE 0,1

5

6

2

VSS46

4

DQ4

6

DQ5

8

VSS15

10

DM0

12

VSS5

14

DQ6

16

DQ7

18

VSS16

20

DQ12

22

DQ13

24

VSS17

26

DM1

28

VSS53

30

CK0

32

CK0#

34

VSS41

36

DQ14

38

DQ15

40

VSS54

42

VSS20

44

DQ20

46

DQ21

48

VSS6

50

NC3

52

DM2

54

VSS21

56

DQ22

58

DQ23

60

VSS24

62

DQ28

64

DQ29

66

VSS25

68

DQS#3

70

DQS3

72

VSS10

74

DQ30

76

DQ31

78

VSS8

80

CKE1

82

VDD8

84

A15

86

A14

88

VDD11

90

A11

92

A7

94

A6

96

VDD4

98

SO-DIMM (200P)

SO-DIMM (200P)

PC4800 DDR2 SDRAM

PC4800 DDR2 SDRAM

A4

100

A2

102

A0

104

VDD12

106

BA1

108

RAS#

110

S0#

112

VDD1

114

ODT0

116

A13

118

VDD6

120

NC2

122

VSS12

124

DQ36

126

DQ37

128

VSS28

130

DM4

132

VSS42

134

DQ38

136

DQ39

138

VSS55

140

DQ44

142

DQ45

144

VSS43

146

DQS#5

148

DQS5

150

VSS56

152

DQ46

154

DQ47

156

VSS44

158

DQ52

160

DQ53

162

VSS57

164

CK1

166

CK1#

168

VSS45

170

DM6

172

VSS32

174

DQ54

176

DQ55

178

VSS35

180

DQ60

182

DQ61

184

VSS7

186

DQS#7

188

DQS7

190

VSS36

192

DQ62

194

DQ63

196

VSS13

198

SA0

200

SA1

DDR_B_D0
DDR_B_D1

DDR_B_DM0
DDR_B_D6

DDR_B_D7
DDR_B_D13

DDR_B_D8
DDR_B_DM1

DDR_B_D14
DDR_B_D10

DDR_B_D16
DDR_B_D21

DDR_B_DM2
DDR_B_D19

DDR_B_D22
DDR_B_D25

DDR_B_D24
DDR_B_DQS#3

DDR_B_DQS3
DDR_B_D30

DDR_B_D27

DDR_CKE4_DIMMB 6,16

DDR_B_MA11
DDR_B_MA7
DDR_B_MA6

DDR_B_MA4
DDR_B_MA2
DDR_B_MA0

DDR_B_BS1
DDR_B_RAS#

DDR_CS2_DIMMB# 6,16

M_ODT2

DDR_B_MA13

DDR_B_D36
DDR_B_D32

DDR_B_DM4
DDR_B_D38

DDR_B_D39
DDR_B_D44

DDR_B_D45
DDR_B_DQS#5

DDR_B_DQS5

DDR_B_D47
DDR_B_D48

DDR_B_D55

DDR_B_DM6
DDR_B_D50

DDR_B_D53DDR_B_D51
DDR_B_D57

DDR_B_D61
DDR_B_DQS#7

DDR_B_DQS7
DDR_B_D62

DDR_B_D63

R520 10KR520 10K

R513

R513
10K

10K

1 2

6

12

7

DDR_B_DM[0..7] 7
DDR_B_D[0..63] 7
DDR_B_DQS[0..7] 7
DDR_B_DQS#[0..7] 7
DDR_B_MA[0..13] 7,16

V_DDR_MCH_REF

M_CLK_DDR3 6
M_CLK_DDR#3 6

PM_EXTTS#1 6

+1.8V_SUS

12

C263

C263

2.2U/6.3V

2.2U/6.3V

+1.8V_SUS

12

12

C740

C740

0.1U/10V

0.1U/10V

C738

C738

2.2U/6.3V

2.2U/6.3V

Place these Caps near So-Dimm1.

12

12

C262

C262

C310

C310

2.2U/6.3V

2.2U/6.3V

2.2U/6.3V

2.2U/6.3V

Place these Caps near So-Dimm2.

12

12

C726

C726

2.2U/6.3V

2.2U/6.3V

12

C313

C313

0.1U/10V

0.1U/10V

12

C744

C744

0.1U/10V

0.1U/10V

Non-iAMT

12

C257

C257

0.1U/10V

0.1U/10V

12

C746

C746

2.2U/6.3V

2.2U/6.3V

12

C264

C264

0.1U/10V

0.1U/10V

12

C728

C728

0.1U/10V

0.1U/10V

DDR_B_BS1 7,16
DDR_B_RAS# 7,16

M_ODT2 6,16

M_CLK_DDR4 6
M_CLK_DDR#4 6

C743

C743

2.2U/6.3V

2.2U/6.3V

+1.8V_SUS

Place these Caps near So-Dimm1.

12

C312

C312

0.1U/10V

0.1U/10V

+1.8V_SUS

Place these Caps near So-Dimm2.

12

C318

C318

0.1U/10V

0.1U/10V

+3.3V_RUN

12

C251

C251

2.2U/6.3V

2.2U/6.3V

Non-iAMT

+3.3V_RUN

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

COMPUTER

DDR2 SO-DIMM (200P) X 2

DDR2 SO-DIMM (200P) X 2

DDR2 SO-DIMM (200P) X 2

JM7B 2C

JM7B 2C

JM7B 2C

7

12

C317

C317

2.2U/6.3V

2.2U/6.3V

12

C723

C723

2.2U/6.3V

2.2U/6.3V

12

C266

C266

0.1U/10V

0.1U/10V

12

C727

C727

0.1U/10V

0.1U/10V

8

12

C314

C314

2.2U/6.3V

2.2U/6.3V

12

C725

C725

2.2U/6.3V

2.2U/6.3V

12

+

+

C863

C863
330U/6.3V_NC

330U/6.3V_NC

15 57Thursday, October 26, 2006

15 57Thursday, October 26, 2006

15 57Thursday, October 26, 2006

of

8