DELL D520 Schematics

Page 1
1
2
3
4
5
6
7
8
DRAM Power
DC/DC
A A
+3V_SRC +5VSUS
PG 46
IMVP-6 CPU VR
PG 45
RUN POWER SW
PG 47
POWER DC/DC
B B
DDR2-SODIMM1
AC/BATT CONNECTOR
BATT SELECTOR
BATT CHARGER
400/533/667 MHZ DDR II
1.8V, 0.9V
PG 43
1.5VSUS, 1.05V
PG 44
PG 48
PG 41
PG 42
PG 15,16
400/533/667 MHZ DDR II
DDR2-SODIMM2
PG 15,16
SATA - HDD
SATA
PG 21
Internal Media Bay
C C
CD-ROM
PG 21
ATA 66/100 USB2.0(P2)
AC97/Azalia
AUDIO
STAC9200
PG 34,35
MDC
PG 26
SPI
S/PDIF to DOCK
D D
PG 39
Audio Jacks
PG 35
RJ11 to DOCK
PG 39
Tip Ring
PG 26
Flash
PG 30
1
2
SHELBY-INTEGRATED
DMI X4 Interface
SPI
SIO MEC5004 128KB Flash TMKBC
128 Pins VTQFP PG 27
Keyboard
PG 27
Touchpad
PG 31
3
Yonah
(478 Micro-FCPGA)
PG 3,4
533/667 MHz FSB
Calistoga
1466 uFCBGA
PG 5,6,7,8,9,10
ICH7-M
652 BGA
PG 11,12,13,14
LPC
USB2.0 (P1)
SIO ECE5018 Expander
BC
USB 2.0 Hub(4)
128 Pins VTQFP PG 28
PS/2
IrDA
PG 38
sDVO
USB2.0 (P5,P6) USB2.0 (P3,P4)
USB2.0 (P7)
PCIE
ECE_USB2.0(P1)
ECE_USB2.0(P2)
Serial
PG 29
4
CLOCKS
ICS954301
PG 17
SI1362
PG 18
1394 CONN
PG 25
USB2.0 (P0)
MINI-PCIE
Wireless LAN
PG 23
Bluetooth
PG 31
5
2 Rear Ports 2 right Side
SYSTEM RESET CKT
PG 40
LVDS
DVI
TVOUT
VGA
33MHz PCI
CARDBUS
OZ711 PG 24
PG 33 PG 33
PCMCIA CON.
PG 24
DOCK LPC
6
SWTICH & LED & IO CONN
PG 33
FAN & THERMAL
PG 32
Panel Connector
PG 19
S-Video
PG 20
CRT
PG 20
DOCKING CONNECTOR
LAN (100/10) BCM4401
PG 36
E-Switch
PI3L110Q
PG 37
I/O Board CONN
PG 33
PG 39
QUANTA
Title
Size Document Number Rev
Date: Sheet
Schematic Block Diagram1
DM5 1A
星期二
27, 2005
十二月
7
of
159,
8
Page 2
1
Pg# Description
1
Schematic Block Diagram 1
2
Front Page
3-4
A A
B B
C C
Yonah
5-10
Calistoga
11-14
ICH7
15-16
DDRII SO-DIMM(200P)
17
Clock Generator
18
SI1362
19
LCD Conn. & SSP
20
CRT & TV Conn.
21
SATA & IDE Conn.
22
PAD & Screw Hole
23
MiniCard
24
PCCARD&CONN
25
1394
26
MDC Conn.
27-28
SIO (MEC5004 & ECE5018)
29
Serial Port
30
Flash ROM
31
Touch Pad CONN.& Bluetooth CONN FAN & Thermal
32 33
Switch Board Conn. & LED & IO Board
34-35
Azelia CODEC (STAC9751) & Phone Jack LAN BCM4401 10/100
36
LAN SWITCH / LAN POWER
37 38
FIR
2
INDEX
3
DNI LIST
4
5
6
Power & Ground
Label Description
DC_IN+ PBATT+ PWR_SRC
VHCORE
1.05V AGTL+ POWER (1.05V) I/O
+3VRUN +3VSUS +5VALW +5VRUN +5VSUS +5VHDD +5VMOD STRB#/5V +5VRUN VDDA 1_8VSUS 1_8VRUN +3VALW 8051 POWER (3V) V1_5RUN
GND ALL PAGES DIGIT AL GROUND
Pg#
AC ADAPTER (20V) MAIN BATTERY + (10~17V) MAIN POWER (10~20V)
CPU CORE POWER (1.25/1.15V)
SLP_S3# CTRLD POWER SLP_S5# CTRLD POWER 8051 POWER (5V) SLP_S3# CTRLD POWER SLP_S5# CTRLD POWER HDD POWER (5V) MODULE POWER (5V) EXTERNAL FDD POWER (5V) FAN POWER (5V) AUDIO ANALOG POWER (5V) RESUME WELL IN ICH SLP_S3# CTRLD POWER
ALVISO POWE R Non -CPU I/O
COMBO CONN GND
7
8
Control Signal
RUNPWROK RUNPWROK
RUN_ON SUS_ON
RUN_ON SUS_ON HDDC_EN# MODC_EN# FDD/LPT# FAN_OFF/ON# RUN_ON
39 Docking Conn. 40
SYSTEM RESET/POWER GOOD
41-42
Battery Selector & Charger
43
1.8VSUS/0.9V
44
1.5V/1.05V
45
CPU Power
D D
46
D/D Power
47
RUN Power Switch
48
DCIN , Batt
49
Power Block Diagram
50
SMBUS Block Diagram
1
QUANTA
Title
Size Document Number Rev
2
3
4
5
6
Date: Sheet
Index, DNI, Power & Ground
DM5 3A
星期二
27, 2005
十二月
7
of
259,
8
Page 3
1
2
3
4
5
6
7
8
M23
R24
N24 M24 N25 M26
AD26
C26 D25
C21
E22 F24 E26 H22 F23 G25 E25 E23 K24 G24
H26 F26 K22 H25 H23 G22
N22 K25 P26 R23 L25 L22 L23
P25 P22 P23 T24
L26 T25
B22 B23
J24 J23
J26
U6B
D[0]# D[1]# D[2]# D[3]# D[4]# D[5]# D[6]# D[7]# D[8]# D[9]# D[10 D[11]# D[12]# D[13]# D[14]# D[15]# DSTBN[0]# DSTBP[0]# DINV[0]#
D[16]# D[17]# D[18]# D[19]# D[20]# D[21]# D[22]# D[23]# D[24]# D[25]# D[26]# D[27]# D[28]# D[29]# D[30]# D[31]# DSTBN[1]# DSTBP[1]# DINV[1]#
GTLREF
TEST1 TEST2
BSEL[0] BSEL[1] BSEL[2]
Yonah
DATA GRP 0 DATA GRP 1
MISC
PWRGOOD
D[32]# D[33]# D[34]# D[35]# D[36]# D[37]# D[38]# D[39]# D[40]# D[41]#
DATA GRP 2
D[42]# D[43]# D[44]# D[45]# D[46]#
D[47]# DSTBN[2]# DSTBP[2]#
DINV[2]#
D[48]#
D[49]#
D[50]#
D[51]#
D[52]#
D[53]#
D[54]#
D[55]#
D[56]#
D[57]#
DATA GRP 3
D[58]#
D[59]#
D[60]#
D[61]#
D[62]#
D[63]# DSTBN[3]# DSTBP[3]#
DINV[3]# COMP[0]
COMP[1] COMP[2] COMP[3]
DPRSTP#
DPSLP#
DPWR#
SLP#
PSI#
AA23 AB24 V24 V26 W25 U23 U25 U22 AB25 W22 Y23 AA26 Y26 Y22 AC26 AA24 W24 Y25 V23
AC22 AC23 AB22 AA21 AB21 AC25 AD20 AE22 AF23 AD24 AE21 AD21 AE25 AF25 AF22 AF26 AD23 AE24 AC20
R26 U26 U1 V1
E5 B5 D24 D6 D7 AE6
H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47
H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63
COMP0V_CPU_BTLREF COMP1 COMP2 COMP3
H_D#[0..63]
H_D#[0..63]
H_DPRSTP# 11,45 H_DPSLP# 11 H_DPWR# 5
H_PWRGOOD 11
H_CPUSLP# 5,11 H_PSI# 45
H_D#[0..63] 5
H_DSTBN#2 5 H_DSTBP#2 5 H_DINV#2 5
H_D#[0..63] 5
H_DSTBN#3 5 H_DSTBP#3 5 H_DINV#3 5
R156
R154
54.9/F
Comp0,2 connect with Zo=27.4ohm. Comp1,3 connect with Zo=55ohm, make these t race length shorter than 0.5".
27.4/F
1 2
54.9/F
1 2
R155
27.4/F
1 2
R158
1 2
AA1 AA4 AB2 AA3
B25
M3
K5 M1 N2
N3
P5
P2
L1
P4
P1 R1
L2
K3 H2
K2
L5
Y2 U5 R3 W6 U4
Y5 U2 R4
T5
T3 W3 W5
Y4 W2
Y1
V4
A6
A5 C4
D5 C6
B4
A3
M4 N5
T2
V3
B2 C3
J4 L4
J1
J3
U6A
A[3]# A[4]# A[5]# A[6]# A[7]# A[8]# A[9]# A[10]# A[11]# A[12]# A[13]# A[14]# A[15]# A[16]# ADSTB[0]#
REQ[0]# REQ[1]# REQ[2]# REQ[3]# REQ[4]#
A[17]# A[18]# A[19]# A[20]# A[21]# A[22]# A[23]# A[24]# A[25]# A[26]# A[27]# A[28]# A[29]# A[30]# A[31]# ADSTB[1]#
A20M# FERR# IGNNE#
STPCLK# LINT0 LINT1 SMI#
RSVD[01]# RSVD[02]# RSVD[03]# RSVD[04]# RSVD[05]# RSVD[06]# RSVD[07]# RSVD[08]# RSVD[09]# RSVD[10]#
RSVD[11]#
Yonah
ADDR GROUP 0
DEFER#
CONTROL
RESET#
XDP/ITP SIGNALS
PROCHOT THERMDA THERMDC
THERMTRIP#
THERMH CLK
RSVD[12]#
RSVD[13]# RSVD[14]# RSVD[15]# RSVD[16]#
RESERVED
RSVD[17]# RSVD[18]# RSVD[19]# RSVD[20]#
ADS# BNR#
BPRI#
DRDY# DBSY#
BR0#
IERR#
INIT#
LOCK#
RS[0]# RS[1]# RS[2]#
TRDY#
HIT#
HITM#
BPM[0]# BPM[1]# BPM[2]# BPM[3]#
PRDY# PREQ#
TCK TDO
TMS
TRST#
DBR#
BCLK[0] BCLK[1]
TDI
H1 E2 G5
H5 F21 E1
F1
H_IERR#
D20
H_INIT#
B3 H4
H_RESET#
B1 F3 F4 G3 G2
G6 E4
AD4
ITP_BPM#1
AD3
ITP_BPM#2
AD1
ITP_BPM#3
AC4
ITP_BPM#4
AC2
ITP_BPM#5
AC1
ITP_TCK
AC5
ITP_TDIH_A#26
AA6
ITP_TDO
AB3
ITP_TMS
AB5
ITP_TRST#
AB6 C20
H_PROCHOT#
D21
H_THERMDA
A24
H_THERMDC
A25
H_THERMTRIP#
C7
A22 A21
T22
D2 F6 D3 C1 AF1 D22 C23 C24
H_ADS# 5 H_BNR# 5 H_BPRI# 5
H_DEFER# 5 H_DRDY# 5 H_DBSY# 5
H_BR0# 5
H_INIT# 11 H_LOCK# 5 H_RESET# 5
H_RS#0 5 H_RS#1 5 H_RS#2 5 H_TRDY# 5
H_HIT# 5 H_HITM# 5
ITP_DBRESET# 13,27
H_THERMDA 32 H_THERMDC 32
H_THERMTRIP# 32
CLK_CPU_BCLK 17 CLK_CPU_BCLK# 17
H_THERMTRIP#
H_IERR#
Routing together Trace width/Spacing =10/10 mil
R31 56
1 2
R165 56
1 2
+1.05V_VCCP
H_D#[0..63]5
H_D#[0..63]5
Place voltage divider within
0.5" of GTLREF pin
+1.05V_VCCP
R146 1K/F
CT_1214:Change R29 from 51_NC to 1K_NC
R142 2K/F
H_D#[0..63]
H_DSTBN#05 H_DSTBP#05
H_DINV#05
H_D#[0..63]
H_DSTBN#15 H_DSTBP#15
H_DINV#15
R29 *1K_NC
1 2
51
1 2
R28
Pop R28 for Yonah B0 & forward
CPU_MCH_BSEL06,17 CPU_MCH_BSEL16,17 CPU_MCH_BSEL26,17
H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15
H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31
TEST1 TEST2
H_DPRSTP#
H_DPSLP#
Populate for Yonah A0, de-pop for Yonah A1
R30 *56_NC
1 2
R32 *56_NC
1 2
H_A#[3..31]5
A A
H_ADSTB#05
H_REQ#05 H_REQ#15 H_REQ#25 H_REQ#35 H_REQ#45
H_A#[17..31]5
B B
H_ADSTB#15
H_A20M#11
H_FERR#11
H_IGNNE#11
H_STPCLK#11
H_INTR11 H_NMI11
H_SMI#11
C C
H_A#[3..16]
H_A#[17..31]
H_A20M# H_FERR# H_IGNNE#
H_STPCLK#
H_SMI#
H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16
H_A#17 H_A#18 H_A#19 ITP_BPM#0 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25
H_A#27 H_A#28 H_A#29 H_A#30 H_A#31
+1.05V_VCCP +1.05V_VCCP
R220
R221
39.2/F
51
R219 22.6/F
R217 22.6/F
12
12
R222 150
1 2 5 7 3
12
11
8 9
10 14 16 18 20 22
JITP1
TDI TMS TCK TDO TRST#
RESET#
FBO
BCLKN BCLKP
GND0 GND1 GND2 GND3 GND4 GND5
*ITP700_NC
2
VTT0 VTT1
VTAP
DBR# DBA#
BPM0# BPM1# BPM2# BPM3# BPM4# BPM5#
NC0 NC1
+1.05V_VCCP +3.3V_SUS
27 28 26
1 2
25 24
ITP_BPM#0
23
ITP_BPM#1
21
ITP_BPM#2
19
ITP_BPM#3
17
ITP_BPM#4
15
ITP_BPM#5
13 4
6
3
C337
0.1U_10V
12
R215 150
+1.05V_VCCP
12
R216
*54.9/F_NC
H_PROCHOT# CPU_PROCHOT#
ITP disable guidelines
Signal Resistor Value Connect To Resistor Placement
150 ohm +/- 5%
TDI
39 ohm +/- 5%
TMS
680 ohm +/- 5%
TRST#
27 ohm +/- 5%
TCK
Open
TDO
ITP_EN R268 Depop +3VRUN Close to CK410M Pin8
Note: Populate R214, R216, C366, and R268 when ITP connector is populated.
4
VTT
VTT
GND
GND
VTT
Within 2.0" of the CPU
Within 2.0" of the CPU
Within 2.0" of the CPU
Within 2.0" of the CPU
Within 2.0" of the CPU
5
12
R218 51/F
1 2
ITP_TDI ITP_TMS ITP_TCK
ITP_TDO
ITP_TRST#
H_RESET# ITP_DBRESET#
ITP_TCK
D D
CLK_CPU_ITP#17 CLK_CPU_ITP17
R150 27.4/F
ITP_TCK
1 2
ITP_TRST#
1 2
R153 680
1
1 2
1 2
+1.05V_VCCP
R168 75/F
1 2
0_0402
R448
6
CPU_PROCHOT# 28
QUANTA
Title
Size Document Number Rev
Date: Sheet
Yonah Processor (HOST)
DM5 1A
星期二
27, 2005
十二月
7
of
359,
8
Page 4
1
2
3
4
5
6
7
8
+VCC_CORE
C266
10U_4V
A A
C64
10U_4V
C60
10U_4V
B B
C C
C272
10U_4V
C62
10U_4V
C247
10U_4V
+VCC_CORE
C229
10U_4V
22uF 0805 X6S->105 degree C
8 inside ca vity north s i de secondary layer, 8 inside cavity south side secondary layer, 6 inside cavity north side primary lay er, 6 inside cavity south side primary layer.
C248
10U_4V
C63
10U_4V
C59
10U_4V
C271
10U_4V
C252
10U_4V
C246
10U_4V
C215
10U_4V
C67
10U_4V
+VCC_CORE
C61
10U_4V
+VCC_CORE
C58
10U_4V
+VCC_CORE
C270
10U_4V
+VCC_CORE
C251
10U_4V
+VCC_CORE
C245
10U_4V
C66
10U_4V
C269
10U_4V
C57
10U_4V
C268
10U_4V
C250
10U_4V
C281
10U_4V
C65
10U_4V
C267
10U_4V
C273
10U_4V
C283
10U_4V
C249
10U_4V
C282
10U_4V
+VCC_CORE
AA10 AA12 AA13 AA15 AA17 AA18 AA20
AC10 AB10 AB12 AB14 AB15 AB17 AB18
A10 A12 A13 A15 A17 A18 A20
B10 B12 B14 B15 B17 B18 B20
C10 C12 C13 C15 C17 C18
D10 D12 D14 D15 D17 D18
E10 E12 E13 E15 E17 E18 E20
F10 F12 F14 F15 F17 F18 F20 AA7 AA9
AB9
U6C
A7
VCC[001] VCC[002] VCC[003] VCC[004] VCC[005] VCC[006] VCC[007] VCC[008] VCC[009] VCC[010] VCC[011] VCC[012] VCC[013] VCC[014] VCC[015] VCC[016] VCC[017] VCC[018] VCC[019] VCC[020] VCC[021] VCC[022] VCC[023] VCC[024] VCC[025] VCC[026] VCC[027] VCC[028] VCC[029] VCC[030] VCC[031] VCC[032] VCC[033] VCC[034] VCC[035] VCC[036] VCC[037] VCC[038] VCC[039] VCC[040] VCC[041] VCC[042] VCC[043] VCC[044] VCC[045] VCC[046] VCC[047] VCC[048] VCC[049] VCC[050] VCC[051] VCC[052] VCC[053] VCC[054] VCC[055] VCC[056] VCC[057] VCC[058] VCC[059] VCC[060] VCC[061] VCC[062] VCC[063] VCC[064] VCC[065] VCC[066] VCC[067]
Yonah
VCC[68] VCC[69] VCC[70] VCC[71] VCC[72] VCC[73] VCC[74] VCC[75] VCC[76] VCC[77] VCC[78] VCC[79] VCC[80] VCC[81] VCC[82] VCC[83] VCC[84] VCC[85] VCC[86] VCC[87] VCC[88] VCC[89] VCC[90] VCC[91] VCC[92] VCC[93] VCC[94] VCC[95] VCC[96] VCC[97] VCC[98] VCC[99]
VCC[100] VCCP[01]
VCCP[02] VCCP[03] VCCP[04] VCCP[05] VCCP[06] VCCP[07] VCCP[08] VCCP[09] VCCP[10] VCCP[11] VCCP[12] VCCP[13] VCCP[14] VCCP[15] VCCP[16]
VCCA
VID[0] VID[1] VID[2] VID[3] VID[4] VID[5] VID[6]
VCCSENSE VSSSENSE
A9
B7 B9
C9
D9
E7 E9
F7 F9
+VCC_CORE
AB20 AB7 AC7 AC9 AC12 AC13 AC15 AC17 AC18 AD7 AD9 AD10 AD12 AD14 AD15 AD17 AD18 AE9 AE10 AE12 AE13 AE15 AE17 AE18 AE20 AF9 AF10 AF12 AF14 AF15 AF17 AF18 AF20
V6 G21 J6 K6 M6 J21 K21 M21 N21 N6 R21 R6 T21 T6 V21 W21
B26
AD6 AF5 AE5 AF4 AE3 AF2 AE2
AF7 AE7
Route VCCSENSE and VSSSENSE traces at 27.4ohms with 50mil spacing. Place PU and PD within 0.5 inch of CPU.
+1.05V_VCCP
+
C261 *330U_2.5V_NC
CT_0530: Modify netname.
CPU_VID0 45 CPU_VID1 45 CPU_VID2 45 CPU_VID3 45 CPU_VID4 45 CPU_VID5 45 CPU_VID6 45
VCCSENSE VSSSENSE
12
C68
0.01U_25V
+VCC_CORE
R138 100/F
R139 100/F
+1.5V_RUN
12
C69 10U_4V
Place C28 near PIN B26
VCCSENSE 45 VSSSENSE 45
Place PU & PD within 1 inch of CPU
M22 M25
N23 N26
A11 A14 A16 A19 A23 A26
B11 B13 B16 B19 B21 B24
C11 C14 C16 C19
C22 C25
D11 D13 D16 D19 D23 D26
E11 E14 E16 E19 E21 E24
F11 F13 F16 F19
F22 F25
G23 G26
H21 H24
K23 K26
L21 L24
U6D
A4
VSS[001]
A8
VSS[002] VSS[003] VSS[004] VSS[005] VSS[006] VSS[007] VSS[008]
B6
VSS[009]
B8
VSS[010] VSS[011] VSS[012] VSS[013] VSS[014] VSS[015] VSS[016]
C5
VSS[017]
C8
VSS[018] VSS[019] VSS[020] VSS[021] VSS[022]
C2
VSS[023] VSS[024] VSS[025]
D1
VSS[026]
D4
VSS[027]
D8
VSS[028] VSS[029] VSS[030] VSS[031] VSS[032] VSS[033] VSS[034]
E3
VSS[035]
E6
VSS[036]
E8
VSS[037] VSS[038] VSS[039] VSS[040] VSS[041] VSS[042] VSS[043]
F5
VSS[044]
F8
VSS[045] VSS[046] VSS[047] VSS[048] VSS[049]
F2
VSS[050] VSS[051] VSS[052]
G4
VSS[053]
G1
VSS[054] VSS[055] VSS[056]
H3
VSS[057]
H6
VSS[058] VSS[059] VSS[060]
J2
VSS[061]
J5
VSS[062]
J22
VSS[063]
J25
VSS[064]
K1
VSS[065]
K4
VSS[066] VSS[067] VSS[068]
L3
VSS[069]
L6
VSS[070] VSS[071] VSS[072]
M2
VSS[073]
M5
VSS[074] VSS[075] VSS[076]
N1
VSS[077]
N4
VSS[078] VSS[079] VSS[080]
P3
VSS[081]
Yonah
VSS[082] VSS[083] VSS[084] VSS[085] VSS[086] VSS[087] VSS[088] VSS[089] VSS[090] VSS[091] VSS[092] VSS[093] VSS[094] VSS[095] VSS[096] VSS[097] VSS[098] VSS[099] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158] VSS[159] VSS[160] VSS[161] VSS[162]
P6 P21 P24 R2 R5 R22 R25 T1 T4 T23 T26 U3 U6 U21 U24 V2 V5 V22 V25 W1 W4 W23 W26 Y3 Y6 Y21 Y24 AA2 AA5 AA8 AA11 AA14 AA16 AA19 AA22 AA25 AB1 AB4 AB8 AB11 AB13 AB16 AB19 AB23 AB26 AC3 AC6 AC8 AC11 AC14 AC16 AC19 AC21 AC24 AD2 AD5 AD8 AD11 AD13 AD16 AD19 AD22 AD25 AE1 AE4 AE8 AE11 AE14 AE16 AE19 AE23 AE26 AF3 AF6 AF8 AF11 AF13 AF16 AF19 AF21 AF24
D D
+1.05V_VCCP
12
C264
0.1U_10V
1
12
C254
0.1U_10V
12
C255
0.1U_10V
12
C256
0.1U_10V
12
C263
0.1U_10V
2
12
C262
0.1U_10V
QUANTA
Title
Size Document Number Rev
3
4
5
6
Date: Sheet
Yonah Processor (POWER)
DM5 1A
星期二
27, 2005
十二月
7
of
459,
8
Page 5
1
Layout note: H_XRCOMP & H_YRCOMP trace width and spcaing is 10/20 mil
H_XRCOMP
12
R50
24.9/F
A A
Layout note: H_YSCOMP & H_XSCOMP resistor should be less than 0.5" inch.
+1.05V_VCCP
12
R48
54.9/F
H_XSCOMP
B B
C C
H_SWING 0 ,H _SWING1 should be 10mil wide & 20mil spacing.
H_SWING 0, H _ S WING1 Resistors & Caps should be placed within 0.5"
12
R47 221/F
H_SWNG0 H_SWNG1
12
R46 100/F
C321
0.1U_10V
1 2
+1.05V_VCCP
+1.05V_VCCP+1.05V_VCCP
R55 100/F
12
12
12
12
H_YRCOMP
R57
24.9/F
R52
54.9/F
H_YSCOMP
R54 221/F
1 2
2
C84
0.1U_10V
3
H_D#[0..63]3
CLK_MCH_BCLK17
CLK_MCH_BCLK#17
H_D#[0..63]
H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63
H_XRCOMP H_XSCOMP H_SWNG0
H_YRCOMP H_YSCOMP H_SWNG1
W11
AB7 AA9
AB8 AA4
AA7 AA2 AA6
AA10
AA1 AB4
AC9 AB11 AC11
AB3
AC2
AD1
AD9
AC1
AD7
AC6
AB5 AD10
AD4
AC8
AG2
AG1
K11 T10
U11 T11
Y10
F1 H1 H3
K2 G1 G2
K9
K1
K7
H4
G4
T3
U7
U9
W9
T1
T8
T4 W7
U5
T9 W6
T5
W4 W3
Y3
Y7 W5
W2
Y8
E1
E2
E4
Y1
U1 W1
J1 J6
J8 J3
4
U7A
H_D#_0 H_D#_1 H_D#_2 H_D#_3 H_D#_4 H_D#_5 H_D#_6 H_D#_7 H_D#_8 H_D#_9 H_D#_10 H_D#_11 H_D#_12 H_D#_13 H_D#_14 H_D#_15 H_D#_16 H_D#_17 H_D#_18 H_D#_19 H_D#_20 H_D#_21 H_D#_22 H_D#_23 H_D#_24 H_D#_25 H_D#_26 H_D#_27 H_D#_28 H_D#_29 H_D#_30 H_D#_31 H_D#_32 H_D#_33 H_D#_34 H_D#_35 H_D#_36 H_D#_37 H_D#_38 H_D#_39 H_D#_40 H_D#_41 H_D#_42 H_D#_43 H_D#_44 H_D#_45 H_D#_46 H_D#_47 H_D#_48 H_D#_49 H_D#_50 H_D#_51 H_D#_52 H_D#_53 H_D#_54 H_D#_55 H_D#_56 H_D#_57 H_D#_58 H_D#_59 H_D#_60 H_D#_61 H_D#_62 H_D#_63
H_XRCOMP H_XSCOMP H_XSWING
H_YRCOMP H_YSCOMP H_YSWING
H_CLKIN H_CLKIN#
Calistoga
H_ADSTB#_0 H_ADSTB#_1
HOST
H_DSTBN#_0 H_DSTBN#_1 H_DSTBN#_2 H_DSTBN#_3
H_DSTBP#_0 H_DSTBP#_1 H_DSTBP#_2 H_DSTBP#_3
H_A#_3 H_A#_4 H_A#_5 H_A#_6 H_A#_7 H_A#_8
H_A#_9 H_A#_10 H_A#_11 H_A#_12 H_A#_13 H_A#_14 H_A#_15 H_A#_16 H_A#_17 H_A#_18 H_A#_19 H_A#_20 H_A#_21 H_A#_22 H_A#_23 H_A#_24 H_A#_25 H_A#_26 H_A#_27 H_A#_28 H_A#_29 H_A#_30 H_A#_31
H_ADS#
H_VREF_0
H_BNR#
H_BPRI#
H_BREQ#0
H_CPURST#
H_DBSY#
H_DEFER#
H_DPWR#
H_DRDY#
H_VREF_1
H_DINV#_0 H_DINV#_1 H_DINV#_2 H_DINV#_3
H_HIT# H_HITM#
H_LOCK#
H_REQ#_0 H_REQ#_1 H_REQ#_2 H_REQ#_3 H_REQ#_4
H_RS#_0 H_RS#_1 H_RS#_2
H_SLPCPU#
H_TRDY#
5
H_A#3
H9
H_A#4
C9
H_A#5
E11
H_A#6
G11
H_A#7
F11
H_A#8
G12
H_A#9
F9
H_A#10
H11
H_A#11
J12
H_A#12
G14
H_A#13
D9
H_A#14
J14
H_A#15
H13
H_A#16
J15
H_A#17
F14
H_A#18
D12
H_A#19
A11
H_A#20
C11
H_A#21
A12
H_A#22
A13
H_A#23
E13
H_A#24
G13
H_A#25
F12
H_A#26
B12
H_A#27
B14
H_A#28
C12
H_A#29
A14
H_A#30
C14
H_A#31
D14 E8
B9 C13 J13 C6 F6 C7 B7 A7 C3 J9 H8 K13
J7 W8 U3 AB10
K4 T7 Y5 AC4
K3 T6 AA5 AC5
D3 D4 B3
D8 G8 B8 F8 A8
B4 E6 D6
E3 E7
6
H_A#[3..31]
H_A#[3..31] 3
H_VREF decoupling cap should be placed within 100mils
H_ADS# 3 H_ADSTB#0 3 H_ADSTB#1 3
H_BNR# 3 H_BPRI# 3 H_BR0# 3 H_RESET# 3 H_DBSY# 3 H_DEFER# 3
H_DPWR# 3
H_DRDY# 3
H_DINV#0 3 H_DINV#1 3 H_DINV#2 3 H_DINV#3 3
H_DSTBN#0 3 H_DSTBN#1 3 H_DSTBN#2 3 H_DSTBN#3 3
H_DSTBP#0 3 H_DSTBP#1 3 H_DSTBP#2 3 H_DSTBP#3 3
H_HIT# 3 H_HITM# 3 H_LOCK# 3
H_REQ#0 3 H_REQ#1 3 H_REQ#2 3 H_REQ#3 3 H_REQ#4 3
H_RS#0 3 H_RS#1 3 H_RS#2 3
H_CPUSLP# 3,11 H_TRDY# 3
12
C336
0.1U_10V
H_VREF
7
+1.05V_VCCP
R212 100/F
1 2
12
R213 200/F
8
D D
QUANTA
Title
Size Document Number Rev
Custom
1
2
3
4
5
6
Date: Sheet
Calistoga (Host)
DM5 1A
星期二
27, 2005
十二月
7
of
559,
8
Page 6
1
2
3
4
5
6
7
8
U7B
T32
RSVD_1
R32
RSVD_2
F3
RSVD_3
F7
RSVD_4
AG11
RSVD_5
AF11
RSVD_6
H7
RSVD_7
J19
RSVD_8
A41
AH33 AH34
BA41 BA40 BA39
AY41
AW41
AW1
CFG7
CFG9
A35 A34 D28 D27
K16 K18
F18 E15 F15 E18 D19 D16 G16 E16 D15 G15 K15 C15 H16 G18 H15
K27
G28 F25 H26
H28 H27 K28 H32
C41
BA3 BA2 BA1 B41
AY1
A40 A39
J18
J25 J26
G6
D1 C1
B2
A4 A3
12
R223 *2.2K_NC
RSVD_9 RSVD_10 RSVD_11 RSVD_12 RSVD_13
CFG_0 CFG_1 CFG_2 CFG_3 CFG_4 CFG_5 CFG_6 CFG_7 CFG_8 CFG_9 CFG_10 CFG_11 CFG_12 CFG_13 CFG_14 CFG_15 CFG_16 CFG_17 CFG_18 CFG_19 CFG_20
PM_BMBUSY# PM_EXTTS#_0 PM_EXTTS#_1 PM_THRMTRIP# PWROK RSTIN#
SDVO_CTRLCLK SDVO_CTRLDATA ICH_SYNC# CLK_REQ#
NC0 NC1 NC2 NC3 NC4 NC5 NC6 NC7 NC8 NC9 NC10 NC11 NC12 NC13 NC14 NC15 NC16 NC17 NC18
12
R205
*2.2K_NC
12
R195 *2.2K_NC
12
R207 *2.2K_NC
2
SM_OCDCOMP_0 SM_OCDCOMP_1
CFGRSVD
DDR MUXINGCLKDMI
D_REFSSCLKIN#
PM
D_REFSSCLKIN
MISC
NC
Calistoga
CFG10
Host PLL VCC Select Low=Reserved High=Mobility
CFG11
PSB 4X CLK Enable Low=Calistoga High=Reserved
CFG16
FSB Dynamic ODT Low=Dynamic ODT Disable High=Dynamic ODT Enable
SM_RCOMP#
SM_RCOMP SM_VREF_0
SM_VREF_1
D_REFCLKIN#
D_REFCLKIN
DMI_RXN_0 DMI_RXN_1 DMI_RXN_2 DMI_RXN_3
DMI_RXP_0 DMI_RXP_1 DMI_RXP_2 DMI_RXP_3
DMI_TXN_0 DMI_TXN_1 DMI_TXN_2 DMI_TXN_3
DMI_TXP_0 DMI_TXP_1 DMI_TXP_2 DMI_TXP_3
CFG[2:0]
A A
001=FSB533 011=FSB667 Others = Reserved
CPU_MCH_BSEL03,17 CPU_MCH_BSEL13,17 CPU_MCH_BSEL23,17
R200
*2.2K_NC
Low=DMIx2 High=DMIx4
B B
THERMTRIP_MCH#32
PAD PAD PAD PAD PAD PAD PAD PAD PAD PAD PAD PAD PAD PAD PAD PAD PAD
C C
PAD PAD
Note: CFG3:17 has internal pullup CFG18:19 has internal pulldown
D D
T62
PAD
T5
PAD
12
PAD
PAD PAD
PAD
PM_BMBUSY#13
PM_EXTTS#015
ICH_PWRGD13,40
SDVO_CTRLCLK18 SDVO_CTRLDATA18
MCH_ICH_SYNC#12 CLK_3GPLLREQ#17
T12 T60 T11 T33 T24 T32 T27 T35 T28
T8
T10 T25 T34 T22 T26 T4 T9 T7 T3
CFG[13:12]
00 = Reserved 01 = XOR Mode Enabled 10 = All Z Mode Enabled 11 = Normal Operation(Default)
CFG6
Low= Moby High=Calistoga
1
T61
T6 T59
T63
PM_EXTTS#0 PM_EXTTS#1
TP_NC0 TP_NC1 TP_NC2 TP_NC3 TP_NC4 TP_NC5 TP_NC6 TP_NC7 TP_NC8 TP_NC9 TP_NC10 TP_NC11 TP_NC12 TP_NC13 TP_NC14 TP_NC15 TP_NC16 TP_NC17 TP_NC18
12
R184 *2.2K_NC
PCIE Graphics Lane Low= Reverse Lane High=Normal operation
CFG3 CFG4
CFG5 CFG6 CFG7 CFG8 CFG9
CFG10
CFG11 CFG12 CFG13 CFG14 CFG15 CFG16 CFG17 CFG18 CFG19 CFG20
PLTRST#_R
CFG13 CFG12
CPU_Strap Low=RSVD High=Mobile CPU
SM_CK_0 SM_CK_1 SM_CK_2 SM_CK_3
SM_CK#_0 SM_CK#_1 SM_CK#_2 SM_CK#_3
SM_CKE_0 SM_CKE_1 SM_CKE_2 SM_CKE_3
SM_CS#_0 SM_CS#_1 SM_CS#_2 SM_CS#_3
SM_ODT_0 SM_ODT_1 SM_ODT_2 SM_ODT_3
G_CLKIN#
G_CLKIN
12
R196 *2.2K_NC
12
R192 *2.2K_NC
12
R204 *2.2K_NC
AY35 AR1 AW7 AW40
AW35 AT1 AY7 AY40
AU20 AT20 BA29 AY29
AW13 AW12 AY21 AW21
M_OCDOCMP0
AL20
M_OCDOCMP1
AF10 BA13
BA12 AY20 AU21
SMRCOMPN
AV9
SMRCOMPP
AT9 AK1
AK41
AF33 AG33 A27 A26 C40 D41
AE35 AF39 AG35 AH39
AC35 AE39 AF35 AG39
AE37 AF41 AG37 AH41
AC37 AE41 AF37 AG41
PLTRST#12,13,18,23,27,28
DMI Lane Reversal Low=Normal High=Lane Reversed
PCIe Backward Interpoerability mode Low=Only SDVO or PCIEx1 is operational (defaults) High=SDVO and PCIEx1 are operating simultaneously via PEG port
3
VCC Select Low=1.05V High=1.5V
CFG18
CFG19
CFG20
M_CLK_DDR0 15 M_CLK_DDR1 15 M_CLK_DDR2 15 M_CLK_DDR3 15
M_CLK_DDR#0 15 M_CLK_DDR#1 15 M_CLK_DDR#2 15 M_CLK_DDR#3 15
DDR_CKE0_DIMMA 15,16 DDR_CKE1_DIMMA 15,16 DDR_CKE2_DIMMB 15,16 DDR_CKE3_DIMMB 15,16
DDR_CS0_DIMMA# 15,16 DDR_CS1_DIMMA# 15,16 DDR_CS2_DIMMB# 15,16 DDR_CS3_DIMMB# 15,16
R255 *40.2/F_NC R247 *40.2/F_NC
M_ODT0 15,16 M_ODT1 15,16 M_ODT2 15,16 M_ODT3 15,16
V_DDR_MCH_REF
CLK_MCH_3GPLL# 17
CLK_MCH_3GPLL 17
MCH_DREFCLK# 17
MCH_DREFCLK 17 DREF_SSCLK# 17 DREF_SSCLK 17
DMI_MRX_ITX_N0 12 DMI_MRX_ITX_N1 12 DMI_MRX_ITX_N2 12 DMI_MRX_ITX_N3 12
DMI_MRX_ITX_P0 12 DMI_MRX_ITX_P1 12 DMI_MRX_ITX_P2 12 DMI_MRX_ITX_P3 12
DMI_MTX_IRX_N0 12 DMI_MTX_IRX_N1 12 DMI_MTX_IRX_N2 12 DMI_MTX_IRX_N3 12
DMI_MTX_IRX_P0 12 DMI_MTX_IRX_P1 12 DMI_MTX_IRX_P2 12 DMI_MTX_IRX_P3 12
PLTRST#_R
12
R62100
+3.3V_RUN
R225 *1K_NC
1 2
+3.3V_RUN
R232 *1K_NC
1 2
+3.3V_RUN
R224 *1K_NC
1 2
+3.3V_RUN
Stuff R255,R247 for A1 Calistoga
V_DDR_MCH_REF
12
4
R202 10K
1 2 1 2
R203 10K
Place R255,R247 close to MCH.
12
C93 .1U_10V
VGA_HSYNC20 VGA_VSYNC20
+1.8V_SUS
LCTLA_CLK LCTLB_DAT
C559 .1U_10V
TV_CVBS20,39
TV_Y20,39 TV_C20,39
R190 150/F
1 2
R185 150/F
1 2
R187 150/F
1 2
R194 *150/F_NC
1 2
R193 *150/F_NC
1 2
R186 *150/F_NC
1 2
1 2
R35 39
1 2
R36 39
+3.3V_RUN
DPRSLPVR13,45
12
R263
80.6/F
SMRCOMPN SMRCOMPP
12
R261
80.6/F
5
PANEL_BKEN19
LCD_ACLK-19 LCD_ACLK+19 LCD_BCLK-19 LCD_BCLK+19
LCD_A0-19 LCD_A1-19 LCD_A2-19
LCD_A0+19 LCD_A1+19 LCD_A2+19
LCD_B0-19 LCD_B1-19 LCD_B2-19
LCD_B0+19 LCD_B1+19 LCD_B2+19
+1.05V_VCCP
BIA_PWM19,27
LCD_DDCCLK19 LCD_DDCDAT19
1 2
R183 1.5K/F
ENVDD19
1 2
R208
4.99K/F
VGA_BLU20,39 VGA_GRN20,39 VGA_RED20,39
CLK_DDC220 DAT_DDC220
1 2
R214 255/F
R206 10K
1 2
R201 *10K_NC
1 2
R227 0
1 2
R226 75
1 2
THERMTRIP_MCH#
U7C
D32
L_BKLTCTL
J30
L_BKLTEN
H30
L_CLKCTLA
H29
L_CLKCTLB
G26
L_DDC_CLK
G25
L_DDC_DATA
B38
L_IBG
C35
L_VBG
F32
L_VDDEN
C33
L_VREFH
C32
L_VREFL
A33
LA_CLK#
A32
LA_CLK
E27
LB_CLK#
E26
LB_CLK
C37
LA_DATA#_0
B35
LA_DATA#_1
A37
LA_DATA#_2
B37
LA_DATA_0
B34
LA_DATA_1
A36
LA_DATA_2
G30
LB_DATA#_0
D30
LB_DATA#_1
F29
LB_DATA#_2
F30
LB_DATA_0
D29
LB_DATA_1
F28
LB_DATA_2
A16
TV_DACA_OUT
C18
TV_DACB_OUT
A19
TV_DACC_OUT
J20
TV_IREF
B16
TV_IRTNA
B18
TV_IRTNB
B19
TV_IRTNC
K30
TV_DCONSEL0
J29
TV_DCONSEL1
E23
CRT_BLUE
D23
CRT_BLUE#
C22
CRT_GREEN
B22
CRT_GREEN#
A21
CRT_RED
B21
CRT_RED#
C26
CRT_DDC_CLK
C25
CRT_DDC_DATA
G23
CRT_HSYNC
J22
CRT_IREF
H23
CRT_VSYNC
Calistoga
PM_EXTTS#0
PM_EXTTS#1 DVO_GREEN#_C
6
LVDS
TV
VGA
DVO_RED#_C DVO_BLUE#_C
DVO_CLK#_C DVO_RED_C
DVO_GREEN_C DVO_BLUE_C DVO_CLK_C
Title
Size Document Number Rev
Date: Sheet
VCC3G_PCIE_R
1 2 1 2 1 2 1 2
1 2 1 2 1 2 1 2
D40 D38
F34 G38 H34 J38 L34 M38 N34 P38 R34 T38 V34 W38 Y34 AA38 AB34 AC38
D34 F38 G34 H38 J34 L38 M34 N38 P34 R38 T34 V38 W34 Y38 AA34 AB38
F36 G40 H36 J40 L36 M40 N36 P40 R36 T40 V36 W40 Y36 AA40 AB36 AC40
D36 F40 G36 H40 J36 L40 M36 N40 P36 R40 T36 V40 W36 Y40 AA36 AB40
DVO_RED#_C DVO_GREEN#_C DVO_BLUE#_C DVO_CLK#_C
DVO_RED_C DVO_GREEN_C DVO_BLUE_C DVO_CLK_C
SDVOB_RED- 18 SDVOB_GREEN- 18 SDVOB_BLUE- 18 SDVOB_CLK- 18
SDVOB_RED+ 18 SDVOB_GREEN+ 18 SDVOB_BLUE+ 18 SDVOB_CLK+ 18
EXP_A_COMPI
EXP_A_COMPO
EXP_A_RXN_0 EXP_A_RXN_1 EXP_A_RXN_2 EXP_A_RXN_3 EXP_A_RXN_4 EXP_A_RXN_5 EXP_A_RXN_6 EXP_A_RXN_7 EXP_A_RXN_8
EXP_A_RXN_9 EXP_A_RXN_10 EXP_A_RXN_11 EXP_A_RXN_12 EXP_A_RXN_13 EXP_A_RXN_14 EXP_A_RXN_15
EXP_A_RXP_0
EXP_A_RXP_1
EXP_A_RXP_2
EXP_A_RXP_3
EXP_A_RXP_4
EXP_A_RXP_5
EXP_A_RXP_6
EXP_A_RXP_7
EXP_A_RXP_8
EXP_A_RXP_9 EXP_A_RXP_10 EXP_A_RXP_11 EXP_A_RXP_12 EXP_A_RXP_13 EXP_A_RXP_14 EXP_A_RXP_15
EXP_A_TXN_0 EXP_A_TXN_1 EXP_A_TXN_2 EXP_A_TXN_3 EXP_A_TXN_4 EXP_A_TXN_5 EXP_A_TXN_6 EXP_A_TXN_7 EXP_A_TXN_8
EXP_A_TXN_9 EXP_A_TXN_10 EXP_A_TXN_11 EXP_A_TXN_12 EXP_A_TXN_13
PCI-EXPRESS GRAPHICS
EXP_A_TXN_14 EXP_A_TXN_15
EXP_A_TXP_0
EXP_A_TXP_1
EXP_A_TXP_2
EXP_A_TXP_3
EXP_A_TXP_4
EXP_A_TXP_5
EXP_A_TXP_6
EXP_A_TXP_7
EXP_A_TXP_8
EXP_A_TXP_9 EXP_A_TXP_10 EXP_A_TXP_11 EXP_A_TXP_12 EXP_A_TXP_13 EXP_A_TXP_14 EXP_A_TXP_15
C326 .1U_10V C325 .1U_10V C335 .1U_10V C339 .1U_10V
C323 .1U_10V C322 .1U_10V C330 .1U_10V C334 .1U_10V
QUANTA COMPUTER
Calistoga (VGA,DMI)
DM5 1A
星期二
27, 2005
十二月
7
VCC3G_PCIE
R188 24.9/F
1 2
SDVOB_INT- 18
SDVOB_INT+ 18
of
659,
8
Page 7
1
A A
2
3
4
5
6
7
8
AJ35
AJ34 AM31 AM33
AJ36
AK35
AJ32
AH31 AN35 AP33 AR31 AP31
AN38 AM36 AM34
AN33
AK26
AL27
AM26
AN24
AK28
AL28
AM24
AP26
AP23
AL22 AP21 AN20
AL23 AP24 AP20 AT21 AR12 AR14 AP13 AP12 AT13 AT12
AL14
AL12
AW2
AK9 AN7 AK8 AK7 AP9 AN9 AT5 AL5 AY2
AP1 AN2 AV2 AT3 AN1 AL2 AG7 AF9 AG4 AF6 AG9 AH6 AF4 AF8
U7D
SA_DQ0 SA_DQ1 SA_DQ2 SA_DQ3 SA_DQ4 SA_DQ5 SA_DQ6 SA_DQ7 SA_DQ8 SA_DQ9 SA_DQ10 SA_DQ11 SA_DQ12 SA_DQ13 SA_DQ14 SA_DQ15 SA_DQ16 SA_DQ17 SA_DQ18 SA_DQ19 SA_DQ20 SA_DQ21 SA_DQ22 SA_DQ23 SA_DQ24 SA_DQ25 SA_DQ26 SA_DQ27 SA_DQ28 SA_DQ29 SA_DQ30 SA_DQ31 SA_DQ32 SA_DQ33 SA_DQ34 SA_DQ35 SA_DQ36 SA_DQ37 SA_DQ38 SA_DQ39 SA_DQ40 SA_DQ41 SA_DQ42 SA_DQ43 SA_DQ44 SA_DQ45 SA_DQ46 SA_DQ47 SA_DQ48 SA_DQ49 SA_DQ50 SA_DQ51 SA_DQ52 SA_DQ53 SA_DQ54 SA_DQ55 SA_DQ56 SA_DQ57 SA_DQ58 SA_DQ59 SA_DQ60 SA_DQ61 SA_DQ62 SA_DQ63
Calistoga
DDR_A_BS0
AU12
SA_BS_0 SA_BS_1 SA_BS_2
SA_CAS# SA_DM_0 SA_DM_1 SA_DM_2 SA_DM_3 SA_DM_4 SA_DM_5 SA_DM_6 SA_DM_7
SA_DQS_0 SA_DQS_1 SA_DQS_2 SA_DQS_3 SA_DQS_4 SA_DQS_5 SA_DQS_6
SA_DQS_7 SA_DQS#_0 SA_DQS#_1 SA_DQS#_2 SA_DQS#_3 SA_DQS#_4 SA_DQS#_5 SA_DQS#_6 SA_DQS#_7
SA_MA_0 SA_MA_1 SA_MA_2 SA_MA_3 SA_MA_4 SA_MA_5 SA_MA_6 SA_MA_7 SA_MA_8
SA_MA_9 SA_MA_10 SA_MA_11 SA_MA_12 SA_MA_13
SA_RAS#
SA_RCVENIN#
SA_RCVENOUT#
DDR SYSTEM MEMORY A
SA_WE#
AV14 BA20
AY13 AJ33 AM35 AL26 AN22 AM14 AL9 AR3 AH4
AK33 AT33 AN28 AM22 AN12 AN8 AP3 AG5 AK32 AU33 AN27 AM21 AM12 AL8 AN3 AH5
AY16 AU14 AW16 BA16 BA17 AU16 AV17 AU17 AW17 AT16 AU13 AT17 AV20 AV12
AW14 AK23 AK24 AY14
DDR_A_BS1 DDR_A_BS2 DDR_A_CAS#
DDR_A_DM0 DDR_A_DM1 DDR_A_DM2 DDR_A_DM3 DDR_A_DM4 DDR_A_DM5 DDR_A_DM6 DDR_A_DM7
DDR_A_DQS0 DDR_A_DQS1 DDR_A_DQS2 DDR_A_DQS3 DDR_A_DQS4 DDR_A_DQS5 DDR_A_DQS6 DDR_A_DQS7 DDR_A_DQS#0 DDR_A_DQS#1 DDR_A_DQS#2 DDR_A_DQS#3 DDR_A_DQS#4 DDR_A_DQS#5 DDR_A_DQS#6 DDR_A_DQS#7
DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13
DDR_A_RAS#
DDR_A_WE#
DDR_A_BS0 15,16 DDR_A_BS1 15,16 DDR_A_BS2 15,16 DDR_A_CAS# 15,16 DDR_A_DM[0..7] 15
DDR_A_DQS[0..7] 15
DDR_A_DQS#[0..7] 15
DDR_A_MA[0..13] 15,16
DDR_A_RAS# 15,16
T70 PAD T69 PAD
DDR_A_WE# 15,16
DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20
B B
C C
DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63
DDR_B_D[0..63]15DDR_A_D[0..63]15
DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63
AK39
AJ37 AP39 AR41
AJ38 AK38 AN41 AP41 AT40 AV41 AU38 AV38 AP38 AR40
AW38
AY38 BA38 AV36 AR36 AP36 BA36 AU36 AP35 AP34 AY33 BA33 AT31 AU29 AU31
AW31
AV29
AW29 AM19
AL19 AP14 AN14 AN17
AM16
AP15
AL15
AJ11 AH10
AN10 AK13 AH11 AK10
BA10
AW10
BA4
AW4 AY10
AY9
AW5
AY5 AV4 AR5 AK4 AK3 AT4 AK5
AJ9
AJ8
AJ5 AJ3
U7E
SB_DQ0 SB_DQ1 SB_DQ2 SB_DQ3 SB_DQ4 SB_DQ5 SB_DQ6 SB_DQ7 SB_DQ8 SB_DQ9 SB_DQ10 SB_DQ11 SB_DQ12 SB_DQ13 SB_DQ14 SB_DQ15 SB_DQ16 SB_DQ17 SB_DQ18 SB_DQ19 SB_DQ20 SB_DQ21 SB_DQ22 SB_DQ23 SB_DQ24 SB_DQ25 SB_DQ26 SB_DQ27 SB_DQ28 SB_DQ29 SB_DQ30 SB_DQ31 SB_DQ32 SB_DQ33 SB_DQ34 SB_DQ35 SB_DQ36 SB_DQ37 SB_DQ38 SB_DQ39 SB_DQ40 SB_DQ41 SB_DQ42 SB_DQ43 SB_DQ44 SB_DQ45 SB_DQ46 SB_DQ47 SB_DQ48 SB_DQ49 SB_DQ50 SB_DQ51 SB_DQ52 SB_DQ53 SB_DQ54 SB_DQ55 SB_DQ56 SB_DQ57 SB_DQ58 SB_DQ59 SB_DQ60 SB_DQ61 SB_DQ62 SB_DQ63
Calistoga
DDR_B_BS0
AT24
SB_BS_0 SB_BS_1 SB_BS_2
SB_CAS# SB_DM_0 SB_DM_1 SB_DM_2 SB_DM_3 SB_DM_4 SB_DM_5 SB_DM_6 SB_DM_7
SB_DQS_0 SB_DQS_1 SB_DQS_2 SB_DQS_3 SB_DQS_4 SB_DQS_5 SB_DQS_6
SB_DQS_7 SB_DQS#_0 SB_DQS#_1 SB_DQS#_2 SB_DQS#_3 SB_DQS#_4 SB_DQS#_5 SB_DQS#_6 SB_DQS#_7
SB_MA_0 SB_MA_1 SB_MA_2 SB_MA_3 SB_MA_4 SB_MA_5 SB_MA_6 SB_MA_7 SB_MA_8
SB_MA_9 SB_MA_10 SB_MA_11 SB_MA_12 SB_MA_13
SB_RAS#
SB_RCVENIN#
SB_RCVENOUT#
DDR SYSTEM MEMORY B
SB_WE#
AV23 AY28
AR24 AK36 AR38 AT36 BA31 AL17 AH8 BA5 AN4
AM39 AT39 AU35 AR29 AR16 AR10 AR7 AN5 AM40 AU39 AT35 AP29 AP16 AT10 AT7 AP5
AY23 AW24 AY24 AR28 AT27 AT28 AU27 AV28 AV27 AW27 AV24 BA27 AY27 AR23
AU23 AK16 AK18 AR27
DDR_B_BS1 DDR_B_BS2 DDR_B_CAS#
DDR_B_DM0 DDR_B_DM1 DDR_B_DM2 DDR_B_DM3 DDR_B_DM4 DDR_B_DM5 DDR_B_DM6 DDR_B_DM7
DDR_B_DQS0 DDR_B_DQS1 DDR_B_DQS2 DDR_B_DQS3 DDR_B_DQS4 DDR_B_DQS5 DDR_B_DQS6 DDR_B_DQS7 DDR_B_DQS#0 DDR_B_DQS#1 DDR_B_DQS#2 DDR_B_DQS#3 DDR_B_DQS#4 DDR_B_DQS#5 DDR_B_DQS#6 DDR_B_DQS#7
DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8 DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13
DDR_B_RAS#
DDR_B_WE#
DDR_B_BS0 15,16 DDR_B_BS1 15,16 DDR_B_BS2 15,16 DDR_B_CAS# 15,16 DDR_B_DM[0..7] 15
DDR_B_DQS[0..7] 15
DDR_B_DQS#[0..7] 15
DDR_B_MA[0..13] 15,16
DDR_B_RAS# 15,16
T71 PAD T68 PAD
DDR_B_WE# 15,16
D D
QUANTA
Title
Size Document Number Rev
Custom
1
2
3
4
5
6
Date: Sheet
Calistoga (DDR2)
DM5 1A
星期二
27, 2005
十二月
7
of
759,
8
Page 8
5
U7G
+1.05V_VCCP
D D
C C
B B
A A
5
AA33
W33
P33 N33
AA32
Y32
W32
V32 P32 N32
M32
AA31
W31
V31 R31
P31 N31
M31
AA30
Y30
W30
V30 U30
R30 P30 N30
M30
AA29
Y29
W29
V29 U29 R29 P29
M29
AB28 AA28
Y28 V28 U28
R28 P28 N28
M28
P27 N27
M27
P26 N26
N25
M25
P24 N24
M24 AB23 AA23
Y23 P23 N23
M23 AC22
AB22
Y22
W22
P22 N22
M22 AC21
AA21
W21
N21
M21 AC20
AB20
Y20
W20
P20 N20
M20 AB19
AA19
Y19 N19
M19
N18
M18
P17 N17
M17
N16
M16
VCC_0 VCC_1 VCC_2 VCC_3
L33
VCC_4
J33
VCC_5 VCC_6 VCC_7 VCC_8 VCC_9 VCC_10 VCC_11 VCC_12
L32
VCC_13
J32
VCC_14 VCC_15 VCC_16 VCC_17
T31
VCC_18 VCC_19 VCC_20 VCC_21 VCC_22 VCC_23 VCC_24 VCC_25 VCC_26 VCC_27
T30
VCC_28 VCC_29 VCC_30 VCC_31 VCC_32
L30
VCC_33 VCC_34 VCC_35 VCC_36 VCC_37 VCC_38 VCC_39 VCC_40 VCC_41
L29
VCC_42 VCC_43 VCC_44 VCC_45 VCC_46 VCC_47
T28
VCC_48 VCC_49 VCC_50 VCC_51 VCC_52
L28
VCC_53 VCC_54 VCC_55 VCC_56
L27
VCC_57 VCC_58 VCC_59
L26
VCC_60 VCC_61 VCC_62
L25
VCC_63 VCC_64 VCC_65 VCC_66 VCC_67 VCC_68 VCC_69 VCC_70 VCC_71 VCC_72
L23
VCC_73 VCC_74 VCC_75 VCC_76 VCC_77 VCC_78 VCC_79 VCC_80
L22
VCC_81 VCC_82 VCC_83 VCC_84 VCC_85 VCC_86
L21
VCC_87 VCC_88 VCC_89 VCC_90 VCC_91 VCC_92 VCC_93 VCC_94
L20
VCC_95 VCC_96 VCC_97 VCC_98 VCC_99 VCC_100
L19
VCC_101 VCC_102 VCC_103
L18
VCC_104 VCC_105 VCC_106 VCC_107 VCC_108 VCC_109
L16
VCC_110
VCC
Calistoga
4
VCC_SM_0 VCC_SM_1 VCC_SM_2 VCC_SM_3 VCC_SM_4 VCC_SM_5 VCC_SM_6 VCC_SM_7 VCC_SM_8
VCC_SM_9 VCC_SM_10 VCC_SM_11 VCC_SM_12 VCC_SM_13 VCC_SM_14 VCC_SM_15 VCC_SM_16 VCC_SM_17 VCC_SM_18 VCC_SM_19 VCC_SM_20 VCC_SM_21 VCC_SM_22 VCC_SM_23 VCC_SM_24 VCC_SM_25 VCC_SM_26 VCC_SM_27 VCC_SM_28 VCC_SM_29 VCC_SM_30 VCC_SM_31 VCC_SM_32 VCC_SM_33 VCC_SM_34 VCC_SM_35 VCC_SM_36 VCC_SM_37 VCC_SM_38 VCC_SM_39 VCC_SM_40 VCC_SM_41 VCC_SM_42 VCC_SM_43 VCC_SM_44 VCC_SM_45 VCC_SM_46 VCC_SM_47 VCC_SM_48 VCC_SM_49 VCC_SM_50 VCC_SM_51 VCC_SM_52 VCC_SM_53 VCC_SM_54 VCC_SM_55 VCC_SM_56 VCC_SM_57 VCC_SM_58 VCC_SM_59 VCC_SM_60 VCC_SM_61 VCC_SM_62 VCC_SM_63 VCC_SM_64 VCC_SM_65 VCC_SM_66 VCC_SM_67 VCC_SM_68 VCC_SM_69 VCC_SM_70 VCC_SM_71 VCC_SM_72 VCC_SM_73 VCC_SM_74 VCC_SM_75 VCC_SM_76 VCC_SM_77 VCC_SM_78 VCC_SM_79 VCC_SM_80 VCC_SM_81 VCC_SM_82 VCC_SM_83 VCC_SM_84 VCC_SM_85 VCC_SM_86 VCC_SM_87 VCC_SM_88 VCC_SM_89 VCC_SM_90 VCC_SM_91 VCC_SM_92 VCC_SM_93 VCC_SM_94 VCC_SM_95 VCC_SM_96 VCC_SM_97 VCC_SM_98 VCC_SM_99
VCC_SM_100 VCC_SM_101 VCC_SM_102 VCC_SM_103 VCC_SM_104 VCC_SM_105 VCC_SM_106 VCC_SM_107
4
AU41 AT41 AM41 AU40 BA34 AY34 AW34 AV34 AU34 AT34 AR34 BA30 AY30 AW30 AV30 AU30 AT30 AR30 AP30 AN30 AM30 AM29 AL29 AK29 AJ29 AH29 AJ28 AH28 AJ27 AH27 BA26 AY26 AW26 AV26 AU26 AT26 AR26 AJ26 AH26 AJ25 AH25 AJ24 AH24 BA23 AJ23 BA22 AY22 AW22 AV22 AU22 AT22 AR22 AP22 AK22 AJ22 AK21 AK20 BA19 AY19 AW19 AV19 AU19 AT19 AR19 AP19 AK19 AJ19 AJ18 AJ17 AH17 AJ16 AH16 BA15 AY15 AW15 AV15 AU15 AT15 AR15 AJ15 AJ14 AJ13 AH13 AK12 AJ12 AH12 AG12 AK11 BA8 AY8 AW8 AV8 AT8 AR8 AP8 BA6 AY6 AW6 AV6 AT6 AR6 AP6 AN6 AL6 AK6 AJ6 AV1 AJ1
Place near C94 close to U2.AT41 Place near C92 close to U2.AM41
VCCSM_LF4 VCCSM_LF5
12
.1U_10V
C107
12
C92
0.47U_10V
12
.1U_10V
C106
12
C94
0.47U_10V
Place C104 close to U3.BA23
12
C104
0.47U_10V
+1.8V_SUS
+
C88 *330U_2.5V_NC
+1.8V_SUS
12
12
C373
C374
10U_4V
10U_4V
Place In Cavity
Place near U2.AV1 & AJ1
C97 0.47U_10V
VCCSM_LF2
VCCSM_LF1
1 2
C91 0.47U_10V
1 2
3
+1.05V_VCCP
C344
C345
C108
C103
0.47U_10V
+
+1.05V_VCCP
+
12
C105
.1U_10V
330U_2.5V
330U_2.5V
12
.1U_10V
12
Place C103 near pin U2.BA15
3
12
12
C342 10U_4V
C364 10U_4V
12
C360 1U_10V
12
C355
0.22U_10V
12
C350
0.22U_10V
12
C343
0.22U_10V
2
AD27 AC27 AB27 AA27
Y27
W27
V27 U27 T27
R27 AD26 AC26 AB26 AA26
Y26
W26
V26
U26
T26
R26 AD25 AC25 AB25 AA25
Y25
W25
V25
U25
T25
R25 AD24 AC24 AB24 AA24
Y24
W24
V24
U24
T24
R24 AD23
V23
U23
T23
R23 AD22
V22
U22
T22
R22 AD21
V21
U21
T21
R21 AD20
V20
U20
T20
R20 AD19
V19
U19
T19 AD18 AC18 AB18 AA18
Y18
W18
V18
U18
T18
2
U7F
VCC_NCTF0 VCC_NCTF1 VCC_NCTF2 VCC_NCTF3 VCC_NCTF4 VCC_NCTF5 VCC_NCTF6 VCC_NCTF7 VCC_NCTF8 VCC_NCTF9 VCC_NCTF10 VCC_NCTF11 VCC_NCTF12 VCC_NCTF13 VCC_NCTF14 VCC_NCTF15 VCC_NCTF16 VCC_NCTF17 VCC_NCTF18 VCC_NCTF19 VCC_NCTF20 VCC_NCTF21 VCC_NCTF22 VCC_NCTF23 VCC_NCTF24 VCC_NCTF25 VCC_NCTF26 VCC_NCTF27 VCC_NCTF28 VCC_NCTF29 VCC_NCTF30 VCC_NCTF31 VCC_NCTF32 VCC_NCTF33 VCC_NCTF34 VCC_NCTF35 VCC_NCTF36 VCC_NCTF37 VCC_NCTF38 VCC_NCTF39 VCC_NCTF40 VCC_NCTF41 VCC_NCTF42 VCC_NCTF43 VCC_NCTF44 VCC_NCTF45 VCC_NCTF46 VCC_NCTF47 VCC_NCTF48 VCC_NCTF49 VCC_NCTF50 VCC_NCTF51 VCC_NCTF52 VCC_NCTF53 VCC_NCTF54 VCC_NCTF55 VCC_NCTF56 VCC_NCTF57 VCC_NCTF58 VCC_NCTF59 VCC_NCTF60 VCC_NCTF61 VCC_NCTF62 VCC_NCTF63 VCC_NCTF64 VCC_NCTF65 VCC_NCTF66 VCC_NCTF67 VCC_NCTF68 VCC_NCTF69 VCC_NCTF70 VCC_NCTF71 VCC_NCTF72
1
AE27 AE26 AE25 AE24 AE23 AE22 AE21 AE20 AE19 AE18 AC17 Y17 U17
AG27 AF27 AG26 AF26 AG25 AF25 AG24 AF24 AG23 AF23 AG22 AF22 AG21 AF21 AG20 AF20 AG19 AF19 R19 AG18 AF18 R18 AG17 AF17 AE17 AD17 AB17 AA17 W17 V17 T17 R17 AG16 AF16 AE16 AD16 AC16 AB16 AA16 Y16 W16 V16 U16 T16 R16 AG15 AF15 AE15 AD15 AC15 AB15 AA15 Y15 W15 V15 U15 T15 R15
+1.5V_RUN
NCTF
Calistoga
VSS_NCTF0 VSS_NCTF1 VSS_NCTF2 VSS_NCTF3 VSS_NCTF4 VSS_NCTF5 VSS_NCTF6 VSS_NCTF7 VSS_NCTF8
VSS_NCTF9 VSS_NCTF10 VSS_NCTF11 VSS_NCTF12
VCCAUX_NCTF0 VCCAUX_NCTF1 VCCAUX_NCTF2 VCCAUX_NCTF3 VCCAUX_NCTF4 VCCAUX_NCTF5 VCCAUX_NCTF6 VCCAUX_NCTF7 VCCAUX_NCTF8
VCCAUX_NCTF9 VCCAUX_NCTF10 VCCAUX_NCTF11 VCCAUX_NCTF12 VCCAUX_NCTF13 VCCAUX_NCTF14 VCCAUX_NCTF15 VCCAUX_NCTF16 VCCAUX_NCTF17 VCCAUX_NCTF18 VCCAUX_NCTF19 VCCAUX_NCTF20 VCCAUX_NCTF21 VCCAUX_NCTF22 VCCAUX_NCTF23 VCCAUX_NCTF24 VCCAUX_NCTF25 VCCAUX_NCTF26 VCCAUX_NCTF27 VCCAUX_NCTF28 VCCAUX_NCTF29 VCCAUX_NCTF30 VCCAUX_NCTF31 VCCAUX_NCTF32 VCCAUX_NCTF33 VCCAUX_NCTF34 VCCAUX_NCTF35 VCCAUX_NCTF36 VCCAUX_NCTF37 VCCAUX_NCTF38 VCCAUX_NCTF39 VCCAUX_NCTF40 VCCAUX_NCTF41 VCCAUX_NCTF42 VCCAUX_NCTF43 VCCAUX_NCTF44 VCCAUX_NCTF45 VCCAUX_NCTF46 VCCAUX_NCTF47 VCCAUX_NCTF48 VCCAUX_NCTF49 VCCAUX_NCTF50 VCCAUX_NCTF51 VCCAUX_NCTF52 VCCAUX_NCTF53 VCCAUX_NCTF54 VCCAUX_NCTF55 VCCAUX_NCTF56 VCCAUX_NCTF57
QUANTA
Title
Size Document Number Rev
Custom
Date: Sheet
Calistoga (VCC, NCTF)
DM5 1A
星期二
27, 2005
十二月
1
of
859,
Page 9
5
L17
1 2
1 2
BLM18PG330SN1
L46
1 2
BLM18PG181SN1
+2.5V_RUN
VCCA_3GPLL_R
L41
1 2
BLM18PG181SN1
+1.5V_RUN
CT_1214: Removed R49 0_0805 ohm.
+1.5V_RUN
D D
D18
R171 10
2 1
+1.05V_VCCP
RB751V
Route Caps within 250mil or
VCC3G_PCIE
C79
150U_2V_L
R249
0.5/F
VCCA_CRTDAC
12
C293 .1U_10V
12
+
C87
10U_4V
12
C354
10U_4V
R178 0
1 2
Calistoga. Route FB within 3" of Calistoga.
Route VSSACRTDAC gnd from GMCH to decoupling cap ground lead and then connect to gnd plane.
+1.5V_RUN
C C
B B
A A
+3.3V_RUN
+1.5V_RUN
L42 10uH
L16 10uH
D17
2 1
RB751V
12
12
12
12
R163
10
1 2
+1.5V_RUN
12
C319
+
.1U_10V
12
C316
+
.1U_10V
L40
1 2
BLM18PG181SN1
5
VCCA_DPLLA
C71 470U_4V
C76 470U_4V
C278 10U_4V
2.2U_6.3V
L15
1 2
BLM18PG181SN1
C296
+1.5V_RUN
12
.1U_10V
.1U_10V
.1U_10V
12
.1U_10V
.1U_10V
.1U_10V
C284
C313
C279
C294
C280
C70
L45 BLM11A121S
L47 BLM11A121S
VCC_TVDACA
12
VCC_TVDACB
12
VCC_TVDACC
12
VCC_TVBG
12
VCCD_TVDAC
12
VCCQ_TVDAC
12
C306 *22NF_3P_NC
C285 *22NF_3P_NC
C295 *22NF_3P_NC
C307 *22NF_3P_NC
C286 *22NF_3P_NC
C72 *22NF_3P_NC
12
C90
10U_4V
12
C365
.1U_10V
1
3
C298
2
*22NF_3P_NC
12
12
C367 .1U_10V
12
12
C375 .1U_10V
R180 0
1 2 123
R172 0
1 2 123
R177 0
1 2 123
R181 0
1 2 123
R170 0
1 2 123
R33 0
1 2 123
4
VCC3G_PCIE
12
Place C79 and C87 on same side as Calostoga. No Vias.
VCCA_3GPLL
12
12
C324 .022U
VCCA_HPLL
12
C362 22U
VCCA_MPLLVCCA_DPLLB
12
C378 22U
VCC_TVDACA_R
12
C314 .022U
VCC_TVDACB_R
12
C320 .022U
VCC_TVDACC_R
12
C297 .022U
VCC_TVBG_R
12
C327 .022U
VSS_TVBG
VCCD_TVDAC_R
12
C289 .022U
VCCQ_TVDAC_R
12
C74 .022U
4
+2.5V_RUN
C328 .01U
12
+2.5V_RUN
3
12
C305
.1U_10V
4.7U
C329 .1U_10V
12
C312
+2.5V_RUN
12
VCC3G_PCIE
VCCA_3GPLL
C329 should be place within 200mils
+2.5V_CRTDAC
VCCA_DPLLA VCCA_DPLLB VCCA_HPLL
+1.5V_RUN
10U_4V
+2.5V_RUN
C304
.1U_10V
12
.1U_10V
C310
C311
+3.3V_RUN
12
12
C308
10U_4V
C301 .01U
12
12
.1U_10V
C303
+1.5V_RUN
12
+1.5V_RUN
VCCA_MPLL VCC_TVBG_R
VSS_TVBG
VCC_TVDACA_R VCC_TVDACB_R VCC_TVDACC_R
VCCD_TVDAC_R
VCCQ_TVDAC_R
12
C369 .1U_10V
Route VSSA_TVBG_GND from GMCH to decoupling cap ground lead and then connect to the GND plane.
4.7U, 10U and 22U should be placed <500mils with in its pins.
0.1U should be placed <200mils with in its pins. 22n should be placed with in its pins.
3
H22 C30
AJ41
AB41
R41 N41
AC33
G41 H41
G21
C39 AF1
AF2 H20
G20
C20 D20
AH1 AH2
C28 D21
H19
AK31 AF31 AE31 AC31
AL30
AK30
AJ30 AH30 AG30 AF30 AE30 AD30 AC30 AG29 AF29 AE29 AD29 AC29 AG28 AF28 AE28 AH22
AJ21 AH21
AJ20 AH20 AH19
AH15 AH14
AG14 AF14 AE14
AF13 AE13 AF12 AE12 AD12
B30 A30
Y41 V41
L41
F21 E21
B26
A38 B39
E19 F19
E20 F20
A28 B28
A23 B23 B25
P19 P16
P15
Y14
U7H
VCCSYNC VCC_TXLVDS0
VCC_TXLVDS1 VCC_TXLVDS2
VCC3G0 VCC3G1 VCC3G2 VCC3G3 VCC3G4 VCC3G5 VCC3G6 VCCA_3GPLL VCCA_3GBG VSSA_3GBG
VCCA_CRTDAC0 VCCA_CRTDAC1 VSSA_CRTDAC
VCCA_DPLLA VCCA_DPLLB VCCA_HPLL
VCCA_LVDS VSSA_LVDS
VCCA_MPLL VCCA_TVBG
VSSA_TVBG
VCCA_TVDACA0 VCCA_TVDACA1 VCCA_TVDACB0 VCCA_TVDACB1 VCCA_TVDACC0 VCCA_TVDACC1
VCCD_HMPLL0 VCCD_HMPLL1
VCCD_LVDS0 VCCD_LVDS1 VCCD_LVDS2
VCCD_TVDAC VCC_HV0
VCC_HV1 VCC_HV2
VCCD_QTVDAC VCCAUX0
VCCAUX1 VCCAUX2 VCCAUX3 VCCAUX4 VCCAUX5 VCCAUX6 VCCAUX7 VCCAUX8 VCCAUX9 VCCAUX10 VCCAUX11 VCCAUX12 VCCAUX13 VCCAUX14 VCCAUX15 VCCAUX16 VCCAUX17 VCCAUX18 VCCAUX19 VCCAUX20 VCCAUX21 VCCAUX22 VCCAUX23 VCCAUX24 VCCAUX25 VCCAUX26 VCCAUX27 VCCAUX28 VCCAUX29 VCCAUX30 VCCAUX31 VCCAUX32 VCCAUX33 VCCAUX34 VCCAUX35 VCCAUX36 VCCAUX37 VCCAUX38 VCCAUX39 VCCAUX40
2
POWER
Calistoga
2
1
VTT_0 VTT_1 VTT_2 VTT_3 VTT_4 VTT_5 VTT_6 VTT_7 VTT_8
VTT_9 VTT_10 VTT_11 VTT_12 VTT_13 VTT_14 VTT_15 VTT_16 VTT_17 VTT_18 VTT_19 VTT_20 VTT_21 VTT_22 VTT_23 VTT_24 VTT_25 VTT_26 VTT_27 VTT_28 VTT_29 VTT_30 VTT_31 VTT_32 VTT_33 VTT_34 VTT_35 VTT_36 VTT_37 VTT_38 VTT_39 VTT_40 VTT_41 VTT_42 VTT_43 VTT_44 VTT_45 VTT_46 VTT_47 VTT_48 VTT_49 VTT_50 VTT_51 VTT_52 VTT_53 VTT_54 VTT_55 VTT_56 VTT_57 VTT_58 VTT_59 VTT_60 VTT_61 VTT_62 VTT_63 VTT_64 VTT_65 VTT_66 VTT_67 VTT_68 VTT_69 VTT_70 VTT_71 VTT_72 VTT_73 VTT_74 VTT_75 VTT_76
AC14 AB14 W14 V14 T14 R14 P14 N14 M14 L14 AD13 AC13 AB13 AA13 Y13 W13 V13 U13 T13 R13 N13 M13 L13 AB12 AA12 Y12 W12 V12 U12 T12 R12 P12 N12 M12 L12 R11 P11 N11 M11 R10 P10 N10 M10 P9 N9 M9 R8 P8 N8 M8 P7 N7 M7 R6 P6 M6 A6 R5 P5 N5 M5 P4 N4 M4 R3 P3 N3 M3 R2 P2 M2 D2 AB1 R1 P1 N1 M1
+1.05V_VCCP
+1.05V_VCCP
12
C346
2.2U_6.3V
Place in Cavity.
+1.05V_VCCP
C78
330U_2.5V
+
Place on the edge.
Place close to pin A6
VTTLF_CAP3
VTTLF_CAP2 VTTLF_CAP1
C73 .47U_10V
Place close to pin D2
1 2
12
C86 .47U_10V
12
C358
4.7U
12
C82 .22U
12
C75 .22U
Place close to pin AB1
QUANTA
Title
Size Document Number Rev
Custom
Date: Sheet
Calistoga (Power)
DM5 1A
星期二
27, 2005
十二月
1
of
959,
Page 10
5
U7I
AC41
VSS_0
AA41
VSS_1
W41
VSS_2
T41
VSS_3
P41
VSS_4
M41
VSS_5
J41
VSS_6
F41
VSS_7
AV40
VSS_8
AP40
VSS_9
AN40
VSS_10
D D
C C
B B
A A
AK40
AJ40 AH40 AG40 AF40 AE40
AY39
AW39
AV39 AR39 AN39
AJ39 AC39 AB39 AA39
W39
M39
G39 D39
AT38
AM38
AH38 AG38 AF38 AE38
C38 AK37 AH37 AB37 AA37
Y37
W37
V37
R37
P37
N37
M37
H37
G37
D37 AY36
AW36
AN36 AH36 AG36 AF36 AE36 AC36
C36
B36 BA35 AV35 AR35 AH35 AB35 AA35
Y35
W35
V35
R35
P35
N35
M35
H35
G35
D35 AN34
B40
Y39 V39
T39 R39 P39 N39
L39 J39 H39
F39
T37
L37 J37
F37
T35
L35 J35
F35
VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50 VSS_51 VSS_52 VSS_53 VSS_54 VSS_55 VSS_56 VSS_57 VSS_58 VSS_59 VSS_60 VSS_61 VSS_62 VSS_63 VSS_64 VSS_65 VSS_66 VSS_67 VSS_68 VSS_69 VSS_70 VSS_71 VSS_72 VSS_73 VSS_74 VSS_75 VSS_76 VSS_77 VSS_78 VSS_79 VSS_80 VSS_81 VSS_82 VSS_83 VSS_84 VSS_85 VSS_86 VSS_87 VSS_88 VSS_89 VSS_90 VSS_91 VSS_92 VSS_93 VSS_94 VSS_95 VSS_96
Calistoga
VSS
4
AK34
VSS_97
AG34
VSS_98
AF34
VSS_99
AE34
VSS_100
AC34
VSS_101
C34
VSS_102
AW33
VSS_103
AV33
VSS_104
AR33
VSS_105
AE33
VSS_106
AB33
VSS_107
Y33
VSS_108
V33
VSS_109
T33
VSS_110
R33
VSS_111
M33
VSS_112
H33
VSS_113
G33
VSS_114
F33
VSS_115
D33
VSS_116
B33
VSS_117
AH32
VSS_118
AG32
VSS_119
AF32
VSS_120
AE32
VSS_121
AC32
VSS_122
AB32
VSS_123
G32
VSS_124
B32
VSS_125
AY31
VSS_126
AV31
VSS_127
AN31
VSS_128
AJ31
VSS_129
AG31
VSS_130
AB31
VSS_131
Y31
VSS_132
AB30
VSS_133
E30
VSS_134
AT29
VSS_135
AN29
VSS_136
AB29
VSS_137
T29
VSS_138
N29
VSS_139
K29
VSS_140
G29
VSS_141
E29
VSS_142
C29
VSS_143
B29
VSS_144
A29
VSS_145
BA28
VSS_146
AW28
VSS_147
AU28
VSS_148
AP28
VSS_149
AM28
VSS_150
AD28
VSS_151
AC28
VSS_152
W28
VSS_153
J28
VSS_154
E28
VSS_155
AP27
VSS_156
AM27
VSS_157
AK27
VSS_158
J27
VSS_159
G27
VSS_160
F27
VSS_161
C27
VSS_162
B27
VSS_163
AN26
VSS_164
M26
VSS_165
K26
VSS_166
F26
VSS_167
D26
VSS_168
AK25
VSS_169
P25
VSS_170
K25
VSS_171
H25
VSS_172
E25
VSS_173
D25
VSS_174
A25
VSS_175
BA24
VSS_176
AU24
VSS_177
AL24
VSS_178
AW23
VSS_179
3
U7J
AT23
VSS_180
AN23
VSS_181
AM23
VSS_182
AH23
VSS_183
AC23
VSS_184
W23
VSS_185
K23
VSS_186
J23
VSS_187
F23
VSS_188
C23
VSS_189
AA22
VSS_190
K22
VSS_191
G22
VSS_192
F22
VSS_193
E22
VSS_194
D22
VSS_195
A22
VSS_196
BA21
VSS_197
AV21
VSS_198
AR21
VSS_199
AN21
VSS_200
AL21
VSS_201
AB21
VSS_202
Y21
VSS_203
P21
VSS_204
K21
VSS_205
J21
VSS_206
H21
VSS_207
C21
VSS_208
AW20
VSS_209
AR20
VSS_210
AM20
VSS_211
AA20
VSS_212
K20
VSS_213
B20
VSS_214
A20
VSS_215
AN19
VSS_216
AC19
VSS_217
W19
VSS_218
K19
VSS_219
G19
VSS_220
C19
VSS_221
AH18
VSS_222
P18
VSS_223
H18
VSS_224
D18
VSS_225
A18
VSS_226
AY17
VSS_227
AR17
VSS_228
AP17
VSS_229
AM17
VSS_230
AK17
VSS_231
AV16
VSS_232
AN16
VSS_233
AL16
VSS_234
J16
VSS_235
F16
VSS_236
C16
VSS_237
AN15
VSS_238
AM15
VSS_239
AK15
VSS_240
N15
VSS_241
M15
VSS_242
L15
VSS_243
B15
VSS_244
A15
VSS_245
BA14
VSS_246
AT14
VSS_247
AK14
VSS_248
AD14
VSS_249
AA14
VSS_250
U14
VSS_251
K14
VSS_252
H14
VSS_253
E14
VSS_254
AV13
VSS_255
AR13
VSS_256
AN13
VSS_257
AM13
VSS_258
AL13
VSS_259
AG13
VSS_260
P13
VSS_261
F13
VSS_262
D13
VSS_263
B13
VSS_264
AY12
VSS_265
AC12
VSS_266
K12
VSS_267
H12
VSS_268
E12
VSS_269
AD11
VSS_270
AA11
VSS_271
Y11
VSS_272
VSS
Calistoga
2
J11
VSS_273
D11
VSS_274
B11
VSS_275
AV10
VSS_276
AP10
VSS_277
AL10
VSS_278
AJ10
VSS_279
AG10
VSS_280
AC10
VSS_281
W10
VSS_282
U10
VSS_283
BA9
VSS_284
AW9
VSS_285
AR9
VSS_286
AH9
VSS_287
AB9
VSS_288
Y9
VSS_289
R9
VSS_290
G9
VSS_291
E9
VSS_292
A9
VSS_293
AG8
VSS_294
AD8
VSS_295
AA8
VSS_296
U8
VSS_297
K8
VSS_298
C8
VSS_299
BA7
VSS_300
AV7
VSS_301
AP7
VSS_302
AL7
VSS_303
AJ7
VSS_304
AH7
VSS_305
AF7
VSS_306
AC7
VSS_307
R7
VSS_308
G7
VSS_309
D7
VSS_310
AG6
VSS_311
AD6
VSS_312
AB6
VSS_313
Y6
VSS_314
U6
VSS_315
N6
VSS_316
K6
VSS_317
H6
VSS_318
B6
VSS_319
AV5
VSS_320
AF5
VSS_321
AD5
VSS_322
AY4
VSS_323
AR4
VSS_324
AP4
VSS_325
AL4
VSS_326
AJ4
VSS_327
Y4
VSS_328
U4
VSS_329
R4
VSS_330
J4
VSS_331
F4
VSS_332
C4
VSS_333
AY3
VSS_334
AW3
VSS_335
AV3
VSS_336
AL3
VSS_337
AH3
VSS_338
AG3
VSS_339
AF3
VSS_340
AD3
VSS_341
AC3
VSS_342
AA3
VSS_343
G3
VSS_344
AT2
VSS_345
AR2
VSS_346
AP2
VSS_347
AK2
VSS_348
AJ2
VSS_349
AD2
VSS_350
AB2
VSS_351
Y2
VSS_352
U2
VSS_353
T2
VSS_354
N2
VSS_355
J2
VSS_356
H2
VSS_357
F2
VSS_358
C2
VSS_359
AL1
VSS_360
1
QUANTA
Title
Size Document Number Rev
Custom
5
4
3
2
Date: Sheet
Calistoga (VSS,NCTF)
DM5 1A
星期二
27, 2005
十二月
1
of
10 59,
Page 11
1
32.768KHZ
12
C177
A A
Pop R1580 & no pop R1581 to disable internal VR.
B B
C C
R110 10M
12
W1
1 4 2 3
32.768KHZ
15P_50V
+RTC_CELL
SATA_TX0-21
SATA_TX0+21
Distance between the ICH-7 M and cap on the "P" signal should be identical distance between the ICH-6 M and cap on the "N" signal for same pair.
+3.3V_RUN
R439
1 2
0_0402
R416 1M
12
R415 332K/F
12
R403 *0_NC
C472 3900P_25V
C469 3900P_25V
IDE_IRQ
SATA_ACT#
12
12
R381 8.2K
R8 *10K_NC
X1,X2 Docking IAC_SYNC Port X Line
101X2,2X1
4X1
12
12
2
1 2
12
C532 1U_10V
SATA_C_TX0-
SATA_C_TX0+
R126
STUFF
UNSTUFF
ICH_RTCX2ICH_RTCX1
12
R417 20K
ICH_RTCRST# SM_INTRUDER# SM_INTVRMEN
R8 can be removed on RTS
C178
15P_50V
ICH_AZ_CODEC_SDIN034
ICH_AZ_MDC_SDIN126
SATA_ACT#33 SATA_RX0-21
SATA_RX0+21
CLK_PCIE_SATA#17
CLK_PCIE_SATA17
Place within 500mils of ICH6 ball
IDE_DIOR#21 IDE_DIOW#21
IDE_DDACK#21
IDE_IRQ21
IDE_DIORDY21
3
T54 PAD T55 PAD T49 PAD T50 PAD
T94 PAD T96 PAD T88 PAD
T89 PAD T95 PAD
T83 PAD T84 PAD T85 PAD
T52 PAD
R393 24.9/F
ICH_RTCX1 ICH_RTCX2
ICH_RTCRST# SM_INTRUDER#
SM_INTVRMEN
ACZ_BIT_CLK ACZ_SYNC
ACZ_RST#
ACZ_SDOUT
SATA_ACT# SATA_RX0-
SATA_RX0+ SATA_C_TX0­SATA_C_TX0+
SATABIAS
12
IDE_DIOR# IDE_DIOW# IDE_DDACK# IDE_IRQ IDE_DIORDY IDE_DDREQ
AB1 AB2
AA3
AF18
AF3 AE3 AG2 AH2
AF7 AE7 AG6 AH6
AF1 AE1
AH10 AG10
AF15
AH15
AF16 AH16 AG16 AE15
W4 W1
W3
U3 U5
V4 T5
U7 V6 V7
U1 R6
R5 T2
T3 T1
T4
U9A
RTXC1 RTCX2
RTCRST#
Y5
INTRUDER# INTVRMEN
EE_CS
Y1
EE_SHCLK
Y2
EE_DOUT EE_DIN
V3
LAN_CLK LAN_RSTSYNC LAN_RXD0
LAN_RXD1 LAN_RXD2
LAN_TXD0 LAN_TXD1 LAN_TXD2
ACZ_BIT_CLK ACZ_SYNC
ACZ_RST# ACZ_SDIN0
ACZ_SDIN1 ACZ_SDIN2
ACZ_SDOUT SATALED# SATA0RXN
SATA0RXP SATA0TXN SATA0TXP
SATA2RXN SATA2RXP SATA2TXN SATA2TXP
SATA_CLKN SATA_CLKP
SATARBIASN SATARBIASP
DIOR# DIOW# DDACK# IDEIRQ IORDY DDREQ
ICH7-M
4
LPCCPU
RTCLAN
AC-97/AZALIA
SATA
IDE
LAD0 LAD1 LAD2 LAD3
LDRQ0#
LDRQ1#/GPIO23
LFRAME# A20GATE
A20M#
CPUSLP#
TP1/DPRSTP#
TP2/DPSLP#
FERR#
GPIO49/CPUPWRGD
IGNNE#
INIT3_3V#
INIT# INTR
RCIN#
SMI#
STPCLK#
THERMTRIP#
DD10 DD11 DD12 DD13 DD14 DD15
DCS1# DCS3#
DD0 DD1 DD2 DD3 DD4 DD5 DD6 DD7 DD8 DD9
DA0 DA1 DA2
NMI
5
AA6 AB5 AC4 Y6
AC3 AA5
AB3 AE22
AH28 AG27 AF24
AH25 AG26 AG24
AG22 AG21 AF22 AF25
AG23 AH24
AF23 AH22 AF26
AB15 AE14 AG13 AF13 AD14 AC13 AD12 AC12 AE12 AF12 AB13 AC14 AF14 AH13 AH14 AC15
AH17 AE17 AF17
AE16 AD16
LPC_LDRQ0# LPC_LDRQ1#
SIO_A20GATE
R_CPUSLP#
THERMTRIP#_ICH
IDE_DD0 IDE_DD1 IDE_DD2 IDE_DD3 IDE_DD4 IDE_DD5 IDE_DD6 IDE_DD7 IDE_DD8
IDE_DD9 IDE_DD10 IDE_DD11 IDE_DD12 IDE_DD13 IDE_DD14 IDE_DD15
IDE_DA0 IDE_DA1 IDE_DA2
IDE_DCS1# IDE_DCS3#
LPC_LAD0 27,28 LPC_LAD1 27,28 LPC_LAD2 27,28 LPC_LAD3 27,28
LPC_LDRQ0# 28 LPC_LDRQ1# 28
LPC_LFRAME# 27,28 SIO_A20GATE 27
H_A20M# 3
R364 0
1 2
H_FERR# 3
H_PWRGOOD 3
H_IGNNE# 3
H_INIT# 3 H_INTR 3
SIO_RCIN# 27
H_NMI 3
H_STPCLK# 3
IDE_DD[0..15]
IDE_DA0 21 IDE_DA1 21 IDE_DA2 21
IDE_DCS1# 21 IDE_DCS3# 21IDE_DDREQ21
6
R97 *0_NC
1 2
1 2
R99 0
R99 & R366 can be removed on RTS
1 2
R366 0
IDE_DD[0..15] 21
7
H_CPUSLP# 3,5 H_DPRSTP# 3,45
H_DPSLP# 3
H_SMI# 3
H_FERR#
H_DPRSTP#
H_DPSLP#
SIO_A20GATE SIO_RCIN#
THERMTRIP#_ICH
R361 56
1 2
R365 *56_NC
1 2
R363 *56_NC
1 2
1 2
+1.05V_VCCP
8
+1.05V_VCCP
+1.05V_VCCP
+1.05V_VCCP
+3.3V_RUN
R372 10K
R96 56
1 2
C167 *0.1U_10V_NC
1 2
R369 10K
1 2
R411 33
ACZ_SYNC
D D
1
1 2
R412 33
1 2
R108 33
1 2
R109 33
1 2
*27P_50V_NC
12
12
C180
Place All Series Term close to ICH except for the SDIN input lines, which should be close to the source. All resister value should tuned during EA. Placement of R87,R88,R91,R92 should be Equal distance to the "T" split trace point as R89,R90,R93,R94. resp. Basically, keep the same distance from "T" for all seriess termination resistor.
2
ICH_AZ_MDC_SYNC 26
ICH_AZ_CODEC_SYNC 34
C179 *27P_50V_NC
ICH_AZ_MDC_BITCLK 26
ACZ_SDOUT
ACZ_RST#ACZ_BIT_CLK
3
R106 33
1 2
R111 33
1 2
R107 33
1 2
R112 33
1 2
ICH_AZ_MDC_SDOUT 26
ICH_AZ_CODEC_SDOUT 34
ICH_AZ_MDC_RST# 26
ICH_AZ_CODEC_RST# 34ICH_AZ_CODEC_BITCLK 34
Title
Size Document Number Rev
4
5
6
Date: Sheet
QUANTA COMPUTER
ICH7-M (CPU,IDE,SATA,LPC,AC97)
DM5 1A
星期二
27, 2005
十二月
7
of
11 59,
8
Page 12
1
A A
B B
OC2#
+3.3V_SUS
C C
PCI_AD[0..31]24,36
D D
PCI_PIRQB: for LOM PCI_PIRQD: for CardBus
1
RP20
6 7 8 9
10
10P8R-10K
PCI_PIRQB#36 PCI_PIRQD#24
T91 PAD T92 PAD T48 PAD T47 PAD T87 PAD
5 4 3 2 1
PCI_AD0 PCI_AD1
PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8 PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31
PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD#
MiniWLAN
ICH_EC_SPI_CLK27
ICH_EC_SPI_DO27 ICH_EC_SPI_DIN27
USB_OC5_6# USB_OC3_4#OC7#
OC1# OC0#
E18
C18
A16 F18 E16 A18 E17 A17 A15
C14
E14
D14
B12 C13 G15 G13
E12 C11 D11
A11
A10
F11
F10
E9
D9
B9 A8 A6
C7
B6 E6
D6
A3 B4
C5
B5
AE5 AD5
AG4
AH4 AD9
2
U9B
AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31
PIRQA# PIRQB# PIRQC# PIRQD#
RSVD[1] RSVD[2] RSVD[3] RSVD[4] RSVD[5]
ICH7-M
2
PCIE_RX2-23
PCIE_RX2+23
PCIE_TX2-23
PCIE_TX2+23
CT_1226: Change to Circle pad.
ICH_EC_SPI_CLK
SPI_CS#27,30
+3.3V_SUS
PCI
Interrupt I/F
MISC
SPI_CS#
ICH_EC_SPI_DO ICH_EC_SPI_DIN
REQ0# GNT0# REQ1# GNT1# REQ2# GNT2# REQ3#
GNT3# REQ4#/GPIO22 GNT4#/GPIO48
GPIO1/REQ5#
GPIO17/GNT5#
C/BE0# C/BE1# C/BE2# C/BE3#
IRDY#
PCIRST#
DEVSEL#
PERR#
PLOCK#
SERR#
STOP#
TRDY#
FRAME#
PLTRST#
PCICLK
PME#
GPIO2/PIRQE# GPIO3/PIRQF# GPIO4/PIRQG# GPIO5/PIRQH#
RSVD[6] RSVD[7] RSVD[8] RSVD[9]
MCH_SYNC#
PAR
3
1 2
C169 0.1U_10V
+3.3V_SUS
12
R394 10K
USB_OC3_4#33 USB_OC5_6#33
PCI_REQ0#
D7
PCI_GNT0#
E7
PCI_REQ1#PCI_AD2
C16
PCI_GNT1#
D16
PCI_REQ2#
C17
PCI_GNT2#
D17
PCI_REQ3#
E13
PCI_GNT3#
F13
PCI_REQ4#
A13
PCI_GNT4#
A14
PCI_REQ5#
C8
PCI_GNT5#
D8 B15
C12 D12 C15
A7 E10
PCI_RST#_G
B18 A12 C9 E11 B10 F15 F14 F16
C26
CLK_PCI_ICH
A9 B19
ICH_GPIO2_PIRQE#
G8
ICH_GPIO3_PIRQF#
F7
ICH_GPIO4_PIRQG#
F8
ICH_GPIO5_PIRQH#
G7
AE9 AG8 AH8 F21 AH20
3
1 2
C168 0.1U_10V
12
R404 10K
R331 NP boot from FWH, populate boot from MiniPCI.
PCI_PLTRST#
PCIE_TXN2_C PCIE_TXP2_C
CT_1223: added R470 damping r e sistor per CDC.
12
R413 10K
R414 47
1 2 1 2
R470 47
R402
47
1 2
OC0# OC1# OC2# OC3# OC4# OC5# OC6# OC7#
T90PAD
PCI_REQ1# 24 PCI_GNT1# 24
T80PAD
PCI_REQ3# 36 PCI_GNT3# 36
PCI_C_BE0# 24,36 PCI_C_BE1# 24,36 PCI_C_BE2# 24,36 PCI_C_BE3# 24,36
PCI_IRDY# 24,36 PCI_PAR 24,36
PCI_DEVSEL# 24,36 PCI_PERR# 24,36 PCI_PLOCK# PCI_SERR# 24,36 PCI_STOP# 24,36 PCI_TR D Y# 24,36 PCI_FRAME# 24,36
CLK_PCI_ICH 17 ICH_PME# 28
T86PAD
T46PAD
MCH_ICH_SYNC# 6
4
U9D
F26
PERn1
F25
PERp1
E28
PETn1
E27
PETp1
H26
PERn2
H25
PERp2
G28
PETn2
G27
PETp2
K26
PERn3
K25
PERp3
J28
PETn3
J27
PETp3
M26
PERn4
M25
PERp4
L28
PETn4
L27
PETp4
P26
PERn5
P25
PERp5
N28
PETn5
N27
PETp5
T25
PERn6
T24
PERp6
R28
PETn6
R27
PETp6
R2
SPI_CLK
P6
SPI_CS#
P1
SPI_ARB
P5
SPI_MOSI
P2
SPI_MISO
D3
OC0#
C4
OC1#
D5
OC2#
D4
OC3#
E5
OC4#
C3
OC5#/GPIO29
A2
OC6#/GPIO30
B3
OC7#/GPIO31
ICH7-M
Cardbus/1394
LOM(4401)
4
REQ0 : DOCKING REQ1 : Card Bus REQ4 : BroadCOM LAN
LPC 11 PCI SPI
R391 1K
1 2
DOCK Cardbus or
Cardbus/1394 1394/MediaCard
LOM(4401)
PCI-Express
SPI
R101 *1K_NC
1 2
DMI0RXN DMI0RXP DMI0TXN DMI0TXP
DMI1RXN DMI1RXP DMI1TXN DMI1TXP
DMI2RXN DMI2RXP DMI2TXN DMI2TXP
DMI3RXN DMI3RXP DMI3TXN DMI3TXP
DMI_CLKN DMI_CLKP
Direct Media Interface
DMI_ZCOMP
DMI_IRCOMP
USBP0N USBP0P USBP1N USBP1P USBP2N USBP2P USBP3N USBP3P USBP4N USBP4P USBP5N USBP5P
USB
USBP6N USBP6P USBP7N USBP7P
USBRBIAS#
USBRBIAS
No stuff No stuff
10
Stuff
01
PCI_GNT4# PCI_GNT5#
5
V26 V25 U28 U27
Y26 Y25 W28 W27
AB26 AB25 AA28 AA27
AD25 AD24 AC28 AC27
AE28 AE27
C25 D25
F1 F2 G4 G3 H1 H2 J4 J3 K1 K2 L4 L5 M1 M2 N4 N3
D2 D1
DMI_COMP
USBRBIAS
Place within 500mils of ICH-7
GNT4#GNT5#
No stuff Stuff No stuff
CLK_PCI_ICH
*8.2P_16V_NC
Place AC Term near pin U3.A9. Final Value needs to be tuned if required for EMI
REQ0
REQ1
REQ2
REQ3
5
GNT0
GNT1
GNT2
GNT3
PIRQA
PIRQD PIRQC
PIRQD PIRQB
CLK_PCIE_ICH# 17
CLK_PCIE_ICH 17
USBP0- 24 USBP0+ 24 USBP1- 28 USBP1+ 28 USBP2- 21 USBP2+ 21 USBP3- 33 USBP3+ 33 USBP4- 33 USBP4+ 33 USBP5- 33 USBP5+ 33 USBP6- 33 USBP6+ 33 USBP7- 39 USBP7+ 39
R410 22.6/F
R398
*10_NC
C515
6
DMI_MTX_IRX_N0 6 DMI_MTX_IRX_P0 6
DMI_MRX_ITX_N0 6
DMI_MRX_ITX_P0 6
DMI_MTX_IRX_N1 6 DMI_MTX_IRX_P1 6
DMI_MRX_ITX_N1 6
DMI_MRX_ITX_P1 6
DMI_MTX_IRX_N2 6 DMI_MTX_IRX_P2 6
DMI_MRX_ITX_N2 6
DMI_MRX_ITX_P2 6 DMI_MTX_IRX_N3 6
DMI_MTX_IRX_P3 6
DMI_MRX_ITX_N3 6
DMI_MRX_ITX_P3 6
R358 24.9/F
12
12
1 2
1 2
6
Place within 500mils of ICH-7
+1.5V_RUN
Cardbus
ECE_USB[0]
FDD
Ext Side Top
Ext Side Bottom
Ext Back Top
Ext Back Bottom
For Dock
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
C475
1 2
0.047U_10V
PCI_RST#_G
C465
1 2
0.047U_10V
PCI_PLTRST#
Title
Size Document Number Rev
Date: Sheet
7
PCI Pullups
RP18
PCI_DEVSEL# ICH_GPIO2_PIRQE#
PCI_SERR# PCI_REQ4# PCI_REQ5#
PCI_TRDY# PCI_STOP# PCI_FRAME# PCI_REQ1# PCI_REQ2#
PCI_PIRQA# PCI_PIRQB# PCI_PIRQD# PCI_IRDY# ICH_GP IO5_ PIR Q H#
+3.3V_SUS
5
U26
2 1
7SH32
+3.3V_SUS
5
U24
2 1
7SH32
6 7 8 9
10
10P8R-8.2K
RP17
6 7 8 9
10
10P8R-8.2K
RP19
6 7 8 9
10
10P8R-8.2K
Add Buffers as needed for Loading and fanout concerns.
4
4
PCI_RST# 24,36
PLTRST# 6,13,18,23,27,28
+3.3V_RUN
5 4
PCI_PERR#
3 2
ICH_GPIO4_PIRQG#
1
+3.3V_RUN
5
PCI_PLOCK#
4
PCI_REQ3#
3 2 1
+3.3V_RUN
5
PCI_PIRQC#
4
ICH_GPIO3_PIRQF#
3 2 1
8
PCI_REQ0#
QUANTA COMPUTER
ICH7-M (USB,DMI,PCIE,PCI)
DM5 1A
星期二
27, 2005
十二月
7
of
12 59,
8
Page 13
1
+3.3V_RUN
A A
B B
R378
8.2K
1 2
CLKRUN#
12
R380 *10_NC
Option to " Disable " clkrun. Pulling it down will keep the clks running.
+3.3V_SUS
R374
680
1 2
ICH_PCIE_WAKE#
2
R360 10K
R357 10K
SPKR34
BT_RADIO_DIS#31
ICH_PCIE_WAKE#28
SIO_EXT_WAKE#27
SIO_EXT_SMI#27
ICH_SMLINK0
ICH_SMLINK1
ICH_SMBCLK17,23
ICH_SMBDATA17,23
ITP_DBRESET#3,27 PM_BMBUSY#6
H_STP_PCI#17
H_STP_CPU#17
LCD_TST19
IDE_RST_MOD21
IRQ_SERIRQ24,27,28
SIO_THRM#27
IMVP_PWRGD40,45
LAMP_STAT#19
T43 PAD
CLKRUN#24,27,28,36
T53 PAD
3
1 2
1 2
LINKALERT# ICH_SMLINK0 ICH_SMLINK1
ICH_RI#
ITP_DBRESET#
SMBALERT#
GL_BL_SUSPEND
SIO_THRM# IMVP_PWRGD
1 2
LAMP_STAT# SIO_EXT_SMI#
R452 0
+3.3V_SUS
U9C
C22
SMBCLK
B22
SMBDATA
A26
LINKALERT#
B25
SMLINK0
A25
SMLINK1
A28
RI#
A19
SPKR
A27
SUS_STAT#
A22
SYS_RST#
AB18
GPIO0/BM_BUSY#
B23
GPIO11/SMBALERT#
AC20
GPIO18/STPPCI#
AF21
GPIO20/STPCPU#
A21
GPIO26
B21
GPIO27
E23
GPIO28
AG18
GPIO32/CLKRUN#
AC19
GPIO33/AZ_DOCK_EN#
U2
GPIO34/AZ_DOCK_RST#
F20
WAKE#
AH21
SERIRQ
AF20
THRM#
AD22
VRMPWRGD
AC21
GPIO6
AC18
GPIO7
E21
GPIO8
ICH7-M
4
SMB
SYS
GPIO
GPIO21/SATA0GP GPIO19/SATA1GP GPIO36/SATA2GP
SATA
GPIO
GPIO37/SATA3GP
Clocks
GPIO16/DPRSLPVR
TP0/BATLOW#
GPIO
Power MGT
R95 *10K_NC
1 2
CLK14 CLK48
SUSCLK
SLP_S3# SLP_S4# SLP_S5#
PWROK
PWRBTN#
LAN_RST#
RSMRST#
GPIO9 GPIO10 GPIO12 GPIO13 GPIO14 GPIO15 GPIO24 GPIO25 GPIO35 GPIO38 GPIO39
SIO_EXT_WAKE#
AF19 AH18 AH19 AE19
AC1 B2
C20 B24
D23 F22
AA4 AC22 C21 C23
C19 Y4 E20
A20 F19 E19 R4 E22 R3 D20 AD21 AD20 AE20
5
CLK_ICH_48M SUS_CLK
ICH_PWRGD
ICH_BATLOW#
SUSPWROK SIO_EXT_SCI#
PLTRST_DELAY#
+3.3V_RUN
R379
1 2
8.2K
6
CLK_ICH_14M 17 CLK_ICH_48M 17
T44PAD
SIO_SLP_S3# 27
T76PAD
SIO_SLP_S5# 27
ICH_PWRGD 6,40
SIO_PWRBTN# 27
PLTRST# 6,12,18,23,27,28 SUSPWROK 32,40 SIO_EXT_SCI# 27
T45PAD
USB_IDE# 21 RSVD_HDD_DET# 21
T102PAD
T103PAD
T93PAD
T79PAD
SATA_CLKREQ# 17
T78PAD
WWAN_RADIO_DIS#
DPRSLPVR 6,45
12
R371 100K
CT_1212: Removed HDDC_EN# and MODC_EN# from ICH7 GPIO14 & 15. Removed R463, R464 100Kohm.
7
Place these close to ICH7.
CLK_ICH_48M
CLK_ICH_14M
12
R105 *10_NC
12
C175 *4.7P_50V_NC
12
R418 *10_NC
12
C543 *4.7P_50V_NC
8
R375 *8.2K_NC
+3.3V_RUN
No Stuff since EC is push-pull.
+3.3V_RUN
RP46
ICH_BATLOW#
ICH_RI#
SIO_EXT_SMI# SMBALERT#
SIO_EXT_SCI#
12
12
R373
10K
+3.3V_RUN
+3.3V_SUS
+3.3V_SUS
+3.3V_SUS
R370 8.2K
1 2
R352 8.2K
1 2
RP16
7 8 5 6 3 4 1 2
8P4R-10K
R446 2.2K
R447 2.2K
C C
D D
12
ICH_SMBDATA
ICH_SMBCLK
BT_RADIO _ D IS #
RSVD_HDD_DET#
LAMP_STAT# IRQ_SERIRQ WWAN_RADIO_DIS#LINKALERT#
R449 *10K_NC
1 2
7 8 5 6 3 4 1 2
8P4R-10K
1 2
SIO_THRM#
R406 10K
1 2 1 2
R405 10K
ICH_PWRGD SUSPWROK
QUANTA
Title
Size Document Number Rev
1
2
3
4
5
6
Date: Sheet
ICH7-M( PM,GPIO,S M B )
DM5 1A
星期二
27, 2005
十二月
7
of
13 59,
8
Page 14
1
2
3
4
5
6
7
8
C27 D10 D13 D18 D21 D24
G14 G18 G21 G24 G25 G26
H24 H27 H28
M12 M13 M14 M15 M16 M17 M24 M27 M28
N11 N12 N13 N14 N15 N16 N17 N18 N24 N25 N26
U9E
A4
VSS[1]
A23
VSS[2]
B1
VSS[3]
B8
VSS[4]
B11
VSS[5]
B14
VSS[6]
B17
VSS[7]
B20
VSS[8]
B26
VSS[9]
B28
VSS[10]
C2
VSS[11]
C6
VSS[12] VSS[13] VSS[14] VSS[15] VSS[16] VSS[17] VSS[18]
E1
VSS[19]
E2
VSS[20]
E4
VSS[21]
E8
VSS[22]
E15
VSS[23]
F3
VSS[24]
F4
VSS[25]
F5
VSS[26]
F12
VSS[27]
F27
VSS[28]
F28
VSS[29]
G1
VSS[30]
G2
VSS[31]
G5
VSS[32]
G6
VSS[33]
G9
VSS[34] VSS[35] VSS[36] VSS[37] VSS[38] VSS[39] VSS[40]
H3
VSS[41]
H4
VSS[42]
H5
VSS[43] VSS[44] VSS[45] VSS[46]
J1
VSS[47]
J2
VSS[48]
J5
VSS[49]
J24
VSS[50]
J25
VSS[51]
J26
VSS[52]
K24
VSS[53]
K27
VSS[54]
K28
VSS[55]
L13
VSS[56]
L15
VSS[57]
L24
VSS[58]
L25
VSS[59]
L26
VSS[60]
M3
VSS[61]
M4
VSS[62]
M5
VSS[63] VSS[64] VSS[65] VSS[66] VSS[67] VSS[68] VSS[69] VSS[70] VSS[71] VSS[72]
N1
VSS[73]
N2
VSS[74]
N5
VSS[75]
N6
VSS[76] VSS[77] VSS[78] VSS[79] VSS[80] VSS[81] VSS[82] VSS[83] VSS[84] VSS[85] VSS[86] VSS[87]
P3
VSS[88]
P4
VSS[89]
P12
VSS[90]
P13
VSS[91]
P14
VSS[92]
P15
VSS[93]
P16
VSS[94]
P17
VSS[95]
P24
VSS[96]
P27
VSS[97]
ICH7-M
VSS[98]
VSS[99] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158] VSS[159] VSS[160] VSS[161] VSS[162] VSS[163] VSS[164] VSS[165] VSS[166] VSS[167] VSS[168] VSS[169] VSS[170] VSS[171] VSS[172] VSS[173] VSS[174] VSS[175] VSS[176] VSS[177] VSS[178] VSS[179] VSS[180] VSS[181] VSS[182] VSS[183] VSS[184] VSS[185] VSS[186] VSS[187] VSS[188] VSS[189] VSS[190] VSS[191] VSS[192] VSS[193] VSS[194]
P28 R1 R11 R12 R13 R14 R15 R16 R17 R18 T6 T12 T13 T14 T15 T16 T17 U4 U12 U13 U14 U15 U16 U17 U24 U25 U26 V2 V13 V15 V24 V27 V28 W6 W24 W25 W26 Y3 Y24 Y27 Y28 AA1 AA24 AA25 AA26 AB4 AB6 AB11 AB14 AB16 AB19 AB21 AB24 AB27 AB28 AC2 AC5 AC9 AC11 AD1 AD3 AD4 AD7 AD8 AD11 AD15 AD19 AD23 AE2 AE4 AE8 AE11 AE13 AE18 AE21 AE24 AE25 AF2 AF4 AF8 AF11 AF27 AF28 AG1 AG3 AG7 AG11 AG14 AG17 AG20 AG25 AH1 AH3 AH7 AH12 AH23 AH27
R100 100
+5V_RUN
+3.3V_RUN
A A
+5V_SUS
+3.3V_SUS
+1.5V_RUN
B B
1 2
D8
2 1
RB751V
R102 10
1 2
D9
2 1
RB751V
L22
1 2
BLM21PG600SN1D
ICH_V5REF_RUN
C503
0.1U_10V
1 2
ICH_V5REF_SUS
C518
0.1U_10V
1 2
+1.5VRUN_L
12
+
C164 220U_4V
C170
0.1U_10V
1 2
C163
0.1U_10V
1 2
C166
0.1U_10V
1 2
+3.3V_RUN
C462
0.1U_10V
1 2
+1.5V_RUN
R98
1 2
12
R104
0.5/F
C C
12
L24 10uH_100MA
12
C176 10U_6.3V
0.5/F
L23 BLM11A601S
1 2
+3.3V_RUN
C530
0.1U_10V
1 2
C171
0.01U_25V
1 2
+1.5V_DMIPLL
12
C172 10U_6.3V
C498
0.1U_10V
1 2
+1.5V_RUN
+1.5V_RUN
+1_5V_SATA_RX
C512
0.1U_10V
1 2
VCCSATPLL
+1_5V_SATA_TX
12
C513 1U_10V
+3.3V_SUS
+1.5V_RUN
C508
0.1U_10V
1 2
D D
C542
0.1U_10V
1 2
T51 PAD T81 PAD
TP_VCCSUSLAN1 TP_VCCSUSLAN2
U9F
G10
V5REF[1]
AD17
V5REF[2]
F6
V5REF_Sus
AA22
Vcc1_5_B[1]
AA23
Vcc1_5_B[2]
AB22
Vcc1_5_B[3]
AB23
Vcc1_5_B[4]
AC23
Vcc1_5_B[5]
AC24
Vcc1_5_B[6]
AC25
Vcc1_5_B[7]
AC26
Vcc1_5_B[8]
AD26
Vcc1_5_B[9]
AD27
Vcc1_5_B[10]
AD28
Vcc1_5_B[11]
D26
Vcc1_5_B[12]
D27
Vcc1_5_B[13]
D28
Vcc1_5_B[14]
E24
Vcc1_5_B[15]
E25
Vcc1_5_B[16]
E26
Vcc1_5_B[17]
F23
Vcc1_5_B[18]
F24
Vcc1_5_B[19]
G22
Vcc1_5_B[20]
G23
Vcc1_5_B[21]
H22
Vcc1_5_B[22]
H23
Vcc1_5_B[23]
J22
Vcc1_5_B[24]
J23
Vcc1_5_B[25]
K22
Vcc1_5_B[26]
K23
Vcc1_5_B[27]
L22
Vcc1_5_B[28]
L23
Vcc1_5_B[29]
M22
Vcc1_5_B[30]
M23
Vcc1_5_B[31]
N22
Vcc1_5_B[32]
N23
Vcc1_5_B[33]
P22
Vcc1_5_B[34]
P23
Vcc1_5_B[35]
R22
Vcc1_5_B[36]
R23
Vcc1_5_B[37]
R24
Vcc1_5_B[38]
R25
Vcc1_5_B[39]
R26
Vcc1_5_B[40]
T22
Vcc1_5_B[41]
T23
Vcc1_5_B[42]
T26
Vcc1_5_B[43]
T27
Vcc1_5_B[44]
T28
Vcc1_5_B[45]
U22
Vcc1_5_B[46]
U23
Vcc1_5_B[47]
V22
Vcc1_5_B[48]
V23
Vcc1_5_B[49]
W22
Vcc1_5_B[50]
W23
Vcc1_5_B[51]
Y22
Vcc1_5_B[52]
Y23
Vcc1_5_B[53]
B27
Vcc3_3[1]
AG28
VccDMIPLL
AB7
Vcc1_5_A[1]
AC6
Vcc1_5_A[2]
AC7
Vcc1_5_A[3]
AD6
Vcc1_5_A[4]
AE6
Vcc1_5_A[5]
AF5
Vcc1_5_A[6]
AF6
Vcc1_5_A[7]
AG5
Vcc1_5_A[8]
AH5
Vcc1_5_A[9]
AD2
VccSATAPLL
AH11
Vcc3_3[2]
AB10
Vcc1_5_A[10]
AB9
Vcc1_5_A[11]
AC10
Vcc1_5_A[12]
AD10
Vcc1_5_A[13]
AE10
Vcc1_5_A[14]
AF10
Vcc1_5_A[15]
AF9
Vcc1_5_A[16]
AG9
Vcc1_5_A[17]
AH9
Vcc1_5_A[18]
E3
VccSus3_3[19]
C1
VccUSBPLL
AA2
VccSus1_05/VccLAN1_05[1]
Y7
VccSus1_05/VccLAN1_05[2]
ICH7-M
Vcc1_05[1] Vcc1_05[2] Vcc1_05[3] Vcc1_05[4] Vcc1_05[5] Vcc1_05[6] Vcc1_05[7] Vcc1_05[8] Vcc1_05[9]
CORE
Vcc1_05[10] Vcc1_05[11] Vcc1_05[12] Vcc1_05[13] Vcc1_05[14] Vcc1_05[15] Vcc1_05[16] Vcc1_05[17] Vcc1_05[18] Vcc1_05[19] Vcc1_05[20]
VCC PAUX
VccSus3_3/VccLAN3_3[1] VccSus3_3/VccLAN3_3[2] VccSus3_3/VccLAN3_3[3] VccSus3_3/VccLAN3_3[4]
Vcc3_3/VccHDA
VccSus3_3/VccSusHDA
V_CPU_IO[1] V_CPU_IO[2]
VCCA3GP
V_CPU_IO[3]
Vcc3_3[3] Vcc3_3[4] Vcc3_3[5] Vcc3_3[6] Vcc3_3[7]
IDE
Vcc3_3[8]
Vcc3_3[9] Vcc3_3[10] Vcc3_3[11]
Vcc3_3[12] Vcc3_3[13] Vcc3_3[14] Vcc3_3[15] Vcc3_3[16]
PCI
Vcc3_3[17] Vcc3_3[18] Vcc3_3[19] Vcc3_3[20] Vcc3_3[21]
VccRTC VccSus3_3[1] VccSus3_3[2]
VccSus3_3[3] VccSus3_3[4] VccSus3_3[5] VccSus3_3[6]
VccSus3_3[7] VccSus3_3[8] VccSus3_3[9]
VccSus3_3[10] VccSus3_3[11] VccSus3_3[12]
USB
VccSus3_3[13] VccSus3_3[14] VccSus3_3[15] VccSus3_3[16] VccSus3_3[17] VccSus3_3[18]
Vcc1_5_A[19] Vcc1_5_A[20]
Vcc1_5_A[21]
ATXARX
Vcc1_5_A[22] Vcc1_5_A[23]
Vcc1_5_A[24] Vcc1_5_A[25]
VccSus1_05[1] VccSus1_05[2]
VccSus1_05[3]
Vcc1_5_A[26] Vcc1_5_A[27] Vcc1_5_A[28] Vcc1_5_A[29] Vcc1_5_A[30]
USB CORE
L11 L12 L14 L16 L17 L18 M11 M18 P11 P18 T11 T18 U11 U18 V11 V12 V14 V16 V17 V18
V5 V1 W2 W7
U6 R7 AE23
AE26 AH26
AA7 AB12 AB20 AC16 AD13 AD18 AG12 AG15 AG19
A5 B13 B16 B7 C10 D15 F9 G11 G12 G16
W5 P7 A24
C24 D19 D22 G19
K3 K4 K5 K6 L1 L2 L3 L6 L7 M6 M7 N7
AB17 AC17
T7 F17 G17
AB8 AC8
K7 C28
G20 A1
H6 H7 J6 J7
C494
0.1U_10V
1 2
+3.3V_SUS
C522
0.1U_10V
1 2
TP_ICHVCCSUS1 TP_ICHVCCSUS2
TP_ICHVCCSUS3
+3_3V_IDE
C482
0.1U_10V
1 2
+3_3V_PCI
C491
0.1U_10V
1 2
C507
0.1U_10V
1 2
C473
0.1U_10V
1 2
C528
0.1U_10V
1 2
+1.5V_RUN
+1.5V_RUN +1.5V_RUN
C514
0.1U_10V
1 2
12
C488 1U_10V
C529
0.1U_10V
1 2
C517
0.1U_10V
1 2
C497
0.1U_10V
1 2
C506
0.1U_10V
1 2
C485
0.1U_10V
1 2
C511
0.1U_10V
1 2
T82PAD T42PAD
T77PAD
C538 *0.1U_10V_NC
1 2
12
+
C165 330U_2.5V
+3.3V_SUS
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+RTC_CELL
+3.3V_SUS
+3.3V_SUS
C499
0.1U_10V
1 2
+1.5V_RUN
+1.05V_VCCP
C467
0.1U_10V
1 2
+1.5V_RUN
C470
0.1U_10V
1 2
12
C463
4.7U_10V_0805
+1.05V_VCCP
QUANTA
Title
Size Document Number Rev
1
2
3
4
5
6
Date: Sheet
ICH7-M (POWER&GND)
DM5 1A
星期二
27, 2005
十二月
7
of
14 59,
8
Page 15
1
+1.8V_SUS +1.8V_SUS
STD(BOT)
DDR_A_D0
A A
B B
DDR_CKE0_DIMMA6,16 DDR_CKE2_DIMMB6,16 DDR_CKE3_DIMMB 6,16
DDR_A_BS27,16
DDR_A_BS07,16
DDR_A_WE#7,16
DDR_A_CAS#7,16
DDR_CS1_DIMMA#6,16
M_ODT16,16
C C
D D
+3.3V_RUN
DDR_A_D1
DDR_A_DQS#0 DDR_A_DQS0
DDR_A_D2 DDR_A_D3
DDR_A_D8 DDR_A_D9
DDR_A_DQS#1 DDR_A_DQS1
DDR_A_D10 DDR_B_D14 DDR_A_D11
DDR_A_D16 DDR_A_D17
DDR_A_DQS#2 DDR_A_DQS2
DDR_A_D18 DDR_A_D19
DDR_A_D24 DDR_A_D25
DDR_A_DM3
DDR_A_D26 DDR_A_D27
DDR_A_BS2 DDR_A_MA12
DDR_A_MA9 DDR_A_MA8
DDR_A_MA5 DDR_A_MA3 DDR_A_MA1
DDR_A_MA10 DDR_A_BS0 DDR_A_WE#
DDR_A_CAS#
M_ODT1 DDR_A_D32
DDR_A_D33 DDR_A_DQS#4
DDR_A_DQS4 DDR_A_D34
DDR_A_D35 DDR_A_D40
DDR_A_D41 DDR_A_DM5 DDR_A_D42
DDR_A_D43 DDR_A_D48
DDR_A_D49
DDR_A_DQS#6 DDR_A_DQS6
DDR_A_D50 DDR_A_D51 DDR_A_D55
DDR_A_D56 DDR_A_D57
DDR_A_DM7 DDR_A_D58
DDR_A_D59
CLK_SDATA CLK_SCLK
V_DDR_MCH_REF
SMbus address A0
1
2
CT_1227: Change JDIM2 part number
JDIM2
1
VREF
3
VSS47
5
DQ0
7
DQ1
9
VSS37
11
DQS#0
13
DQS0
15
VSS48
17
DQ2
19
DQ3
21
VSS38
23
DQ8
25
DQ9
27
VSS49
29
DQS#1
31
DQS1
33
VSS39
35
DQ10
37
DQ11
39
VSS50
41
VSS18
43
DQ16
45
DQ17
47
VSS1
49
DQS#2
51
DQS2
53
VSS19
55
DQ18
57
DQ19
59
VSS22
61
DQ24
63
DQ25
65
VSS23
67
DM3
69
NC4
71
VSS9
73
DQ26
75
DQ27
77
VSS4
79
CKE0
81
VDD7
83
NC1
85
A16_BA2
87
VDD9
89
A12
91
A9
93
A8
95
VDD5
97
A5
99
A3
101
A1
103
VDD10
105
A10/AP
107
BA0
109
WE#
111
VDD2
113
CAS#
115
S1#
117
VDD3
119
ODT1
121
VSS11
123
DQ32
125
DQ33
127
VSS26
129
DQS#4
131
DQS4
133
VSS2
135
DQ34
137
DQ35
139
VSS27
141
DQ40
143
DQ41
145
VSS29
147
DM5
149
VSS51
151
DQ42
153
DQ43
155
VSS40
157
DQ48
159
DQ49
161
VSS52
163
NCTEST
165
VSS30
167
DQS#6
169
DQS6
171
VSS31
173
DQ50
175
DQ51
177
VSS33
179
DQ56
181
DQ57
183
VSS3
185
DM7
187
VSS34
189
DQ58
191
DQ59
193
VSS14
195
SDA
197
SCL
199
VDD(SPD)
FOX_AS0A426-M2SN-7F
CLOCK 0,1
2
3
2
VSS46
4
DQ4
6
DQ5
8
VSS15
10
DM0
12
VSS5
14
DQ6
16
DQ7
18
VSS16
20
DQ12
22
DQ13
24
VSS17
26
DM1
28
VSS53
30
CK0
32
CK0#
34
VSS41
36
DQ14
38
DQ15
40
VSS54
42
VSS20
44
DQ20
46
DQ21
48
VSS6
50
NC3
52
DM2
54
VSS21
56
DQ22
58
DQ23
60
VSS24
62
DQ28
64
DQ29
66
VSS25
68
DQS#3
70
DQS3
72
VSS10
74
DQ30
76
DQ31
78
VSS8
80
CKE1
82
VDD8
84
A15
86
A14
88
VDD11
90
SO-DIMM (200P)
PC4800 DDR2 SDRAM
A11
92
A7
94
A6
96
VDD4
98
A4
100
A2
102
A0
104
VDD12
106
BA1
108
RAS#
110
S0#
112
VDD1
114
ODT0
116
A13
118
VDD6
120
NC2
122
VSS12
124
DQ36
126
DQ37
128
VSS28
130
DM4
132
VSS42
134
DQ38
136
DQ39
138
VSS55
140
DQ44
142
DQ45
144
VSS43
146
DQS#5
148
DQS5
150
VSS56
152
DQ46
154
DQ47
156
VSS44
158
DQ52
160
DQ53
162
VSS57
164
CK1
166
CK1#
168
VSS45
170
DM6
172
VSS32
174
DQ54
176
DQ55
178
VSS35
180
DQ60
182
DQ61
184
VSS7
186
DQS#7
188
DQS7
190
VSS36
192
DQ62
194
DQ63
196
VSS13
198
SA0
200
SA1
DDR_A_D4 DDR_A_D5
DDR_A_DM0 DDR_A_D6
DDR_A_D7 DDR_A_D12
DDR_A_D13 DDR_A_DM1
DDR_A_D14 DDR_A_D15
DDR_A_D20 DDR_A_D21
PM_EXTTS#0_R DDR_A_DM2
DDR_A_D22 DDR_A_D23
DDR_A_D28 DDR_A_D29
DDR_A_DQS#3 DDR_A_DQS3
DDR_A_D30 DDR_A_D31
DDR_A_MA11 DDR_A_MA7 DDR_A_MA6
DDR_A_MA4 DDR_A_MA2 DDR_A_MA0
DDR_A_BS1 DDR_A_RAS#
M_ODT0
DDR_A_MA13
DDR_A_D36 DDR_A_D37
DDR_A_DM4 DDR_A_D38
DDR_A_D39 DDR_A_D44
DDR_A_D45 DDR_A_DQS#5
DDR_A_DQS5 DDR_A_D46
DDR_A_D47 DDR_A_D52
DDR_A_D53
DDR_A_DM6 DDR_A_D54
DDR_A_D60 DDR_A_D61
DDR_A_DQS#7 DDR_A_DQS7
DDR_A_D62 DDR_A_D63
R302 10K
1 2
DDR_CKE1_DIMMA 6,16
DDR_CS0_DIMMA# 6,16
R303 10K
1 2
3
M_CLK_DDR0 6 M_CLK_DDR#0 6
1 2
R304 0
DDR_A_BS1 7,16 DDR_A_RAS# 7,16
M_ODT0 6,16
M_CLK_DDR1 6 M_CLK_DDR#1 6
4
DDR_A_DM[0..7] 7 DDR_A_D[0..63] 7 DDR_A_DQS[0..7] 7 DDR_A_DQS#[0..7] 7 DDR_A_MA[0..13] 7,16
PM_EXTTS#0 6
DDR_B_BS27,16
DDR_B_BS07,16
DDR_B_WE#7,16
DDR_B_CAS#7,16
DDR_CS3_DIMMB#6,16
M_ODT36,16
CLK_SDATA17 CLK_SCLK17
+3.3V_RUN
4
DDR_B_D0 DDR_B_D1
DDR_B_DQS#0 DDR_B_DQS0
DDR_B_D2 DDR_B_D3
DDR_B_D8 DDR_B_D9
DDR_B_DQS#1 DDR_B_DQS1
DDR_B_D10 DDR_B_D11
DDR_B_D16 DDR_B_D17
DDR_B_DQS#2 DDR_B_DQS2
DDR_B_D18 DDR_B_D19
DDR_B_D24 DDR_B_D25
DDR_B_DM3
DDR_B_D26 DDR_B_D27
DDR_B_BS2
DDR_B_MA12
DDR_B_MA9 DDR_B_MA8
DDR_B_MA5 DDR_B_MA3 DDR_B_MA1
DDR_B_MA10
DDR_B_BS0
DDR_B_WE# DDR_B_CAS#
M_ODT3 DDR_B_D32
DDR_B_D33 DDR_B_DQS#4
DDR_B_DQS4 DDR_B_D34
DDR_B_D35 DDR_B_D40
DDR_B_D41 DDR_B_DM5 DDR_B_D42 DDR_B_D46
DDR_B_D43 DDR_B_D48
DDR_B_D49
DDR_B_DQS#6 DDR_B_DQS6
DDR_B_D50
DDR_B_D56 DDR_B_D57
DDR_B_DM7 DDR_B_D58
DDR_B_D59
CLK_SDATA CLK_SCLK
SMbus address A4
5
+1.8V_SUS +1.8V_SUS
RVS(TOP)
V_DDR_MCH_REF
JDIM1
1
VREF
3
VSS47
5
DQ0
7
DQ1
9
VSS37
11
DQS#0
13
DQS0
15
VSS48
17
DQ2
19
DQ3
21
VSS38
23
DQ8
25
DQ9
27
VSS49
29
DQS#1
31
DQS1
33
VSS39
35
DQ10
37
DQ11
39
VSS50
41
VSS18
43
DQ16
45
DQ17
47
VSS1
49
DQS#2
51
DQS2
53
VSS19
55
DQ18
57
DQ19
59
VSS22
61
DQ24
63
DQ25
65
VSS23
67
DM3
69
NC4
71
VSS9
73
DQ26
75
DQ27
77
VSS4
79
CKE0
81
VDD7
83
NC1
85
A16_BA2
87
VDD9
89
A12
91
A9
93
A8
95
VDD5
97
A5
99
A3
101
A1
103
VDD10
105
A10/AP
107
BA0
109
WE#
111
VDD2
113
CAS#
115
S1#
117
VDD3
119
ODT1
121
VSS11
123
DQ32
125
DQ33
127
VSS26
129
DQS#4
131
DQS4
133
VSS2
135
DQ34
137
DQ35
139
VSS27
141
DQ40
143
DQ41
145
VSS29
147
DM5
149
VSS51
151
DQ42
153
DQ43
155
VSS40
157
DQ48
159
DQ49
161
VSS52
163
NCTEST
165
VSS30
167
DQS#6
169
DQS6
171
VSS31
173
DQ50
175
DQ51
177
VSS33
179
DQ56
181
DQ57
183
VSS3
185
DM7
187
VSS34
189
DQ58
191
DQ59
193
VSS14
195
SDA
197
SCL
199
VDD(SPD)
TYC_1775804-2
2
VSS46
4
DQ4
6
DQ5
8
VSS15
10
DM0
12
VSS5
14
DQ6
16
DQ7
18
VSS16
20
DQ12
22
DQ13
24
VSS17
26
DM1
28
VSS53
30
CK0
32
CK0#
34
VSS41
36
DQ14
38
DQ15
40
VSS54
42
VSS20
44
DQ20
46
DQ21
48
VSS6
50
NC3
52
DM2
54
VSS21
56
DQ22
58
DQ23
60
VSS24
62
DQ28
64
DQ29
66
VSS25
68
DQS#3
70
DQS3
72
VSS10
74
DQ30
76
DQ31
78
VSS8
80
CKE1
82
VDD8
84
A15
86
A14
88
VDD11
90
SO-DIMM (200P)
PC4800 DDR2 SDRAM
A11
92
A7
94
A6
96
VDD4
98
A4
100
A2
102
A0
104
VDD12
106
BA1
108
RAS#
110
S0#
112
VDD1
114
ODT0
116
A13
118
VDD6
120
NC2
122
VSS12
124
DQ36
126
DQ37
128
VSS28
130
DM4
132
VSS42
134
DQ38
136
DQ39
138
VSS55
140
DQ44
142
DQ45
144
VSS43
146
DQS#5
148
DQS5
150
VSS56
152
DQ46
154
DQ47
156
VSS44
158
DQ52
160
DQ53
162
VSS57
164
CK1
166
CK1#
168
VSS45
170
DM6
172
VSS32
174
DQ54
176
DQ55
178
VSS35
180
DQ60
182
DQ61
184
VSS7
186
DQS#7
188
DQS7
190
VSS36
192
DQ62
194
DQ63
196
VSS13
198
SA0
200
SA1
CLOCK 2,3
CKE 2,3CKE 0,1
5
+3.3V_RUN
6
DDR_B_D4 DDR_B_D5
DDR_B_DM0 DDR_B_D6
DDR_B_D7 DDR_B_D12
DDR_B_D13 DDR_B_DM1
DDR_B_D15
DDR_B_D20 DDR_B_D21
PM_EXTTS#0_R DDR_B_DM2
DDR_B_D22 DDR_B_D23
DDR_B_D28 DDR_B_D29
DDR_B_DQS#3 DDR_B_DQS3
DDR_B_D30 DDR_B_D31
DDR_B_MA11 DDR_B_MA7 DDR_B_MA6
DDR_B_MA4 DDR_B_MA2 DDR_B_MA0
DDR_B_BS1 DDR_B_RAS#
M_ODT2 DDR_B_MA13
DDR_B_D36 DDR_B_D37
DDR_B_DM4 DDR_B_D38
DDR_B_D39 DDR_B_D44
DDR_B_D45 DDR_B_DQS#5
DDR_B_DQS5
DDR_B_D47 DDR_B_D52
DDR_B_D53
DDR_B_DM6 DDR_B_D54
DDR_B_D55DDR_B_D51 DDR_B_D60
DDR_B_D61 DDR_B_DQS#7
DDR_B_DQS7 DDR_B_D62
DDR_B_D63
R343 10K
1 2
6
R344 10K
1 2
DDR_B_DM[0..7] 7 DDR_B_D[0..63] 7 DDR_B_DQS[0..7] 7 DDR_B_DQS#[0..7] 7 DDR_B_MA[0..13] 7,16
M_CLK_DDR3 6 M_CLK_DDR#3 6
DDR_B_BS1 7,16 DDR_B_RAS# 7,16
DDR_CS2_DIMMB# 6,16
M_ODT2 6,16
M_CLK_DDR2 6 M_CLK_DDR#2 6
7
+1.8V_SUS
8
Place these Caps near So-Dimm1.
12
2.2U_6.3V
12
C449
2.2U_6.3V
C448
12
C423
2.2U_6.3V
12
C444
.1U_10V
12
2.2U_6.3V
12
C425
.1U_10V
C424
12
C450
2.2U_6.3V
12
2.2U_6.3V
12
C446 .1U_10V
C427
12
C445 .1U_10V
+3.3V_RUN
12
C447
2.2U_6.3V
+1.8V_SUS
Place these Caps near So-Dimm1.
12
C443 .1U_10V
V_DDR_MCH_REF
12
C451 .1U_10V
Place these Caps near So-Dimm1. No Vias Between the Trace of
PIN to CAP.
+1.8V_SUS
Place these Caps near So-Dimm2.
12
12
C139
2.2U_6.3V
12
C138 .1U_10V
12
C124
2.2U_6.3V
12
C140
2.2U_6.3V
12
C134 .1U_10V
12
C133 .1U_10V
+3.3V_RUN
C141
2.2U_6.3V
+1.8V_SUS
Place these Caps near So-Dimm2.
12
C142 .1U_10V
V_DDR_MCH_REF
12
C126 .1U_10V
12
2.2U_6.3V
12
C123
2.2U_6.3V
C130
12
C131
2.2U_6.3V
12
C125
.1U_10V
Place these Caps near So-Dimm2. No Vias Between the Trace of
PIN to CAP.
QUANTA
Title
Size Document Number Rev
Date: Sheet
System DRAM Expansion (200P-DDR_SODIMM X 2)
DM5 3A
星期二
27, 2005
十二月
7
of
15 59,
8
Page 16
1
2
3
4
5
6
7
8
DDRII DUAL CHANNEL A,B.
A A
+0.9V_DDR_VTT
12
C410
.1U_10V
DDRII A CHANNEL DDRII B CHANNEL
DDR_A_MA[0..13] 7,15 DDR_B_MA[0..13] 7,15
No Vias Between the Trace of PIN to CAP. No Vias Between the Trace of PIN to CAP.
12
C408
.1U_10V
12
C409
.1U_10V
12
C405
.1U_10V
12
C404
.1U_10V
12
C155
.1U_10V
12
C143
.1U_10V
12
C154
.1U_10V
12
C151
.1U_10V
12
C150
.1U_10V
12
C452
.1U_10V
12
C406
.1U_10V
12
C407
.1U_10V
+0.9V_DDR_VTT
12
C111
.1U_10V
12
C112
.1U_10V
12
C113
.1U_10V
12
C114
.1U_10V
12
C115
.1U_10V
12
C453
.1U_10V
12
C144
.1U_10V
12
C117
.1U_10V
12
C153
.1U_10V
12
C152
.1U_10V
12
C149
.1U_10V
12
C148
.1U_10V
12
C116
.1U_10V
Layout note: Place 1 cap close to every 1 R-pack terminated to +0.9V_DDR_VTT. Layout note: Place 1 cap close to every 1 R-pack terminated to +0.9V_DDR_VTT
DDR_A_MA7 DDR_A_MA11 DDR_A_MA4 DDR_A_MA6
DDR_A_RAS#7,15
B B
DDR_A_BS17,15
M_ODT06,15
DDR_A_BS27,15
DDR_A_BS07,15
DDR_A_WE#7,15
DDR_A_CAS#7,15
DDR_A_RAS# DDR_A_BS1
DDR_A_MA13 M_ODT0 DDR_A_BS2 DDR_A_MA12 DDR_A_MA9 DDR_A_MA8 DDR_A_MA5 DDR_A_MA3
DDR_A_MA10 DDR_A_BS0 DDR_A_WE# DDR_A_CAS# DDR_A_MA0 DDR_A_MA2
DDR_A_MA1
2 4 2 4 2 4
2 4 2 4 2 4 2 4
2 4 2 4 2 4
R347 56
1 2
1 3 1 3 1 3
1 3 1 3 1 3 1 3
1 3 1 3 1 3
RP28 4P2R-S-56 RP25 4P2R-S-56 RP27 4P2R-S-56
RP26 4P2R-S-56 RP44 4P2R-S-56 RP43 4P2R-S-56 RP42 4P2R-S-56
RP41 4P2R-S-56 RP40 4P2R-S-56 RP24 4P2R-S-56
+0.9V_DDR_VTT
+0.9V_DDR_VTT
+0.9V_DDR_VTT
+0.9V_DDR_VTT
DDR_B_RAS#7,15
DDR_B_BS17,15
DDR_B_BS07,15
DDR_B_WE#7,15
DDR_B_CAS#7,15
M_ODT26,15
DDR_B_BS27,15
DDR_B_RAS# DDR_B_BS1 DDR_B_MA12 DDR_B_MA9 DDR_B_MA8 DDR_B_MA5
DDR_B_MA3 DDR_B_MA1 DDR_B_MA10 DDR_B_BS0 DDR_B_WE# DDR_B_CAS# DDR_B_MA7 DDR_B_MA11
DDR_B_MA4 DDR_B_MA6 DDR_B_MA0 DDR_B_MA2 DDR_B_MA13 M_ODT2
DDR_B_BS2
2 4 2 4 2 4
2 4 2 4 2 4 2 4
2 4 2 4 2 4
R77 56
1 2
1 3 1 3 1 3
1 3 1 3 1 3 1 3
1 3 1 3 1 3
RP12 4P2R-S-56 RP8 4P2R-S-56 RP7 4P2R-S-56
RP6 4P2R-S-56 RP5 4P2R-S-56 RP4 4P2R-S-56 RP14 4P2R-S-56
RP10 4P2R-S-56 RP13 4P2R-S-56 RP11 4P2R-S-56
+0.9V_DDR_VTT
+0.9V_DDR_VTT
+0.9V_DDR_VTT
+0.9V_DDR_VTT
C C
DDR_CKE0_DIMMA6,15
DDR_CKE1_DIMMA6,15
DDR_CS0_DIMMA#6,15
DDR_CS1_DIMMA#6,15
D D
M_ODT1
DDR_CKE0_DIMMA
DDR_CKE1_DIMMA
DDR_CS0_DIMMA#
DDR_CS1_DIMMA#
R345 56
1 2
R346 56
1 2
R299 56
1 2
R298 56
1 2
R348 56
1 2
+0.9V_DDR_VTT
+0.9V_DDR_VTT
M_ODT36,15M_ODT16,15
DDR_CKE2_DIMMB6,15
DDR_CKE3_DIMMB6,15
DDR_CS2_DIMMB#6,15
DDR_CS3_DIMMB#6,15
M_ODT3
DDR_CKE2_DIMMB
DDR_CKE3_DIMMB
DDR_CS2_DIMMB#
DDR_CS3_DIMMB#
R75 56
1 2
R78 56
1 2
R88 56
1 2
R89 56
1 2
R76 56
1 2
+0.9V_DDR_VTT+0.9V_DDR_VTT
+0.9V_DDR_VTT
+0.9V_DDR_VTT
QUANTA
Title
Size Document Number Rev
1
2
3
4
5
6
Date: Sheet
DDR RES.ARRAY
DM5 1A
星期二
27, 2005
十二月
7
of
16 59,
8
Page 17
1
FSC FSB FSA CPU SRC PCI 1 0 1 100 100 33 0 0 1 133 100 33 0 1 1 166 100 33 0 1 0 200 100 33 0 0 0 266 100 33 1 0 0 333 100 33
A A
1 1 0 400 100 33 1 1 1 RSVD 100 33
+3.3V_RUN
R310 10K
1 2
FSA
R313 *10K_NC
1 2
B B
R278 15
L49
12
1 2
R277 15
1 2
+CK_VDD_MAIN
C430
0.1U_10V
R86 2.2
1 2
CK_VDD_MAIN2
C412
0.1U_10V
R301 2.2
1 2
R297 1R
1 2
CLK_PCI_SIO_127
CLK_PCI_SIO_228
120 ohms@100Mhz
L50
+3.3V_RUN
C C
1 2
BLM21PG600SN1D
C441
0.1U_10V
120 ohms@100Mhz
+3.3V_RUN
D D
BLM21PG600SN1D
C411
0.1U_10V
1
MCH_DREFCLK6 MCH_DREFCLK#6
DREF_SSCLK6
DREF_SSCLK#6
C435
0.1U_10V
12
CK_VDD_48
12
C428
0.047U_10V
CK_VDD_REF
2
533MHZ 667MHZ
CLK_ICH_48M13
CPU_MCH_BSEL03,6 CPU_MCH_BSEL13,6 CPU_MCH_BSEL23,6
CLK_PCI_PCCARD24
CK_VDD_A
C436
0.047U_10V
C416
0.1U_10V
2
Close to Clock GEN.
+3.3V_RUN
CLK_PCI_ICH12
CLK_PCI_DOCK39
CLK_PCI_LOM36
C439
0.1U_10V
C136
4.7U_6.3V
12
C413 10U_10V_0805
C422
4.7U_6.3V
12
C418
0.047U_10V
C415 27P_50V
12
C414 27P_50V
12
R314 33
R311 8.2K R287 8.2K
RP31
4
3
2
1
4P2R-S-33
C558
C442
0.1U_10V
0.1U_10V
+3.3V_RUN
PCI_LOM = FCTSEL1
FCTSEL1 (PIN34)
0=UMA
1 = Disc. GRFX down
3
12
Y3
14.318MHZ R289 0
CLK_ENABLE#45
H_STP_PCI#13
H_STP_CPU#13
Iref=5mA, Ioh=4*Iref
RP34
4 2
4P2R-S-33
R300 10K R295 33
R288 33 R281 33 R284 33
12
C440 10U_10V_0805
R283 *10K_NC
PCI_LOM
R282 10K
CLK_XTAL_IN
CLK_XTAL_OUT
SMbus address D2
CLK_SCLK
CLK_SDATA
FSA FSB FSC
R327 475/F
1 2
DOT96 DOT96#
DOT96_SSC
3
DOT96_SSC#
1
12
PCI_ICH
PCI_SIO PCI_PCCARD PCI_DOCK PCI_LOM
PIN43 PIN44 PIN47 PI N48
DOT96T DOT96C
27MSSout
27Mout
3
4
CK_VDD_48 CK_VDD_MAIN2
CK_VDD_A
U22
20
X1
19
X2
39
VTT_PWRGD# / PD
25
PCI_SRC_STOP#
24
CPU_STOP#
16
SMBCLK
17
SMBDAT
41
USB_48MHZ / FS_A
45
FS_B / TEST_MODE
23
REF0/FS_C / TEST_SEL
CLKIREF
9
IREF
43
DOT_96M/27M_NSS
44
DOT_96M#/27M_SS
47
LCD100_96M SS/SRC0
48
LCD100_96M# SS/SRC0#
37
PCICLK_F0 / ITP_EN
27
PCICLK1
32
PCICLK2
33
PCICLK3
34
PCICLK4/FCTSEL1
15
96/
96/
100M_T
100M_C
SRCT0 SRCC0
4
7
VDDA
GNDSRC68GNDSRC
GNDCPU
4
18
36
30
VDDPCI
VDDPCI
VDDREF
ICS954305
GND48
GNDPCI
GNDPCI
42
31
35
40
49
VDD48
VDDSRC54VDDSRC65VDDSRC1VDDCPU
VDDSRC_SS
SRC10# / CPU_ITP#
GNDREF
GNDA
THEM PAD
8
21
73
ICH_SMBDATA13,23
ICH_SMBCLK13,23
5
+CK_VDD_MAINCK_VDD_REF
12
SRC10 / CPU_ITP
REF1
CPUCLK0
CPUCLK0#
CPUCLK1
CPUCLK1#
SRC1
SRC1#
OE1# SRC2
SRC2#
OE2# SRC3
SRC3#
OE3# SRC4
SRC4#
OE4# SRC5
SRC5#
OE5# SRC6
SRC6#
OE6# SRC7
SRC7#
OE7# SRC8
SRC8#
OE8# SRC9
SRC9#
OE9#
ICS954305B
250mA ( MAX. )
22 14
13 11
10 6
5 50
51 46
52 53 26
55 56 28
58 59 57
60 61 29
63 64 62
66 67 38
70 69 71
3 2 72
MCH_BCLK MCH_BCLK#
CPU_BCLK CPU_BCLK#
CPU_ITP CPU_ITP#
PCIE_MINI1 PCIE_MINI1#
PCIE_ICH PCIE_ICH#
PCIE_SATA PCIE_SATA#
MCH_3GPLL MCH_3GPLL#
+3.3V_RUN
2
3 1
2N7002W-7-F
+3.3V_RUN
2
3 1
2N7002W-7-F
These are for backdrive issue
5
CLKREF
Q11
Q12
6
Place these termination to close CK410M.
R321 49.9/F
1 2
R325 49.9/F
1 2
R312 49.9/F
1 2
R315 49.9/F
1 2
R332 49.9/F
1 2
R333 49.9/F
1 2
RP30
3 1
4P2R-S-33 RP33
3 1
4P2R-S-33 RP35
3 1
4P2R-S-33
RP39
1 3
4P2R-S-33 RP38
1 3
4P2R-S-33 RP37
1 3
4P2R-S-33
RP36
3 1
4P2R-S-33
6
2
4
RP29 4P2R-2.2K
1
3
CLK_SDATA
4 2
4 2
4 2
2 4
2 4
2 4
4 2
CLK_SCLK
CLK_SDATA 15
CLK_SCLK 15
7
R286 18
1 2
R285 18
1 2
CLK_MCH_BCLK 5 CLK_MCH_BCLK# 5
CLK_CPU_BCLK 3 CLK_CPU_BCLK# 3
CLK_CPU_ITP 3 CLK_CPU_ITP# 3
CLK_PCIE_MINI1 23 CLK_PCIE_MINI1# 23
MINI1CLK_REQ# 23
CLK_PCIE_ICH 12 CLK_PCIE_ICH# 12
CLK_PCIE_SATA 11 CLK_PCIE_SATA# 11
SATA_CLKREQ# 13
CLK_MCH_3GPLL 6 CLK_MCH_3GPLL# 6
CLK_3GPLLREQ# 6
CLK_MCH_3GPLL CLK_MCH_3GPLL#
CLK_PCIE_SATA CLK_PCIE_SATA#
CLK_PCIE_ICH CLK_PCIE_ICH#
CLK_PCIE_MINI1 CLK_PCIE_MINI1#
MCH_DREFCLK
MCH_DREFCLK# DREF_SSCLK
DREF_SSCLK#
12
C402 *10P_NC
CLK_3GPLLREQ#
SATA_CLKREQ#
MINI1CLK_REQ#
R341 49.9/F R342 49.9/F
R336 49.9/F R335 49.9/F
R338 49.9/F R337 49.9/F
R340 49.9/F R339 49.9/F
R316 49.9/F R319 49.9/F
R323 49.9/F R326 49.9/F
12
C401 *10P_NC
R279 10K
1 2 1 2
1 2 1 2
1 2 1 2
1 2 1 2
1 2 1 2
1 2 1 2
8
CLK_SIO_14M 28
CLK_ICH_14M 13
+3.3V_RUN
R334 10K
R280 10K
Place these termination to close CK410M.
QUANTA
Title
Size Document Number Rev
Date: Sheet
CLOCK GENERATOR
DM5 1A
星期二
27, 2005
十二月
7
of
17 59,
8
Page 18
5
4
3
2
1
Placed this Bypass capacitor close to OVCC.
R145 4.7K
D D
C C
B B
+2.5V_RUN
+2.5V_RUN
+5V_RUN
+5V_RUN
1 2
1 2
R137 2.2K
R136 2.2K
+3.3V_RUN
+3.3V_RUN
+1.8V_RUN
+3.3V_RUN
R144 4.7K
SDVO_CTRLCLK
SDVO_CTRLDATA
12
12
BLM18PG181SN1
L13
1 2
BLM18PG181SN1
L34
1 2
BLM18PG181SN1
L12
1 2
BLM18PG181SN1
DVI_SDAT
DVI_SCLK
L14
1 2
12
C210
.1U_10V
12
12
12
C48 .1U_10V
C209 .1U_10V
C33 .1U_10V
12
C47
10U_10V_0805
12
12
12
C216 .1U_10V
DVI_SPVCC
12
C50 10U_10V_0805
DVI_PVCC1
DVI_VCC
C208 .1U_10V
DVI_PVCC2
C198 10U_10V_0805
+3.3V_RUN
12
C220 10U_10V_0805
A1 LOW: Address = 0x70 HIGH: Address = 0x72
+3.3V_RUN
PLTRST#6,12,13,23,27,28
SDVO_CTRLDATA6
SDVO_CTRLCLK6
DVI_SCLK39
DVI_SDAT39
12
C217 10U_10V_0805
DVI_CLK-39 DVI_CLK+39
DVI_TX0-39 DVI_TX0+39
DVI_TX1-39 DVI_TX1+39
DVI_TX2-39 DVI_TX2+39
R135 *1K_NC
1 2
12
C213 .1U_10V
SDVOB_RED+6 SDVOB_RED-6
SDVOB_GREEN+6 SDVOB_GREEN-6
SDVOB_BLUE+6 SDVOB_BLUE-6
SDVOB_CLK+6 SDVOB_CLK-6
R134 1K
1 2
+3.3V_RUN
1 2 3 4 5 6 7 8
9 10 11 12
SI1362A
40
46
44
38
41
47
42
48
45
39
43
SVCC2
SDVOB_G-
SDVOB_B+
SDVOB_G+
37
SGND1
SDVOB_R-
SDVOB_R+
SVCC1
EXT_RES
VCC3
SDVOB_INT-
SDVOB_INT+
GND2
HTPLG
VCC2 PGND2 PVCC2
EXT_SWING
24
TEST
U4
SPVCC
SGND2
SDVOB_B-
SDVOB_CLK­OVCC RESET# SPGND SDSDA SDSCL A1 GND1 SCLDDC SDADCC VCC1 PVCC1 AGND
SDVOB_CLK+
TXC-13TXC+14AVCC115TX0-16TX0+17AGND118TX1-19TX1+20AVCC221TX2-22TX2+23AGND2
CT_1227: Change U4 from 1362 to 1362A. Change R124~R127 from 110/F to 220/F ohm.
C214 .1U_10V
INT-
1 2
C211 .1U_10V
INT+
1 2
36
EXT_RES
35 34
INT-
33
INT+
32 31 30 29 28 27 26 25
R9
300_0402
1 2
12
R128 10K
EXT_RES
12
C43 .1U_10V
12
R16 1K
C26 .1U_10V
12
C227 .1U_10V
DVI_DETECT 39
12
12
C203 .1U_10V
DVI_SVCC
12
C230 10U_10V_0805
DVI_AVCC
12
C222 10U_10V_0805
SDVOB_INT- 6
SDVOB_INT+ 6
L35 BLM18PG181SN1
1 2
L30
1 2
BLM18PG181SN1
+1.8V_RUN
+3.3V_RUN
DVI_TX0+
R126 220/F
DVI_TX1+ DVI_TX2+ DVI_CLK+
A A
1 2
R125 220/F
1 2
R124 220/F
1 2
R127 220/F
1 2
Put these 4 Resistors and 4 Capacitors close to the TX pin of SDVO device
C201 .1U_10V
1 2
C200 .1U_10V
1 2
C199 .1U_10V
1 2
C202 .1U_10V
1 2
DVI_TX0­DVI_TX1­DVI_TX2­DVI_CLK-
QUANTA
Title
Size Document Number Rev
Custom
5
4
3
2
Date: Sheet
SIL 1362 DVI
DM5 3A
星期二
27, 2005
十二月
1
of
18 59,
Page 19
5
4
3
2
1
J2
44
Need to apply P/N for new J2 CONN.
D D
CT_1214: Changed R132 from 330K to 100K. Added R468 100K.
+3.3V_RUN +3.3V_ALW
ENVDD6
2
12
R25 *47K_NC
Q9
1 3
DTC124EUA
+15V_SUS LCDVCC+3.3V_RUN
R132 100K
1 2
12
R26 47K
LCDVCC_ON
31
2
Q18 2N7002W-7-F
C221 .01U
6 5 2 1
Q17 FDC653N_NL
4
3
1 2
1 2
R468 100K
R21
47_0805
2
1 2
31
2N7002W-7-F
12
C235
C239
.01U
22U
1 2
Q8
Panel Core Power
C C
Back Light Enable controller
FPBACK_EN28
PANEL_BKEN6
B B
12
R22 *0_NC
+3.3V_RUN
C257
1 2
.047U
5
U14
2 1
12
R24 100K
4
7SH08
MO7 inverte r: Pop R23,R22. Depop U14. DO5 inverte r: Pop U14, D epop R22,U32
+3.3V_RUN
R450 10K
BACKLITEON
12
R451
1 2
*0_NC
BIA_PWM 6,27
LCD CONN
44
43
43
42
42
41
41
40
40
39
39
38
38
37
37
36
36
35
35
34
34
33
33
32
32
31
31
30
30
29
29
28
28
27
27
26
26
25
25
24
24
23
23
22
22
21
21
20
20
19
19
18
18
17
17
16
16
15
15
14
14
13
13
12
12
11
11
10
10
9
9
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
JAE_FI-TD44SB-E-R750
+5V_ALW
1
2
+5V_ALW
1
2
D16
DA204U
D15
DA204U
LCD_BCLK­LCD_BCLK+
LCD_B2­LCD_B2+
LCD_B1­LCD_B1+
LCD_B0­LCD_B0+
LCD_ACLK­LCD_ACLK+
LCD_A2­LCD_A2+
LCD_A1­LCD_A1+
LCD_A0­LCD_A0+
LCD_DDCCLK LCD_DDCDAT
BACKLITEON
LAMP_D_STAT#
MO7 inverte r: Depop D14 DO5 inverter: Pop D14
SBAT_SMBCLK
3
SBAT_SMBDAT
3
LCD_BCLK- 6 LCD_BCLK+ 6
LCD_B2- 6 LCD_B2+ 6
LCD_B1- 6 LCD_B1+ 6
LCD_B0- 6 LCD_B0+ 6
LCD_ACLK- 6 LCD_ACLK+ 6
LCD_A2- 6 LCD_A2+ 6
LCD_A1- 6 LCD_A1+ 6
LCD_A0- 6 LCD_A0+ 6
LCD_DDCCLK 6 LCD_DDCDAT 6
+3.3V_RUN
LCDVCC
LCD_TST 13
+5V_ALW
D14RB751V
21
INV_PWR_SRC
12
C232
47P_50V
+PWR_SRC
Diode Terminator/ ESD Protector
Adress : A9H --Contrast AAH --Backlight
LCDVCC
I2C Bus
SBAT_SMBCLK 27,48
12
LAMP_STAT# 13
SBAT_SMBDAT 27,48
C237
47P_50V
40mil
C253
12
.1U_50V
R152
1 2
100K
INV_PWR_SRC_ON
12
R151 47K
INV_PWR_SRC_ON_R
31
2
Q20 2N7002W-7-F
12
12
C56
C55
.047U
.1U_10V
LCD_DDCCLK LCD_DDCDAT
4
3
RUN_O N 27,29,40,43,44,46,47
+3.3V_RUN +5V_ALW
12
C233
.1U_10V
+3.3V_RUN
R131
2.2K
1 2
6 5 2
1
Q19 FDC658P_NL
12
C236
.1U_50V
1 2
40mil
12
C223
.1U_50V
R129
2.2K
12
C224
.1U_50V
A A
QUANTA
Title
Size Document Number Rev
5
4
3
2
Date: Sheet
LCD CONN&CK-SSCD
DM5 1A
星期二
27, 2005
十二月
1
of
19 59,
Page 20
A
B
C
D
E
10K
JVGA_NC
+5V_RUN
21
D1
CH501H
C15 .01U
CRT_VCC
6
11
1 7
12
2 8
13
3 9
14
4 10 15
5
12
DS01A91-WL36
<VENDOR>
JVGA1
DOCK_DAT_DDC2 39
DOCK_CLK_DDC2 39
CRT
+3.3V_RUN
C194
*.1U_NC
C188
*.1U_NC
C191
*.1U_NC
1
D10
2
+3.3V_RUN
1
D13
2
+3.3V_RUN
1
D12
2
DA204U
DA204U
DA204U
3
3
3
JVGA_R
JVGA_G
JVGA_B
12
12
12
ESD Protector
Place ESD diodes near JVGA connetor < 200mils
+3.3V_SUS
RP1
4P2R-S-2.2K
JVGA_HS
JVGA_VS
12
C189 10P
4 1 5 2 7 3 6
R443
1 2
M_SEN#
JTV1
Place PI filter of RGB near JVGA connetor < 200mils
4 4
CRT_VCC
C5
12
.1U_10V
VGA_HSYNC6
3 3
VGA_VSYNC6
Level Shift
In addition to these 150 ohm terminations at the connector, 150 ohm terminations are also required at the Source. Route from source (GPU) at 50 ohm terget impedance.
2 2
74AHCT1G125GW
1
53
2 4
1
53
2 4
74AHCT1G125GW
TV_C6,39
TV_Y6,39
U2
U1
Place R4,R114 near U1,U2 < 200mils
VGA_RED6,39
VGA_GRN6,39
VGA_BLU6,39
1 2
R4 39
R3 1K
1 2
1 2
R114 39
TV_C
R5
150/F
TV_Y
R6
150/F
12
R2 75/F
RP2
4P2R-S-2.2K
C564 *22pF_NC
1 2
1 2
BLM18BD151SN1
12
C21 47P_50V
C565 *22pF_NC
1 2
1 2
BLM18BD151SN1
12
C22 47P_50V
12
R115 75/F
+3.3V_RUN
1
2
HSYNC 39
VSYNC 39
L9
L10
12
12
C186
C193
4.7P
4.7P
+3.3V_RUN +3.3V_RUN
3
4
2
Q1
2N7002W-7-F
31
Place PI filter of TV near JTV1 connetor < 200mils
12
C17 47P_50V
12
C18 47P_50V
12
R116 75/F
DAT_DDC26
CLK_DDC26
12
12
L26
1 2
BLM18BB470SN1D
L27
1 2
BLM18BB470SN1D
L29
1 2
BLM18BB470SN1D
12
C192
4.7P
2
Q2 2N7002W-7-F
31
12
C184 10P
12
C185 10P
TV_Y/G_L
TV_COMP_L TV_C/R_L
12
C1 *4.7P_NC
12
C16
*10P_NC
+3.3V_RUN
12
C2 *4.7P_NC
L28
1 2
BLM11A121S L25
1 2
BLM11A121S
12
C4
*10P_NC
1
2
D4 *DA204U_NC
JVGA_R
JVGA_G
JVGA_B
12
T56 PAD
C187 *4.7P_NC
CRT_VCC
1
3
2
4
12
C3 10P
Place L25,L28,C3, C189 near JVGA1 connetor < 200mils.
Place ESD diode near JTV1 connector < 200mils
3
SUYIN_35134A-06T1
C566 *22pF_NC
1 2
1 1
TV-OUT
A
TV_CVBS6,39
CLOSE TO JTV1
TV_CVBS
150/F
12
R7
1 2
BLM18BD151SN1
12
C23 47P_50V
B
L11
12
C19 47P_50V
+3.3V_RUN
1
2
C
3
D2 *DA204U_NC
3
D3 *DA204U_NC
+3.3V_RUN
1
2
QUANTA
Title
Size Document Number Rev
D
Date: Sheet
CRT&TV CONN
DM5 1A
星期二
27, 2005
十二月
E
of
20 59,
Page 21
1
Check SATA Footprint
A A
B B
CON2
2
1
GND1
2
RXP
3
RXN
4
GND2
TXN
TXP
GND3
3.3V
3.3V
3.3V GND GND GND
GND
RSVD
GND
12V 12V 12V
Serial ATA
+5V_HDD +3.3V_RUN
SATA_C_RX0-
5 6
SATA_C_RX0+
7
8 9 10 11 12 13 14
5V
15
5V
16
5V
17 18 19 20 21 22
C560 1000P_50V
12
C561
0.1U_10V
C477
C480
+3.3V_RUN
+5V_HDD
3900P_25V
12
3900P_25V
12
12
C562
0.1U_10V
3
SATA_TX0+ 11 SATA_TX0- 11
SATA_RX0- 11 SATA_RX0+ 11
C563 1000P_50V
4
IDE_DDREQ11 IDE_DIOW#11 IDE_DIOR#11 IDE_DIORDY11 IDE_DDACK#11 IDE_IRQ11 IDE_DA111 IDE_DA011 IDE_DCS1#11 IDE_DA211 IDE_DCS3#11
IDE_DD[0..15]11
+5V_MOD
IDE_DDREQ IDE_DIOW# IDE_DIOR# IDE_DIORDY IDE_DDACK# IDE_IRQ IDE_DA1 IDE_DA0 IDE_DCS1# IDE_DA2 IDE_DCS3#
IDE_DD[0..15]
5
R159 100K
+3.3V_RUN
6
JMOD1
1
1
3
3
5
5
7
7
9
R27 *0_NC
12
12
1 2
DASP#
IDE_DCS1#
PDIAG#
IDE_IRQ IDE_DDACK# IDE_DIORDY
IDE_DDREQ IDE_DD0 IDE_DD14 IDE_DD13
IDE_DD3 IDE_DD4 IDE_DD10 IDE_DD9
IDE_DD7
CSEL2
1 2
RSVD_HDD_DET#13
USBP2+12
USBP2-12
R167 4.7K
R166 470
9 111112 131314 151516
17
17
19
19
21
21 232324 252526 272728 292930 313132 333334 353536 373738 393940 414142 434344 454546 474748 494950 515152 535354 555556 575758 595960 616162 636364 656566 676768
JAE-WM1F068N1F-68P-RDV
7
2
2
4
4
6
6
8
8
10
10
12 14 16 18
18
20
20
22
22
24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68
INT_MOD_IN1#
INT_MOD_IN2#
USB_IDE#
4.7U_10V_0805
IDE_DCS3# IDE_DA2 IDE_DA0 IDE_DA1
CSEL2 IDE_DIOR# IDE_DIOW# IDE_DD15
IDE_DD1 IDE_DD2 IDE_DD12 IDE_DD11
IDE_DD5 IDE_DD6 IDE_DD8
R197 10K
1 2
R191 100K
1 2
C258
12
R189 56
1 2
USB_IDE# 13 MODPRES# 28
12
C259
0.1U_10V
+3.3V_RUN
+3.3V_RUN
8
+5V_MOD
12
C260
0.1U_10V
IDE_RST_MOD 13
SATA HDD CONN
+5V_RUN
C C
+5V_SUS
+3.3V_ALW
+15V_SUS
12
R466 100K
HDDC_EN#28
D D
R407 *100K_NC
2
Near CON2 Near CON2
+5V_HDD
R424
1 2
0_0805
Q42
*SI3456DV_NC
6 5 2 1
12
CT_1212: Added pull up R466 & R467 100K to HDDC_EN# & MODC_EN# per MO7 schematics.
+5V_HDD
4
3
Q41 *DTC144EUA_NC
1 3
12
C550 *4.7U_10V_0805_NC
12
C531 *0.01U_25V_NC
12
R423 *100K_NC
MEDIA BAY
+5V_SUS
1 2
+5V_SUS
+3.3V_ALW
R467 100K
MODC_EN#28
12
C276
12
1U_16V
+15V_SUS
R160 100K
2
8 7 6 5
Q21 SI4420DY
12
3 2 1
4
Q22 DTC144EUA
1 3
4.7U_10V_0805
R161
*0_0805_NC
+5V_MOD
C265
12
C275
0.01U_25V
+5V_MOD
12
12
R157 100K
12
C274
0.01U_25V
QUANTA
POWER SWITCH
1
2
3
4
5
6
Title
Size Document Number Rev
Date: Sheet
IDE (HDD&CD_ROM
DM5 1A
星期二
27, 2005
十二月
7
of
21 59,
8
Page 22
1
GND
1
GND
PV11
PAD197X98
1
PV7
PAD197X98
GND
1
PV1
PAD197X98
PAD197X98
GND
PV8
PV16
PAD197X98
PAD197X98
GND
1
A A
PV18
PV17
PV15
GND
1
PAD197X98
1
PV12
PAD197X98
PAD197X98
PAD197X98
B B
2
PV14
GND
1
PV10
*PAD197X98_NC
GND
1
CT_1226: Depop PV10 per mechancial request/EMI confir med
+3.3V_SUS +3.3V_SUS
C338
2200P
+3.3V_RUN + 3.3V_RUN
Stitching caps
3
C394
C356
12
12
2200P
2200P
C421
12
12
2200P
4
1
1
h-c315d126p2-4
4 2
h-c315d126p2-4
4 2
H1
H22
5
35
H15
2
1
35
h-c315d126p2-2
6
H21
1
1
1
3
h-c315d126p2-4
35
4 2
H16
h-c315d126p2-4
35
4 2
H18
h-c315d126p2-4
35
4 2
7
H20
2
1
1
h-c315d126p2-2
3
H17
H-C315D110P2-4
35
4 2
H13
1
H-C315I166D126P2
8
CT_1215: Change H17 from 3.2mm to 2.8mm.
GND
GND
1
1
PV5
GND
1
PV6
PAD138X98
GND
1
PAD138X98
C C
CPU SCREW HOLES
H6
H-C236D98I142BC276P2
1
CT_1215: Change H23 from H-OB189X31D189X31N to H-OB189X28D189X28N. Change H24 to a irregular shape hole per ME request.
D D
H23
1
H-OB189X28D189X28N
1
GND
1
PV9
PAD138X98
H-C236D98I142BC276P2
PV2
PAD138X98
GND
1
H9
1
H24
PV3
*PAD138X98_NC
GND
1
GND
1
H7
H-C236D98I142BC276P2
1
2
CT_1215: Change CPU screw holes (H6,H7,H9,H10) from 2.6mm to 2.5mm.
H10
H-C236D98I142BC276P2
CT_1215: Change H4 hole diameter
1
H5 H-TC276BC236D126P2
1
from 3.9mm to 4.3 per ME.
3
+5V_SUS +SBATT
12
C147
12
2200P
+PWR_SRC
4
1
C83
2200P
+PWR_SRC
Stitching caps for IDE traces referencing to SVCC
H4 H-C276D169P2
1
+3.3V_RUN
C174
12
2200P
+PWR_SRC
4 2
H3 H-TC256BC236D126P2
1
+3.3V_RUN +1.8V_SUS
C454
12
2200P
Stitching caps for PCI traces referencing to SVCC
H12
h-c236d110p2-4
35
5
12
+PWR_SRC
1
+3.3V_RUN
C156
C42
12
2200P
2200P
+PWR_SRC
H11
h-TC276BC236D110P2-4
35
4 2
+3.3V_RUN
C40
12
2200P
+5V_SUS+1.8V_SUS
6
1
+1.8V_SUS
C372
12
2200P
+1.5V_RUN
4 2
+1.5V_RUN
C277
12
2200P
+PWR_SRC
H19
h-c315d118p2-4
35
1
h-c354d126p2
4 2
1
4 2
H14
35
QUANTA
Title
Size Document Number R e v
Date: Sheet of
COMPUTER
SCREW PAD
DM5 3A
星期二
27, 2005
十二月
7
22 59,
H8
h-c236d126p2-4
35
8
Page 23
1
2
3
4
5
6
7
8
+3.3V_RUN
PCIE_WAKE#28
COEX2_WLAN_ACTIVE31
COEX1_BT_ACTIVE31
MINI1CLK_REQ#17
CLK_PCIE_MINI1#17
A A
CLK_PCIE_MINI117
HOST_DEBUG_RX27
8051TX27
PCIE_RX2-12 PCIE_RX2+12
PCIE_TX2-12 PCIE_TX2+12
R91 0
R90 0
PCI-Express TX and RX direct to connector
B B
J7
1
WAKE#
3
RESERVED_1
5
RESERVED_2
7
CLKREQ#
9
GND1
11
REFCLK-
13
REFCLK+
15
GND2
17
UIM_C8
19
UIM_C4
21
GND4
23
PERn0
25
PERp0
27
GND6
29
GND7
31
PETn0
33
PETp0
35
GND9
37
RESERVED_3
39
RESERVED_4
41
RESERVED_5
43
RESERVED_6
45
RESERVED_7
47
RESERVED_8
49
RESERVED_9
51
RESERVED_10
TYC_1775838-1
3.3V_1 GND0
1.5V_1
UIM_PWR
UIM_DATA
UIM_CLK
UIM_RESET
UIM_VPP
GND3
W_DISABLE#
PERST#
3.3VAUX1 GND5
1.5V_2
SMB_CLK
SMB_DATA
GND8
USB_D-
USB_D+
GND10
LED_WWAN#
LED_WLAN#
LED_WPAN#
1.5V_3 GND11
3.3V_2
+3.3V_RUN
2 4 6 8 10 12 14 16
18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52
+1.5V_RUN
+3.3V_LAN
ECE_USBP1­ECE_USBP1+
LED_WLAN_OUT
R93 *0_NC
J8
HOST_DEBUG_TX 27
PLTRST# 6,12,13,18,27,28
ICH_SMBCLK 13,17
ICH_SMBDATA 13,17
ECE_USBP1- 28 ECE_USBP1+ 28
8051RX 27 LED_WLAN_OUT 33 BT_ACTIVE 31,33
MiniCard_Nut
CT_1207: Added a note
Suport for WoW
prevents backdrive when WoW is enabled
D20
2 1
RB751V
R459
*0_NC
+3.3V_RUN
12
C160
0.1U_10V
+1.5V_RUN
12
C162
0.047U_10V
12
C161
0.047U_10V
12
C157
0.047U_10V
12
C146
0.1U_10V
12
C145
0.047U_10V
+3.3V_LAN
12
C159
0.1U_10V
WLAN_RADIO_DIS# 28
12
C459
4.7U_10V_0805
C C
D D
QUANTA
Title
Size Document Number Rev
1
2
3
4
5
6
Date: Sheet
MINI-PCI
DM5 1A
星期二
27, 2005
十二月
7
of
23 59,
8
Page 24
5
U17
PCI_AD[0..31]12,36
D D
R233 100
1 2
C C
B B
CLK_PCI_P CCARD17
PCI_AD17IDSEL
PCI_C_BE3#12,36 PCI_C_BE2#12,36 PCI_C_BE1#12,36 PCI_C_BE0#12,36
PCI_DEVSEL#12,36
PCI_FRAME#12,36
PCI_IRDY#12,36
PCI_PAR12,36
PCI_GNT1#12 PCI_REQ1#12 PCI_STOP#12,36 PCI_TRDY#12,36
PCI_RST#12,36
IRQ_SERIRQ13,27,28
SYS_PME#28,36
+3.3V_RUN
+OZ1.8V
+3.3V_RUN
Reserved for EMI
A A
+3.3V_RUN
12
C347
4.7U_10V
1 2
C366
0.1U_10V
CLK_PCI_P CCARD
CB_3.3VCCA
CLK_PCI_P CCARD
12
R234 *10_NC
12
C348 *4.7P_50V_NC
12
C379
0.1U_10V
PCI_AD31 PCI_AD30 PCI_AD29 PCI_AD28 PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23 PCI_AD22 PCI_AD21 PCI_AD20 PCI_AD19 PCI_AD18 PCI_AD17 PCI_AD16 PCI_AD15 PCI_AD14 PCI_AD13 PCI_AD12 PCI_AD11 PCI_AD10 PCI_AD9 PCI_AD8 PCI_AD7 PCI_AD6 PCI_AD5 PCI_AD4 PCI_AD3 PCI_AD2 PCI_AD1 PCI_AD0
IDSEL
EPSI
12
C385
0.1U_10V
19 20 21 22 23 24 25 27 29 30 31 32 34 35 36 37 47 48 49 50 51 52 53 54 57 58 59 60 61 62 63 64
28 38 46 55
42 39
40 44 45 18 17 43 41
11 97
65 68 73
16 82
26 56
33
108
AD31 AD30 AD29 AD28 AD27 AD26 AD25 AD24 AD23 AD22 AD21 AD20 AD19 AD18 AD17 AD16 AD15 AD14 AD13 AD12 AD11 AD10 AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0
C/BE3# C/BE2# C/BE1# C/BE0#
DEVSEL# FRAME#
9
IDSEL IRDY# PAR PCI_CLK PCI_GNT# PCI_REQ# STOP# TRDY#
5
PCI_RST#
8
EPSI
6
IRQSER
7
PME#
3.3VCC_0
3.3VCC_1
3.3VCCA_0
3.3VCCA_1
3.3VCCA_2
1.8VCC_0
1.8VCC_1 PCI_VCC_0
PCI_VCC_1 GND_0
GND_1
12
C349
0.1U_10V
OZ711EZ1 128 PIN LQFP
PCI HOST BUS (46)
MISCELLANEOUS (4)
POWER PLANE (11)
L43 BLM11A05S
C351
4.7U_10V
1 2
Place these caps near OZ711EZ1.
5
4
IEEE 1394 (8)
PC CARD SOCKET (32)
PC CARD INTERFACE (27)
CB_3.3VCCA
12
C370
0.1U_10V
4
12
C359
0.1U_10V
TPAP TPAN TPBP TPBN
TPBIAS
XO
CAD31 CAD30 CAD29 CAD28 CAD27 CAD26 CAD25 CAD24 CAD23 CAD22 CAD21 CAD20 CAD19 CAD18 CAD17 CAD16 CAD15 CAD14 CAD13 CAD12 CAD11 CAD10
CAD9 CAD8 CAD7 CAD6 CAD5 CAD4 CAD3 CAD2 CAD1 CAD0
CBLOCK#
CC/BE0# CC/BE1# CC/BE2# CC/BE3#
CCLK
CCLKRUN#
CDEVSEL#
CFRAME#
CGNT#
CINT#
CIRDY#
CPAR
CPERR#
CREQ#
CRST# CSERR# CSTOP# CTRDY#
RFU_A18
RFU_D2
RFU_D14
CSTSCHG
CD1# CD2#
VS1 VS2
OZ711EZ1TN
+OZ1.8V
C371
4.7U_10V
1 2
Please these parts nearOZ711EZ1.
R244 5.9K/F
1 2
72
R1
IEEE1394 OZTPA+
70
IEEE1394 OZTPA-
69
IEEE1394 OZTPB+
67
IEEE1394 OZTPB-
66
TPBIAS
71
PCCARD_XI
74
XI
PCCARD_XO
75
CBS_CAD31
3
CBS_CAD30
1
CBS_CAD29
128
CBS_CAD28
127
CBS_CAD27
126
CBS_CAD26
125
CBS_CAD25
124
CBS_CAD24
122
CBS_CAD23
120
CBS_CAD22
118
CBS_CAD21
116
CBS_CAD20
115
CBS_CAD19
114
CBS_CAD18
113
CBS_CAD17
112
CBS_CAD16
96
CBS_CAD15
94
CBS_CAD14
93
CBS_CAD13
92
CBS_CAD12
91
CBS_CAD11
90
CBS_CAD10
89
CBS_CAD9
88
CBS_CAD8
87
CBS_CAD7
84
CBS_CAD6
83
CBS_CAD5
81
CBS_CAD4
80
CBS_CAD3
79
CBS_CAD2
78
CBS_CAD1
77
CBS_CAD0
76
CBS_CBLOCK#
101
CBS_CC/BE0#
86
CBS_CC/BE1#
95
CBS_CC/BE2#
111
CBS_CC/BE3#
123 106
CBS_CCLK RUN#
4
CBS_CDEVSEL#
105
CBS_CFRAME#
110
CBS_CGNT#
102
CBS_CINT#
104
CBS_CIRDY#
109
CBS_CPAR
98
CBS_CPERR#
100
CBS_CREQ#
121
CBS_CRST#
117
CBS_CSERR#
119
CBS_CSTOP#
103
CBS_CTRDY#
107
CBS_R2_A18
99
CBS_R2_D2
2
CBS_R2_D14
85
CBS_CSTSCHG
13
CBS_CCD1#
10
CBS_CCD2#
14
CBS_CVS1#
12
CBS_CVS2#
15
12
C380
0.1U_10V
3
these 1394 signals are high speed differential pairs and must be kept equal length with a differential impedance (Zo) of 110 ohms.
IEEE1394 OZTPA+ 25 IEEE1394 OZTPA- 25 IEEE1394 OZTPB+ 25 IEEE1394 OZTPB- 25 TPBIAS
PCCARD_XI PCCARD_XO
IEEE1394 OZTPA+ IEEE1394 OZTPA- IEEE1394 OZTPB-
TPBIAS
PCCARD_XI
R264 10
1 2
+5V_RUN +3.3V_RUN
12
C399
0.1U_10V
+5V_RUN
+3.3V_RUN
+OZ1.8V
+CBS_VCC
TPBIAS
CBS_CCLK
C400
4.7U_10V
1 2
U18
15 16
17 18
19
4 5
20
12
C368 10P_50V
20 PIN SSOP
5V_0 5V_1
3.3V_0
3.3V_1
1.8VOUT VCC/VPP_0
VCC/VPP_1
GND
R243
56.2
1 2
12
C398
0.1U_10V
IEEE1394 OZTPB+
R245
56.2
1 2
12
C361 1U_10V
Y2
2 1
24.576MHZ
Place these caps near OZ2532.
1 2
EPSI
PCI_CLK
INTA#
CLKRUN#
PERR# SERR#
SKT_LED
RESET#
USB_A0 USB_B0 USB_A1 USB_B1
OZ2532L
R254 0
1 2
12
C382 10P_50V
Please these parts near OZ711EZ1.
C397
4.7U_10V
1 2 3 6 7 8 9 10
14 13 12 11
Power Switch (PCMCIA)
3
R239
56.2
1 2
R238
5.1K
1 2
PCCARD_XOPCCARD_XI
+CBS_VCC
Place these caps near connector.
R262 33
EPSI
12
CLK_PCI_P CCARD
CBS_CAD15 CBS_CAD13
2
R240
56.2
1 2 12
C357 820P_50V
PCCARD_XO
12
12
C384
0.1U_10V
PCI_PIRQD# 12 CLKRUN# 13,27,28,36 PCI_PERR# 12,36
PCI_SERR# 12,36
PCI_RST# 12,36
USBP0- 12 USBP0+ 12
2
C383
0.1U_10V
1
+CBS_VCC
CON1 PCI-1CA41501-T1-TH
CBS_CAD0 CBS_CAD1 CBS_CAD3 CBS_CAD5 CBS_CAD7 CBS_CC/BE0# CBS_CAD9 CBS_CAD11 CBS_CAD12 CBS_CAD14 CBS_CC/BE1# CBS_CPAR CBS_CPERR# CBS_CGNT# CBS_CINT#
CBS_CCLK CBS_CIRDY# CBS_CC/BE2# CBS_CAD18 CBS_CAD20 CBS_CAD21 CBS_CAD22 CBS_CAD23 CBS_CAD24 CBS_CAD25 CBS_CAD26 CBS_CAD27 CBS_CAD29 CBS_R2_D2 CBS_CCLK RUN#
CBS_CCD1# CBS_CAD2 CBS_CAD4 CBS_CAD6 CBS_R2_D14 CBS_CAD8 CBS_CAD10 CBS_CVS1# CBS_CAD13 CBS_CAD15 CBS_CAD16 CBS_R2_A18 CBS_CBLOCK# CBS_CSTOP# CBS_CDEVSEL#
CBS_CTRDY# CBS_CFRAME# CBS_CAD17 CBS_CAD19 CBS_CVS2# CBS_CRST# CBS_CSERR# CBS_CREQ# CBS_CC/BE3#
CBS_CSTSCHG CBS_CAD28 CBS_CAD30 CBS_CAD31 CBS_CCD2#
1
GND
2
D3-CAD0
3
D4-CAD1
4
D5-CAD3
5
D6-CAD5
6
D7-CAD7
7
CE1#-CC/BE0#
8
A10-CAD9
9
OE#-CAD11
10
A11-CAD12
11
A9-CAD14
12
A8-CC/BE1#
13
A13-CPAR
14
A14-CPERR#
15
WE/PGM-CGNT#
16
RDY/BSY-IRQ/CIN
17
VCC
18
VPP1
19
A16-CCLK
20
A15-CIRDY#
21
A12-CC/BE2#
22
A7-CAD18
23
A6-CAD20
24
A5-CAD21
25
A4-CAD22
26
A3-CAD23
27
A2-CAD24
28
A1-CAD25
29
A0-CAD26
30
D0-CAD27
31
D1-CAD29
32
D2-RFU
33
WP/IOIS16-CCLKR
34
GND
35
GND
36
CD1#-CCD1#
37
D11-CAD2
38
D12-CAD4
39
D13-CAD6
40
D14-RFU
41
D15-CAD8
42
CE2#-CAD10
43
VS1#/RFSH-CVS1
44
RSVD-CAD13
45
RSVD-CAD15
46
A17-CAD16
47
A18-RFU
48
A19-CBLOCK#
49
A20-CSTOP#
50
A21-CDEVSEL#
51
VCC
52
VPP2/VPP2
53
A22-CTRDY#
54
A23-CFRAME#
55
A24-CAD17
56
A25-CAD19
57
VS2#/RSVD-CVS2
58
RESET-CRST
59
WAIT#-CSERR#
60
RSVD-CREQ#
61
REG#-CC/BE3#
62
BVD2/SP-CAUDIO#
63
BVD1-STSCHG
64
D8-CAD28
65
D9-CAD30
66
D10-CAD31
67
CD2#-CCD2#
68
GND
GND GND GND GND
69 70 71 72
CardBus Slot
QUANTA
Title
Size Document Number R e v
Date: Sheet of
COMPUTER
PCCARD
DM5 1A
星期二
27, 2005
十二月
24 59,
1
Page 25
1
A A
2
3
4
5
6
7
8
IEEE1394 OZTPA+ IEEE1394 OZTPA­IEEE1394 OZTPB+ IEEE1394 OZTPB-
B B
C C
IEEE1394 OZTPA+24 IEEE1394 OZTPA-24 IEEE1394 OZTPB+24 IEEE1394 OZTPB-24
IEEE1394 OZTPA+
IEEE1394 OZTPA-
IEEE1394 OZTPB+
these 1394 signals are high speed differential pairs and must be kept equal length with a differential impedance (Zo) of 110 ohms.
R44 0
1 2
R42 0
1 2
R40 0
1 2
R37 0
1 2
EB2 *PLW3216S900SQ2T1_NC
3 4
34
12
3 4
34
12
EB1 *PLW3216S900SQ2T1_NC
OLTPA+ OLTPA­OLTPB+ OLTPB-
J3
OLTPA+
12
OLTPA­OLTPB+ OLTPB-IEEE1394 OZTPB-
12
4
A1+
3
A1-
2
B1+
1
B1-
TYCO_IEEE1394
1394A PORT
D D
QUANTA
Title
Size Document Number Rev
1
2
3
4
5
6
Date: Sheet
ExpressCard/SmartCard
JM6 1A
星期二
27, 2005
十二月
7
of
25 59,
8
Page 26
1
A A
2
3
4
5
6
7
8
J10
1
ICH_AZ_MDC_SDOUT11
ICH_AZ_MDC_SYNC11 ICH_AZ_MDC_SDIN111
JS2
B B
MDC_NUT
ICH_AZ_MDC_SDOUT ICH_AZ_MDC_SYNC
ICH_AZ_MDC_RST1#
+3.3V_SUS
12
C495
0.1U_10V
C173
4.7U_10V
1 2
1 2
R397 33
MDC_SDIN
GND1 IAC_SDATO3Reserved2
5
GND2
7 9
MDC
IAC_SYNC IAC_SDATAIN IAC_RESET#11IAC_BITCLK
New MDC
ICH_AZ_MDC_SDOUT
Reserved1
3.3V GND3 GND4
2 4 6 8 10 12
+3.3V_SUS
ICH_AZ_MDC_BITCLK
12
R392 *33_NC
12
C504 *10P_NC
12
R401 *33_NC
C521 *10P_NC
ICH_AZ_MDC_BITCLK 11
ICH_AZ_MDC_RST1#
Note: MDC DISABLE If paltform r eq uries MDC disable, populate this cirucit. If MDC disable isn't required, connect ICH_AZ_RST# directly to JMD connecotr.
Note: FDV301N Vgs(th) =1.5V(Max)
R399
12
*0_NC
R396
100K
1 2
Q13
1
FDV301N
3
+5V_SUS
2
ICH_AZ_MDC_RST#
R103 10K
1 2
MDC_RST_DIS#
ICH_AZ_MDC_RST# 11
MDC_RST_DIS# 28
MDC CONN.
C C
Keep the space 40mil between Tip/Ring.
DOCK_TIP39 DOCK_RING39
*300P_1808_3KV_NC
C207
CC1808
DOCK_TIP DOCK_RING
C206
*300P_1808_3KV_NC
CC1808
JMODEM1
1
1
2
2
3
3
4
4
5
5
53398-0590
TIP & RING To Docking and MDC CONN.
D D
QUANTA
Title
Size Document Number Rev
1
2
3
4
5
6
Date: Sheet
MDC CONN.
DM5 1A
星期二
27, 2005
十二月
7
of
26 59,
8
Page 27
1
+3.3V_ALW
R259 8.2K
1 2
1 2
1 2
A A
B B
C C
D D
12
+3.3V_SUS
+3.3V_ALW
+RTC_CELL
1 2
100K_0402
+3.3V_ALW
+3.3V_ALW
12
12
MAIN_PWR_SW#
1 2
1 2
R51 100K
R252
1 2
12
12
R237 100K
FWP#
R236 *100K_NC
POWER_SW#32,33
PBAT_SMBDAT
R260 8.2K
PBAT_SMBCLK
R246 2.2K
SBAT_SMBDAT
R248 2.2K
SBAT_SMBCLK
R445 100K
R250 100K
R257 *1K_NC
R258 1K
BAT_SEL#
VGA_IDENTIFY
1 = Discrete. 0 = UMA.
R209
10K
RP3
3 1
4P2R-S-10K
C376 *1U/10V/0603_NC
1 2
INSTANT_ON_SW#
SNIFFER_PWR_SW#
1 = Enabled. 0 = Disabled
SFPI_EN
12
4 2
Flash Recovery.
Low = Write Protected.
Flash Write Protect bottom 4K of internal bootblock flash.
R65 10K
ATF_INT#
CLK_SMB DAT_SMB
+RTC_CELL
12
R67 100K
Power Switch
1
+5V_ALW
CT_1223: added R471 0 ohm on SPI_CS# (SGPIO43) of 5004.
CT_1207: Change netname to SNIFFER_LED_OFF# per MO7_A06
+3.3V_RTC_LDO
12
R66
*100K_NC
C100
1U_10V
2
R63 8.2K
1 2
R64 8.2K
1 2
R256 10K
EC5004 RevC C95=22u EC5004 RevD C95=4.7u
1 2 12
2
DOCK_SMB_DAT
DOCK_SMB_CLK
DOCK_SMB_INT#
12
BREATH_LED33
T66 PAD T17 PAD T67 PAD
SIO_EXT_SMI#13 SIO_THRM#13
SIO_A20GATE11 DOCK_SMB_INT#39
PS_ID_DISABLE#48 CAP_LED#33 SCRL_LED#33 NUM_LED#33 SPI_CS#12,30 PS_ID48
PAD
T14 T13 PAD
LID_CL_SIO#33 DOCK_SMB_DAT39
DOCK_SMB_CLK39 PBAT_SMBDAT42,48 PBAT_SMBCLK42,48
AUX_EN37,46 SUS_ON4 0,46,47 RUN_ON19,29,40,43,44,46,47 ITP_DBRESET#3,13 SBAT_SMBDAT19,48 SBAT_SMBCLK19,48 DAT_SMB32 CLK_SMB32 SIO_RCIN#11 SIO_EXT_WAKE#13 SIO_SLP_S5#13 SIO_SLP_S3#13
FAN1_TACH32
PAD
T20
T19
PAD T15 PAD
8051RX23 8051TX23
CLK_TP_SIO31 DAT_TP_SIO31
ATF_INT#32 BIA_PWM6,19
HOST_DEBUG_TX23 HOST_DEBUG_RX23 RESET_OUT#40 BAT1_LED#33 BAT2_LED#33 RUNPWROK28,40,45
R458
1 2
ACAV_IN32,41,42
T18 PAD
ALWON46
PAD
T16
R251
1 2
10K
MEC5004_XTAL2
R253 0
1 2
32 kHz Clock.
FAN1_PWM FAN2_PWM FAN3_PWM
DEBUG_ENABLE# DOCK_SMB_INT#
SFPI_EN
R471 0
1 2
RUN_ON_D
VGA_IDENTIFY
DOCK_SMB_DAT DOCK_SMB_CLK PBAT_SMBDAT
ITP_DBRESET# SBAT_SMBDAT SBAT_SMBCLK
FAN2_TACH
SNIFFER_LED_OFF#
FREE_GPIO83 8051RX
8051TX
ATF_INT#
R235 *0_NC
1 2
HOST_DEBUG_TX HOST_DEBUG_RX
FWP#
0
C95 4.7U_6.3V
12
MAIN_PWR_SW# INSTANT_ON_SW#
SNIFFER_PWR_SW#
SNIFFER_RTC_GPO
MEC5004_XTAL1 MEC5004_XTAL2 MEC5004_XOSEL
12
C377 15P_50V
VR_CAP
1 4 2 3
3
45
OUT10/PWM0
46
OUT11/PWM1
47
OUT9/PWM2
48
OUT2/PWM3
11
OUT7/nSMI
50
OUT5/KBRST
67
SGPIO31/TIN1/SPCLK1
92
SGPIO34/A20M
1
SGPIO35
2
SGPIO36
3
SGPIO37
91
SGPIO40
90
SGPIO41
89
SGPIO42
4
SGPIO43
54
SGPIO44/MSCLK/SPCLK2
55
SGPIO45/MSDATA/SPDOUT2
69
SGPIO46/SPDIN1
68
SGPIO47/SPDOUT1
5
AB1A_DATA
6
AB1A_CLK
7
AB1B_DATA
8
AB1B_CLK
93
GPIO11/AB2A_DATA
94
GPIO12/AB2A_CLK
95
GPIO13/AB2B_DATA
96
GPIO14/AB2B_CLK
111
GPIO87/AB1C_DATA
112
GPIO86/AB1C_CLK
9
GPIO85/AB1D_DATA
10
GPIO84/AB1D_CLK
99
GPIO91/AB1E_DATA
100
GPIO90/AB1E_CLK
97
GPIO93/AB1F_DATA
98
GPIO92/AB1F_CLK
41
GPIO15/FAN_TACH1
42
GPIO16/FAN_TACH2
43
GPIO82/FAN_TACH3
117
GPIO83/32KHZ_OUT
81
GPIO20/PS2CLK/8051RX
82
GPIO21/PS2DAT/8051TX
75
GPIO94/IMCLK
76
GPIO95/IMDAT
52
GPIO96/TOUT1
73
GPIOA3/WINDMON
70
SYSOPT0/SGPIO32/LPC_TX
71
SYSOPT1/SGPIO33/LPC_RX
53
nRESET_OUT/OUT6
114
nBAT_LED
115
nPWR_LED
49
PWRGD
84
nFWP
72
TEST_PIN(NC)
22
VR_CAP
128
ACAV_IN
127
POWER_SW_IN0#
126
POWER_SW_IN1#
119
POWER_SW_IN2#
120
ALWAYS_ON#
118
BGPO0
122
XTAL1
124
XTAL2
123
XOSEL(GND)
W2
MEC5004_XTAL1
32.768KHZ
3
CLK_PCI_SIO_1
USIO1
Place close to pin 58.
MEC5004 EC-07 128 PIN VTQFP
SFR GPIO (13)
ACCESS BUS(4)
GPIO (22)
MISCELLANEOUS
POWER SWITCH (6)
CLOCK
MEC5004
+3.3V_ALW
JDEBUG1
12
C381
15P_50V
5 4 3 2 1
*53780_NC
4
(9)
R56
1 2
*10_NC
PCI POWER SIRQ
LPC BUS (6)
HOST /8051 SPI (8)
KEYBOARD /MOUSE (30)
BC
POWER PLANES (14)
C85
1 2
*22P_50V_NC
nEC_SCI/SPDIN2
HSTDATAIN
HSTDATAOUT
FLDATAOUT FLCS0/OUT1
FLCS1/OUT3
KSO0/GPIOC0 KSO1/GPIOC1 KSO2/GPIOC2 KSO3/GPIOC3
KSO4/GPIO0 KSO5/GPIO1 KSO6/GPIO2 KSO7/GPIO3
KSO8/GPIOC4
KSO9/GPIOC5 KSO10/GPIOC6 KSO11/GPIOC7
KSO12/OUT8
KSO13/GPIO18
KSO14/GPIO4 KSO15/GPIO5
KSO16/GPIOA0 KSO17/GPIOA1
KSI0/SGPIO30
KSI1/GPIO6 KSI2/GPIO7 KSI3/GPIO8
KSI4/GPIO9 KSI5/GPIO10 KSI6/GPIO17 KSI7/GPIO19
CLKRUN#
PCI_CLK
SER_IRQ
LAD0 LAD1 LAD2
LAD3 LFRAME# LRESET#
HSTCLK
FLCLK
FLDATAIN
EMCLK EMDAT
KCLK KDAT
BC_CLK BC_DAT
BC_INT
VCC0
VCC1_0 VCC1_1 VCC1_2 VCC1_3 VCC1_4
VSS_0 VSS_1 VSS_2 VSS_3 VSS_4
AGND
VCC_PLL
VSS_PLL
5
64 58 56 66
60 61 62 63 59 57
102 105 107
103 106 108
109 110
32 31 30 29
28 27 25 24
23 20 19 18
17 16 15 14
13 12
40 39
38 37 36 35 34 33
79 80 77 78
87 86 85
121 21
44 65 83 116
26 51 74 88 113
125 104 101
Make accessible without remoing board from chassis.
R60
R61
10K
10K
1 2
R59 0
1 2
1 2
8051RX 8051TX
DEBUG_ENABLE#
Debug Serial Port Flash Recovery Port.
4
5
CLK_PCI_SIO_1
BAT_SEL#
KSO0 KSO1 KSO2PBAT_SMBCLK KSO3
KSO4 KSO5 KSO6 KSO7
KSO8 KSO9 KSO10 KSO11
KSO12 KSO13 KSO14 KSO15
KSO16 KSO17
KSI0 KSI1
KSI2 KSI3 KSI4 KSI5 KSI6 KSI7
MEC5004_VCC0
Not Stuff 0 ohm when doing Flash recovery
+5V_RUN
PAD
7 8
+3.3V_ALW
RAGND
1 2
VCC_SIO_PLL
12
C353
0.1U_10V
JDEBUG2
*JDEBUG1_NC
2 1
T21
5 6
L48 BLM11A121S
3 2 1
6
CLKRUN# 13,24,28,36 CLK_PCI_SIO_1 17 IRQ_SERIRQ 13,24,28 SIO_EXT_SCI# 13
LPC_LAD0 11,28 LPC_LAD1 11,28 LPC_LAD2 11,28 LPC_LAD3 11,28 LPC_LFRAME# 11,28 PLTRST# 6 ,12 ,13,18,23,28
ICH_EC_SPI_CLK 12 ICH_EC_SPI_DIN 12 ICH_EC_SPI_DO 12
EC_FLASH_SPI_CLK 30 EC_FLASH_SPI_DIN 30 EC_FLASH_SPI_DO 30
SIO_PWRBTN# 13
PAD
ALWON
D19 *RB751V_NC
VR_CAP
RP21 8P4R-4.7K
1 2
3 4
R453 *100K_NC
12
R455 *10K_NC
1 2
R456 *0_NC
EC5004 Rev C Pop. EC5004 Rev D De-Pop
CLK_DOCK 39 DAT_DOCK 39 CLK_KBD 39 DAT_KBD 39
BC_CLK 28 BC_DAT 28 BC_INT# 28
"Share 10uF Nearby"
R68 *10K_NC
1 2
12
6
L44 BLM11A121S
TVS1
1
1
2
*4.7U_6.3V_NC
1 2
1 2
R454 *10K_NC
C567
Q52
*3906_NC
3 1
Q53
31
*2N7002W-7-F_NC
GND
3
3
PACDN045YB6R
TVS3
1
1
2
GND
3
3
PACDN045YB6R
KSO10 KSO11
KSO9 KSO14 KSO13 KSO15 KSO16 KSO12
KSO0
KSO2
KSO1
KSO3
KSO8
KSO6
KSO7
KSO4
KSO5
KSI0 KSI3 KSI1 KSI5 KSI2 KSI4 KSI6 KSI7
HRS FH28D-50(25)SB-1SH(86)
2
12
R457 *100K_NC
MEC5004_VCC0
12
KSO15 KSO16
T101
+3.3V_ALW
12
2
+3.3V_ALW
Cory_0824:Changed C96 and C80 from 0.047u to 0.1u follow M07 A04.
HOST_DEBUG_TX HOST_DEBUG_RXHOST_DEBUG_RX
R71 *10K_NC
1 2
Title
Size Document Number Rev
Date: Sheet
7
KSO0
6
6
KSO12
5
5
4
4
KSO6KSO7
6
6
KSO8
5
5
KSO3KSO1
4
4
JKB1
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25
KSI1
1 2
KSO4
3
KSI7
1 2
KSI5 KSI2
3
KSO13
1 2
KSO10 KSO11
3
GND2 GND1
8
TVS2
1 GND 3
PACDN045YB6R
TVS4
1 GND 3
PACDN045YB6R
TVS5
1 GND 3
PACDN045YB6R
6 5 4
6 5 4
6 5 4
Keyboard CONN
+3.3V_RTC_LDO
C98
*2.2U/6.3V/0603_NC
C101
0.1U_10V
1 2
C363 10U_6.3V
12
3 4
12
+RTC_CELL
R690
12
RTC-BATTERY
C89
0.1U_10V
OUT 5/3#
GND2SHDN
RB751V
RB751V
12
C96
0.1U_10V
U8*MAX1615_NC
IN
D6
21
D7
21
060016MA002G200NL
12
C81
0.1U_10V
R72 *10K_NC
1
C102
5
VCCRTC_D
BT1
1 2
12
+PWR_SRC
12
*1U_25V_NC
R70 1K
1 2
*0.1U_50V_NC
+3.3V_ALW
C80
0.1U_10V
QUANTA COMPUTER
Ultra I/O Controller MEC5004
DM5 1A
星期二
27, 2005
十二月
7
of
27 59,
8
KSI3KSO2
6
KSI0
5
KSO5
4
KSI6
6
KSI4
5 4
KSO14
6
KSO9
5 4
12
12
C99
Page 28
5
+3.3V_ALW
CT_1207: Pop R293 and Depop R309 for board ID change(X 02)
W3
21
12
+3.3V_ALW
R292 10K
1 2
R308 *10K_NC
1 2
Board Revision
ENG1(M00) ENG2(X00)0 ENG3 (X01)1 ENG4 (X02) RAMP
C110
4.7U_10V_0805
1 2
C390
0.1U_10V
R293 10K
1 2
R309 *10K_NC
1 2
1 2
12
C438 33P_50V
12
12
C432
0.1U_10V
BID0 BID1 BID2 BID3
R328 0
C122
0.1U_10V
ECE5018 XTAL2
VDDA
12
C118
0.1U_10V
12
C433
0.1U_10V
+3.3V_ALW
ICH(P5) WLAN
Bluetooth
NO Use
NO Use
12
C431
0.1U_10V
Board ID Straps
D D
R291
R290
*10K_NC
*10K_NC
1 2
1 2
R307
R306
10K
10K
1 2
1 2
BID3 B ID2 BID1 BID0
C C
0 0
00 0
0 00 0
10
+3.3V_RUN
1 00 1
10 0
12
R73 *100K_NC
SNIFFER_WIRELESS_ON/OFF#
12
C109 *1U_10V_NC
Cory_0824:Let R73 and C109 NC, not used Sniffer.
R329 1M
1 2
B B
A A
ECE5018 XTAL1
+3.3V_ALW
L19 BLM18PG181SN1
1 2
12
C119
0.1U_10V
12
C437 33P_50V
C120
4.7U_10V_0805
1 2
12
C392
0.1U_10V
24MHz
4
RP32
2 4 6 8
8P4R-10K
R271 10K
R322 *10K_NC
R274 *10K_NC
PCIE_WAKE#23 SYS_PME#24,36 DOCK_SIO_ALERT#39
PBAT_PRES#48 SBAT_PRES#41,48 CHG_PBATT41 CHG_SBATT41
SBAT_LOW41
ICH_PCIE_WAKE#13 ICH_PME#12 THERMTRIP_SIO32
FPBACK_EN19
CPU_PROCHOT#3 DOCK_PWR_EN39 MODPRES#21 WLAN_RADIO_DIS#23
R84 12K/F
R82
USBP1+12 USBP1-12 ECE_USBP1+23 ECE_USBP1-23 ECE_USBP2+31 ECE_USBP2-31
LOM_LOW_PWR#36 AUDIO_AVDD_ON34 BEEP34 ADAPT_TRIP_SEL42
C419
4.7U_6.3V
1 2
PCIE_WAKE#
1
SYS_PME#
3
DOCK_SIO_ALERT#
5
SBAT_ALARM#
7
PBAT_ALARM#
12
DBAY_MODPRES#
12
SC_DET#
12
PCIE_WAKE# SYS_PME# DOCK_SIO_ALERT#
T40PAD T39PAD
CB_HWSPND#
T41PAD
SNIFFER_WIRELESS_ON/OFF#
SC_DET#
12 12
ECE5018 XTAL2
10K
ECE5018 XTAL1
ECE_USBP3+
T72PAD
ECE_USBP3-
T73PAD
ECE_USBP4+
T38PAD
ECE_USBP4-
T37PAD
T30PAD
VDDA DCD0#
+3.3V_ALW
12
C434
0.1U_10V
BID0 BID1 BID2 BID3
CPU_PROCHOT#
C128
4.7U_6.3V
1 2
C420
4.7U_6.3V
1 2
USIO2
97
GPIOA[0]
98
GPIOA[1]
99
GPIOA[2]
100
GPIOA[3]
101
GPIOA[4]
102
GPIOA[5]
103
GPIOA[6]
104
GPIOA[7]
112
GPIOF[4]
111
GPIOF[5]
110
GPIOF[6]
109
GPIOF[7]
88
GPIOG[0]
89
GPIOG[1]
90
GPIOG[2]
91
GPIOG[3]
92
GPIOG[4]
93
GPIOG[5]
94
GPIOG[6]
95
GPIOG[7]
26
GPIOH[4]
27
GPIOH[5]
32
GPIOH[6]
33
GPIOH[7]
105
OUT65
127
RBIAS
126
ATEST
122
XTAL2
123
XTAL1/CLKIN
9
USBDP0
10
USBDN0
13
USBDP1
12
USBDN1
15
USBDP2
16
USBDN2
19
USBDP3
18
USBDN3
21
USBDP4
22
USBDN4
63
GPIOD[3]/VBUS_DET
28
GPIOD[4]/OCS1_N
29
GPIOD[5]/OCS2_N
30
GPIOD[6]/OCS3_N
31
GPIOD[7]/OCS4_N
125
VDDA33PLL
8
VDDA33_0
14
VDDA33_1
20
VDDA33_2
11
VSS_0
17
VSS_1
23
VSS_2
36
VSS_3
51
VSS_4
72
VSS_5
87
VSS_6
96
VSS_7
121
VSS_8
128
VSS_9
34
VCC1_0
57
VCC1_1
85
VCC1_2
108
VCC1_3
119
VCC1_4
120
VDD18
86
CAP_LDO
124
VDDA18PLL
ECE5018
3
ECE5018 Midway 128 PIN VTQFP
GPIO (25)
USB (19)
POWER PLANES (21)
PCI POWER SIRQ (3)
LPC BUS (8)
DOCKING LPC (8)
DLFRAME#
DCLK_RUN#
DSER_IRQ
BC
GPIOB[0]/INIT#
GPIOB[1]/SLCTIN#
GPIOB[2]/PD0 GPIOB[3]/PD1 GPIOB[4]/PD2 GPIOB[5]/PD3
PARALLEL PORT (17)
UART (8)
IRCC (8)
GPIOB[6]/PD4 GPIOB[7]/PD5
GPIOC[0]/PD6 GPIOC[1]/PD7
GPIOC[2]/SLCT
GPIOC[3]/PE
GPIOC[4]/BUSY
GPIOC[5]/ACK#
GPIOC[6]/ERROR#
GPIOC[7]/ALF#
GPIOD[0]/STROBE#
GPIOE[0]/RxD
GPIOE[1]/TxD
GPIOE[2]/RTS#
GPIOE[3]/DSR#
GPIOE[4]/CTS#
GPIOE[5]/DTR#
GPIOE[6]/RI#
GPIOE[7]/DCD#
GPIOD[1]/CIRTX GPIOD[2]/CIRRX
GPIOF[0]/IRMODE/IRRX3A
GPIOF[1]/IRRX2 GPIOF[2]/IRTX2
GPIOF[3]/IRMODE/IRRX3B
SIO RESET (4)
SYSOPT1/GPIOH[2] SYSOPT0/GPIOH[3]
MISCELLANEOUS (4)
CLKRUN#
PCI_CLK
SER_IRQ
LAD0 LAD1 LAD2 LAD3
LFRAME#
LRESET#
LDRQ0# LDRQ1#
DLAD0 DLAD1 DLAD2 DLAD3
DLDRQ1#
BC_CLK BC_DAT
BC_INT#
IRTX IRRX
GPIOH[0] GPIOH[1]
14 MHz_IN
TEST_PIN
PWRGD
2
37 56 39
54 52 49 47 42 41 46 44
55 53 50 48 43 38 45 40
BC_CLK
60
BC_DAT
59
BC_INT#
58 65
66 82 81
5V_CAL_SIO2#
80 79
5V_CAL_SIO#
78
IMVP6_PROCHOT#
77 76
75 67 68 69
Cory_0819:Moved Nets name
70 71
NB_Mute to Pin73.
NB_MUTE
73 74
RXD0
1
TXD0
2
RTS0#
3
DSR0#
4
CTS0#
5
DTR0#
84
RI0#
83 6
113 114
SBAT_ALARM#
61
PBAT_ALARM#
62
DBAY_MODPRES#
118 117 116 115
24 25
HDDC_EN#
106
MODC_EN#
107
CLK_SIO_14M
64
35 7
CLKRUN# 13,24,27,36 CLK_PCI_SIO_2 17 IRQ_SERIRQ 13,24,27
LPC_LAD0 11,27 LPC_LAD1 11,27 LPC_LAD2 11,27 LPC_LAD3 11,27 LPC_LFRAME# 11,27 PLTRST# 6,12,13,18,23,27 LPC_LDRQ0# 11 LPC_LDRQ1# 11
D_LAD0 39 D_LAD1 39 D_LAD2 39 D_LAD3 39 D_LFRAME# 39 D_CLKRUN# 39 D_DLDRQ1# 39 D_SERIRQ 39
BC_CLK 27 BC_DAT 27 BC_INT# 27
HP_NB_SENSE 34,35 DOCK_HP_MUTE# 34
SPDIF_SHDN 34 MDC_RST_DIS# 26
ADAPT_OC 42
NB_MUTE 34,35 AC_OFF 42,48 RXD0 29
TXD0 29 RTS0# 29 DSR0# 29 CTS0# 29 DTR0# 29 RI0# 29 DCD0# 29
IRTX 38 IRRX 38 SBAT_ALARM# 48 PBAT_ALARM# 48
T74 PAD
USB_BACK_EN# 33 USB_SIDE_EN# 33 IRMODE 38
DOCKED 37,39
T36 PAD
HDDC_EN# 21 MODC_EN# 21
CLK_SIO_14M 17
T29 PAD
RUNPWROK 27,40,45
T98 PAD T99 PAD
IMVP6_PROCHOT# 45
Place closely pin USIO2.
CLK_PCI_SIO_2
DOCKING PULLED UP
D_CLKRUN# D_SERIRQ
D_DLDRQ1#
RI0#
CLK_SIO_14M
CT_1212: Added HDDC_EN# and MODC_EN# to ECE5018 GPIOH2 & 3.
1
+3.3V_RUN
1
2
+3.3V_RUN
+3.3V_SUS
12
R272 *10_NC
12
C391 *4.7P_50V_NC
3
RP23 4P2R-S-100K
4
R273 100K
1 2
R74 10K
1 2
12
R270 *10_NC
12
C389 *4.7P_50V_NC
QUANTA
Place these caps near ECE5018.
5
Title
Size Document Number R e v
4
3
2
Date: Sheet of
COMPUTER
Ultra I/O Cont ro ll er EEC5018
DM5 1A
星期二
27, 2005
十二月
28 59,
1
Page 29
1
2
3
4
5
6
7
8
+3.3V_SUS
RI0
L1 BLM11A121S
12
A A
C182 .1U_50V
1 2
C195 .47U_0805
1 2
TXD028
RTS0#28
DTR0#28
DCD0 RI0 RXD0# CTS0 DSR0
RUN_ON40,43,44,46,47
B B
+3.3V_SUS
28 24
1 2
14 13 12
4 5 6 7 8
22 23
U10
C1+ C1­C2+ C2­T1IN
T2IN T3IN
R1IN R2IN R3IN R4IN R5IN
FORCEOFF FORCEON
MAX3243CPWR
VCC
T1OUT T2OUT T3OUT
R2OUTB
R1OUT R2OUT R3OUT R4OUT R5OUT
INVILID
GND
26
C183 .47U_0805
27
3 9
10 11
20 19 18 17 16 15
21 25
1 2
C190 .47U_0805
1 2
TXD0# RTS0 DTR0
PAD
T1
V+
V-
C181 .1U_10V
DCD0# 28 RI0# 28 RXD0 28 CTS0# 28 DSR0# 28
DTR0 CTS0 TXD0# RTS0 RXD0# DSR0 DCD0
1 2
L2 BLM11A121S
1 2
L3 BLM11A121S
1 2
L4 BLM11A121S
1 2
L5 BLM11A121S
1 2
L6 BLM11A121S
1 2
L7 BLM11A121S
1 2
L8 BLM11A121S
1 2
SERIAL PORT
12
12
12
12
C12
C13
C11
C10
270P
270P
270P
270P
Place them close to serial port
12
C9 270P
12
C8 270P
12
C7 270P
12
C6 270P
5 9 4 8 3 7 2 6 1
JCOM1
DS0019-D2
<VENDOR>
If MAX3243 pin 22 tied to RUN_ON,then it can not support Ring Out
C C
D D
QUANTA
Title
Size Document Number Rev
1
2
3
4
5
6
Date: Sheet
SERIAL PORT & USB
DM5 1A
星期二
27, 2005
十二月
7
of
29 59,
8
Page 30
A
B
C
D
E
4 4
3 3
2 2
8Mbit (1M Byte), SPI
SPI_CS#12,27 EC_FLASH_SPI_CLK27 EC_FLASH_SPI_DO27 EC_FLASH_SPI_DIN27
SPI_CS#
1 2
R198 47
+3.3V_SUS
12
R199 10K
U16
1
CE#
6
SCK
5
SI
2
SO
3
WP#
SST25LF080A
VDD
HOLD#
VSS
12
R53 10K
8
7 4
12
C352
0.1U_10V
1 1
QUANTA
Title
Size Document Number Rev
A
B
C
D
Date: Sheet
FLASH
DM5 1A
星期二
27, 2005
十二月
E
of
30 59,
Page 31
1
2
3
4
5
6
7
8
A A
Touch Pad
+5V_RUN
1
3
RP9 4P2R-S-4.7K
2
4
L18 BLM11A601S
12
C570 10P
1 2 1 2
L20 BLM11A601S
+5V_RUN
12
C571 10P
1 2
12
C572 10P
CLK_TP_SIO27 DAT_TP_SIO27
12
C569 10P
B B
TP_DATA
R81
0_0805
TP_CLK
12
.1U_10V
TPVCC
C132
TPVCC
12
C127 .047U
JP1
1
1
2
2
3
3
4
4
5
5
6
6
Molex-52808-0629-6P
+3.3V_RUN
Bluetooth
12
R400 0_0805
J11
1
GND
3
3.3V(Logic)
BT_RADIO_DIS#13
PAD
T97
C C
ECE_USBP2+28
12
C526
.1U_10V
12
C545
*100P_50V_NC
5
Radio Enable/Disable#
7
RSVD
9
USB+
Activity LED
BM10B-SRSS-10P-R
COEX2 COEX1
USB-
GND
2 4 6 8 10
1
2 3 4 5 6 7
8 9
10
R408 10K
1 2
GND USBP+ USBP­RSVD
COEX1_BT_ACTIVE
BT_RADIO_DIS#
COEX2_WLAN_ACTIVE
+3.3V
BT_ACTIVE
GND
1 2 3 4
5 6 7 8
9 10
12
C539 33P_50V
BT_ACTIVE 23,33 COEX2_WLAN_ACTIVE 23 COEX1_BT_ACTIVE 23 ECE_USBP2- 28
COEX1_BT_ACTIVE
COEX2_WLAN_ACTIVE
BT Module Pinout
GND
1
USBP+
2
USBP-
3
RSVD
4
GND
11
5
BT_RADIO_DIS#
+3.3V
BT_ACTIVE
GND
GND
12
6 7 8 9 10
D D
QUANTA
Title
Size Document Number Rev
1
2
3
4
5
6
Date: Sheet
TOUCH PAD & BULE TOOTH
DM5 3A
星期二
27, 2005
十二月
,
7
of
31
59
8
Page 32
1
A A
2
D5
*CHN202UPT_NC
1
3
FAN1_VOUT
3
2
12
C77 22U
+3.3V_RUN
R43 10K
1 2
R45 0
1 2
FAN1_VOUT_FB
4
FAN1_TACH 27
J4
1
FAN1
2 3
MOLEX-53398-0390
5
6
7
8
H_THERMDA & H_THERMDC routing together. Trace width/Spacing = 10/10 mil
H_THERMDA3
B B
C C
D D
H_THERMDC3
+3.3V_SUS
C288 .1U_10V
Notes:
Vset=(Tp-75)/21 Where Tp=75 to 106 degree C
Set trip poin t =8 5 degree c Vset = (85-75) / 1 6 = 0.625 V
Guardian temp- to l erance= +/-3 degree C
Place near the bottom SODIMM
+1.05V_VCCP
R242 2.2K
H_THERMTRIP#3
1
1 2
Put 2200P close to Guardian.
12
C300 2200P
R231 49.9/F
1 2
12
C333 .1U_10V
+3.3V_SUS
12
Q31 MMST3904-7-F
REM_DIODE3_N & _P routing together. Trace width/ Spacing = 10/10 mil
Q26
2
MMST3904-7-F
C331
.1U_10V
12
R169 147K/F
12
R173
41.2K/F
13
2
Put 2200P close to Diode
+3.3V_SUS
12
R229
8.2K
THERMTRIP1#
1 3
2
+3.3V_SUS
THERMDA THERMDC
+3VSUS_THRM
+RTC_CELL
12
ICH_PWRGD#40
R210 8.2K
1 2
12
C292 2200P
Put 2200P close to Guardian.
C332 .1U_10V
REM_DIODE3_N
12
C309 2200P
REM_DIODE3_P
12
C393 *2200P_NC
12
.1u Cap needs to be placed near Guardian IC.
SUSPWROK13,40
DAT_SMB27
CLK_SMB27
1 2
R38 7. 5K/F
ICH_PWRGD#
POWER_SW#27,33
R176 1K
1 2
FAN1_VOUT
40mils
THERMTRIP_MCH#6
3
DAT_SMB CLK_SMB
LDO_SHDN#
1 2
R41 1K R211 1K
1 2
THERMTRIP1# THERMTRIP2#
THERM_VGA#
T57 PAD
+1.05V_VCCP
7
SMDATA
8
SMBCLK
23
LDO_SHDN#_ADDR
35
DP2
34
DN2
12
+3VSUS
21
VSUS_PWRGD
18
+RTC_PWR3V
13
+3V_PWROK#
38
POWER_SW#
14
THERMTRIP1#
15
THERMTRIP2#
16
THERMTRIP3#
39
VSET
29
HW_LOCK#
9
VSS
1
DP3
2
DN3
6
FAN_OUT
33
FAN_DAC
10
GPIO1
11
GPIO2
19
GPIO3
20
GPIO4
32
GPIO5
41
THERMAL PAD
R241 2.2K
1 2
U15
Q25
2
MMST3904-7-F
4
THERMTRIP_SIO
SYS_SHDN#
EMC4000_QFN40~D
+3.3V_SUS
12
R228
8.2K
THERMTRIP2#
1 3
ATF_INT#
VCP1 VCP2
LDO_POK
DN1 DP1
ACAV_CLR
LDO_SET
LDO_OUT LDO_OUT
LDO_IN LDO_IN
VDD_5V
17
3 40
31
36 37
30 4
22
24
25 27
26 28
5
12
C341 .1U_10V
VCP1 VCP2
REM_DIODE1_N REM_DIODE1_P
ACAV_IN 27,41,42
LDO_SET
C299
*.1U_10V_NC
40mils
12
C317 10U_10V_0805
5
12
ATF_INT# 27
T58PAD T2PAD
+3.3V_ALW
LDO_IN_EMC4000
12
C302 1U_10V
12
C318 .1U_10V
REM_DIODE1_N & _P routing together. Trace width/Spacing = 10/10 mil
Put 2200P close to Guardian.
R175 10K
1 2
2.5V_RUN_PWRGD 40
+RTC_CELL
R39 *10K_NC
1 2
12
C291 2200P
Put 2200P close to Diode
+2.5V_RUN
20mils
12
12
C315
*.1U_10V_NC
+5V_RUN
C287 10U_10V_0805
6
Place under CPU
12
C290 *2200P_NC
R179 0_0805
1 2
R182 0_0805
1 2
13
Q10
2
MMST3904-7-F
THERMTRIP_SIO 28
THERM_STP# 46
+3.3V_RUN
LDO_SET
+2.5V_RUN
1 2
1 2
R442
*31.5K_NC
R34
1K
QUANTA
Title
Size Document Number Rev
Date: Sheet
FAN & THERMAL
DM5 1A
星期二
27, 2005
十二月
7
of
32 59,
8
Page 33
A
B
C
D
E
LID SWITCH
4 4
LID_CL_SIO#27
HDD LED
SATA_ACT#11
3 3
WIRELESS/BLUETOOTH LED
BT_ACTIVE23,31
BREATH LED
BREATH_LED27
2
+3.3V_ALW
12
12
+3.3V_RUN
47K
10K
BT_ACTIVE
+3.3V_SUS
2 4
R305 100K
C417 .047U
13
53
U3
7SH04
R444 10
1 2
Q3
DTA114YUA
HDD_LED
HDD_LED 39
2
BREATH_PWRLED
SW1
SPPB53V
WPAN_RADIO_ON_T
Q15 DTC144EUA
1 3
1 2 3 4
BATTERY 1,2 LED
47K
BAT1_LED#27 BAT2_LED#27
2
10K
MB TO I/O-BOARD CONN
+3.3V_LAN
USB_SIDE_EN#28 USB_BACK_EN#28
DOCK_LOM_ACTLED_YEL#36,39
DOCK_LOM_SPD10LED_GRN#36,39
USB_OC3_4#12
USB_OC5_6#12
TXOP_A37 TXON_A37
RXIP_A37 RXIN_A37
+3.3V_ALW+3.3V_ALW
13
Q4
DTA114YUA
BAT1_LED BAT2_LED
BREATH_PWRLED
TXOP_A TXON_A
RXIP_A RXIN_A
J5
50
50
48
48
46
46
44
44
42
42
40
40
38
38
34
34
32
32
30
30
28
28
26
26
24
24
22
22
20
20
18
18
14
14
12
12
10
10
8
8
6
6
4
4
2
2
Foxconn-QT8B0501-1111
49
49
47
47
45
45
43
43
41
41
39
39
37
37
33
33
31
31
29
29
27
27
25
25
23
23
21
21
19
19
17
17
13
13
11
11
9
9
7
7
5
5
3
3
1
1
2
10K
HDD_LED BAT1_LED BAT2_LED
47K
13
Q5
DTA114YUA
C14
.1U
USBP4- 12DOCK_LOM_SPD100LED_ORG#36,39 USBP4+ 12
USBP3+ 12 USBP3- 12
USBP5+ 12 USBP5- 12
USBP6+ 12
USBP6- 12
+5V_SUS
2 2
WIRELESS LED
LED_WLAN_OUT23
DASH BOARD CONN
1 1
+3.3V_RUN
POWER_SW#27,32
INT_MIC+35 INT_MIC-35
A
+3.3V_RUN
47K
2
10K
DASH_CAP_LED POWER_SW# DASH_NUM_LED
DASH_SCRL_LED WPAN_RADIO_ON_T LED_WLAN_OUT#_R
+5V_RUN
13
Q16 DDTA114YUA-7-F
LED_WLAN_OUT#_R
2-1612037-0-20P-AMP
J1
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
B
CAP, SCRL, NUM LEDS
+3.3V_RUN +3.3V_RUN +3.3V_RUN
13
47K
CAP_LED#27 NUM_LED#27SCRL_LED#27
2
10K
DASH_CAP_LED DASH_SCRL_LED
C
Q45
DDTA114YUA-7-F
13
Q46
47K
2
10K
DDTA114YUA-7-F
DASH_NUM_LED
13
Q47
47K
2
10K
DDTA114YUA-7-F
QUANTA
Title
Size Document Number Rev
D
Date: Sheet
SWITCH & LED
DM5 1A
星期二
27, 2005
十二月
E
of
33 59,
Page 34
1
A A
ICH_AZ_CODEC_SDOUT11 ICH_AZ_CODEC_BITCLK11
ICH_AZ_CODEC_SDIN011
ICH_AZ_CODEC_SYNC11
ICH_AZ_CODEC_RST#11
B B
ICH_AZ_CODEC_BITCLK
C C
ICH_AZ_CODEC_SDOUT
R431
*47_NC
R432
*47_NC
R430 33
1U_10V
Close to Pin20
1 2
C555 *22P_50V_NC
1 2
1 2
C556 *22P_50V_NC
1 2
2
+3.3V_RUN
12
C554
10U_10V_0805
ICH_AZ_CODEC_SDOUT ICH_AZ_CODEC_BITCLK
ICH_AZ_CODEC_SYNC ICH_AZ_CODEC_RST#
C540
SDIN
12
Close to Pin18
AC97VREFI
12
C541
12
0.1U_10V C533
12
1U_10V
3
6
DVDD
DVSS2
4
1 2
+VDDA
26
AVDD2
AVSS1
17
C483 *47P_50V_NC
1 2
29
W=30 mil W=20 mil
12
12
C553 1U_10V
CAP2
C552
0.1U_10V
U30
1
NC1
2
SDATA_OUT
3
BIT_CLK
5
SDATA_IN
7
SYNC
8
RESET#
18
VREFIN
20
CAP2
10
CD_L
12
CD_R
25
MONO_OUT
11
NC2
PC_BEEP
C481
*47P_50V_NC
AVSS2
12
C546
0.1U_10V
LINE_OUT_L LINE_OUT_R
SPDIF_OUT
VREFOUT
LINE_IN_L
LINE_IN_R
HP_OUT_L
HP_OUT_R
12
C547 10U_10V_0805
9
SENSE_A
21
GPIO0
22
GPIO1
30
GPIO2
31
SPDIF_IN
32
19
13
MIC_L
14
MIC_R
15 16 23 24 27 28
STAC9200N
AUD_LINE_OUT_L
+3.3V_RUN
NB_MUTE28,35
4
SENSE_A
R409 *0 _ NC
1 2
SPDIF_SHDN DOCK_HP_MUTE# EAPD SPDIF
VREFOUT
NB_MICIN_L NB_MICIN_R INT_MIC_IN
AUD_LINE_OUT_L AUD_LINE_OUT_R HP_OUT_L HP_OUT_R
C492 0.015U_16V
1 2
C490 0.015U_16V
1 2
C479 0.015U_16V
1 2
C478 0.015U_16V
1 2
C471 0.47U_10V
12
+3.3V_SUS
R382 100K
1 2
12
1 2
R390
*10K_NC
+5V_SUS
12
From EC
HP_NB_SENSE
SPDIF_SHDN 28
DOCK_HP_MUTE# 28
SPDIF 39
To SPDIF circuit & DOCK
VREFOUT 35
NB_MICIN_L 35 NB_MICIN_R 35 INT_MIC_IN 35
TIE INT_MIC_IN_L & R TOGETHER for internal MIC
HP_OUT_L 35 HP_OUT_R 35
C493
47P_50V
R386 *100K_NC
2
1 2
1 2
PC_BEEP
BYPASS AUD_GAIN0 AUD_GAIN1
SPK_SHUTDOWN#
31
Q38 2N7002W-7-F
C489 47P_50V
5
12
C534
0.1U_16V
C527
0.047U_25V
AUDIO_AVDD_ON28
HP_NB_SENSE 28,35
HP_NB_SENSE28,35 MIC_SWITCH 35
+5V_AMP_VCC
6 15 16
LIN-
5
RIN-AUD_LINE_OUT_R
17
9
7 10
2
3
TPA6017A2/FAN7031/LM4874
31
12
2N7002W-7-F
U27
PVDD1 PVDD2 VDD
LIN­RIN-
SHUTDOWN LIN+ RIN+
BYPASS GAIN0
GAIN1
2
Q48 *2N7002W-7-F_NC
C544 1U_10V
R433
39.2K/F
2
Q43
(Would be changed to another component , SN74AHCT1G86DCKR is end of life )
ROUT+
ROUT­LOUT+
LOUT-
NC
GND1 GND2 GND3 GND4
12
6
U29
1
Vin
2
GND
3
EN
TPS793475
1 2
12
12
R434 20K/F
31
31
2
2N7002W-7-F Q44
BEEP28
SPKR13
74LVC1G86GW
PC_BEEP ANALOG CIRCUIT To be used only ifdigital PCB BEEP is unavailable
Speaker Trace Width Should be Min. 20Mils
10U_10V_0805
EAPD
R441
*10K_NC
18 14
4 8
19 12 1
11 13 20
+VDDA=4.75V
5
Vout
TPS793475_BYPASS
4
BYP
+VDDA
R425
5.1K/F
Close to Pin9
+VDDA
53
1 2
U25
INT_SPK_R1 INT_SPK_R2
INT_SPK_L1 INT_SPK_L2
+5V_AMP_VCC
+5V_AMP_VCC
12
12
C474
7
+VDDA
12
12
C523
0.1U_16V
C466
0.1U_16V
1 2
BEEP1 PC_BEEP
4
C455 *100P_NC
C456 *100P_NC
1 2
1 2
W=40 mil
12
C487
C484
0.1U_10V
0.1U_10V
C519
0.1U_16V
1 2
12
10K
C457 *100P_NC
12
C516
2.2U_10V
DOCK_HP_MUTE#
R368
12
C458 *100P_NC
1 2
L53
1 2
BLM21PG600SN1D
C486 1U_10V
L56
*BLM11A601S_NC
1 2
12
C524
0.047U_25V
+3.3V_RUN
R440 100K
1 2
C476
1 2
.1U_10V
R367
2.2K
1 2
+5V_SUS
W=40 mil
8
+5V_RUN
JSPK1
1
1
2
2
3
3
4
4
53398-0490
AUD_GAIN0 AUD_GAIN1 AV Rin
0 0 6dB 90K
D D
1
0 1 10dB 70K 1 0 15.6dB 45K
1 1 21.6dB 25K
2
3
+5V_AMP_VCC
R3851K
1 2 1 2
R387 *1K_NC
4
AUD_GAIN0 AUD_GAIN1
R384 *1K_NC
12 12
R383 1K
QUANTA
Title
Size Document Number Rev
5
6
Date: Sheet
Azelia CODEC
DM5 1A
星期二
27, 2005
十二月
7
of
34 59,
8
Page 35
1
2
3
4
5
6
7
8
CT_1226: Change C535 from 0402 to 0603.
A A
VREFOUT34
12
C520
1U_10V
13 15
14 18
1 3
5 7
C461 2.2U_10V
1 2 1 2
C468 2.2U_10V
U28
INL INR
SHDNR SHDNL
C1P C1N
PVSS SVSS
MAX4411
OUTL
OUTR
NC1 NC2 NC3 NC4 NC5
NC6 SVDD PVDD
PGND SGND
9 11 4 6 8 12 16 20 10 19 2 17
R351 4.99/F
12
C500 47P_50V
1 2 1 2
R359 4.99/F
HP_SPK_L1 HP_SPK_R1
HP_NB_SENSE
C525 1U_10V
1 2
NB_MICIN_L34 NB_MICIN_R34
B B
C501 1U_10V
HP_OUT_L34
HP_OUT_R34
1 2 1 2
C505 1U_10V
C509
47P_50V
12
Headphone Audio Amp.
HP_SPK_L2 HP_SPK_R2
12
12
12
R349
4.7K
R350 20K
C510 1U_10V
C535
1 2
12
1000P_NPO_0603
R353
4.7K L51
BLM11A121S
1 2 1 2
L52
BLM11A121S
12
R356 20K
100P_50V
L54 BLM11A121S
1 2 1 2
L55 BLM11A121S
L57 BLM11A601S
1 2
C460
HP_SPK_L3 HP_SPK_R3
C502
100P_50V
+3.3V_RUN
MIC_IN_L1 MIC_IN_R1
C464 100P_50V
C496
100P_50V
+3.3V_RUN
12
R362 100K
MIC_SWITCH 34
CON3
1 2 6 3 4 5
7 8
12
9
10 11
SUYIN-RC142A-12G2
HP_NB_SENSE
R395
1 2
31
100K
2
Q57 2N7002W-7-F
CT_1212: Added Q57 on NB_MUTE net to fix power-off AUDIO POP noise issue (Follow Brewster & Keylargo)
STEREO MIC LINE IN
HEADPHONE LINE OUT
HP_NB_SENSE 28,34
+3.3V_RUN
NB_MUTE 28,34
C C
Note: Mic trcace should be routed differentially.
2.2U_10V
R377
INT_MIC+33
*MLX_53398-0271_NC
INT_MIC-33
D D
1 2
J9
2 1
R376
1 2
C537
2.2U_10V
1
+VDDA
12
R419 1K
C536
12
12
R420
0
INT_R_MIC+ INT_MIC_OP+INT_MIC_C+
0
1K
C548
0.1U_10V
12 12
C549
0.1U_10V
12
R421 1K
12
12
R422 1K
2
R426 100K
1 2
+VDDA
R427 10K
1 2
INT_MIC_C-INT_R_MIC-
R428 10K
1 2
INT_MIC_OP-
5 6
1 2
R429 100K
8
4
MIC_BIAS
INT_MIC_IN_OP
7
U31B BA10358F E2
Only Single INT MIC
12
C551
0.1U_10V
INT_MIC_IN 34
Only Single INT. MIC
MIC_BIAS
+VDDA +VDDA
8
3
1
U31A
BA10358F E2
2
4
MIC_LM+
R436 100K
1 2
12
R435
C557
100K
1 2
2.2U_10V
Place close U43 related circuitry close to codec.
Title
Size Document Number Rev
3
4
5
6
Date: Sheet
QUANTA COMPUTER
AUDIO HEADPHONE CONN
DM5 1A
星期二
27, 2005
十二月
7
of
35 59,
8
Page 36
5
4
LAN-BCM4401KFB(10/100M)
BCM4401--10/100
3
2
1
+3.3V_LAN
0.1U*12 pcs
12
C34
12
C568
D D
C C
4.7U_10V_0805
4.7U_10V_0805
+3.3V_LAN
C243 1000P_50V
Place it close to pin65 of the LOM controller
12
C53
.1U_10V
12
C231
.1U_10V
ID Select : AD16 Interrupt Pin : PIRQB# Request indicate : REQ3# Grant indicate : GNT3#
CLK_PCI_LOM17
B B
R130
*33_NC
12
C226
*22P_NC
BCM4401 B0 has an errata on CLKRUN. BIOS needs to disable CLKRUN as this feature is not supported on the 4401-B0.
Close to power pins
12
12
C225
C52
.1U_10V
.1U_10V
PCI_AD16 PIDSEL
CLKRUN#13,24,27,28
PCI_AD[0..31]12,24
12
C28
.1U_10V
1 2
R10 0
12
C37
.1U_10V
PCI_C_BE3#12,24 PCI_C_BE2#12,24 PCI_C_BE1#12,24 PCI_C_BE0#12,24
PCI_FRAME#12,24
PCI_DEVSEL#12,24
PCI_PIRQB#12
12
12
C36
C46
.1U_10V
.1U_10V
PCI_IRDY#12,24
PCI_TRDY#12,24
PCI_STOP#12,24 PCI_PERR#12,24 PCI_SERR#12,24
PCI_PAR12,24
PCI_RST#12,24
PCI_GNT3#12
PCI_REQ3#12
SYS_PME#24,28
C45 27P
R14 100
12
12
C204
.1U_10V
PCI_AD31 PCI_AD30 PCI_AD29 PCI_AD28 PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23 PCI_AD22 PCI_AD21 PCI_AD20 PCI_AD19 PCI_AD18 PCI_AD17 PCI_AD16 PCI_AD15 PCI_AD14 PCI_AD13 PCI_AD12 PCI_AD11 PCI_AD10 PCI_AD9 PCI_AD8 PCI_AD7 PCI_AD6 PCI_AD5 PCI_AD4 PCI_AD3 PCI_AD2 PCI_AD1 PCI_AD0
PCI_C_BE3# PCI_C_BE2# PCI_C_BE1# PCI_C_BE0# FRAME# IRDY# TRDY# DEVSEL# STOP#
SERR# PAR PIRQB#
PCIRST# PCLK_LAN PCI_GNT3# PCI_REQ3# PCI_PME#
1 2
Y1
25MHz_FSX
+/-30PPM
12
C35
.1U_10V
122 123 124 126 127 128
1 3 6 8
9 10 11 14 15 16 33 34 36 37 38 39 41 42 45 48 49 50 51 53 54 55
4 18 32 43 20 21 23 26 27 28 29 31
116 117
118 119 121 113
5 22
67 66
12
C38
.1U_10V
U13
PCI_AD31 PCI_AD30 PCI_AD29 PCI_AD28 PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23 PCI_AD22 PCI_AD21 PCI_AD20 PCI_AD19 PCI_AD18 PCI_AD17 PCI_AD16 PCI_AD15 PCI_AD14 PCI_AD13 PCI_AD12 PCI_AD11 PCI_AD10 PCI_AD9 PCI_AD8 PCI_AD7 PCI_AD6 PCI_AD5 PCI_AD4 PCI_AD3 PCI_AD2 PCI_AD1 PCI_AD0
PCI_CBE_L3 PCI_CBE_L2 PCI_CBE_L1 PCI_CBE_L0 PCI_FRAME_L PCI_IRDY_L PCI_TRDY_L PCI_DEVSEL_L PCI_STOP_L PCI_PERR_L PCI_SERR_L PCI_PAR PCI_INT_L
PCI_RST_L PCI_CLK PCI_GNT_L PCI_REQ_L PCI_PME_L PCI_IDSEL PCI_CLKRUN_L
XTAL_IN XTAL_OUT
BCM4401
12
C44
.1U_10V
12
R18 800_0402
12
12
C41 27P
+3.3V_LAN +1.8V_LAN
106
114
VESD
56
VESD25VESD
115
125
VDDIO_PCI
VDDIO_PCI
VDDIO_PCI19VDDIO_PCI30VDDIO_PCI40VDDIO_PCI52VDDIO_PCI
94
7
VDDIO
VDDIO79VDDIO
BCM4401KQL 128P QFP
VSS12VSS46VSS
VSS
VSS84VSS2VSS24VSS74VSS13VSS47VSS
111
100
96
97
65
XTAL_AVDD
REGULATOR_AVDD
REGULATOR_AVDD
35
120
112
91
92
VDDCORE
REGULATOR_VOUT1
REGULATOR_VOUT2
VSS
XTAL_AVSS
68
12
C54
.1U_10V
44
VDDCORE17VDDCORE
LINK_LED10#
LINK_LED100#
EPHY_BIAS_AVDD
EPHY_AVDD
EPHY_PLLVDD
EPHY_VREF
EPHY_VDAC
EPHY_TESTMODE
GPIO2/VAUXAVAIL
BOOTROM_SCL
BOOTROM_SDA
SPROM_CS
SPROM_CLK
SPROM_DOUT
SPROM_DIN
EXT_POR_L
JTAG_TRST_L
EPHY_AGND
EPHY_BIAS_AVSS
EPHY_PLLGND
58
70
63
ACT_LED# COL_LED#
EPHY_TDP EPHY_TDN EPHY_RDP EPHY_RDN
GPIO1 GPIO0
JTAG_TDP JTAG_TCK
JTAG_TDI
JTAG_TMS
12
C212
.1U_10V
NC NC NC NC NC NC NC NC
75 76 77 78
69 57 64
71 72 88
62 61 59 60
104 105 103 108 102 109 110 107
87 86 85
90 93
98 95 101 99
89 83
80 82 73 81
+1.8V_LAN
12
12
C27
.1U_10V
DOCK_LOM_S PD10LED_GRN# DOCK_LOM_SPD100LED_ORG# DOCK_LOM_ACTLED_YEL#
12
C49
C39
.1U_10V
4.7U_10V_0805
CT_1207: Change R149 from 1.15K to
1.21K per ADC Comm team
R149 1.21K/F
+3.3V_LAN
R19
12
1K
SPROM_CS SPROM_CLK
SPROM_DOUTPERR# SPROM_DIN
R20 0
1 2
Note: EXT_POR_L has a internl pull up.
DOCK_LOM_S P D10LED_GRN# 33,39 DOCK_LOM_SPD100LED_ORG# 33,39 DOCK_LOM_ACTLED_YEL# 33,39
R143
49.9/F
12
C241 1000P_NPO
12
12
12
R140
49.9/F
12
C234
.1U_10V
LOM_LOW_PWR# 28
CT_1207: Using R465 0 ohm to instead L39 ferrite bead per ADC Comm team.
R465 0_0603
1 2
12
C242
.1U_10V
CT_1207: Removed L31 per ADC Comm team.
L38
1 2
BLM11A601S C240
2.2U_6.3V
R147
49.9/F
12
+1.8V_LAN
12
R148
49.9/F
12
C238
.1U_10V
U5
1 2 3 4
4*AT93C46
12
C219
.1U_10V
8
CS
VCC
7
SK
NC
6
DI
ORG
5
DO
GND
Note: The BCM 44 01 has weak internal pulldown resistors on the following signals: SPROM_CS, S PROM_ CLK, SPROM_DOUT, SPROM_DIN.
12
C51
.1U_10V
+3.3V_LAN
12
C244
.1U_10V
+1.8V_LAN
+3.3V_LAN
TXOP 37 TXON 37 RXIP 37 RXIN 37
Note: BCM4401 requires 16-bit R/W data width
A A
QUANTA
Title
Size Document Number R ev
5
4
3
2
Date: Sheet
COMPUTER
BCM4401 100/10 LAN
DM5 1A
星期二
Q 27, 2005
二月
1
of
36 59, 
Page 37
A
+3.3V_LAN
C228 .1U
B
C
D
E
4 4
3 3
TXOP36 TXON36 RXIP36 RXIN36
L33
1 2
L32
1 2
L36
1 2
12nH 5%
L37
1 2
12nH 5%
5.6nH 5%
5.6nH 5%
TXOP_L
RXIP_L RXIN_L
4 7 9
12
8
1Y 2Y 3Y 4Y
GND
U12 PI3L110Q
16
TXOP_A
VCC
1A 1B 2A 2B 3A 3B 4A 4B
A/B
G
2
DOCK_LOM_TRD0+
3
TXON_ATXON_L
5
DOCK_LOM_TRD0-
6
RXIP_A
11
DOCK_LOM_TRD1+
10
RXIN_A
14
DOCK_LOM_TRD1-
13 1
15
R141 10K
DOCK_LOM_TRD0+ 39 DOCK_LOM_TRD0- 39 DOCK_LOM_TRD1+ 39 DOCK_LOM_TRD1- 39
DOCKED 28,39
TXOP_A 33 TXON_A 33 RXIP_A 33 RXIN_A 33
CT_1207: Removed ESD1 & ESD2 & C573, C574 per ADC Comm team B. Boes.
10/100LAN_E-SWITCH
+3.3V_SRC
12
PR134 100K
+3.3V_SRC
2 2
+PWR_SRC
PQ6
FDC653N_NL
6 5
4 2 1
12
PR15 100K
1 2
3
R17
0_0603
+3.3V_LAN
12
PC15
4.7U
12
PC16 .1U_10V
31
2
31
12
AUX_EN27,46
1 1
A
B
2
PQ7
2N7002W-7-F
PR14 200K
PQ8 2N7002W-7-F
12
PR135 470K
LAN POWER
C
QUANTA
Title
Size Document Number Rev
Custom
D
Date: Sheet
LAN SWITCH/LAN POWER
DM5 1A
星期二
27, 2005
十二月
E
of
37 59,
Page 38
1
A A
2
3
4
+3.3V_RUN
5
6
7
8
Note : Total require 1/4W, ~3.6 ohm
12
IRTX28 IRRX28
12
C137 *.1U_10V_NC
Total require 1/8W
12
R80 10K
12
R83 47_0805
12
C121
4.7U_10V_0805
12
C129
.1U_10V
12
R79 10K
IRTX IRRX IRMODE FIR_VCC
U23 T F DU6102F
1
IREDA
2
IREDC
3
TXD
4
RXD
5
SD/MODE
6
VCC
7
MODE
8
GND
NC
9
B B
C135
4.7U_10V_0805
IRMODE28
IR Detector
C C
D D
QUANTA
Title
Size Document Number Rev
1
2
3
4
5
6
Date: Sheet
FIR
DM5 1A
星期二
27, 2005
十二月
7
of
38 59,
8
Page 39
1
A A
B B
DVI
+3.3V_RUN
12
R118 10K
DVI_T+
12
R119 22K
+3.3V_RUN
12
R120 22K
12
R121 10K
DVI_T-
CLK_PCI_DOCK17
SMBUS
CLK_PCI_DOCK
12
R117
*22_NC
12
C197
*18P_NC
AC-Terminator
C C
SMBUS ADDRESS : DOCK/APR Microprocessor -- 74H
DOCK USB/IDE Interface(FX2) -- 72H
DOCK SMbus Battery 16h Charger 12h IDE I/F 70h D-BAY 72h SIO 48h
D D
1
2
DOCK_PWR_SRC
P1 P2 P3 P4
S1 S2
DVI_CLK-18
DVI_CLK+18
DVI_T­DVI_T+
DVI_T+ DVI_T-
DOCK_PSID48
DVI_T+ DVI_T-
DVI_TX2+18
DVI_TX2-18
DVI_TX1+18
DVI_TX1-18
DVI_TX0+18
DVI_TX0-18
CLK_PCI_DOCK
DOCK_SMB_CLK27 DOCK_SMB_DAT27
CLK_DOCK27 DAT_DOCK27
S3 S4 S5 S6 S7 S8
S9 S10 S11 S12 S13
S15 S17
S18 S19 S20 S21 S22 S23 S24 S25 S26 S27 S28 S29 S30 S31 S32 S33 S34 S35 S36 S37 S38 S39 S40 S41 S42 S43
S45 S47
S48 S49 S50 S51 S52 S53 S54 S55
DOCK_PWR_EN28
DOCKING POWER SWITCH
2
3
J6A
V1+
V5+
V2+
V6+
V3+
V7+
V4+
V8+
S1
S69
S2
S70
S3
S71
S4
S72
S5
S73
S6
S74
S7
S75
S8
S76
S9
S77
S10
S78
S11
S79
S12
S80
S13
S81 S82
S15
S83 S84
S17
S85
S18
S86
S19
S87
S20
S88
S21
S89
S22
S90
S23
S91
S24
S92
S25
S93
S26
S94
S27
S95
S28
S96
S29
S97
S30
S98
S31
S99
S32
S100
S33
S101
S34
S102
S35
S103
S36
S104
S37
S105
S38
S106
S39
S107
S40
S108
S41
S109
S42
S110
S43
S111 S112
S45
S113 S114
S47
S115
S48
S116
S49
S117
S50
S118
S51
S119
S52
S120
S53
S121
S54
S122
S55
S125 S126 S127 S128
M136
AMP-1473681-280P
DOCKED
3
P5 P6 P7 P8
S69 S70 S71 S72 S73 S74 S75 S76 S77 S78 S79 S80 S81 S82 S83 S84 S85 S86 S87 S88 S89 S90 S91 S92 S93 S94 S95 S96 S97 S98 S99 S100 S101 S102 S103 S104 S105 S106 S107 S108 S109 S110 S111 S112 S113 S114 S115 S116 S117 S118 S119 S120 S121 S122
S125 S126 S127 S128
M136
C205
1 2
0.1U_10V
+DC_IN
MODEM
+PWR_SRC
.47U_0805
+3.3V_SUS
2 1
4
D_SERIRQ 28
D_DLDRQ1# 28 D_LFRAME# 28
DVI_SCLK 18 DVI_SDAT 18 DVI_DETECT 18
DVI
USB
USBP7- 12 USBP7+ 12
+3.3V_LAN
5
U11
7SH08
+3.3V_LAN
C218
C31 .1U_50V
C32 .1U_50V
R12
1 2
100/F
Refer to LAYOUT NOTE1.
DOCK_RING 26
12
12
R133 100K
4
R122 *0_NC
1 2
4
VGA_RED 6,20
DOCK_SMB_INT# 27 CLK_KBD 27 DAT_KBD 27
12 12
Q7 FDS6679
1 2 3
4
5
VGA
VGA_GRN6,20 VGA_BLU6,20
D_LAD128
+DC_IN
1 2
D_LAD228 D_LAD328
C196 .1U_50V
VGA
LPC
LPC
S-VIDEO
SPDIF
DOCK_LOM_SPD10LED_GRN#33,36
DOCK_LOM_SPD100LED_ORG#33,36
SMBUS
DOCK_LOM_TRD1-37 DOCK_LOM_TRD1+37 DOCK_LOM_TRD0-37 DOCK_LOM_TRD0+37
LAN
R11
1 2
100/F
LAYOUT NOTES1: Terminators should be as close as possible to dock connector pins. Keep traces as short as possible.
DOCK_PWR_SRC
8 7 6 5
R13 100K
1 2
R123 100K
1 2
Refer to LAYOUT NOTE1.
C24
1 2
.1U_50V
Place it close
31
2
5
to Docking CONN
Q6 2N7002W-7-F
TV_C6,20
SPDIF34
C29 . 01U C30 . 01U
DOCK_PWR_SRC
6
J6B
DOCK_DET# DOCK_DET#
C20 1nF
1 2
DOCK_OWNS_PCI
1 2 1 2
DOCK_TIP26
MODEM
C25
1 2
1nF
S137 S138 S139 S140 S141 S142 S143 S144 S145 S146 S147 S148 S149 S150 S151 S152 S153 S154 S155 S156 S157 S158 S159 S160 S161 S162 S163 S164 S165 S166 S167 S168 S169 S170 S171 S172 S173 S174 S175 S176 S177 S178 S179 S180 S181 S182 S183 S184 S185 S186 S187 S188 S189 S190
S193 S194 S195 S196
M204
AMP-1473681-280P
S137 S138 S139 S140 S141 S142 S143 S144 S145 S146 S147 S148 S149 S150 S151 S152 S153 S154 S155 S156 S157 S158 S159 S160 S161 S162 S163 S164 S165 S166 S167 S168 S169 S170 S171 S172 S173 S174 S175 S176 S177 S178 S179 S180 S181 S182 S183 S184 S185 S186 S187 S188 S189 S190
S193 S194 S195 S196
M204
S205 S206 S207 S208 S209 S210 S211 S212 S213 S214 S215 S216 S217 S218
S220 S222
S223 S224 S225 S226 S227 S228 S229 S230 S231 S232 S233 S234 S235 S236 S237 S238 S239 S240 S241 S242 S243 S244 S245 S246 S247 S248
S250 S252
S253 S254 S255 S256 S257 S258 S259
S205 S206 S207 S208 S209 S210 S211 S212 S213 S214 S215 S216 S217 S218
S220 S222
S223 S224 S225 S226 S227 S228 S229 S230 S231 S232 S233 S234 S235 S236 S237 S238 S239 S240 S241 S242 S243 S244 S245 S246 S247 S248
S250 S252
S253 S254 S255 S256 S257 S258 S259
DOCK_DET#
Docking Detect Circuit
Title
Size Document Number Rev
6
Date: Sheet
7
+5V_ALW
12
R1 100K
2
DOCK_DAT_DDC2 20 DOCK_CLK_DDC2 20
HSYNC 20
VSYNC 20 D_CLKRUN# 28 DOCK_SIO_ALERT# 28
S-VIDEO
TV_CVBS 6,20
TV_Y 6,20
DOCK_LOM_ACTLED_YEL# 33,36
HDD_LED 33
+3.3V_ALW
12
R113 100K
Q14 DTC144EUA
1 3
8
VGA
D_LAD0 28
LPC
DOCKED 28,37
QUANTA COMPUTER
Docking Station Conn.
DM5 1A
星期二
27, 2005
十二月
7
of
39 59,
8
Page 40
1
+3.3V_RUN +3.3V_SUS+3.3V_SUS
12
R269 10K
2
3 1
12
12
12
C387
0.1U_10V
2
C395
0.1U_10V
*4.7K_NC
+5V_SUS
Q55 *3906_NC
3 1
*4.7K_NC
A A
+5V_RUN
R275 10K
B B
Q54 *3906_NC
R460
R461
2
12
2
+5V_SUS
12
12
1 3
12
R296 100K
Q33 MMST3904
1 3
R267 100K
Q29 MMST3904
2
2
5V_3V_1.8V_RUN_PWRGD
Q30 MMST3904
2
1 3
5V_3V_1.8V_RUN_PWRGD
Q35 MMST3904
1 3
3
OPTION 1
OPTION 2
4
5
RUN POWER OPTIONS:
R269, R275, R276 = 10K ohm Population: C387, C395, C396, Q29, Q32, Q33, R267, R296, R294. Depopulation: Q54, Q55, Q56, R460, R461, R462.
R269, R275 = 200K ohm, R276 = 100K ohm. Population: Q54, Q55, Q56, R460, R461, R462. Depopulation: C387, C395, C396, Q29, Q32, Q33, R267, R296, R294.
U20D
IMVP_PWRGD13,45
RESET_OUT#27
12 13
74AHC08
6
7
8
UMA Power Up Block Diagram
ICH_PWRGD
ICH_PWRGD
+3.3V_SUS
2
12
R230 100K
ICH_PWRGD#
31
Q24 2N7002W-7-F
ICH_PWRGD 6,13
ICH_PWRGD# 32
11
+1.8V_RUN
12
R276
10K
2
12
C396
0.1U_10V
C C
D D
+1.8V_SUS
Q56 *3906_NC
3 1
R462
*4.7K_NC
2.5V_RUN_PWRGD32
1.5V_RUN_PWRGD44
1.05V_RUN_PWRGD44,45
+1.8V_SUS
2
12
12
R294 100K
Q32 MMST3904
1 3
5V_3V_1.8V_RUN_PWRGD
Q34 MMST3904
2
1 3
R331
1 2
0
1 2
R330
1 2
0
R324
+3.3V_RUN
C386
0.1U_10V
12
R320 20K
12
C429 .01U
12
Keep Away from high speed buses
5V_3V_1.8V_RUN_PWRGD
SUSPWROK_1P8V43
0
+3.3V_SUS
C426 0.1U_10V
1 2
5
U21A
1 6
7WZ14
+3.3V_SUS
1 2
5
U19A
1 6
7WZ14
C388
0.1U_10V
R268
1 2
*0_NC
+3.3V_SUS
5
U21B
3 4
7WZ14
+3.3V_SUS
5
U19B
3 4
7WZ14
+3.3V_SUS
C403 0.1U_10V
1 2
14
U20A
1
RUN_ON19,27,29,43,44,46,47
SUS_ON2 7,46,47
2
74AHC08
9
10
U20C
74AHC08
3
U20B
4 5
8
74AHC08
6
RUNPWROK 27,28,45
SUSPWROK 13,32
QUANTA
Title
Size Document Number Rev
1
2
3
4
5
6
Date: Sheet
SYSTEM RESET/POWER GOOD
DM5 1A
星期二
27, 2005
十二月
7
of
40 59,
8
Page 41
1
2
3
4
5
Id=13A, Rdson=9mOhm@Vgs=10V
+SDC_IN
2
2
1
CH715FPT
3
1
+SBATT22,48
2
1
CH715FPT
PBATT_1
PD15
PR76 10K_0402
PQ28 2N7002W-7-F
PD16
3
A A
3
PQ26 2N7002W-7-F
PR83 470K_0402
PR81 47K_0402
2
1
PQ23 SI9435BDY
8 7
1
6
2
5
3
4
PR80 10K_0402
3
2
PQ29 2N7002W-7-F
1
4
PR87 470K_0402
+PBATT
3 2
3
84
+
-
ACAV_IN27,32,42
+PBATT48
PU3A
1
LM393
+3.3V_ALW
PR82 470K_0402
Id=7A, Rdson=23mOhm@Vgs=10V
2
1
PQ17B FDS4935
3 5
4
4
3 2 1
PQ25 SI4835BDY
PR85 47K_0402
6
5 6 7 8
PR84 100K_0402
PQ17A FDS4935
+VCHGR
CHG_SBAT_N
3
B B
C C
D D
CHG_SBATT28
PR67 *100K_0402_NC
CHG_PBATT28
PR79 *100K_0402_NC
PC157
*.1U_50V_0603_NC
+3.3V_ALW
5
PU12
SBAT_LOW28
SBAT_PRES#28,48
2 1
1
7SH32
4
2
2
2
1 2
3
PQ46
1
2N7002W-7-F
PQ21 2N7002W-7-F
1
1
2N7002W-7-F PQ27
3
CHG_PBAT_N
+VCHGR
+SBATT
PR176
41.2K/F_0402
PR178 33K/F_0402
8
PR62 10K_0402
PR78 10K_0402
PR89 10K/F_0402
PR86 100K_0402
+3.3V_ALW
5 6 7 8
SI4835BDY
2
PQ24
17
2
PR77 100K_0402
4
+PBATT
5 6
PC49
+
-
3 2 1
84
CHG_SBAT
PR61 100K_0402
12
.1U_50V_0603
PC65
12
.1U_50V_0603
CHG_PBAT
CHG_PBAT
PR88 147K/F_0402
PC67 .1U_50V_0603
1 2
PU3B
7
LM393
3
PD7 CH715FPT
CHG_SBATT_N
CHG_PBATT_N
8 7
3
PR73 10K_0402
SBAT_G
PBAT_G
1
6
2
5
3
PQ20
FDS6679
4
PR70 100K_0402
PD4 UBM32PT
2 1
FDS4935 PQ18A
17
8
Id=7A, Rdson=23mOhm@Vgs=10V
2
PR64 470K_0402
PD5 UBM32PT
2 1
35
6
PQ18B FDS4935
4
PR65 470K_0402
+PWR_SRC
12
PC61 2200P_50V_0402
PC59 .1U_50V_0603
1 2
+PWR_SRC
QUANTA
Title
Size Document Number Rev
Date: Sheet
BATTERY SELECTOR
DM5 1A
星期二
27, 2005
十二月
5
of
41 59,
Page 42
1
2
3
4
5
+SDC_IN
PR68 2.2_0603
1 2
PC63 1U_10V_0603
12
PR66 33/F_0603
PC54
1 2
1U_10V_0603
12
1 2
PD6
CH501H
8731_A04
12
PR72 1_0603
PC58 220P_50V_0402
8731_LDO
21
PC60
4
12
.1U_50V_0603
8731_LX
12
4
PQ22 SI4810BDY
1 2
PR217 100_0402
876
2
351
2
PQ16 SI4800BDY
12
876
351
+VCHGR
4
1 2
PC184
3.3nF_50V_0402
PR74 *2.7_1210_NC
PC64 *0.01U_0805_NC
8731_CSIP 8731_CSIN
8731_VIN
12
PC51
876
PQ19
*SI4800BDY_NC
2
351
8.2uH_SIQ1250-8R2PF_5.5A/27mohm
2200P_50V_0402
PL6
12
12.2*12.2*5
DC-8255M012
Jason_1205:Add PC184 follow M07 A10
CHG_CS
12
PC53
.1U_50V_0603
PR57 0.01_3720
1 2
1P
12
PC47
10U_25V_1206
2P
POWER_JP
1 2
12
PC46
10U_25V_1206
+VCHGR
12
12
12
PC66
.1U_50V_0603
PC52
10U_25V_1206
PC57 10U_25V_1206
+5V_ALW
21
PD24
1SS355
12
PR221 1K_0603
Jason_1205:Add PD24 and PR221 follow M07 A10
+SDC_IN
PJP9
PR55 0_0402
8731_SDA
8731_REF
12
PC40
1U_10V_0603
PR56 0.01_3720
1 2
1P
1
22
DCIN
GND
2
ACIN
13
ACOK
11
VDD
MAX8731
10
SCL
9
SDA
14
BATSEL
8
Adress :
12H
IINP
6
CCV
5
CCI
4
CCS
3
REF
DAC
7 12
PC45
.1U_10V_0402
2P
8731_CSSP
28
CSSP
PGND
CSIP
CSIN FBSA FBSB
GND
12
8731_CSSN
27
CSSN
25
BST
21
LDO
26
VCC
24
DHI
23
LX
20
DLO
19 18 17 15 16 33
PAD
32
PAD
31
PAD
30
PAD
29
PAD
PU2
8731_BST
8731_LDO
8731_VCC
8731_DHI 8731_LX2 8731_DLO
PC181 *.01U_50V_0603_NC
A A
B B
ACAV_IN27,32,41
PR69
16.2K/F_0402
AC_OFF28,48
C C
2
8731_LDO
12
PR71 10K/F_0402
12
31
+DC_IN_SS
+DC_IN
PR54 *0_0402_NC
1 2
+5V_ALW
PBAT_SMBCLK27,48
PBAT_SMBDAT27,48
PQ45
*2N7002W-7-F_NC
12
PR63
10K_0402
12
PC39 10U_25V_1206
PR60
365K/F_0402
PR58 49.9KF_0402
12
12
PC41 .01U_25V_0402
12
.1U_50V_0603
PC55
PR59
4.7K_0402
1 2
12
12
PC50
PC42
.1U_10V_0402
.01U_25V_0402
12
PR163 0_0402
8731_IINP
PC43
.01U_25V_0402
1 2
12
PR167 0_0402
12
PC44
1 2
12
PC62 1U_25V_0805
8731_ACIN
8731_SCL
12
8731_CCV
8731_CCI
8731_CCS
.01U_25V_0402
Jason_1216: Change
PR171
12
PR169
*154K/F_0402_NC
1 2
8731_A02
1 2
PR166
27.4K/F_0402
PR170 from 4.7M to 4.32M.
PR218
1 2
8731_A01
12
1 2
PC145
PC146
PC148
.1U_50V_0603
.01U_25V_0402
100P_50V_0402
12
ADAPT_TRIP_SEL28
Jason_1216: Depop PR218 per M07 A10
8731_IINP
PR164
+5V_ALW
8731_CSSP
D D
PC143
*100P_50V_0402_NC
8731_CSSN
1 2
3 4
PC144 *.01U/25V_NC
0_0402
PU10
RS+ RS­VCC5GND
*INA194_NC
1
OUT
2
Jason_1216: Change PR169 from 59K to 56.2K per M07 A10
1
8731_REF
301K/F_0402
1 2
PR165
0_0402
56.2K/F_0402 PC147
100P_50V_0402
2
+5V_ALW
3
+
2
-
PR170
12
4.32M/F_0402
12
PC153
.01U_25V_0402
84
PU11A
1
LM393
8731_A03
PC150
Jason_1205:Depop PC181 follow M07 A10
PC154
100P_50V_0402
12
*.1U_50V_0603_NC
+5V_ALW
1 2
PR174 100K_0402
2
+3.3V_ALW
1 2
31
PR75
8731AGND
Jason_1216: Reserve
PR172 100K_0402
PQ44
2N7002W-7-F
3
PR224 1K pull down.
12
PR224 *1K_0603_NC
8731_VREF=4.096V 8731_VLDO=5.4V ACIN switch thre shold=2.048V 400KHz PWM nominal
12
0_0603
ADAPT_OC 28
"SI4800BDY"---Id=6.5A,Rdson=23mOhm@Vgs=4.5V (P/N:BAM48000040) / (TTRANS MOS SI4800BDY-T1-E3(30V7A,SOIC)L-F);
"SI4810BDY"---Id=7.5A,Rdson=16mOhm(25 ) ; Rdson=22mOhm(100 )℃℃ @Vgs=4.5V (P/N:BAM48100036) / (TRANS MOS SI4810BDY-T1-E3(30V,10A)L-F);
"AO4422L"---Id=11A,Rdson=19.6mOhm(25 ) ; Rdson=26.95mOhm(100 )℃℃ @Vgs=4.5V (P/N:BAM44220011) / (TRANS MOSFET AO4422L(30V,11A) SOIC8 L-F);
+5V_ALW
84
PU11B
5
+
7
6
-
LM393
Charge Voltage = 12.975 Charge Current = 4.4A Battery is 4cell & 6cell
QUANTA
Title
Size Document Number Rev
4
Date: Sheet
Battery Charger
DM5 1A
星期二
27, 2005
十二月
5
of
42 59,
Page 43
5
4
3
2
1
POP for TI51116
D D
+5V_SUS
PJP15
POWER_JP
+1.8V_SUS_P
12
+
PC56 470U_4V_15mOhm
100pF for SC480
PR96 0_0402
1 2
1 2
PC165
*.1U_50V_0603_NC
+PWR_SRC
1.8 Volt +/-5% Design Current:7.28A Maximum Current: 10.5A OCP: min A; max A
+1.8V_SUS
C C
NEC-TEP S LD0G477M(15)12R -
7.3*4.3*2.8-15mohm
B B
POWER_JP
1 2
POWER_JP
1 2
*330U_4V_25mOhm_NC
12
+
PC149
PJP10
PJP11
+5V_SUS
12
PC48
.1U_10V_0402
51116_VIN
12
+
PC69 10U_25V_1206
1.5uH_SIQH125_1R5PF_13A/6mohm
PR95 *2K/F_NC
PR94 *10K/F_0402_NC
12
+
PC70 10U_25V_1206
12
PC71
.1U_50V_0603
1 2
PL7
DC-15D0M012
PR93 0_0402
FDS6676AS
12
PQ47
PC163 *.1U_50V_0603_NC
1 2
12.2*12.2*6
PC72
2200P_50V_0402
7
8
2
351 876
2
351
+5V_SUS
*CH501H_NC
PQ48 IRF7413ZTRPBF
PC164
6
.1U_50V_0603
4
4
PR181
10 Ohm for SC480
21
PD8
1.8BST
12
0_0402
V_DDR_MCH_REF
1 2
PR98 *0_0402_NC
PU13
TPS51116
22
PR182 0_0603
1.8V_DH
21
1.8V_LX
20
1.8_DL
19
18
17
1.8V_OUT
8
1.8V_FB
9
51116_COMP
6
12
PC162 *1U_10V_0603_NC
10 Ohm for SC480
1U for SC480
PR99
5.1_0603
12
PC167 1U_10V_0603
PC74 1U_10V_0603
VBST
DRVH
LL
DRVL
PGND CS_GND
VDDQSNS VDDQSET
COMP
1 2
14
15
PGOOD
VDDP(V5IN-TI)
VDDP(V5FILT-TI)
VLDOIN
VTTGND
TON(MODE)
VTTSNS
VTTREF
GND
5
3
29
PR180 0_0402
12
PC159 .033U_25V_0603
PR183
7.5K/F_0402
PC166 1000P_50V_0402
16
CS
13 12
NC
11
S5
10
S3
51116_VLDOIN
23
7
NC
1U_10V_0603
1 4
24
VTT
2 25
PAD
26
PAD
PAD27PAD28PAD
PR91 0_0402
1.8V_LX
PR97
*12.7K/F_NC
1 2
12
PC161
PC155 .1U_10V_0402
51116_TON
12
PC68 *1000P_50V_0402_NC
+3.3V_SUS
0_0805 PR177
*0_0805_NC
1 2
PR90 *0_0402_NC
PR184 100K_0402
PR179
PC160 10U_4V_0805
1 2
51116_VIN
PR92 *604K_NC
SUSPWROK_1P8V 40
SUSPWROK_5V 46
RUN_ON 19,27,29,40,44,46,47
+1.8V_SUS_P
+1.5V_RUN
PC158 10U_4V_0805
1 2
1 2
+1.8V_SUS_P
PC156 10U_4V_0805
+0.9V_DDR_VTT_P
PJP12
POWER_JP
1 2
0.9 Volt +/-5% Design Current:1.05A Maximum Current: 1.5A Current limit =3.8A
+0.9V_DDR_VTT
DePOP for TI51116
"IRF7413ZTRPBF"---Id=13A,Rdson=10.5mOhm@Vgs=4.5V (P/N:BAM74130036) / (TRANS MOSFET IRF7413ZTRPBF(30V,13A)L-F);
"FDS6676AS"---Id=14.5A,Rdson=5.9mOhm(25 )@Vgs=4.5V ; ,Rdson=8.11mOhm(100 )@Vgs=4.5V℃℃ (P/N:BAM66760026) / (TRANS MOSFET FDS6676AS_NL(30V,14.5A)ROHS); Use the worst-case value for RDS(ON) from the MOSFET data sheet, and add a margin of 0.5%/°C for the rise in RDS(ON) with temperature.
OCP=14A; Rdson=5.9mOhm(25 )
A A
OCP=10.6A; Rdson=8.11mOhm(100 )
QUANTA
Title
Size Document Number Rev
5
4
3
2
Date: Sheet
1.8V,0.9V
DM5 1A
星期二
27, 2005
十二月
1
of
43 59,
Page 44
1
2
3
4
5
POP for TPS51483
A A
12
PC27
2200P_50V_0402
1.5 Volt +/-5% Design Current:3.475A
B B
PJP6
12
SANYO-2 R 5TPE220MF-
MfrPN:2R5TPE220MF-
7.3*4.3*1.8-15mohm
C C
D D
Maximum Current: 5.9A
+1.5V_RUN
OCP: min A; max A
12
PJP8 POWER_JP
+1.5V_RUN_P
12
PC32 .1U_10V_0402
AGND1
PC31
RUN_ON19,27,29,40,43,46,47
12
+
PR139 0_0402
1
PC26 .1U_50V_0603
1 2
220U_2.5V__15mOhm
RUN_ON19,27,29,40,43,46,47
12
PC116
100P_50V_0402
47pF for SC483
AGND1
+5V_SUS
5
+PWR_SRC
12
PJP4 POWER_JP
12
+
PC22 10U_25V_1206
PL5
3.8UH_SIL1045R_3R8_8A/21mohm
10*10*4.5
DC-38800000
PR23 15K/F_0603
30K for SC483
1.5V_FBK
15Kfor SC483
PR22 15K/F_0603
1.05V_RUN_PWRGD40,45
PR49 100K_0402
1 2
34
PQ13A 2N7002DW
51483_VIN1
12
+
PC23 10U_25V_1206
PQ12
SI4800BDY
12
PQ11
SI4810BDY
PR48 *0_0402_NC
+5V_SUS
1 2
61
2
876
2
351 876
2
351
+3.3V_RUN
PR50 100K_0402
PQ13B 2N7002DW
+5V_SUS
3
1
4
PC122
12
.1U_50V_0603
4
+PWR_SRC
39P_50V_0402
PC137
12
PR157
*100K_0402_NC
AGND2
1.05V_RUN_PWRGD
PD25 *CH751H-40HPT_NC
2
PD3 *BAT54A_NC
2
PR28
*13K/F_NC
PR34 *715K/F_NC
PR45
11.8K/F_0603
PR47
29.4K/F_0603
15Kfor SC483 16.5Kfor SC483
21
PR31 1K/F_0402
PR148 1K/F_0402
PR33 0_0402
5VCCA1
PR142 10_0402
5VCCA2
PR41 10_0402
12
PC135
1U_10V_0603
1U_10V_0603
12
PC119
1.5V_BST
1.5_DL
EN2
5VCCA2
PR46
*0_0402_NC
EN2
TON1
1.5V_DH
1.5V_LX
PU9 SN0508073
3
VDDP1
1
PGND1
6
DH1
ILIM1
4
ILIM1
5
LX1
7
BST1
2
DL1
TON2
9
TON2
8
EN/PSV2
10
VOUT2
11
VCCA2
13
PGOOD2
12
FBK2
14
AGND2
AGND2
1.5V_RUN_PWRGD
EN1
12
PC185 *.47U_10V_0603_NC
Jason_1208:Add PC185 and PD25 follow M07 A07
PR26
280K/F_0402
12
PC124 *1000P_50V_0402_NC
AGND1 AGND2
12
PC123 1U_10V_0603
AGND2
AGND1
Jason_1219:Change PU9 from TPS51483 to SN0508073 for DELL requset.
28
AGND1
27
PGOOD1
26
FBK1
25
VCCA1
24
VOUT1
23
TON1
22
EN/PSV1
21
BST2
20
DH2
19
LX2
18
ILIM2
17
VDDP2
16
DL2
15
PGND2
ILIM2
PR42
ILIM1
PR25
1.5V_LX 1.05V_LX
3
AGND1
1.5V_RUN_PWRGD
1.5V_FBK 5VCCA1 +1.5V_RUN_P
TON1
1.05V_BST
EN1
1.05V_DH
1.05V_LX ILIM2
6.04K/F_0402
11.8K/F
TON2
PR29 *1M_NC
PR32 0_0402
+3.3V_RUN
+PWR_SRC
PR153 *25.5K/F_NC
+5V_SUS
12
PC136 1U_10V_0603
AGND1
PR39
294K/F_0402
12
PC129 *1000P_50V_0402_NC
DePOP for TPS51483
+PWR_SRC
PR137 *100K_0402_NC
1.5V_RUN_PWRGD 40
12
PJP3 POWER_JP
51483_VIN2
1 2
PC24 .1U_50V_0603
12
PC25
2200P_50V_0402
12
+
PC20 10U_25V_1206
1.05 Volt +/-5% Design Current:6.02A Maximum Current: 8.6A OCP: min A; max A
12
+
PC21 10U_25V_1206
1.05V
+1.05V_VCCP
PC132
12
.1U_50V_0603
1.05V_DL
"SI4800BDY"---Id=6.5A,Rdson=23mOhm@Vgs=4.5V (P/N:BAM48000040) / (TTRANS MOS SI4800BDY-T1-E3(30V7A,SOIC)L-F);
"SI4810BDY"---Id=7.5A,Rdson=16mOhm(25 );Rdson=22mOhm(100 ) @Vgs=4.5V (P/N:BAM48100036) / (TRANS MOS SI4810BDY-T1-E3(30V,10A)L-F);
1.5V_OCP=7.99A;Rdson=16mOhm(25 )
AGND2
1.5V_OCP=5.98ARdson=22mOhm(100 )
1.05V_OCP=11.48ARdson=5.9mOhm(25 )
1.05V_OCP=8.7ARdson=8.11mOhm(100 )
"FDS6612A"---Id=8.4A,Rdson=30mOhm@Vgs=4.5V (P/N:BAM66120027) / (TRANS MOSFET FDS6612A_NL(30V,8.4A)SOP);
"FDS6676AS"---Id=14.5A,Rdson=5.9mOhm(25 )@Vgs=4.5V ; ,Rdson=8.11mOhm(100 )@Vgs=4.5V (P/N:BAM66760026) / (TRANS MOSFET FDS6676AS_NL(30V,14.5A)ROHS);
876
4
4
PQ10 FDS6612A_NL
PL4
1.5UH_SIL104R-1R5PF_10A/8.1 mohm
2
351
1 2
10*10*3.8
876
PQ9 FDS6676AS
2
351
PC30
12
+
470U_4V_15mOhm
+1.05V_VCCP_P
12
+
PC28
*470UF_4V_15mOhm_NC
12
PC29 .1U_10V_0402
AGND2
PR158 0_0402
℃℃
℃ ℃
℃ ℃
℃℃
PJP5
POWER_JP
1 2
PJP7
POWER_JP
1 2
NEC-TEP S LD0G477M(15)12R -
7.3*4.3*2.8-15mohm
QUANTA COMPUTER
1.8V,0.9V,1.5V,1.05V
DM5 1A
星期二
27, 2005
十二月
5
of
44 59,
Depend on Semtech request, we must use AGND1,AGND2 and power GND.
4
Title
Size Document Number Rev
Date: Sheet
Page 45
A
1 1
Throttling temp. 105 degree C
Close to Phase 1 Inductor lower MOSFET
JASON_1014: Change for M07 A07.
PR9 0_0402
1.05V_RUN_PWRGD40,44
12
PR6
*0_0402_NC
CPU_VID04 CPU_VID14
CPU_VID24 CPU_VID34 CPU_VID44 CPU_VID54 CPU_VID64
RUNPWROK27,28,40
H_DPRSTP#3,11
CLK_ENABLE#17
1 2
332/F_0402
PC120
1 2
1500P_50V_0402
PC117 220P_50V_0402
A
H_PSI#3
RUNPWROK27,28,40
12
PR128 0_0402
12
PR12 0_0402
PR27 2. 2K /F _0402
12
PR16 499_0402
PR129 0_0402
1 2
PC121
680P_50V_0402
1 2
1 2
1 2
PR21 6 .34K /F _0402
PC114 1000P_50V_0402
PR154
12
0_0603
PR38
12
*0_0603_NC
PR132 *0_0402_NC
PR131 *0_0402_NC
PR133 0_0402
PR136 147K/F_0402
PR7
12
*470K_0402_NTC_NC
PC113 .01U_25V_0402
CPU_VID0 CPU_VID1 CPU_VID2 CPU_VID3 CPU_VID4 CPU_VID5 CPU_VID6
12
12
12
PR24
82.5K/F_0402
6260_COMP
12
+3.3V_RUN
PR17 100K
IMVP6_PROCHOT#28
2 2
Jason 1011: change PC113 from .22u to .01u follow M07.
DPRSLPVR6,13
PR30
3 3
4 4
"TPCA8005-H"---Id=14A,Rdson=9.5mOhm@Vgs=4.5V (P/N:BAM80050006) / (TRANS MOS TPCA8005-H(30V,27A)SOP8 L-F);
"IRF7821"---Id=10A,Rdson=9.5mOhm@Vgs=4.5V (P/N:BAM78210034) / (TRANS MOSFET IRF7821TRPBF(30V,13.6A)L-F);
"PH3230S"---Id=25A,Rdson=4.4mOhm@Vgs=4.5V (P/N:BAM32300Z02) / (TRANS MOSFET PH3230S(30V107A)SOT669 L-F);
"IRF7832"---Id=16A,Rdson=3.7mOhm@Vgs=4.5V (P/N:BAM78320018) / (TTRANS MOSFET IRF7832TRPBF(30V,20A)L-F);
+5V_RUN
PR150 10_0603
1 2
PC131
12
1U_10V_0603
12
6260_PSI
12
12
6260_PGDIN
12
6260_RBIAS
12
6260_NTC
6260_SOFT
1 2
6260_VRON 6260_DPRSLPVR 6260_DPRSTP
PR147
1 2
0_0402
6260_FB
6260_VW
12
B
+CPU_PWR_SRC
PC125
12
6260_VDD
19
VSS
41
GND
1
PSI#
2
PGD_IN
3
RBIAS
4
VR_TT#
5
NTC
6
SOFT
28
VID0
29
VID1
30
VID2
31
VID3
32
VID4
33
VID5
34
VID6
35
VR_ON
36
DPRSLPVR
37
DPRSTP#
38
CLK_EN#
11
VDIFF
10
FB
9
COMP
8
VW
PC133 1000P_50V_0402
B
1 2
.01U_25V_0402
6260_VIN
20
18
VIN
VDD
ISL6260_MLFP_40
RTN
13
+3.3V_RUN
PR35 10_0603
1 2
12
PC112
.01U_25V_0402
6260_3V3
39
PU8
VSEN
DROOP
12
14
PR44
1 2
10K/F_0402
6260_DROOP
PC19 330P/50V/0603
12
PC134 1000P_50V_0402
PR13 10_0603
+3.3V_RUN
3V3
PWM1
PWM2
PWM3
OCSET
FCCM
ISEN1
ISEN2
ISEN3
VSUM
12
40
PGOOD
PAD PAD PAD PAD PAD PAD PAD PAD PAD
VO
DFB
15
PR130
1.91K/F_0603
24
27
23
*10K/F_0402_NC
26
22
*10K/F_0402_NC
25
21
*10K/F_0402_NC
7
17
42 43 44 45 46 47 48 49 50
16
6260_DFB
ISL6260_VO
12
C
12
FCCM
PWM1
6260_ISEN1
PR138
PWM2
6260_ISEN2
PR143
6260_PWM3
6260_ISEN3
PR145
6260_OCSET
12
PC128 . 33U_16V_0603
12
PR43 1K/F_0402
Parallel
C
PC17
*.1U_50V_0603_NC
1 2
12
12
1 2
PC127 .012U_50V_0603
PC126 *.01U_25V_NC
IMVP_PWRGD 13,40
12
PC115 .22U_25V_0603
12
PC118 .22U_25V_0603
12
PC130 .22U_25V_0603
PR20
11.5K/F_0402
VSUM
PR37
4.53K/F_0402
PR8
1 2
6.8K_0402_NTC
12
PC18 *.1U_50V_0603_NC
VCCSENSE 4
VSSSENSE 4
VSUM
PR36
3.57K/F_0402
Close to Phase 1 Inductor
1 2
PR40 15K/F_0402
1 2
D
PR141 7.68K/F_0805
1 2
PR140 10K/F_0402
1 2
PR144 10_0402
1 2
PR149 7.68K/F_0805
VSUM
1 2
PR146 10K/F_0402
1 2
PR151 10_0402
1 2
6260_PWM3
VSUM
D
1U_10V_0603
PR152 7.68K/F_0805
1 2
PR155 10K/F_0402
1 2
PR156 10_0402
1 2
E
+5V_RUN
12
PC3
PU1
5
VCC
2
PWM
6
FCCM
3
GND
+5V_RUN
12
PC101
1U_10V_0603
PU6
5
VCC
2
PWM
6
FCCM
3
GND
+5V_RUN
12
PC102
1U_10V_0603
PU7
5
VCC
2
PWM
6
FCCM
3
GND
CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
CPU_VID5
CPU_VID6
E
PAD
9
PAD
9
PAD
9
PR19
PR18
PR10
PR125
PR126
PR11
PR127
BOOT UGTE PHSE LGTE
BOOT UGTE PHSE LGTE
BOOT UGTE PHSE LGTE
1 8 7 4
ISL6208_QFN
1 8 7 4
ISL6208_QFN
1 8 7 4
ISL6208_QFN
*0_0402_NC
*0_0402_NC
*0_0402_NC
*0_0402_NC
*0_0402_NC
*0_0402_NC
*0_0402_NC
PR5 0_0603
1 2
UG1 PH1 LG1
PR1 0_0603
1 2
UG2 PH2
LG2
PR121 0_0603
1 2
UG3 PH3
LG3
12
12
12
12
12
12
12
.22U_50V_0805
1 2
1 2
1 2
IRF7821TRPBF
PC1
PQ41 FDS7088SN3
IRF7821TRPBF
PC2 .22U_50V_0805
PQ39 FDS7088SN3
IRF7821TRPBF
PC100 .22U_50V_0805
FDS7088SN3
F
PQ3
4
4
PQ4
4
4
PQ5
4
PQ40
4
0 0 0 0 0 0 0 )1.500V 0 0 0 0 0 0 1 )1.4875 0 0 0 0 1 0 1 )1.4375 0 0 0 0 1 1 1 )1.4125 0 0 0 1 0 0 0 )1.4000 0 0 1 0 0 0 1 )1.2875 0 0 1 1 0 0 0 )1.2000 0 0 1 1 1 0 0 )1.1500 0 1 0 1 0 0 0 )1.0000 0 1 0 1 0 1 1 )0.9625 0 1 1 1 1 0 0 )0.7500 1 0 0 0 1 0 0 ) 0.6500 1 0 1 0 0 0 0 )0.5000 1 1 0 0 0 0 0 )0.3000
F
876
2
351
876
2
351
876
9
2
351
876
9
2
351
876
9
2
351
876
9
2
351
9
2200P_50V_0402
9
12
PC9
2200P_50V_0402
1.5n_50V_0603
D1 D0D2D3D4D5D6
PC4
1.5n_50V_0603
PC105
Output
G
+CPU_PWR_SRC
12
12
PC13
.1U_50V_0603
12
PC111
12
PC8
2200P_50V_0402
12
PC106
1.5n_50V_0603
12
12
PC10 .1U_50V_0603
PC7 10U_25V_1206
10*11.5*4
PL1 0.45U_ET QP 4LR45X FC _25A_1mohm
2 1
3
4
12
Title
Size Doc u m en t N u m be r Re v
Date: Sheet
G
H
+CPU_PWR_SRC_3
1 2
1 2
PC104 10U_25V_1206
10*11.5*4
PL3 0.45U_ET QP 4LR45XF C_25A_1mohm
2 1
3
4
12
12
PC12 .1U_50V_0603
10*11.5*4
PL2 0.45U_ET QP4LR 45XF C_25A_1mohm
2 1
3
4
+CPU_PWR _SRC_3
12
PC5 10U_25V_1206
12
PR311=15.5K ; OCP=55A PR311=20K ; OCP=95A
PJP1 POWER_JP
1 2
PJP2 POWER_JP
1 2
PC11 10U_25V_1206
Jason_1216: Reserved PC186 100UF_25V AL Cap for CPU noise issue.
PC14
+CPU_PWR_SRC
12
PC6 10U_25V_1206
1.5 Volt +/-5% Design Current:3.475A Maximum Current: 4.964A OCP: min A; max A
12
PC109
PC107
+
.1U_10V_0402
*330U_2V_ESR6_NC
12
.1U_10V_0402
PC103 10U_25V_1206
12
12
PC176
.1U_10V_0402
12
PC110
+
+
PC138
330U_2V_ESR6
330U_2V_ESR6
12
+
12
PC140
+
330U_2V_ESR6
+VCC_CORE
PC186 *100U/25V_NC
12
NEC-TEPSGV0E337M9-12R-
7.3*4.3*1.9-9mohm
+PWR_SRC
12
+
PC108
+
QUANTA COMPUTER
CPU POWER
DM5 1A
星期二 十二月
27, 2005
45 59,
of
H
+VCC_CORE
PC139
*330U_2V_ESR6_NC
+VCC_CORE
330U_2V_ESR6
Panasonic-EEFSX0D331XR
7.3*4.3*1.9-6mohm
Panasonic-EEFSX0D331XR
7.3*4.3*1.9-6mohm
Page 46
1
2
3
+PWR_SRC
4
5
+PWR_SRC
12
PC83
SUS_ENABLE 47
PR103 0_0402
4
THERM_STP#32
℃ ℃
PJP18 POWER_JP
51120_VIN1
12
+
10U_25V_1206
12
+
PC80
3.8UH_SIL1045R_3R8_8A/21mohm
10*10*4.5
PR104 *0_0402_NC
PR105 *0_0402_NC
PR107 10K_0402
DC-38800000
2
12
PC88
2200P_50V_0402
PQ35
SI4800BDY
PL9
12
SUS_ON2 7,40,47
Jason_1205:Add PR222 follow M07 A06
1
PD10 BAT54C
ALWON27
3
℃℃
PR116
4.7_0603
PC96 1U_10V_0603
TPS51120
PU5
VIN V5FILT EN5 BST2 DRVH2 LL2 DRVL2 PGND2 VO2 VFB2 EN2
EN1 VREG3 EN3
SKIPSEL
32
51120_SKIP
PR195*0_0402_NC
+3.3V_ALW
31
PR111
12
PQ38
2N7002W-7-F
3
VREG5
VBST1
DRVH1
DRVL1
PGND1
COMP1 COMP2
VREF2
TONSEL
PGOOD1 PGOOD2
PAD
PAD34PAD35PAD36PAD
33
PR197*0_0402_NC
PR101 0_0402
PC173
4.7U_10V_1206
BST3 DH3 LX3 DL3
12
+
PC97
10U_25V_1206
+VCC_TPS51120
PQ36
FDN340P_NL
2
12
22 20
9 13 14 15 16 17
8
6 12
29 19 10
2
470K_0402
31
PC85
.1U_50V_0603
1 2
876
4
2
351
876
4
PQ32
SI4810BDY
2
351
PR222 100K_0402
PR114 10K_0402
2
PC94 .1U_50V_0603
1 2
CT_1027: Change PR10, PR109 from 0 ohm to 2.2 ohm per EMI
12
51120_VFB2 51120_EN2
51120_EN1
+3.3V_RTC_LDO
12
PC86 *1000P_50V_0402_NC
THERM_STP#
+3.3V_RTC_LDO
THERM_STP#
PR110
2.2_0603
PC93
1 2
.1U_50V_0603
PC91
.1U_50V_0603
PR108 10K_0402
12
PR204 470K_0402
Jason_1213:Add soft start follow CDC request
+5V_ALW+VCC_TPS51120
21
BST5
28
DH5
27
LX5
26
LL1
DL5
25 24 1
VO1
3
VFB1
2 7
23
CS1
18
CS2
4 31
5
GND
30 11
37
PR192*0_0402_NC
12
+
PR109
2.2_0603
51120_VFB1
VREF2
VREF2
PR193 *0_0402_NC
PQ51
*BSS84LT1G_NC
3 1
2
31
PC174
10U_25V_1206
PC92 .1U_50V_0603
12
PR196
*200K_NC
2
PQ52 *2N7002W-7-F_NC
3.3 Volt +/-5%
A A
Design Current:4.24A Maximum Current: 6.06A OCP: min A; max A
1 2
PQ30
PC79
.1U_10V_0402
*10U_25V_1206_NC
PC77
4.7U_10V_1206
SUS_ENABLE
3
FDC655BN
+
+VCC_TPS51120
+3.3V_RTC_LDO
PC87
5
2 1
12
PU4
7SH32
1
+3V_SRC_P
PC78 .1U_10V_0402
PR102
*0_0402_NC
+3.3V_SUS
+3.3V_SRC
65241
B B
C C
D D
PJP16
POWER_JP
1 2
1 2
PJP17 POWER_JP
220U/6.3V/ESR25
SANYO-6TP E220M -
7.3*4.3*1.9-25mohm
1 2
AUX_EN27,37
SUS_ON27,40,47
"SI4800BDY"---Id=6.5A,Rdson=23mOhm@Vgs=4.5V (P/N:BAM48000040) / (TTRANS MOS SI4800BDY-T1-E3(30V7A,SOIC)L-F);
"SI4810BDY"---Id=7.5A,Rdson=16mOhm(25 ) ; Rdson=22mOhm(100 ) @Vgs=4.5V (P/N:BAM48100036) / (TRANS MOS SI4810BDY-T1-E3(30V,10A)L-F); 3V_OCP=7.375A;Rdson=16mOhm(25 ) 3V_OCP=5.364ARdson=22mOhm(100 )
5.5V_OCP=9.4ARdson=15mOhm(25 )
5.5V_OCP=7.2ARdson=20.62mOhm(100 )
"FDS6612A"---Id=8.4A,Rdson=30mOhm@Vgs=4.5V (P/N:BAM66120027) / (TRANS MOSFET FDS6612A_NL(30V,8.4A)SOP);
"FDS6690AS"---Id=10A,Rdson=15mOhm(25 );Rdson=20.62mOhm(100 ) @Vgs=4.5V (P/N:BAM66900022) / (TRANS MOSFET FDS6690AS_NL(30V,10A)L-F);
12
PJP19 POWER_JP
PC90
.1U_50V_0603
1 2
12
PC95
.1U_50V_0603
876
4
4
+3.3V_SRC
+VCC_TPS51120
PQ34 FDS6612A_NL
2
351 876
4.7uH_STQ1250-4722APF_8A/25mOhm(5mm)
PQ33 FDS6690AS_NL
2
351
12
PC82 1000P_50V_0402
PC175
*1000P_50V_0402_NC
12
PR203
12.1K/F_0402
PR106 100K_0402
4
51120_VIN2
12
12
+
PC170
PC89
10U_25V_1206
2200P_50V_0402
PR100 0_0805
PD9
USM13PT_1A/200V
2 1
15VS
21
43
PL8
12.2*12.2*5.5
PR113
11.8K/F_0402
12
SUSPWROK_5V 43
RUN_O N 19,2 7,29,40,43,44,47
VREF2=2V
Title
Size Document Number Rev
Date: Sheet
12
+
PC172 *10U_25V_1206_NC
+15V_SUS
13
12
PR202
*0_0805_NC
12
PC171
2.2U_25V_1206
PD21
+5VSUS_P
12
PC75
PR115 0_0402
5 Volt +/-5% Design Current:3.647A Maximum Current: 7.1A OCP: min A; max A
PR199 0_0402
+
*0_0603_NC
PJP13
POWER_JP
1 2
PJP14
POWER_JP
1 2
PC73 220U/6.3V/ESR25
PR112
12
PR190
12
0_0603
+5V_SUS
12
12
PC81
2.2U_25V_1206
PR194 *0_0402_NC
PR191 *0_0402_NC
+VCC_TPS51120
PC98
*1000P_50V_0402_NC
PMST2222A
PR198 10K_0402
1
PR200
*0_0402_NC
PR201
*0_0402_NC
PQ54
2
32
MMBZ5245B
.1U_10V_0402
QUANTA COMPUTER
3VALW,5V,3V, power on
DM5 1A
星期二
27, 2005
十二月
5
of
46 59,
SANYO-6TP E220M -
7.3*4.3*1.9-25mohm
Page 47
1
2
3
4
5
Cory_1123:Changed PC168 From
0.033u to 4700p follow M07 A06.
+15V_SUS+5V_ALW
12
12
PR186
A A
RUN_ON19,27,29,40,43,44,46
100K_0402
RUN_ON_5V#
PQ49B 2N7002DW
2
PR185 100K_0402
34
PQ49A
5
2N7002DW
61
3.3VRUN Turn ON Delay : Populate RC components.
RUN_ENABLE
12
PC168 4700P_50V-0603
Cory_1123:Pop PD22 and PD23 for +3.3V_RUN
B B
and +1.8V_RUN fast turn off time follow M07 A06.
Cory_1123:Pop PR219,PC182 and PR220,PC183 let +3.3V_RUN and +1.8V_RUN Turn ON Delay.M07 A06
C C
CT_1213: Pop R389 10ohm and Q40 2N7002 to add a quick discharge path for +3.3V_RUN.
+5V_SUS
6 5 2 1
PR189 is used for Vgs=12V
1 2
1 2
+3.3V_ALW
6 5 2 1
PQ53 FDC653N_NL
4
3
12
PR189 *470K_0402_NC
PD22 CH751H-40HPT
21
PR219 200K
PD23 CH751H-40HPT
21
PR220 200K
PQ37 *FDC653N_NL_NC
4
3
+5V_RUN
12
12
PC169
4.7U_10V_1206
+3.3V_SRC +3.3V_RUN
6 5 2 1
+1.8V_SUS
6 5 2 1
+3.3V_SRC
12
PC84 *1U_10V_0603_NC
PC177
PQ31 FDC653N_NL
4
3
12
PC182 470P_50V
PQ14 FDC653N_NL
4
3
12
PC183
0.01U_25V
*10U_10V_0805_NC
12
PC76
4.7U_10V_1206
+1.8V_RUN
12
PC33 1U_10V_0603
12
PR205 *20K_NC
PC179
SUS_ON_5V#
12
PC178
*10U_10V_0805_NC
PC180
*4.7U_6.3V_0603_NC
SUS_ON27,40,46
12
PR206 *20K_NC
12
PR207 *20K_NC
*4.7U_6.3V_0603_NC
2
CT_1214: Added PR223 30 ohm and Q58 to form a discharge of +3.3V_SUS.
12
PR223 30_0402
Q58
31
2N7002W-7-F
2
2
12
PR187 100K_0402
SUS_ON_5V#
61
PQ50B 2N7002DW
+3.3V_SRC+3.3V_SUS
12
PR211 *30_0402_NC
31
*2N7002W-7-F_NC
Q49
+15V_SUS+5V_ALW
12
PR188 100K_0402
SUS_ENABLE
34
PQ50A
5
2N7002DW
12
PR212 30_0402
31
2
Q50
2N7002W-7-F
SUS_ENABLE 46
+5V_SUS+1.8V_SUS
12
31
2
PR213 *30_0402_NC
Q51
*2N7002W-7-F_NC
+1.5V_RUN+1.8V_RUN+3.3V_RUN+5V_RUN +0.9V_DDR_VTT
12
R388 *1K_NC
RUN_ON_5V#
*2N7002W-7-F_NC
D D
Q39
31
2
2N7002W-7-F
Q40
12
R389 10
31
2
*2N7002W-7-F_NC
Q28
12
R266 *1K_NC
31
2
*2N7002W-7-F_NC
Q37
12
R355 *1K_NC
31
2
*2N7002W-7-F_NC
Q27
12
R265 *1K_NC
31
2
+2.5V_RUN
2
Q36
*2N7002W-7-F_NC
12
31
R354 *1K_NC
QUANTA
Reserve discharge path
1
2
3
4
Title
Size Document Number Rev
Date: Sheet
RUN POWER SW
DM5 1A
星期二
27, 2005
十二月
5
of
47 59,
Page 48
1
A A
Adress : 16H
TYCO-1566657-2
B B
Adress : 16H
SUYIN-200185MR009G505ZL
C C
Three transistor can be used for Q1(pin compatible):FDV301N/FDV303N has low Vgs_on w/buit-in ESD protection.MMBT100 BJT works in reverse conduction mode.
D D
This diode is no-stuff populate if Q1 gets damageed by ESD.
*SSM24_NC
DOCK_PSID39
JDCIN1 POWER_JACK
98765
1
4
AC_OFF28,42
1 2
1 2 3
PL10 BLM11B102S
+DCIN_JACK
DCIN-
21
D11
12
RV2
*VZ0603M260APT_NC
31
2
PQ43
*2N7002W-7-F_NC
2
PC142 2200P_50V_0402
PC141 .1U_50V_0603
1 2
JABT1
BATT1+
BATT2+ SMB_CLK SMB_DAT
BATT_PRES#
SYSPRES#
BATT_VOLT
BATT1­BATT2-
GND10GND
11
PC151 2200P_50V_0402
PC152 .1U_50V_0603
1 2
JABT2
BATT1+
BATT2+ SMB_CLK SMB_DAT
BATT_PRES#
SYSPRES#
BATT_VOLT
BATT1­BATT2-
GND10GND
11
12
PR4 15K/F_0402
12
PR3 100K_0402
FL1
1 2
BLM41PG600SN1L
PR162
*0_0402_NC
2
12
1 2 3 4 5 6 7 8 9
12
1 2 3 4 5 6 7 8 9
2
PQ2
MMST3904
PQ1
3
PR2 *33_NC
1 2
12
2
*SI2301BDS_NC
+3.3V_ALW
DA204U
RP22
4P2R-S-100
2 4
1 2
PR161 100_0402
1 2
PR159 100_0402
+3.3V_ALW
DA204U
RP45
4P2R-S-100
2 4 1 2
PR175 100_0402
1 2
PR168 100_0402
PR120 10K_0402
13
12
1 2
2
FDV301N
1
PC99
1 2
*.1U_50V_0603_NC
1
PQ42
3
PD14
1 3
PD19
1 3
+5V_ALW
PR119
*10K_0402_NC
PR117 33_0402
1 2
+DC_IN
1 2
PC35 .47U_25V_0805
1
1
1
3
2
3
+3.3V_ALW
1
2
3
+3.3V_ALW
1
2
PD2 *DA204U_NC
12
PR53 240K_0402
12
PR52 47K_0402
3
2
1
PD13 DA204U
3
2
PD11 DA204U
3
1
3
2
PD17 DA204U
3
1 2 3
Q49_G
SBAT_ALARM# 28
2
PD20 DA204U
PBAT_ALARM# 28
+5V_ALW +3.3V_ALW
PQ15 FDS6679
8 7 6 5
4
2
1
PD12 DA204U
3
2
1
PD18 DA204U
3
PS_ID_DISABLE# 27
2
1
PD1 DA204U
3
+DC_IN_SS
12
PC37
.01U_50V_0603
SBAT_SMBCLK 19,27 SBAT_SMBDAT 19,27
PBAT_SMBCLK 27,42 PBAT_SMBDAT 27,42
This resistor must be depopulated if FDV301N/FDV303 are used to aviod a 1.36mA constant current drain from +3VALW.Thus, Bios will not be to switch Q1 off. MMBT100 will not have that issue.
12
PR118
2.2K_0402
12
PR51
4.7K_0805
12
PC34
.1U_50V_0603
12
PC38
.1U_50V_0603
4
+PBATT 41
PS_ID 27
12
PC36 10U_25V_1206
+SBATT 22,41
+3.3V_ALW
12
PR160 10K_0402
+3.3V_ALW
12
PR173 10K_0402
5
SBAT_PRES# 28,41
PBAT_PRES# 28
QUANTA
Title
Size Document Number Rev
3
4
Date: Sheet
DCIN,BATT CONNECTOR
DM5 1A
星期二
27, 2005
十二月
5
of
48 59,
Page 49
1
2
3
4
5
6
7
8
DM5 Power Design Block Diagram
PQ44
+DC_IN
FDS6679
A A
Power Jack
+DC_IN_SS
RUNPWROK
+3.3V_RUN+5V_RUN
CPU POWER
IMVP_PWRGD
ISL6260
Adapter input
(From SMSC)
PBAT_SMBCLK
PBAT_SMBDAT
Charger
+ISL6208
DUAL PHAS SOLUTION
Pag 45
+VCC_CORE
MAX8731
(To SMSC)
ADAPT_OC
Pag 42
+VCHGR
B B
+SDC_IN
SUS_ON/ALWON/THERM_STP#
SUS_ON/ALWON/THERM_STP#
SYSTEM POWER
TPS51120
Pag 46
Primary Battery
Secondary Battery
Battery Selector
Pag 41
+PWR_SRC
SUSPWROK_5V
+5V_SUS
DDR POWER
TPS51116
SUSPWROK_5V
+3.3V_SRC
+5V_SUS
+15V_SUS
+3.3V_ALW +5V_ALW
SUSPWROK_1P8V
+1.8V_SUS
(SC480)
RUN_ON
PQ75
C C
+3.3V_SRC
AO6408
+3VSUS
Pag 43
+5V_SUS
SUS_ENABLE
RUN_ON
N&S BRIDGE POWER
TPS51483
+5V_SUS
+3.3V_SRC
RUN POWER PLANE SWITCH
+5V_RUN
+3.3V_RUN
RUN_ON
(SC483)
Pag 44
+0.9V_DDR_VTT
PGD_IN
+1.5V_RUN
+1.05V_VCCP
+1.8V_SUS
D D
Pag 47
+1.8V_RUN
+3.3V_ALW+3.3V_SRC
QUANTA
Title
RUN_ON
1
2
3
4
5
6
Size Document Number Rev
Date: Sheet
Power Block Diagram
DM5 1A
星期二
27, 2005
十二月
7
of
49 59,
8
Page 50
1
2
3
4
5
6
7
8
+3.3V_SUS
2.2K 2.2K
A A
ICH7-M
Page 13
B B
ICH_SMBCLK
ICH_SMBDATA
+3.3V_ALW
10K
10
CLK_SMB
9
DAT_SMB
7002
7002
Mini Card
Page 23
10K
+3.3V_RUN
2.2K2.2K
CLK_SCLK
CLK_SDATA
8
7
CLK GEN.
Page 17
DIMM 0
Page 15
DIMM 1
Page 15
GUARDIAN
Page 32
SMBUS ADDRESS [2F]
+5V_ALW
8.2K
39
40
DOCKING
Page 39
SMBUS ADDRESS [C4, 72, 70, 48]
6
DOCK_SMB_CLK
5
DOCK_SMB_DAT
8.2K
+3.3V_ALW
C C
SIO MEC5004
112
SBAT_SMBCLK
111
SBAT_SMBDAT
8.2K
8.2K
100
100
3
4
6
5
2'nd BATTERY
Page 48
INV
Page 19
SMBUS ADDRESS [16]
Inverter SMBUS ADDRESS [58]
+3.3V_ALW
8.2K
8
D D
Page 27
1
PBAT_SMBCLK
7
PBAT_SMBDAT
2
3
8.2K
100
100
4
3
Page 48
Page 42
SMBUS ADDRESS [16]
SMBUS ADDRESS [12]
6
QUANTA
Title
Size Document Number Rev
Date: Sheet
SMBUS Block Diagram
DM5 1A
星期二
27, 2005
十二月
7
of
50 59,
8
BATTERY
4
CONN
9
CHARGER
10
5
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