DELL 1735 Schematics

1
www.kythuatvitinh.com
Digitally signed by dd DN: cn=dd, o=dd, ou=dd, email=dddd@yahoo.com, c=US Date: 2009.11.14 06:11:29 +07'00'
2
3
4
5
6
7
8
GM3(B) Pacino Intel Discrete & UMA Block Diagram
VER : 3A
A A
Screw Hole
PG 45
blank Page
PG 47
Merom or Penryn
(478 Micro-FCPGA)
FAN & THERMAL
SMSC1423
PG 39
CLOCK
POWER
AC/BATT CONNECTOR
PG 54
B B
DDR2-SODIMM1
PG 15,16
DDR2-SODIMM2
PG 15,16
SYSTEM RESET CIRCUIT
BATT CHARGER
RUN POWER SW
+3.3V_SUS/+5V_SUS +5V/+3.3V/+1.8V
667 MHZ DDR II
667 MHZ DDR II
SATA-ODD
SATA-HDD
PG 36
PG 36
PG 44
PG 46
PG 53
SATA
SATA
Crestline
1299 uFCBGA
DMI interface
PG 3,4
800 MHz FSB
GDDR2 x 8 (256M)
PG 5,6,7,8,9,10
ICH8-M
C C
IHDA USB2.0
AUDIO/AMP
STAC9228/92HD73C
PG 40
Audio SPK conn
PG 40 PG 41
D D
Audio Jacks x3
Camera + D-MIC
PG 41
USER INTERFACE
PG 38
KBC
ITE8512
SPI PS/2
FLASH 2Mbyts
PG 32
LPC
PG 31
676 BGA
PG 11,12,13,14
CIR
TSOP36136TR
PG 37
18X8
Keyboard
PG 37
Touchpad
PG 37
SLG8SP513V (QFN-64)
PCIEx16
IHDA USB2.0 x 3 PCIEx1
PCIEx1 USB2.0
PCIEx2 USB2.0 PCIEx1 USB2.0 USB2.0
Biometric
33MHz PCI
PG 17
ATI M86-M
PCI EXPRESS GFX
PG 18,19,20,21,22PG 23, 24
SiI1392
PG 38
8-in-1 Card Reader
1
2
3
4
5
POWER
+1.5V_RUN/+1.05V_VCCP
REGULATOR
+1.8V_SUS/+1.25V_RUN /+0.9V_DDR_VTT
LVDS
VGA
HDMI
PG 18
USB conn x 3
R5C833
PG 35
PG 28
6
PG 48
PG 49
CPU VRREGULATOR DC/DC
+3.3V_ALW/+5V_ALW/ +15V_ALW
VGA Core
Panel Connector
CRT CONN.
HDMI CONN.
PG 26
PG 27
PG 25
PG 51
PG 52
PG 50
LAN BCM5784M
PG 42
RJ45/Magnetics
PG 43
EXPRESS-CARD
PG 30
MINI-CARD
WLAN
MINI-CARD
WWAN
MINI-CARD
WPAN
1394 CONN.
Card Reader CONN.
Title
Title
Title
Schematic Block Diagram1
Schematic Block Diagram1
Schematic Block Diagram1
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
GM3 2B
GM3 2B
GM3 2B
Date: Sheet
Date: Sheet
Date: Sheet
PG 34
PG 33
PG 33
QUANTA
QUANTA
QUANTA COMPUTER
7
PG 29
PG 30
of
of
of
162Monday, March 24, 2008
162Monday, March 24, 2008
162Monday, March 24, 2008
8
1
www.kythuatvitinh.com
2
3
4
5
6
7
8
Table of Contents Power States
PAGE DESCRIPTION
Schematic Block Diagram
1 2
Front Page
3-4
Merom
5-10
Crestline ICH8M
A A
B B
C C
11-14
DDRII SO-DIMM(200P)
15-16
17
Clock Generator
18-24
VGA
25
HDMI
26
LCD connector
27
CRT
28
Card reader PCI interface
29
Card reader & 1394
30
Express card & card reader conn. SIO
31 32
Flash/RTC
33
WWAN/WPAN
34
WLAN
35
USB port SATA HDD & ODD
36 37
TP/KB/MB/CIR
38
switch/LED FAN/Thermal
39
Audio/CONN.
40-41 42-43
Docking Conn/Q-Switch System Reset Circuit
44
Screw hole & Charger
45-46
47
Blank page
48
1.05VCCP & 1.5VRUN
49
1.8VSUS & 0.9VTT
50
VGA power circuit CPU_ISL6266 (2phase)
51
D/D ISL6237 3.3V/5V
52 53
RUN Power Switch
54
DCIN,Batt
55
EMI CAP
56
SMBUS BLOCK
57
Power statu & Block diagram
POWER PLANE
+PWR_SRC +RTC_CELL +3.3V_ALW +5V_ALW +15V_ALW +3.3V_LAN +5V_SUS +3.3V_SUS +1.8V_SUS +0.9V_DDR_VTT +5V_RUN +3.3V_RUN +1.8V_RUN +1.5V_RUN +1.25V_RUN +1.05V_VCCP +VCC_CORE +LCDVCC +5V_MOD +5V_HDD +5V_ALW2
10V~+19V
+3.0V~+3.3V
+3.3V +5V +15V +3.3V +5V +3.3V +1.8V +0.9V +5V +3.3V +1.8V +1.5V +1.25V +1.05V
+0.7V~+1.5V
+3.3V +5V +5V +5V
GND PLANE PAGE
8731AGND AGND_0.9V AGND_DC/DC AGND_DC2 AGND_DDR AGND_ISL6260
GND
46 49 52 48 49 51 ALL
4,26,32,34,48,49,50,51,52,55 11,14,31,32
3,13,26,31,32,34,36,37,38,44,46,49,52,53,54
35,36,46,48,49,52,53,54 26,36,37,52,53 42,43 14,38,50,51,53 3,11,12,13,14,20,30,37,38,43,48,49,50,51,53 6,8,9,15,48,49,50,53,55 16,49,53
14,20,25,27,36,37,38,39,40,41,53 6,8,9,11,12,13,14,15,17,19,20,22,25,26,27,28,
30,33,34,36,38,39,40,41,42,53,55 19,20,21,22,23,24,25,38,53
4,9,14,30,33,34,48,,53,55 6,9,14,49,53 3,4,5,6,8,9,11,14,37,48,55 4,51 26 36 36 37,38.52,53
DESCRIPTION
DESCRIPTION
MAIN POWER RTC 8051 POWER LCD/CHARGE POWER LARGE POWER LAN POWER SLP_S5# CTRLD POWER SLP_S5# CTRLD POWER SODIMM POWER SODIMM POWER SLP_S3# CTRLD POWER SLP_S3# CTRLD POWER SDVO POWER CALISTOGA/ICH8 POWER CALISTOGA/ICH8 POWER CPU/CALISTOGA/ICH8 POWER CPU CORE POWER LCD Power Module Power HDD Power LED power source
CONTROL SIGNAL
ALWON ALWON +5V_ALW AUX_ON SUS_ON
3.3V_SUS_ON DDR_ON
0.9V_DDR_VTT_ON RUN_ON
3.3V_RUN_ON RUN_ON
1.5V_RUN_ON
1.25V_RUN_ON
1.05V_RUN_ON IMVP_VR_ON
LCDVCC_TST_EN & ENVDD
MODC_EN# HDDC_EN# LDO output
ACTIVE INVOLTAGE PAGE
S0~S5 S0~S5 S0~S5 S0~S5 S0~S5
D D
QUANTA
QUANTA
QUANTA COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
1
2
3
4
5
6
Date: Sheet
Date: Sheet
Date: Sheet
Index & Power Status
Index & Power Status
Index & Power Status
GM3 2B
GM3 2B
GM3 2B
7
of
of
of
262Monday, March 24, 2008
262Monday, March 24, 2008
262Monday, March 24, 2008
8
1
www.kythuatvitinh.com
2
3
4
5
6
7
8
H_D#[0..63] H_D#[0..63]
T148
T148 PAD
PAD
H_D#[0..63]
T152
T152 PAD
PAD
Place C close to the CPU_TEST4 pin. Make sure CPU_TEST4 routing is reference to GND and away from other noisy signal.
31
Q29
Q29 2N7002W-7-F
2N7002W-7-F
2
H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9
T147
T147
H_D#10
PAD
PAD
H_D#11 H_D#12 H_D#13 H_D#14 H_D#15
H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25
T156
T156
H_D#26
PAD
PAD
H_D#27 H_D#28 H_D#29 H_D#30 H_D#31
V_CPU_GTLREF CPU_TEST1 CPU_TEST2 CPU_TEST3 CPU_TEST4 CPU_TEST5 CPU_TEST6
R137 1K/F_NCR137 1K/F_NC R127 1K/F_NCR127 1K/F_NC C54 0.1U_NC
C54 0.1U_NC
10
10
R138 0_NCR138 0_NC
H_THERMTRIP# 6,52
E22 F24 E26 G22 F23 G25 E25 E23 K24 G24
J24
J23 H22 F26 K22 H23
J26 H26 H25
N22 K25 P26 R23 L23 M24 L22 M23 P25 P23 P22 T24 R24 L25 T25 N25 L26 M26 N24
AD26
C23 D25 C24
AF26
AF1 A26
B22 B23 C21
CPU_TEST1 CPU_TEST2 CPU_TEST4 CPU_TEST6
U42B
U42B
D[0]# D[1]# D[2]# D[3]# D[4]# D[5]# D[6]# D[7]# D[8]# D[9]# D[10]# D[11]# D[12]# D[13]# D[14]# D[15]# DSTBN[0]# DSTBP[0]# DINV[0]#
D[16]# D[17]# D[18]# D[19]# D[20]# D[21]# D[22]# D[23]# D[24]# D[25]# D[26]# D[27]# D[28]# D[29]# D[30]# D[31]# DSTBN[1]# DSTBP[1]# DINV[1]#
GTLREF TEST1 TEST2 TEST3 TEST4 TEST5 TEST6
BSEL[0] BSEL[1] BSEL[2]
MLX_47387-4784
MLX_47387-4784
Y22
D[32]#
AB24
D[33]#
V24
D[34]#
V26
D[35]#
V23
D[36]#
T22
D[37]#
U25
D[38]# D[39]# D[40]# D[41]# D[42]# D[43]# D[44]# D[45]# D[46]#
D[47]# DSTBN[2]# DSTBP[2]#
DINV[2]#
D[48]#
D[49]#
D[50]#
D[51]#
D[52]#
D[53]#
D[54]#
D[55]#
D[56]#
D[57]#
D[58]#
D[59]#
D[60]#
D[61]#
D[62]#
D[63]# DSTBN[3]# DSTBP[3]#
DINV[3]# COMP[0]
COMP[1] COMP[2] COMP[3]
DPRSTP#
DPSLP#
DPWR#
PWRGOOD
SLP#
PSI#
PAD
PAD PADT3PAD
U23 Y25 W22 Y23 W24 W25 AA23 AA24 AB25 Y26 AA26 U22
AE24 AD24 AA21 AB22 AB21 AC26 AD20 AE22 AF23 AC25 AE21 AD21 AC22 AD23 AF22 AC23 AE25 AF24 AC20
R26 U26 AA1 Y1
E5 B5 D24 D6 D7 AE6
T14
T14 T3
BCLK
133 166 200
DATA GRP 0 DATA GRP 1
DATA GRP 0 DATA GRP 1
DATA GRP 2DATA GRP 3
DATA GRP 2DATA GRP 3
MISC
MISC
For the purpose of testability, route these signals through a ground referenced Z0 = 55ohm trace that ends in a via that is near a GND via and is accessible through an oscilloscope connection.
FSB 533 0 0 667 800
ITP disable guidelines
Signal Resistor Value Connect To Resistor Placement
150 ohm +/- 5%
TDI
39 ohm +/- 5%
TMS
680 ohm +/- 5%
TRST#
27 ohm +/- 5%
TCK
Open
TDO
ITP_EN R268 Depop +3VRUN
5
Within 2.0" of the ITP
VTT VTT
Within 2.0" of the ITP
GND
Within 2.0" of the ITP
GND
Within 2.0" of the ITP
VTT
Within 2.0" of the ITP Close to CK410M Pin8
6
H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47
H_D#[0..63] H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63
COMP0 COMP1 COMP2 COMP3
CPU_TEST3 CPU_TEST5
Note: H_DPRTSTP need to daisy chain from ICH8 to IMVP6 to CPU.
BSEL2 BSEL1 BSEL0
0
1
H_D#[0..63] 5
PAD
PAD
PAD
PAD
PAD
PAD
H_DSTBN#2 5 H_DSTBP#2 5 H_DINV#2 5
H_D#[0..63] 5
H_DSTBN#3 5 H_DSTBP#3 5 H_DINV#3 5
H_DPRSTP# 6,11,51 H_DPSLP# 11 H_DPWR# 5 H_PWRGOOD 11 H_CPUSLP# 5 H_PSI# 51
T169
T169
T172
T172
T173
T173
H_D#32
H_D#40
H_D#53
H_D#57
T168
T168
PAD
PAD
1
0011
COMP0 COMP1 COMP2 COMP3
R59
R59
R62
R62
54.9/F
54.9/F
Comp0,2 connect with Zo=27.4ohm,Comp1,3 connect with Zo=55ohm, make those traces length shorter than 0.5".Trace should be at least 25 mils away from any other toggling signal.
QUANTA
QUANTA
QUANTA COMPUTER
COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
COMPUTER
Merom Processor (HOST BUS)
Merom Processor (HOST BUS)
Merom Processor (HOST BUS)
GM3 2B
GM3 2B
GM3 2B
7
27.4/F
27.4/F
R78
R78
54.9/F
54.9/F
R87
R87
27.4/F
27.4/F
of
of
of
362Monday, March 24, 2008
362Monday, March 24, 2008
362Monday, March 24, 2008
8
H_A#14 H_A#9 H_A#24 H_A#17
H_A#[3..16]
T176
T176 PAD
PAD
H_REQ#[0..4]
H_A#[17..35]
T180PADT180PAD T185PADT185PAD T184PADT184PAD
T182
T182 PAD
PAD
H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16
H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4
H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35
H_A#[3..16]5
A A
H_ADSTB#05 H_REQ#[0..4]5
H_A#[17..35]5
T177PADT177PAD
B B
H_ADSTB#15
H_A20M#11
H_FERR#11
H_IGNNE#11 H_STPCLK#11
H_INTR11 H_NMI11 H_SMI#11
C C
U42A
U42A
J4
A[3]#
L5
A[4]#
L4
A[5]#
K5
A[6]#
M3
A[7]#
N2
A[8]#
J1
A[9]#
N3
A[10]#
P5
A[11]#
P2
A[12]#
L2
A[13]#
P4
A[14]#
P1
A[15]#
R1
A[16]#
M1
ADSTB[0]#
K3
REQ[0]#
H2
REQ[1]#
K2
REQ[2]#
J3
REQ[3]#
L1
REQ[4]#
Y2
A[17]#
U5
A[18]#
R3
A[19]#
W6
A[20]#
U4
A[21]#
Y5
A[22]#
U1
A[23]#
R4
A[24]#
T5
A[25]#
T3
A[26]#
W2
A[27]#
W5
A[28]#
Y4
A[29]#
U2
A[30]#
V4
A[31]#
W3
A[32]#
AA4
A[33]#
AB2
A[34]#
AA3
A[35]#
V1
ADSTB[1]#
A6
A20M#
A5
FERR#
C4
IGNNE#
D5
STPCLK#
C6
LINT0
B4
LINT1
A3
SMI#
M4
RSVD[01]
N5
RSVD[02]
T2
RSVD[03]
V3
RSVD[04]
B2
RSVD[05]
C3
RSVD[06]
D2
RSVD[07]
D22
RSVD[08]
D3
RSVD[09]
F6
RSVD[10]
MLX_47387-4784
MLX_47387-4784
ADDR GROUP 0
ADDR GROUP 0
CONTROL
CONTROL
ADDR GROUP 1
ADDR GROUP 1
XDP/ITP SIGNALS
XDP/ITP SIGNALS
THERMAL
THERMAL
PROCHOT#
THERMDA THERMDC
ICH
ICH
THERMTRIP#
H CLK
H CLK
RESERVED
RESERVED
H1
ADS#
E2
BNR#
G5
BPRI#
H5
DEFER#
F21
DRDY#
E1
DBSY#
F1
BR0#
IERR#
INIT#
LOCK#
RESET#
RS[0]# RS[1]# RS[2]#
TRDY#
HIT#
HITM#
BPM[0]# BPM[1]# BPM[2]# BPM[3]#
PRDY# PREQ#
TDO TMS
TRST#
DBR#
BCLK[0] BCLK[1]
TCK
H_IERR#
D20 B3
H4 C1
F3 F4 G3 G2
G6 E4
ITP_BPM#0
AD4
ITP_BPM#1
AD3
ITP_BPM#2
AD1
ITP_BPM#3
AC4
ITP_BPM#4
AC2
ITP_BPM#5
AC1
ITP_TCK
AC5
ITP_TDI
AA6
TDI
ITP_TDO
AB3
ITP_TMS
AB5
ITP_TRST#
AB6
ITP_DBRESET#
C20
R134 56R134 56
H_PROCHOT#
D21
H_THERMDA
A24
H_THERMDC
B25
H_THERM
C7
R118 56R118 56
A22 A21
H_THERMDA H_THERMDC
2200P_NC 50
2200P_NC 50
R132 56R132 56
R121 0R121 0
C777
C777
H_ADS# 5 H_BNR# 5 H_BPRI# 5
H_DEFER# 5 H_DRDY# 5 H_DBSY# 5 H_BR0# 5
+1.05V_VCCP H_INIT# 11 H_LOCK# 5
H_RESET#H_RESET#_L
H_RS#0 5 H_RS#1 5 H_RS#2 5 H_TRDY# 5
H_HIT# 5 H_HITM# 5
ITP_DBRESET# 13
+1.05V_VCCP
T13PAD T13PAD
H_THERMDA 39
H_THERMDC 39
+1.05V_VCCP
CLK_CPU_BCLK 17 CLK_CPU_BCLK# 17
+1.05V_VCCP
H_PROCHOT#
Layout Note: Place R421 close to
R11651R116
CPU.
51
H_RESET# 5
Layout Note: Place voltage divider within
0.5" of GTLREF pin
+1.05V_VCCP
R60
R60 1K/F
1K/F
R53
R53 2K/F
2K/F
+1.05V_VCCP
2
Q69
Q69
31
2N7002W-7-F_NC
2N7002W-7-F_NC
+3.3V_ALW
H_D#[0..63]5
H_DSTBN#05 H_DSTBP#05 H_DINV#05
H_D#[0..63]5
T165
T165 PAD
PAD
H_D#28
H_DSTBN#15 H_DSTBP#15 H_DINV#15
CPU_MCH_BSEL06,17 CPU_MCH_BSEL16,17 CPU_MCH_BSEL26,17
Voltage Level shift
R693
R693
2.2K_NC
2.2K_NC
CPU_PROCHOT#
Populate ITP700Flex for bringup
+1.05V_VCCP
R594
R595
R595 39/F
39/F
R594 150
150
JITP1
JITP1
1
TDI
2
TMS
5
TCK
7
TDO
3
TRST#
12
RESET#
11
FBO
8
BCLKN
9
BCLKP
10
GND0
14
GND1
16
GND2
18
GND3
20
GND4
22
GND5
2
R59951R599 51
ITP_TDI ITP_TMS ITP_TCK ITP_TDO ITP_TRST#
H_RESET# ITP_DBRESET#
D D
ITP_TCK
CLK_CPU_ITP#17 CLK_CPU_ITP17
R597 27/FR597 27/F
R596 649/FR596 649/F
1
R598 0_NCR598 0_NC
R600 22.6/F_NCR600 22.6/F_NC
ITP_TCK
ITP_TRST#
Layout Note: Place couple 0.1uF Decoupling caps with in 0.1" ITP connector.
+1.05V_VCCP
C673 0.1U_NC
C673 0.1U_NC
10
VTT0 VTT1
VTAP
DBR# DBA#
BPM0# BPM1# BPM2# BPM3# BPM4# BPM5#
NC0
NC1 GND_0 GND_1
ITP700Flex_NC
ITP700Flex_NC
27 28 26
25 24
ITP_BPM#0
23
ITP_BPM#1
21
ITP_BPM#2
19
ITP_BPM#3
17
ITP_BPM#4
15
ITP_BPM#5
13 4 6 29 30
10
C674 0.1U_NC
C674 0.1U_NC
10
10
R602 150R602 150
Layout nopte: Place R412,R354, R408, R409, R350 and R406 close to CPU
3
+3.3V_SUS
H_THERM
Q81
Q81
MMST3904-7-F
MMST3904-7-F
4
+3.3V_RUN
2
12
R130
R130 10M
10M
12
C976
C976
0.1U
0.1U
1 3
10
10
1
www.kythuatvitinh.com
2
3
4
5
6
7
8
+VCC_CORE +VCC_CORE
+VCC_CORE
A A
+VCC_CORE
All use 10U 4V(+-20%,X6S,0805)Pb-Free.
C81
C78
C78 10U
10U
4
4 805
805
C82
C82 10U
10U
4
4 805
805
C81 10U
10U
4
4 805
805
C83
C83 10U
10U
4
4 805
805
C80
C80 10U
10U
4
4 805
805
C84
C84 10U
10U
4
4 805
805
C79
C79 10U
10U
4
4 805
805
C85
C85 10U
10U
4
4 805
805
C732
C732 10U
10U
4
4 805
805
C77
C77 10U
10U
4
4 805
805
8 inside cavity, north side, secondary layer.
+VCC_CORE
C761
C141
C143
C144
C144 10U
10U
4
4 805
805
B B
+VCC_CORE
C140
C140 10U
10U
4
4 805
805
C143 10U
10U
4
4 805
805
C139
C139 10U
10U
4
4 805
805
C142
C142 10U
10U
4
4 805
805
C138
C138 10U
10U
4
4 805
805
C141 10U
10U
4
4 805
805
C137
C137 10U
10U
4
4 805
805
C761 10U
10U
4
4 805
805
C136
C136 10U
10U
4
4 805
805
8 inside cavity, south side, secondary layer.
+VCC_CORE
C728
C729
C729 10U
10U
4
4 805
805
C728 10U
10U
4
4 805
805
C727
C727 10U
10U
4
4 805
805
C726
C726 10U
10U
4
4 805
805
C731
C731 10U
10U
4
4 805
805
C730
C730 10U
10U
4
4 805
805
6 inside cavity, north side, primary layer.
+VCC_CORE
C C
C755
C755 10U
10U
4
4 805
805
C756
C756 10U
10U
4
4 805
805
C757
C757 10U
10U
4
4 805
805
C758
C758 10U
10U
4
4 805
805
C759
C759 10U
10U
4
4 805
805
C760
C760 10U
10U
4
4 805
805
6 inside cavity, south side, primary layer.
+1.05V_VCCP
C127
C91
C91
0.1U
0.1U
10
10
Layout out: Place these inside socket cavity on North side secondary.
D D
C112
C112
0.1U
0.1U
10
10
C87
C87
0.1U
0.1U
10
10
C127
0.1U
0.1U
10
10
C88
C88
0.1U
0.1U
10
10
C128
C128
0.1U
0.1U
10
10
+PWR_SRC
+
+
C733
C733 100U
100U
25
25
Layout Note: Need to add 100uF cap on PWR_SRC for cap singing. Place on PWR_SRC near +VCC_CORE.
AA10 AA12 AA13 AA15 AA17 AA18 AA20
AC10 AB10 AB12 AB14 AB15 AB17 AB18
A10 A12 A13 A15 A17 A18 A20
B10 B12 B14 B15 B17 B18 B20
C10 C12 C13 C15 C17 C18
D10 D12 D14 D15 D17 D18
E10 E12 E13 E15 E17 E18 E20
F10 F12 F14 F15 F17 F18 F20 AA7 AA9
AB9
A7 A9
B7 B9
C9
D9
E7 E9
F7 F9
U42C
U42C
VCC[001] VCC[002] VCC[003] VCC[004] VCC[005] VCC[006] VCC[007] VCC[008] VCC[009] VCC[010] VCC[011] VCC[012] VCC[013] VCC[014] VCC[015] VCC[016] VCC[017] VCC[018] VCC[019] VCC[020] VCC[021] VCC[022] VCC[023] VCC[024] VCC[025] VCC[026] VCC[027] VCC[028] VCC[029] VCC[030] VCC[031] VCC[032] VCC[033] VCC[034] VCC[035] VCC[036] VCC[037] VCC[038] VCC[039] VCC[040] VCC[041] VCC[042] VCC[043] VCC[044] VCC[045] VCC[046] VCC[047] VCC[048] VCC[049] VCC[050] VCC[051] VCC[052] VCC[053] VCC[054] VCC[055] VCC[056] VCC[057] VCC[058] VCC[059] VCC[060] VCC[061] VCC[062] VCC[063] VCC[064]
VCCSENSE VCC[065] VCC[066] VCC[067]
VSSSENSE
MLX_47387-4784
MLX_47387-4784
+
+
C766
C766 100U
100U
25
25
VCC[068] VCC[069] VCC[070] VCC[071] VCC[072] VCC[073] VCC[074] VCC[075] VCC[076] VCC[077] VCC[078] VCC[079] VCC[080] VCC[081] VCC[082] VCC[083] VCC[084] VCC[085] VCC[086] VCC[087] VCC[088] VCC[089] VCC[090] VCC[091] VCC[092] VCC[093] VCC[094] VCC[095] VCC[096] VCC[097] VCC[098] VCC[099] VCC[100]
VCCP[01] VCCP[02] VCCP[03] VCCP[04] VCCP[05] VCCP[06] VCCP[07] VCCP[08] VCCP[09] VCCP[10] VCCP[11] VCCP[12] VCCP[13] VCCP[14] VCCP[15] VCCP[16]
VCCA[01] VCCA[02]
VID[0] VID[1] VID[2] VID[3] VID[4] VID[5] VID[6]
AB20 AB7 AC7 AC9 AC12 AC13 AC15 AC17 AC18 AD7 AD9 AD10 AD12 AD14 AD15 AD17 AD18 AE9 AE10 AE12 AE13 AE15 AE17 AE18 AE20 AF9 AF10 AF12 AF14 AF15 AF17 AF18 AF20
G21 V6 J6 K6 M6 J21 K21 M21 N21 N6 R21 R6 T21 T6 V21 W21
B26 C26
AD6 AF5 AE5 AF4 AE3 AF3 AE2
AF7
AE7
.
.
+
+
C736
C736 100U_NC
100U_NC
25
25
+VCCSENSE
+VSSSENSE
+1.05V_VCCP
+
+
C96
C96 220U
220U
4
4
VID0 51 VID1 51 VID2 51 VID3 51 VID4 51 VID5 51 VID6 51
+VCCSENSE 51
+VSSSENSE 51
+
+
C720
C720 100U_NC
100U_NC
25
25
+1.5V_RUN
C781
+VCC_CORE
R47
R47 100/F
100/F
R48
R48 100/F
100/F
C781 10U
10U
4
4
C194
C194
0.01U
0.01U
25
25
Layout Note: Place C105 near PIN B26.
+VCCSENSE +VSSSENSE
Route VCCSENSE and VSSSENSE traces at 27.4ohms and length matched to within 25 mil. Place PU and PD within 2 inch of CPU.
U42D
U42D
A4
VSS[001]
A8
VSS[002]
A11
VSS[003]
A14
VSS[004]
A16
VSS[005]
A19
VSS[006]
A23
VSS[007]
AF2
VSS[008]
B6
VSS[009]
B8
VSS[010]
B11
VSS[011]
B13
VSS[012]
B16
VSS[013]
B19
VSS[014]
B21
VSS[015]
B24
VSS[016]
C5
VSS[017]
C8
VSS[018]
C11
VSS[019]
C14
VSS[020]
C16
VSS[021]
C19
VSS[022]
C2
VSS[023]
C22
VSS[024]
C25
VSS[025]
D1
VSS[026]
D4
VSS[027]
D8
VSS[028]
D11
VSS[029]
D13
VSS[030]
D16
VSS[031]
D19
VSS[032]
D23
VSS[033]
D26
VSS[034]
E3
VSS[035]
E6
VSS[036]
E8
VSS[037]
E11
VSS[038]
E14
VSS[039]
E16
VSS[040]
E19
VSS[041]
E21
VSS[042]
E24
VSS[043]
F5
VSS[044]
F8
VSS[045]
F11
VSS[046]
F13
VSS[047]
F16
VSS[048]
F19
VSS[049]
F2
VSS[050]
F22
VSS[051]
F25
VSS[052]
G4
VSS[053]
G1
VSS[054]
G23
VSS[055]
G26
VSS[056]
H3
VSS[057]
H6
VSS[058]
H21
VSS[059]
H24
VSS[060]
J2
VSS[061]
J5
VSS[062]
J22
VSS[063]
J25
VSS[064]
K1
VSS[065]
K4
VSS[066]
K23
VSS[067]
K26
VSS[068]
L3
VSS[069]
L6
VSS[070]
L21
VSS[071]
L24
VSS[072]
M2
VSS[073]
M5
VSS[074]
M22
VSS[075]
M25
VSS[076]
N1
VSS[077]
N4
VSS[078]
N23
VSS[079]
N26
VSS[080] VSS[081]P3VSS[162]
MLX_47387-4784
MLX_47387-4784
VSS[082] VSS[083] VSS[084] VSS[085] VSS[086] VSS[087] VSS[088] VSS[089] VSS[090] VSS[091] VSS[092] VSS[093] VSS[094] VSS[095] VSS[096] VSS[097] VSS[098] VSS[099] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158] VSS[159] VSS[160] VSS[161]
VSS[163]
P6 P21 P24 R2 R5 R22 R25 T1 T4 T23 T26 U3 U6 U21 U24 V2 V5 V22 V25 W1 W4 W23 W26 Y3 Y6 Y21 Y24 AA2 AA5 AA8 AA11 AA14 AA16 AA19 AA22 AA25 AB1 AB4 AB8 AB11 AB13 AB16 AB19 AB23 AB26 AC3 AC6 AC8 AC11 AC14 AC16 AC19 AC21 AC24 AD2 AD5 AD8 AD11 AD13 AD16 AD19 AD22 AD25 AE1 AE4 AE8 AE11 AE14 AE16 AE19 AE23 AE26 A2 AF6 AF8 AF11 AF13 AF16 AF19 AF21 A25 AF25
.
.
QUANTA
QUANTA
QUANTA COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
1
2
3
4
5
6
Date: Sheet
Date: Sheet
Date: Sheet
Merom Processor (POWER)
Merom Processor (POWER)
Merom Processor (POWER)
GM3 2B
GM3 2B
GM3 2B
7
of
of
of
462Monday, March 24, 2008
462Monday, March 24, 2008
462Monday, March 24, 2008
8
1
www.kythuatvitinh.com
T154
T154 PAD
PAD
2
T155
T155 PAD
PAD
3
4
5
6
7
8
1 2
C805
C805
0.1U/10V
0.1U/10V
H_D#12H_D#3
H_D#[0..63]3
+1.05V_VCCP
1 2
12
R720
R720 1K/F
1K/F
R728
R728 2K/F
2K/F
U45A
H_D#[0..63]
H_RESET#3
H_CPUSLP#3
12
C807
C807
0.1U/10V
0.1U/10V
H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63
H_SWING H_RCOMP
H_SCOMP H_SCOMP#
R192 0R192 0
1 2
H_REF
U45A
E2
H_D#_0
G2
H_D#_1
G7
H_D#_2
M6
H_D#_3
H7
H_D#_4
H3
H_D#_5
G4
H_D#_6
F3
H_D#_7
N8
H_D#_8
H2
H_D#_9
M10
H_D#_10
N12
H_D#_11
N9
H_D#_12
H5
H_D#_13
P13
H_D#_14
K9
H_D#_15
M2
H_D#_16
W10
H_D#_17
Y8
H_D#_18
V4
H_D#_19
M3
H_D#_20
J1
H_D#_21
N5
H_D#_22
N3
H_D#_23
W6
H_D#_24
W9
H_D#_25
N2
H_D#_26
Y7
H_D#_27
Y9
H_D#_28
P4
H_D#_29
W3
H_D#_30
N1
H_D#_31
AD12
H_D#_32
AE3
H_D#_33
AD9
H_D#_34
AC9
H_D#_35
AC7
H_D#_36
AC14
H_D#_37
AD11
H_D#_38
AC11
H_D#_39
AB2
H_D#_40
AD7
H_D#_41
AB1
H_D#_42
Y3
H_D#_43
AC6
H_D#_44
AE2
H_D#_45
AC5
H_D#_46
AG3
H_D#_47
AJ9
H_D#_48
AH8
H_D#_49
AJ14
H_D#_50
AE9
H_D#_51
AE11
H_D#_52
AH12
H_D#_53
AJ5
H_D#_54
AH5
H_D#_55
AJ6
H_D#_56
AE7
H_D#_57
AJ7
H_D#_58
AJ2
H_D#_59
AE5
H_D#_60
AJ3
H_D#_61
AH2
H_D#_62
AH13
H_D#_63
B3
H_SWING
C2
H_RCOMP
W1
H_SCOMP
W2
H_SCOMP#
B6
H_CPURST#
E5
H_CPUSLP#
B9
H_AVREF
A9
H_DVREF
CRESTLINE_1p0_DU
CRESTLINE_1p0_DU
HOST
HOST
H_A#_3 H_A#_4 H_A#_5 H_A#_6 H_A#_7 H_A#_8
H_A#_9 H_A#_10 H_A#_11 H_A#_12 H_A#_13 H_A#_14 H_A#_15 H_A#_16 H_A#_17 H_A#_18 H_A#_19 H_A#_20 H_A#_21 H_A#_22 H_A#_23 H_A#_24 H_A#_25 H_A#_26 H_A#_27 H_A#_28 H_A#_29 H_A#_30 H_A#_31 H_A#_32 H_A#_33 H_A#_34 H_A#_35
H_ADS# H_ADSTB#_0 H_ADSTB#_1
H_BNR#
H_BPRI#
H_BREQ#
H_DEFER#
H_DBSY#
HPLL_CLK
HPLL_CLK#
H_DPWR#
H_DRDY#
H_HIT#
H_HITM# H_LOCK# H_TRDY#
H_DINV#_0 H_DINV#_1 H_DINV#_2 H_DINV#_3
H_DSTBN#_0 H_DSTBN#_1 H_DSTBN#_2 H_DSTBN#_3
H_DSTBP#_0 H_DSTBP#_1 H_DSTBP#_2 H_DSTBP#_3
H_REQ#_0 H_REQ#_1 H_REQ#_2 H_REQ#_3 H_REQ#_4
H_RS#_0 H_RS#_1 H_RS#_2
J13 B11 C11 M11 C15 F16 L13 G17 C14 K16 B13 L16 J17 B14 K19 P15 R17 B16 H20 L19 D17 M17 N16 J19 B18 E19 B17 B15 E17 C18 A19 B19 N19
G12 H17 G20 C8 E8 F12 D6 C10 AM5 AM7 H8 K7 E4 C6 G10 B7
K5 L2 AD13 AE13
M7 K3 AD2 AH11
L7 K2 AC2 AJ10
M14 E13 A11 H13 B12
E12 D7 D8
H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35
H_A#[3..35]
H_ADS# 3 H_ADSTB#0 3 H_ADSTB#1 3 H_BNR# 3 H_BPRI# 3 H_BR0# 3 H_DEFER# 3 H_DBSY# 3 CLK_MCH_BCLK 17 CLK_MCH_BCLK# 17 H_DPWR# 3 H_DRDY# 3 H_HIT# 3 H_HITM# 3 H_LOCK# 3 H_TRDY# 3
H_DINV#0 3 H_DINV#1 3 H_DINV#2 3 H_DINV#3 3
H_REQ#0 3 H_REQ#1 3 H_REQ#2 3 H_REQ#3 3 H_REQ#4 3
H_RS#0 3 H_RS#1 3 H_RS#2 3
H_A#[3..35] 3
T149
T149
T150
T150
PAD
PAD
PAD
PAD
T159
T159 PAD
PAD
T160
T160 PAD
PAD
H_DSTBN#0 3 H_DSTBN#1 3 H_DSTBN#2 3 H_DSTBN#3 3
H_DSTBP#0 3 H_DSTBP#1 3 H_DSTBP#2 3 H_DSTBP#3 3
T164
T164 PAD
PAD
A A
B B
C C
H_D#27 H_D#28
+1.05V_VCCP
12
R733
R733 221/F
221/F
H_SWING
12
R732
R732 100/F
100/F
+1.05V_VCCP
12
12
R268
R268
R272
R272
54.9/F
54.9/F
54.9/F
54.9/F
H_SCOMP H_SCOMP#
12
R734
R734
24.9/F
24.9/F
H_RCOMP
Layout Note: H_RCOMP trace should be 10-mil wide with 20-mil spacing.
U45 QCI PN
Layout Note: Place the 0.1 uF
D D
1
2
decoupling capacitor within 100 mils from GMCH pins.
3
4
5
DIS AJSLA5U0T11
UMA AJSLA5T0T13
QUANTA
QUANTA
QUANTA COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
6
Date: Sheet
Crestline (HOST)
Crestline (HOST)
Crestline (HOST)
GM3 2B
GM3 2B
GM3 2B
7
of
of
of
562Monday, March 24, 2008
562Monday, March 24, 2008
562Monday, March 24, 2008
8
1
www.kythuatvitinh.com
+1.8V_SUS
R323
R323 1K/F
C390
C390
2.2U
2.2U
10
10
C412
C412
2.2U
2.2U
10
10
THERMTRIP_MCH#
1
1K/F
R319
R319
3.01K
3.01K
R322
R322 1K/F
1K/F
UMA_LCD_A3-26 UMA_LCD_A3+26 UMA_LCD_B3-26 UMA_LCD_B3+26
PM_EXTTS#0 PM_EXTTS#1
R208 0_UMAR208 0_UMA R215 0_UMAR215 0_UMA R179 0_UMAR179 0_UMA R180 0_UMAR180 0_UMA
Layout Note: Location of all MCH_CFG strap resistors needs to be close to minmize stub.
CPU_MCH_BSEL03,17 CPU_MCH_BSEL13,17 CPU_MCH_BSEL23,17
R243
R243
R214
R214
R255
R255
+3.3V_RUN
R258
R258 R246
R246
PM_BMBUSY#13
H_DPRSTP#3,11,51 PM_EXTTS#015 PM_EXTTS#115 ICH_PWRGD13,44
DPRSLPVR13,51
SB_NB_PCIE_RST#12
SM_RCOMP_VOH
C377
C377
0.01U
0.01U
25
25
A A
SM_RCOMP_VOL
C399
C399
0.01U
0.01U
25
25
Santa Rosa Platform MOW WW15 For 4Gb DRAM support, change Pin-BJ29 to DDR_A_MA14, change Pin-BE24 to DDR_B_MA14.
DDR_A_MA1415,16 DDR_B_MA1415,16
B B
+3.3V_RUN
R253 10KR253 10K R247 10KR247 10K
+1.05V_VCCP
R262 56R262 56
C C
D D
2
U45B
U45B
P36
RSVD1
P37
RSVD2
R35
RSVD3
N35
RSVD4
AR12
RSVD5
AR13
RSVD6
AM12
RSVD7
AN13
RSVD8
J12
RSVD9
AR37
RSVD10
AM36
RSVD11
AL36
RSVD12
AM37
RSVD13
D20
RSVD14
H10
RSVD20
B51
RSVD21
BJ20
RSVD22
BK22
RSVD23
BF19
RSVD24
BH20
RSVD25
BK18
RSVD26
BJ18
RSVD27
BF23
RSVD28
BG23
RSVD29
BC23
RSVD30
BD24
RSVD31
BJ29
RSVD32
BE24
RSVD33
BH39
RSVD34
AW20
RSVD35
BK20
CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15 CFG16 CFG17 CFG18 CFG19 CFG20
RSVD36
C48
RSVD37
D47
RSVD38
B44
RSVD39
C44
RSVD40
A35
RSVD41
B37
RSVD42
B36
RSVD43
B34
RSVD44
C34
RSVD45
P27
CFG_0
N27
CFG_1
N24
CFG_2
C21
CFG_3
C23
CFG_4
F23
CFG_5
N23
CFG_6
G23
CFG_7
J20
CFG_8
C20
CFG_9
R24
CFG_10
L23
CFG_11
J23
CFG_12
E23
CFG_13
E20
CFG_14
K23
CFG_15
M20
CFG_16
M24
CFG_17
L32
CFG_18
N33
CFG_19
L35
CFG_20
G41
PM_BM_BUSY#
L39
PM_DPRSTP#
L36
PM_EXT_TS#_0
J36
PM_EXT_TS#_1
AW49
PWROK
AV20
RSTIN#
N20
THERMTRIP#
G36
DPRSLPVR
BJ51
NC_1
BK51
NC_2
BK50
NC_3
BL50
NC_4
BL49
NC_5
BL3
NC_6
BL2
NC_7
BK1
NC_8
BJ1
NC_9
E1
NC_10
A5
NC_11
C51
NC_12
B50
NC_13
A50
NC_14
A49
NC_15
BK2
NC_16
CRESTLINE_1p0_DU
CRESTLINE_1p0_DU
R296 100R296 100
PLTRST#_R
UMA_LCD_A3-_R UMA_LCD_A3+_R UMA_LCD_B3-_R UMA_LCD_B3+_R
T110
T110
PAD
PAD
T108
T108
PAD
PAD
4.02K_NC
4.02K_NC
T26
T26
PAD
PAD
T19
T19
PAD
PAD
T16
T16
PAD
PAD
4.02K_NC
4.02K_NC
T27
T27
PAD
PAD
T21
T21
PAD
PAD
T20
T20
PAD
PAD
T18
T18
PAD
PAD
T15
T15
PAD
PAD
T25
T25
PAD
PAD
4.02K_NC
4.02K_NC
T23
T23
PAD
PAD
T24
T24
PAD
PAD
4.02K_NC
4.02K_NC
4.02K_NC
4.02K_NC
PM_EXTTS#0 PM_EXTTS#1
PLTRST#_R THERMTRIP_MCH#
R227 0R227 0
T112
T112
PAD
PAD
T114
T114
PAD
PAD
T116
T116
PAD
PAD
T120
T120
PAD
PAD
T117
T117
PAD
PAD
T121
T121
PAD
PAD
T118
T118
PAD
PAD
T115
T115
PAD
PAD
T113
T113
PAD
PAD
T111
T111
PAD
PAD
T106
T106
PAD
PAD
T100
T100
PAD
PAD
T101
T101
PAD
PAD
T102
T102
PAD
PAD
T107
T107
PAD
PAD
T119
T119
PAD
PAD
R292 0_NCR292 0_NC
PLTRST#12,25,30,33,34,42
R291 0R291 0
2
DDR MUXINGCLKDMI
DDR MUXINGCLKDMI
CFGRSVD
CFGRSVD
PM
PM
GRAPHICS VIDME
GRAPHICS VIDME
NC
NC
MISC
MISC
3
SM_CK_0 SM_CK_1 SM_CK_3 SM_CK_4
SM_CK#_0 SM_CK#_1 SM_CK#_3
SM_CK#_4
SM_CKE_0 SM_CKE_1 SM_CKE_3 SM_CKE_4
SM_CS#_0 SM_CS#_1 SM_CS#_2 SM_CS#_3
SM_ODT_0 SM_ODT_1 SM_ODT_2 SM_ODT_3
SM_RCOMP
SM_RCOMP#
SM_RCOMP_VOH SM_RCOMP_VOL
SM_VREF_0 SM_VREF_1
DPLL_REF_CLK
DPLL_REF_CLK#
DPLL_REF_SSCLK
DPLL_REF_SSCLK#
PEG_CLK
PEG_CLK#
DMI_RXN_0 DMI_RXN_1 DMI_RXN_2 DMI_RXN_3
DMI_RXP_0 DMI_RXP_1 DMI_RXP_2 DMI_RXP_3
DMI_TXN_0 DMI_TXN_1 DMI_TXN_2 DMI_TXN_3
DMI_TXP_0 DMI_TXP_1 DMI_TXP_2 DMI_TXP_3
GFX_VID_0 GFX_VID_1 GFX_VID_2 GFX_VID_3
GFX_VR_EN
CL_CLK
CL_DATA
CL_PWROK
CL_RST# CL_VREF
SDVO_CTRL_CLK
SDVO_CTRL_DATA
CLK_REQ#
ICH_SYNC#
TEST_1 TEST_2
3
AV29 BB23 BA25 AV23
AW30 BA23 AW25 AW23
BE29 AY32 BD39 BG37
BG20 BK16 BG16 BE13
BH18 BJ15 BJ14 BE16
SMRCOMPP
BL15
SMRCOMPN
BK14
SM_RCOMP_VOH
BK31
SM_RCOMP_VOL
BL31 AR49
AW4
B42 C42 H48 H47
K44 K45
AN47 AJ38 AN42 AN46
AM47 AJ39 AN41 AN45
AJ46 AJ41 AM40 AM44
AJ47 AJ42 AM39 AM43
E35 A39 C38 B39 E36
AM49 AK50 AT43 AN49 AM50
MCH_CLVREF
SDVO_CTRLCLK_L
H35
SDVO_CTRLDATA_L
K36 G39 G40
A37 R32
M_CLK_DDR0 15 M_CLK_DDR1 15 M_CLK_DDR3 15 M_CLK_DDR4 15
M_CLK_DDR#0 15 M_CLK_DDR#1 15 M_CLK_DDR#3 15 M_CLK_DDR#4 15
DDR_CKE0_DIMMA 15,16 DDR_CKE1_DIMMA 15,16 DDR_CKE3_DIMMB 15,16 DDR_CKE4_DIMMB 15,16
DDR_CS0_DIMMA# 15,16 DDR_CS1_DIMMA# 15,16 DDR_CS2_DIMMB# 15,16 DDR_CS3_DIMMB# 15,16
M_ODT0 15,16 M_ODT1 15,16 M_ODT2 15,16 M_ODT3 15,16
+V_DDR_MCH_REF
MCH_DREFCLK_L
MCH_DREFCLK#_L DREF_SSCLK_L DREF_SSCLK#_L
CLK_MCH_3GPLL 17 CLK_MCH_3GPLL# 17
DMI_MRX_ITX_N0 12
DMI_MRX_ITX_N1 12
DMI_MRX_ITX_N2 12
DMI_MRX_ITX_N3 12
DMI_MRX_ITX_P0 12 DMI_MRX_ITX_P1 12 DMI_MRX_ITX_P2 12 DMI_MRX_ITX_P3 12
DMI_MTX_IRX_N0 12 DMI_MTX_IRX_N1 12 DMI_MTX_IRX_N2 12 DMI_MTX_IRX_N3 12
DMI_MTX_IRX_P0 12
DMI_MTX_IRX_P1 12
DMI_MTX_IRX_P2 12
DMI_MTX_IRX_P3 12
T17 PADT17 PAD T104 PADT104 PAD T103 PADT103 PAD T105 PADT105 PAD T109 PADT109 PAD
CL_CLK0 13 CL_DATA0 13 ICH_CL_PWROK 13,31
ICH_CL_RST0# 13
R157 0_DISR157 0_DIS R156 0_DISR156 0_DIS
CLK_3GPLLREQ# 17 MCH_ICH_SYNC# 13
R2090R209
R260
R260
0
20K
20K
+3.3V_RUN
POP FOR UMA
R717 0_UMAR717 0_UMA R716 0_UMAR716 0_UMA R241 0_UMAR241 0_UMA R230 0_UMAR230 0_UMA
H_THERMTRIP#3,52
4
POP FOR UMA
SMRCOMPP SMRCOMPN
R261 0_NCR261 0_NC
LCD_DDCCLK_R LCD_DDCDAT_R
+1.8V_SUS
R321
R321 20/F
20/F
R318
R318 20/F
20/F
MCH_DREFCLK 17 MCH_DREFCLK# 17 DREF_SSCLK 17 DREF_SSCLK# 17
UMA_VGA_BLU27 UMA_VGA_GRN27 UMA_VGA_RED27
UMA_CRT_CLK_DDC27 UMA_CRT_DAT_DDC27
UMA_VGAHSYNC27 UMA_VGAVSYNC27
THERMTRIP_MCH#
UMA_VGA_BLU_R UMA_VGA_GRN_R UMA_VGA_RED_R
R159 2.2K_UMAR159 2.2K_UMA R160 2.2K_UMAR160 2.2K_UMA
R213 0R213 0 R187 0R187 0
R239 0_DUR239 0_DU R249 0_DUR249 0_DU R228 0_DUR228 0_DU
UMA USE RESISTOR 150/F PN:CS11502FB21
DIS USE 0 OHM PN:CS00002JB38
Layout Note: Place 150 ohm termination resistors close to GMCH.
4
LCTLA_CLK LCTLB_DATA
UMA_BIA_PWM26 UMA_PANEL_BKEN31
UMA_LCD_DDCCLK26 UMA_LCD_DDCDAT26
UMA_ENVDD26
UMA_LCD_ACLK-_C26 UMA_LCD_ACLK+_C26 UMA_LCD_BCLK-_C26 UMA_LCD_BCLK+_C26
UMA_LCD_A0-26 UMA_LCD_A1-26 UMA_LCD_A2-26
UMA_LCD_A0+26 UMA_LCD_A1+26 UMA_LCD_A2+26
UMA_LCD_B0-26 UMA_LCD_B1-26 UMA_LCD_B2-26
UMA_LCD_B0+26 UMA_LCD_B1+26 UMA_LCD_B2+26
+1.25V_RUN
Non-iAMT
MCH_CLVREF
C344
C344
0.1U
0.1U
R153 0_UMAR153 0_UMA R152 0_UMAR152 0_UMA R154 0_UMAR154 0_UMA
R149 0_UMAR149 0_UMA R150 0_UMAR150 0_UMA
R155 30/F_UMAR155 30/F_UMA
1 2
R222 1.3K_UMAR222 1.3K_UMA
R151 30/F_UMAR151 30/F_UMA
1 2
POP FOR UMA
5
POP FOR UMA
R139 0_UMAR139 0_UMA R226 0_UMAR226 0_UMA
R144 0_UMAR144 0_UMA R145 0_UMAR145 0_UMA R181 0_UMAR181 0_UMA
T22
T22
PAD
PAD
R197 0_UMAR197 0_UMA R198 0_UMAR198 0_UMA R188 0_UMAR188 0_UMA R189 0_UMAR189 0_UMA
R173 0_UMAR173 0_UMA R195 0_UMAR195 0_UMA R177 0_UMAR177 0_UMA
R174 0_UMAR174 0_UMA R196 0_UMAR196 0_UMA R178 0_UMAR178 0_UMA
R201 0_UMAR201 0_UMA R176 0_UMAR176 0_UMA R200 0_UMAR200 0_UMA
R202 0_UMAR202 0_UMA R175 0_UMAR175 0_UMA R199 0_UMAR199 0_UMA
17
R290
R290 1K/F
1K/F
R282
R282 392/F
392/F
R158 0_DISR158 0_DIS R161 0_DISR161 0_DIS R167 0_DISR167 0_DIS R168 0_DISR168 0_DIS R244 0_DISR244 0_DIS R225 0_DISR225 0_DIS R229 0_DISR229 0_DIS R724 0_DISR724 0_DIS R723 0_DISR723 0_DIS R242 0_DISR242 0_DIS R231 0_DISR231 0_DIS
POP FOR DIS
5
UMA_BIA_PWM_R
PANEL_BKEN_R LCTLA_CLK LCTLB_DATA
LCD_DDCCLK_R
LCD_DDCDAT_R
ENVDD_R
R240 3.3K/F_UMAR240 3.3K/F_UMA
12
R248 0_UMAR248 0_UMA
UMA_LCD_ACLK­UMA_LCD_ACLK+ UMA_LCD_BCLK­UMA_LCD_BCLK+
UMA_LCD_A0-_R UMA_LCD_A1-_R UMA_LCD_A2-_R
UMA_LCD_A0+_R UMA_LCD_A1+_R UMA_LCD_A2+_R
UMA_LCD_B0-_R UMA_LCD_B1-_R UMA_LCD_B2-_R
UMA_LCD_B0+_R UMA_LCD_B1+_R UMA_LCD_B2+_R
R269 0_DUR269 0_DU R284 0_DUR284 0_DU R286 0_DUR286 0_DU
R269, R284 and R286 DIS: 0 -->CS00002JB38 UMA: 75 -->CS07502FB17
UMA_VGA_BLU_R UMA_VGA_GRN_R UMA_VGA_RED_R
UMA_CRT_CLK_DDC_R UMA_CRT_DAT_DDC_R UMA_VGAHSYNC_R CRT_TVO_IREF UMA_VGAVSYNC_R
LCD_DDCCLK_R LCD_DDCDAT_R UMA_CRT_CLK_DDC_R UMA_CRT_DAT_DDC_R UMA_VGAHSYNC_R CRT_TVO_IREF UMA_VGAVSYNC_R MCH_DREFCLK_L MCH_DREFCLK#_L DREF_SSCLK_L DREF_SSCLK#_L
CFG5
CFG9
CFG16
CFG19
CFG20
SDVO_CRTL_DATA
L_IBG
U45C
U45C
J40
L_BKLT_CTRL
H39
L_BKLT_EN
E39
L_CTRL_CLK
E40
L_CTRL_DATA
C37
L_DDC_CLK
D35
L_DDC_DATA
K40
L_VDD_EN
L41
LVDS_IBG
L43
LVDS_VBG
N41
LVDS_VREFH
N40
LVDS_VREFL
D46
LVDSA_CLK#
C45
LVDSA_CLK
D44
LVDSB_CLK#
E42
LVDSB_CLK
G51
LVDSA_DATA#_0
E51
LVDSA_DATA#_1
F49
LVDSA_DATA#_2
G50
LVDSA_DATA_0
E50
LVDSA_DATA_1
F48
LVDSA_DATA_2
G44
LVDSB_DATA#_0
B47
LVDSB_DATA#_1
B45
LVDSB_DATA#_2
E44
LVDSB_DATA_0
A47
LVDSB_DATA_1
A45
LVDSB_DATA_2
E27
TVA_DAC
G27
TVB_DAC
K27
TVC_DAC
F27
TVA_RTN
J27
TVB_RTN
L27
TVC_RTN
M35
TV_DCONSEL_0
P33
TV_DCONSEL_1
H32
CRT_BLUE
G32
CRT_BLUE#
K29
CRT_GREEN
J29
CRT_GREEN#
F29
CRT_RED
E29
CRT_RED#
K33
CRT_DDC_CLK
G35
CRT_DDC_DATA
F33
CRT_HSYNC
C32
CRT_TVO_IREF
E33
CRT_VSYNC
CRESTLINE_1p0_DU
CRESTLINE_1p0_DU
DMI X2 Select PCI Express
Graphic Lane FSB Dynamic
ODT DMI Lane
Reversal
SDVO/PCIE Concurrent Operation
SDVO Present.
6
PEG_COMPI
PEG_COMPO
PEG_RX#_0 PEG_RX#_1 PEG_RX#_2 PEG_RX#_3 PEG_RX#_4 PEG_RX#_5 PEG_RX#_6 PEG_RX#_7 PEG_RX#_8
LVDS
LVDS
TV VGA
TV VGA
Low=DMIx2 High=DMIx4(Default)
Low= Reveise Lane High=Normal operation
Low=Dynamic ODT Disable High=Dynamic ODT Enable(default).
Low=Normal(default). High=Lane Reversed
Low=Only SDVO or PCIEx1 is operational (defaults) High=SDVO and PCIEx1 are operating simultaneously via PEG port
Low=No SDVO Device Present (default) High=SDVO Device Present
6
PEG_RX#_9 PEG_RX#_10 PEG_RX#_11 PEG_RX#_12 PEG_RX#_13 PEG_RX#_14 PEG_RX#_15
PEG_RX_0 PEG_RX_1 PEG_RX_2 PEG_RX_3 PEG_RX_4 PEG_RX_5 PEG_RX_6 PEG_RX_7 PEG_RX_8
PEG_RX_9 PEG_RX_10 PEG_RX_11 PEG_RX_12 PEG_RX_13 PEG_RX_14 PEG_RX_15
PEG_TX#_0 PEG_TX#_1 PEG_TX#_2 PEG_TX#_3 PEG_TX#_4 PEG_TX#_5 PEG_TX#_6 PEG_TX#_7 PEG_TX#_8 PEG_TX#_9
PEG_TX#_10 PEG_TX#_11
PCI-EXPRESS GRAPHICS
PCI-EXPRESS GRAPHICS
PEG_TX#_12 PEG_TX#_13 PEG_TX#_14 PEG_TX#_15
PEG_TX_0 PEG_TX_1 PEG_TX_2 PEG_TX_3 PEG_TX_4 PEG_TX_5 PEG_TX_6 PEG_TX_7 PEG_TX_8
PEG_TX_9 PEG_TX_10 PEG_TX_11 PEG_TX_12 PEG_TX_13 PEG_TX_14 PEG_TX_15
7
+VCC_PEG
+VCC3G_PCIE_R
N43 M43
PCIE_MRX_GTX_N0
J51
PCIE_MRX_GTX_N1_L
L51
PCIE_MRX_GTX_N2
N47
PCIE_MRX_GTX_N3
T45
PCIE_MRX_GTX_N4
T50
PCIE_MRX_GTX_N5
U40
PCIE_MRX_GTX_N6
Y44
PCIE_MRX_GTX_N7
Y40
PCIE_MRX_GTX_N8
AB51
PCIE_MRX_GTX_N9
W49
PCIE_MRX_GTX_N10
AD44
PCIE_MRX_GTX_N11
AD40
PCIE_MRX_GTX_N12
AG46
PCIE_MRX_GTX_N13
AH49
PCIE_MRX_GTX_N14
AG45
PCIE_MRX_GTX_N15
AG41
PCIE_MRX_GTX_P0
J50 L50
PCIE_MRX_GTX_P2
M47
PCIE_MRX_GTX_P3
U44
PCIE_MRX_GTX_P4
T49
PCIE_MRX_GTX_P5
T41
PCIE_MRX_GTX_P6
W45
PCIE_MRX_GTX_P7
W41
PCIE_MRX_GTX_P8
AB50
PCIE_MRX_GTX_P9
Y48
PCIE_MRX_GTX_P10
AC45
PCIE_MRX_GTX_P11
AC41
PCIE_MRX_GTX_P12
AH47
PCIE_MRX_GTX_P13
AG49
PCIE_MRX_GTX_P14
AH45
PCIE_MRX_GTX_P15
AG42
PCIE_MTX_GRX_C_N0
N45
PCIE_MTX_GRX_C_N1
U39
PCIE_MTX_GRX_C_N2
U47
PCIE_MTX_GRX_C_N3
N51
PCIE_MTX_GRX_C_N4
R50
PCIE_MTX_GRX_C_N5
T42
PCIE_MTX_GRX_C_N6
Y43
PCIE_MTX_GRX_C_N7
W46
PCIE_MTX_GRX_C_N8
W38
PCIE_MTX_GRX_C_N9
AD39
PCIE_MTX_GRX_C_N10
AC46
PCIE_MTX_GRX_C_N11
AC49
PCIE_MTX_GRX_C_N12
AC42
PCIE_MTX_GRX_C_N13
AH39
PCIE_MTX_GRX_C_N14
AE49
PCIE_MTX_GRX_C_N15
AH44
PCIE_MTX_GRX_C_P0
M45
PCIE_MTX_GRX_C_P1
T38
PCIE_MTX_GRX_C_P2
T46
PCIE_MTX_GRX_C_P3
N50
PCIE_MTX_GRX_C_P4
R51
PCIE_MTX_GRX_C_P5
U43
PCIE_MTX_GRX_C_P6
W42
PCIE_MTX_GRX_C_P7
Y47
PCIE_MTX_GRX_C_P8
Y39
PCIE_MTX_GRX_C_P9
AC38
PCIE_MTX_GRX_C_P10
AD47
PCIE_MTX_GRX_C_P11
AC50
PCIE_MTX_GRX_C_P12
AD43
PCIE_MTX_GRX_C_P13
AG39
PCIE_MTX_GRX_C_P14
AE50
PCIE_MTX_GRX_C_P15
AH43
PCIE_MTX_GRX_C_N0 PCIE_MTX_GRX_C_N1 PCIE_MTX_GRX_C_N2 PCIE_MTX_GRX_C_N3
PCIE_MTX_GRX_C_P0 PCIE_MTX_GRX_C_P1 PCIE_MTX_GRX_C_P2 PCIE_MTX_GRX_C_P3
R251 24.9/FR251 24.9/F
R238
R238
R245
R245
SDVO_CTRLCLK_L SDVO_CTRLDATA_L
PCIE_MRX_GTX_N1_L PCIE_MRX_GTX_P1_L
PCIE_MRX_GTX_N1
0_DIS
0_DIS
PCIE_MRX_GTX_P1PCIE_MRX_GTX_P1_L
0_DIS
0_DIS
R143 0_UMAR143 0_UMA R142 0_UMAR142 0_UMA
R742 0_UMAR742 0_UMA R743 0_UMAR743 0_UMA
C247 0.1U_UMAC247 0.1U_UMA C238 0.1U_UMAC238 0.1U_UMA C254 0.1U_UMAC254 0.1U_UMA C253 0.1U_UMAC253 0.1U_UMA
C240 0.1U_UMAC240 0.1U_UMA C246 0.1U_UMAC246 0.1U_UMA C261 0.1U_UMAC261 0.1U_UMA C255 0.1U_UMAC255 0.1U_UMA
DC Blocked Cap. AND POP FOR UMA
Title
Title
Title
Crestline (VGA,DMI)
Crestline (VGA,DMI)
Crestline (VGA,DMI)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
GM3 2B
GM3 2B
GM3 2B
Date: Sheet
Date: Sheet
Date: Sheet
7
PCIE_MTX_GRX_N[0..15] 18 PCIE_MTX_GRX_P[0..15] 18
PCIE_MRX_GTX_N[0..15] 18
PCIE_MRX_GTX_P[0..15] 18
C817 0.1U_DISC817 0.1U_DIS C813 0.1U_DISC813 0.1U_DIS C821 0.1U_DISC821 0.1U_DIS C819 0.1U_DISC819 0.1U_DIS C830 0.1U_DISC830 0.1U_DIS C825 0.1U_DISC825 0.1U_DIS C831 0.1U_DISC831 0.1U_DIS C833 0.1U_DISC833 0.1U_DIS C837 0.1U_DISC837 0.1U_DIS C838 0.1U_DISC838 0.1U_DIS C840 0.1U_DISC840 0.1U_DIS C841 0.1U_DISC841 0.1U_DIS C847 0.1U_DISC847 0.1U_DIS C848 0.1U_DISC848 0.1U_DIS C852 0.1U_DISC852 0.1U_DIS C851 0.1U_DISC851 0.1U_DIS
C814 0.1U_DISC814 0.1U_DIS C816 0.1U_DISC816 0.1U_DIS C824 0.1U_DISC824 0.1U_DIS C822 0.1U_DISC822 0.1U_DIS C826 0.1U_DISC826 0.1U_DIS C827 0.1U_DISC827 0.1U_DIS C832 0.1U_DISC832 0.1U_DIS C836 0.1U_DISC836 0.1U_DIS C835 0.1U_DISC835 0.1U_DIS C839 0.1U_DISC839 0.1U_DIS C842 0.1U_DISC842 0.1U_DIS C843 0.1U_DISC843 0.1U_DIS C844 0.1U_DISC844 0.1U_DIS C846 0.1U_DISC846 0.1U_DIS C850 0.1U_DISC850 0.1U_DIS C849 0.1U_DISC849 0.1U_DIS
POP FOR DIS
SDVO_CTRLCLK 25 SDVO_CTRLDATA 25
SDVOB_RED- 25 SDVOB_GREEN- 25 SDVOB_BLUE- 25 SDVOB_CLK- 25
SDVOB_RED+ 25 SDVOB_GREEN+ 25 SDVOB_BLUE+ 25 SDVOB_CLK+ 25
QUANTA
QUANTA
QUANTA COMPUTER
COMPUTER
COMPUTER
8
PCIE_MTX_GRX_N0 PCIE_MTX_GRX_N1 PCIE_MTX_GRX_N2 PCIE_MTX_GRX_N3 PCIE_MTX_GRX_N4 PCIE_MTX_GRX_N5 PCIE_MTX_GRX_N6 PCIE_MTX_GRX_N7 PCIE_MTX_GRX_N8 PCIE_MTX_GRX_N9 PCIE_MTX_GRX_N10 PCIE_MTX_GRX_N11 PCIE_MTX_GRX_N12 PCIE_MTX_GRX_N13 PCIE_MTX_GRX_N14 PCIE_MTX_GRX_N15
PCIE_MTX_GRX_P0 PCIE_MTX_GRX_P1 PCIE_MTX_GRX_P2 PCIE_MTX_GRX_P3 PCIE_MTX_GRX_P4 PCIE_MTX_GRX_P5 PCIE_MTX_GRX_P6 PCIE_MTX_GRX_P7 PCIE_MTX_GRX_P8 PCIE_MTX_GRX_P9 PCIE_MTX_GRX_P10 PCIE_MTX_GRX_P11 PCIE_MTX_GRX_P12 PCIE_MTX_GRX_P13 PCIE_MTX_GRX_P14 PCIE_MTX_GRX_P15
SDVOB_INT- 25 SDVOB_INT+ 25
662Monday, March 24, 2008
662Monday, March 24, 2008
662Monday, March 24, 2008
8
of
of
of
1
www.kythuatvitinh.com
DDR_A_D[0..63]15
A A
B B
C C
DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63
U45D
U45D
AR43
SA_DQ_0
AW44
SA_DQ_1
BA45
SA_DQ_2
AY46
SA_DQ_3
AR41
SA_DQ_4
AR45
SA_DQ_5
AT42
SA_DQ_6
AW47
SA_DQ_7
BB45
SA_DQ_8
BF48
SA_DQ_9
BG47
SA_DQ_10
BJ45
SA_DQ_11
BB47
SA_DQ_12
BG50
SA_DQ_13
BH49
SA_DQ_14
BE45
SA_DQ_15
AW43
SA_DQ_16
BE44
SA_DQ_17
BG42
SA_DQ_18
BE40
SA_DQ_19
BF44
SA_DQ_20
BH45
SA_DQ_21
BG40
SA_DQ_22
BF40
SA_DQ_23
AR40
SA_DQ_24
AW40
SA_DQ_25
AT39
SA_DQ_26
AW36
SA_DQ_27
AW41
SA_DQ_28
AY41
SA_DQ_29
AV38
SA_DQ_30
AT38
SA_DQ_31
AV13
SA_DQ_32
AT13
SA_DQ_33
AW11
SA_DQ_34
AV11
SA_DQ_35
AU15
SA_DQ_36
AT11
SA_DQ_37
BA13
SA_DQ_38
BA11
SA_DQ_39
BE10
SA_DQ_40
BD10
SA_DQ_41
BD8
SA_DQ_42
AY9
SA_DQ_43
BG10
SA_DQ_44
AW9
SA_DQ_45
BD7
SA_DQ_46
BB9
SA_DQ_47
BB5
SA_DQ_48
AY7
SA_DQ_49
AT5
SA_DQ_50
AT7
SA_DQ_51
AY6
SA_DQ_52
BB7
SA_DQ_53
AR5
SA_DQ_54
AR8
SA_DQ_55
AR9
SA_DQ_56
AN3
SA_DQ_57
AM8
SA_DQ_58
AN10
SA_DQ_59
AT9
SA_DQ_60
AN9
SA_DQ_61
AM9
SA_DQ_62
AN11
SA_DQ_63
CRESTLINE_1p0_DU
CRESTLINE_1p0_DU
2
SA_RCVEN#
DDR SYSTEM MEMORY A
DDR SYSTEM MEMORY A
SA_BS_0 SA_BS_1 SA_BS_2
SA_CAS#
SA_DM_0 SA_DM_1 SA_DM_2 SA_DM_3 SA_DM_4 SA_DM_5 SA_DM_6 SA_DM_7
SA_DQS_0 SA_DQS_1 SA_DQS_2 SA_DQS_3 SA_DQS_4 SA_DQS_5 SA_DQS_6
SA_DQS_7 SA_DQS#_0 SA_DQS#_1 SA_DQS#_2 SA_DQS#_3 SA_DQS#_4 SA_DQS#_5 SA_DQS#_6 SA_DQS#_7
SA_MA_0 SA_MA_1 SA_MA_2 SA_MA_3 SA_MA_4 SA_MA_5 SA_MA_6 SA_MA_7 SA_MA_8
SA_MA_9 SA_MA_10 SA_MA_11 SA_MA_12 SA_MA_13
SA_RAS#
SA_WE#
3
DDR_A_D63 DDR_A_D34
BB19 BK19 BF29
BL17 AT45
BD44 BD42 AW38 AW13 BG8 AY5 AN6
AT46 BE48 BB43 BC37 BB16 BH6 BB2 AP3 AT47 BD47 BC41 BA37 BA16 BH7 BC1 AP2
BJ19 BD20 BK27 BH28 BL24 BK28 BJ27 BJ25 BL28 BA28 BC19 BE28 BG30 BJ16
BE18 AY20
BA19
DDR_A_D4 DDR_A_DQS#0 DDR_A_DQS0 DDR_A_MA13 DDR_A_MA1 DDR_A_CAS#
DDR_A_RAS#
DDR_A_WE#
DDR_A_BS0 DDR_A_BS1 DDR_A_BS2
DDR_A_CAS# DDR_A_DM0
DDR_A_DM1 DDR_A_DM2 DDR_A_DM3 DDR_A_DM4 DDR_A_DM5 DDR_A_DM6 DDR_A_DM7
DDR_A_DQS0 DDR_A_DQS1 DDR_A_DQS2 DDR_A_DQS3 DDR_A_DQS4 DDR_A_DQS5 DDR_A_DQS6 DDR_A_DQS7 DDR_A_DQS#0 DDR_A_DQS#1 DDR_A_DQS#2 DDR_A_DQS#3 DDR_A_DQS#4 DDR_A_DQS#5 DDR_A_DQS#6 DDR_A_DQS#7
DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13
DDR_A_RAS#
DDR_A_WE#
T29 PADT29 PAD
T206PAD T206PAD T208PAD T208PAD T202PAD T202PAD
T203PAD T203PAD T188PAD T188PAD T190PAD T190PAD T192PAD T192PAD
4
T201 PADT201 PAD T200 PADT200 PAD
T195 PADT195 PAD T196 PADT196 PAD
DDR_A_BS0 15,16 DDR_A_BS1 15,16 DDR_A_BS2 15,16
DDR_A_CAS# 15,16 DDR_A_DM[0..7] 15
DDR_A_DQS[0..7] 15
DDR_A_DQS#[0..7] 15
DDR_A_MA[0..13] 15,16
DDR_A_RAS# 15,16
DDR_A_WE# 15,16
5
DDR_B_D[0..63]15
DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63
U45E
U45E
AP49
SB_DQ_0
AR51
SB_DQ_1
AW50
SB_DQ_2
AW51
SB_DQ_3
AN51
SB_DQ_4
AN50
SB_DQ_5
AV50
SB_DQ_6
AV49
SB_DQ_7
BA50
SB_DQ_8
BB50
SB_DQ_9
BA49
SB_DQ_10
BE50
SB_DQ_11
BA51
SB_DQ_12
AY49
SB_DQ_13
BF50
SB_DQ_14
BF49
SB_DQ_15
BJ50
SB_DQ_16
BJ44
SB_DQ_17
BJ43
SB_DQ_18
BL43
SB_DQ_19
BK47
SB_DQ_20
BK49
SB_DQ_21
BK43
SB_DQ_22
BK42
SB_DQ_23
BJ41
SB_DQ_24
BL41
SB_DQ_25
BJ37
SB_DQ_26
BJ36
SB_DQ_27
BK41
SB_DQ_28
BJ40
SB_DQ_29
BL35
SB_DQ_30
BK37
SB_DQ_31
BK13
SB_DQ_32
BE11
SB_DQ_33
BK11
SB_DQ_34
BC11
SB_DQ_35
BC13
SB_DQ_36
BE12
SB_DQ_37
BC12
SB_DQ_38
BG12
SB_DQ_39
BJ10
SB_DQ_40
BL9
SB_DQ_41
BK5
SB_DQ_42
BL5
SB_DQ_43
BK9
SB_DQ_44
BK10
SB_DQ_45
BJ8
SB_DQ_46
BJ6
SB_DQ_47
BF4
SB_DQ_48
BH5
SB_DQ_49
BG1
SB_DQ_50
BC2
SB_DQ_51
BK3
SB_DQ_52
BE4
SB_DQ_53
BD3
SB_DQ_54
BJ2
SB_DQ_55
BA3
SB_DQ_56
BB3
SB_DQ_57
AR1
SB_DQ_58
AT3
SB_DQ_59
AY2
SB_DQ_60
AY3
SB_DQ_61
AU2
SB_DQ_62
AT2
SB_DQ_63
CRESTLINE_1p0_DU
CRESTLINE_1p0_DU
6
SB_BS_0 SB_BS_1
SB_BS_2 SB_CAS# SB_DM_0
SB_DM_1 SB_DM_2 SB_DM_3 SB_DM_4 SB_DM_5 SB_DM_6 SB_DM_7
SB_DQS_0 SB_DQS_1 SB_DQS_2 SB_DQS_3 SB_DQS_4 SB_DQS_5 SB_DQS_6
SB_DQS_7 SB_DQS#_0 SB_DQS#_1 SB_DQS#_2 SB_DQS#_3 SB_DQS#_4 SB_DQS#_5 SB_DQS#_6 SB_DQS#_7
SB_MA_0 SB_MA_1 SB_MA_2 SB_MA_3 SB_MA_4 SB_MA_5 SB_MA_6 SB_MA_7 SB_MA_8
SB_MA_9 SB_MA_10 SB_MA_11 SB_MA_12 SB_MA_13
SB_RAS#
SB_RCVEN#
SB_WE#
DDR SYSTEM MEMORY B
DDR SYSTEM MEMORY B
AY17 BG18 BG36
BE17 AR50
BD49 BK45 BL39 BH12 BJ7 BF3 AW2
AT50 BD50 BK46 BK39 BJ12 BL7 BE2 AV2 AU50 BC50 BL45 BK38 BK12 BK7 BF2 AV3
BC18 BG28 BG25 AW17 BF25 BE25 BA29 BC28 AY28 BD37 BG17 BE37 BA39 BG13
AV16 AY18
BC17
7
DDR_B_BS0 DDR_B_BS1 DDR_B_BS2
DDR_B_CAS# DDR_B_DM0
DDR_B_DM1 DDR_B_DM2 DDR_B_DM3 DDR_B_DM4 DDR_B_DM5 DDR_B_DM6 DDR_B_DM7
DDR_B_DQS0 DDR_B_DQS1 DDR_B_DQS2 DDR_B_DQS3 DDR_B_DQS4 DDR_B_DQS5 DDR_B_DQS6 DDR_B_DQS7 DDR_B_DQS#0 DDR_B_DQS#1 DDR_B_DQS#2 DDR_B_DQS#3 DDR_B_DQS#4 DDR_B_DQS#5 DDR_B_DQS#6 DDR_B_DQS#7
DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8 DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13
DDR_B_RAS#
DDR_B_WE#
T28 PADT28 PAD
DDR_B_BS0 15,16 DDR_B_BS1 15,16 DDR_B_BS2 15,16
DDR_B_CAS# 15,16 DDR_B_DM[0..7] 15
DDR_B_DQS[0..7] 15
DDR_B_DQS#[0..7] 15
DDR_B_MA[0..13] 15,16
DDR_B_RAS# 15,16
DDR_B_WE# 15,16
8
D D
QUANTA
QUANTA
QUANTA COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
1
2
3
4
5
6
Date: Sheet
Date: Sheet
Date: Sheet
Crestline (DDR2)
Crestline (DDR2)
Crestline (DDR2)
GM3 2B
GM3 2B
GM3 2B
7
of
of
of
762Monday, March 24, 2008
762Monday, March 24, 2008
762Monday, March 24, 2008
8
5
www.kythuatvitinh.com
+1.05V_VCCP
D D
+1.8V_SUS
C C
B B
+1.05V_VCCP
R185
R185 0_0805_UMA
0_0805_UMA
1 2
A A
R182
(3)
R182 0_0805_DIS
0_0805_DIS
1 2
U45G
U45G
AT35
VCC_1
AT34
VCC_2
AH28
VCC_3
AC32
VCC_5
AC31
VCC_4
AK32
VCC_6
AJ31
VCC_7
AJ28
VCC_8
AH32
VCC_9
AH31
VCC_10
AH29
VCC_11
AF32
VCC_12
R30
VCC_13
AU32
VCC_SM_1
AU33
VCC_SM_2
AU35
VCC_SM_3
AV33
VCC_SM_4
AW33
VCC_SM_5
AW35
VCC_SM_6
AY35
VCC_SM_7
BA32
VCC_SM_8
BA33
VCC_SM_9
BA35
VCC_SM_10
BB33
VCC_SM_11
BC32
VCC_SM_12
BC33
VCC_SM_13
BC35
VCC_SM_14
BD32
VCC_SM_15
BD35
VCC_SM_16
BE32
VCC_SM_17
BE33
VCC_SM_18
BE35
VCC_SM_19
BF33
VCC_SM_20
BF34
VCC_SM_21
BG32
VCC_SM_22
BG33
VCC_SM_23
BG35
VCC_SM_24
BH32
VCC_SM_25
BH34
VCC_SM_26
BH35
VCC_SM_27
BJ32
VCC_SM_28
BJ33
VCC_SM_29
BJ34
VCC_SM_30
BK32
VCC_SM_31
BK33
VCC_SM_32
BK34
VCC_SM_33
BK35
VCC_SM_34
BL33
VCC_SM_35
AU30
VCC_SM_36
R20
VCC_AXG_1
T14
VCC_AXG_2
W13
VCC_AXG_3
W14
VCC_AXG_4
Y12
VCC_AXG_5
AA20
VCC_AXG_6
AA23
VCC_AXG_7
AA26
VCC_AXG_8
AA28
VCC_AXG_9
AB21
VCC_AXG_10
AB24
VCC_AXG_11
AB29
VCC_AXG_12
AC20
VCC_AXG_13
AC21
VCC_AXG_14
AC23
VCC_AXG_15
AC24
VCC_AXG_16
AC26
VCC_AXG_17
AC28
VCC_AXG_18
AC29
VCC_AXG_19
AD20
VCC_AXG_20
AD23
VCC_AXG_21
AD24
VCC_AXG_22
AD28
VCC_AXG_23
AF21
VCC_AXG_24
AF26
VCC_AXG_25
AA31
VCC_AXG_26
AH20
VCC_AXG_27
AH21
VCC_AXG_28
AH23
VCC_AXG_29
AH24
VCC_AXG_30
AH26
VCC_AXG_31
AD31
VCC_AXG_32
AJ20
VCC_AXG_33
AN14
VCC_AXG_34
CRESTLINE_1p0_DU
CRESTLINE_1p0_DU
5
VCC CORE
VCC CORE
POWER
POWER
VCC SMVCC GFX
VCC SMVCC GFX
VCC_AXG_NCTF_1 VCC_AXG_NCTF_2 VCC_AXG_NCTF_3 VCC_AXG_NCTF_4 VCC_AXG_NCTF_5 VCC_AXG_NCTF_6 VCC_AXG_NCTF_7 VCC_AXG_NCTF_8
VCC_AXG_NCTF_9 VCC_AXG_NCTF_10 VCC_AXG_NCTF_11 VCC_AXG_NCTF_12 VCC_AXG_NCTF_13 VCC_AXG_NCTF_14 VCC_AXG_NCTF_15 VCC_AXG_NCTF_16 VCC_AXG_NCTF_17 VCC_AXG_NCTF_18 VCC_AXG_NCTF_19 VCC_AXG_NCTF_20 VCC_AXG_NCTF_21 VCC_AXG_NCTF_22 VCC_AXG_NCTF_23 VCC_AXG_NCTF_24 VCC_AXG_NCTF_25 VCC_AXG_NCTF_26 VCC_AXG_NCTF_27 VCC_AXG_NCTF_28 VCC_AXG_NCTF_29 VCC_AXG_NCTF_30 VCC_AXG_NCTF_31 VCC_AXG_NCTF_32 VCC_AXG_NCTF_33 VCC_AXG_NCTF_34 VCC_AXG_NCTF_35 VCC_AXG_NCTF_36 VCC_AXG_NCTF_37 VCC_AXG_NCTF_38 VCC_AXG_NCTF_39 VCC_AXG_NCTF_40 VCC_AXG_NCTF_41 VCC_AXG_NCTF_42 VCC_AXG_NCTF_43 VCC_AXG_NCTF_44 VCC_AXG_NCTF_45 VCC_AXG_NCTF_46 VCC_AXG_NCTF_47 VCC_AXG_NCTF_48 VCC_AXG_NCTF_49 VCC_AXG_NCTF_50 VCC_AXG_NCTF_51 VCC_AXG_NCTF_52 VCC_AXG_NCTF_53 VCC_AXG_NCTF_54 VCC_AXG_NCTF_55
VCC GFX NCTF
VCC GFX NCTF
VCC_AXG_NCTF_56 VCC_AXG_NCTF_57 VCC_AXG_NCTF_58 VCC_AXG_NCTF_59 VCC_AXG_NCTF_60 VCC_AXG_NCTF_61 VCC_AXG_NCTF_62 VCC_AXG_NCTF_63 VCC_AXG_NCTF_64 VCC_AXG_NCTF_65 VCC_AXG_NCTF_66 VCC_AXG_NCTF_67 VCC_AXG_NCTF_68 VCC_AXG_NCTF_69 VCC_AXG_NCTF_70 VCC_AXG_NCTF_71 VCC_AXG_NCTF_72 VCC_AXG_NCTF_73 VCC_AXG_NCTF_74 VCC_AXG_NCTF_75 VCC_AXG_NCTF_76 VCC_AXG_NCTF_77 VCC_AXG_NCTF_78 VCC_AXG_NCTF_79 VCC_AXG_NCTF_80 VCC_AXG_NCTF_81 VCC_AXG_NCTF_82 VCC_AXG_NCTF_83
VCC_SM_LF1 VCC_SM_LF2 VCC_SM_LF3 VCC_SM_LF4 VCC_SM_LF5 VCC_SM_LF6 VCC_SM_LF7
VCC SM LF
VCC SM LF
T17 T18 T19 T21 T22 T23 T25 U15 U16 U17 U19 U20 U21 U23 U26 V16 V17 V19 V20 V21 V23 V24 Y15 Y16 Y17 Y19 Y20 Y21 Y23 Y24 Y26 Y28 Y29 AA16 AA17 AB16 AB19 AC16 AC17 AC19 AD15 AD16 AD17 AF16 AF19 AH15 AH16 AH17 AH19 AJ16 AJ17 AJ19 AK16 AK19 AL16 AL17 AL19 AL20 AL21 AL23 AM15 AM16 AM19 AM20 AM21 AM23 AP15 AP16 AP17 AP19 AP20 AP21 AP23 AP24 AR20 AR21 AR23 AR24 AR26 V26 V28 V29 Y31
AW45 BC39 BE39 BD17 BD4 AW8 AT6
4
UMA POP POWER JUMP AND C234 &C233
UMA POP POWER JUMP AND ALL CAP
1 2
VCCSM_LF1 VCCSM_LF2 VCCSM_LF3 VCCSM_LF4 VCCSM_LF5 VCCSM_LF6 VCCSM_LF7
4
1 2
R63 0_0805_UMAR63 0_0805_UMA
1 2
R64 0_0805_UMAR64 0_0805_UMA
R171
C355
C355
0.1U/10V
0.1U/10V
1 2
R171 0_0805_DIS
0_0805_DIS
R65
R65 0_0805_DIS
0_0805_DIS
12
+1.05V_VCCP
Layout Note: 370 mils from edge.
Layout Note: 370 mils from edge.
+
+
C263
C263 220U_UMA
220U_UMA
2.5 7343
2.5 7343
(3)
Layout Note: Inside GMCH cavity for VCC_AXM.
C297
C297
0.1U_UMA
0.1U_UMA
(3)
12
12
C362
C362
C371
C371
0.1U/10V
0.1U/10V
0.22U/10V
0.22U/10V
12
C367
C367
0.22U/10V
0.22U/10V
3
+
+
C829
C829 220U
220U
+
+
C820
C820 220U_UMA
220U_UMA
2.5 7343
2.5 7343
C308
C308
0.1U_UMA
0.1U_UMA
3
12
C314
C314
0.47U_UMA
0.47U_UMA
603 10
603 10
+1.05V_VCCP
Non-iAMT
12
C372
C372
0.47U/10V
0.47U/10V
+3.3V_RUN
R170 10R170 10
1 2
Layout Note: Inside GMCH cavity.
12
C307
C307 22U/4V
22U/4V
C294
C294
0.22U/10V
0.22U/10V
+
+
C834
C834 220U_NC
220U_NC
2.5 7343
2.5 7343
12
C365
C365 1U/10V
1U/10V
+
+
C279
C279 220U_NC
220U_NC
2.5 7343
2.5 7343
C291
C330
C330 1U_UMA
1U_UMA
603 10
603 10
Layout Note: Place close to GMCH edge.
C291 10U_UMA
10U_UMA
Layout Note: Inside GMCH cavity.
12
C337
C337
0.1U/10V
0.1U/10V
12
C345
C345 22U/4V
22U/4V
12
C363
C363 1U/10V
1U/10V
+VCC_GMCH_L
12
C300
C300
0.22U/10V
0.22U/10V
+1.05V_VCCP
+1.05V_VCCP
C857
C857 22U_UMA
22U_UMA
805 4
805 4
6.3805
6.3805
12
C331
C331
0.1U/10V
0.1U/10V
12
C318
C318
0.22U/10V
0.22U/10V
2
D6
D6
21
SDMK0340L-7-F
SDMK0340L-7-F
12
C333
C333
0.1U/10V
0.1U/10V
12
C320
C320
0.1U/10V
0.1U/10V
12
C339
C339
0.22U/10V
0.22U/10V
+1.8V_SUS
12
C430
C430
0.1U/10V
0.1U/10V
Layout Note: Place C233 where LVDS and DDR2 taps.
2
1
U45F
U45F
AB33
VCC_NCTF_1
AB36
VCC_NCTF_2
AB37
VCC_NCTF_3
AC33
VCC_NCTF_4
AC35
VCC_NCTF_5
AC36
VCC_NCTF_6
AD35
VCC_NCTF_7
AD36
VCC_NCTF_8
AF33
VCC_NCTF_9
AF36
VCC_NCTF_10
AH33
VCC_NCTF_11
AH35
VCC_NCTF_12
AH36
VCC_NCTF_13
AH37
VCC_NCTF_14
AJ33
VCC_NCTF_15
AJ35
VCC_NCTF_16
AK33
VCC_NCTF_17
AK35
VCC_NCTF_18
AK36
VCC_NCTF_19
AK37
VCC_NCTF_20
AD33
VCC_NCTF_21
AJ36
VCC_NCTF_22
AM35
VCC_NCTF_23
AL33
VCC_NCTF_24
AL35
VCC_NCTF_25
AA33
VCC_NCTF_26
AA35
VCC_NCTF_27
AA36
VCC_NCTF_28
AP35
VCC_NCTF_29
AP36
VCC_NCTF_30
AR35
VCC_NCTF_31
AR36
VCC_NCTF_32
Y32
VCC_NCTF_33
Y33
VCC_NCTF_34
Y35
VCC_NCTF_35
Y36
VCC_NCTF_36
Y37
VCC_NCTF_37
T30
VCC_NCTF_38
T34
VCC_NCTF_39
T35
VCC_NCTF_40
U29
VCC_NCTF_41
U31
VCC_NCTF_42
U32
VCC_NCTF_43
U33
VCC_NCTF_44
U35
VCC_NCTF_45
U36
VCC_NCTF_46
V32
VCC_NCTF_47
V33
VCC_NCTF_48
V36
VCC_NCTF_49
V37
VCC_NCTF_50
AL24
VCC_AXM_NCTF_1
AL26
VCC_AXM_NCTF_2
AL28
VCC_AXM_NCTF_3
AM26
VCC_AXM_NCTF_4
AM28
VCC_AXM_NCTF_5
AM29
VCC_AXM_NCTF_6
AM31
VCC_AXM_NCTF_7
AM32
VCC_AXM_NCTF_8
AM33
VCC_AXM_NCTF_9
AP29
VCC_AXM_NCTF_10
AP31
VCC_AXM_NCTF_11
AP32
VCC_AXM_NCTF_12
AP33
VCC_AXM_NCTF_13
AL29
VCC_AXM_NCTF_14
AL31
VCC_AXM_NCTF_15
AL32
VCC_AXM_NCTF_16
AR31
VCC_AXM_NCTF_17
AR32
VCC_AXM_NCTF_18
AR33
VCC_AXM_NCTF_19
CRESTLINE_1p0_DU
CRESTLINE_1p0_DU
VSS NCTF
VSS NCTF
VCC NCTF
VCC NCTF
POWER
POWER
VCC AXM NCTF
VCC AXM NCTF
VSS_NCTF_1 VSS_NCTF_2 VSS_NCTF_3 VSS_NCTF_4 VSS_NCTF_5 VSS_NCTF_6 VSS_NCTF_7 VSS_NCTF_8
VSS_NCTF_9 VSS_NCTF_10 VSS_NCTF_11 VSS_NCTF_12 VSS_NCTF_13 VSS_NCTF_14 VSS_NCTF_15 VSS_NCTF_16 VSS_NCTF_17 VSS_NCTF_18 VSS_NCTF_19 VSS_NCTF_20 VSS_NCTF_21
VSS SCBVCC AXM
VSS SCBVCC AXM
VCC_AXM_1 VCC_AXM_2 VCC_AXM_3 VCC_AXM_4 VCC_AXM_5 VCC_AXM_6 VCC_AXM_7
VSS_SCB1 VSS_SCB2 VSS_SCB3 VSS_SCB4 VSS_SCB5 VSS_SCB6
T27 T37 U24 U28 V31 V35 AA19 AB17 AB35 AD19 AD37 AF17 AF35 AK17 AM17 AM24 AP26 AP28 AR15 AR19 AR28
A3 B2 C1 BL1 BL51 A51
AT33 AT31 AK29 AK24 AK23 AJ26 AJ23
VCC_SM
12
+
+
C438
C438 330U/2.5V
330U/2.5V
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
12
12
C415
C415
C422
C422
22U/4V
22U/4V
22U/4V
22U/4V
Layout Note: Place on the edge.
QUANTA
QUANTA
QUANTA COMPUTER
Crestline (VCC,NCTF)
Crestline (VCC,NCTF)
Crestline (VCC,NCTF)
GM3 2B
GM3 2B
GM3 2B
862Monday, March 24, 2008
862Monday, March 24, 2008
862Monday, March 24, 2008
1
+1.05V_VCCP
of
of
of
5
www.kythuatvitinh.com
FB_180ohm+-25%_100mHz_1500mA_0.09ohm DC
+3.3V_RUN
UMA POP ALL BESIDES C462
D D
Non-iAMT
+1.25V_RUN
L30
L30 BLM18AG121SN1D
BLM18AG121SN1D
603
603
1 2
0.5/F 603
0.5/F 603
+VCCA_MPLL_L
12
C858
C858 22U
22U
1206 10V
1206 10V
BLM18PG181SN1D_UMA
BLM18PG181SN1D_UMA
L19
L19
603
603
45mA MAx.
FB_120ohm+-25%_100mHz _200mA_0.2ohm DC
+VCCA_HPLL
12
12
C856
C856 22U/10V
22U/10V
1206
1206
L33
L33 BLM18AG121SN1D
BLM18AG121SN1D
603
603
+VCCA_MPLL
12
10V
10V
R294
R294
R204 0_0402_UMAR204 0_0402_UMA
C249
C249
0.1U_UMA
0.1U_UMA
10
10
40mA MAx.
+1.25V_RUN
10uH+-20%_100mA
12
C342
C342
0.1U/10V
0.1U/10V
10V
10V
12
C352
C352
0.1U
0.1U
10V
10V
0.1Caps should be placed 200 mils with in its pins.
+1.25V_RUN
Non-iAMT
R232 0_DISR232 0_DIS R736 0_DISR736 0_DIS
C C
R711 0_DISR711 0_DIS R169 0_DISR169 0_DIS R206 0_DISR206 0_DIS R186 0_DISR186 0_DIS R210 0_DISR210 0_DIS R731 0_DISR731 0_DIS R172 0_DISR172 0_DIS R211 0_DISR211 0_DIS R224 0_DISR224 0_DIS R725 0_DISR725 0_DIS
+VCCD_LVDS_R
+VCCQ_TVDAC_RR
+VCCD_CRT_R +VCC_TVDACC_RR +VCC_TVDACB_RR +VCC_TVDACA_RR +VCC_TVDACA_RR +VCC_TX_LVDS_L +VCCA_DPLLA +VCCA_DPLLB +VCCA_DAC_BG +VCCA_CRT_DAC +VCCSYNC
1
123
C239
C239 22nF/3P_NC
22nF/3P_NC
L13
L13 10uH/100MA_UMA
10uH/100MA_UMA
805
805
L15
L15 10uH/100MA_UMA
10uH/100MA_UMA
12
C435
C435
+
+
100U
100U
7343
7343 2V
2V
+VCCA_CRT_DAC+VCCA_CRTDAC
UMA POP ALL
+VCCA_DPLLA
+
+
C188
C188 470U/ESR9_UMA
470U/ESR9_UMA
7343
7343
2.5V
2.5V
+VCCA_DPLLB
+
+
C243
C243 470U/ESR9_UMA
470U/ESR9_UMA
7343
7343
2.5V
2.5V
1
1 2
DIS POP ALL
+1.25V_RUN
FB_220ohm+-25%_100MHz _2A_0.1ohm DC
layout note: close to pin A41
B B
C801
C801 1000P_UMA
1000P_UMA
50
50
BLM21PG221SN1D
BLM21PG221SN1D
805
805
+VCC_TX_LVDS_L
L38
L38
1 2
+VCCA_PEG_PLL
12
R299
R299 1/F
1/F
603
603
12
C361
C361 10U
10U
603
603
6.3
6.3
12
C295
C295
0.1U
0.1U
10V
10V
+1.8V_SUS
4
+3.3V_RUN
UMA POP ALL
0_UMA
0_UMA R722
R722
1 2
+VCCA_CRT_DAC
0.1U_UMA 10V
0.1U_UMA 10V C802
C802
C191
C191
+3.3V_RUN
0.1U_UMA
0.1U_UMA
10
10
12
C274
C274
0.1U
0.1U
10V
R704 0_UMAR704 0_UMA
1 2
+VCCD_LVDS
C190
C190 1U_UMA
1U_UMA
603
603 10
10
12
C429
C429 22U
22U
805
805 10
10
10V
12
+1.25V_RUN
+1.25V_RUN
+VCC_TVDACB_RR +VCC_TVDACC_RR
C341
C341
0.1U
0.1U
10V
10V
C189
C189 10U_NC
10U_NC
603
603
6.3
6.3
C236
C236
0.1U_UMA
0.1U_UMA
10
10
12
C346
C346
C418
C418
4.7U
4.7U
22U
22U
805
805
805
805
6.3
6.3
10
10
(1)
+VCCD_CRT_R
+1.25V_RUN
Non-iAMT
UMA POP C493 & RESISTOR
R841
R841
12
0_UMA
0_UMA
Non-iAMT
+VCCSYNC
+VCCA_DAC_BG
+VCCA_DPLLA
+VCCA_DPLLB +VCCA_HPLL +VCCA_MPLL
+VCC_TX_LVDS_L
+VCCA_PEG_PLL
12
C347
C347 1U
1U
603
603 10
10
+VCCD_CRT_R
+VCCD_TVDAC_RR +VCCQ_TVDAC_RR
+VCCA_PEG_PLL
12
C293
C293
0.1U
0.1U
10V
10V
0_UMA
0_UMA R140
R140
1 2
+VCCD_LVDS_R
AW18
AV19 AU19 AU18 AU17
AT22 AT21 AT19 AT18 AT17 AR17 AR16
BC29 BB29
12
J32
A33 B33
A30 B32
B49 H49 AL2
AM2
A41 B41
K50 K49
U51
C25 B25 C27 B27 B28 A28
M32 L29
N28 AN2 U48
J41
H42
C427
C427 22U
22U
805
805 10
10
U45H
U45H
VCCSYNC VCCA_CRT_DAC_1
VCCA_CRT_DAC_2
VCCA_DAC_BG VSSA_DAC_BG
VCCA_DPLLA VCCA_DPLLB VCCA_HPLL VCCA_MPLL
VCCA_LVDS VSSA_LVDS
VCCA_PEG_BG VSSA_PEG_BG
VCCA_PEG_PLL
VCCA_SM_1 VCCA_SM_2 VCCA_SM_3 VCCA_SM_4 VCCA_SM_5
VCCA_SM_7 VCCA_SM_8 VCCA_SM_9 VCCA_SM_10 VCCA_SM_11 VCCA_SM_NCTF_1 VCCA_SM_NCTF_2
VCCA_SM_CK_1 VCCA_SM_CK_2
VCCA_TVA_DAC_1 VCCA_TVA_DAC_2 VCCA_TVB_DAC_1 VCCA_TVB_DAC_2 VCCA_TVC_DAC_1 VCCA_TVC_DAC_2
VCCD_CRT VCCD_TVDAC
VCCD_QDAC VCCD_HPLL VCCD_PEG_PLL VCCD_LVDS_1
VCCD_LVDS_2
+VTTLF1 +VTTLF2 +VTTLF3
12
C423
C423 1U
1U
603
603 10
10
3
CRTPLLA PEGA SMTV
CRTPLLA PEGA SMTV
POWER
POWER
A CK A LVDS
A CK A LVDS
D TV/CRTLVDS
D TV/CRTLVDS
12
C316
C316
0.47U/10V
0.47U/10V
12
C366
C366 1U
1U
603
603 10
10
12
C267
C267
0.47U/10V
0.47U/10V
AXD
AXD
DMI
DMI
VTT_1 VTT_2 VTT_3 VTT_4 VTT_5 VTT_6 VTT_7 VTT_8
VTT_9 VTT_10 VTT_11 VTT_12 VTT_13 VTT_14
VTT
VTT
VTT_15 VTT_16 VTT_17 VTT_18 VTT_19 VTT_20 VTT_21 VTT_22
VCC_AXD_1 VCC_AXD_2 VCC_AXD_3 VCC_AXD_4 VCC_AXD_5 VCC_AXD_6
VCC_AXD_NCTF
VCC_AXF_1 VCC_AXF_2 VCC_AXF_3
AXF
AXF
VCC_DMI
VCC_SM_CK_1 VCC_SM_CK_2 VCC_SM_CK_3 VCC_SM_CK_4
SM CK
SM CK
VCC_TX_LVDS
VCC_HV_1 VCC_HV_2
HV
HV
VCC_PEG_1 VCC_PEG_2 VCC_PEG_3 VCC_PEG_4 VCC_PEG_5
PEG
PEG
VCC_RXR_DMI_1 VCC_RXR_DMI_2
VTTLF1 VTTLF2 VTTLF3
VTTLF
VTTLF
CRESTLINE_1p0_DU
CRESTLINE_1p0_DU
12
C804
C804
0.47U/10V
0.47U/10V
12
C394
C394
0.1U
0.1U
10V
10V
U13 U12 U11 U9 U8 U7 U5 U3 U2 U1 T13 T11 T10 T9 T7 T6 T5 T3 T2 R3 R2 R1
AT23 AU28 AU24 AT29 AT25 AT30
AR29
B23 B21 A21
AJ50
BK24 BK23 BJ24 BJ23
A43
C40 B40
AD51 W50 W51 V49 V50
AH50 AH51
A7 F2 AH1
+VCC_SM_CK
+3.3V_RUN
+VCC_RXR_DMI
+VTTLF1 +VTTLF2 +VTTLF3
+1.05V_VCCP
12
12
C292
C292
2.2U/6.3V
2.2U/6.3V
C281
C281
4.7U/6.3V
4.7U/6.3V
Place on the edge.
12
12
Place on the edge.
+VCC_AXD_L
12
+VCC_TX_LVDS_L
12
C259
C259
0.1U/10V
0.1U/10V
10V
10V
C296
C296
0.47U/6.3V
0.47U/6.3V
C360
C360 1U/10V
1U/10V
+1.25V_RUN
C290
C290
4.7U
4.7U
603
603
6.3
6.3
1 2
12
C442
C442 22U/10V
22U/10V
Place caps close to VCC_AXD.
12
C328
C328
0.1U
0.1U
10V
10V
+VCC_PEG
12
+
+
C353
C353 220U/4V
220U/4V
2V
2V
12
+
+
C354
C354 220U/4V
220U/4V
+VCC_SM_CK
12
C405
C405 22U/10V
22U/10V
2
+1.05V_VCCP
12
+
+
C299
C299 220U/4V
220U/4V
7343
7343
2
2
L52 0L52 0
Reserved L pad for inductor.
+1.25V_RUN
0_UMA
0_UMA
R730
R730
1 2
12
C289
C289 10U/6.3V
10U/6.3V
91uH+-20%_1.5A
6.3
6.3 12
C853
C853 10U/6.3V
10U/6.3V
L49
L49 1uH/300mA
1uH/300mA
12
1uH+-20%_300mA
R314
R314
12
1/F/0603
1/F/0603
C376
C376
+VCC_SM_CK_L
0.1U/10V
0.1U/10V
12
C374
C374 10U/6.3V
10U/6.3V
+1.05V_VCCP
Non­iAMT
+1.25V_RUN
VCC_HV
D8
D8 SDMK0340L-7-F_NC
SDMK0340L-7-F_NC
21
+VCC_HV_L
12
+3.3V_RUN
+1.25V_RUN
R184
R184 10_NC
10_NC
1
12
12
1uH+-20%_300mA
+VCC_TX_LVDS +VCC_TX_LVDS_R
12
C803
C803 1000P_UMA
1000P_UMA
50
50
12
L76
L76 1uH/300MA_UMA
1uH/300MA_UMA
805
805
+
+
C818
C818 220U_UMA
220U_UMA
7343
7343
2.5
2.5
L39
L39 91nH/1.5A
91nH/1.5A
L40
L40 91nH/1.5A
91nH/1.5A
91uH+-20%_1.5A
12
C252
C252
C251
C251
10U/6.3V
10U/6.3V
1U/10V
1U/10V
Place caps close to B23, B21, A21
Place 0 ohm close to +1.8V_SUS
UMA POP ALL
+1.05V_VCCP
+1.05V_VCCP
12
+1.8V_SUS
R842
R842 0_UMA
0_UMA
1
+1.8V_SUS
12
layout shound close to BB29 & BC29
FB_180ohm+-25%_100mHz_1500mA_0.09ohm DC
+3.3V_RUN
22nF & 0.1uF for VCC_TVDACA:C_R should be placed with in 250 mils from Crestline.
+VCCA_DAC_BG +VCC_TVBG
R710 0_UMAR710 0_UMA
A A
+1.5V_RUN
D28
D28
2 1
SDMK0340L-7-F_NC
SDMK0340L-7-F_NC
TV DAC Voltage Follower Circuit -700 mV.
UMA POP ALL BESIDES C466, C467, C463, C454, R441 & D33
L16
L16
BLM18PG181SN1D_UMA
BLM18PG181SN1D_UMA
603
603
R729
R729
0.03/F_UMA
123
C794
C794 22nF/3P_NC
22nF/3P_NC
+VCC_TVDAC_L
5
0.03/F_UMA
2010
2010
C796
C796
0.1U_UMA
0.1U_UMA
10
10
+3.3V_RUN
R697 10_NCR697 10_NC
+VCC_TVDAC +VCC_TVDACA_RR
R223 0_0402_UMAR223 0_0402_UMA
C256
C241
C241 10U_UMA
10U_UMA
805
805
6.3
6.3
C256
0.1U_UMA
0.1U_UMA
10
10
R712 0_UMAR712 0_UMA
C795
C795
0.1U_UMA
0.1U_UMA
10
10
R191 0_UMAR191 0_UMA
C250
C250
0.1U_UMA
0.1U_UMA
10
10
123
C258
C258 22nF/3P_NC
22nF/3P_NC
123
C793
C793 22nF/3P_NC
22nF/3P_NC
123
C237
C237 22nF/3P_NC
22nF/3P_NC
+VCC_TVDACB_RR
+VCC_TVDACC_RR
4
+1.5V_RUN
+1.5V_RUN
UMA POP ALL BESIDES C498 & C 506
L77
L77 BLM18PG181SN1D_UMA
BLM18PG181SN1D_UMA
FB_180ohm+-25%_
<Size>
<Size>
100mHz_1500mA_
<Voltage>
<Voltage>
0.09ohm DC
12
C779
C779 10U_DIS
10U_DIS
603
603
6.3
6.3
12
C792
C792
0.1U_DIS
0.1U_DIS
10V
10V
C790
C790
0.1U_UMA
0.1U_UMA
10
10
+VCCQ_TVDAC
C806
C806
0.1U/10V/0402_UMA
0.1U/10V/0402_UMA
0_DIS
0_DIS R162
R162
1 2
12
C780
C780
0.022U_DIS
0.022U_DIS
16
16 603
603
DIS POP ALL
R707 0_0402_UMAR707 0_0402_UMA
123
C791
C791 22nF/3P_NC
22nF/3P_NC
R727 0_0402_UMAR727 0_0402_UMA
123
C799
C799 22nF/3P_NC
22nF/3P_NC
3
+VCCD_TVDAC_RR
+VCCD_CRT_R
+VCCQ_TVDAC_RR
QUANTA
QUANTA
QUANTA COMPUTER
COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
2
Date: Sheet
COMPUTER
Crestline (POWER)
Crestline (POWER)
Crestline (POWER)
GM3 2B
GM3 2B
GM3 2B
1
of
of
of
962Monday, March 24, 2008
962Monday, March 24, 2008
962Monday, March 24, 2008
5
www.kythuatvitinh.com
U45I
U45I
A13
VSS_1
A15
VSS_2
A17
VSS_3
A24
VSS_4
AA21
VSS_5
AA24
VSS_6
AA29
VSS_7
D D
C C
B B
A A
5
AB20
VSS_8
AB23
VSS_9
AB26
VSS_10
AB28
VSS_11
AB31
VSS_12
AC10
VSS_13
AC13
VSS_14
AC3
VSS_15
AC39
VSS_16
AC43
VSS_17
AC47
VSS_18
AD1
VSS_19
AD21
VSS_20
AD26
VSS_21
AD29
VSS_22
AD3
VSS_23
AD41
VSS_24
AD45
VSS_25
AD49
VSS_26
AD5
VSS_27
AD50
VSS_28
AD8
VSS_29
AE10
VSS_30
AE14
VSS_31
AE6
VSS_32
AF20
VSS_33
AF23
VSS_34
AF24
VSS_35
AF31
VSS_36
AG2
VSS_37
AG38
VSS_38
AG43
VSS_39
AG47
VSS_40
AG50
VSS_41
AH3
VSS_42
AH40
VSS_43
AH41
VSS_44
AH7
VSS_45
AH9
VSS_46
AJ11
VSS_47
AJ13
VSS_48
AJ21
VSS_49
AJ24
VSS_50
AJ29
VSS_51
AJ32
VSS_52
AJ43
VSS_53
AJ45
VSS_54
AJ49
VSS_55
AK20
VSS_56
AK21
VSS_57
AK26
VSS_58
AK28
VSS_59
AK31
VSS_60
AK51
VSS_61
AL1
VSS_62
AM11
VSS_63
AM13
VSS_64
AM3
VSS_65
AM4
VSS_66
AM41
VSS_67
AM45
VSS_68
AN1
VSS_69
AN38
VSS_70
AN39
VSS_71
AN43
VSS_72
AN5
VSS_73
AN7
VSS_74
AP4
VSS_75
AP48
VSS_76
AP50
VSS_77
AR11
VSS_78
AR2
VSS_79
AR39
VSS_80
AR44
VSS_81
AR47
VSS_82
AR7
VSS_83
AT10
VSS_84
AT14
VSS_85
AT41
VSS_86
AT49
VSS_87
AU1
VSS_88
AU23
VSS_89
AU29
VSS_90
AU3
VSS_91
AU36
VSS_92
AU49
VSS_93
AU51
VSS_94
AV39
VSS_95
AV48
VSS_96
AW1
VSS_97
AW12
VSS_98
AW16
VSS_99
CRESTLINE_1p0_DU
CRESTLINE_1p0_DU
VSS
VSS
4
4
VSS_100 VSS_101 VSS_102 VSS_103 VSS_104 VSS_105 VSS_106 VSS_107 VSS_108 VSS_109 VSS_110 VSS_111 VSS_112 VSS_113 VSS_114 VSS_115 VSS_116 VSS_117 VSS_118 VSS_119 VSS_120 VSS_121 VSS_122 VSS_123 VSS_124 VSS_125 VSS_126 VSS_127 VSS_128 VSS_129 VSS_130 VSS_131 VSS_132 VSS_133 VSS_134 VSS_135 VSS_136 VSS_137 VSS_138 VSS_139 VSS_140 VSS_141 VSS_142 VSS_143 VSS_144 VSS_145 VSS_146 VSS_147 VSS_148 VSS_149 VSS_150 VSS_151 VSS_152 VSS_153 VSS_154 VSS_155 VSS_156 VSS_157 VSS_158 VSS_159 VSS_160 VSS_161 VSS_162 VSS_163 VSS_164 VSS_165 VSS_166 VSS_167 VSS_168 VSS_169 VSS_170 VSS_171 VSS_172 VSS_173 VSS_174 VSS_175 VSS_176 VSS_177 VSS_178 VSS_179 VSS_180 VSS_181 VSS_182 VSS_183 VSS_184 VSS_185 VSS_186 VSS_187 VSS_188 VSS_189 VSS_190 VSS_191 VSS_192 VSS_193 VSS_194 VSS_195 VSS_196 VSS_197 VSS_198
AW24 AW29 AW32 AW5 AW7 AY10 AY24 AY37 AY42 AY43 AY45 AY47 AY50 B10 B20 B24 B29 B30 B35 B38 B43 B46 B5 B8 BA1 BA17 BA18 BA2 BA24 BB12 BB25 BB40 BB44 BB49 BB8 BC16 BC24 BC25 BC36 BC40 BC51 BD13 BD2 BD28 BD45 BD48 BD5 BE1 BE19 BE23 BE30 BE42 BE51 BE8 BF12 BF16 BF36 BG19 BG2 BG24 BG29 BG39 BG48 BG5 BG51 BH17 BH30 BH44 BH46 BH8 BJ11 BJ13 BJ38 BJ4 BJ42 BJ46 BK15 BK17 BK25 BK29 BK36 BK40 BK44 BK6 BK8 BL11 BL13 BL19 BL22 BL37 BL47 C12 C16 C19 C28 C29 C33 C36 C41
3
U45J
U45J
C46
VSS_199
C50
VSS_200
C7
VSS_201
D13
VSS_202
D24
VSS_203
D3
VSS_204
D32
VSS_205
D39
VSS_206
D45
VSS_207
D49
VSS_208
E10
VSS_209
E16
VSS_210
E24
VSS_211
E28
VSS_212
E32
VSS_213
E47
VSS_214
F19
VSS_215
F36
VSS_216
F4
VSS_217
F40
VSS_218
F50
VSS_219
G1
VSS_220
G13
VSS_221
G16
VSS_222
G19
VSS_223
G24
VSS_224
G28
VSS_225
G29
VSS_226
G33
VSS_227
G42
VSS_228
G45
VSS_229
G48
VSS_230
G8
VSS_231
H24
VSS_232
H28
VSS_233
H4
VSS_234
H45
VSS_235
J11
VSS_236
J16
VSS_237
J2
VSS_238
J24
VSS_239
J28
VSS_240
J33
VSS_241
J35
VSS_242
J39
VSS_243
K12
VSS_245
K47
VSS_246
K8
VSS_247
L1
VSS_248
L17
VSS_249
L20
VSS_250
L24
VSS_251
L28
VSS_252
L3
VSS_253
L33
VSS_254
L49
VSS_255
M28
VSS_256
M42
VSS_257
M46
VSS_258
M49
VSS_259
M5
VSS_260
M50
VSS_261
M9
VSS_262
N11
VSS_263
N14
VSS_264
N17
VSS_265
N29
VSS_266
N32
VSS_267
N36
VSS_268
N39
VSS_269
N44
VSS_270
N49
VSS_271
N7
VSS_272
P19
VSS_273
P2
VSS_274
P23
VSS_275
P3
VSS_276
P50
VSS_277
R49
VSS_278
T39
VSS_279
T43
VSS_280
T47
VSS_281
U41
VSS_282
U45
VSS_283
U50
VSS_284
V2
VSS_285
V3
VSS_286
CRESTLINE_1p0_DU
CRESTLINE_1p0_DU
3
VSS
VSS
VSS_287 VSS_288 VSS_289 VSS_290 VSS_291 VSS_292 VSS_293 VSS_294 VSS_295 VSS_296 VSS_297 VSS_298 VSS_299 VSS_300 VSS_301 VSS_302 VSS_303 VSS_304 VSS_305
VSS_306 VSS_307 VSS_308 VSS_309 VSS_310 VSS_311 VSS_312 VSS_313
2
W11 W39 W43 W47 W5 W7 Y13 Y2 Y41 Y45 Y49 Y5 Y50 Y11 P29 T29 T31 T33 R28
AA32 AB32 AD32 AF28 AF29 AT27 AV25 H50
QUANTA
QUANTA
QUANTA COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
2
Date: Sheet
Crestline (VSS)
Crestline (VSS)
Crestline (VSS)
GM3 2B
GM3 2B
GM3 2B
1
of
of
of
10 62Monday, March 24, 2008
10 62Monday, March 24, 2008
10 62Monday, March 24, 2008
1
1
www.kythuatvitinh.com
2
3
4
5
6
7
8
+RTC_CELL +RTC_CELL
12
R550
R550 332K/F
332K/F
ICH_INTVRMEN ICH_LAN100_SLP
12
R548
R548 0_NC
0_NC
ICH8M LAN100 SLP Strap
Low = Internal VR Disabled High = Internal VR Enabled(Default)
U48A
U48A
AG25
RTCX1
AF24
RTCX2
AF23
RTCRST#
AD22
INTRUDER#
AF25
INTVRMEN
AD21
LAN100_SLP
B24
GLAN_CLK
D22
LAN_RSTSYNC
C21
LAN_RXD0
B21
LAN_RXD1
C22
LAN_RXD2
D21
LAN_TXD0
E20
LAN_TXD1
C20
LAN_TXD2
AH21
GLAN_DOCK#/GPIO13
D25
GLAN_COMPI
C25
GLAN_COMPO
AJ16
HDA_BIT_CLK
AJ15
HDA_SYNC
AE14
HDA_RST#
AJ17
HDA_SDIN0
AH17
HDA_SDIN1
AH15
HDA_SDIN2
AD13
HDA_SDIN3
AE13
HDA_SDOUT
AE10
HDA_DOCK_EN#/GPIO33
AG14
HDA_DOCK_RST#/GPIO34
AF10
SATALED#
AF6
SATA0RXN
AF5
SATA0RXP
AH5
SATA0TXN
AH6
SATA0TXP
AG3
SATA1RXN
AG4
SATA1RXP
AJ4
SATA1TXN
AJ3
SATA1TXP
AF2
SATA2RXN
AF1
SATA2RXP
AE4
SATA2TXN
AE3
SATA2TXP
AB7
SATA_CLKN
AC6
SATA_CLKP
AG1
SATARBIAS#
AG2
SATARBIAS
IC,ICH8M,BGA676,12-01,rev1p0_2
IC,ICH8M,BGA676,12-01,rev1p0_2
+3.3V_RUN
RTC
RTC
CPUPWRGD/GPIO49
LAN / GLAN
LAN / GLAN
IHDA
IHDA
SATA
SATA
(Internal VR for VccLAN1.05 and VccCL1.05)
Low = Internal VR Disabled High = Internal VR Enabled(Default)
SIO_A20GATE
H_DPRSTP# H_DPSLP#
H_FERR#
SIO_RCIN#
THERMTRIP#_ICH
IDE_IRQ IDE_DIORDY
FWH0/LAD0 FWH1/LAD1 FWH2/LAD2 FWH3/LAD3
FWH4/LFRAME#
LPC
LPC
LDRQ1#/GPIO23
A20GATE
DPRSTP#
CPU
CPU
STPCLK#
THRMTRIP#
IDE
IDE
ICH_LAN100_SLP
E5 F5 G8 F6
C4 G9
LDRQ0#
E6 AF13
AG26
A20M#
AF26 AE26
DPSLP#
AD24
FERR#
AG29 AF27
IGNNE#
AE24
INIT#
AC20
INTR
AH14
RCIN#
AD23
NMI
AG28
SMI#
AA24 AE27 AA23
TP8
V1
DD0
U2
DD1
V3
DD2
T1
DD3
V4
DD4
T5
DD5
AB2
DD6
T6
DD7
T3
DD8
R2
DD9
T4
DD10
V6
DD11
V5
DD12
U1
DD13
V2
DD14
U6
DD15
AA4
DA0
AA1
DA1
AB3
DA2
Y6
DCS1#
Y5
DCS3#
W4
DIOR#
W3
DIOW#
Y2
DDACK#
Y3
IDEIRQ
Y1
IORDY
W5
DDREQ
IDE_D0 IDE_D1 IDE_D2 IDE_D3 IDE_D4 IDE_D5 IDE_D6 IDE_D7 IDE_D8 IDE_D9 IDE_D10 IDE_D11 IDE_D12 IDE_D13 IDE_D14 IDE_D15
IDE_DA0 IDE_DA1 IDE_DA2
12
12
R532
R532 332K/F
332K/F
R528
R528 0_NC
0_NC
LPC_LAD0 31,33 LPC_LAD1 31,33 LPC_LAD2 31,33 LPC_LAD3 31,33
LPC_LFRAME# 31,33
T62PAD T62PAD T56PAD T56PAD
SIO_A20GATE 31 H_A20M# 3
H_DPRSTP# 3,6,51 H_DPSLP# 3
H_FERR# 3 H_PWRGOOD 3 H_IGNNE# 3
H_INIT# 3 H_INTR 3
SIO_RCIN# 31
H_NMI 3 H_SMI# 3
H_STPCLK# 3
T85PAD T85PAD T129PAD T129PAD
T128PAD T128PAD T36PAD T36PAD T126PAD T126PAD T39PAD T39PAD T52PAD T52PAD T131PAD T131PAD T53PAD T53PAD T47PAD T47PAD T127PAD T127PAD T37PAD T37PAD T35PAD T35PAD T42PAD T42PAD T123PAD T123PAD T122PAD T122PAD T59PAD T59PAD
T40PAD T40PAD T130PAD T130PAD T124PAD T124PAD
T51PAD T51PAD T44PAD T44PAD
T38PAD T38PAD T41PAD T41PAD T125PAD T125PAD
R425 8.2KR425 8.2K R766 4.7KR766 4.7K
12 12
T45PAD T45PAD
+3.3V_RUN
1 2
H_DPRSTP# H_DPSLP# H_FERR#
SIO_A20GATE SIO_RCIN#
THERMTRIP#_ICH
R561
R561 56_NC
56_NC
+1.05V_VCCP
R560
R560 56_NC
56_NC
1 2
R501
R501 10K
10K
1 2
+1.05V_VCCP
1 2
+3.3V_RUN
1 2
1 2
R54256R542 56
R502
R502 10K
10K
R55956R559 56
C603
C603 27P/50V_NC
27P/50V_NC
R816 10MR816 10M
W2
W2
1 4 2 3
32.768KHZ
32.768KHZ
R538
R538 20K
20K
1 2
ICH_RTCRST# ICH_INTRUDER#
12
C628
C628 1U/10V
1U/10V
12
R815 0R815 0
1 2
Master HDD
SATA ODD
Second HDD
ICH_RTCX2ICH_RTCX1
12
C944
C944 12P/50V
12P/50V
T140 PADT140 PAD
ACZ_BIT_CLK
ACZ_SYNC ACZ_RST# ACZ_SDOUT ACZ_SYNC
Reserved for Intel Nineveh design.
+3.3V_SUS
+1.5V_PCIE_ICH
ICH_AZ_CODEC_SDIN040 ICH_AZ_HDMI_SDIN125
+3.3V_SUS
SATA_ACT#38
SATA_RX0-36 SATA_RX0+36
SATA_RX1-36 SATA_RX1+36
SATA_RX2-36 SATA_RX2+36
CLK_PCIE_SATA#17
Place within 500mils of ICH8 ball
CLK_PCIE_SATA17
T80 PADT80 PAD T135 PADT135 PAD T86 PADT86 PAD T84 PADT84 PAD T71 PADT71 PAD T83 PADT83 PAD
R533 10K_NCR533 10K_NC
R545 24.9/FR545 24.9/F
1 2
PAD
PAD
T133
T133
PAD
PAD
T63
T63
R472 10K_NCR472 10K_NC R507 10K_NCR507 10K_NC
R765 24.9/FR765 24.9/F
ICH8M Internal VR Enable Strap (Internal VR for VccSus1.05, VccSus1.5, VccCL1.5)
ICH_INTVRMEN
ICH_RTCX1 ICH_RTCX2
ICH_RTCRST# ICH_INTRUDER# ICH_INTVRMEN
ICH_LAN100_SLP GLAN_CLK
LAN_RXD0 LAN_RXD1 LAN_RXD2 LAN_TXD0 LAN_TXD1 LAN_TXD2
12
GLAN_COMP ACZ_BIT_CLK
ACZ_RST#
ACZ_SDOUT
12 12
SATA_TX0-_C SATA_TX0+_C
SATA_TX1-_C SATA_TX1+_C
SATA_TX2-_C SATA_TX2+_C
SATABIAS
12
32.768KHZ
12
C945
A A
B B
C C
ICH_AZ_HDMI_BITCLK25 ICH_AZ_CODEC_BITCLK40
1 2
ICH_AZ_HDMI_SYNC25 ICH_AZ_CODEC_SYNC40 ICH_AZ_HDMI_RST#25 ICH_AZ_CODEC_RST#31,40 ICH_AZ_HDMI_SDOUT25 ICH_AZ_CODEC_SDOUT40
Place all series terms close to ICH8 except for SDIN input lines,which should be close to source.Placement of R603, R600, R607 & R612 should equal distance to the T split trace point as R604, R599, R606 & R608 respective. Basically,keep the same distance from T for all series termination resistors.
C553 3900P
SATA_TX0-36 SATA_TX0+36
SATA_TX1-36 SATA_TX1+36
SATA_TX2-36 SATA_TX2+36
Distance between the ICH-8 M and cap on the "P" signal should be identical distance between the ICH-8 M and cap on the "N" signal for same pair.
C553 3900P C554 3900P
C554 3900P
C900 3900P
C900 3900P C898 3900P
C898 3900P
C535 3900P
C535 3900P C536 3900P
C536 3900P
12 12
25
25 25
25
12 12
25
25 25
25
12 12
25
25 25
25
C945 12P/50V
12P/50V
+RTC_CELL
12
R506 33_UMAR506 33_UMA R508 33R508 33
C594
C594 27P/50V_UMA
27P/50V_UMA
R516 33_UMAR516 33_UMA R517 33R517 33 R503 33_UMAR503 33_UMA R504 33R504 33 R496 33_UMAR496 33_UMA R481 33R481 33
R5351MR535 1M
1 2 1 2
1 2
1 2 1 2 1 2 1 2 1 2 1 2
SATA_TX0-_C SATA_TX0+_C
SATA_TX1-_C SATA_TX1+_C
SATA_TX2-_C SATA_TX2+_C
R482
5
1 2
1 2
R482 1K_NC
1K_NC
R787
R787 1K_NC
1K_NC
ACZ_SDOUT
ICH_RSVD 13
QUANTA
QUANTA
QUANTA COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
6
Date: Sheet
ICH8-M (CPU,IDE,SATA,LPC,AC97,LAN)
ICH8-M (CPU,IDE,SATA,LPC,AC97,LAN)
ICH8-M (CPU,IDE,SATA,LPC,AC97,LAN)
GM3 2B
GM3 2B
GM3 2B
7
of
of
of
11 62Monday, March 24, 2008
11 62Monday, March 24, 2008
11 62Monday, March 24, 2008
8
D D
1
2
3
XOR Chain Entrance Strap
ICH RSVD
HDA SDOUT
0 0 1 1
Description
0
RSVD Enter XOR Chain
1
Normal Operation (Default)
0
Set PCIE port config bit 1
1
4
1
www.kythuatvitinh.com
Place TX DC blocking caps close ICH8.
C953 0.1U
C953 0.1U
PCIE_TX1-33 PCIE_TX1+33
PCIE_TX2-34 PCIE_TX2+34
PCIE_TX3-33
A A
B B
PCIE_TX3+33
PCIE_TX4-30 PCIE_TX4+30
PCIE_TX6-/GLAN_TX-42 PCIE_TX6+/GLAN_TX+42
ICH_SPI_CS1#_R PCI_GNT0#
1 2
R451
R451 1K_NC
1K_NC
12
1 2
C955 0.1U
C955 0.1U
1 2
10
10 10
10
C951 0.1U
C951 0.1U
1 2
C952 0.1U
C952 0.1U
1 2
10
10 10
10
C949 0.1U
C949 0.1U
1 2
C950 0.1U
C950 0.1U
1 2
10
10 10
10
C948 0.1U
C948 0.1U
1 2
C947 0.1U
C947 0.1U
1 2
10
10 10
10
C946 0.1U
C946 0.1U
1 2
C954 0.1U
C954 0.1U
1 2
10
10 10
10
R546
R546
1K_NC
1K_NC
PCI SPI1001
WWAN Noise - ICH improvements
OC6# OC4# OC5# OC7# USB_OC8# USB_OC2_3# USB_OC0_1# OC9#
C C
D D
C918 0.1U_NC
C918 0.1U_NC
1 2
C915 0.1U_NC
C915 0.1U_NC
1 2
C916 0.1U_NC
C916 0.1U_NC
1 2
C917 0.1U_NC
C917 0.1U_NC
1 2
C922 0.1U_NC
C922 0.1U_NC
1 2
C923 0.1U_NC
C923 0.1U_NC
1 2
C924 0.1U_NC
C924 0.1U_NC
1 2
C925 0.1U_NC
C925 0.1U_NC
1 2
PCI_AD[0..31]28
T55 PADT55 PAD
PCI_PIRQB#28
T132 PADT132 PAD
1
10
10 10
10 10
10 10
10 10
10 10
10 10
10 10
10
PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8 PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31
PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD#
2
Boot BIOS Strap
GNT0# SPI_CS1#
No stuff
11LPC
No stuff Stuff
D20 E19 D19 A20 D17 A21 A19 C19 A18 B16 A12 E16 A14 G16 A15
B6
C11
A9 D11 B12 C12 D10
C7 F13 E11 E13 E12
D8
A6 E8
D6
A3
F9 B5
C5 A10
2
PCIE_TXN1_C PCIE_TXP1_C
PCIE_TXN2_C PCIE_TXP2_C
PCIE_TXN3_C PCIE_TXP3_C
PCIE_TXN4_C PCIE_TXP4_C
GLAN_TXN_C GLAN_TXP_C
No stuff Stuff No stuff
Non-iAMT
OC6# OC4# OC5# OC7#
+3.3V_SUS
U48B
U48B
AD0
PCI
PCI
AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31
Interrupt I/F
Interrupt I/F
PIRQA# PIRQB# PIRQC# PIRQD#
REQ1#/GPIO50 GNT1#/GPIO51 REQ2#/GPIO52 GNT2#/GPIO53 REQ3#/GPIO54 GNT3#/GPIO55
PIRQE#/GPIO2
PIRQF#/GPIO3 PIRQG#/GPIO4 PIRQH#/GPIO5
PCIE_RX6-/GLAN_RX-42 PCIE_RX6+/GLAN_RX+42
REQ0# GNT0#
C/BE0# C/BE1# C/BE2# C/BE3#
IRDY#
PCIRST# DEVSEL#
PERR#
PLOCK#
SERR# STOP# TRDY#
FRAME#
PLTRST#
PCICLK
PCIE_RX1-33 PCIE_RX1+33
MiniWWAN
PCIE_RX2-34 PCIE_RX2+34
MiniWLAN
PCIE_RX3-33 PCIE_RX3+33
MiniWPAN
PCIE_RX4-30 PCIE_RX4+30
Express Card
Giga Bit LOM
USB_OC0_1#35 USB_OC2_3#54
USB_OC8#35
PAR
PME#
3
T239 PADT239 PAD T240 PADT240 PAD
T241 PADT241 PAD
T243 PADT243 PAD
T245 PADT245 PAD
T249 PADT249 PAD T247 PADT247 PAD
T87 PADT87 PAD T137 PADT137 PAD
T91 PADT91 PAD T81 PADT81 PAD
RP49
RP49
6 7 8 9
10
10KX8
10KX8
PCI_REQ0#
A4
PCI_GNT0#
D7
PCI_REQ1#
E18
PCI_GNT1#
C18
SB_WWAN_PCIE_RST#
B19
PCI_GNT2#
F18
SB_LOM_PCIE_RST#
A11
PCI_GNT3#
C10 C17
E15 F16 E17
PCI_IRDY#
C8 D9
PCI_RST#_G
G6
PCI_DEVSEL#
D16
PCI_PERR#
A7
PCI_PLOCK#
B7
PCI_SERR#
F10
PCI_STOP#
C16
PCI_TRDY#
C9
PCI_FRAME#
A17
PCI_PLTRST#
AG24
CLK_PCI_ICH
B10 G7
SB_WPAN_PCIE_RST#
F8
SB_WLAN_PCIE_RST#
G11
SB_NB_PCIE_RST#
F12
ICH_IRQH_GPIO5
B3
3
PCIE_TXN1_C PCIE_TXP1_C
PCIE_TXN2_C PCIE_TXP2_C
PCIE_TXN3_C PCIE_TXP3_C
PCIE_TXN4_C PCIE_TXP4_C
GLAN_TXN_C GLAN_TXP_C
ICH_SPI_CS1#_R
USB_OC0_1# USB_OC2_3# OC4#
OC5# OC6# OC7# USB_OC8# OC9#
+3.3V_SUS
5
USB_OC8#
4
USB_OC2_3#
3
USB_OC0_1#
2
OC9#
1
4
U48D
U48D
P27
PERN1
P26
PERP1
N29
PETN1
N28
PETP1
T242
T242
PAD
PAD
M27
PERN2
M26
PERP2
L29
PETN2
L28
PETP2
T244
T244
PAD
PAD
K27
PERN3
K26
PERP3
J29
PETN3
J28
PETP3
T246
T246
PAD
PAD
H27
PERN4
H26
PERP4
G29
PETN4
G28
PETP4
F27
PERN5
F26
PERP5
E29
PETN5
T250
T250
E28
PAD
PAD
PETP5
T248
T248
PAD
PAD
D27
PERN6/GLAN_RXN
D26
PERP6/GLAN_RXP
C29
PETN6/GLAN_TXN
C28
PETP6/GLAN_TXP
C23
SPI_CLK
B23
SPI_CS0#
E22
SPI_CS1#
D23
SPI_MOSI
F21
SPI_MISO
AJ19
OC0#
AG16
OC1#/GPIO40
AG15
OC2#/GPIO41
AE15
OC3#/GPIO42
AF15
OC4#/GPIO43
AG17
OC5#/GPIO29
AD12
OC6#/GPIO30
AJ18
OC7#/GPIO31
AD14
OC8#
AH18
OC9#
PCI_REQ0# 28 PCI_GNT0# 28
T65PAD T65PAD T75PAD T75PAD
SB_WWAN_PCIE_RST# 33
T64PAD T64PAD
SB_LOM_PCIE_RST# 42
T61PAD T61PAD
PCI_C_BE0# 28 PCI_C_BE1# 28 PCI_C_BE2# 28 PCI_C_BE3# 28
PCI_IRDY# 28 PCI_PAR 28
PCI_DEVSEL# 28 PCI_PERR# 28 PCI_PLOCK# PCI_SERR# 28 PCI_STOP# 28 PCI_TRDY# 28 PCI_FRAME# 28
CLK_PCI_ICH 17 ICH_PME# 28,31
SB_WPAN_PCIE_RST# 33 SB_WLAN_PCIE_RST# 34 SB_NB_PCIE_RST# 6PCI_PIRQC#28
T49PAD T49PAD
4
5
V27
DMI0RXN
V26
DMI0RXP
U29
DMI0TXN
U28
DMI0TXP
Y27
DMI1RXN
Y26
DMI1RXP
W29
DMI1TXN
W28
DMI1TXP
AB26
DMI2RXN
AB25
DMI2RXP
AA29
DMI2TXN
AA28
DMI2TXP
AD27
DMI3RXN
AD26
DMI3RXP
AC29
DMI3TXN
AC28
DMI3TXP
T26
DMI_CLKN
PCI-Express
PCI-Express
Direct Media Interface
Direct Media Interface
DMI_ZCOMP
DMI_IRCOMP
SPI
SPI
USB
USB
USBRBIAS#
Short F2 and F3 at the package and keep length to less than 500mils. Trace Impedance should be 60ohms +/- 15%.
DMI_CLKP
USBP0N USBP0P USBP1N USBP1P USBP2N USBP2P USBP3N USBP3P USBP4N USBP4P USBP5N USBP5P USBP6N USBP6P USBP7N USBP7P USBP8N USBP8P USBP9N USBP9P
USBRBIAS
T25 Y23
DMI_COMP
Y24 G3
G2 H5 H4 H2 H1 J3 J2 K5 K4 K2 K1 L3 L2 M5 M4 M2 M1 N3 N2
F2
USBRBIAS
F3
A16 away override strap.
SB_NB_PCIE_RST#
T210 PADT210 PAD T213 PADT213 PAD
T215 PADT215 PAD T217 PADT217 PAD T219 PADT219 PAD T221 PADT221 PAD T223 PADT223 PAD
T225 PADT225 PAD T229 PADT229 PAD T234 PADT234 PAD T228 PADT228 PAD T231 PADT231 PAD T235 PADT235 PAD T237 PADT237 PAD
PCI_AD15 PCI_AD2 PCI_AD3 PCI_AD0 PCI_AD2 PCI_AD21 PCI_AD17 PCI_AD16
PCI_IRDY# PCI_TRDY# PCI_FRAME# PCI_STOP# PCI_DEVSEL# PCI_GNT0# PCI_REQ0#
5
DMI_MTX_IRX_N0 6 DMI_MTX_IRX_P0 6
DMI_MRX_ITX_N0 6 DMI_MRX_ITX_P0 6
DMI_MTX_IRX_N1 6 DMI_MTX_IRX_P1 6
DMI_MRX_ITX_N1 6 DMI_MRX_ITX_P1 6
DMI_MTX_IRX_N2 6 DMI_MTX_IRX_P2 6
DMI_MRX_ITX_N2 6 DMI_MRX_ITX_P2 6
DMI_MTX_IRX_N3 6 DMI_MTX_IRX_P3 6
DMI_MRX_ITX_N3 6 DMI_MRX_ITX_P3 6
CLK_PCIE_ICH# 17 CLK_PCIE_ICH 17
1 2
R529 24.9/FR529 24.9/F
ICH_USBP0- 35 ICH_USBP0+ 35 ICH_USBP1- 35 ICH_USBP1+ 35 ICH_USBP2- 54 ICH_USBP2+ 54 ICH_USBP3- 54 ICH_USBP3+ 54 ICH_USBP4- 41 ICH_USBP4+ 41 ICH_USBP5- 33 ICH_USBP5+ 33 ICH_USBP6- 33 ICH_USBP6+ 33 ICH_USBP7- 30 ICH_USBP7+ 30 ICH_USBP8- 35 ICH_USBP8+ 35 ICH_USBP9- 38 ICH_USBP9+ 38
R763
R763
22.6/F
22.6/F
1 2
PCI_GNT3#
12
R474
R474
1K_NC
1K_NC
Low = A16 swap override enabled. High = Default.
CLK_PCI_ICH
T209PAD T209PAD T214PAD T214PAD
T216PAD T216PAD T218PAD T218PAD T220PAD T220PAD T222PAD T222PAD T224PAD T224PAD
Reserved for EMI.Place
T226PAD T226PAD
resister and cap
T230PAD T230PAD
close to ICH.
T233PAD T233PAD T227PAD T227PAD T232PAD T232PAD T236PAD T236PAD T238PAD T238PAD
6
+1.5V_PCIE_ICH
Place within 500mils of ICH8
Side pair Top / left Side pair bottom / left Side pair top/right(DB) Side pair Bot right(DB) Camera Mini Card (WWAN) Mini Card (WPAN) Express Card left side signal USB port Biometric
R772
R772 10_NC
10_NC
1 2
C907
C907
8.2P_NC
8.2P_NC
1 2
16
16
6
7
8
PCI Pullups
PCI_FRAME# PCI_STOP# PCI_DEVSEL# PCI_REQ1#
+3.3V_RUN
PCI_IRDY# PCI_PERR# PCI_PLOCK# PCI_PIRQB#
+3.3V_RUN
SB_WPAN_PCIE_RST# SB_WWAN_PCIE_RST# SB_WLAN_PCIE_RST# SB_LOM_PCIE_RST# SB_NB_PCIE_RST#
BIOS should not enable the internal GPIO pull up resistor.
Non-iAMT
PCI_RST#_G
PCI_PLTRST#
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
+3.3V_SUS
C887
C887
1 2
0.047U
0.047U
2
10
10
1
+3.3V_SUS
C958
C958
1 2
0.047U
0.047U
2
10
10
1
ICH8-M (USB,DMI,PCIE,PCI)
ICH8-M (USB,DMI,PCIE,PCI)
ICH8-M (USB,DMI,PCIE,PCI)
GM3 2B
GM3 2B
GM3 2B
7
RP42RP42
6 7 8 9
10
RP40RP40
6 7 8 9
10
Add Buffers as needed for Loading and fanout concerns.
5
U47
U47
4
TC7SZ32FU(T5L,F,T)
TC7SZ32FU(T5L,F,T)
5
U50
U50
4
TC7SZ32FU(T5L,F,T)
TC7SZ32FU(T5L,F,T)
QUANTA
QUANTA
QUANTA COMPUTER
+3.3V_RUN
5
PCI_TRDY#
4
PCI_PIRQD#
3
PCI_PIRQB#
2
PCI_SERR#
1
+3.3V_RUN
5
PCI_PIRQA#
4
ICH_IRQH_GPIO5
3
PCI_PIRQC#
2
PCI_REQ0#
1
R468 20KR468 20K R791 20KR791 20K R467 20KR467 20K R477 20KR477 20K R495 20KR495 20K
PLTRST# 6,25,30,33,34,42
PCI_RST# 28
12 12 12 12 12
12 62Monday, March 24, 2008
12 62Monday, March 24, 2008
12 62Monday, March 24, 2008
8
of
of
of
1
www.kythuatvitinh.com
2
3
4
5
6
7
8
+3.3V_SUS
RP50
RP50
1 3
2.2KX2
2.2KX2
A A
+3.3V_SUS
1 3
ICH_SMBCLK ICH_SMBDATA
+3.3V_RUN
R775
R775
8.2K
8.2K
1 2
R777
R777
B B
10_NC
10_NC
1 2
Option to " Disable " clkrun. Pulling it down will keep the clks running.
KB_LED_DET#37
PCIE_MCARD1_DET#34
R465 10KR465 10K
C C
+3.3V_RUN
R786 2.2K_NCR786 2.2K_NC R770 100KR770 100K
1 2
R771 100KR771 100K
1 2
R480 100KR480 100K
1 2
R490 100KR490 100K
1 2
R774 100KR774 100K
1 2
+3.3V_RUN
R781 10K_NCR781 10K_NC R476 10KR476 10K R500 10KR500 10K
+3.3V_SUS
R522 10KR522 10K R505 10KR505 10K R788 100KR788 100K
D D
1 2
2 4
RP45
RP45
2 4
100KX2_NC
100KX2_NC
R798 0R798 0 R524 0R524 0
CLKRUN#
12
12
12 12 12
12 12
1
Non-iAMT
ICH_SMBDATA ICH_SMBCLK
ICH_SMLINK0 ICH_SMLINK1
1 2 1 2
PCIE_MCARD1_DET#
USB_MCARD2_DET#
PCIE_MCARD1_DET#
PCIE_MCARD2_DET# PCIE_MCARD3_DET#
ASF 2.0Non-iAMT
ICH_SMLINK0 ICH_SMLINK1
12
PLTRST_DELAY#
IMVP_PWRGD
USB_MCARD3_DET#
MCH_ICH_SYNC#_R IRQ_SERIRQ THERM_ALERT#
RSV_WOL_EN SIO_EXT_SMI# USB_MCARD1_DET#
+3.3V_SUS
ICH_SMBCLK30,33,34 ICH_SMBDATA30,33,34
ITP_DBRESET#3 PM_BMBUSY#6
USB_MCARD1_DET#34
H_STP_PCI#17 H_STP_CPU#17
CLKRUN#28,31 PCIE_WAKE#30,33,34,42
IRQ_SERIRQ28,31
THERM_ALERT#39
IMVP_PWRGD31,44,51
USB_MCARD2_DET#33 USB_MCARD3_DET#33
SIO_EXT_WAKE#31 SIO_EXT_SMI#31
R267 0_NCR267 0_NC
R820 4.7KR820 4.7K
2
SIO_EXT_SCI#31
12
PCIE_MCARD2_DET#33 PCIE_MCARD3_DET#33
WLAN_RADIO_DIS#34
CAMERA_CBL_DET#41
SATA_CLKREQ#17
PLTRST_DELAY#18
WPAN_RADIO_DIS_MINI#33
WWAN_RADIO_DIS#33
MCH_ICH_SYNC#6
R789 10K_NCR789 10K_NC R519 10KR519 10K R521 10KR521 10K R509 1KR509 1K
ICH_RSVD11
T82 PADT82 PAD T139 PADT139 PAD T79 PADT79 PAD
T48 PADT48 PAD
T134 PADT134 PAD
SPKR40
+3.3V_RUN
12 12 12 12
R778 0R778 0
12
R478
R478
1K_NC
1K_NC
USB_MCARD1_DET#
PCIE_MCARD2_DET# PCIE_MCARD3_DET#
12
SPKR
No Reboot strap.
SPKR
Low = Default. High = No Reboot.
3
Non-iAMT
RSV_ICH_CL_RST1# ICH_RI# SIO_EXT_SCI# PCIE_WAKE#
ICH_SMBCLK ICH_SMBDATA RSV_ICH_CL_RST1# ICH_SMLINK0 ICH_SMLINK1
ICH_RI# RSV_LPCPD#
CLKRUN# PCIE_WAKE#
IRQ_SERIRQ THERM_ALERT#
IMVP_PWRGD
USB_MCARD2_DET# USB_MCARD3_DET#
SIO_EXT_SMI# SIO_EXT_SCI#
PLTRST_DELAY#
SPKR
MCH_ICH_SYNC#_R
U48C
U48C
AJ26
SMBCLK
AD19
SMBDATA
AG21
LINKALERT#
AC17
SMLINK0
AE19
SMLINK1
AF17
RI#
F4
SUS_STAT#/LPCPD#
AD15
SYS_RESET#
AG12
BMBUSY#/GPIO0
AG22
SMBALERT#/GPIO11
AE20
STP_PCI#/GPIO15
AG18
STP_CPU#/GPIO25
AH11
CLKRUN#/GPIO32
AE17
WAKE#
AF12
SERIRQ
AC13
THRM#
AJ20
VRMPWRGD
AJ22
TP7
AJ8
TACH1/GPIO1
AJ9
TACH2/GPIO6
AH9
TACH3/GPIO7
AE16
GPIO8
AC19
GPIO12
AG8
TACH0/GPIO17
AH12
GPIO18
AE11
GPIO20
AG10
SCLOCK/GPIO22
AH25
QRT_STATE0/GPIO27
AD16
QRT_STATE1/GPIO28
AG13
SATACLKREQ#/GPIO35
AF9
SLOAD/GPIO38
AJ11
SDATAOUT0/GPIO39
AD10
SDATAOUT1/GPIO48
AD9
SPKR
AJ13
MCH_SYNC#
AJ21
TP3
SMbus address D2
These are for backdrive issue.
ICH_SMBDATA30,33,34 MEM_SDATA 15
4
SATA0GP/GPIO21 SATA1GP/GPIO19 SATA2GP/GPIO36 SATA3GP/GPIO37
SATA
GPIO
SATA
GPIO
SMB
SMB
Clocks
Clocks
S4_STATE#/GPIO26
DPRSLPVR/GPIO16
SYS
GPIO
SYS
GPIO
LAN_RST#
Power MGTController Link
Power MGTController Link
CK_PWRGD
CLPWROK
CL_DATA0
GPIO
GPIO
MISC
MISC
CL_DATA1 CL_VREF0
CL_VREF1
MEM_LED/GPIO24 ME_EC_ALERT/GPIO10 EC_ME_ALERT/GPIO14
WOL_EN/GPIO9
+3.3V_RUN
2
Q47
Q47
3 1
2N7002W-7-F
2N7002W-7-F
+3.3V_RUN
2
Q76
Q76
3 1
2N7002W-7-F
2N7002W-7-F
CLK14
CLK48 SUSCLK SLP_S3#
SLP_S4# SLP_S5#
PWROK
BATLOW# PWRBTN#
RSMRST#
SLP_M#
CL_CLK0 CL_CLK1
CL_RST#
2
1
4
3
RP51
RP51
2.2KX2
2.2KX2
5
AJ12 AJ10 AF11 AG11
CLK_ICH_14M
AG9
CLK_ICH_48M
G5
ICH_SUSCLK
D3 AG23
AF21 AD18
AH27
ICH_PWRGD
AE23
DPRSLPVR
AJ14
ICH_BATLOW#
AE21 C2
RSV_ICH_LAN_RST#
AH20
ICH_RSMRST#
AG27 E1
ICH_CL_PWROK
E3 AJ25 F23
RSV_ICH_CL_CLK1
AE18 F22
RSV_ICH_CL_DATA1
AF19
CL_VREF0
D24
CL_VREF1
AH23 AJ23 AJ27
RSV_GPIO10
AJ24
RSV_GPIO14
AF22
RSV_WOL_EN
AG19
Non-iAMT
+3.3V_RUN
1 2
MEM_SCLK 15ICH_SMBCLK30,33,34
R773
R773
8.2K
8.2K
R537 8.2KR537 8.2K
R543 8.2KR543 8.2K
CLK_ICH_14M 17 CLK_ICH_48M 17
T43PAD T43PAD
SIO_SLP_S3# 31
T88PAD T88PAD
SIO_SLP_S5# 31
ICH_PWRGD 6,44 DPRSLPVR 6,51
12
+3.3V_SUS
SIO_PWRBTN# 31
T76PAD T76PAD
ICH_RSMRST# 31 CLK_PWRGD 17 ICH_CL_PWROK 6,31
T90PAD T90PAD
CL_CLK0 6
T69PAD T69PAD
CL_DATA0 6
T78PAD T78PAD
T138PAD T138PAD
ICH_CL_RST0# 6
T136PAD T136PAD
T92PAD T92PAD
T77PAD T77PAD
12
+3.3V_SUS
6
Place these close to ICH8.
CLK_ICH_48M
R444
R444 10_NC
10_NC
1 2 12
50
50
R473
R473 10_NC
10_NC
1 2 12
50
50
R540 10KR540 10K R784 100KR784 100K
1 2
R523 10KR523 10K R762 1MR762 1M
R795 10KR795 10K
Non-iAMT
ICH_PWRGD DPRSLPVR ICH_RSMRST# RSV_ICH_LAN_RST# ICH_CL_PWROK
RSV_GPIO10
CLK_ICH_14M
R564 10KR564 10K
DIS:ALW UMA:SUS
Non-iAMT
10
10
Title
Title
Title
ICH8-M (PM,GPIO,SMB,CL)
ICH8-M (PM,GPIO,SMB,CL)
ICH8-M (PM,GPIO,SMB,CL)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
GM3 2B
GM3 2B
GM3 2B
Date: Sheet
Date: Sheet
Date: Sheet
7
+3.3V_RUN
R531
R531
3.24K/F
3.24K/F
1 2
CL_VREF0
12
12
C621
C621
0.1U
0.1U
QUANTA
QUANTA
QUANTA COMPUTER
R534
R534 453/F
453/F
10
10
12
C926
C926
0.1U_NC
0.1U_NC
R536
R536
3.24K/F_NC
3.24K/F_NC
1 2
CL_VREF1
C564
C564
4.7P_NC
4.7P_NC
C577
C577
4.7P_NC
4.7P_NC
12
12 12 12
12
+3.3V_SUS+3.3V_ALW
1 2
12
13 62Monday, March 24, 2008
13 62Monday, March 24, 2008
13 62Monday, March 24, 2008
8
+3.3V_SUS
R796
R796
3.24K/F_NC
3.24K/F_NC
R792
R792 453/F_NC
453/F_NC
of
of
of
14
1
www.kythuatvitinh.com
+RTC_CELL
R783 100R783 100
R764 100R764 100
+1.5V_RUN
L62
L62
805
805
BLM21PG331SN1D
BLM21PG331SN1D
12
+
+
C957
C957 220U
220U
4
4
7343
7343
+1.5V_RUN
12
R7690R769 0
+VCCSATPLL_L
L84
L84 10uH
10uH
10uH+-20%_100mA
+VCCSATPLL
12
805
805
C901
C901 1U
1U
10
10
603
603
C625
C625
0.1U
0.1U
1 2
10
10
1 2
D30
D30
2 1
SDMK0340L-7-F
SDMK0340L-7-F
1 2
D29
D29
2 1
SDMK0340L-7-F
SDMK0340L-7-F
10
10
1206
1206
6.3
6.3
603
603
1
+5V_RUN
+3.3V_RUN
A A
Non-iAMT
+5V_SUS
+3.3V_SUS
B B
C C
Non-iAMT
Place C625 close to A24.
+1.5V_RUN
D D
12
C616
C616 1U
1U
10
10
+ICH_V5REF_RUN
603
603
12
C608
C608 1U
1U
10
10
603
603
+ICH_V5REF_SUS
12
C896
C896 1U
1U
10
10
603
603
FB_330ohm+-25%_100mHz_
1.5A_0.09 ohm DC
12
12
C619
C619 22U
22U
C571
C571 10U
10U
12
10
10
1206
1206
+1.5V_RUN
C604
C604 22U
22U
10
10
Non-iAMT
+3.3V_RUN
+1.5V_PCIE_ICH
C618
C618
0.1U
0.1U
1 2
10
10
+1.5V_PCIE_ICH
1 2
10
10
805
805
+1.5V_RUN
+1.5V_RUN
+1.5V_RUN
C545
C545
0.1U
0.1U
1 2
T68 PADT68 PAD T67 PADT67 PAD
C606
C606
0.1U
0.1U
C615
C615
2.2U
2.2U
10
10
6.3
6.3
2
1 2
12
2
1 2
10
10
+VCCSATPLL
12
C576
C576 1U
1U
10
10
603
603
12
C588
C588 1U
1U
10
10
603
603
C540
C540
0.1U
0.1U
1 2
10
10
TP_VCCSUSLAN1 TP_VCCSUSLAN2
+1.5V_RUN
C631
C631
4.7U
4.7U
C629
C629
0.1U
0.1U
+3.3V_RUN
AD25
A16
AA25 AA26 AA27 AB27 AB28 AB29
D28 D29 E25 E26 E27 F24 F25 G24 H23 H24
K24 K25 L23 L24
L25 M24 M25 N23 N24 N25
P24
P25 R24 R25 R26 R27
T23
T24
T27
T28
T29 U24 U25
V23
V24
V25 W25
Y25
AJ6 AE7
AF7 AG7 AH7
AJ7 AC1
AC2 AC3 AC4 AC5
AC10
AC9 AA5
AA6 G12
G17
AC7 AD7
W23
F17 G18
F19 G20
A24
A26
A27
B26
B27
B28
B25
T7
G4
J23 J24
H7
D1
F1 L6
L7 M6 M7
U48F
U48F
VCCRTC V5REF[1]
V5REF[2] V5REF_SUS VCC1_5_B[01]
VCC1_5_B[02] VCC1_5_B[03] VCC1_5_B[04] VCC1_5_B[05] VCC1_5_B[06] VCC1_5_B[07] VCC1_5_B[08] VCC1_5_B[09] VCC1_5_B[10] VCC1_5_B[11] VCC1_5_B[12] VCC1_5_B[13] VCC1_5_B[14] VCC1_5_B[15] VCC1_5_B[16] VCC1_5_B[17] VCC1_5_B[18] VCC1_5_B[19] VCC1_5_B[20] VCC1_5_B[21] VCC1_5_B[22] VCC1_5_B[23] VCC1_5_B[24] VCC1_5_B[25] VCC1_5_B[26] VCC1_5_B[27] VCC1_5_B[28] VCC1_5_B[29] VCC1_5_B[30] VCC1_5_B[31] VCC1_5_B[32] VCC1_5_B[33] VCC1_5_B[34] VCC1_5_B[35] VCC1_5_B[36] VCC1_5_B[37] VCC1_5_B[38] VCC1_5_B[39] VCC1_5_B[40] VCC1_5_B[41] VCC1_5_B[42] VCC1_5_B[43] VCC1_5_B[44] VCC1_5_B[45] VCC1_5_B[46]
VCCSATAPLL VCC1_5_A[01]
VCC1_5_A[02] VCC1_5_A[03] VCC1_5_A[04] VCC1_5_A[05]
VCC1_5_A[06] VCC1_5_A[07] VCC1_5_A[08] VCC1_5_A[09] VCC1_5_A[10]
VCC1_5_A[11] VCC1_5_A[12]
VCC1_5_A[13] VCC1_5_A[14]
VCC1_5_A[15] VCC1_5_A[16] VCC1_5_A[17]
VCC1_5_A[18] VCC1_5_A[19]
VCCUSBPLL VCC1_5_A[20]
VCC1_5_A[21] VCC1_5_A[22] VCC1_5_A[23] VCC1_5_A[24]
VCC1_5_A[25] VCCLAN1_05[1]
VCCLAN1_05[2] VCCLAN3_3[1]
VCCLAN3_3[2] VCCGLANPLL VCCGLAN1_5[1]
VCCGLAN1_5[2] VCCGLAN1_5[3] VCCGLAN1_5[4] VCCGLAN1_5[5]
VCCGLAN3_3
3
VCC1_05[01] VCC1_05[02] VCC1_05[03] VCC1_05[04] VCC1_05[05] VCC1_05[06] VCC1_05[07] VCC1_05[08] VCC1_05[09] VCC1_05[10] VCC1_05[11] VCC1_05[12] VCC1_05[13] VCC1_05[14] VCC1_05[15] VCC1_05[16]
CORE
CORE
VCC1_05[17] VCC1_05[18] VCC1_05[19] VCC1_05[20] VCC1_05[21] VCC1_05[22] VCC1_05[23] VCC1_05[24] VCC1_05[25] VCC1_05[26] VCC1_05[27] VCC1_05[28]
VCCA3GP ATXARX
VCCA3GP ATXARX
VCCDMIPLL
VCC_DMI[1] VCC_DMI[2]
V_CPU_IO[1] V_CPU_IO[2]
VCC3_3[01] VCC3_3[02] VCC3_3[03]
VCC3_3[04] VCC3_3[05] VCC3_3[06]
VCCP_COREVCCPSUSVCCPUSB
VCCP_COREVCCPSUSVCCPUSB
VCC3_3[07] VCC3_3[08] VCC3_3[09] VCC3_3[10] VCC3_3[11]
IDE
IDE
VCC3_3[12] VCC3_3[13]
VCC3_3[14] VCC3_3[15] VCC3_3[16] VCC3_3[17] VCC3_3[18] VCC3_3[19] VCC3_3[20]
PCI
PCI
VCC3_3[21] VCC3_3[22] VCC3_3[23] VCC3_3[24]
VCCHDA
VCCSUSHDA
VCCSUS1_05[1] VCCSUS1_05[2]
VCCSUS1_5[1]
VCCSUS1_5[2] VCCSUS3_3[01] VCCSUS3_3[02]
VCCSUS3_3[03] VCCSUS3_3[04] VCCSUS3_3[05]
USB CORE
USB CORE
VCCSUS3_3[06] VCCSUS3_3[07]
VCCSUS3_3[08] VCCSUS3_3[09] VCCSUS3_3[10] VCCSUS3_3[11] VCCSUS3_3[12] VCCSUS3_3[13] VCCSUS3_3[14] VCCSUS3_3[15] VCCSUS3_3[16] VCCSUS3_3[17] VCCSUS3_3[18] VCCSUS3_3[19]
GLAN POWER
GLAN POWER
VCCCL1_05
VCCCL1_5
VCCCL3_3[1] VCCCL3_3[2]
3
4
C598
C598
0.1U
0.1U
A13 B13 C13 C14 D14 E14 F14 G14 L11 L12 L14 L16 L17 L18 M11 M18 P11 P18 T11 T18 U11 U18 V11 V12 V14 V16 V17 V18
R29 AE28
AE29 AC23
AC24 AF29 AD2 AC8
AD8 AE8 AF8
AA3 U7 V7 W1 W6 W7 Y7
A8 B15 B18 B4 B9 C15 D13 D5 E10 E7 F11
AC12 AD11 J6
AF20 AC16 J7 C3 AC18
AC21 AC22 AG20 AH28
P6 P7 C1 N7 P1 P2 P3 P4 P5 R1 R3 R5 R6
G22 A22 F20
G21
1 2
10
1 2
+1.5V_DMIPLL
C626
C626
0.1U
0.1U
C942
C942
0.01U
0.01U
10
10
10
10
10
10
10
10
10
10
10
+1.05V_VCCP
10
10
Non-iAMT
TP_VCCSUS1.05_1 TP_VCCSUS1.05_2
TP_VCCSUS1.5_1 TP_VCCSUS1.5_2
WWAN Noise - ICH improvements
C562
C562
0.1U_NC
0.1U_NC
+3.3V_RUN
10
10
12
C544
C544
0.1U_NC
0.1U_NC
12
10
10
TP_VCCCL1.05 +VCCCL1_5
Non-iAMT
4
1 2
1 2
1 2
1 2
1 2
C596
C596
0.1U
0.1U
C640
C640
0.1U
0.1U
C574
C574
0.1U
0.1U
C570
C570
0.1U
0.1U
C558
C558
0.1U
0.1U
25
25
+1.05V_VCCP
C943
C943
10U
10U
1 2
10
10
1206
1206
10
10
10
10
T50PAD T50PAD T73PAD T73PAD
T70PAD T70PAD T58PAD T58PAD
12
C634
C634
0.1U_NC
0.1U_NC
10
10
T89PAD T89PAD
5
+1.05V_VCCP +1.5V_RUN
D16
D16
1
2
BAT54C T/R
BAT54C T/R
R469
R469
3
1 2
10
10
805
805
1uH+-20%_800mA
L88
12
C643
C643 22U
22U
C611
C611
0.1U
0.1U
1 2
L88 1uH
1uH
1 2
6.3
6.3
603
603 +1.25V_RUN
+3.3V_RUN
+1.5V_DMIPLL_R
12
R817 1R817 1
close to AC23 & AC24
12
C609
C609
0.1U
0.1U
10
10
WWAN Noise - ICH improvements
12
C552
C552
0.1U_NC
0.1U_NC
10
C569
C569
0.1U
0.1U
Non-iAMT
12
10
10
10
10
603
603
C607
C607
0.1U
0.1U
PC187
PC187 1U_NC
1U_NC
10
12
C548
C548
0.1U
0.1U
10
10
12
C559
C559
0.1U
0.1U
10
10
C589
C589
0.1U
0.1U
1 2
+3.3V_RUN+3.3V_SUS
C563
C563
1 2
0.1U
0.1U
1 2
10
10
10
10
12
C541
C541
0.1U_NC
0.1U_NC
10
10
C927
C927
0.1U_NC
0.1U_NC
1 2
10
10
5
12
10
10
+3.3V_SUS
6
+1.5V_RUN
12
12
10
10
C550
C550
0.1U_NC
0.1U_NC
6
C595
C595
0.1U
0.1U
10
10
12
C566
C566
0.1U_NC
0.1U_NC
+1.05V_VCCP
12
10
10
805
805
+3.3V_RUN
12
10
10
7
U48EU48E
A23
VSS[001]
A5
VSS[002]
AA2
VSS[003]
AA7
VSS[004]
A25
VSS[005]
AB1
VSS[006]
AB24
VSS[007]
AC11
VSS[008]
AC14
VSS[009]
AC25
VSS[010]
AC26
VSS[011]
AC27
VSS[012]
AD17
VSS[013]
AD20
VSS[014]
AD28
VSS[015]
AD29
VSS[016]
AD3
VSS[017]
AD4
VSS[018]
AD6
VSS[019]
AE1
VSS[020]
AE12
VSS[021]
AE2
VSS[022]
AE22
VSS[023]
AD1
VSS[024]
AE25
VSS[025]
AE5
VSS[026]
AE6
VSS[027]
AE9
VSS[028]
AF14
VSS[029]
AF16
VSS[030]
AF18
VSS[031]
AF3
VSS[032]
AF4
VSS[033]
AG5
VSS[034]
AG6
VSS[035]
AH10
VSS[036]
AH13
VSS[037]
AH16
VSS[038]
AH19
VSS[039]
AH2
VSS[040]
AF28
VSS[041]
AH22
VSS[042]
AH24
C585
C585
4.7U
4.7U
C573
C573
0.1U_NC
0.1U_NC
Title
Title
Title
ICH8-M (POWER,GND)
ICH8-M (POWER,GND)
ICH8-M (POWER,GND)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
GM3 2B
GM3 2B
GM3 2B
Date: Sheet
Date: Sheet
Date: Sheet
VSS[043]
AH26
VSS[044]
AH3
VSS[045]
AH4
VSS[046]
AH8
VSS[047]
AJ5
VSS[048]
B11
VSS[049]
B14
VSS[050]
B17
VSS[051]
B2
VSS[052]
B20
VSS[053]
B22
VSS[054]
B8
VSS[055]
C24
VSS[056]
C26
VSS[057]
C27
VSS[058]
C6
VSS[059]
D12
VSS[060]
D15
VSS[061]
D18
VSS[062]
D2
VSS[063]
D4
VSS[064]
E21
VSS[065]
E24
VSS[066]
E4
VSS[067]
E9
VSS[068]
F15
VSS[069]
E23
VSS[070]
F28
VSS[071]
F29
VSS[072]
F7
VSS[073]
G1
VSS[074]
E2
VSS[075]
G10
VSS[076]
G13
VSS[077]
G19
VSS[078]
G23
VSS[079]
G25
VSS[080]
G26
VSS[081]
G27
VSS[082]
H25
VSS[083]
H28
VSS[084]
H29
VSS[085]
H3
VSS[086]
H6
VSS[087]
J1
VSS[088]
J25
VSS[089]
J26
VSS[090]
J27
VSS[091]
J4
VSS[092]
J5
VSS[093]
K23
VSS[094]
K28
VSS[095]
K29
VSS[096]
K3
VSS[097]
K6
VSS[098]
QUANTA
QUANTA
QUANTA COMPUTER
7
VSS[099] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158] VSS[159] VSS[160] VSS[161] VSS[162] VSS[163] VSS[164] VSS[165] VSS[166] VSS[167] VSS[168] VSS[169] VSS[170] VSS[171] VSS[172] VSS[173] VSS[174] VSS[175] VSS[176] VSS[177] VSS[178] VSS[179] VSS[180] VSS[181] VSS[182] VSS[183] VSS[184]
VSS_NCTF[01] VSS_NCTF[02] VSS_NCTF[03] VSS_NCTF[04] VSS_NCTF[05] VSS_NCTF[06] VSS_NCTF[07] VSS_NCTF[08] VSS_NCTF[09] VSS_NCTF[10] VSS_NCTF[11] VSS_NCTF[12]
K7 L1 L13 L15 L26 L27 L4 L5 M12 M13 M14 M15 M16 M17 M23 M28 M29 M3 N1 N11 N12 N13 N14 N15 N16 N17 N18 N26 N27 N4 N5 N6 P12 P13 P14 P15 P16 P17 P23 P28 P29 R11 R12 R13 R14 R15 R16 R17 R18 R28 R4 T12 T13 T14 T15 T16 T17 T2 U12 U13 U14 U15 U16 U17 U23 U26 U27 U3 U5 V13 V15 V28 V29 W2 W26 W27 Y28 Y29 Y4 AB4 AB23 AB5 AB6 AD5 U4 W24
A1 A2 A28 A29 AH1 AH29 AJ1 AJ2 AJ28 AJ29 B1 B29
14 62Monday, March 24, 2008
14 62Monday, March 24, 2008
14 62Monday, March 24, 2008
8
of
of
of
8
1
www.kythuatvitinh.com
2
3
4
5
6
7
8
MASTER
+1.8V_SUS
+V_DDR_MCH_REF
JDIM1
JDIM1
1
A A
B B
DDR_CKE0_DIMMA6,16
DDR_A_BS27,16
DDR_A_BS07,16 DDR_A_WE#7,16
DDR_A_CAS#7,16
DDR_CS1_DIMMA#6,16
M_ODT16,16
C C
D D
MEM_SDATA13
MEM_SCLK13
+3.3V_RUN
DDR_A_D6 DDR_A_D5
DDR_A_DQS#0 DDR_A_DQS0
DDR_A_D3 DDR_A_D2
DDR_A_D9 DDR_A_D8
DDR_A_DQS#1 DDR_A_DQS1
DDR_A_D11 DDR_A_D14
DDR_A_D17 DDR_A_D20
DDR_A_DQS#2 DDR_A_DQS2
DDR_A_D23 DDR_A_D19
DDR_A_D28 DDR_A_D25
DDR_A_DM3
DDR_A_D31 DDR_A_D27
DDR_A_BS2 DDR_A_MA12
DDR_A_MA9 DDR_A_MA8
DDR_A_MA5 DDR_A_MA3 DDR_A_MA1
DDR_A_MA10 DDR_A_BS0 DDR_A_WE#
DDR_A_CAS#
M_ODT1 DDR_A_D37
DDR_A_D36 DDR_A_DQS#4
DDR_A_DQS4 DDR_A_D34
DDR_A_D39 DDR_A_D40
DDR_A_D41 DDR_A_DM5 DDR_A_D42
DDR_A_D46 DDR_A_D53
DDR_A_D49
DDR_A_DQS#6 DDR_A_DQS6
DDR_A_D50 DDR_A_D51
DDR_A_D60 DDR_A_D56 DDR_A_D61
DDR_A_DM7 DDR_A_D63
DDR_A_D59
MEM_SCLK
SMbus address A0
VREF
3
VSS47
5
DQ0
7
DQ1
9
VSS37
11
DQS#0
13
DQS0
15
VSS48
17
DQ2
19
DQ3
21
VSS38
23
DQ8
25
DQ9
27
VSS49
29
DQS#1
31
DQS1
33
VSS39
35
DQ10
37
DQ11
39
VSS50
41
VSS18
43
DQ16
45
DQ17
47
VSS1
49
DQS#2
51
DQS2
53
VSS19
55
DQ18
57
DQ19
59
VSS22
61
DQ24
63
DQ25
65
VSS23
67
DM3
69
NC4
71
VSS9
73
DQ26
75
DQ27
77
VSS4
79
CKE0
81
VDD7
83
NC1
85
A16_BA2
87
VDD9
89
A12
91
A9
93
A8
95
VDD5
97
A5
99
A3
101
A1
103
VDD10
105
A10/AP
107
BA0
109
WE#
111
VDD2
113
CAS#
115
S1#
117
VDD3
119
ODT1
121
VSS11
123
DQ32
125
DQ33
127
VSS26
129
DQS#4
131
DQS4
133
VSS2
135
DQ34
137
DQ35
139
VSS27
141
DQ40
143
DQ41
145
VSS29
147
DM5
149
VSS51
151
DQ42
153
DQ43
155
VSS40
157
DQ48
159
DQ49
161
VSS52
163
NCTEST
165
VSS30
167
DQS#6
169
DQS6
171
VSS31
173
DQ50
175
DQ51
177
VSS33
179
DQ56
181
DQ57
183
VSS3
185
DM7
187
VSS34
189
DQ58
191
DQ59
193
VSS14
195
SDA
197
SCL
199
VDD(SPD)
TYC_1-1734074-1
TYC_1-1734074-1
CLOCK 0,1
PC4800 DDR2 SDRAM
PC4800 DDR2 SDRAM
+1.8V_SUS
2
VSS46
DQ4 DQ5
VSS15
DM0
VSS5
DQ6 DQ7
VSS16
DQ12 DQ13
VSS17
DM1
VSS53
CK0
CK0#
VSS41
DQ14 DQ15
VSS54 VSS20
DQ20 DQ21 VSS6
NC3 DM2
VSS21
DQ22 DQ23
VSS24
DQ28
DQ29 VSS25 DQS#3
DQS3
VSS10
DQ30
DQ31
VSS8
CKE1
SO-DIMM (200P)
SO-DIMM (200P)
VDD8
A15 A14
VDD11
A11
A7 A6
VDD4
A4 A2 A0
VDD12
BA1
RAS#
S0# VDD1 ODT0
A13 VDD6
NC2
VSS12
DQ36 DQ37
VSS28
DM4
VSS42
DQ38 DQ39
VSS55
DQ44
DQ45 VSS43 DQS#5
DQS5
VSS56
DQ46
DQ47 VSS44
DQ52
DQ53 VSS57
CK1
CK1# VSS45
DM6
VSS32
DQ54
DQ55 VSS35
DQ60
DQ61
VSS7 DQS#7
DQS7
VSS36
DQ62
DQ63 VSS13
SA0 SA1
H 5.2 H 9.2
DDR_A_D4
4
DDR_A_D0
6 8
DDR_A_DM0
10 12
DDR_A_D7
14
DDR_A_D1
16 18
DDR_A_D13
20
DDR_A_D12
22 24
DDR_A_DM1
26 28 30 32 34
DDR_A_D15
36
DDR_A_D10
38 40
42
DDR_A_D16
44
DDR_A_D21
46 48
PM_EXTTS#0 PM_EXTTS#1
50
DDR_A_DM2
52 54
DDR_A_D18
56
DDR_A_D22
58 60
DDR_A_D29
62
DDR_A_D24
64 66
DDR_A_DQS#3
68
DDR_A_DQS3
70 72
DDR_A_D30
74
DDR_A_D26
76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200
DDR_CKE1_DIMMA 6,16
DDR_A_MA11 DDR_A_MA7 DDR_A_MA6
DDR_A_MA4 DDR_A_MA2 DDR_A_MA0
DDR_A_BS1 DDR_A_RAS#
DDR_CS0_DIMMA# 6,16
M_ODT0
DDR_A_MA13
DDR_A_D32 DDR_A_D33
DDR_A_DM4 DDR_A_D38
DDR_A_D35 DDR_A_D44
DDR_A_D45 DDR_A_DQS#5
DDR_A_DQS5 DDR_A_D43
DDR_A_D47 DDR_A_D48
DDR_A_D52
DDR_A_DM6 DDR_A_D54
DDR_A_D55 DDR_A_D57
DDR_A_DQS#7 DDR_A_DQS7
DDR_A_D62 DDR_A_D58
R392
R392 10K
10K
1 2
1 2
M_CLK_DDR0 6 M_CLK_DDR#0 6
DDR_A_BS1 7,16 DDR_A_RAS# 7,16
M_ODT0 6,16
M_CLK_DDR1 6 M_CLK_DDR#1 6
R390
R390 10K
10K
DDR_A_DM[0..7] 7 DDR_A_D[0..63] 7 DDR_A_DQS[0..7] 7 DDR_A_DQS#[0..7] 7 DDR_A_MA[0..13] 7,16
+V_DDR_MCH_REF
12
C510
C510
0.1U_10V
0.1U_10V
PM_EXTTS#0 6
+3.3V_RUN
12
C504
C504
2.2U_6.3V
2.2U_6.3V
12
C508
C508
0.1U_10V
0.1U_10V
12
C509
C509
2.2U_6.3V
2.2U_6.3V
DDR_CKE3_DIMMB6,16
DDR_B_BS27,16
DDR_CS3_DIMMB#6,16
DDR_B_BS07,16 DDR_B_WE#7,16
DDR_B_CAS#7,16
+3.3V_RUN
M_ODT36,16
DDR_B_D5 DDR_B_D4
DDR_B_DQS#0 DDR_B_DQS0
DDR_B_D2 DDR_B_D3
DDR_B_D8 DDR_B_D9
DDR_B_DQS#1 DDR_B_DQS1
DDR_B_D11 DDR_B_D10
DDR_B_D17 DDR_B_D20
DDR_B_DQS#2 DDR_B_DQS2
DDR_B_D23 DDR_B_D29
DDR_B_D28 DDR_B_DM3
DDR_B_D31 DDR_B_D27
DDR_B_BS2
DDR_B_MA12
DDR_B_MA9 DDR_B_MA8
DDR_B_MA5 DDR_B_MA3 DDR_B_MA1
DDR_B_MA10
DDR_B_BS0
DDR_B_WE# DDR_B_CAS#
M_ODT3 DDR_B_D37
DDR_B_D38 DDR_B_DQS#4
DDR_B_DQS4 DDR_B_D34
DDR_B_D35 DDR_B_D41 DDR_B_D44
DDR_B_D40 DDR_B_DM5 DDR_B_D46 DDR_B_D42
DDR_B_D43 DDR_B_D47 DDR_B_D53
DDR_B_D49
DDR_B_DQS#6 DDR_B_DQS6
DDR_B_D54
DDR_B_D56 DDR_B_D57
DDR_B_DM7 DDR_B_D58
DDR_B_D63 DDR_B_D62 MEM_SDATAMEM_SDATA
MEM_SCLK
SMbus address A4
1
2
3
4
SLAVE
+1.8V_SUS +1.8V_SUS
+V_DDR_MCH_REF
JDIM2
JDIM2
1
VREF
3
VSS47
5
DQ0
7
DQ1
9
VSS37
11
DQS#0
13
DQS0
15
VSS48
17
DQ2
19
DQ3
21
VSS38
23
DQ8
25
DQ9
27
VSS49
29
DQS#1
31
DQS1
33
VSS39
35
DQ10
37
DQ11
39
VSS50
41
VSS18
43
DQ16
45
DQ17
47
VSS1
49
DQS#2
51
DQS2
53
VSS19
55
DQ18
57
DQ19
59
VSS22
61
DQ24
63
DQ25
65
VSS23
67
DM3
69
NC4
71
VSS9
73
DQ26
75
DQ27
77
VSS4
79
CKE0
81
VDD7
83
NC1
85
A16_BA2
87
VDD9
89
A12
91
A9
93
A8
95
VDD5
97
A5
99
A3
101
A1
103
VDD10
105
A10/AP
107
BA0
109
WE#
111
VDD2
113
CAS#
115
S1#
117
VDD3
119
ODT1
121
VSS11
123
DQ32
125
DQ33
127
VSS26
129
DQS#4
131
DQS4
133
VSS2
135
DQ34
137
DQ35
139
VSS27
141
DQ40
143
DQ41
145
VSS29
147
DM5
149
VSS51
151
DQ42
153
DQ43
155
VSS40
157
DQ48
159
DQ49
161
VSS52
163
NCTEST
165
VSS30
167
DQS#6
169
DQS6
171
VSS31
173
DQ50
175
DQ51
177
VSS33
179
DQ56
181
DQ57
183
VSS3
185
DM7
187
VSS34
189
DQ58
191
DQ59
193
VSS14
195
SDA
197
SCL
199
VDD(SPD)
TYC_2-1734073-2
TYC_2-1734073-2
CLOCK 2,3
CKE 2,3CKE 0,1
5
2
VSS46
4
DQ4
6
DQ5
8
VSS15
10
DM0
12
VSS5
14
DQ6
16
DQ7
18
VSS16
20
DQ12
22
DQ13
24
VSS17
26
DM1
28
VSS53
30
CK0
32
CK0#
34
VSS41
36
DQ14
38
DQ15
40
VSS54
42
VSS20
44
DQ20
46
DQ21
48
VSS6
50
NC3
52
DM2
54
VSS21
56
DQ22
58
DQ23
60
VSS24
62
DQ28
64
DQ29
66
VSS25
68
DQS#3
70
DQS3
72
VSS10
74
DQ30
76
DQ31
78
VSS8
80
CKE1
82
VDD8
84
A15
86
A14
88
VDD11
90
PC4800 DDR2 SDRAM
SO-DIMM (200P)
PC4800 DDR2 SDRAM
SO-DIMM (200P)
A11
92
A7
94
A6
96
VDD4
98
A4
100
A2
102
A0
104
VDD12
106
BA1
108
RAS#
110
S0#
112
VDD1
114
ODT0
116
A13
118
VDD6
120
NC2
122
VSS12
124
DQ36
126
DQ37
128
VSS28
130
DM4
132
VSS42
134
DQ38
136
DQ39
138
VSS55
140
DQ44
142
DQ45
144
VSS43
146
DQS#5
148
DQS5
150
VSS56
152
DQ46
154
DQ47
156
VSS44
158
DQ52
160
DQ53
162
VSS57
164
CK1
166
CK1#
168
VSS45
170
DM6
172
VSS32
174
DQ54
176
DQ55
178
VSS35
180
DQ60
182
DQ61
184
VSS7
186
DQS#7
188
DQS7
190
VSS36
192
DQ62
194
DQ63
196
VSS13
198
SA0
200
SA1
1 2
DDR_B_D0 DDR_B_D1
DDR_B_DM0 DDR_B_D7
DDR_B_D6 DDR_B_D12
DDR_B_D13 DDR_B_DM1
DDR_B_D14 DDR_B_D15
DDR_B_D21 DDR_B_D16
DDR_B_DM2 DDR_B_D18DDR_B_D22
DDR_B_D19 DDR_B_D24
DDR_B_D25 DDR_B_DQS#3
DDR_B_DQS3 DDR_B_D30
DDR_B_D26
DDR_CKE4_DIMMB 6,16
DDR_B_MA14 6,16DDR_A_MA14 6,16
DDR_B_MA11 DDR_B_MA7 DDR_B_MA6
DDR_B_MA4 DDR_B_MA2 DDR_B_MA0
DDR_B_BS1 DDR_B_RAS#
DDR_CS2_DIMMB# 6,16
M_ODT2
DDR_B_MA13
DDR_B_D32 DDR_B_D36
DDR_B_DM4 DDR_B_D39
DDR_B_D33 DDR_B_D45
DDR_B_DQS#5 DDR_B_DQS5
DDR_B_D52 DDR_B_D48
DDR_B_DM6 DDR_B_D51
DDR_B_D55DDR_B_D50 DDR_B_D60
DDR_B_D61 DDR_B_DQS#7
DDR_B_DQS7
DDR_B_D59
R411 10KR411 10K
R413
R413 10K
10K
12
6
DDR_B_DM[0..7] 7 DDR_B_D[0..63] 7 DDR_B_DQS[0..7] 7 DDR_B_DQS#[0..7] 7 DDR_B_MA[0..13] 7,16
+V_DDR_MCH_REF
12
C467
C471
C471
0.1U_10V
0.1U_10V
C467
2.2U_6.3V
2.2U_6.3V
Place these Caps near So-Dimm1.
12
12
C875
C875
2.2U_6.3V
2.2U_6.3V
C891
C891
2.2U_6.3V
2.2U_6.3V
M_CLK_DDR3 6 M_CLK_DDR#3 6
PM_EXTTS#1 6
+1.8V_SUS
12
C892
C892
2.2U_6.3V
2.2U_6.3V
+1.8V_SUS
12
Place these Caps near So-Dimm2.
12
C873
C873
2.2U_6.3V
2.2U_6.3V
12
C888
C888
0.1U_10V
0.1U_10V
12
C890
C890
0.1U_10V
0.1U_10V
12
C520
C520
0.1U_10V
0.1U_10V
12
C872
C872
2.2U_6.3V
2.2U_6.3V
12
C498
C498
0.1U_10V
0.1U_10V
12
C496
C496
0.1U_10V
0.1U_10V
12
C870
C870
2.2U_6.3V
2.2U_6.3V
DDR_B_BS1 7,16 DDR_B_RAS# 7,16
M_ODT2 6,16
M_CLK_DDR4 6 M_CLK_DDR#4 6
+3.3V_RUN
+1.8V_SUS
Place these Caps near So-Dimm1.
12
C501
C501
0.1U_10V
0.1U_10V
+1.8V_SUS
Place these Caps near So-Dimm2.
12
C497
C497
0.1U_10V
0.1U_10V
+3.3V_RUN
12
C523
C523
2.2U_6.3V
2.2U_6.3V
QUANTA
QUANTA
QUANTA COMPUTER
COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
COMPUTER
DDR2_SO-DIMM (200P) X 2
DDR2_SO-DIMM (200P) X 2
DDR2_SO-DIMM (200P) X 2
GM3 2B
GM3 2B
GM3 2B
7
12
C889
C889
2.2U_6.3V
2.2U_6.3V
12
C874
C874
2.2U_6.3V
2.2U_6.3V
12
C500
C500
0.1U_10V
0.1U_10V
12
C499
C499
0.1U_10V
0.1U_10V
12
C893
C893
2.2U_6.3V
2.2U_6.3V
12
C871
C871
2.2U_6.3V
2.2U_6.3V
of
of
of
15 62Monday, March 24, 2008
15 62Monday, March 24, 2008
15 62Monday, March 24, 2008
8
1
www.kythuatvitinh.com
2
3
4
5
6
7
8
+0.9V_DDR_VTT
A A
B B
C C
DDR_CS0_DIMMA#6,15
D D
1
Please these resistor closely DIMMA,all trace length<750 mil.
12
C529
C529
0.1U_10V
0.1U_10V
+0.9V_DDR_VTT
12
C469
C469
0.1U_10V
0.1U_10V
T194
T194 PAD
PAD
2
Layout note: Place 1 cap close to every 1 R-pack terminated to SMDDR_VTERM.
C468
C468
0.1U_10V
0.1U_10V
C490
C490
0.1U_10V
0.1U_10V
12
C494
C494
0.1U_10V
0.1U_10V
12
C515
C515
0.1U_10V
0.1U_10V
DDR_A_MA11 DDR_A_MA7
DDR_A_MA6 DDR_A_MA4
DDR_A_BS1 DDR_A_RAS#
DDR_A_MA13 M_ODT0
DDR_A_BS2 DDR_A_MA12
DDR_A_MA9 DDR_A_MA8
DDR_A_MA3 DDR_A_MA5
DDR_A_BS0 DDR_A_MA10
DDR_A_CAS# DDR_A_WE#
DDR_A_MA2 DDR_A_MA0
DDR_A_MA1
3
12
12
C511
C511
C527
C527
0.1U_10V
0.1U_10V
0.1U_10V
0.1U_10V
12
12
R388 56R388 56 R386 56R386 56 R402 56R402 56 R387 56R387 56 R389 56R389 56 R401 56R401 56 R400 56R400 56
C513
C513
0.1U_10V
0.1U_10V
RP25
RP25
2 4
4P2R-S-56
4P2R-S-56
RP26
RP26
2 4
4P2R-S-56
4P2R-S-56
RP28
RP28
2 4
4P2R-S-56
4P2R-S-56
RP29
RP29
2 4
4P2R-S-56
4P2R-S-56
RP13
RP13
2 4
4P2R-S-56
4P2R-S-56
RP12
RP12
2 4
4P2R-S-56
4P2R-S-56
RP9
RP9
2 4
4P2R-S-56
4P2R-S-56
RP10
RP10
2 4
4P2R-S-56
4P2R-S-56
RP11
RP11
2 4
4P2R-S-56
4P2R-S-56
RP27
RP27
2 4
4P2R-S-56
4P2R-S-56
1 2 1 2 1 2 1 2 1 2 1 2 1 2
C465
C465
0.1U_10V
0.1U_10V
1 3
1 3
1 3
1 3
1 3
1 3
1 3
1 3
1 3
1 3
12
C514
C514
0.1U_10V
0.1U_10V
12
C466
C466
0.1U_10V
0.1U_10V
+0.9V_DDR_VTT
4
12
12
C512
C512
0.1U_10V
0.1U_10V
12
12
C489
C489
0.1U_10V
0.1U_10V
DDR_A_MA[0..13]7,15 DDR_B_MA[0..13] 7,15
DDR_A_BS17,15 DDR_A_RAS#7,15
M_ODT06,15
DDR_A_BS27,15
DDR_A_BS07,15
DDR_A_CAS#7,15 DDR_A_WE#7,15
M_ODT16,15
DDR_CS1_DIMMA#6,15 DDR_CKE0_DIMMA6,15 DDR_CKE1_DIMMA6,15
DDR_A_MA146,15 DDR_B_MA14 6,15
12
12
12
C531
C531
C526
C526
0.1U_10V
0.1U_10V
0.1U_10V
0.1U_10V
12
C470
C470
C464
C464
0.1U_10V
0.1U_10V
0.1U_10V
0.1U_10V
RP36
RP36
1 3
4P2R-S-56
4P2R-S-56
RP35
RP35
1 3
4P2R-S-56
4P2R-S-56
RP38
RP38
1 3
4P2R-S-56
4P2R-S-56
RP39
RP39
1 3
4P2R-S-56
4P2R-S-56
RP34
RP34
1 3
4P2R-S-56
4P2R-S-56
RP32
RP32
1 3
4P2R-S-56
4P2R-S-56
RP33
RP33
1 3
4P2R-S-56
4P2R-S-56
RP30
RP30
1 3
4P2R-S-56
4P2R-S-56
RP31
RP31
1 3
4P2R-S-56
4P2R-S-56
RP37
RP37
1 3
4P2R-S-56
4P2R-S-56
R406 56R406 56 R403 56R403 56 R417 56R417 56 R405 56R405 56 R415 56R415 56 R404 56R404 56 R416 56R416 56
12
12
2 4
2 4
2 4
2 4
2 4
2 4
2 4
2 4
2 4
2 4
12 12 12 12 12 12 12
C528
C528
0.1U_10V
0.1U_10V
C472
C472
0.1U_10V
0.1U_10V
DDR_B_MA6 DDR_B_MA2
DDR_B_MA11 DDR_B_MA7
DDR_B_BS1 DDR_B_RAS#
M_ODT2 DDR_B_MA13
DDR_B_MA3 DDR_B_MA5
DDR_B_MA9 DDR_B_MA8
DDR_B_MA1 DDR_B_MA12
DDR_B_BS0 DDR_B_MA10
DDR_B_CAS#
DDR_B_WE#
DDR_B_MA4 DDR_B_MA0
5
C493
C493
0.1U_10V
0.1U_10V
12
C516
C516
0.1U_10V
0.1U_10V
12
C491
C491
C517
C517
0.1U_10V
0.1U_10V
0.1U_10V
0.1U_10V
12
12
DDR_B_BS1 7,15 DDR_B_RAS# 7,15
DDR_B_CAS# 7,15 DDR_B_WE# 7,15
DDR_B_BS2 7,15 DDR_CS2_DIMMB# 6,15 DDR_CS3_DIMMB# 6,15 DDR_CKE4_DIMMB 6,15 DDR_CKE3_DIMMB 6,15
C492
C492
C530
C530
0.1U_10V
0.1U_10V
0.1U_10V
0.1U_10V
M_ODT2 6,15
Please these resistor closely DIMMB,all trace length<750 mil.
DDR_B_BS0 7,15
M_ODT3 6,15
12
12
QUANTA
QUANTA
QUANTA COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
6
Date: Sheet
DDR2 RES. ARRAY
DDR2 RES. ARRAY
DDR2 RES. ARRAY
GM3 2B
GM3 2B
GM3 2B
7
of
of
of
16 62Monday, March 24, 2008
16 62Monday, March 24, 2008
16 62Monday, March 24, 2008
8
1
www.kythuatvitinh.com
2
3
4
5
6
7
8
Add capacitor pads for improving WWAN.
Y2
Y2
21
14.318MHZ
14.318MHZ
10
10
CLK_ICH_48M CLK_ICH_14M CLK_PCI_8512 CLK_PCI_PCCARD CLK_PCI_ICH
CLK_XTAL_OUTCLK_XTAL_IN
C443
C443 33P
33P
1 2
50
50
SATA_CLKREQ# CLK_3GPLLREQ#
CLK_LPC_DEBUG CLK_PCI_PCCARD
CLK_PCI_ICH PCI_ICH CLK_ICH_48M
1 2
L55 BLM18SG260L55 BLM18SG260
CLK_ICH_14M
12
C459
C459
0.1U
0.1U
10
10
R359 2.2R359 2.2
1 2
R391 2.2R391 2.2
1 2
R358 2.2R358 2.2
1 2
R377 2.2R377 2.2
1 2
12
C476
C476
0.1U
0.1U
R365 475R365 475 R364 475/FR364 475/F
1 2
R363 22_NCR363 22_NC
1 2
R354 33R354 33 R353 33R353 33 R350 33R350 33 R375 33R375 33 R372 8.2KR372 8.2K
R374 8.2KR374 8.2K
R367 8.2KR367 8.2K R366 33R366 33
+CK_VDD_MAIN
12
C486
C486
0.1U
0.1U
10
10
+CK_VDD_PCI
+CK_VDD_PLL3
+CK_VDD_48
12
C448
C448
0.1U
0.1U
10
10
+CK_VDD_SRC
2
1 2
1 2
1 2
12
10
10
10
10
10
10
6.3
6.3
603
603
10
10
C462
C462
0.1U
0.1U
12
12
12
12
12 12 12 12
12
C446
C446
0.1U
0.1U
C447
C447
4.7U
4.7U
UMA without iAMT
C461
C461
0.1U
0.1U
C460
C460
0.1U
0.1U
12
C473
C473
0.1U
0.1U
10
10
+CK_VDD_PCI +CK_VDD_PLL3
+CK_VDD_48 +CK_VDD_SRC
+CK_VDD_MAIN
SATA_CLKREQ#_C CLK_3GPLLREQ#_C PCI_PCCARD PCI_SIOCLK_PCI_8512 27M_SEL
FSA FSB FSC
CLK_XTAL_OUT CLK_XTAL_IN
CLK_SDATA CLK_SCLK
12
C485
C485
0.1U
0.1U
10
10
3
U19
U19
9
VDD_PCI
4
VDD_REF
23
VDD_PLL3
16
VDD_48
46
VDD_SRC
62
VDD_CPU
19
VDD_IO
27
VDD_IO
33
VDD_IO
43
VDD_IO
52
VDD_IO
56
VDD_IO
15
GND
18
GND
22
GND
26
GND
30
GND
36
GND
49
GND
59
GND
1
GND
8
CR#_A/PCI-0
10
CR_B/PCI-1
11
TME/PCI-2
12
SRC5_EN/PCI-3
13
27M_SEL/PCI-4
14
ITP_EN/PCIF-5#
17
FSA/USB48
64
FSB/TEST_MODE
5
FSC/TEST_SEL/REF
55
RESET#
63
CK_PWRGD/PD#
2
XOUT
3
XIN
6
SDATA
7
SCLK
SLG8SP513V
SLG8SP513V
C487
C487 10U_NC
10U_NC
1 2
6.3
6.3
SMbus address D2
These are for backdrive issue.
CK505
CK505
QFN64
QFN64
SRC-8/CPU_ITP
SRC-8#/CPU_ITP#
SRC-0/DOT96
SRC-0#/DOT96#
SRC-1/SE1
SRC-1#/SE2
SRC-2/SATA
SRC-2#/SATA#
CR#_C/SRC-3
CR#_D/SRC-3#
PCI_STOP#/SRC-5
CPU_STOP#/SRC5-5#
CR#_F/SRC-7
CR#_E/SRC-7#
SRC-10#
CR#_H/SRC-11
CR#_G/SRC-11#
POP RESISTOR FOR UMA
DOT96_SSC DOT96_SSC#
27M_SS 27M_NSS
CPU_ITP CPU_ITP#
SMBDAT126,31,39
SMBCLK126,31,39
4 2
2 4
2 4
+3.3V_RUN
RP3
RP3
2
3 1
2N7002W-7-F
2N7002W-7-F
+3.3V_RUN
2
3 1
2N7002W-7-F
2N7002W-7-F
4
CPU-0
CPU-0#
CPU-1
CPU-1#
SRC-4
SRC-4#
SRC-6
SRC-6#
SRC-9
SRC-9# SRC-10
2.2KX2
2.2KX2
Q40
Q40
Q39
Q39
GND
3 1
1 3
1 3
CPU_BCLK
61
CPU_BCLK#
60
MCH_BCLK
58
MCH_BCLK#
57 54
53
20 21
24 25
28 29
31 32
34 35
45 44
48 47
51 50
37 38
41 42
40 39
65
RP6 0_UMARP6 0_UMA
CPU_ITP CPU_ITP#
DOT96_SSC DOT96_SSC#
27M_NSS 27M_SS
PCIE_SATA PCIE_SATA#
PCIE_MINI3 PCIE_MINI3#
MCH_3GPLL MCH_3GPLL#
PCIE_EXPCARD PCIE_EXPCARD#
MINI1CLK_REQ#_C MINI1CLK_REQ#
PCIE_MINI2 PCIE_MINI2#
PCIE_ICH PCIE_ICH#
PCIE_LOM PCIE_LOM#
to MCH DPLL_REF_CLK
13
R394 475/FR394 475/F R395 475/FR395 475/F
MCH_DREFCLK 6
MCH_DREFCLK# 6
4 2
4 2
4 2
2 4
2 4
2 4
2 4
2 4
4 2
1 2 1 2
2 4
2 4
4 2
3 1
3 1
3 1
1 3
1 3
1 3
1 3
1 3
3 1
RP21 0RP21 0
1 3
1 3
3 1
to MCH DPLL_REF_SSCLK
DREF_SSCLK# 6
RP14 0_UMARP14 0_UMA
RP15 0_NCRP15 0_NC
DREF_SSCLK 6
CLK_CPU_ITP 3 CLK_CPU_ITP# 3
POP for ITP use
Non-iAMT
2
4
1
3
CLK_SDATA
CLK_SCLK
5
+3.3V_RUN
27M_SEL
RP5 0RP5 0
RP7 0RP7 0
RP17 0RP17 0
RP4 0_DISRP4 0_DIS
RP8 0_DISRP8 0_DIS
RP16 0RP16 0
RP18 0RP18 0
RP20 0RP20 0
RP24 0RP24 0
CARD_CLK_REQ#CARD_CLK_REQ#_C
RP23 0RP23 0
RP22 0RP22 0
13
R351
R351 10K_DIS
10K_DIS
1 2
R342
R342 10K_UMA
10K_UMA
1 2
6
PCI_ICH
+3.3V_RUN
1 2
1 2
27M_SEL
27M_SEL (PIN13)
0=UMA 1 = Disc.
GRFX down
CLK_CPU_BCLK 3 CLK_CPU_BCLK# 3
CLK_MCH_BCLK 5 CLK_MCH_BCLK# 5
CLK_PCIE_MINI1 34 CLK_PCIE_MINI1# 34
CLK_PCIE_VGA 18 CLK_PCIE_VGA# 18
CLK_VGA_27M_NSS 19
CLK_VGA_27M_SS 19
CLK_PCIE_SATA 11 CLK_PCIE_SATA# 11
CLK_PCIE_MINI3 33 CLK_PCIE_MINI3# 33
CLK_MCH_3GPLL 6 CLK_MCH_3GPLL# 6
H_STP_PCI# 13 H_STP_CPU# 13
CLK_PCIE_EXPCARD 30 CLK_PCIE_EXPCARD# 30
MINI1CLK_REQ# 34 CARD_CLK_REQ# 30
CLK_PCIE_MINI2 33 CLK_PCIE_MINI2# 33
CLK_PCIE_ICH 12 CLK_PCIE_ICH# 12
CLK_PCIE_LOM 42 CLK_PCIE_LOM# 42
CLK_3GPLLREQ# SATA_CLKREQ# CARD_CLK_REQ# MINI1CLK_REQ# PCI_PCCARD
R339
R339 10K_NC
10K_NC
R340
R340 10K_NC
10K_NC
to ATI VGA
H_STP_PCI# H_STP_CPU#
R397 10KR397 10K R396 10KR396 10K
Silego need pull up but other?
R355 10KR355 10K R356 10KR356 10K R398 10KR398 10K R399 10KR399 10K
R343 10K_NCR343 10K_NC
PCI_SIO PCI_ICH
R352 10K_NCR352 10K_NC
1 2
R341 10K_NCR341 10K_NC
1 2
FSC FSB FSA CPU SRC PCI 1 0
1
0
1
0 00 1
0
1
1 1
1
100
1
133
10
166
1
200
0
266
0
333
0
400
0
RSVD
1
1 2
100 100 100 100 100 100 100 100
12 12 12 12
330 33 33 33 33 33 33 33
12 12
+3.3V_RUN
PIN20 PIN21 PIN24 PIN25
DOT96T
DOT96C
SRCT0 SRCC0
QUANTA
QUANTA
QUANTA COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
CLOCK GENERATOR
CLOCK GENERATOR
CLOCK GENERATOR
GM3 2B
GM3 2B
GM3 2B
7
96/ 100M_T
27Mout
96/ 100M_C
27MSSout
17 62Monday, March 24, 2008
17 62Monday, March 24, 2008
17 62Monday, March 24, 2008
8
of
of
of
+3.3V_RUN
C457 27P
C457 27P
1 2
C440 27P_NC
C440 27P_NC
1 2
C431 27P_NC
C431 27P_NC
1 2
50
50
C432 27P_NC
C432 27P_NC
1 2
50
50
C439 27P_NC
C439 27P_NC
1 2
50
50 50
50 50
50
A A
C437
C437 33P
33P
1 2
50
50
B B
CPU_MCH_BSEL03,6
14.318MHz
SATA_CLKREQ#13
CLK_3GPLLREQ#6
CLK_LPC_DEBUG33 CLK_PCI_PCCARD28
CLK_PCI_851231 CLK_PCI_ICH12 CLK_ICH_48M13
CPU_MCH_BSEL13,6 CPU_MCH_BSEL23,6
CLK_ICH_14M13 CLK_PWRGD13
CLK_LPC_DEBUG FOR DEBUG NEED POP RESISTOR
+3.3V_RUN
L58 BLM21PG600SN1D
L58 BLM21PG600SN1D
805
805
120 ohms@100Mhz
C C
L51
L51 BLM21PG600SN1D
BLM21PG600SN1D
805
805
120 ohms@100Mhz
D D
1
5
www.kythuatvitinh.com
4
3
2
1
PCIE_MTX_GRX_P[0..15]6 PCIE_MTX_GRX_N[0..15]6
PCIE_MTX_GRX_P0 PCIE_MTX_GRX_N0
PCIE_MTX_GRX_P1 PCIE_MTX_GRX_N1
PCIE_MTX_GRX_P2
D D
C C
CLK_PCIE_VGA17 CLK_PCIE_VGA#17
PLTRST_DELAY#13
PCIE_MTX_GRX_N2
PCIE_MTX_GRX_P3 PCIE_MTX_GRX_N3
PCIE_MTX_GRX_P4 PCIE_MTX_GRX_N4
PCIE_MTX_GRX_P5 PCIE_MTX_GRX_N5
PCIE_MTX_GRX_P6 PCIE_MTX_GRX_N6
PCIE_MTX_GRX_P7 PCIE_MTX_GRX_N7
PCIE_MTX_GRX_P8 PCIE_MTX_GRX_N8
PCIE_MTX_GRX_P9 PCIE_MTX_GRX_N9
PCIE_MTX_GRX_P10 PCIE_MTX_GRX_N10
PCIE_MTX_GRX_P11 PCIE_MTX_GRX_N11
PCIE_MTX_GRX_P12 PCIE_MTX_GRX_N12
PCIE_MTX_GRX_P13 PCIE_MTX_GRX_N13
PCIE_MTX_GRX_P14 PCIE_MTX_GRX_N14
PCIE_MTX_GRX_P15 PCIE_MTX_GRX_N15
R718 0_DIS
R718 0_DIS
402
402
AK33
AJ33
AJ35 AJ34
AH35 AH34
AG35 AG34
AF33 AE33
AE35 AE34
AD35 AD34
AC35 AC34
AB33 AA33
AA35 AA34
W35 W34
AJ31 AJ30
AK35 AK34
AM32
Y35 Y34
V33 U33
U35 U34
T35 T34
R35 R34
U43A
U43A
PCIE_RX0P PCIE_RX0N
PCIE_RX1P PCIE_RX1N
PCIE_RX2P PCIE_RX2N
PCIE_RX3P PCIE_RX3N
PCIE_RX4P PCIE_RX4N
PCIE_RX5P PCIE_RX5N
PCIE_RX6P PCIE_RX6N
PCIE_RX7P PCIE_RX7N
PCIE_RX8P PCIE_RX8N
PCIE_RX9P PCIE_RX9N
PCIE_RX10P PCIE_RX10N
PCIE_RX11P PCIE_RX11N
PCIE_RX12P PCIE_RX12N
PCIE_RX13P PCIE_RX13N
PCIE_RX14P PCIE_RX14N
PCIE_RX15P PCIE_RX15N
Clock
Clock
PCIE_REFCLKP PCIE_REFCLKN
SM Bus
SM Bus
NC_SMB_DATA NC_SMBCLK
PERSTB
M86-LP_DIS
M86-LP_DIS
PART 1 OF 7
PART 1 OF 7
P
P C
C I
I
-
­E
E X
X P
P R
R E
E S
S S
S
I
I N
N T
T E
E R
R F
F A
A C
C E
E
PCIE_TX0P PCIE_TX0N
PCIE_TX1P PCIE_TX1N
PCIE_TX2P PCIE_TX2N
PCIE_TX3P PCIE_TX3N
PCIE_TX4P PCIE_TX4N
PCIE_TX5P PCIE_TX5N
PCIE_TX6P PCIE_TX6N
PCIE_TX7P PCIE_TX7N
PCIE_TX8P PCIE_TX8N
PCIE_TX9P PCIE_TX9N
PCIE_TX10P
PCIE_TX10N
PCIE_TX11P
PCIE_TX11N
PCIE_TX12P
PCIE_TX12N
PCIE_TX13P
PCIE_TX13N
PCIE_TX14P
PCIE_TX14N
PCIE_TX15P
PCIE_TX15N
Calibration
Calibration
PCIE_CALRN
PCIE_CALRP NC_DRAM_0
NC_DRAM_1
NC_AC_BATT
NC_FAN_TACH
AG31 AG30
AF31 AF30
AF28 AF27
AD31 AD30
AD28 AD27
AB31 AB30
AB28 AB27
AA31 AA30
AA28 AA27
W31 W30
W28 W27
V31 V30
V28 V27
U31 U30
U28 U27
R31 R30
AG26 AJ27 AF3
AG9 AK29 AK14
PCIE_MRX_GTX_C_P0 PCIE_MRX_GTX_C_N0
PCIE_MRX_GTX_C_P1 PCIE_MRX_GTX_C_N1
PCIE_MRX_GTX_C_P2 PCIE_MRX_GTX_C_N2
PCIE_MRX_GTX_C_P3 PCIE_MRX_GTX_C_N3
PCIE_MRX_GTX_C_P4 PCIE_MRX_GTX_C_N4
PCIE_MRX_GTX_C_P5 PCIE_MRX_GTX_C_N5
PCIE_MRX_GTX_C_P6 PCIE_MRX_GTX_C_N6
PCIE_MRX_GTX_C_P7 PCIE_MRX_GTX_C_N7
PCIE_MRX_GTX_C_P8 PCIE_MRX_GTX_C_N8
PCIE_MRX_GTX_C_P9 PCIE_MRX_GTX_C_N9
PCIE_MRX_GTX_C_P10 PCIE_MRX_GTX_C_N10
PCIE_MRX_GTX_C_P11 PCIE_MRX_GTX_C_N11
PCIE_MRX_GTX_C_P12 PCIE_MRX_GTX_C_N12
PCIE_MRX_GTX_C_P13 PCIE_MRX_GTX_C_N13
PCIE_MRX_GTX_C_P14 PCIE_MRX_GTX_C_N14
PCIE_MRX_GTX_C_P15 PCIE_MRX_GTX_C_N15
R131 2K/F_DIS
R131 2K/F_DIS
R126
R126
1.27K_DIS
1.27K_DIS
402
402
402
402
+PCIE_VDDC
PCIE_MRX_GTX_P[0..15]6 PCIE_MRX_GTX_N[0..15]6
PCIE_MRX_GTX_P0PCIE_MRX_GTX_P0 PCIE_MRX_GTX_P1 PCIE_MRX_GTX_P2PCIE_MRX_GTX_P2 PCIE_MRX_GTX_P3 PCIE_MRX_GTX_P4PCIE_MRX_GTX_P4 PCIE_MRX_GTX_P5 PCIE_MRX_GTX_P6PCIE_MRX_GTX_P6 PCIE_MRX_GTX_P7 PCIE_MRX_GTX_P8PCIE_MRX_GTX_P8 PCIE_MRX_GTX_P9 PCIE_MRX_GTX_P10PCIE_MRX_GTX_P10 PCIE_MRX_GTX_P11 PCIE_MRX_GTX_P12PCIE_MRX_GTX_P12 PCIE_MRX_GTX_P13 PCIE_MRX_GTX_P14PCIE_MRX_GTX_P14 PCIE_MRX_GTX_P15 PCIE_MRX_GTX_N0 PCIE_MRX_GTX_N1PCIE_MRX_GTX_N1 PCIE_MRX_GTX_N2 PCIE_MRX_GTX_N3PCIE_MRX_GTX_N3 PCIE_MRX_GTX_N4 PCIE_MRX_GTX_N5PCIE_MRX_GTX_N5 PCIE_MRX_GTX_N6 PCIE_MRX_GTX_N7PCIE_MRX_GTX_N7 PCIE_MRX_GTX_N8 PCIE_MRX_GTX_N9PCIE_MRX_GTX_N9 PCIE_MRX_GTX_N10 PCIE_MRX_GTX_N11PCIE_MRX_GTX_N11 PCIE_MRX_GTX_N12 PCIE_MRX_GTX_N13PCIE_MRX_GTX_N13 PCIE_MRX_GTX_N14 PCIE_MRX_GTX_N15
C213 0.1U_DIS10C213 0.1U_DIS10 C231 0.1U_DIS10C231 0.1U_DIS10 C233 0.1U_DIS10C233 0.1U_DIS10 C211 0.1U_DIS10C211 0.1U_DIS10 C230 0.1U_DIS10C230 0.1U_DIS10 C210 0.1U_DIS10C210 0.1U_DIS10 C208 0.1U_DIS10C208 0.1U_DIS10 C227 0.1U_DIS10C227 0.1U_DIS10 C206 0.1U_DIS10C206 0.1U_DIS10 C226 0.1U_DIS10C226 0.1U_DIS10 C224 0.1U_DIS10C224 0.1U_DIS10 C204 0.1U_DIS10C204 0.1U_DIS10 C220 0.1U_DIS10C220 0.1U_DIS10 C222 0.1U_DIS10C222 0.1U_DIS10 C200 0.1U_DIS10C200 0.1U_DIS10 C201 0.1U_DIS10C201 0.1U_DIS10 C214 0.1U_DIS10C214 0.1U_DIS10 C232 0.1U_DIS10C232 0.1U_DIS10 C234 0.1U_DIS10C234 0.1U_DIS10 C212 0.1U_DIS10C212 0.1U_DIS10 C229 0.1U_DIS10C229 0.1U_DIS10 C209 0.1U_DIS10C209 0.1U_DIS10 C207 0.1U_DIS10C207 0.1U_DIS10 C228 0.1U_DIS10C228 0.1U_DIS10 C205 0.1U_DIS10C205 0.1U_DIS10 C225 0.1U_DIS10C225 0.1U_DIS10 C223 0.1U_DIS10C223 0.1U_DIS10 C203 0.1U_DIS10C203 0.1U_DIS10 C219 0.1U_DIS10C219 0.1U_DIS10 C221 0.1U_DIS10C221 0.1U_DIS10 C199 0.1U_DIS10C199 0.1U_DIS10 C202 0.1U_DIS10C202 0.1U_DIS10
PCIE_MRX_GTX_C_P0 PCIE_MRX_GTX_C_P1 PCIE_MRX_GTX_C_P2 PCIE_MRX_GTX_C_P3 PCIE_MRX_GTX_C_P4 PCIE_MRX_GTX_C_P5 PCIE_MRX_GTX_C_P6 PCIE_MRX_GTX_C_P7 PCIE_MRX_GTX_C_P8 PCIE_MRX_GTX_C_P9 PCIE_MRX_GTX_C_P10 PCIE_MRX_GTX_C_P11 PCIE_MRX_GTX_C_P12 PCIE_MRX_GTX_C_P13 PCIE_MRX_GTX_C_P14 PCIE_MRX_GTX_C_P15 PCIE_MRX_GTX_C_N0 PCIE_MRX_GTX_C_N1 PCIE_MRX_GTX_C_N2 PCIE_MRX_GTX_C_N3 PCIE_MRX_GTX_C_N4 PCIE_MRX_GTX_C_N5 PCIE_MRX_GTX_C_N6 PCIE_MRX_GTX_C_N7 PCIE_MRX_GTX_C_N8 PCIE_MRX_GTX_C_N9 PCIE_MRX_GTX_C_N10 PCIE_MRX_GTX_C_N11 PCIE_MRX_GTX_C_N12 PCIE_MRX_GTX_C_N13 PCIE_MRX_GTX_C_N14 PCIE_MRX_GTX_C_N15
B B
A A
QUANTA
QUANTA
QUANTA COMPUTER
COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
5
4
3
2
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
COMPUTER
VGA-M82-S (PCIe)
VGA-M82-S (PCIe)
VGA-M82-S (PCIe)
GM3 2B
GM3 2B
GM3 2B
1
of
of
of
18 62Monday, March 24, 2008
18 62Monday, March 24, 2008
18 62Monday, March 24, 2008
5
www.kythuatvitinh.com
MEMORY APERTURE SIZE SELECT
MEMORY SIZE
128MB
256MB
64MB
512MB
D D
Memory Straps 400 MHz 256MB(16M*16) Hynix 400 MHz 256MB(16M*16) Qimonda 500 MHz 256MB(16M*16) Hynix 500 MHz 256MB(16M*16) Qimonda 500 MHz 256MB(16M*16) Samsung
+3.3V_DELAY
R644
R644 R648
R648 R659 10K_NCR659 10K_NC
R54
R54
+1.8V_RUN
R667
R667 R82
R82 R669
R669 R674
C C
B B
A A
R674
+3.3V_DELAY
CLK_VGA_27M_SS17
CLK_VGA_27M_NSS17
CFG2
CFG3
GPIO13 GPIO12 GPIO11
GPIO9
X
0
X
001
X
010
X
100
10K_DIS
10K_DIS
RAM_CFG0
10K_NC
10K_NC
RAM_CFG1 RAM_CFG2
10K_NC
10K_NC
RAM_CFG3
10K_DIS
10K_DIS
RAM_TYPE_CFG0
10K_NC
10K_NC
RAM_TYPE_CFG1
10K_DIS
10K_DIS
RAM_TYPE_CFG2
10K_DIS
10K_DIS
RAM_TYPE_CFG3
10K_DIS
10K_DIS
R651
R651
10K_DIS
10K_DIS
R661
R661
10K_NC
10K_NC
R650
R650
10K_NC
10K_NC
R662
R662
10K_NC
10K_NC
R645
R645
10K_NC
10K_NC
R660
R660
10K_NC
10K_NC
R646
R646
10K_NC
10K_NC
R649
R649
10K_NC
10K_NC
R58
R58
10K_DIS
10K_DIS
R148
R148
10K_DIS
10K_DIS
R61
R61
R666 10K_NCR666 10K_NC
1 2
GPIO_23_CLKREQB
DRIVES LOW
DURING RESET
GFX_CORE_CNTRL50
R119 10K_DISR119 10K_DIS
1 2
OSC_SPREAD22
R713 100/F_DISR713 100/F_DIS
OSC_OUT22
GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6
HDMI_HD_EN
GPIO10
R714 120/F_DISR714 120/F_DIS
CLK_VGA_27M_NSS_R
12
50
50
CFG0
CFG1
00
RAM_
RAM_ TYPE_CFG3
11 1110 1
RAM_
TYPE_CFG2
TYPE_CFG1
1
1
01 0110
0111
VRAM SIZE
VRAM TYPE
ATI_VGAHSYNC GFX_CLKREQ#
TEMP_FAIL#
TEMP_FAIL#
12
Y3
21
27MHZ_NCY327MHZ_NC
R147 1M_NCR147 1M_NC
C797
C797 18P_NC
18P_NC
R643 0_NCR643 0_NC
1 2
R658 0_NCR658 0_NC
1 2
R709 0_DISR709 0_DIS
1 2
R706 0_NCR706 0_NC
1 2
R699 0_NCR699 0_NC
1 2
12
C778
C778 18P_NC
18P_NC
50
50
ATI_PANEL_BKEN31
R665 0_DISR665 0_DIS
1 2
R663 0_NCR663 0_NC
1 2
499R/F_DIS
499R/F_DIS
249R_DIS
249R_DIS
R719
R719
+1.8V_RUN
R99
R99
R95
R95
CLK_VGA_27M_SS_R
CLK_VGA_27M_SS_R
12
R652
R652
8/15: The strap on VIP[3] is for enabling HD Audio on M86.
RAM_ TYPE_CFG0
1
10K_NC
10K_NC
CLK_VGA_27M_SS_R
THERMAL_INT#22
TEMP_FAIL#20
PLACE VREF DIVIDER AND CAP CLOSE TO ASIC
C94
C94
100nF_DIS
100nF_DIS
R652
R652 10K_NC
10K_NC
5
+3.3V_DELAY
R664 0_DISR664 0_DIS
11
TEMP_FAIL#
BB_ENA20
4
10K_NC
10K_NC
R104
R104
10K_NC
10K_NC
R103
R103
10K_NC
10K_NC
R110
R110
10K_DIS
10K_DIS
R111
R111
10K_NC
10K_NC
R93
R93
10K_NC
10K_NC
R98
R98
10K_NC
10K_NC
R97
R97
10K_NC
10K_NC
R94
R94
10K_NC
10K_NC
R88
R88
10K_NC
10K_NC
R79
R79
10K_NC
10K_NC
R74
R74
RAM_TYPE_CFG0 RAM_TYPE_CFG1 RAM_TYPE_CFG2 RAM_TYPE_CFG3
ATI_PANEL_BKEN_R
1 2
R647 0_DISR647 0_DIS
GFX_CLKREQ#
R57
R57
1K_DIS
1K_DIS
+DPLL_PVDD
+PCIE_PVDD
XTAIN XTAOUT
+DPLL_VDDC
VGA_THERMDN22 VGA_THERMDP22
4
HDMI_HD_EN RAM_CFG3 GPIO10 RAM_CFG0 RAM_CFG1 RAM_CFG2
T95 PAD
T95 PAD
T4 PADT4T4 PAD
T5 PADT5T5 PAD
T8 PADT8T8 PAD T6 PADT6T6 PAD T9 PADT9T9 PAD T12 PAD
T12 PAD T11 PAD
T11 PAD T7 PADT7T7 PAD T10 PAD
T10 PAD T96 PAD
T96 PAD T97 PAD
T97 PAD T99 PAD
T99 PAD T98 PAD
T98 PAD
+MPVDD
VIP_0 VIP_1 VIP_2 VIP_3 VIP_4 VIP_5 VIP_6 VIP_7
VHAD0
PSYNC DVALID
GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6
T95
T95
T4
T5
T8 T6 T9 T12
T12 T11
T11 T7 T10
T10 T96
T96 T97
T97 T99
T99 T98
T98
U43B
U43B
AM12
VIP_0
AL12
VIP_1
AJ12
VIP_2
AH12
VIP_3
AM10
VIP_4
AL10
VIP_5
AJ10
VIP_6
AH10
VIP_7
AM9
VHAD_0
AL9
VHAD_1
AJ9
VPHCTL
AL7
VPCLK0
AK7
VIPCLK
AM7
PSYNC
AJ7
DVALID
AK6
SDA
AM6
SCL
AN8
DVPCNTL__MVP_0
AP8
DVPCNTL__MVP_1
AG1
DVPCNTL_0
AH3
DVPCNTL_1
AH2
DVPCNTL_2
AH1
DVPCLK
AJ3
DVPDATA_0
AJ2
DVPDATA_1
AJ1
DVPDATA_2
AK2
DVPDATA_3
AK1
DVPDATA_4
AL3
DVPDATA_5
AL2
DVPDATA_6
AL1
DVPDATA_7
AM3
DVPDATA_8
AM2
DVPDATA_9
AN2
DVPDATA_10
AP3
DVPDATA_11
AR3
DVPDATA_12
AN4
DVPDATA_13
AR4
DVPDATA_14
AP4
DVPDATA_15
AN5
DVPDATA_16
AR5
DVPDATA_17
AP5
DVPDATA_18
AP6
DVPDATA_19
AR6
DVPDATA_20
AN7
DVPDATA_21
AP7
DVPDATA_22
AR7
DVPDATA_23
AG2
GPIO_0
AF2
GPIO_1
AF1
GPIO_2
AE3
GPIO_3
AE2
GPIO_4
AE1
GPIO_5
AD3
GPIO_6
AD2
GPIO_7_BLON
AD1
GPIO_8_ROMSO
AD5
GPIO_9_ROMSI
AD4
GPIO_10_ROMSCK
AC3
GPIO_11
AC2
GPIO_12
AC1
GPIO_13
AB3
GPIO_14_HPD2
AB2
GPIO_15_PWRCNTL_0
AB1
GPIO_16_SSIN
AF5
GPIO_17_THERMAL_INT
AF4
GPIO_18_HPD3
AG4
GPIO_19_CTF
AG3
GPIO_20_PWRCNTL_1
AD9
GPIO_21_BBEN
AD8
GPIO_22_ROMCSB
AD7
GPIO_23_CLKREQB
AB4
GPIO_24_JMODE
AB6
GPIO_25_TDI
AB7
GPIO_26_TCK
AB9
GPIO_27_TMS
AA9
GPIO_28_TDO
AF8
GEN_A
AF7
GEN_B
AG5
GEN_C
AP9
GEN_D_HPD4
AR9
GEN_E
AP13
GEN_F
AR13
GEN_G
AD12
VREFG
AR20
DPLL_PVDD
AP20
DPLL_PVSS
AM35
PCIE_PVDD
A14
MPVDD
B15
MPVSS
AR33
XTALIN
AP33
XTALOUT
AG19
DPLL_VDDC
AG21
TS_FDO
AK4
DMINUS
AM4
DPLUS
M86-LP_DIS
M86-LP_DIS
VIP / I2C
VIP / I2C
MULTI_GFX
MULTI_GFX EXTERNAL
EXTERNAL TMDS
TMDS
GENERAL
GENERAL PURPOSE
PURPOSE I/O
I/O
PLL
PLL CLOCKS
CLOCKS
THERMAL
THERMAL
PART 2 OF 7
PART 2 OF 7
INTEGRATED
INTEGRATED TMDS/DP
TMDS/DP
DAC1
DAC1
DAC2
DAC2
DDC
DDC DP AUX
DP AUX
DDC3DATA_DP3_AUXN
DDC3CLK_DP3_AUXP
DDC4DATA_DP4_AUXN
DDC4CLK_DP4_AUXP
TXCAM_DPA0P TXCAP_DPA0N
TX0M_DPA1P TX0P_DPA1N
TX1M_DPA2P TX1P_DPA2N
TX2M_DPA3P TX2P_DPA3N
TXCBM_DPB0P TXCBP_DPB0N
TX3M_DPB1P TX3P_DPB1N
TX4M_DPB2P TX4P_DPB2N
TX5M_DPB3P TX5P_DPB3N
DPA_PVDD DPA_PVSS
DPB_PVDD DPB_PVSS
DPB_VDDR_1 DPB_VDDR_2 DPA_VDDR_3 DPA_VDDR_4
DPB_VSSR_1 DPB_VSSR_2 DPB_VSSR_3 DPB_VSSR_4 DPB_VSSR_6 DPA_VSSR_5 DPA_VSSR_7 DPA_VSSR_8 DPA_VSSR_9
DPA_VSSR_10
DP_CALR NC_TPVDDC NC_TPVSSC
HPD1
HSYNC VSYNC
RSET AVDD
AVSSQ
VDD1DI VSS1DI
COMP
V2SYNC
H2SYNC
A2VDD
A2VDDQ
A2VSSQ
VDD2DI VSS2DI
R2SET
DDC1DATA
DDC1CLK
DDC2DATA
DDC2CLK
3
AN9 AN10
AR10 AP10
AR11 AP11
AR12 AP12
AR14 AP14
AR15 AP15
AR16 AP16
AR17 AP17
AM14 AL14
AH17 AG17
AN19 AN20 AP19 AR19
AN18 AP18 AR18 AN16 AN17 AN15 AN11 AN12 AN13 AN14
AG15 AH18 AG18 AG6
AR31
R
AP31
RB
AR30
G
AP30
GB
AR29
B
AP29
BB
AN29 AN30
AN31 AR32 AP32 AR28
AP28 AM19
R2
AL19
R2B
AM18
G2
AL18
G2B
AM17
B2
AL17
B2B
AK19
C
AK18
Y
AK17 AL15
AM15 AM21 AL21 AK21 AH22
AG22 AJ21 AM29
AL29 AJ15
AH15 AJ5
AJ4 AH14
AG14
3
+TPVDD
+DPB_VDDR +DPA_VDDR
150/F_DISR112 150/F_DISR112
PLACE OR RESISTORS CLOSE TO ASIC
R166
R166
R205 715/F_DISR205 715/F_DIS
R701 0_DISR701 0_DIS
R700 0_DISR700 0_DIS
R694 0_DISR694 0_DIS
12
499/F_DIS
499/F_DIS
+AVDD
+VDD1DI
12
12
12
12
ATI_VGAHSYNC
+A2VDD +A2VDDQ
+VDD2DI
ATI_LCD_DDCDAT 26 ATI_LCD_DDCCLK 26
ATI_HDMI_SDA 25 ATI_HDMI_SCL 25
ATI_CRT_DAT_DDC 27 ATI_CRT_CLK_DDC 27
ATI_HDMI_CLK- 25 ATI_HDMI_CLK+ 25
ATI_HDMI_TX0-_R 25 ATI_HDMI_TX0+_R 25
ATI_HDMI_TX1-_R 25 ATI_HDMI_TX1+_R 25
ATI_HDMI_TX2-_R 25 ATI_HDMI_TX2+_R 25
ATI_VGAHSYNC 27 ATI_VGAVSYNC 27
ATI_VGA_RED
ATI_VGA_GRN
ATI_VGA_BLU
LVDS
HDMI
CRT
2
HDMI CONN
ATI_VGA_RED 27
ATI_VGA_GRN 27
ATI_VGA_BLU 27
R695
R695
ATI_LCD_DDCDAT ATI_LCD_DDCCLK
2
ATI_VGA_BLU ATI_VGA_GRN ATI_VGA_RED
R698
R698 150/F_DIS
150/F_DIS
R696
R696 150/F_DIS
150/F_DIS
R695
R695 150/F_DIS
150/F_DIS
R698
R698
R696
R696
R141 2.2K_DISR141 2.2K_DIS R165 2.2K_DISR165 2.2K_DIS
1
+3.3V_DELAY
R135
R135 10K_DIS
10K_DIS
MMST3904-7-F_DIS
MMST3904-7-F_DIS
1 3
12 12
R90
R90 10K_DIS
10K_DIS
Q83
Q83
2
Q82
Q82
2
MMST3904-7-F_DIS
MMST3904-7-F_DIS
1 3
R85
R85 10K_DIS
10K_DIS
DIS only
Layout Note: Place 150 ohm termination resistors close to ATI CHIP.
+3.3V_DELAY
QUANTA
QUANTA
QUANTA COMPUTER
COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
COMPUTER
VGA-G86GLM (VIDEO)
VGA-G86GLM (VIDEO)
VGA-G86GLM (VIDEO)
GM3 2B
GM3 2B
GM3 2B
1
ATI_HDMI_DET 25
of
of
of
19 62Monday, March 24, 2008
19 62Monday, March 24, 2008
19 62Monday, March 24, 2008
Loading...
+ 43 hidden pages