Dell 1720 Schematics

A

B

C

D

E

Compal Model Name:

PCB NO:

BOM P/N:

KML60

LA-4671P R03(X02)

46161631L01 (DIS) 46161631L02 (UMA)

1 1

Function Field: @

UMA@ VGA@ CONN@ TPM@

unpop UMA component discrete component ME connector TPM component

Half Penny Bridge 17"

2 2

Compal Confidential

6FKHPDWLF'RFXPHQW

Cantiga + ICH9

3 3

2009 / 2 / 19

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

http://laptop-motherboard-schematic.blogspot.com/

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Rev:1.0(A00)

Compal Secret Data

2007/1/15 2008/6/05

C

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

Cover Sheet

LA-4671P

1.0

153Friday, February 20, 2009

E

153Friday, February 20, 2009

1.0

of

A

B

C

D

E

Compal confidential

Half Penny Bridge17

File Name : LA-4671P

ZZZ1

Penryn -4MB (Socket P)

PCB

1 1

CRT

+CRT_VCC

LVDS Panel Interface

+LCDVDD +3VS INVPWR_B+

GDDR3 VRAM x 4

+1.8VS

2 2

P.16

P.34

P.16

+1.8VS

+VGA_CORE

+1.1V_GFX_PCIE

+3VS

Thermal Sensor ADT7421ARMZ

+3VS

Fan conn

+5VS

nVidia NB9P-GE2

P.30,31,32,33

P.4

PCI-E BUS

uFCPGA-478 CPU

+CPU_CORE

+VCCP

+1.5VS

H_A#(3..35)

H_D#(0..63)

P.4,5,6

Intel Cantiga MCH

+3VS_DAC_CRT

+3VS_DAC_BG

+1.05VS_DPLLA

+1.05VS_DPLLB

+VCCP

+1.8V_TXLVDS

DMI X4

1329pin BGA

P.7,8,9,10,11,12

Intel ICH9-M

+RTCVCC

+1.5VS

+VCCP

+3VALW

P.17,18,19,20

FSB

667/800MHz 1.05V

676pin BGA

C-Link

DDR2 667/800MHz 1.8V

Dual Channel

USB2.0

Azalia

SATA 0

SATA 1

DDR2-SO-DIMM X2

BANK 0, 1, 2, 3

+1.8V

+0.9VS

P.13,14

USB conn x 6

+5VALW

FingerPrinter

+3VS

Felica

+5VS

BT Conn

+3VS

Camera

+5VS +3VS

P.23

P.28

CK505

Clock Generator ICS9LPRS387

+1.05VS_CK505

+3VS_CK505

Mic

TSSOP-64

P.15

CardBus Controller O2MICRO

OZ888GS0L1N

3 3

+1.8VS_CB

+3VS_PHY

P.29

10/100/1000 LAN REALTEK

RTL8111DL

P.21

Mini-Card-1 (WLAN)

+3VS+LAN_IO

P.23 P.25

Express Card

+1.5VS

+3VS+1.5VS

Mini-Card

+1.5VS +3VS

Express Card

+1.5VS+3VS

P.23

P.25

RJ45/11 CONN

1394 Media Card

P.28 P.29

+3VS_CR

P.21

Power On/Off CKT.

P.27

4 4

Mini-Card-2 (Debug Port)

Touch Pad CONN. Int.KBD

P.23

+5VS

+3VALW

+EC_AVCC

LPC BUS

ENE KB926

P.26

BIOS(System/EC)

+3VALW

TPM Module CONN

+3VS

P.26P.27P.27

P.27

Audio CODEC & Audio Jack

IDT 92HD81B1X5NLGXB1X8

+3VS +5VS

SATA HDD Connector

+5VS

P.22

CDROM Conn.

+5VS

P.22

P.24

DC/DC Interface CKT.

+5VS

Power Circuit DC/DC RTC CKT.

P.37

P.39~47

A

P.18

Security Classification

Issued Date

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

http://laptop-motherboard-schematic.blogspot.com/

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/1/15 2008/6/05

Compal Secret Data

Deciphered Date

D

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

Block diagram

LA-4671P

E

253Friday, February 20, 2009

of

1.0

A

Voltage Rails

State

S0

S1

S3

S5 S4/AC

S5 S4/ Battery only

S5 S4/AC & Battery don't exist

1 1

ICH9-M

O MEANS ON X MEANS OFF

power plane

USB PORT#

0

1

2

3

4

5

+B

O

X

JUSBP1

CAMERA

JUSBP3

Felica

Blue Tooth

Finger Printer

+5VS

+3VS

+1.5VS

+0.9V

+VCCP

+5VALW

+3VALW

O

X

+1.8V

O

XX

X

+CPU_CORE

+VGA_CORE

+2.5VS

+1.8VS

+1.2VS

+0.9VGA

OO

X

XX X

DESTINATION

Symbol Note :

: means Digital Ground

: means Analog Ground

@ : means just reserve , no build DEBUG@ : means just reserve for debug.

Board ID Table for AD channel

Vcc 3.3V +/- 5%

Board ID

0 1 2 3 4 5 6 7 NC

PCI EXPRESS

Lane 1

Lane 2

Lane 3

Lane 4

Lane 5

Lane 6

100K +/- 5%Ra / Rc

Rb / Rd V min

115K +/-1% 154K +/-1% 215K +/-1% 316K +/-1% 560K +/-1%

NC NC

DESTINATION

NA

GLAN RTL8111DL

MINI CARD WLAN

EXPRESS CARD

CARD READER OZ888

NA

SMBUS Control Table

BOARD ID Table

Board ID

0 1 2 3 4 5 6 7

AD_BID

1.6613 V

1.8857 V 2.0008 V 2.1173 V

2.1261 V

2.3948 V

2.6519 V 2.8 V 2.9488 V

PCB Revision

0.1

0.2

V typ

AD_BID

1.7651 V 1.8706 V

2.2524 V

2.5067 V

V

AD_BID

2.38 V

2.6447 V

max

SATA

Lane 0

Lane 1

Lane 4

Lane 5 NA

I2C / SMBUS ADDRESSING

'(9,&(

''562',00

''562',00

&/2&.*(1(5$725(;7

SOURCE

INVERTER BATT EEPROM

SERIAL SENSOR

THERMAL

(CPU)

DESTINATION

HDD

ODD

NA

+(;

$

'

SODIMM CLK CHIP

$''5(66



$



MINI CARD

LCD

6

7

9

11

JMINI2-WLAN

Express card

JUSBP38

JMINI1-WWAN

JUSBP410

NA

SMB_EC_CK1 SMB_EC_DA1

SMB_EC_CK2 SMB_EC_DA2

SMB_CK_CLK1 SMB_CK_DAT1 ICH9

LCD_CLK LCD_DAT

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONIC S, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONIC S, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

http://laptop-motherboard-schematic.blogspot.com/

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

2005/03/10 2008/6/05

KB926

Cantiga

Compal Secret Data

Deciphered Date

X

VV

X

XX

X

XX

V

X

XX

X

VVV

XX

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

LA-4671P

XX X

X

Notes List

X

V

353Friday, February 20, 2009

of

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5

D D

CONN@

H_A#[3..16]7

H_ADSTB#07

H_REQ#07 H_REQ#17 H_REQ#27 H_REQ#37 H_REQ#47

C C

B B

A A

H_A#[17..35]7

H_ADSTB#17

H_A20M#18 H_FERR#18 H_IGNNE#18

H_STPCLK#18 H_INTR18 H_NMI18 H_SMI#18

+VCCP

B

E

H_PROCHOT# OCP #

H_IERR#

E

3 1

Q2

@

Q2

@

MMBT3904_SOT23

+VCCP

12

@

R17

R17 56_0402_5%

56_0402_5%

2

C

R18

R18 56_0402_5%

56_0402_5%

1 2

5

H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_ADSTB#0

H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4

H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35 H_ADSTB#1

H_A20M# H_FERR# H_IGNNE#

H_STPCLK# H_INTR H_NMI H_SMI#

CONN@

JCPU1A

J4 L5 L4

K5

M3

N2

J1

N3 P5 P2

L2

P4 P1 R1

M1

K3 H2 K2

J3 L1

Y2 U5 R3

W6

U4 Y5 U1 R4 T5

T3 W2 W5

Y4

U2

V4 W3

AA4 AB2 AA3

V1

A6

A5

C4

D5

C6

B4

A3

M4

N5

T2

V3

B2

D2

D22

D3

F6

Penryn

OCP# 19

A[3]# A[4]# A[5]# A[6]# A[7]# A[8]# A[9]# A[10]# A[11]# A[12]# A[13]# A[14]# A[15]# A[16]# ADSTB[0]#

REQ[0]# REQ[1]# REQ[2]# REQ[3]# REQ[4]#

A[17]# A[18]# A[19]# A[20]# A[21]# A[22]# A[23]# A[24]# A[25]# A[26]# A[27]# A[28]# A[29]# A[30]# A[31]# A[32]# A[33]# A[34]# A[35]# ADSTB[1]#

A20M# FERR# IGNNE#

STPCLK# LINT0 LINT1 SMI#

RSVD[01] RSVD[02] RSVD[03] RSVD[04] RSVD[05] RSVD[06] RSVD[07] RSVD[08] RSVD[09]

ADDR GROUP_0

ADDR GROUP_1

THERMAL

ICH

THERMTRIP#

RESERVED

ADS# BNR#

BPRI#

DEFER#

DRDY# DBSY#

BR0#

IERR#

INIT#

LOCK#

CONTROL

RESET#

RS[0]# RS[1]# RS[2]#

TRDY#

HIT#

HITM#

BPM[0]# BPM[1]# BPM[2]# BPM[3]#

PRDY# PREQ#

TCK

TDO TMS

TRST#

DBR#

XDP/ITP SIGNALS

PROCHOT#

THERMDA THERMDC

H CLK

BCLK[0] BCLK[1]

H1 E2 G5

H5 F21 E1

F1

D20 B3

H4

C1 F3 F4 G3 G2

G6 E4

AD4 AD3 AD1 AC4 AC2 AC1 AC5 AA6

TDI

AB3 AB5 AB6 C20

D21 A24 B25

C7

A22 A21

4

H_ADS# H_BNR# H_BPRI#

H_DEFER# H_DRDY# H_DBSY#

H_BR0#

H_IERR# H_INIT#

H_LOCK#

H_RESET# H_RS#0 H_RS#1 H_RS#2 H_TRDY#

H_HIT# H_HITM#

XDP_BPM#0 XDP_BPM#1 XDP_BPM#2 XDP_BPM#3 XDP_BPM#4 XDP_BPM#5 XDP_TCK XDP_TDI XDP_TDO XDP_TMS XDP_TRST# XDP_DBRESET#

H_PROCHOT#

H_THERMDA_R H_THERMDC_R H_THERMDC

H_THERMTRIP#

CLK_CPU_BCLK CLK_CPU_BCLK#

http://laptop-motherboard-schematic.blogspot.com/

4

H_ADS# 7 H_BNR# 7 H_BPRI# 7

H_DEFER# 7 H_DRDY# 7 H_DBSY# 7

H_BR0# 7

H_INIT# 18

H_LOCK# 7

H_RESET# 7 H_RS#0 7 H_RS#1 7 H_RS#2 7 H_TRDY# 7

H_HIT# 7 H_HITM# 7

T81T81 T82T82 T79T79 T45T45 T80T80 T83T83

T84T84

XDP_DBRESET# 19

R146 68_0402_1%

R57 100_0402_5%R57 100_0402_5% R62 100_0402_5%R62 100_0402_5%

H_THERMTRIP# 7,18

CLK_CPU_BCLK 15 CLK_CPU_BCLK# 15

12

1 2 1 2

H_THERMDA, H_THERMDC routing together, Trace width / Spacing = 10 / 10 mil

+VCCP

H_THERMDA

Security Classification

Issued Date

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

C5

1 2

+3VS

FAN Control circuit

EN_DFAN126

FAN_SPEED126

4.7P_0402_50V8C~D

Compal Secret Data

2006/02/13 2008/6/05

3

Compal Secret Data

Deciphered Date

+3VS

1

C13

2

0.1U_0402_16V4Z

2200P_0402_50V7K

R16

1 2

10K_0402_5%

2

Thermal Sensor EMC1402-1-ACZL-TR

U2

1

H_THERMDA

H_THERMDC

L_THERM#

EN_DFAN1

+3VS

C94

2

12

R61

2.2K_0402_5%~D

2

1

VDD

2

D+

3

D-

THERM#4GND

EMC1402-2-ACZL-TR MSOP 8P

Address:100_1100

10U_1206_16V4Z~N

1000P_0402_50V7K~N

FAN1_POWER

1

D64

@ D64

@

DAN217_SC59-3

2

3

1

+VCCP

XDP_TDI

XDP_TMS

XDP_TRST#

XDP_TCK

R5 54.9_0402_1%R5 54.9_0402_1%

1 2

R4 54.9_0402_1%R4 54.9_0402_1%

1 2

R11 54.9_0402_1%R11 54.9_0402_1%

1 2

R35 54.9_0402_1%R35 54.9_0402_1%

1 2

This shall place near CPU

EC_SMB_CK2

8

SCLK

SDATA

ALERT#

C76

C88

+3VS

Title

Size Document Number Rev

Custom

Date: Sheet

EC_SMB_DA2

7

6

5

12

+5VS

1 2

12

40mil

LA-4671P

C77 10U_1206_16V 4Z~NC77 10U_1206_16V 4Z~N

U3

1

VEN

2

VIN

3

VO

4

VSET

RT9027BPS SO 8P

JFAN1

1

2

3

4

GND

5

GND

ACES_85205-03001

CONN@

FAN1

Compal Electronics, Inc.

Penryn(1/3)-AGTL+/ITP-XDP

GND GND GND GND

1

8 7 6 5

EC_SMB_CK2 26,30

EC_SMB_DA2 26,30

453Friday, February 20, 2009

of

1.0

5

4

3

2

1

CONN@

H_D#[0..15]7

D D

H_DSTBN#07 H_DSTBP#07 H_DINV#07 H_D#[16..31]7

C C

R52 1K_0402_5%@R52 1K_0402_5%@ R22 1K_0402_5%@R22 1K_0402_5%@

H_DSTBN#17 H_DSTBP#17 H_DINV#17

1 2 1 2

CPU_BSEL015 CPU_BSEL115 CPU_BSEL215

T2T2 T3T3 T4T4 T5T5 T6T6

H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_DSTBN#0 H_DSTBP#0 H_DINV#0

H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_DSTBN#1 H_DSTBP#1 H_DINV#1

V_CPU_GTLREF

TEST1 TEST2 TEST3 TEST4 TEST5 TEST6 TEST7 CPU_BSEL0 CPU_BSEL1 CPU_BSEL2

layout note: Rout H_DPRSTP# from ICH9 to IMVP6 then to GMCH & CPU

layout note: Route TEST3 & TEST5 traces on ground referenced layer to the TPs

CPU_BSEL CPU_BSEL2 CPU_BSEL1

B B

166

200

01

0

1

266 0 0 0

CONN@

JCPU1B

E22

D[0]#

F24

D[1]#

E26

D[2]#

G22

D[3]#

F23

D[4]#

G25

D[5]#

E25

D[6]#

E23

D[7]#

K24

D[8]#

G24

D[9]#

J24

D[10]#

J23

D[11]#

H22

D[12]#

F26

D[13]#

K22

D[14]#

H23

D[15]#

J26

DSTBN[0]#

H26

DSTBP[0]#

H25

DINV[0]#

N22

D[16]#

K25

D[17]#

P26

D[18]#

R23

D[19]#

L23

D[20]#

M24

D[21]#

L22

D[22]#

M23

D[23]#

P25

D[24]#

P23

D[25]#

P22

D[26]#

T24

D[27]#

R24

D[28]#

L25

D[29]#

T25

D[30]#

N25

D[31]#

L26

DSTBN[1]#

M26

DSTBP[1]#

N24

DINV[1]#

AD26

GTLREF

C23

TEST1

D25

TEST2

C24

TEST3

AF26

TEST4

AF1

TEST5

A26

TEST6

C3

TEST7

B22

BSEL[0]

B23

BSEL[1]

C21

BSEL[2]

Penryn

CPU_BSEL0

H_D#32

Y22

MISC

DATA GRP 0

DATA GRP 1

D[32]# D[33]# D[34]# D[35]# D[36]# D[37]# D[38]# D[39]# D[40]#

DATA GRP 2DATA GRP 3

D[41]# D[42]# D[43]# D[44]# D[45]# D[46]#

D[47]# DSTBN[2]# DSTBP[2]#

DINV[2]#

D[48]#

D[49]#

D[50]#

D[51]#

D[52]#

D[53]#

D[54]#

D[55]#

D[56]#

D[57]#

D[58]#

D[59]#

D[60]#

D[61]#

D[62]#

D[63]# DSTBN[3]# DSTBP[3]#

DINV[3]#

COMP[0] COMP[1] COMP[2] COMP[3]

DPRSTP#

DPSLP#

DPWR#

PWRGOOD

SLP# PSI#

AB24 V24 V26 V23 T22 U25 U23 Y25 W22 Y23 W24 W25 AA23 AA24 AB25 Y26 AA26 U22

AE24 AD24 AA21 AB22 AB21 AC26 AD20 AE22 AF23 AC25 AE21 AD21 AC22 AD23 AF22 AC23 AE25 AF24 AC20

R26 U26 AA1 Y1

E5 B5 D24 D6 D7 AE6

H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_DSTBN#2 H_DSTBP#2 H_DINV#2

H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63 H_DSTBN#3 H_DSTBP#3 H_DINV#3

COMP0 COMP1 COMP2 COMP3

H_DPRSTP# H_DPSLP# H_DPWR# H_PWRGOOD H_CPUSLP# H_PSI#

1

H_D#[32..47] 7

H_DSTBN#2 7 H_DSTBP#2 7 H_DINV#2 7 H_D#[48..63] 7

H_DSTBN#3 7 H_DSTBP#3 7 H_DINV#3 7

H_DPRSTP# 7,18,46 H_DPSLP# 18 H_DPWR# 7 H_PWRGOOD 18 H_CPUSLP# 7 H_PSI# 46

R23

R24

R25

12

27.4_0402_1%

R25

12

54.9_0402_1%

27.4_0402_1%

12

54.9_0402_1%

Resistor placed within

0.5" of CPU pin.Trace should be at least 25 mils away from any other toggling signal. COMP[0,2] trace width is 18 mils. COMP[1,3] trace width is 4

0

+VCCP

V_CPU_GTLREF

12

R27

R27 1K_0402_1%

1K_0402_1%

12

R29

R29 2K_0402_1%

2K_0402_1%

For 6 layer

Z=27.4 ohm

VCCSENSE, VSSSENSE/ 14mils (MS), 16mils (SL) width, 7mils space, 25mils space to other signals Mismatch =25mils.

+CPU_CORE +CPU_CORE

R26

12

CONN@

JCPU1C

A7

VCC[001]

VCC[068]

VCC[002]

VCC[069]

VCC[003]

VCC[070]

VCC[004]

VCC[071]

VCC[005]

VCC[072]

VCC[006]

VCC[073]

VCC[007]

VCC[074]

VCC[008]

VCC[075]

VCC[009]

VCC[076]

VCC[010]

VCC[077]

VCC[011]

VCC[078]

VCC[012]

VCC[079]

VCC[013]

VCC[080]

VCC[014]

VCC[081]

VCC[015]

VCC[082]

VCC[016]

VCC[083]

VCC[017]

VCC[084]

VCC[018]

VCC[085]

VCC[019]

VCC[086]

VCC[020]

VCC[087]

VCC[021]

VCC[088]

VCC[022]

VCC[089]

VCC[023]

VCC[090]

VCC[024]

VCC[091]

VCC[025]

VCC[092]

VCC[026]

VCC[093]

VCC[027]

VCC[094]

VCC[028]

VCC[095]

VCC[029]

VCC[096]

VCC[030]

VCC[097]

VCC[031]

VCC[098]

VCC[032]

VCC[099]

VCC[033]

VCC[100] VCC[034] VCC[035]

VCCP[01]

VCC[036]

VCCP[02]

VCC[037]

VCCP[03]

VCC[038]

VCCP[04]

VCC[039]

VCCP[05]

VCC[040]

VCCP[06]

VCC[041]

VCCP[07]

VCC[042]

VCCP[08]

VCC[043]

VCCP[09]

VCC[044]

VCCP[10]

VCC[045]

VCCP[11]

VCC[046]

VCCP[12]

VCC[047]

VCCP[13]

VCC[048]

VCCP[14]

VCC[049]

VCCP[15]

VCC[050]

VCCP[16] VCC[051] VCC[052]

VCCA[01] VCC[053]

VCCA[02] VCC[054] VCC[055] VCC[056] VCC[057] VCC[058] VCC[059] VCC[060] VCC[061] VCC[062] VCC[063] VCC[064]

VCCSENSE VCC[065] VCC[066] VCC[067]

VSSSENSE

Penryn

For 8 layer condition

AA10 AA12 AA13 AA15 AA17 AA18 AA20

AC10 AB10 AB12 AB14 AB15 AB17 AB18

A9 A10 A12 A13 A15 A17 A18 A20

B7

B9 B10 B12 B14 B15 B17 B18 B20

C9 C10 C12 C13 C15 C17 C18

D9 D10 D12 D14 D15 D17 D18

E7

E9 E10 E12 E13 E15 E17 E18 E20

F7

F9 F10 F12 F14 F15 F17 F18 F20 AA7 AA9

AB9

VID[0] VID[1] VID[2] VID[3] VID[4] VID[5] VID[6]

AB20 AB7 AC7 AC9 AC12 AC13 AC15 AC17 AC18 AD7 AD9 AD10 AD12 AD14 AD15 AD17 AD18 AE9 AE10 AE12 AE13 AE15 AE17 AE18 AE20 AF9 AF10 AF12 AF14 AF15 AF17 AF18 AF20

G21 V6 J6 K6 M6 J21 K21 M21 N21 N6 R21 R6 T21 T6 V21 W21

B26 C26

AD6 AF5 AE5 AF4 AE3 AF3 AE2

VCCSENSE

AF7

VSSSENSE

AE7

.

Length match within 25 mils.

CPU_VID0 46 CPU_VID1 46 CPU_VID2 46 CPU_VID3 46 CPU_VID4 46 CPU_VID5 46 CPU_VID6 46

VCCSENSE 46

VSSSENSE 46

220U_D2_4VY_R15M

+VCCP

C10

10U_0805_6.3V6M

1

2

1

2

+

C12

+1.5VS

1

C11

2

0.01U_0402_16V7K

Near pin B26

The trace width/space/other is 20/7/25.

+CPU_CORE

R28 100_0402_1%R28 100_0402_1%

1 2

R30 100_0402_1%R30 100_0402_1%

1 2

VCCSENSE

VSSSENSE

Close to CPU pin AD26 within 500mils.

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

http://laptop-motherboard-schematic.blogspot.com/

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2006/02/13 2008/6/05

Compal Secret Data

Deciphered Date

2

Close to CPU pin within 500mils.

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

Penryn(2/3)-AGTL+/ITP-XDP

LA-4671P

1

553Friday, February 20, 2009

of

1.0

5

High Frequence Decoupling

10uF 0805 X5R -> 85 degree.

D D

C C

B B

A A

CONN@

JCPU1D

A4

VSS[001]

A8

VSS[002]

A11

VSS[003]

A14

VSS[004]

A16

VSS[005]

A19

VSS[006]

A23

VSS[007]

AF2

VSS[008]

B6

VSS[009]

B8

VSS[010]

B11

VSS[011]

B13

VSS[012]

B16

VSS[013]

B19

VSS[014]

B21

VSS[015]

B24

VSS[016]

C5

VSS[017]

C8

VSS[018]

C11

VSS[019]

C14

VSS[020]

C16

VSS[021]

C19

VSS[022]

C2

VSS[023]

C22

VSS[024]

C25

VSS[025]

D1

VSS[026]

D4

VSS[027]

D8

VSS[028]

D11

VSS[029]

D13

VSS[030]

D16

VSS[031]

D19

VSS[032]

D23

VSS[033]

D26

VSS[034]

E3

VSS[035]

E6

VSS[036]

E8

VSS[037]

E11

VSS[038]

E14

VSS[039]

E16

VSS[040]

E19

VSS[041]

E21

VSS[042]

E24

VSS[043]

F5

VSS[044]

F8

VSS[045]

F11

VSS[046]

F13

VSS[047]

F16

VSS[048]

F19

VSS[049]

F2

VSS[050]

F22

VSS[051]

F25

VSS[052]

G4

VSS[053]

G1

VSS[054]

G23

VSS[055]

G26

VSS[056]

H3

VSS[057]

H6

VSS[058]

H21

VSS[059]

H24

VSS[060]

J2

VSS[061]

J5

VSS[062]

J22

VSS[063]

J25

VSS[064]

K1

VSS[065]

K4

VSS[066]

K23

VSS[067]

K26

VSS[068]

L3

VSS[069]

L6

VSS[070]

L21

VSS[071]

L24

VSS[072]

M2

VSS[073]

M5

VSS[074]

M22

VSS[075]

M25

VSS[076]

N1

VSS[077]

N4

VSS[078]

N23

VSS[079]

N26

VSS[080] VSS[081]P3VSS[162]

Penryn

VSS[082] VSS[083] VSS[084] VSS[085] VSS[086] VSS[087] VSS[088] VSS[089] VSS[090] VSS[091] VSS[092] VSS[093] VSS[094] VSS[095] VSS[096] VSS[097] VSS[098] VSS[099] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158] VSS[159] VSS[160] VSS[161]

VSS[163]

P6 P21 P24 R2 R5 R22 R25 T1 T4 T23 T26 U3 U6 U21 U24 V2 V5 V22 V25 W1 W4 W23 W26 Y3 Y6 Y21 Y24 AA2 AA5 AA8 AA11 AA14 AA16 AA19 AA22 AA25 AB1 AB4 AB8 AB11 AB13 AB16 AB19 AB23 AB26 AC3 AC6 AC8 AC11 AC14 AC16 AC19 AC21 AC24 AD2 AD5 AD8 AD11 AD13 AD16 AD19 AD22 AD25 AE1 AE4 AE8 AE11 AE14 AE16 AE19 AE23 AE26 A2 AF6 AF8 AF11 AF13 AF16 AF19 AF21 A25 AF25

.

Place these caps inside the CPU socket cavity.

( Left side on Top ).

Place these caps inside the CPU socket cavity.

( Right side on Top side).

Place these caps inside the CPU socket cavity.

( Left side on Bottom ).

Place these caps inside the CPU socket cavity.

( Right side on Bottom ).

Place these caps inside the CPU socket.

+VCCP

1

C213

0.1U_0402_10V6K

2

4

+CPU_CORE

C196

1

C209

0.1U_0402_10V6K

2

1

C204

C204 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C180

C180 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C501

C501 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C502

C502 10U_0805_6.3V6M

10U_0805_6.3V6M

2

330U_D2E_2.5VM_R9

1

+

2

C198

330U_D2E_2.5VM_R9

1

+

2

1

2

1

C205

C205 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C202

C202 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C508

C508 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C510

C510 10U_0805_6.3V6M

10U_0805_6.3V6M

2

330U_D2E_2.5VM_R9

1

C259

+

2

C212

0.1U_0402_10V6K

1

C529

C529 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C254

C254 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C514

C514 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C515

C515 10U_0805_6.3V6M

10U_0805_6.3V6M

2

330U_D2E_2.5VM_R9

Place these caps inside

1

C255

the CPU socket.

+

( Right side on Top side).( Left side on Top ).

2

1

C188

0.1U_0402_10V6K

2

3

1

C232

C232 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C190

C190 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C519

C519 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C520

C520 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C183

0.1U_0402_10V6K

2

1

C258

C258 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C203

C203 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C523

C523 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C528

C528 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C505

C505 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C200

C200 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C533

C533 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C532

C532 10U_0805_6.3V6M

10U_0805_6.3V6M

2

ESR <= 1.5m ohm

Capacitor > 880 uF

Place these inside socket cavity on L8 (North side Secondary)

1

C185

0.1U_0402_10V6K

2

1

C504

C504 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C184

C184 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C257

C257 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C199

C199 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C262

C262 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C208

C208 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

Place these caps inside the CPU socket.

1

( Left side on Top ).

C214

C214 10U_0805_6.3V6M

10U_0805_6.3V6M

2

Place these caps inside the CPU socket.

1

( Right side on Top ).

C226

C226 10U_0805_6.3V6M

10U_0805_6.3V6M

2

Security Classification

Issued Date

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

http://laptop-motherboard-schematic.blogspot.com/

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2006/02/13 2008/6/05

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

Penryn(3/3)-AGTL+/ITP-XDP

LA-4671P

1

1.0

653Friday, February 20, 2009

1.0

of

5

U4A

H_D#[0..63]5

D D

C C

H_RESET#4

H_CPUSLP#5

B B

Layout Note: H_RCOMP / H_VREF / H_SWNG

trace width and spacing is 10/20

+VCCP

12

R45

1K_0402_1%

A A

12

R46

2K_0402_1%

R46

0.1U_0402_16V4Z

H_SWNG H_RCOMP

H_RESET# H_CPUSLP#

+H_VREF

1

C391

@

2

H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63

F2

G8

F8 E6

G2

H6 H2 F6 D4 H3

M9

M11

J1 J2

N12

J6 P2 L2 R2 N9 L6

M5

J3 N2 R1 N5 N6

P13

N8 L7

N10

M3

Y3

AD14

Y6

Y10 Y12 Y14

Y7

W2

AA8

Y9

AA13

AA9 AA11 AD11 AD10 AD13 AE12

AE9

AA2

AD8

AA3

AD3

AD7 AE14

AF3

AC1

AE3

AC3 AE11

AE8

AG2

AD6

C5 E3

C12

E11

A11

B11

H_RCOMP

12

R324

24.9_0402_1%

U4A

H_D#_0 H_D#_1 H_D#_2 H_D#_3 H_D#_4 H_D#_5 H_D#_6 H_D#_7 H_D#_8 H_D#_9 H_D#_10 H_D#_11 H_D#_12 H_D#_13 H_D#_14 H_D#_15 H_D#_16 H_D#_17 H_D#_18 H_D#_19 H_D#_20 H_D#_21 H_D#_22 H_D#_23 H_D#_24 H_D#_25 H_D#_26 H_D#_27 H_D#_28 H_D#_29 H_D#_30 H_D#_31 H_D#_32 H_D#_33 H_D#_34 H_D#_35 H_D#_36 H_D#_37 H_D#_38 H_D#_39 H_D#_40 H_D#_41 H_D#_42 H_D#_43 H_D#_44 H_D#_45 H_D#_46 H_D#_47 H_D#_48 H_D#_49 H_D#_50 H_D#_51 H_D#_52 H_D#_53 H_D#_54 H_D#_55 H_D#_56 H_D#_57 H_D#_58 H_D#_59 H_D#_60 H_D#_61 H_D#_62 H_D#_63

H_SWING H_RCOMP

H_CPURST# H_CPUSLP#

H_AVREF H_DVREF

CANTIGA_1p0

+VCCP

12

221_0603_1%

12

100_0402_1%

R322

R323

HOST

H_DSTBN#_0 H_DSTBN#_1 H_DSTBN#_2 H_DSTBN#_3

H_SWNG

1

C386

2

0.1U_0402_16V4Z

H_ADSTB#_0 H_ADSTB#_1

H_BREQ#

H_DEFER#

HPLL_CLK

HPLL_CLK#

H_DPWR#

H_DRDY#

H_DINV#_0 H_DINV#_1 H_DINV#_2 H_DINV#_3

H_DSTBP#_0 H_DSTBP#_1 H_DSTBP#_2 H_DSTBP#_3

H_REQ#_0 H_REQ#_1 H_REQ#_2 H_REQ#_3 H_REQ#_4

Near B3 pinwithin 100 mils from NB

5

4

H_A#_3 H_A#_4 H_A#_5 H_A#_6 H_A#_7 H_A#_8

H_A#_9 H_A#_10 H_A#_11 H_A#_12 H_A#_13 H_A#_14 H_A#_15 H_A#_16 H_A#_17 H_A#_18 H_A#_19 H_A#_20 H_A#_21 H_A#_22 H_A#_23 H_A#_24 H_A#_25 H_A#_26 H_A#_27 H_A#_28 H_A#_29 H_A#_30 H_A#_31

H_A#_32 H_A#_33 H_A#_34 H_A#_35

H_ADS#

H_BNR# H_BPRI#

H_DBSY#

H_HIT#

H_HITM# H_LOCK# H_TRDY#

H_RS#_0

H_RS#_1

H_RS#_2

A14 C15 F16 H13 C18 M16 J13 P16 R16 N17 M13 E17 P17 F17 G20 B19 J16 E20 H16 J20 L17 A17 B17 L16 C21 J17 H20 B18 K17 B20 F21 K21 L20

H12 B16 G17 A9 F11 G12 E9 B10 AH7 AH6 J11 F9 H9 E12 H11 C9

J8 L3 Y13 Y1

L10 M7 AA5 AE6

L9 M8 AA6 AE5

B15 K13 F13 B13 B14

B6 F12 C8

H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35

H_ADS# H_ADSTB#0 H_ADSTB#1 H_BNR# H_BPRI# H_BR0# H_DEFER# H_DBSY# CLK_MCH_BCLK CLK_MCH_BCLK# H_DPWR# H_DRDY# H_HIT# H_HITM# H_LOCK# H_TRDY#

H_DINV#0 H_DINV#1 H_DINV#2 H_DINV#3

H_DSTBN#0 H_DSTBN#1 H_DSTBN#2 H_DSTBN#3

H_DSTBP#0 H_DSTBP#1 H_DSTBP#2 H_DSTBP#3

H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4

H_RS#0 H_RS#1 H_RS#2

ICH_PWROK19,26

VGATE19,26,46

H_A#[3..35] 4

+SMRCOMP_VOH

H_ADS# 4 H_ADSTB#0 4 H_ADSTB#1 4 H_BNR# 4 H_BPRI# 4 H_BR0# 4 H_DEFER# 4 H_DBSY# 4 CLK_MCH_BCLK 15 CLK_MCH_BCLK# 15 H_DPWR# 5 H_DRDY# 4 H_HIT# 4 H_HITM# 4 H_LOCK# 4 H_TRDY# 4

H_DINV#0 5 H_DINV#1 5 H_DINV#2 5 H_DINV#3 5

H_DSTBN#0 5 H_DSTBN#1 5 H_DSTBN#2 5 H_DSTBN#3 5

H_DSTBP#0 5 H_DSTBP#1 5 H_DSTBP#2 5 H_DSTBP#3 5

H_REQ#0 4 H_REQ#1 4 H_REQ#2 4 H_REQ#3 4 H_REQ#4 4

H_RS#0 4 H_RS#1 4 H_RS#2 4

PLT_RST#17,26,29,30

H_THERMTRIP#4,18

DPRSLPVR19,46

1 2

R408 0_0402_5%R408 0_0402_5%

1 2

R407 0_0402_5%@R407 0_0402_5%@

C398

2.2U_0603_6.3V4Z

C403

2.2U_0603_6.3V4Z

1

C400

2

1

C404

2

1 2

R56 0_0402_5%R56 0_0402_5%

+1.8V

0.01U_0402_16V7K

0913 Delete V_DDR_MCH_REF from POWER circuit

Layout Note: V_DDR_MCH_REF trace width and spacing is 20/20.

+V_DDR_MCH_REF13,14

http://laptop-motherboard-schematic.blogspot.com/

4

+V_DDR_MCH_REF

1

2

0.1U_0402_16V4Z

+1.8V

C121

Security Classification

Issued Date

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

12

R331

R331 1K_0402_1%

1K_0402_1%

12

R332

3.01K_0402_1%

12

R333

R333 1K_0402_1%

1K_0402_1%

PM_EXTTS#0

PM_EXTTS#1

H_DPRSTP#

PM_PWROK_R

12

R42

R42 1K_0402_1%

1K_0402_1%

12

R43

R43 1K_0402_1%

1K_0402_1%

3

R82

R82 1 2

10K_0402_5%

R83

1 2

10K_0402_5%

C141

@C141

@

1 2

0.1U_0402_16V4Z

MCH_CLKSEL015 MCH_CLKSEL115 MCH_CLKSEL215

1 2

R523 100_0402_5%~DR523 100_0402_5%~D

T8PAD T8PAD

T9PAD T9PAD

CFG59 CFG69 CFG79

T37PAD T37PAD

CFG99

T65PAD T65PAD

T40PAD T40PAD

T67PAD T67PAD

T47PAD T47PAD

T10PAD T10PAD

T66PAD T66PAD

CFG169

T68PAD T68PAD

T39PAD T39PAD

CFG199 CFG209

PM_BMBUSY#19

H_DPRSTP#5,18,46 PM_EXTTS#013 PM_EXTTS#114

3

U4B

T7T7 T11T11 T12T12 T13T13 T14T14 T15T15 T16T16 T17T17 T18T18 T19T19 T20T20 T21T21 T22T22 T24T24

T25T25 T26T26 T27T27

T28T28

T41T41 T44T44 T73T73 T74T74

+3VS

MCH_CLKSEL0 MCH_CLKSEL1 MCH_CLKSEL2

CFG5 CFG6 CFG7

CFG9

CFG12 CFG13

CFG16

CFG19 CFG20

PM_BMBUSY# H_DPRSTP# PM_EXTTS#0 PM_EXTTS#1

PM_PWROK_R

PLT_RST#_NBPLT_RST# THERMTRIP# DPRSLPVR

2006/02/13 2008/6/05

M36

RSVD1

N36

RSVD2

R33

RSVD3

T33

RSVD4

AH9

RSVD5

AH10

RSVD6

AH12

RSVD7

AH13

RSVD8

K12

RSVD9

AL34

RSVD10

AK34

RSVD11

AN35

RSVD12

AM35

RSVD13

T24

RSVD14

B31

RSVD15

B2

RSVD16

M1

RSVD17

AY21

RSVD20

BG23

RSVD22

BF23

RSVD23

BH18

RSVD24

BF18

RSVD25

T25

CFG_0

R25

CFG_1

P25

CFG_2

P20

CFG_3

P24

CFG_4

C25

CFG_5

N24

CFG_6

M24

CFG_7

E21

CFG_8

C23

CFG_9

C24

CFG_10

N21

CFG_11

P21

CFG_12

T21

CFG_13

R20

CFG_14

M20

CFG_15

L21

CFG_16

H21

CFG_17

P29

CFG_18

R28

CFG_19

T28

CFG_20

R29

PM_SYNC#

B7

PM_DPRSTP#

N33

PM_EXT_TS#_0

P32

PM_EXT_TS#_1

AT40

PWROK

AT11

RSTIN#

T20

THERMTRIP#

R32

DPRSLPVR

BG48

NC_1

BF48

NC_2

BD48

NC_3

BC48

NC_4

BH47

NC_5

BG47

NC_6

BE47

NC_7

BH46

NC_8

BF46

NC_9

BG45

NC_10

BH44

NC_11

BH43

NC_12

BH6

NC_13

BH5

NC_14

BG4

NC_15

BH3

NC_16

BF3

NC_17

BH2

NC_18

BG2

NC_19

BE2

NC_20

BG1

NC_21

BF1

NC_22

BD1

NC_23

BC1

NC_24

F1

NC_25

A47

NC_26

CANTIGA_1p0

Compal Secret Data

Deciphered Date

2

RSVD

SM_RCOMP_VOH

SM_RCOMP_VOL

DDR CLK/ CONTROL/COMPENSATION

DPLL_REF_CLK#

DPLL_REF_SSCLK

DPLL_REF_SSCLK#

CLK

CFG

DMI

PM

GRAPHICS VID

MEHDA

DDPC_CTRLDATA

NC

SDVO_CTRLDATA

MISC

2

SA_CK_0 SA_CK_1 SB_CK_0 SB_CK_1

SA_CK#_0 SA_CK#_1 SB_CK#_0 SB_CK#_1

SA_CKE_0 SA_CKE_1 SB_CKE_0 SB_CKE_1

SA_CS#_0 SA_CS#_1 SB_CS#_0 SB_CS#_1

SA_ODT_0 SA_ODT_1 SB_ODT_0 SB_ODT_1

SM_RCOMP

SM_RCOMP#

SM_VREF

SM_PWROK

SM_REXT

SM_DRAMRST#

DPLL_REF_CLK

PEG_CLK

PEG_CLK#

DMI_RXN_0 DMI_RXN_1 DMI_RXN_2 DMI_RXN_3

DMI_RXP_0 DMI_RXP_1 DMI_RXP_2 DMI_RXP_3

DMI_TXN_0 DMI_TXN_1 DMI_TXN_2 DMI_TXN_3

DMI_TXP_0 DMI_TXP_1 DMI_TXP_2 DMI_TXP_3

GFX_VID_0 GFX_VID_1 GFX_VID_2 GFX_VID_3 GFX_VID_4

GFX_VR_EN

CL_CLK

CL_DATA

CL_PWROK

CL_RST# CL_VREF

DDPC_CTRLCLK

SDVO_CTRLCLK

CLKREQ#

ICH_SYNC#

TSATN#

HDA_BCLK

HDA_RST#

HDA_SDI

HDA_SDO

HDA_SYNC

AP24 AT21 AV24 AU20

AR24 AR21 AU24 AV20

BC28 AY28 AY36 BB36

BA17 AY16 AV16 AR13

BD17 AY17 BF15 AY13

BG22 BH21

BF28 BH28

AV42 AR36 BF17 BC36

B38 A38 E41 F41

F43 E43

AE41 AE37 AE47 AH39

AE40 AE38 AE48 AH40

AE35 AE43 AE46 AH42

AD35 AE44 AF46 AH43

B33 B32 G33 F33 E33

C34

AH37 AH36 AN36 AJ35 AH34

N28 M28 G36 E36 K36 H36

B12

B28 B30 B29 C29 A28

1

M_CLK_DDR0 M_CLK_DDR1 M_CLK_DDR2 M_CLK_DDR3

M_CLK_DDR#0 M_CLK_DDR#1 M_CLK_DDR#2 M_CLK_DDR#3

DDR_CKE0_DIMMA DDR_CKE1_DIMMA DDR_CKE2_DIMMB DDR_CKE3_DIMMB

DDR_CS0_DIMMA# DDR_CS1_DIMMA# DDR_CS2_DIMMB# DDR_CS3_DIMMB#+SMRCOMP_VOL

M_ODT0 M_ODT1 M_ODT2 M_ODT3

SMRCOMP SMRCOMP#

+SMRCOMP_VOH +SMRCOMP_VOL

+V_DDR_MCH_REF

SM_REXT TP_SM_DRAMRST#

CLK_MCH_DREFCLK CLK_MCH_DREFCLK# MCH_SSCDREFCLK MCH_SSCDREFCLK#

CLK_MCH_3GPLL

CLK_MCH_3GPLL#

DMI_TXN0 DMI_TXN1 DMI_TXN2 DMI_TXN3

DMI_TXP0 DMI_TXP1 DMI_TXP2 DMI_TXP3

DMI_RXN0 DMI_RXN1 DMI_RXN2 DMI_RXN3

DMI_RXP0 DMI_RXP1 DMI_RXP2 DMI_RXP3

T30T30 T31T31 T32T32 T33T33 T34T34

T35T35

CL_CLK0 CL_DATA0 M_PWROK CL_RST# +CL_VREF

CLKREQ#_7 MCH_ICH_SYNC#

TSATN#

T99T99 T100T100 T101T101 T102T102 T103T103

Title

Cantiga(1/6)-AGTL/DMI/DDR

Size Document Number Rev

Custom

LA-4671P

Date: Sheet

M_CLK_DDR0 13 M_CLK_DDR1 13 M_CLK_DDR2 14 M_CLK_DDR3 14

M_CLK_DDR#0 13 M_CLK_DDR#1 13 M_CLK_DDR#2 14 M_CLK_DDR#3 14

DDR_CKE0_DIMMA 13 DDR_CKE1_DIMMA 13 DDR_CKE2_DIMMB 14 DDR_CKE3_DIMMB 14

DDR_CS0_DIMMA# 13 DDR_CS1_DIMMA# 13 DDR_CS2_DIMMB# 14 DDR_CS3_DIMMB# 14

M_ODT0 13 M_ODT1 13 M_ODT2 14 M_ODT3 14

R328 80.6_0402_1%

1 2

R329 80.6_0402_1%R329 80.6_0402_1%

1 2

R40 499_0402_1%R40 499_0402_1%

1 2

T29 PADT29 PAD

CLK_MCH_DREFCLK 15 CLK_MCH_DREFCLK# 15 MCH_SSCDREFCLK 15 MCH_SSCDREFCLK# 15

CLK_MCH_3GPLL 15 CLK_MCH_3GPLL# 15

DMI_TXN0 19 DMI_TXN1 19 DMI_TXN2 19 DMI_TXN3 19

DMI_TXP0 19 DMI_TXP1 19 DMI_TXP2 19 DMI_TXP3 19

DMI_RXN0 19 DMI_RXN1 19 DMI_RXN2 19 DMI_RXN3 19

DMI_RXP0 19 DMI_RXP1 19 DMI_RXP2 19 DMI_RXP3 19

CL_CLK0 19 CL_DATA0 19 M_PWROK 19 CL_RST# 19

C181

0.1U_0402_16V4Z

T36T36 T48T48 T63T63 T64T64

CLKREQ#_7 15 MCH_ICH_SYNC# 19

12

R521 56_0402_5%

Compal Electronics, Inc.

1

+1.8V

+VCCP

12

R100

R100 1K_0402_1%

1K_0402_1%

0.35V

12

1

R99

R99 511_0402_1%

511_0402_1%

2

+VCCP

753Friday, February 20, 2009

of

1.0

5

D D

DDR_A_D[0..63]13

C C

B B

DDR_A_D0 DDR_B_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63

AJ38

AJ41 AN38 AM38

AJ36

AJ40

AM44 AM42

AN43 AN44 AU40 AT38 AN41 AN39 AU44 AU42 AV39 AY44 BA40 BD43 AV41 AY43 BB41 BC40 AY37 BD38 AV37 AT36 AY38 BB38 AV36

AW36

BD13 AU11 BC11 BA12 AU13 AV13 BD12 BC12

AU10

BA11

AN10

AM11

AM5

AN12

AM13

AJ11

AJ12

BB9 BA9

AV9

BD9 AY8 BA6 AV5 AV7 AT9 AN8 AU5 AU6 AT5

AJ9 AJ8

U4D

SA_DQ_0 SA_DQ_1 SA_DQ_2 SA_DQ_3 SA_DQ_4 SA_DQ_5 SA_DQ_6 SA_DQ_7 SA_DQ_8 SA_DQ_9 SA_DQ_10 SA_DQ_11 SA_DQ_12 SA_DQ_13 SA_DQ_14 SA_DQ_15 SA_DQ_16 SA_DQ_17 SA_DQ_18 SA_DQ_19 SA_DQ_20 SA_DQ_21 SA_DQ_22 SA_DQ_23 SA_DQ_24 SA_DQ_25 SA_DQ_26 SA_DQ_27 SA_DQ_28 SA_DQ_29 SA_DQ_30 SA_DQ_31 SA_DQ_32 SA_DQ_33 SA_DQ_34 SA_DQ_35 SA_DQ_36 SA_DQ_37 SA_DQ_38 SA_DQ_39 SA_DQ_40 SA_DQ_41 SA_DQ_42 SA_DQ_43 SA_DQ_44 SA_DQ_45 SA_DQ_46 SA_DQ_47 SA_DQ_48 SA_DQ_49 SA_DQ_50 SA_DQ_51 SA_DQ_52 SA_DQ_53 SA_DQ_54 SA_DQ_55 SA_DQ_56 SA_DQ_57 SA_DQ_58 SA_DQ_59 SA_DQ_60 SA_DQ_61 SA_DQ_62 SA_DQ_63

CANTIGA_1p0

DDR SYSTEM MEMORY A

SA_BS_0 SA_BS_1 SA_BS_2

SA_RAS# SA_CAS#

SA_WE#

SA_DM_0 SA_DM_1 SA_DM_2 SA_DM_3 SA_DM_4 SA_DM_5 SA_DM_6 SA_DM_7

SA_DQS_0 SA_DQS_1 SA_DQS_2 SA_DQS_3 SA_DQS_4 SA_DQS_5 SA_DQS_6

SA_DQS_7 SA_DQS#_0 SA_DQS#_1 SA_DQS#_2 SA_DQS#_3 SA_DQS#_4 SA_DQS#_5 SA_DQS#_6 SA_DQS#_7

SA_MA_0 SA_MA_1 SA_MA_2 SA_MA_3 SA_MA_4 SA_MA_5 SA_MA_6 SA_MA_7 SA_MA_8

SA_MA_9 SA_MA_10 SA_MA_11 SA_MA_12 SA_MA_13 SA_MA_14

4

DDR_A_BS#0

BD21 BG18 AT25

BB20 BD20 AY20

AM37 AT41 AY41 AU39 BB12 AY6 AT7 AJ5

AJ44 AT44 BA43 BC37 AW12 BC8 AU8 AM7 AJ43 AT43 BA44 BD37 AY12 BD8 AU9 AM8

BA21 BC24 BG24 BH24 BG25 BA24 BD24 BG27 BF25 AW24 BC21 BG26 BH26 BH17 AY25

DDR_A_BS#1 DDR_A_BS#2

DDR_A_RAS# DDR_A_CAS# DDR_A_WE#

DDR_A_DM0 DDR_A_DM1 DDR_A_DM2 DDR_A_DM3 DDR_A_DM4 DDR_A_DM5 DDR_A_DM6 DDR_A_DM7

DDR_A_DQS0 DDR_A_DQS1 DDR_A_DQS2 DDR_A_DQS3 DDR_A_DQS4 DDR_A_DQS5 DDR_A_DQS6 DDR_A_DQS7 DDR_A_DQS#0 DDR_A_DQS#1 DDR_A_DQS#2

DDR_A_DQS#3

DDR_A_DQS#4 DDR_A_DQS#5 DDR_A_DQS#6 DDR_A_DQS#7

DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_MA14

DDR_A_BS#0 13 DDR_A_BS#1 13 DDR_A_BS#2 13

DDR_A_RAS# 13 DDR_A_CAS# 13 DDR_A_WE# 13

DDR_A_DM[0..7] 13

DDR_A_DQS[0..7] 13

DDR_A_DQS#[0..7] 13

DDR_A_MA[0..14] 13

3

DDR_B_D[0..63]14

DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63

AK47 AH46 AP47 AP46

AJ46

AJ48 AM48 AP48 AU47 AU46 BA48 AY48 AT47 AR47 BA47 BC47 BC46 BC44 BG43 BF43 BE45 BC41 BF40 BF41 BG38 BF38 BH35 BG35 BH40 BG39 BG34 BH34 BH14 BG12 BH11

BG8 BH12 BF11

BF8

BG7

BC5

BC6

AY3

AY1

BF6

BF5

BA1

BD3

AV2

AU3

AR3

AN2

AY2

AV1

AP3

AR1

AH1

AM2

AM3

AH3

AL1 AL2 AJ1

AJ3

U4E

SB_DQ_0 SB_DQ_1 SB_DQ_2 SB_DQ_3 SB_DQ_4 SB_DQ_5 SB_DQ_6 SB_DQ_7 SB_DQ_8 SB_DQ_9 SB_DQ_10 SB_DQ_11 SB_DQ_12 SB_DQ_13 SB_DQ_14 SB_DQ_15 SB_DQ_16 SB_DQ_17 SB_DQ_18 SB_DQ_19 SB_DQ_20 SB_DQ_21 SB_DQ_22 SB_DQ_23 SB_DQ_24 SB_DQ_25 SB_DQ_26 SB_DQ_27 SB_DQ_28 SB_DQ_29 SB_DQ_30 SB_DQ_31 SB_DQ_32 SB_DQ_33 SB_DQ_34 SB_DQ_35 SB_DQ_36 SB_DQ_37 SB_DQ_38 SB_DQ_39 SB_DQ_40 SB_DQ_41 SB_DQ_42 SB_DQ_43 SB_DQ_44 SB_DQ_45 SB_DQ_46 SB_DQ_47 SB_DQ_48 SB_DQ_49 SB_DQ_50 SB_DQ_51 SB_DQ_52 SB_DQ_53 SB_DQ_54 SB_DQ_55 SB_DQ_56 SB_DQ_57 SB_DQ_58 SB_DQ_59 SB_DQ_60 SB_DQ_61 SB_DQ_62 SB_DQ_63

CANTIGA_1p0

2

DDR_B_BS#0

BC16

SB_BS_0 SB_BS_1 SB_BS_2

SB_RAS#

SB_CAS#

SB_WE#

SB_DM_0 SB_DM_1 SB_DM_2 SB_DM_3 SB_DM_4 SB_DM_5 SB_DM_6 SB_DM_7

SB_DQS_0 SB_DQS_1 SB_DQS_2 SB_DQS_3 SB_DQS_4 SB_DQS_5 SB_DQS_6

SB_DQS_7 SB_DQS#_0 SB_DQS#_1 SB_DQS#_2 SB_DQS#_3 SB_DQS#_4 SB_DQS#_5 SB_DQS#_6 SB_DQS#_7

SB_MA_0 SB_MA_1 SB_MA_2 SB_MA_3 SB_MA_4 SB_MA_5 SB_MA_6 SB_MA_7 SB_MA_8

SB_MA_9 SB_MA_10 SB_MA_11 SB_MA_12 SB_MA_13 SB_MA_14

DDR SYSTEM MEMORY B

BB17 BB33

AU17 BG16 BF14

AM47 AY47 BD40 BF35 BG11 BA3 AP1 AK2

AL47 AV48 BG41 BG37 BH9 BB2 AU1 AN6 AL46 AV47 BH41 BH37 BG9 BC2 AT2 AN5

AV17 BA25 BC25 AU25 AW25 BB28 AU28 AW28 AT33 BD33 BB16 AW33 AY33 BH15 AU33

DDR_B_BS#1 DDR_B_BS#2

DDR_B_RAS# DDR_B_CAS# DDR_B_WE#

DDR_B_DM0 DDR_B_DM1 DDR_B_DM2 DDR_B_DM3 DDR_B_DM4 DDR_B_DM5 DDR_B_DM6 DDR_B_DM7

DDR_B_DQS0 DDR_B_DQS1 DDR_B_DQS2 DDR_B_DQS3 DDR_B_DQS4 DDR_B_DQS5 DDR_B_DQS6 DDR_B_DQS7 DDR_B_DQS#0 DDR_B_DQS#1 DDR_B_DQS#2 DDR_B_DQS#3 DDR_B_DQS#4 DDR_B_DQS#5 DDR_B_DQS#6 DDR_B_DQS#7

DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8 DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 DDR_B_MA14

1

DDR_B_BS#0 14 DDR_B_BS#1 14 DDR_B_BS#2 14

DDR_B_RAS# 14 DDR_B_CAS# 14 DDR_B_WE# 14

DDR_B_DM[0..7] 14

DDR_B_DQS[0..7] 14

DDR_B_DQS#[0..7] 14

DDR_B_MA[0..14] 14

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

http://laptop-motherboard-schematic.blogspot.com/

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2006/02/13 2008/6/05

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

Cantiga(2/6)-DDR2 A/B CH

LA-4671P

1

1.0

853Friday, February 20, 2009

1.0

of

5

1 2

T38T38

T46T46

T51T51

T50T50

3VDDCCL 3VDDCDA CRT_HSYNC

CRT_VSYNC

0_0402_5%

GMCH_ENBKL

GMCH_EDID_CLK_LCD GMCH_EDID_DAT_LCD

GMCH_LVDDEN

GMCH_LVDSACGMCH_LVDSAC+ GMCH_LVDSBCGMCH_LVDSBC+

GMCH_LVDSA0GMCH_LVDSA1GMCH_LVDSA2GMCH_LVDSA3-

GMCH_LVDSA0+ GMCH_LVDSA1+ GMCH_LVDSA2+ GMCH_LVDSA3+

GMCH_LVDSB0GMCH_LVDSB1GMCH_LVDSB2GMCH_LVDSB3-

GMCH_LVDSB0+ GMCH_LVDSB1+ GMCH_LVDSB2+ GMCH_LVDSB3+

CRT_B CRT_G CRT_R

R74

1 2

150_0402_1%

R676

VGA@

1 2

CTRL_CLK

CTRL_DATA

1 2

R94 2.4K_0402_1%~D

1 2

R6575_0402_1%

1 2

R6775_0402_1%

1 2

R6875_0402_1%

UMA@

UMA@ UMA@

UMA@

R76

R75

UMA@

1 2

150_0402_1%

0_0402_5%

0_0402_5% R675

R675

1 2

150_0402_1%

R65

0_0402_5%

VGA@

R68

0_0402_5%

VGA@

UMA@

VGA@

1 2

R334

R334 1K_0402_1%

1K_0402_1%

UMA@

1 2

GMCH_ENBKL16

+3VS

D D

C C

CRT_HSYNC16

CRT_VSYNC16

+3VS

UMA@

R483 2.2K_0402_5%

UMA@

R484 2.2K_0402_5%

B B

R74

0_0402_5%

VGA@

R76

0_0402_5%

VGA@

1 2

GMCH_EDID_CLK_LCD

GMCH_EDID_DAT_LCD

R75

0_0402_5%

VGA@

R81 10K_0402_5% UMA@R81 10K_0402_5% UMA@

R80 10K_0402_5% UMA@R80 10K_0402_5% UMA@

GMCH_EDID_CLK_LCD16 GMCH_EDID_DAT_LCD16

GMCH_LVDDEN16

GMCH_LVDSAC-16

GMCH_LVDSAC+16 GMCH_LVDSBC-16 GMCH_LVDSBC+16

GMCH_LVDSA0-16

GMCH_LVDSA1-16

GMCH_LVDSA2-16

GMCH_LVDSA0+16

GMCH_LVDSA1+16

GMCH_LVDSA2+16

GMCH_LVDSB0-16

GMCH_LVDSB1-16

GMCH_LVDSB2-16

GMCH_LVDSB0+16

GMCH_LVDSB1+16

GMCH_LVDSB2+16

CRT_B16 CRT_G16 CRT_R16

3VDDCCL16 3VDDCDA16

L32 G32 M32

M33

K33

J33

M29 C44

B43

E37

E38 C41 C40

B37

A37

H47

E46 G40

A40

H48 D45

F40

B40

A41 H38 G37

J37

B42 G38

F37

K37

F25 H25

K25

H24

C31

E32

E28

G28

J28

G29

H32

J32

J29

E29

L29

R67

0_0402_5%

VGA@

4

U4C

L_BKLT_CTRL L_BKLT_EN L_CTRL_CLK

L_CTRL_DATA L_DDC_CLK L_DDC_DATA

L_VDD_EN LVDS_IBG LVDS_VBG LVDS_VREFH LVDS_VREFL LVDSA_CLK# LVDSA_CLK LVDSB_CLK# LVDSB_CLK

LVDSA_DATA#_0 LVDSA_DATA#_1 LVDSA_DATA#_2 LVDSA_DATA#_3

LVDSA_DATA_0 LVDSA_DATA_1 LVDSA_DATA_2 LVDSA_DATA_3

LVDSB_DATA#_0 LVDSB_DATA#_1 LVDSB_DATA#_2 LVDSB_DATA#_3

LVDSB_DATA_0 LVDSB_DATA_1 LVDSB_DATA_2 LVDSB_DATA_3

TVA_DAC TVB_DAC TVC_DAC

TV_RTN

TV_DCONSEL_0 TV_DCONSEL_1

CRT_BLUE

CRT_GREEN

CRT_RED

CRT_IRTN

CRT_DDC_CLK CRT_DDC_DATA CRT_HSYNC CRT_TVO_IREF CRT_VSYNC

CANTIGA_1p0

R56 within 500 mils from pin T37,T36

T37

PEG_COMPI

T36

PEG_COMPO

PEG_RX#_0 PEG_RX#_1 PEG_RX#_2 PEG_RX#_3 PEG_RX#_4 PEG_RX#_5 PEG_RX#_6 PEG_RX#_7

LVDS

PEG_RX#_8

PEG_RX#_9 PEG_RX#_10 PEG_RX#_11 PEG_RX#_12 PEG_RX#_13 PEG_RX#_14 PEG_RX#_15

PEG_RX_0 PEG_RX_1 PEG_RX_2 PEG_RX_3 PEG_RX_4 PEG_RX_5 PEG_RX_6 PEG_RX_7 PEG_RX_8

PEG_RX_9 PEG_RX_10 PEG_RX_11 PEG_RX_12 PEG_RX_13 PEG_RX_14 PEG_RX_15

PEG_TX#_0 PEG_TX#_1 PEG_TX#_2

TV

R334

0_0402_5%

VGA@

PEG_TX#_3 PEG_TX#_4 PEG_TX#_5 PEG_TX#_6 PEG_TX#_7 PEG_TX#_8

PEG_TX#_9 PEG_TX#_10 PEG_TX#_11 PEG_TX#_12

PCI-EXPRESS GRAPHICS

PEG_TX#_13 PEG_TX#_14 PEG_TX#_15

PEG_TX_0 PEG_TX_1 PEG_TX_2 PEG_TX_3

VGA

PEG_TX_4 PEG_TX_5 PEG_TX_6 PEG_TX_7 PEG_TX_8

PEG_TX_9 PEG_TX_10 PEG_TX_11 PEG_TX_12 PEG_TX_13 PEG_TX_14 PEG_TX_15

PEG_NRX_GTX_N0

H44

PEG_NRX_GTX_N1

J46

PEG_NRX_GTX_N2

L44

PEG_NRX_GTX_N3

L40

PEG_NRX_GTX_N4

N41

PEG_NRX_GTX_N5

P48

PEG_NRX_GTX_N6

N44

PEG_NRX_GTX_N7

T43

PEG_NRX_GTX_N8

U43

PEG_NRX_GTX_N9

Y43

PEG_NRX_GTX_N10

Y48

PEG_NRX_GTX_N11

Y36

PEG_NRX_GTX_N12

AA43

PEG_NRX_GTX_N13

AD37

PEG_NRX_GTX_N14

AC47

PEG_NRX_GTX_N15

AD39

PEG_NRX_GTX_P0

H43

PEG_NRX_GTX_P1

J44

PEG_NRX_GTX_P2

L43

PEG_NRX_GTX_P3

L41

PEG_NRX_GTX_P4

N40

PEG_NRX_GTX_P5

P47

PEG_NRX_GTX_P6

N43

PEG_NRX_GTX_P7

T42

PEG_NRX_GTX_P8

U42

PEG_NRX_GTX_P9

Y42

PEG_NRX_GTX_P10

W47

PEG_NRX_GTX_P11

Y37

PEG_NRX_GTX_P12

AA42

PEG_NRX_GTX_P13

AD36

PEG_NRX_GTX_P14

AC48

PEG_NRX_GTX_P15

AD40

PEG_TXN0

J41

PEG_TXN1

M46

PEG_TXN2

M47

PEG_TXN3

M40

PEG_TXN4

M42

PEG_TXN5 PEG_NTX_GRX_N5

R48

PEG_TXN6

N38

PEG_TXN7

T40

PEG_TXN8

U37

PEG_TXN9

U40

PEG_TXN10

Y40 AA46

PEG_TXN12

AA37

PEG_TXN13

AA40

PEG_TXN14

AD43

PEG_TXN15

AC46

PEG_TXP0

J42

PEG_TXP1

L46

PEG_TXP2

M48

PEG_TXP3

M39

PEG_TXP4

M43

PEG_TXP5

R47

PEG_TXP6

N37

PEG_TXP7

T39

PEG_TXP8

U36

PEG_TXP9

U39

PEG_TXP10

Y39

PEG_TXP11

Y46

PEG_TXP12

AA36

PEG_TXP13

AA39

PEG_TXP14

AD42

PEG_TXP15

AD46

3

R95

1 2

49.9_0402_1%

C568 0.1U_0402_16V7KVGA@C568 0.1U_0402_16V7KVGA@

1 2

C537 0.1U_0402_16V7KVGA@C537 0.1U_0402_16V7KVGA@

1 2

C538 0.1U_0402_16V7KVGA@C538 0.1U_0402_16V7KVGA@

1 2

C539 0.1U_0402_16V7KVGA@C539 0.1U_0402_16V7KVGA@

1 2

C540 0.1U_0402_16V7KVGA@C540 0.1U_0402_16V7KVGA@

1 2

C541 0.1U_0402_16V7KVGA@C541 0.1U_0402_16V7KVGA@

1 2

C542 0.1U_0402_16V7KVGA@C542 0.1U_0402_16V7KVGA@

1 2

C543 0.1U_0402_16V7KVGA@C543 0.1U_0402_16V7KVGA@

1 2

C544 0.1U_0402_16V7KVGA@C544 0.1U_0402_16V7KVGA@

1 2

C545 0.1U_0402_16V7KVGA@C545 0.1U_0402_16V7KVGA@

1 2

C546 0.1U_0402_16V7KVGA@C546 0.1U_0402_16V7KVGA@

1 2

C547 0.1U_0402_16V7KVGA@C547 0.1U_0402_16V7KVGA@

1 2

C548 0.1U_0402_16V7KVGA@C548 0.1U_0402_16V7KVGA@

1 2

C549 0.1U_0402_16V7KVGA@C549 0.1U_0402_16V7KVGA@

1 2

C550 0.1U_0402_16V7KVGA@C550 0.1U_0402_16V7KVGA@

1 2

C551 0.1U_0402_16V7KVGA@C551 0.1U_0402_16V7KVGA@

1 2

C552 0.1U_0402_16V7KVGA@C552 0.1U_0402_16V7KVGA@

1 2

C553 0.1U_0402_16V7KVGA@C553 0.1U_0402_16V7KVGA@

1 2

C554 0.1U_0402_16V7KVGA@C554 0.1U_0402_16V7KVGA@

1 2

C555 0.1U_0402_16V7KVGA@C555 0.1U_0402_16V7KVGA@

1 2

C556 0.1U_0402_16V7KVGA@C556 0.1U_0402_16V7KVGA@

1 2

C557 0.1U_0402_16V7KVGA@C557 0.1U_0402_16V7KVGA@

1 2

C558 0.1U_0402_16V7KVGA@C558 0.1U_0402_16V7KVGA@

1 2

C559 0.1U_0402_16V7KVGA@C559 0.1U_0402_16V7KVGA@

1 2

C560 0.1U_0402_16V7KVGA@C560 0.1U_0402_16V7KVGA@

1 2

C561 0.1U_0402_16V7KVGA@C561 0.1U_0402_16V7KVGA@

1 2

C562 0.1U_0402_16V7KVGA@C562 0.1U_0402_16V7KVGA@

1 2

C563 0.1U_0402_16V7KVGA@C563 0.1U_0402_16V7KVGA@

1 2

C564 0.1U_0402_16V7KVGA@C564 0.1U_0402_16V7KVGA@

1 2

C565 0.1U_0402_16V7KVGA@C565 0.1U_0402_16V7KVGA@

1 2

C566 0.1U_0402_16V7KVGA@C566 0.1U_0402_16V7KVGA@

1 2

C567 0.1U_0402_16V7KVGA@C567 0.1U_0402_16V7KVGA@

1 2

+VCC_PEG

PEG_NRX_GTX_N[0..15]

PEG_NRX_GTX_P[0..15]

PEGCOMP trace width and spacing is 20/25 mils.

PEG_NRX_GTX_N[0..15] 30

PEG_NRX_GTX_P[0..15] 30

PEG_NTX_GRX_N[0..15] 30

PEG_NTX_GRX_N0 PEG_NTX_GRX_N1 PEG_NTX_GRX_N2 PEG_NTX_GRX_N3 PEG_NTX_GRX_N4

PEG_NTX_GRX_N6 PEG_NTX_GRX_N7 PEG_NTX_GRX_N8

PEG_NTX_GRX_N9 PEG_NTX_GRX_N10 PEG_NTX_GRX_N11PEG_TXN11 PEG_NTX_GRX_N12 PEG_NTX_GRX_N13 PEG_NTX_GRX_N14 PEG_NTX_GRX_N15

PEG_NTX_GRX_P0 PEG_NTX_GRX_P1 PEG_NTX_GRX_P2 PEG_NTX_GRX_P3 PEG_NTX_GRX_P4 PEG_NTX_GRX_P5 PEG_NTX_GRX_P6 PEG_NTX_GRX_P7 PEG_NTX_GRX_P8

PEG_NTX_GRX_P9 PEG_NTX_GRX_P10 PEG_NTX_GRX_P11 PEG_NTX_GRX_P12 PEG_NTX_GRX_P13 PEG_NTX_GRX_P14 PEG_NTX_GRX_P15

PEG_NTX_GRX_P[0. .15] 30

2

1

Strap Pin Table

CFG[2:0] FSB Freq select

CFG[4:3] Reserved

CFG5 (DMI select)

CFG6

CFG7 (Intel Management Engine Crypt o strap)

CFG8

CFG9

(PCIE Graphics Lane Reversal)

CFG10 (PCIE Lookback enable)

CFG11

CFG[13:12] (XOR/ALLZ)

CFG16 (FSB Dynamic ODT)

CFG19 (DMI Lane Reversal)

CFG20 (PCIE/SDVO concurrent)

CFG57

CFG67

CFG77

CFG97

CFG167

CFG197

CFG207

CFG[19:20] have internal pulldown

000 = FSB 1066MHz 010 = FSB 800MHz 011 = FSB 667MHz Others = Reserved

0 = DMI x 2 1 = DMI x 4 0 = The iTPM Host Interface is enable

1 = The iTPM Host Interface is disable

0 =(TLS)chiper suite with no confidentiality

1 =(TLS)chiper suite with confidentiality

*

Reserved

0 = Reverse Lane,15->0, 14->1

1 = Normal Operation,Lane Number in order

0 = Enable

1 = Disable

*

Reserved

00 = Reserved 01 = XOR Mode Enabled 10 = All Z Mode Enab led

ReservedCFG[15:14]

0 = Disabled

1 = Enabled

*

ReservedCFG[18:17]

0 = Normal Operation

(Lane number in Order)

1 = Reverse Lane

0 = Only PCIE or SDVO is operational.

1 = PCIE/SDVO are operating simu.

R66 2.21K_0402_1%~D@R66 2.21K_0402_1%~D@

1 2

R58 2.21K_0402_1%~D@R58 2.21K_0402_1%~D@

1 2

R59 2.21K_0402_1%~D@R59 2.21K_0402_1%~D@

1 2

R55 2.21K_0402_1%~D@R55 2.21K_0402_1%~D@

1 2

R70 2.21K_0402_1%~D@R70 2.21K_0402_1%~D@

1 2

CFG[5:16] have internal pullup

R72 4.02K_0402_1%~D@R72 4.02K_0402_1%~D@

R73 4.02K_0402_1%~D@R73 4.02K_0402_1%~D@

1 2

+3VS

*

(Default)11 = Normal Operation

*

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPR IETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENT IAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPR IETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENT IAL AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CU STODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CU STODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CU STODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

http://laptop-motherboard-schematic.blogspot.com/

DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY TH IRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY TH IRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2006/02/13 2008/6/05

Compal Secret Dat a

Deciphered Date

Compal Electronics, Inc.

Title

Cantiga(3/6)-VGA/LVDS/TV

Size Document Number Rev

Custom

LA-4671P

Date: Sheet

2

Date: Sheet

1

953Friday, February 20, 2009

1.0

of

5

+3VS_DAC_CRT

0.1U_0402_16V4Z

0.01U_0402_16V7K

0.01U_0402_16V7K C412

C411

C407

1

UMA@C407

UMA@

2

D D

+3VS_DAC_BG

C405

1

UMA@C405

UMA@

2

+1.5VS

+VCCP

C C

+3VS_DAC_CRT

0.01U_0402_16V7K

C401

C402

1

UMA@C401

UMA@

UMA@C402

UMA@

2

B B

UMA@C412

UMA@

UMA@C411

UMA@

2

R836 0_0402_5%~D

1 2

UMA@

0.01U_0402_16V7K

0.1U_0402_16V4Z

C408

1

UMA@C408

UMA@

2

R97

1 2

0_0603_5%

R50

1 2

0_0805_5%

R71

1 2

0_0603_5%

0.1U_0402_16V4Z

1

2

100U_1206_10V4Z

Change L11 to 0 ohm resistor

- 01/14/2008

1

2

+3VS_DAC_CRT

1

C175

0.1U_0402_16V4Z

2

100U_D2E_6.3VM_R15M~D

1

+

C68

2

+1.05VS_PEGPLL

L11

1 2

+3VS

UMA@L11

UMA@

2_0603_5%

+1.05VS_DPLLA

+1.05VS_DPLLB

414uA

+1.05VS_HPLL

+1.05VS_MPLL

+1.8V_TXLVDS

+1.5VS_PEG_BG

+1.05VS_PEGPLL

+1.05VS_A_SM

22U_0805_6.3V6M~D

C82

1

2

+1.05VS_A_SM_CK

22U_0805_6.3V6M~D

C104

1

2

HDMI disable connected to GND

C233 0.1U_0402_16V4ZC233 0.1U_0402_16V4Z

C83

4.7U_0805_10V4Z

C123

+3VS_DAC_CRT

2

1

2

1

2

+1.5VS_TVDAC

+1.5VS_QDAC

+1.05VS_HPLL

+1.8V_LVDS

+3VS_DAC_CRT

+3VS_DAC_BG

1

2

0.1U_0402_16V4Z

TVA 24.15mA TVB 39.48mA TVX 24.15mA

C72

1U_0603_10V4Z

58.67mA

48.363mA

157.2mA

60.31mA

4

U4H

AXF

VCC_SM_CK_1 VCC_SM_CK_2 VCC_SM_CK_3 VCC_SM_CK_4

SM CK

VCC_TX_LVDS

HV

VCC_PEG_1 VCC_PEG_2 VCC_PEG_3 VCC_PEG_4 VCC_PEG_5

PEG

DMI

VTT_1 VTT_2 VTT_3 VTT_4 VTT_5 VTT_6 VTT_7 VTT_8

VTT_9 VTT_10 VTT_11 VTT_12 VTT_13 VTT_14 VTT_15

VTT

VTT_16 VTT_17 VTT_18 VTT_19 VTT_20 VTT_21 VTT_22 VTT_23 VTT_24 VTT_25

VCC_AXF_1 VCC_AXF_2 VCC_AXF_3

VCC_HV_1 VCC_HV_2 VCC_HV_3

VCC_DMI_1 VCC_DMI_2 VCC_DMI_3 VCC_DMI_4

VTTLF1 VTTLF2 VTTLF3

VTTLF

73mA

B27

VCCA_CRT_DAC_1

A26

VCCA_CRT_DAC_2

2.68mA

A25

VCCA_DAC_BG

B25

VSSA_DAC_BG

64.8mA

F47

64.8mA

139.2mA

13.2mA

720mA

50mA

VCCA_DPLLA

L48

VCCA_DPLLB

24mA

AD1

VCCA_HPLL

AE1

VCCA_MPLL

J48

VCCA_LVDS

J47

VSSA_LVDS

AD48

VCCA_PEG_BG

50mA

AA48

VCCA_PEG_PLL

AR20

VCCA_SM_1

AP20

VCCA_SM_2

AN20

VCCA_SM_3

AR17

VCCA_SM_4

AP17

VCCA_SM_5

AN17

VCCA_SM_6

AT16

VCCA_SM_7

AR16

VCCA_SM_8

AP16

VCCA_SM_9

26mA 321.35mA

AP28

VCCA_SM_CK_1

AN28

VCCA_SM_CK_2

AP25

VCCA_SM_CK_3

AN25

VCCA_SM_CK_4

AN24

VCCA_SM_CK_5

AM28

VCCA_SM_CK_NCTF_1

AM26

VCCA_SM_CK_NCTF_2

AM25

VCCA_SM_CK_NCTF_3

AL25

VCCA_SM_CK_NCTF_4

AM24

VCCA_SM_CK_NCTF_5

AL24

VCCA_SM_CK_NCTF_6

AM23

VCCA_SM_CK_NCTF_7

AL23

VCCA_SM_CK_NCTF_8

B24

VCCA_TV_DAC_1

A24

VCCA_TV_DAC_2

A32

VCC_HDA

M25

VCCD_TVDAC

L28

VCCD_QDAC

AF1

VCCD_HPLL

AA47

VCCD_PEG_PLL

M38

VCCD_LVDS_1

L37

VCCD_LVDS_2

CANTIGA_1p0

CRTPLLA PEGA SM

A LVDS

POWER

A CK

TV

HDA

D TV/CRT

LVDS

852mA

U13 T13 U12 T12 U11 T11 U10 T10 U9 T9 U8 T8 U7 T7 U6 T6 U5 T5 V3 U3 V2 U2 T2 V1 U1

B22 B21 A21

124mA

BF21 BH20 BG20 BF20

118.8mA

K47

C35 B35 A35

1732mA

V48 U48 V47 U47 U46

456mA

AH48 AF48 AH47 AG47

20mils

A8 L1 AB2

3

+VCCP

220U_D2_4VY_R15M

1

+

C370

2

1

C383

2

Co-lay L13/L14

+V1.05VS_AXF

+1.8V_SM_CK

+1.8V_TXLVDS

105.3mA

+VCC_PEG

+1.05VS_DMI

0.47U_0402_10V4Z~D

C65

C382

C65

C385

1

2

C384

0.47U_0402_10V4Z~D

1

C373

2

R1400

1 2

MBK1608121YZF_0603

R1401

1 2

MBK1608121YZF_0603

+3VS_HV

C410

0.47U_0402_10V4Z~D

1

2

+1.05VS_DPLLA

1 2

10U_0805_10V4Z

0.1U_0402_16V4Z

4.7U_0805_10V4Z

1

2

4.7U_0805_10V4Z

C56

UMA@R1400

UMA@

UMA@R1401

UMA@

0.1U_0402_16V4Z

1

2

1

2

2.2U_0805_16V4Z

+VCCP+1.05VS_DPLLA

+VCCP+1.05VS_DPLLB

220U_D2_4VY_R15M

0.1U_0402_16V4Z

+1.5VS_QDAC

C97

1

2

C191

0.01U_0402_16V7K

C173

1

+

2

UMA@

C174

C178

1

UMA@

2

+1.05VS_HPLL

+1.05VS_MPLL

0.1U_0402_16V4Z

+1.05VS_PEGPLL

0.1U_0402_16V4Z

C98

1

2

0.1U_0402_16V4Z

10U_0805_10V4Z

C63

10U_FLC-453232-100K_0.25A_10%

C182

1

2

UMA@

L14

@L14

@

1 2

10U_FLC-453232-100K_0.25A_10%

UMA@

0.1U_0402_16V4Z

C388

C387

1

2

1

2

0.1U_0402_16V4Z

2

10U_0805_10V4Z

C176

1

2

L15

1 2

BLM18PG181SN1_0603~D

+VCCP

L13

@L13

@

+VCCP+1.05VS_DPLLB

L29

1 2

MBK2012121YZF_0805

10U_0805_10V4Z

L9

1 2

LQH32CNR15M33L_1210~D

C62

10U_0805_10V4Z

L12

1 2

BLM21PG221SN1D_0805~D

C179

+1.5VS

+1.8V_SM_CK

+VCCP

1_0402_5%~D

C96

R139

10U_0805_10V4Z

1

2

+VCC_PEG

C95

+V1.05VS_AXF

10U_0805_10V4Z

0.1U_0402_16V4Z

+1.5VS_TVDAC

1

+

220U_D2_4VY_R15M

2

C113

1

2

C102

1

2

UMA@ C115

UMA@

1

C115

2

22U_0805_6.3V6M~D

2

C117

1

+1.05VS_DMI

1

2

1

1U_0603_10V4Z

R102

1 2

0_0805_5%

0.022U_0402_16V7K

UMA@ C114

UMA@

C114

C389

1

2

R112

1 2

0_0805_5%

0.1U_0402_16V4Z

C116

C69

1

2

+1.8V

0.1U_0402_16V4Z

1

2

4.7U_0805_10V4Z

4.7U_0805_10V4Z 0_1210_5%~D

0_1210_5%~D

R101

1 2

0_0805_5%

R64

1 2

0_0805_5% UMA@

R132

1 2

+VCC_PEG

+VCCP

+1.5VS

UMA@

2

+1.8V_LVDS

10U_0805_10V4Z

R110

UMA@R110

UMA@

1 2

0_0603_5%

UMA@

C187

C186

1U_0603_10V4Z

C186

1

2

1U_0603_10V4Z

1

2

+1.8V

Compal Electronics, Inc.

Title

Size Document Num ber Rev

Custom

Date: Sheet

Compal Electronics, Inc.

Cantiga(4/6)-PWR

LA-4671P

C405

C401

0_0402_5%

VGA@

A A

5

C405

0_0402_5%

VGA@

C407

0_0402_5%

VGA@

C413

0_0402_5%

VGA@

C173

0_0402_5%

VGA@

U4

C174

0_0402_5%

VGA@

C115

0_0402_5%

VGA@

U4

CRESTLINE_1p0

VGA@

C186

0_0603_5%

VGA@

http://laptop-motherboard-schematic.blogspot.com/

4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2006/02/13 2008/6/05

Compal Secret Data

Deciphered Date

40 mils

1000P_0402_50V7K

+1.8V_TXLVDS

C413

1

2

UMA@

R350

1 2

0_0603_5%

10U_0805_10V4Z

C418

1

2

UMA@

10 53Friday, February 20, 2009

1

UMA@

+1.8V

1.0

of

5

4

3

2

1

W28 V28 W26 V26 W25 V25 W24 V24 W23 V23 AM21 AL21 AK21 W21 V21 U21 AM20 AK20 W20 U20 AM19 AL19 AK19 AJ19 AH19 AG19 AF19 AE19 AB19 AA19 Y19 W19 V19 U19 AM17 AK17 AH17 AG17 AF17 AE17 AC17 AB17 Y17 W17 V17 AM16 AL16 AK16 AJ16 AH16 AG16 AF16 AE16 AC16 AB16 AA16 Y16 W16 V16 U16

AV44 BA37 AM40 AV21 AY5 AM10 BB13

+VCCP

VCCSM_LF1 VCCSM_LF2 VCCSM_LF3 VCCSM_LF4 VCCSM_LF5 VCCSM_LF6 VCCSM_LF7

U4G

Extnal Graphic: 1210.34mA integrated Graphic: 1930.4mA

U4F

AG34 AC34 AB34 AA34

AM33 AK33

AJ33 AG33 AF33

AE33 AC33 AA33

W33

AH28 AF28 AC28 AA28

AJ26 AG26 AE26 AC26 AH25 AG25 AF25 AG24

AJ23 AH23 AF23

Y34 V34 U34

Y33

V33 U33

T32

U4F

VCC_1 VCC_2 VCC_3 VCC_4 VCC_5 VCC_6 VCC_7 VCC_8 VCC_9 VCC_10 VCC_11 VCC_12

VCC_13 VCC_14 VCC_15 VCC_16 VCC_17 VCC_18 VCC_19 VCC_20 VCC_21 VCC_22 VCC_23 VCC_24 VCC_25 VCC_26 VCC_27 VCC_28 VCC_29 VCC_30 VCC_31 VCC_32 VCC_33 VCC_34

VCC_35

CANTIGA_1p0

VCC CORE

POWER

VCC_NCTF_1 VCC_NCTF_2 VCC_NCTF_3 VCC_NCTF_4 VCC_NCTF_5 VCC_NCTF_6 VCC_NCTF_7 VCC_NCTF_8

VCC_NCTF_9 VCC_NCTF_10 VCC_NCTF_11 VCC_NCTF_12 VCC_NCTF_13 VCC_NCTF_14 VCC_NCTF_15 VCC_NCTF_16 VCC_NCTF_17 VCC_NCTF_18 VCC_NCTF_19 VCC_NCTF_20 VCC_NCTF_21 VCC_NCTF_22 VCC_NCTF_23 VCC_NCTF_24 VCC_NCTF_25 VCC_NCTF_26 VCC_NCTF_27 VCC_NCTF_28 VCC_NCTF_29 VCC_NCTF_30 VCC_NCTF_31

VCC NCTF

VCC_NCTF_32 VCC_NCTF_33 VCC_NCTF_34 VCC_NCTF_35 VCC_NCTF_36 VCC_NCTF_37 VCC_NCTF_38 VCC_NCTF_39 VCC_NCTF_40 VCC_NCTF_41 VCC_NCTF_42 VCC_NCTF_43 VCC_NCTF_44

AM32 AL32 AK32 AJ32 AH32 AG32 AE32 AC32 AA32 Y32 W32 U32 AM30 AL30 AK30 AH30 AG30 AF30 AE30 AC30 AB30 AA30 Y30 W30 V30 U30 AL29 AK29 AJ29 AH29 AG29 AE29 AC29 AA29 Y29 W29 V29 AL28 AK28 AL26 AK26 AK25 AK24 AK23

+VCCP

D D

22U_0805_6.3V6M~D

220U_D2_4VY_R15M

1

+

C374

2

C C

B B

0.22U_0402_10V4Z

0.1U_0402_16V4Z

0.22U_0402_10V4Z

C118

1

2

0.1U_0402_16V4Z

C119

C120

C143

1

2

C120

1

2

+1.8V

1

+

C148

330U_D2_2.5VY_R9M

+VCCP

1

2

C148

2

.1U_0402_16V7K~D

0.47U_0402_10V4Z~D

C140

Layout Note: Inside GMCH cavity for VCC_AXG.

.1U_0402_16V7K~D

1U_0603_10V6K~D

1

C66

C78

2

C147

22U_0805_6.3V6M~D

C147

22U_0805_6.3V6M~D

C165

22U_0805_6.3V6M~D

C165

22U_0805_6.3V6M~D

1

2

0317 change value

.1U_0402_16V7K~D

10U_0805_10V4Z~D

1

C100

C79

2

C164

.1U_0402_16V7K~D

C164

.1U_0402_16V7K~D

2

1

22U_0805_6.3V6M~D

1

C80

2

T42PAD T42PAD T43PAD T43PAD

AP33 AN33 BH32 BG32 BF32 BD32 BC32 BB32 BA32 AY32

AW32

AV32 AU32 AT32 AR32 AP32 AN32 BH31 BG31 BF31 BG30 BH29 BG29 BF29 BD29 BC29 BB29 BA29 AY29

AW29

AV29 AU29 AT29 AR29 AP29

BA36 BB24 BD16

BB21 AW16 AW13

AT13

AE25

AB25

AA25

AE24

AC24

AA24

AE23

AC23

AB23

AA23

AJ21 AG21 AE21 AC21 AA21

AH20 AF20 AE20 AC20 AB20 AA20

AM15

AL15 AE15

AJ15 AH15 AG15 AF15 AB15 AA15

AN14

AM14

AJ14 AH14

Y26

Y24

Y21

T17 T16

Y15 V15 U15

U14 T14

3000mA

VCC_SM_1 VCC_SM_2 VCC_SM_3 VCC_SM_4 VCC_SM_5 VCC_SM_6 VCC_SM_7 VCC_SM_8 VCC_SM_9 VCC_SM_10 VCC_SM_11 VCC_SM_12 VCC_SM_13 VCC_SM_14 VCC_SM_15 VCC_SM_16 VCC_SM_17 VCC_SM_18 VCC_SM_19 VCC_SM_20 VCC_SM_21 VCC_SM_22 VCC_SM_23 VCC_SM_24 VCC_SM_25 VCC_SM_26 VCC_SM_27 VCC_SM_28 VCC_SM_29 VCC_SM_30 VCC_SM_31 VCC_SM_32 VCC_SM_33 VCC_SM_34 VCC_SM_35

VCC_SM_36/NC VCC_SM_37/NC VCC_SM_38/NC VCC_SM_39/NC VCC_SM_40/NC VCC_SM_41/NC VCC_SM_42/NC

6326.84mA

VCC_AXG_1 VCC_AXG_2 VCC_AXG_3 VCC_AXG_4 VCC_AXG_5 VCC_AXG_6 VCC_AXG_7 VCC_AXG_8 VCC_AXG_9 VCC_AXG_10 VCC_AXG_11 VCC_AXG_12 VCC_AXG_13 VCC_AXG_14 VCC_AXG_15 VCC_AXG_16 VCC_AXG_17 VCC_AXG_18 VCC_AXG_19 VCC_AXG_20 VCC_AXG_21 VCC_AXG_22 VCC_AXG_23 VCC_AXG_24 VCC_AXG_25 VCC_AXG_26 VCC_AXG_27 VCC_AXG_28 VCC_AXG_29 VCC_AXG_30 VCC_AXG_31 VCC_AXG_32 VCC_AXG_33 VCC_AXG_34 VCC_AXG_35 VCC_AXG_36 VCC_AXG_37 VCC_AXG_38 VCC_AXG_39 VCC_AXG_40 VCC_AXG_41 VCC_AXG_42

VCC_AXG_SENSE VSS_AXG_SENSE

VCC_AXG_NCTF_1 VCC_AXG_NCTF_2 VCC_AXG_NCTF_3 VCC_AXG_NCTF_4 VCC_AXG_NCTF_5 VCC_AXG_NCTF_6 VCC_AXG_NCTF_7 VCC_AXG_NCTF_8

VCC_AXG_NCTF_9 VCC_AXG_NCTF_10 VCC_AXG_NCTF_11 VCC_AXG_NCTF_12 VCC_AXG_NCTF_13 VCC_AXG_NCTF_14 VCC_AXG_NCTF_15 VCC_AXG_NCTF_16 VCC_AXG_NCTF_17 VCC_AXG_NCTF_18 VCC_AXG_NCTF_19 VCC_AXG_NCTF_20 VCC_AXG_NCTF_21 VCC_AXG_NCTF_22

POWER

VCC_AXG_NCTF_23 VCC_AXG_NCTF_24 VCC_AXG_NCTF_25 VCC_AXG_NCTF_26 VCC_AXG_NCTF_27 VCC_AXG_NCTF_28 VCC_AXG_NCTF_29 VCC_AXG_NCTF_30

VCC SMVCC GFX

VCC_AXG_NCTF_31 VCC_AXG_NCTF_32 VCC_AXG_NCTF_33 VCC_AXG_NCTF_34 VCC_AXG_NCTF_35 VCC_AXG_NCTF_36 VCC_AXG_NCTF_37 VCC_AXG_NCTF_38 VCC_AXG_NCTF_39 VCC_AXG_NCTF_40 VCC_AXG_NCTF_41 VCC_AXG_NCTF_42 VCC_AXG_NCTF_43 VCC_AXG_NCTF_44 VCC_AXG_NCTF_45 VCC_AXG_NCTF_46 VCC_AXG_NCTF_47 VCC_AXG_NCTF_48 VCC_AXG_NCTF_49 VCC_AXG_NCTF_50 VCC_AXG_NCTF_51 VCC_AXG_NCTF_52 VCC_AXG_NCTF_53 VCC_AXG_NCTF_54 VCC_AXG_NCTF_55 VCC_AXG_NCTF_56

VCC GFX NCTF

VCC_AXG_NCTF_57 VCC_AXG_NCTF_58 VCC_AXG_NCTF_59 VCC_AXG_NCTF_60

VCC_SM_LF1 VCC_SM_LF2 VCC_SM_LF3 VCC_SM_LF4 VCC_SM_LF5 VCC_SM_LF6 VCC_SM_LF7

VCC SM LF

+VCCP

330U_D2_2.5VY_R9M

1

C57

+

2

C71 0.1U_0402_16V4ZC71 0.1U_0402_16V4Z

C67 0.22U_0603_10V7KC67 0.22U_0603_10V7K

1

2

Layout Note:

Place close to GMCH

C81 0.22U_0603_10V7KC81 0.22U_0603_10V7K

C146 0.47U_0402_10V4Z~DC146 0.47U_0402_10V4Z~D

C145 1U_0603_10V6K~DC145 1U_0603_10V6K~D

1

2

C163 1U_0603_10V6K~DC163 1U_0603_10V6K~D

1

2

1

C86

+

2

C70 0.1U_0402_16V4ZC70 0.1U_0402_16V4Z

1

2

A A

CANTIGA_1p0

Security Classification

Issued Date

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

http://laptop-motherboard-schematic.blogspot.com/

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2006/02/13 2008/6/05

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

Cantiga(5/6)-PWR/GND

LA-4671P

1

1.0

11 53Friday, February 20, 2009

1.0

of

5

U4I

AU48

VSS_1

AR48

VSS_2

AL48

VSS_3

BB47

VSS_4

AW47

VSS_5

AN47

VSS_6

AJ47

VSS_7

AF47

D D

C C

B B

A A

AD47 AB47

BD46 BA46 AY46 AV46 AR46 AM46

BF44 AH44 AD44 AA44

M44

BC43 AV43 AU43 AM43

BG42 AY42 AT42 AN42

AJ42

AE42

BD41 AU41 AM41 AH41 AD41 AA41

M41

BG40 BB40 AV40 AN40

AT39 AM39

AJ39

AE39

BH38 BC38 BA38 AU38 AH38 AD38 AA38

BF37 BB37

AW37

AT37 AN37

AJ37

BG36 BD36 AK15 AU36

Y47 T47 N47

L47

G47

V46 R46 P46 H46 F46

Y44 U44 T44

F44

J43

C43

N42

L42

Y41 U41 T41

G41 B41

H40 E40

N39

L39

B39

Y38 U38 T38

J38 F38 C38

H37 C37

VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50 VSS_51 VSS_52 VSS_53 VSS_54 VSS_55 VSS_56 VSS_57 VSS_58 VSS_59 VSS_60 VSS_61 VSS_62 VSS_63 VSS_64 VSS_65 VSS_66 VSS_67 VSS_68 VSS_69 VSS_70 VSS_71 VSS_72 VSS_73 VSS_74 VSS_75 VSS_76 VSS_77 VSS_78 VSS_79 VSS_80 VSS_81 VSS_82 VSS_83 VSS_84 VSS_85 VSS_86 VSS_87 VSS_88 VSS_89 VSS_90 VSS_91 VSS_92 VSS_93 VSS_94 VSS_95 VSS_96 VSS_97 VSS_98 VSS_99

CANTIGA_1p0

VSS

VSS_100 VSS_101 VSS_102 VSS_103 VSS_104 VSS_105 VSS_106 VSS_107 VSS_108 VSS_109 VSS_110 VSS_111 VSS_112 VSS_113 VSS_114 VSS_115 VSS_116 VSS_117 VSS_118 VSS_119 VSS_120 VSS_121 VSS_122 VSS_123 VSS_124 VSS_125 VSS_126 VSS_127 VSS_128 VSS_129 VSS_130 VSS_131 VSS_132 VSS_133 VSS_134 VSS_135 VSS_136 VSS_137 VSS_138 VSS_139 VSS_140 VSS_141 VSS_142 VSS_143 VSS_144 VSS_145 VSS_146 VSS_147 VSS_148 VSS_149 VSS_150 VSS_151 VSS_152 VSS_153 VSS_154 VSS_155 VSS_156 VSS_157 VSS_158 VSS_159 VSS_160 VSS_161 VSS_162 VSS_163 VSS_164 VSS_165 VSS_166 VSS_167 VSS_168 VSS_169 VSS_170 VSS_171 VSS_172 VSS_173 VSS_174 VSS_175 VSS_176 VSS_177 VSS_178 VSS_179 VSS_180 VSS_181 VSS_182 VSS_183 VSS_184 VSS_185 VSS_186 VSS_187 VSS_188 VSS_189 VSS_190 VSS_191 VSS_192 VSS_193 VSS_194 VSS_195 VSS_196 VSS_197 VSS_198 VSS_199

4

AM36 AE36 P36 L36 J36 F36 B36 AH35 AA35 Y35 U35 T35 BF34 AM34 AJ34 AF34 AE34 W34 B34 A34 BG33 BC33 BA33 AV33 AR33 AL33 AH33 AB33 P33 L33 H33 N32 K32 F32 C32 A31 AN29 T29 N29 K29 H29 F29 A29 BG28 BD28 BA28 AV28 AT28 AR28 AJ28 AG28 AE28 AB28 Y28 P28 K28 H28 F28 C28 BF26 AH26 AF26 AB26 AA26 C26 B26 BH25 BD25 BB25 AV25 AR25 AJ25 AC25 Y25 N25 L25 J25 G25 E25 BF24 AD12 AY24 AT24 AJ24 AH24 AF24 AB24 R24 L24 K24 J24 G24 F24 E24 BH23 AG23 Y23 B23 A23 AJ6

3

U4J

BG21

VSS_199

L12

VSS_200

AW21

VSS_201

AU21

VSS_202

AP21

VSS_203

AN21

VSS_204

AH21

VSS_205

AF21

VSS_206

AB21

VSS_207

R21

VSS_208

M21

VSS_209

J21

VSS_210

G21

VSS_211

BC20

VSS_212

BA20

VSS_213

AW20

VSS_214

AT20

VSS_215

AJ20

VSS_216

AG20

VSS_217

Y20

VSS_218

N20

VSS_219

K20

VSS_220

F20

VSS_221

C20

VSS_222

A20

VSS_223

BG19

VSS_224

A18

VSS_225

BG17

VSS_226

BC17

VSS_227

AW17

VSS_228

AT17

VSS_229

BA16

AU16 AN16

BG15 AC15

W15

BG14 AA14

BG13 BC13 BA13

AN13

AJ13

AE13

BF12 AV12 AT12

AM12

AA12

BD11 BB11 AY11 AN11 AH11

BG10 AV10 AT10

AJ10 AE10 AA10

AM9

R17 M17 H17 C17

N16 K16 G16 E16

A15

C14

N13

G13 E13

A12

Y11 N11 G11 C11

M10 BF9 BC9 AN9

AD9

BH8 BB8 AV8 AT8

L13

J12

G9

B9

VSS_230 VSS_231 VSS_232 VSS_233

VSS_235

VSS_237 VSS_238 VSS_239 VSS_240 VSS_241 VSS_242 VSS_243 VSS_244 VSS_245 VSS_246 VSS_247 VSS_248 VSS_249 VSS_250 VSS_251 VSS_252

VSS_255 VSS_256 VSS_257 VSS_258 VSS_259 VSS_260 VSS_261 VSS_262 VSS_263 VSS_264 VSS_265 VSS_266 VSS_267 VSS_268 VSS_269 VSS_270 VSS_271 VSS_272 VSS_273

VSS_275 VSS_276 VSS_277 VSS_278 VSS_279 VSS_280 VSS_281 VSS_282 VSS_283 VSS_284 VSS_285 VSS_286 VSS_287 VSS_288 VSS_289 VSS_290 VSS_291 VSS_292 VSS_293 VSS_294 VSS_295 VSS_296

CANTIGA_1p0

VSS

VSS NCTF

VSS SCB

NC

VSS_297 VSS_298 VSS_299 VSS_300 VSS_301 VSS_302 VSS_303 VSS_304 VSS_305 VSS_306 VSS_307 VSS_308 VSS_309 VSS_310 VSS_311 VSS_312 VSS_313 VSS_314 VSS_315 VSS_316 VSS_317 VSS_318 VSS_319 VSS_320 VSS_321 VSS_322 VSS_323 VSS_324 VSS_325

VSS_327 VSS_328 VSS_329 VSS_330 VSS_331 VSS_332 VSS_333 VSS_334 VSS_335 VSS_336 VSS_337 VSS_338 VSS_339 VSS_340 VSS_341 VSS_342 VSS_343 VSS_344 VSS_345 VSS_346 VSS_347 VSS_348 VSS_349 VSS_350

VSS_351 VSS_352 VSS_353 VSS_354

VSS_NCTF_1 VSS_NCTF_2 VSS_NCTF_3 VSS_NCTF_4 VSS_NCTF_5 VSS_NCTF_6 VSS_NCTF_7 VSS_NCTF_8

VSS_NCTF_9 VSS_NCTF_10 VSS_NCTF_11 VSS_NCTF_12 VSS_NCTF_13 VSS_NCTF_14 VSS_NCTF_15 VSS_NCTF_16

VSS_SCB_1 VSS_SCB_2 VSS_SCB_3 VSS_SCB_4 VSS_SCB_5

NC_26 NC_27 NC_28 NC_29 NC_30 NC_31 NC_32 NC_33 NC_34 NC_35 NC_36 NC_37 NC_38 NC_39 NC_40 NC_41 NC_42

2

AH8 Y8 L8 E8 B8 AY7 AU7 AN7 AJ7 AE7 AA7 N7 J7 BG6 BD6 AV6 AT6 AM6 M6 C6 BA5 AH5 AD5 Y5 L5 J5 H5 F5 BE4

BC3 AV3 AL3 R3 P3 F3 BA2 AW2 AU2 AR2 AP2 AJ2 AH2 AF2 AE2 AD2 AC2 Y2 M2 K2 AM1 AA1 P1 H1

U24 U28 U25 U29

AF32 AB32 V32 AJ30 AM29 AF29 AB29 U26 U23 AL20 V20 AC19 AL17 AJ17 AA17 U17

BH48 BH1 A48 C1 A3

E1 D2 C3 B4 A5 A6 A43 A44 B45 C46 D47 B47 A46 F48 E48 C48 B48

1

Security Classification

Issued Date

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

http://laptop-motherboard-schematic.blogspot.com/

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2006/02/13 2008/6/05

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

Cantiga(6/6)-PWR/GND

LA-4671P

1

1.0

12 53Friday, February 20, 2009

1.0

of

5

DDR_A_DQS#[0..7]8

DDR_A_D[0..63]8

DDR_A_DM[0..7]8

DDR_A_DQS[0..7]8

DDR_A_MA[0..13]8

D D

Layout Note: Place near JDIM2

+1.8V

2.2U_0603_6.3V6K

C105

1

2

Layout Note:

C C

Place one cap close to every 2 pullup resistors terminated to +0.9V

+0.9VS

0.1U_0402_16V4Z

B B

DDR_A_MA8 DDR_A_MA5

DDR_A_MA1 DDR_A_MA3

DDR_A_RAS# DDR_CS0_DIMMA#

DDR_A_BS#0

A A

DDR_A_MA10

DDR_A_CAS# DDR_A_WE#

DDR_CS1_DIMMA# M_ODT1

DDR_CKE1_DIMMA

2.2U_0603_6.3V6K

1

2

C106

C124

1

2

0.1U_0402_16V4Z

1

2

C125

RP14

RP13

RP7

RP6

RP5

RP1

R96 56_0402_5%

2.2U_0603_6.3V6K

C149

1

2

0.1U_0402_16V4Z

1

2

C126

1 4 2 3

56_0404_4P2R_5%

1 4 2 3

56_0404_4P2R_5%

1 4 2 3

56_0404_4P2R_5%

1 4 2 3

56_0404_4P2R_5%

1 4 2 3

56_0404_4P2R_5%

2 3 1 4

56_0404_4P2R_5%

1 2

5

2.2U_0603_6.3V6K

C166

1

2

0.1U_0402_16V4Z

1

2

C127

+0.9VS

2.2U_0603_6.3V6K

C169

1

2

0.1U_0402_16V4Z

1

2

C150

RP22 56_0404_4P2R_5%RP22 56_0404_4P2R_5%

RP17 56_0404_4P2R_5%RP17 56_0404_4P2R_5%

RP15 56_0404_4P2R_5%RP15 56_0404_4P2R_5%

RP16 56_0404_4P2R_5%RP16 56_0404_4P2R_5%

RP8 56_0404_4P2R_5%RP8 56_0404_4P2R_5%

RP2 56_0404_4P2R_5%RP2 56_0404_4P2R_5%

RP23 56_0404_4P2R_5%RP23 56_0404_4P2R_5%

0.1U_0402_16V4Z

C154

1

2

0.1U_0402_16V4Z

1

2

C151

C167

DDR_CKE0_DIMMA

14

DDR_A_MA12

23

DDR_A_MA6

14

DDR_A_MA7

23

DDR_A_BS#2

14

DDR_A_MA9

23

DDR_A_MA2

14

DDR_A_MA4

23

DDR_A_MA0

14

DDR_A_BS#1

23

M_ODT0

14

DDR_A_MA13

23

DDR_A_MA11

14

DDR_A_MA14

23

0.1U_0402_16V4Z

C131

C130

1

2

0.1U_0402_16V4Z

1

2

C107

C128

330U_D2_2.5VY_R9M

0.1U_0402_16V4Z

C108

1

2

0.1U_0402_16V4Z

1

2

C129

C152

Layout Note: Place these resistor closely JDIM2,all trace length Max=1.5"

4

1

C84

+

@

2

DDR_CKE0_DIMMA7

DDR_A_BS#28

DDR_A_BS#08

DDR_A_WE#8

DDR_A_CAS#8

0.1U_0402_16V4Z

1

2

C153

C168

DDR_CS1_DIMMA#7

M_ODT17

ICH_SM_DA14,15,19,23

ICH_SM_CLK14,15,19,23

+3VS

0.1U_0402_16V4Z

+1.8V

DDR_A_D4 DDR_A_D1

DDR_A_DQS#0 DDR_A_DQS0

DDR_A_D2 DDR_A_D3

DDR_A_D8 DDR_A_D9

DDR_A_DQS#1 DDR_A_DQS1

DDR_A_D14

DDR_A_D16 DDR_A_D17

DDR_A_DQS#2 DDR_A_DQS2

DDR_A_D18 DDR_A_D19

DDR_A_D29 DDR_A_D24

DDR_A_DM3

DDR_A_D26 DDR_A_D27

DDR_CKE0_DIMMA

DDR_A_BS#2

DDR_A_MA12

DDR_A_MA8

DDR_A_MA5 DDR_A_MA3 DDR_A_MA1

DDR_A_MA10 DDR_A_BS#0

DDR_A_CAS# DDR_CS1_DIMMA#

M_ODT1

DDR_A_D37 DDR_A_D36

DDR_A_DQS#4 DDR_A_DQS4

DDR_A_D35 DDR_A_D34

DDR_A_D40 DDR_A_D44

DDR_A_DM5

DDR_A_D41 DDR_A_D46

DDR_A_D49 DDR_A_D48

DDR_A_DQS#6 DDR_A_DQS6

DDR_A_D54 DDR_A_D50

DDR_A_D61 DDR_A_D60

DDR_A_DM7

DDR_A_D59 DDR_A_D58

CLK_SMBDATA CLK_SMBCLK

1

C58

2

3

1

C59

2.2U_0603_6.3V6K

2

JDIM2

1

VREF

3

VSS

5

DQ0

7

DQ1

9

VSS

11

DQS0#

13

DQS0

15

VSS

17

DQ2

19

DQ3

21

VSS

23

DQ8

25

DQ9

27

VSS

29

DQS1#

31

DQS1

33

VSS

35

DQ10

37

DQ11

39

VSS

41

VSS

43

DQ16

45

DQ17

47

VSS

49

DQS2#

51

DQS2

53

VSS

55

DQ18

57

DQ19

59

VSS

61

DQ24

63

DQ25

65

VSS

67

DM3

69

NC

71

VSS

73

DQ26

75

DQ27

77

VSS

79

CKE0

81

VDD

83

NC

85

BA2

87

VDD

89

A12

91

A9

93

A8

95

VDD

97

A5

99

A3

101

A1

103

VDD

105

A10/AP

107

BA0

109

WE#

111

VDD

113

CAS#

115

NC/S1#

117

VDD

119

NC/ODT1

121

VSS

123

DQ32

125

DQ33

127

VSS

129

DQS4#

131

DQS4

133

VSS

135

DQ34

137

DQ35

139

VSS

141

DQ40

143

DQ41

145

VSS

147

DM5

149

VSS

151

DQ42

153

DQ43

155

VSS

157

DQ48

159

DQ49

161

VSS

163

NC,TEST

165

VSS

167

DQS6#

169

DQS6

171

VSS

173

DQ50

175

DQ51

177

VSS

179

DQ56

181

DQ57

183

VSS

185

DM7

187

VSS

189

DQ58

191

DQ59

193

VSS

195

SDA

197

SCL

199

VDDSPD

FOX_ASOA426-M2RN-7F

CONN@

SO-DIMM A

REVERSE

VSS DQ4 DQ5 VSS DM0 VSS DQ6 DQ7

VSS DQ12 DQ13

VSS

DM1

VSS

CK0 CK0#

VSS DQ14 DQ15

VSS

VSS DQ20 DQ21

VSS

DM2

VSS DQ22 DQ23

VSS DQ28 DQ29

VSS

DQS3#

DQS3

VSS DQ30 DQ31

VSS

NC/CKE1

VDD

NC/A15 NC/A14

VDD

BA1

RAS#

VDD

ODT0

NC/A13

VDD

VSS DQ36 DQ37

VSS

DM4

VSS DQ38 DQ39

VSS DQ44 DQ45

VSS

DQS5#

DQS5

VSS DQ46 DQ47

VSS DQ52 DQ53

VSS

CK1 CK1#

VSS

DM6

VSS DQ54 DQ55

VSS DQ60 DQ61

VSS

DQS7#

DQS7

VSS DQ62 DQ63

VSS

SA0

SA1

2

Close to VREF pins of SO-DIMM

0.1U_0402_16V4Z

2.2U_0805_16V4Z

2

DDR_A_D5

4

DDR_A_D0

6 8

DDR_A_DM0

10 12

DDR_A_D6

14

DDR_A_D7

16 18

DDR_A_D13

20

DDR_A_D12

22 24

DDR_A_DM1

26 28

M_CLK_DDR0

30

M_CLK_DDR#0

32 34

DDR_A_D11

36

DDR_A_D10DDR_A_D15

38 40

42

DDR_A_D20

44

DDR_A_D21

46 48 50

NC

A11

A7 A6

A4 A2 A0

S0#

NC

52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200

DDR_A_DM2

DDR_A_D23 DDR_A_D22

DDR_A_D28 DDR_A_D25

DDR_A_DQS#3 DDR_A_DQS3

DDR_A_D31 DDR_A_D30

DDR_CKE1_DIMMA

DDR_A_MA14

DDR_A_MA11 DDR_A_MA7DDR_A_MA9 DDR_A_MA6

DDR_A_MA4 DDR_A_MA2 DDR_A_MA0

DDR_A_BS#1 DDR_A_RAS# DDR_CS0_DIMMA#DDR_A_WE#

M_ODT0 DDR_A_MA13

DDR_A_D32 DDR_A_D33

DDR_A_DM4

DDR_A_D39 DDR_A_D38

DDR_A_D45 DDR_A_D47

DDR_A_DQS#5 DDR_A_DQS5

DDR_A_D43 DDR_A_D42

DDR_A_D52 DDR_A_D53

M_CLK_DDR1 M_CLK_DDR#1

DDR_A_DM6

DDR_A_D51 DDR_A_D55

DDR_A_D57 DDR_A_D56

DDR_A_DQS#7 DDR_A_DQS7

DDR_A_D62 DDR_A_D63

12

R32

R31

10K_0402_5%

12

2.2U_0805_16V4Z

C201

1

2

M_CLK_DDR0 7 M_CLK_DDR#0 7

PM_EXTTS#0 7

DDR_CKE1_DIMMA 7

DDR_A_MA14 8

DDR_A_BS#1 8 DDR_A_RAS# 8 DDR_CS0_DIMMA# 7

M_ODT0 7

M_CLK_DDR1 7 M_CLK_DDR#1 7

Bottom side

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONIC S, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONIC S, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

http://laptop-motherboard-schematic.blogspot.com/

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/1/15 2008/6/05

3

Compal Secret Data

Deciphered Date

Title

DDR2 SO-DIMM I

Size Document Number Rev

Custom

LA-4671P

Date: Sheet

2

Date: Sheet

1

+V_DDR_MCH_REF 7,14

C220

1

2

Compal Electronics, Inc.

1

1.0

13 53Friday, February 20, 2009

1.0

of

5

DDR_B_DQS#[0..7]8

DDR_B_D[0..63]8

DDR_B_DM[0..7]8

DDR_B_DQS[0..7]8

DDR_B_MA[0..13]8

D D

Layout Note: Place near JDIM1

+1.8V

2.2U_0603_6.3V6K

C160

1

2

0.1U_0402_16V4Z

1

2

C135

C156

56_0404_4P2R_5%

5

2.2U_0603_6.3V6K

C138

1

2

0.1U_0402_16V4Z

1

2

C157

+0.9VS

RP24 56_0404_4P2R_5%RP 24 56_0404_4P2R_5%

RP26 56_0404_4P2R_5%RP 26 56_0404_4P2R_5%

RP19 56_0404_4P2R_5%RP 19 56_0404_4P2R_5%

RP21 56_0404_4P2R_5%RP 21 56_0404_4P2R_5%

RP20 56_0404_4P2R_5%RP 20 56_0404_4P2R_5%

RP4 56_0404_4P2R_5%RP4 56_0404_4P2R_5%

RP25

56_0404_4P2R_5%

2.2U_0603_6.3V6K

1

2

0.1U_0402_16V4Z

1

2

0.1U_0402_16V4Z

C177

0.1U_0402_16V4Z

1

2

C170

DDR_B_MA12

14

DDR_B_MA9

23

DDR_B_MA11

14

DDR_B_MA14

23

DDR_B_MA8

14

DDR_B_MA5

23

DDR_B_MA7

14

DDR_B_MA6

23

DDR_B_MA2

14

DDR_B_MA4

23

M_ODT2

14

DDR_B_MA13

23

DDR_CKE2_DIMMB

14

DDR_B_BS#2

23

0.1U_0402_16V4Z

C132

C109

1

2

0.1U_0402_16V4Z

1

2

C136

C171

C136

C111

2.2U_0603_6.3V6K

Layout Note: Place one cap close to every 2 pullup resistors terminated to +0.9VS

C C

+0.9VS

0.1U_0402_16V4Z

B B

DDR_B_MA3 DDR_B_MA1

DDR_B_BS#0 DDR_B_MA10

DDR_B_MA0 DDR_B_BS#1

DDR_B_RAS# DDR_CS2_DIMMB#

A A

DDR_B_CAS# DDR_B_WE#

DDR_CS3_DIMMB# M_ODT3

DDR_CKE3_DIMMB

C112

1

2

1

2

C110

C139

1

2

0.1U_0402_16V4Z

1

2

C134

RP18

RP10

RP12

RP11

RP9

RP3

R335 56_0402_5%

1 4 2 3

2 3 1 4

1 2

4

0.1U_0402_16V4Z

C133

1

2

0.1U_0402_16V4Z

1

2

C158

330U_D2_2.5VY_R9M

1

C155

C189

1

+

@

2

0.1U_0402_16V4Z

1

2

Layout Note: Place these resistor closely JDIM1,all trace length Max=1.5"

http://laptop-motherboard-schematic.blogspot.com/

4

@

2

DDR_CKE2_DIMMB7

DDR_B_BS#28

DDR_B_BS#08

0.1U_0402_16V4Z

1

2

C172

C137

C159

DDR_B_CAS#8

DDR_CS3_DIMMB#7

M_ODT37

ICH_SM_DA13,15,19,23

ICH_SM_CLK13,15,19,23

0.1U_0402_16V4Z

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONIC S, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONIC S, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

+1.8V

JDIM1

1

VREF

3

DDR_B_D0 DDR_B_D1

DDR_B_DQS#0 DDR_B_DQS0

DDR_B_D2 DDR_B_D3

DDR_B_D8 DDR_B_D9

DDR_B_DQS#1 DDR_B_DQS1

DDR_B_D10 DDR_B_D11

DDR_B_D17 DDR_B_D20

DDR_B_DQS#2 DDR_B_DQS2

DDR_B_D18 DDR_B_D19

DDR_B_D28 DDR_B_D25

DDR_B_DM3

DDR_B_D30 DDR_B_D31

DDR_CKE2_DIMMB

DDR_B_BS#2

DDR_B_MA12 DDR_B_MA9 DDR_B_MA8

DDR_B_MA5 DDR_B_MA3 DDR_B_MA1

DDR_B_MA10 DDR_B_BS#0 DDR_B_WE#

DDR_B_CAS# DDR_CS3_DIMMB#

M_ODT3

DDR_B_D32 DDR_B_D33

DDR_B_DQS#4 DDR_B_DQS4

DDR_B_D34 DDR_B_D35

DDR_B_D40 DDR_B_D41

DDR_B_DM5

DDR_B_D42 DDR_B_D43

DDR_B_D48 DDR_B_D49

DDR_B_DQS#6 DDR_B_DQS6

DDR_B_D51 DDR_B_D50

DDR_B_D56 DDR_B_D61

DDR_B_DM7

DDR_B_D59 DDR_B_D58

CLK_SMBDATA CLK_SMBCLK

+3VS

1

C61

1

C60

2.2U_0603_6.3V6K

2

2007/1/15 2008/6/05

3

VSS

5

DQ0

7

DQ1

9

VSS

11

DQS0#

13

DQS0

15

VSS

17

DQ2

19

DQ3

21

VSS

23

DQ8

25

DQ9

27

VSS

29

DQS1#

31

DQS1

33

VSS

35

DQ10

37

DQ11

39

VSS

41

VSS

43

DQ16

45

DQ17

47

VSS

49

DQS2#

51

DQS2

53

VSS

55

DQ18

57

DQ19

59

VSS

61

DQ24

63

DQ25

65

VSS

67

DM3

69

NC

71

VSS

73

DQ26

75

DQ27

77

VSS

79

CKE0

81

VDD

83

NC

85

BA2

87

VDD

89

A12

91

A9

93

A8

95

VDD

97

A5

99

A3

101

A1

103

VDD

105

A10/AP

107

BA0

109

WE#

111

VDD

113

CAS#

115

NC/S1#

117

VDD

119

NC/ODT1

121

VSS

123

DQ32

125

DQ33

127

VSS

129

DQS4#

131

DQS4

133

VSS

135

DQ34

137

DQ35

139

VSS

141

DQ40

143

DQ41

145

VSS

147

DM5

149

VSS

151

DQ42

153

DQ43

155

VSS

157

DQ48

159

DQ49

161

VSS

163

NC,TEST

165

VSS

167

DQS6#

169

DQS6

171

VSS

173

DQ50

175

DQ51

177

VSS

179

DQ56

181

DQ57

183

VSS

185

DM7

187

VSS

189

DQ58

191

DQ59

193

VSS

195

SDA

197

SCL

199

VDDSPD

FOX_AS0A426-NARN-7F~N

CONN@

SO-DIMM B REVERSE

Bottom side

Compal Secret Data

Deciphered Date

VSS DQ4 DQ5 VSS DM0 VSS DQ6 DQ7

VSS DQ12 DQ13

VSS

DM1

VSS

CK0 CK0#

VSS DQ14 DQ15

VSS

VSS DQ20 DQ21

VSS

DM2

VSS DQ22 DQ23

VSS DQ28 DQ29

VSS

DQS3#

DQS3

VSS DQ30 DQ31

VSS

NC/CKE1

VDD

NC/A15 NC/A14

VDD

BA1

RAS#

VDD

ODT0

NC/A13

VDD

VSS DQ36 DQ37

VSS

DM4

VSS DQ38 DQ39

VSS DQ44 DQ45

VSS

DQS5#

DQS5

VSS DQ46 DQ47

VSS DQ52 DQ53

VSS

CK1 CK1#

VSS

DM6

VSS DQ54 DQ55

VSS DQ60 DQ61

VSS

DQS7#

DQS7

VSS DQ62 DQ63

VSS

SAO

SA1

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40

42 44 46 48 50

NC

52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90

A11

92

A7

94

A6

96 98

A4

100

A2

102

A0

104 106 108 110

S0#

112 114 116 118 120

NC

122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200

2

+V_DDR_MCH_REF

DDR_B_D5 DDR_B_D4

DDR_B_DM0

DDR_B_D6 DDR_B_D7

DDR_B_D12 DDR_B_D13

DDR_B_DM1

M_CLK_DDR2 M_CLK_DDR#2

DDR_B_D14 DDR_B_D15

DDR_B_D21 DDR_B_D16

DDR_B_DM2

DDR_B_D22 DDR_B_D23

DDR_B_D29 DDR_B_D24

DDR_B_DQS#3 DDR_B_DQS3

DDR_B_D26 DDR_B_D27

DDR_CKE3_DIMMB

DDR_B_MA14

DDR_B_MA11 DDR_B_MA7 DDR_B_MA6

DDR_B_MA4 DDR_B_MA2 DDR_B_MA0

DDR_B_BS#1 DDR_B_RAS# DDR_CS2_DIMMB#

M_ODT2 DDR_B_MA13

DDR_B_D36 DDR_B_D37

DDR_B_DM4

DDR_B_D39 DDR_B_D38

DDR_B_D44 DDR_B_D45

DDR_B_DQS#5 DDR_B_DQS5

DDR_B_D46 DDR_B_D47

DDR_B_D52 DDR_B_D53

M_CLK_DDR3 M_CLK_DDR#3

DDR_B_DM6

DDR_B_D54 DDR_B_D55

DDR_B_D60 DDR_B_D57

DDR_B_DQS#7 DDR_B_DQS7

DDR_B_D62 DDR_B_D63

10K_0402_5%

2

Close to VREF pins of SO-DIMM

2.2U_0805_16V4Z

1

2

M_CLK_DDR2 7 M_CLK_DDR#2 7

PM_EXTTS#1 7

DDR_CKE3_DIMMB 7

DDR_B_MA14 8

DDR_B_BS#1 8 DDR_B_RAS# 8 DDR_CS2_DIMMB# 7DDR_B_WE#8

M_ODT2 7

M_CLK_DDR3 7 M_CLK_DDR#3 7

R33

1 2

12

10K_0402_5%

R34

Title

DDR2 SO-DIMM II

Size Document Number Rev

Custom

LA-4671P

Date: Sheet

1

0.1U_0402_16V4Z

1

C222

C221

2

+3VS

+V_DDR_MCH_REF 7,13

Compal Electronics, Inc.

1

1.0

14 53Friday, February 20, 2009

1.0

of

5

PCI

SRC

CPU

CLKSEL1

0

FSA

CLKSEL0

MHz

266

MHz

1000

MHz

33.30

14.318 96.0 48.0

DOT_96 MHz

FSC FSB REF

CLKSEL2

0 1000 133 33.31 14.318 96.0 48.0

0 1001 200 33.30 14.318 96.0 48.0

D D

0 1001 166 33.31 14.318 96.0 48.0

1 1000 333 33.30 14.318 96.0 48.0

1 1000 100 33.31 14.318 96.0 48.0

1 1001 400 33.30 14.318 96.0 48.0

111

R983

FSA

1 2

2.2K_0402_5%

CPU_BSEL05

C C

CPU_BSEL1

CPU_BSEL15

1 2

R984

R984 1K_0402_5%

1K_0402_5%

1 2

R998

R998 1K_0402_5%

1K_0402_5%

Reserved

MCH_CLKSEL0 7

SB, MINI PCI

MCH_CLKSEL1 7

CLK_14M_ICH19

ICH_SM_CLK13,14,19,23

CLK_DEBUG_PORT123 CLK_DEBUG_PORT223 CLK_PCI_EC26 CLK_PCI_TPM26 PCI_CLK17

0905 Connect PCI_CLK

4

USB MHz

CLK_MCH_BCLK#7

NB

CLK_MCH_BCLK7 CLK_CPU_BCLK#4

CPU

CLK_CPU_BCLK4

CK_PWRGD19

ICH_SM_DA13,14,19,23

R987 0_0402_5%R987 0_0402_5%

R991 33_0402_1%R991 33_0402_1%

R1002 33_0402_1%R1002 33_0402_1% R1001 33_0402_1%R1001 33_0402_1% R1004 33_0402_1%R1004 33_0402_1% R1006 33_0402_5%

R1006 33_0402_5% R1008 33_0402_1%R1008 33_0402_1%

Routing the trace at least 10mil

14.31818MHZ_16P

R988

0_0402_5%

1 2

Y7

12

2

C1196

22P_0402_50V8J

1 2

1 2 1 2 1 2 1 2 1 2

1

R976 0_0402_5%

R976 0_0402_5% R978 0_0402_5%

R978 0_0402_5% R980 0_0402_5%

R980 0_0402_5% R982 0_0402_5%

R982 0_0402_5%

T120PAD T120PAD

1 2 1 2

R_CKPWRGD CPU_BSEL1

CLK_XTAL_OUT CLK_XTAL_IN

FSC

PCI2_TME R_CLK_PCI_EC 27_SEL ITP_EN

CLK_XTAL_OUT

CLK_XTAL_IN

2

C1197

22P_0402_50V8J

1

12 12

+3VS_CK505

3

R_MCH_BCLK# R_MCH_BCLK R_CPU_BCLK# R_CPU_BCLK

U55

1

CKPWRGD/PD#

2

FS_B/TEST_MODE

3

VSS_REF

4

XTAL_OUT

5

XTAL_IN

6

VDD_REF

7

REF_0/FS_C/TEST_

8

REF_1

9

SDA

10

SCL

11

NC

12

VDD_PCI

13

PCI_1

14

PCI_2

15

PCI_3

16

PCI_4/SEL_LCDCL

17

PCIF_5/ITP_EN

18

VSS_PCI

+3VS

+3VS_CK505

70

72

73

71

GND

CPU_0

VDD_CPU

R971

1 2

0_0805_5%

67

68

69

CPU_1

CPU_0#

CPU_1#

VSS_CPU

+3VS_CK505

1

C1189

10U_0805_10V4Z

2

0905 Connect to +VCCP

+1.05VS_CK505

R_PCIE_MEDIA R_PCIE_MEDIA#

60

64

61

63

65

66

CLKREQ_7#

VDD_CPU_IO

58

62

59

SRC_7

SRC_7#

VSS_SRC

VDD_SRC_IO

SRC_8/CPU_ITP

SRC_8#/CPU_ITP#

R_PCIE_EXPR R_PCIE_EXPR#

56

55

57

SRC_6

SRC_6#

VDD_SRC

CLKREQ_6#

1

2

+VCCP

+3VS_CK505

PCI_STOP#

CPU_STOP#

VDD_SRC_IO

SRC_10#

SRC_10

CLKREQ_10#

SRC_11

SRC_11#

CLKREQ_11#

SRC_9#

SRC_9

CLKREQ_9#

VSS_SRC

CLKREQ_4#

SRC_4#

SRC_4

VDD_SRC_IO

CLKREQ_3#

C1190

0.1U_0402_16V4Z

R972

1 2

0_0805_5%

2

1

C1191

0.1U_0402_16V4Z

2

Place close to U55

0.1U_0402_16V4Z

1

C1198

2

10U_0805_10V4Z

R986 0_0402_5%

1 2

R989 0_0402_5%

1 2

R979 0_0402_5%

1 2

R981 0_0402_5%

1 2

+1.05VS_CK505

H_STP_PCI#

54

H_STP_CPU#

53 52 51 50 49

R_PCIE_SATA

48

R_PCIE_SATA#

47

R_CLKSATAREQ#

46

R_CLK_PCIE_LAN#

45

R_CLK_PCIE_LAN

44 43 42 41

R_CLK_PCIE_MCARD#

40

R_CLK_PCIE_MCARD

39 38 37

1

C1192

0.1U_0402_16V4Z

2

1

2

C1200

C1199

2

0.1U_0402_16V4Z

MEDIA_REQ#32 29 CLK_PCIE_MEDIA 29 CLK_PCIE_MEDIA# 29

EXPCARD_REQ#16 25 CLK_PCIE_EXPR 25 CLK_PCIE_EXPR# 25

H_STP_PCI# 19

H_STP_CPU# 19

R992 0_0402_5%R992 0_0402_5%

1 2

R994 0_0402_5%R994 0_0402_5%

1 2

R54 475_0402_1%~DR54 475_0402_1%~D

1 2

R996 0_0402_5%R996 0_0402_5%

1 2

R997 0_0402_5%R997 0_0402_5%

1 2

R1005 0_0402_5%R1005 0_0402_5%

1 2

R1007 0_0402_5%R1007 0_0402_5%

1 2

1

C1193

0.1U_0402_16V4Z

2

10U_0805_10V4Z

1

C1201

2

0.1U_0402_16V4Z

Express Card

CPU_STP

0.1U_0402_16V4Z

1

C1202

2

CLK_PCIE_SATA 18 CLK_PCIE_SATA# 18 CLKSATAREQ# 19 CLK_PCIE_LAN# 21 CLK_PCIE_LAN 21 GLAN_REQ#9 21

WLAN_REQ#4 23 CLK_PCIE_MCARD# 23 CLK_PCIE_MCARD 23

1

C1194

0.1U_0402_16V4Z

2

+1.05VS_CK505

1

C1203

2

0.1U_0402_16V4Z

1

C1195

0.1U_0402_16V4Z

2

0.1U_0402_16V4Z

1

C1204

2

MiniCard_Roboson

ICH_SATA

GLAN

MiniCard_WLAN

C1742

+3VS_CK505

R1013 33_0402_1%R1013 33_0402_1%

B B

CPU_BSEL25

FSC

R1016

1 2

10K_0402_5%

1 2

R1017

R1017 1K_0402_5%

1K_0402_5%

MCH_CLKSEL2 7

NB (UMA)

VGA (Discrete)

ITP_EN

27_SEL

PCI2_TME

A A

12

5

0 = SRC8/SRC8#

1 = ITP/ITP#

0 = Enable DOT96 & SRC1(UMA)

1 = Enable SRC0 & 27MHz(DIS)

0 = Overclocking of CPU and SRC Allowed

1 = Overclocking of CPU and SRC NOT allowed

+3VS_CK505

12

VGA@

R1030

R1030 10K_0402_5%

10K_0402_5%

ITP_EN 27_SEL

12

UMA@

R1032

R1032 10K_0402_5%

10K_0402_5%

UMA@

R1033

R1033 10K_0402_5%

10K_0402_5%

+3VS_CK505

1 2

PCI2_TME

R1031

R1031 10K_0402_5%

10K_0402_5%

http://laptop-motherboard-schematic.blogspot.com/

CLK_48M_ICH19

CLKREQ#_77

CLK_MCH_DREFCLK7 CLK_MCH_DREFCLK#7

CLK_PCIE_VGA30 CLK_PCIE_VGA#30

4

1 2

R53 475_0402_1%~DR53 475_0402_1%~D

R1019 0_0402_5%UMA@R1019 0_0402_5%UMA@ R1021 0_0402_5%UMA@R1021 0_0402_5%UMA@

R1024 0_0402_5%VGA@R1024 0_0402_5%VGA@ R1026 0_0402_5%VGA@R1026 0_0402_5%VGA@

12 12

FSA

R_CLKREQ#_7

+1.05VS_CK505

R_MCH_DREFCLK R_MCH_DREFCLK#

Security Classification

Issued Date

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

VDD_4819USB_0/FS_A20USB_1/CLKREQ_A#21VSS_4822VDD_IO23SRC_0/DOT_9624SRC_0#/DOT_96#25VSS_IO26VDD_PLL327LCDCLK/27M28LCDCLK#/27M_SS29VSS_PLL330VDD_PLL3_IO31SRC_232SRC_2#33VSS_SRC34SRC_335SRC_3#

2006/02/13 2008/6/05

3

S IC ICS9LPRS387AKLFT MLF 72P CLK GEN

36

R_PCIE_ICH# R_PCIE_ICH

R_MCH_3GPLL# R_MCH_3GPLL

+1.05VS_CK505

SSCDREFCLK# SSCDREFCLK

Compal Secret Data

Deciphered Date

R1010 0_0402_5%

1 2

R1012 0_0402_5%

1 2

R1015 0_0402_5%R1015 0_0402_5%

1 2

R1018 0_0402_5%R1018 0_0402_5%

1 2

R1009 33_0402_5%UMA@R1009 33_0402_5%UMA@

1 2

R1011 33_0402_5%UMA@R1011 33_0402_5%UMA@

1 2

R1014 33_0402_5%VGA@R 1014 33_0402_5%VGA@

1 2

R1022 33_0402_5%VGA@R 1022 33_0402_5%VGA@

1 2

2

CLK_PCIE_ICH# 19 CLK_PCIE_ICH 19

CLK_MCH_3GPLL# 7 CLK_MCH_3GPLL 7

MCH_SSCDREFCLK# 7 MCH_SSCDREFCLK 7

CLK_NVSS_27M 30 CLK_NV_27M 30

EXPCARD_REQ#16

MEDIA_REQ#32

CLKSATAREQ#

WLAN_REQ#4

CLKREQ#_7

GLAN_REQ#9

Title

Size Document Number Rev

Date: Sheet

ICH

NB_3GPLL

NB_SSC (UMA)

VGA_27M (DIS)

+3VS

1 2

R90 10K_0402_5%R90 10K_0402_5%

1 2

R89 10K_0402_5%R89 10K_0402_5%

1 2

R88 10K_0402_5%R88 10K_0402_5%

1 2

R85 10K_0402_5%R85 10K_0402_5%

1 2

R60 10K_0402_5%R60 10K_0402_5%

1 2

R63 10K_0402_5%R63 10K_0402_5%

Compal Electronics, Inc.

Clock Generator CK505

LA-4671P

1

of

15 53Friday, February 20, 2009

of

15 53Friday, February 20, 2009

of

15 53Friday, February 20, 2009

1.0

A

D47

@D47

@

DAN217_SC59-3

C R T

VGA@

VGA_CRT_B30

VGA_CRT_G30

VGA_CRT_R30

1 1

2 2

CRT_R9

CRT_G9

CRT_B9

CRT_HSYNC9

VGA_HSYNC30

VGA_VSYNC30

CRT_VSYNC9

12

R1197 0_0402_5%

VGA@

12

R1198 0_0402_5%

VGA@

12

R1199 0_0402_5%

UMA@

12

R1200 0_0402_5%

UMA@

12

R1201 0_0402_5%

UMA@

12

R1202 0_0402_5%

C1447 .1U_0402_16V 7K~DC1447 .1U_0402_16V 7K~D

UMA@

CRT_HSYNC

CRT_VSYNC

UMA@

1 2

R1216 30_0402_1%

VGA@

R1218 0_0402_5%

VGA@

R1220 0_0402_5%

UMA@

1 2

R1221 30_0402_1%

Close to GMCH

12

R1210

R1208

1 2

R1210

R1209

150_0402_1%

CRT_HSYNC_B

12

CRT_VSYNC_B D_CRT_VSYNC

Close to VGA

DAN217_SC59-3

+3VS

CRT_R_C

CRT_G_C

CRT_B_C

1

12

C1441

@

2

150_0402_1%

22P_0402_50V8J

+CRT_VCC

1

5

P

4

OE#

A2Y

G

U62

74AHCT1G125GW_SOT353-5

3

1 2

C1454 .1U_0402_16V 7K~DC1454 .1U_0402_16V 7K~D

D48

@D48

@

DAN217_SC59-3

1

2

3

2

1

C1442

C1443

@

2

22P_0402_50V8J

+CRT_VCC

D49

@D49

@

DAN217_SC59-3

3

2

1 2

BLM18PG330SN1D_0603~D

1 2

BLM18PG330SN1D_0603~D

1 2

BLM18PG330SN1D_0603~D

1

For EMI

@

2

22P_0402_50V8J

R1213 10K_0402_5%R1213 10K _0402_5%

1

5

P

4

OE#

A2Y

G

U6374AHCT1G125GW _SOT353-5 U6374AHCT1G125GW_S OT353-5

3

B

1

For nVIDIA

3

L101

L102

L103

12

D_CRT_HSYNC

CRT_R_L

CRT_G_L

CRT_B_L

C1444

F7 Co-Layout with R1196

1

C1445

2

4.7P_0402_50V8C

1 2

R1211 0_0603_5%

1 2

R1214 0_0603_5%

C1446

4.7P_0402_50V8C

+5VS

MSEN#26

1

2

4.7P_0402_50V8C

HSYNC_L

VSYNC_L

W=40mils

1 2

R1196

R1196 0_1206_5%~D

0_1206_5%~D

F7

21

1.1A_6VDC_FUSE @

C1448

1

2

15P_0402_50V8J~D

+5VS_CRTVCC

C1449

1

2

15P_0402_50V8J~D

C1450

1

2

100P_0402_50V8J

C

D50

2 1

RB411DT146 SOT23

.1U_0402_16V7K~D

C1452

C1451

1

2

100P_0402_50V8J

D

+CRT_VCC

1

C1440

2

C1453

1

2

100P_0402_50V8J

W=40mils

1

2

C1439

.1U_0402_16V7K~D

JCRT1

6

11

1

16

7

17

12

2 8

13

3 9

14

4 10 15

5

CONN@

SUYIN_070549FR015S208CR

VGA_DDC_DATA_C

VGA_DDC_CLK_C

CONN@

R1203

1 2

2K_0402_5%

R1204

1 2

Q3

2K_0402_5%

1 3

SSM3K7002FU_SC70-3

+3VS+CRT_VCC +3VS+CRT_VCC +3VS

R1207

2.2K_0402_5%

S

1 2

R1207

1 2

2.2K_0402_5%

UMA@

12

R1212 0_0402_5%

UMA@

12

R1215 0_0402_5%

VGA@

12

R1217 0_0402_5%

VGA@

12

R1219 0_0402_5%

R1206

2

G

D

S

D

S

2

G

1 3

D

Q1

E

3VDDCDA 9

3VDDCCL 9

VGA_DDCCLK 30

VGA_DDCDATA 30

GMCH_LVDSAC+9

+LCDVDD +5VALW

L C D

R140

R141

1 2 13

D

Q7

2

G

SSM3K7002FU_SC70-3

S

3 3

4 4

GMCH_LVDDEN9

VGA_LVDDEN30

LCD_VCC_TEST_EN26

GMCH_ENBKL9

G7X_ENBKL30

GMCH_LVDDEN

VGA_LVDDEN

CH751H-40PT_SOD323-2 VGA@

LCD_VCC_TEST_EN

EC_ENBKL26

BKOFF#26

A

D9CH751H-40PT_SOD323-2 UMA@D9CH751H-40PT_SOD323-2 UMA@

2 1

D8

2 1

R662

0_0402_5%

EC_ENBKL

BKOFF# DISPOFF#

R658

12

0_0402_5%UMA@

R657

12

0_0402_5%VGA@

R15

10K_0402_5%~D

12

10K_0402_5%~D

EC_ENBKL

R654

2.2K_0402_5%

VGA@

R140

1 2

100_0603_1%~D

47K_0402_5%~D

12

R114 1K_0402_5%~D

13

D

Q9

2

G

12

SSM3K7002FU_SC70-3

S

VGA@

CH751H-40PT_SOD323-2

D26

D25

@D25

@

CH751H-40PT_SOD323-2

R654

100K_0402_5%

UMA@

http://laptop-motherboard-schematic.blogspot.com/

C197

0.047U_0402_16V7K

R15

100K_0402_5%

UMA@

+3VS

21

1

2

12

R21

4.7K_0402_5%

B

W=60mils

+3VS

S

G

2

D

1 3

1

C206

4.7U_0805_10V4Z~D

2

+LCDVDD

@

100P_0402_25V8K

SI2301BDS-T1-E3 1P S OT23

SI2301BDS-T1-E3 1P S OT23 Q6

Q6

W=60mils

+LCDVDD

7.3

+LCDVDD

1

C46

.1U_0402_16V7K~D

2

R12

1 2

0_0805_5%

+3VS

INVT_PWM26 DAC_BRIG26

DISPOFF# DAC_BRIG INVT_PWM

C4

C6

C3

100P_0402_25V8KC4100P_0402_25V8K

100P_0402_25V8KC6100P_0402_25V8K

+LCDVDD_R

EDID_CLK_LCD LVDSA0-

LVDSA1+ LVDSA2-

LVDSAC+ LVDSB0-

LVDSB1+ LVDSB2-

LVDSBC+

+INVPWR_B+ INVT_PWM DAC_BRIG

+3VS

1

C38

0.1U_0402_16V4Z@

2

Close to JLCD1 Pin 5

INVT_PWM

1

D51

DAN217_SC59-3

2

3

+3VS

JLCD1

42

GND41GND

39

37

35

33

31

29

27

25

23

21

19

17

15

13

11

9

7

5

3

1

87242-4001-09 40P

CONN@

C

+LCDVDD_R

40

LCD_CBL_DET#

38

LCD_TST

36

EDID_DAT_LCD

34

LVDSA0+

32

LVDSA1-

30

28

LVDSA2+

26

LVDSAC-

24

22

LVDSB0+

20

LVDSB1-

18

16

LVDSB2+

14

LVDSBC-

12

10

8

+INVPWR_B+

6

DISPOFF#

4

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

LCD_CBL_DET# 26

LCD_TST 26

R19

1 2

0_0805_5%

2

C34

C32

0.1U_0603_50V4Z

1

0.1U_0603_50V4Z

2007/1/15 2008/ 6/05

+B+

Compal Secret Data

Deciphered Date

GMCH_LVDSAC-9

GMCH_LVDSA0+9

GMCH_LVDSA0-9

GMCH_LVDSA1+9

GMCH_LVDSA1-9

GMCH_LVDSA2+9

GMCH_LVDSA2-9

GMCH_LVDSBC+9

GMCH_LVDSBC-9

GMCH_LVDSB0+9

GMCH_LVDSB0-9

GMCH_LVDSB1+9

GMCH_LVDSB1-9

GMCH_LVDSB2+9

GMCH_LVDSB2-9

GMCH_EDID_CLK_LCD9 GMCH_EDID_DAT_LCD9

VGA_LVDSAC+30 VGA_LVDSAC-30

VGA_LVDSA0+30 VGA_LVDSA0-30

VGA_LVDSA1+30 VGA_LVDSA1-30

VGA_LVDSA2+30 VGA_LVDSA2-30

VGA_LVDSBC+30 VGA_LVDSBC-30

VGA_LVDSB0+30 VGA_LVDSB0-30

VGA_LVDSB1+30 VGA_LVDSB1-30

VGA_LVDSB2+30 VGA_LVDSB2-30

VGA_CLK_LCD30 VGA_DAT_LCD30

D

GMCH_LVDSAC+

GMCH_LVDSAC-

GMCH_LVDSA0+

GMCH_LVDSA0-

GMCH_LVDSA1+

GMCH_LVDSA1-

GMCH_LVDSA2+

GMCH_LVDSA2-

GMCH_LVDSBC+

GMCH_LVDSBC-

GMCH_LVDSB0+

GMCH_LVDSB0-

GMCH_LVDSB1+

GMCH_LVDSB1-

GMCH_LVDSB2+

GMCH_LVDSB2-

GMCH_EDID_CLK_LCD GMCH_EDID_DAT_LCD

VGA_LVDSAC+ VGA_LVDSAC-

VGA_LVDSA0+ VGA_LVDSA0-

VGA_LVDSA1+ VGA_LVDSA1-

VGA_LVDSA2+ VGA_LVDSA2-

VGA_LVDSBC+ VGA_LVDSBC-

VGA_LVDSB0+ VGA_LVDSB0-

VGA_LVDSB1+ VGA_LVDSB1-

VGA_LVDSB2+ VGA_LVDSB2-

VGA_CLK_LCD VGA_DAT_LCD

R630 0_0402_5% VGA@R630 0_0402_5% VGA@

1 2

R633 0_0402_5% VGA@R633 0_0402_5% VGA@

1 2

R634 0_0402_5% VGA@R634 0_0402_5% VGA@

1 2

R635 0_0402_5% VGA@R635 0_0402_5% VGA@

1 2

R601 0_0402_5% VGA@R601 0_0402_5% VGA@

1 2

R602 0_0402_5% VGA@R602 0_0402_5% VGA@

1 2

R603 0_0402_5% VGA@R603 0_0402_5% VGA@

1 2

R604 0_0402_5% VGA@R604 0_0402_5% VGA@

1 2

R1230 0_0402_5% VGA@R1230 0_0402_5% VGA@

1 2

R1231 0_0402_5% VGA@R1231 0_0402_5% VGA@

1 2

R1232 0_0402_5% VGA@R1232 0_0402_5% VGA@

1 2

R1233 0_0402_5% VGA@R1233 0_0402_5% VGA@

1 2

R1234 0_0402_5% VGA@R1234 0_0402_5% VGA@

1 2

R1235 0_0402_5% VGA@R1235 0_0402_5% VGA@

1 2

R1236 0_0402_5% VGA@R1236 0_0402_5% VGA@

1 2

R1237 0_0402_5% VGA@R1237 0_0402_5% VGA@

1 2

R644 0_0402_5% VGA@R644 0_0402_5% VGA@

1 2

R645 0_0402_5% VGA@R645 0_0402_5% VGA@

1 2

Compal Electronics, Inc.

Title

CRT CONN/LCD CONN

Size Doc ument Number Rev

Custom

LA-4671P

Date: Sheet

12 12

E

R5080_0402_5% UMA@ R5080_0402_5% UMA@ R5100_0402_5% UMA @ R5100_0402_5% UMA@

R5440_0402_5% UMA@ R5440_0402_5% UMA@ R5700_0402_5% UMA@ R5700_0402_5% UMA@

R5950_0402_5% UMA@ R5950_0402_5% UMA@ R5960_0402_5% UMA@ R5960_0402_5% UMA@

R5970_0402_5% UMA@ R5970_0402_5% UMA@ R5980_0402_5% UMA@ R5980_0402_5% UMA@

R12220_0402_5% UM A@ R12220_0402_5% UMA@ R12230_0402_5% UM A@ R12230_0402_5% UMA@

R12240_0402_5% UM A@ R12240_0402_5% UMA@ R12250_0402_5% UMA@ R12250_0402_5% UMA@

R12260_0402_5% UM A@ R12260_0402_5% UMA@ R12270_0402_5% UMA@ R12270_0402_5% UMA@

R12280_0402_5% UM A@ R12280_0402_5% UMA@ R12290_0402_5% UM A@ R12290_0402_5% UMA@

R5990_0402_5% UMA@ R5990_0402_5% UMA@ R6000_0402_5% UMA@ R6000_0402_5% UMA@

LVDSAC+

LVDSAC-

LVDSA0+

LVDSA0-

LVDSA1+

LVDSA1-

LVDSA2+

LVDSA2-

LVDSBC+

LVDSBC-

LVDSB0+

LVDSB0-

LVDSB1+

LVDSB1-

LVDSB2+

LVDSB2-

EDID_CLK_LCD

EDID_DAT_LCD

LVDSAC+ LVDSAC-

LVDSA0+ LVDSA0-

LVDSA1+ LVDSA1-

LVDSA2+ LVDSA2-

LVDSBC+ LVDSBC-

LVDSB0+ LVDSB0-

LVDSB1+ LVDSB1-

LVDSB2+ LVDSB2-

EDID_CLK_LCD EDID_DAT_LCD

1.0

of

16 53Friday, February 20, 2009

5

+3VS

R1035 8.2K_0402_5%

1 2

R1036 8.2K_0402_5%

1 2

R1037 8.2K_0402_5%

R1038 8.2K_0402_5%

R1039 8.2K_0402_5%

D D

C C

B B

R1039 8.2K_0402_5%

R1040 8.2K_0402_5%

R1041 8.2K_0402_5%

R1042 8.2K_0402_5%

+3VS

R1043 8.2K_0402_5%R1043 8.2K_0402_5%

R1044 8.2K_0402_5%

R1045 8.2K_0402_5%

R1046 8.2K_0402_5%

R1047 8.2K_0402_5%

R1048 8.2K_0402_5%

R1049 8.2K_0402_5%

R1050 8.2K_0402_5%

R1051 8.2K_0402_5%R1051 8.2K_0402_5%

R1052 8.2K_0402_5%R1052 8.2K_0402_5%

R1053 8.2K_0402_5%R1053 8.2K_0402_5%

R1054 8.2K_0402_5%R1054 8.2K_0402_5%

R1056 8.2K_0402_5%R1056 8.2K_0402_5%

PCI_GNT3#

1 2

12

1 2

A16 swap override Strap

Low= A16 swap override Enble High= Default

PCI_DEVSEL#

PCI_STOP#

PCI_TRDY#

PCI_FRAME#

PCI_PLOCK#

PCI_IRDY#

PCI_SERR#

PCI_PERR#

PCI_PIRQA#

PCI_PIRQB#

PCI_PIRQC#

PCI_PIRQD#

PCI_PIRQE#

PCI_PIRQF#

PCI_PIRQG#

PCI_PIRQH#

PCI_REQ0#

PCI_REQ1#

PCI_REQ2#

PCI_REQ3#

PME#

*

4

PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQG# PCI_PIRQD#

Boot BIOS Strap

PCI_GNT0# SPI_CS#1

U56B

D11

AD0

C8 D9

E12

E9 C9

E10

B7 C7 C5

G11

F8

F11

E7 A3 D2

F10

D5

D10

B3 F7 C3 F3 F4 C1 G7 H7 D1 G5 H6 G1 H3

J5

E1

J6

PCI

AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31

Interrupt I/F

PIRQA# PIRQB# PIRQC# PIRQD#C4PIRQH#/GPIO5

ICH9M REV 1.0

REQ1#/GPIO50 GNT1#/GPIO51 REQ2#/GPIO52 GNT2#/GPIO53 REQ3#/GPIO54 GNT3#/GPIO55

PIRQE#/GPIO2 PIRQF#/GPIO3

PIRQG#/GPIO4

Boot BIOS Location

REQ0#

GNT0#

C/BE0# C/BE1# C/BE2# C/BE3#

IRDY#

PAR

PCIRST#

DEVSEL#

PERR#

PLOCK#

SERR# STOP#

TRDY#

FRAME#

PLTRST#

PCICLK

PME#

3

PCI_REQ0#

F1

PCI_GNT0#

G4

PCI_REQ1#

B6 A7

PCI_REQ2#

F13 F12

PCI_REQ3#

E6

PCI_GNT3#

F6

D8 B4 D6 A5

PCI_IRDY#

D3 E3

PCI_PCIRST#

R1

PCI_DEVSEL#

C6

PCI_PERR#

E4

PCI_PLOCK#

C2

PCI_SERR#

J4

PCI_STOP#

A4

PCI_TRDY#

F5

PCI_FRAME#

D7

PCI_PLTRST#

C14

PCI_CLK

D4 R2

H4 K6 F2 G2

PME#

PCI_PIRQE# PCI_PIRQF#

PCI_PIRQH#

C2

12

R10 33_0402_5%@R10 33_0402_5%@

@

22P_0402_50V8J

PCI_CLK 15

1 2

PCI_CLK

2

PCI_PCIRST#

C101

.1U_0402_16V7K~D

R1112

R1112 0_0402_5%

0_0402_5%

+3VALW

1

@

2

5

2

P

B

1

A

G

3

12

U61

@ U61

@

PCI_RST#

4

Y

MC74VHC1G08DFT2G SC70 5P

1

PCI_RST# 21,23,25

R1060

@R1060

@

1 2

SPI

PCI

LPC

*

PCI_PLTRST#

1K_0402_5%

Security Classification

Issued Date

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2006/02/13 2008/6/05

Compal Secret Data

Deciphered Date

2

+3VALW

1

C1251

@C1251

@

0.1U_0402_16V4Z

2

5

U58

@ U58

@

2

P

B

1

A

R1061

R1061 0_0402_5%

0_0402_5%

12

Title

Size Document Number Rev

Date: Sheet

PLT_RST#

4

Y

G

MC74VHC1G08DFT2G SC70 5P

3

Compal Electronics, Inc.

ICH9(1/4)-PCI/INT

LA-4671P

12

R1059

R1059 100K_0402_5%

100K_0402_5%

1

PLT_RST# 7,26,29,30

of

17 53Friday, February 20, 2009

of

17 53Friday, February 20, 2009

of

17 53Friday, February 20, 2009

1.0

PCI_GNT3#

R1055

@R1055

@

1 2

1K_0402_5%

0

1

A A

5

http://laptop-motherboard-schematic.blogspot.com/

4

1

0

1

PCI_GNT0#

5

4

3

2

1

+RTCVCC

1 2

R1062 1M_0402_5%R1062 1M_0402_5%

1 2

R1064 332K_0402_1%~DR1064 332K_0402_1%~D

1 2

R1065 332K_0402_1%~DR1065 332K_0402_1%~D

D D

R1069

C C

C1211

12P_0402_50V8J

B B

1 2

10M_0402_5%

1

2

1

IN

2

32.768KHZ QTFM28-32768K125P10L

SM_INTRUDER#

LAN100_SLP

ICH_INTVRMEN

+RTCVCC

1 2

R1068 20K_0402_5%R1068 20K_0402_5%

1 2

R1109 20K_0402_5%R1109 20K_0402_5%

1

C1220

1U_0603_10V4Z

ICH_RTCX1

ICH_RTCX2

1

C1212

15P_0402_50V8J

2

4

OUT

NC3NC

Y8

HDD

ODD

ACZ_BITCLK24 ACZ_SYNC24

ACZ_RST#24

ADC_ACZ_SDIN024

ACZ_SDOUT24

PSATA_IRX_DTX_N0_C22

PSATA_IRX_DTX_P0_C22 PSATA_ITX_DRX_N022 PSATA_ITX_DRX_P022

ODD_IRX_DTX_N0_C22

ODD_IRX_DTX_P0_C22 ODD_ITX_DRX_N022 ODD_ITX_DRX_P022

JOPEN2@JOPEN2

@

1U_0603_10V4Z

1 2

2

+1.5VS

SATA_LED#27

+3VS

1

C1210

2

R1073 24.9_0402_1%R1073 24.9_0402_1%

R1074 33_0402_5%

R1074 33_0402_5% R1076 33_0402_5%

R1076 33_0402_5%

R1077 33_0402_5%

R1079 33_0402_5%

1 2

R1080 10K_0402_5%R1080 10K_0402_5%

PSATA_ITX_DRX_N0 PSATA_ITX_DRX_P0

C1213

C1213 C1214

C1214

C1215

C1216

JOPEN1@JOPEN1

@

1 2

1 2 1 2

1 2

0.01U_0402_16V7K

1 2 1 2

0.01U_0402_16V7K

1 2 1 2

0.01U_0402_16V7K

T123PAD T123PAD T124PAD T124PAD

PSATA_ITX_DRX_N0_C PSATA_ITX_DRX_P0_C

ODD_ITX_DRX_N0_CODD_ITX_DRX_N0 ODD_ITX_DRX_P0_CODD_ITX_DRX_P0

ICH_RTCX1 ICH_RTCX2

ICH_RTCRST# SRTCRST# SM_INTRUDER#

ICH_INTVRMEN LAN100_SLP

GLAN_COMP

HDA_BITCLK HDA_SYNC

HDARST#

ADC_ACZ_SDIN0

HDA_SDOUT

SATA_LED#

U56A

C23

RTCX1

C24

RTCX2

A25

RTCRST#

F20

SRTCRST#

C22

INTRUDER#

B22

INTVRMEN

A22

LAN100_SLP

E25

GLAN_CLK

C13

LAN_RSTSYNC

F14

LAN_RXD0

G13

LAN_RXD1

D14

LAN_RXD2

D13

LAN_TXD0

D12

LAN_TXD1

E13

LAN_TXD2

B10

GPIO56

B28

GLAN_COMPI

B27

GLAN_COMPO

AF6

HDA_BIT_CLK

AH4

HDA_SYNC

AE7

HDA_RST#

AF4

HDA_SDIN0

AG4

HDA_SDIN1

AH3

HDA_SDIN2

AE5

HDA_SDIN3

AG5

HDA_SDOUT

AG7

HDA_DOCK _EN#/GPIO33

AE8

HDA_DOCK_RST#/GPIO34

AG8

SATALED#

AJ16

SATA0RXN

AH16

SATA0RXP

AF17

SATA0TXN

AG17

SATA0TXP

AH13

SATA1RXN

AJ13

SATA1RXP

AG14

SATA1TXN

AF14

SATA1TXP

ICH9M REV 1.0

RTCLAN / GLANIHDASATA

LPCCPU

RTCLAN / GLANIHDASATA

LPCCPU

FWH0/LAD0 FWH1/LAD1 FWH2/LAD2 FWH3/LAD3

FWH4/LFRAME#

LDRQ0#

LDRQ1#/GPIO23

A20GATE

A20M#

DPRSTP#

DPSLP#

FERR#

CPUPWRGD

IGNNE#

INIT#

INTR

RCIN#

SMI#

STPCLK#

THRMTRIP#

TP12

SATA4RXN

SATA4RXP SATA4TXN SATA4TXP

SATA5RXN

SATA5RXP SATA5TXN SATA5TXP

SATA_CLKN SATA_CLKP

SATARBIAS#

SATARBIAS

LPC_AD0

K5

LPC_AD1

K4

LPC_AD2

L6

LPC_AD3

K2

LPC_FRAME#

K3

LPC_DRQ0#

J3 J1

GATEA20

N7

H_A20M#

AJ27

AJ25

H_DPSLP#

AE23

R_H_FERR#

AJ26

H_PWRGOOD

AD22

H_IGNNE#

AF25

H_INIT#

AE22

H_INTR

AG25

KB_RST#

L3

H_NMI

AF23

NMI

H_SMI#

AF24

H_STPCLK#

AH27

THRMTRIP_ICH#

AG26

AG27

AH11 AJ11 AG12 AF12

AH9 AJ9 AE10 AF10

CLK_PCIE_SATA#

AH18

CLK_PCIE_SATA

AJ18

AJ7

R1081

AH7

1 2

24.9_0402_1%

Within 500 mils

LPC_AD[0..3] 23,26

LPC_FRAME# 23,26

T121 PADT121 PAD T122 PADT122 PAD

GATEA20 26 H_A20M# 4

R1071

1 2

0_0402_5%

1 2

H_PWRGOOD 5

H_IGNNE# 4

H_INIT# 4 H_INTR 4

KB_RST# 26

H_NMI 4 H_SMI# 4

H_STPCLK# 4

1 2

0_0402_5%

56_0402_5%

R1072

R1078 54.9_0402_1%R1078 54.9_0402_1%

CLK_PCIE_SATA# 15 CLK_PCIE_SATA 15

H_DPRSTP#H_DPRSTP_R#

H_FERR#

GATEA20

KB_RST#

+VCCP

1 2

H_DPRSTP# 5,7,46 H_DPSLP# 5

within 2" from R1557

12

R1075

R1075 56_0402_5%

56_0402_5%

placed within 2" from ICH8M

+3VS

R1063

10K_0402_5%

R1066

10K_0402_5%

+VCCP

R1070

R1070 56_0402_5%

56_0402_5%

1 2

H_THERMTRIP# 4,7

H_FERR# 4

XOR CHAIN ENTRANCE STRAP:RSVD

+3VS

R1082

@R1082

@

1 2

1K_0402_5%

R1083

@R1083

@

1 2

1K_0402_5%

A A

ICH_RSVD

5

ACZ_SDOUT

ICH_RSVD 19

Security Classification

Issued Date

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

http://laptop-motherboard-schematic.blogspot.com/

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2006/02/13 2008/6/05

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

ICH9(2/4)_LAN,HD,IDE,LPC

LA-4671P

1

18 53Friday, February 20, 2009

of

1.0

5

1 2

R1096 10K_0402_5%@R1096 10K _0402_5%@

1 2

SERIRQ

PCI_CLKRUN#

EC_THERM#

OCP#

CLKSATAREQ#

PM_BMBUSY#

EC_SCI#

ICH8 don't have

LAN_CABDT

SB_SPKR

+3VALW

ICH_PCIE_WAKE#21,23,25,26

R1085 2.2K_0402_5%R1085 2.2K_0402_5% R1087 2.2K_0402_5%R1087 2.2K_0402_5%

ICH_SMBCLK25 ICH_SMBDATA25

VGATE7,26,46

R1102 100K_0402_5%

+3VS

D D

1 2

R1084 10K_0402_5%R1084 10K_0402_5%

1 2

R1086 8.2K_0402_5%R1086 8.2K_0402_5%

1 2

R1088 8.2K_0402_5%@R1088 8.2K_0402_5%@

1 2

R1090 10K_0402_5%R1090 10K_0402_5%

1 2

R1093 10K_0402_5%R1093 10K_0402_5%

1 2

R1094 8.2K_0402_5%@ R1094 8.2K_0402_5%@

1 2

R1095 8.2K_0402_5%R1095 8.2K_0402_5%

R313 10K_0402_5%R313 10K_0402_5%

+3VS

low-->default

High -->No boot

+3VS

R1101 10K_0402_5%@R1101 10K_0402_5%@

checklist pull hi

0825 Change GPIO pin assignment 0612 Change GPIO pin assignment

C C

1 2

CL_RST#1

ICH_LOW_BAT#

ICH_RI#

XDP_DBRESET#

ME_EC_CLK1

ME_EC_DATA1

EC_LID_OUT#

EC_SMI#

SB_SPKR24

GLAN

+3VALW

1 2

R1108 10K_0402_5%R1108 10K_0402_5%

1 2

R1110 8.2K_0402_5%R1110 8.2K_0402_5%

1 2

R1113 10K_0402_5%R1113 10K_0402_5%

1 2

R1114 10K_0402_5%R1114 10K_0402_5%

1 2

R1115 10K_0402_5%R1115 10K_0402_5%

R1116 10K_0402_5%R1116 10K_0402_5%

1 2

R1117 10K_0402_5%R1117 10K_0402_5%

1 2

R1119 8.2K_0402_5%R1119 8.2K_0402_5%

WLAN

+3VS

R11232.2K_0402_5% R11232.2K_0402_5%

Express Card

Card Reader

12

2.2K_0402_5%

2.2K_0402_5% R1124

R1124

S

G

2

+5VS

Q106

Q106 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

D

13

S

G

B B

EC_SWI#

USB_OC#1

USB_OC#2

USB_OC#4

USB_OC#7

USB_OC#8_9

USB_OC#0

USB_OC#10_11

USB_OC#5

USB_OC#3

A A

R123 10K_0402_5%R123 10K_0402_5%

1 2

R124 10K_0402_5%R124 10K_0402_5%

1 2

R125 10K_0402_5%R125 10K_0402_5%

1 2

R129 10K_0402_5%R129 10K_0402_5%

1 2

R130 10K_0402_5%R130 10K_0402_5%

1 2

R131 10K_0402_5%R131 10K_0402_5%

1 2

R134 10K_0402_5%R134 10K_0402_5%

1 2

R135 10K_0402_5%R135 10K_0402_5%

1 2

R136 10K_0402_5%R136 10K_0402_5%

1 2

R138 10K_0402_5%R138 10K_0402_5%

1 2

5

+3VALW

ICH_SM_DA13,14,15,23

ICH_SM_CLK13,14,15,23

4

1 2 1 2

T125PAD T125PAD

XDP_DBRESET#4

PM_BMBUSY#7

EC_LID_OUT#26

H_STP_PCI#15 H_STP_CPU#15

PCI_CLKRUN#26

SERIRQ26 EC_THERM#26

1 2

LAN_LOPWEN21

CLKSATAREQ#15

MCH_ICH_SYNC#7

ICH_RSVD18

GLAN_RXN21 GLAN_RXP21

GLAN_TXN21 GLAN_TXP21

PCIE_RXN323 PCIE_RXP323 PCIE_TXN323 PCIE_TXP323

PCIE_RXN425 PCIE_RXP425 PCIE_TXN425 PCIE_TXP425

PCIE_RXN529 PCIE_RXP529 PCIE_TXN529 PCIE_TXP529

ICH_SMBCLK

4

OCP#4

EC_SMI#26 EC_SCI#26

@

ICH_SMBDATA

D

13

SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3 Q107

Q107

2

http://laptop-motherboard-schematic.blogspot.com/

ICH_SMBCLK ICH_SMBDATA CL_RST#1 ME_EC_CLK1 ME_EC_DATA1

ICH_RI#

SUS_STAT# XDP_DBRESET#

PM_BMBUSY#

EC_LID_OUT#

H_STP_PCI# R_STP_CPU#

PCI_CLKRUN#

ICH_PCIE_WAKE_R#

R11180_0402_5% R11180_0402_5%

1 2

SERIRQ EC_THERM#

1 2

R1099 0_0402_5%R1099 0_0402_5% T128PAD T128PAD

OCP# LAN_LOPWEN

EC_SMI# EC_SCI#

T130PAD T130PAD

ICH_AF8

T131PAD T131PAD T132PAD T132PAD

CLKSATAREQ#

GPIO49

SB_SPKR MCH_ICH_SYNC# ICH_RSVD

T133PAD T133PAD T134PAD T134PAD T135PAD T135PAD

0.1U_0402_16V7K~N

USB_OC#028

USB_OC#228

EC_SWI#26

USB_OC#8_928

USB_OC#10_1128

VRMPWRGD

12

G16

A13 E17

C17

B18

F19

R4

G19

M6

A17

A14 E19

L4

E20

M5

AJ23

D21

A20

AG19 AH21 AG21

A21 C12 C21

AE18

K1

AF8

AJ22

A9

D19

L1 AE19 AG22 AF21 AH24

A8

M7

AJ24

B21

AH20

AJ20 AJ21

C12210.1U_0402_16V7K~N C12210.1U_0402_16V7K~N

12

C12220.1U_0402_16V7K~N C12220.1U_0402_16V7K~N

12

C12230.1U_0402_16V7K~N C12230.1U_0402_16V7K~N

12

C12240.1U_0402_16V7K~N C12240.1U_0402_16V7K~N

12

C1225

12

C1226

12

C1228

12

C1227

12

Within 500 mils

R1125

22.6_0402_1%

U56C

SMBCLK SMBDATA LINKALERT#/GPIO60/CLGPIO4 SMLINK0 SMLINK1

RI#

SUS_STAT#/LPCPD# SYS_RESET#

PMSYNC#/GPIO0

SMBALERT#/GPIO11

STP_PCI# STP_CPU#

CLKRUN#

WAKE# SERIRQ THRM#

VRMPWRGD

TP11

GPIO1 GPIO6 GPIO7 GPIO8 GPIO12 GPIO13 GPIO17 GPIO18 GPIO20 SCLOCK/GPIO22 GPIO27 GPIO28 SATACLKREQ#/GPIO35 SLOAD/GPIO38 SDATAOUT0/GPIO39 SDATAOUT1/GPIO48 GPIO49 GPIO57/CLGPIO5

SPKR MCH_SYNC# TP3 TP8 TP9 TP10

ICH9M REV 1.0

GLAN_RXN GLAN_RXP GLAN_TXN_C GLAN_TXP_C

PCIE_RXN3 PCIE_RXP3 PCIE_C_TXN3 PCIE_C_TXP3

PCIE_RXN4 PCIE_RXP4 PCIE_C_TXN4 PCIE_C_TXP4

PCIE_RXN5 PCIE_RXP5 PCIE_C_TXN5 PCIE_C_TXP5

USB_OC#0 USB_OC#1 USB_OC#2 USB_OC#3 USB_OC#4 USB_OC#5 EC_SWI# USB_OC#7 USB_OC#8_9 USB_OC#8_9 USB_OC#10_11 USB_OC#10_11

USBRBIAS

Security Classification

Issued Date

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

U56D

N29

PERN1

N28

PERP1

P27

PETN1

P26

PETP1

L29

PERN2

L28

PERP2

M27

PETN2

M26

PETP2

J29

PERN3

J28

PERP3

K27

PETN3

K26

PETP3

G29

PERN4

G28

PERP4

H27

PETN4

H26

PETP4

E29

PERN5

E28

PERP5

F27

PETN5

F26

PETP5

C29

PERN6/GLAN_RXN

C28

PERP6/GLAN_RXP

D27

PETN6/GLAN_TXN

D26

PETP6/GLAN_TXP

D23

SPI_CLK

D24

SPI_CS0#

F23

SPI_CS1#/GP IO58/CLGPIO6

D25

SPI_MOSI

E23

SPI_MISO

N4

OC0#/GPIO59

N5

OC1#/GPIO40

N6

OC2#/GPIO41

P6

OC3#/GPIO42

M1

OC4#/GPIO43

N2

OC5#/GPIO29

M4

OC6#/GPIO30

M3

OC7#/GPIO31

N3

OC8#/GPIO44

N1

OC9#/GPIO45

P5

OC10#/GPIO46

P3

OC11#/GPIO47

AG2

USBRBIAS

AG1

USBRBIAS#

ICH9M REV 1.0

3

GPIO21

CLK14 CLK48

SUSCLK

SLP_S3# SLP_S4# SLP_S5#

PWROK

BATLOW#

PWRBTN#

LAN_RST#

RSMRST#

CK_PWRGD

CLPWROK

SLP_M#

CL_CLK0 CL_CLK1

CL_DATA0 CL_DATA1

CL_VREF0 CL_VREF1

CL_RST0# CL_RST1#

AH23

GPIO19

AF19

GPIO36

AE21

GPIO37

AD20

CLK_14M_ICH

H1

CLK_48M_ICH

AF3

ICH_SUSCLK

P1

SLP_S3#

C16

SLP_S4#

E16

SLP_S5#

G17

C10

ICH_PWROK

G20

M2

1 2

ICH_LOW_BAT#

B13

R3

1 2

D20

R1100 0_0402_5%R1100 0_0402_5%

R_EC_RSMRST#GPIO49

D22

CK_PWRGD_R

R5

M_PWROK

R6

B16

CL_CLK0

F24 B19

CL_DATA0

F22 C19

CL_VREF0_ICH

C25 A19

CL_RST#

F21 D18

A16 C18 C11

LAN_CABDT_R

C20

DMI_RXN0

V27

DMI_RXP0

V26

DMI_TXN0

U29

DMI_TXP0

U28

DMI_RXN1

Y27

DMI_RXP1

Y26

DMI_TXN1

W29

DMI_TXP1

W28

DMI_RXN2

AB27

DMI_RXP2

AB26

DMI_TXN2

AA29

DMI_TXP2

AA28

DMI_RXN3

AD27

DMI_RXP3

AD26

DMI_TXN3

AC29

DMI_TXP3

AC28

CLK_PCIE_ICH#

T26

CLK_PCIE_ICH

T25

AF29

DMI_IRCOMP

AF28

USB20_N0

AC5

USB20_P0

AC4

USB20_N1

AD3

USB20_P1

AD2

USB20_N2

AC1

USB20_P2

AC2

USB20_N3

AA5

USB20_P3

AA4

USB20_N4

AB2

USB20_P4

AB3

USB20_N5

AA1

USB20_P5

AA2

USB20_N6

W5

USB20_P6

W4

USB20_N7

Y3

USB20_P7

Y2

USB20_N8

W1

USB20_P8

W2

USB20_N9

V2

USB20_P9

V3

USB20_N10

U5

USB20_P10

U4

USB20_N11

U1

USB20_P11

U2

Compal Secret Data

R10980_0402_5% R10980_0402_5%

1 2

R1121 0_0402_5%@R1121 0_0402_5%@

Deciphered Date

SATA0GP/GPIO21 SATA1GP/GPIO19 SATA4GP/GPIO36 SATA5GP/GPIO37

SATA

GPIO

SATA

GPIO

SMBSYS GPIO

Clocks

S4_STATE#/GPIO26

DPRSLPVR/GPIO16

Power MGTController Link

GPIO

MEM_LED /GPIO24

GPIO10/SUS_PWR_ACK

GPIO14/AC_PRESENT

WOL_EN/GP IO9

MISC

DMI0RXN DMI0RXP

DMI0TXN DMI0TXP

DMI1RXN DMI1RXP

DMI1TXN DMI1TXP

DMI2RXN DMI2RXP

DMI2TXN DMI2TXP

DMI3RXN DMI3RXP

DMI3TXN DMI3TXP

DMI_CLKN

PCI-Express

DMI_CLKP

Direct Media Interface

DMI_ZCOMP

DMI_IRCOMP

USBP0N USBP0P USBP1N USBP1P USBP2N USBP2P USBP3N USBP3P USBP4N USBP4P USBP5N

SPI

USBP5P USBP6N

USB

USBP6P USBP7N USBP7P USBP8N USBP8P USBP9N

USBP9P USBP10N USBP10P USBP11N USBP11P

2006/02/13 2008/6/05

2

1 2

R1089 8.2K_0402_5%R1089 8.2K_0402_5%

CLK_14M_ICH 15 CLK_48M_ICH 15

T126 PADT126 PAD

SLP_S3# 26 SLP_S4# 26 SLP_S5# 26

R695 100_0402_5%R695 100_0402_5%

T127 PADT127 PAD

R1105 0_0402_5%R1105 0_0402_5%

T129 PADT129 PAD

CL_CLK0 7

CL_DATA0 7

CL_RST# 7

DMI_RXN0 7 DMI_RXP0 7 DMI_TXN0 7 DMI_TXP0 7

DMI_RXN1 7 DMI_RXP1 7 DMI_TXN1 7 DMI_TXP1 7

DMI_RXN2 7 DMI_RXP2 7 DMI_TXN2 7 DMI_TXP2 7

DMI_RXN3 7 DMI_RXP3 7 DMI_TXN3 7 DMI_TXP3 7

CLK_PCIE_ICH# 15 CLK_PCIE_ICH 15

R1120 24.9_0402_1%R1120 24.9_0402_1%

1 2

DPRSLPVR 7,46

PBTN_OUT# 26

1 2

USB20_N0 28 USB20_P0 28 USB20_N1 23 USB20_P1 23 USB20_N2 28 USB20_P2 28 USB20_N3 23 USB20_P3 23 USB20_N4 23 USB20_P4 23 USB20_N5 23 USB20_P5 23 USB20_N6 23 USB20_P6 23 USB20_N7 25 USB20_P7 25 USB20_N8 28 USB20_P8 28 USB20_N9 28 USB20_P9 28 USB20_N10 28 USB20_P10 28 USB20_N11 28 USB20_P11 28

2

1 2

ACIN 26,39,40 LAN_CABDT 21

JUSBP5

Camera

JUSBP1

Felica

BlueTooth

FingerPrinter

Mini Card

Express Card

JUSBP2

JUSBP3

JUSBP4

+3VS

M_PWROK

ICH_PWROK 7,26

1 2

R1097 10K_0402_5%R1097 10K_0402_5%

R_EC_RSMRST#

CK_PWRGD 15

M_PWROK 7

EC_RSMRST#26

Within 500 mils

+1.5VS

R1104 10K_0402_5%R1104 10K_0402_5%

1

Place closely pin H1Place closely pin AF3

CLK_14M_ICHCLK_48M_ICH

12

@

R1092

10_0402_5%

@

1

C1218

4.7P_0402_50V8C

2

R1106

3.24K_0402_1%

+3VS

1 2

0.1U_0402_16V4Z

12

@

R1091

10_0402_5%

@

1

C1217

4.7P_0402_50V8C

2

1

C1219

2

1 2

12

R1107

R1107 453_0402_1%

453_0402_1%

NA lead free

RSMRST circuit

R656

@ R656

@

R1103

R1103 0_0402_5%

0_0402_5%

1 2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

ICH9(3/4)_DMI,USB,GPIO,PCIE

LA-4671P

0_0402_5%

1 2

R_EC_RSMRST#

1

POK 41

19 53Friday, February 20, 2009

of

1.0

5

+RTCVCC

1

C1229

0ohm Change to BEAD

L96

1 2

+1.5VS

BLM21PG600SN1D_0805~D

D D

100_0402_5%~D

C C

B B

+3VS

C1268

A A

0.1U_0402_16V4Z

BLM21PG600SN1D_0805~D

+5VS +3VS

12

R1127

12

R1128

10UH_LB2012T100MR_20%_0805~D

+1.5VS

1

+1.5VS

2

21

D45

CH751H-40PT_SOD323-2

+ICH_V5REF_RUN

1

C1241

C1241 1U_0603_10V6K~D

1U_0603_10V6K~D

2

+3VALW+5VALW

21

D46

CH751H-40PT_SOD323-2

+ICH_V5REF_SUS

1

C1306

0.1U_0603_50V4Z

2

L99

1 2

L100

L100 1UH_20%_0805~D

1UH_20%_0805~D

5

2

0.1U_0402_16V4Z

40 mils

1

+

2

C1234

220U_D2_4VM

22U_0805_6.3V6M~D

20 mils

1

C1255

2

1U_0603_10V4Z

1 2

R1129 0_0603_5%

1

2

10U_0805_10V4Z

20 mils

1U_0603_10V4Z~D

1

C1231

2

0.1U_0402_16V4Z

+VCC1_5_B

1

C1236

22U_0805_6.3V6M~D

2

C1231

C1237

2.2U_0603_6.3V4Z

C1235

C1230

0.1U Change to 1U

+VCCSATAPLL

+1.5VS

C1254

C1269

1

2

10U_0805_10V4Z

+1.5VS

0.1U_0402_16V4Z

+1.5VS

0.1U_0402_16V4Z

C1267

0.1U_0402_16V4Z~D

2.2U_0603_6.3V4Z

1U_0603_10V4Z

+1.5VS

1U_0603_10V4Z

1 2

+VCCLAN3_3

1

C1270

2

C1256

C1258

C1262

C1263

+VCCGLANPLL

G3: 6uA

+ICH_V5REF_RUN

+ICH_V5REF_SUS

646mA

1

2

1

2

1

2

1342mA

1

2

11mA

1

11mA

2

+VCC_LAN1_05_INT_ICH_1 +VCC_LAN1_05_INT_ICH_2

19/78/78mA

+1.5VS

1

C1271

2

4.7U_0603_6.3V6M~D

4

U56F

A23

VCCRTC

2mA

A6

V5REF

2mA

AE1

V5REF_SUS

AA24

VCC1_5_B[1]

AA25

VCC1_5_B[2]

AB24

VCC1_5_B[3]

AB25

VCC1_5_B[4]

AC24

VCC1_5_B[5]

AC25

VCC1_5_B[6]

AD24

VCC1_5_B[7]

AD25

VCC1_5_B[8]

AE25

VCC1_5_B[9]

AE26

VCC1_5_B[10]

AE27

VCC1_5_B[11]

AE28

VCC1_5_B[12]

AE29

VCC1_5_B[13]

F25

VCC1_5_B[14]

G25

VCC1_5_B[15]

H24

VCC1_5_B[16]

H25

VCC1_5_B[17]

J24

VCC1_5_B[18]

J25

VCC1_5_B[19]

K24

VCC1_5_B[20]

K25

VCC1_5_B[21]

L23

VCC1_5_B[22]

L24

VCC1_5_B[23]

L25

VCC1_5_B[24]

M24

VCC1_5_B[25]

M25

VCC1_5_B[26]

N23

VCC1_5_B[27]

N24

VCC1_5_B[28]

N25

VCC1_5_B[29]

P24

VCC1_5_B[30]

P25

VCC1_5_B[31]

R24

VCC1_5_B[32]

R25

VCC1_5_B[33]

R26

VCC1_5_B[34]

R27

VCC1_5_B[35]

T24

VCC1_5_B[36]

T27

VCC1_5_B[37]

T28

VCC1_5_B[38]

T29

VCC1_5_B[39]

U24

VCC1_5_B[40]

U25

VCC1_5_B[41]

V24

VCC1_5_B[42]

V25

VCC1_5_B[43]

U23

VCC1_5_B[44]

W24

VCC1_5_B[45]

W25

VCC1_5_B[46]

K23

VCC1_5_B[47]

Y24

VCC1_5_B[48]

Y25

+3VS

23mA

80mA

1mA

AJ19

AC16 AD15 AD16 AE15 AF15 AG15 AH15

AJ15

AC11 AD11 AE11 AF11 AG10 AG11 AH10

AJ10

AC9

AC18 AC19

AC21

G10

AC12 AC13 AC14

AA7 AB6 AB7 AC6 AC7

D28 D29

G9

AJ5

A10 A11

A12 B12

A27

E26 E27

A26

VCC1_5_B[49]

VCCSATAPLL

VCC1_5_A[1] VCC1_5_A[2] VCC1_5_A[3] VCC1_5_A[4] VCC1_5_A[5] VCC1_5_A[6] VCC1_5_A[7] VCC1_5_A[8]

VCC1_5_A[9] VCC1_5_A[10] VCC1_5_A[11] VCC1_5_A[12] VCC1_5_A[13] VCC1_5_A[14] VCC1_5_A[15] VCC1_5_A[16]

VCC1_5_A[17]

VCC1_5_A[18] VCC1_5_A[19]

VCC1_5_A[20]

VCC1_5_A[21] VCC1_5_A[22]

VCC1_5_A[23] VCC1_5_A[24] VCC1_5_A[25]

VCCUSBPLL

VCC1_5_A[26] VCC1_5_A[27] VCC1_5_A[28] VCC1_5_A[29] VCC1_5_A[30]

VCCLAN1_05[1] VCCLAN1_05[2]

VCCLAN3_3[1] VCCLAN3_3[2]

VCCGLANPLL

VCCGLAN1_5[1] VCCGLAN1_5[2] VCCGLAN1_5[3] VCCGLAN1_5[4]

VCCGLAN3_3

ICH9M REV 1.0

4

47mA

http://laptop-motherboard-schematic.blogspot.com/

CORE

VCCA3GP ATXARX

VCCP_CORE

PCI

VCCSUS1_05[1] VCCSUS1_05[2]

VCCSUS1_5[1]

VCCSUS1_5[2]

VCCSUS3_3[1] VCCSUS3_3[2] VCCSUS3_3[3]

VCCPSUSVCCPUSB

VCCSUS3_3[4]

VCCSUS3_3[5]

VCCSUS3_3[6] VCCSUS3_3[7] VCCSUS3_3[8]

VCCSUS3_3[9] VCCSUS3_3[10] VCCSUS3_3[11] VCCSUS3_3[12] VCCSUS3_3[13] VCCSUS3_3[14] VCCSUS3_3[15] VCCSUS3_3[16] VCCSUS3_3[17] VCCSUS3_3[18] VCCSUS3_3[19] VCCSUS3_3[20]

USB CORE

GLAN POWER

VCC1_05[10] VCC1_05[11] VCC1_05[12] VCC1_05[13] VCC1_05[14] VCC1_05[15] VCC1_05[16] VCC1_05[17] VCC1_05[18] VCC1_05[19] VCC1_05[20] VCC1_05[21] VCC1_05[22] VCC1_05[23] VCC1_05[24] VCC1_05[25] VCC1_05[26]

V_CPU_IO[1] V_CPU_IO[2]

VCCSUSHDA

VCCCL3_3[1] VCCCL3_3[2]

VCC1_05[1] VCC1_05[2] VCC1_05[3] VCC1_05[4] VCC1_05[5] VCC1_05[6] VCC1_05[7] VCC1_05[8] VCC1_05[9]

VCCDMIPLL

VCC_DMI[1] VCC_DMI[2]

VCC3_3[1]

VCC3_3[2]

VCC3_3[7]

VCC3_3[3] VCC3_3[4] VCC3_3[5] VCC3_3[6]

VCC3_3[8]

VCC3_3[9] VCC3_3[10] VCC3_3[11] VCC3_3[12] VCC3_3[13] VCC3_3[14]

VCCHDA

VCCCL1_05

VCCCL1_5

A15 B15 C15 D15 E15 F15 L11 L12 L14 L16 L17 L18 M11 M18 P11 P18 T11 T18 U11 U18 V11 V12 V14 V16 V17 V18

R29

W23 Y23

AB23 AC23

AG29

AJ6

AC10

AD19 AF20 AG24 AC20

B9 F9 G3 G6 J2 J7 K7

AJ4

AJ3

AC8 F17

AD8

F18

A18 D16 D17 E22

AF1

T1 T2 T3 T4 T5 T6 U6 U7 V6 V7 W6 W7 Y6 Y7 T7

G22

G23

19/73/73mA

A24 B24

+VCCP

1634mA

+VCCDMIPLL

23mA

48mA

2mA

.1U_0402_16V7K~D

308mA

11mA

+VCCSUS1_5_ICH_1

+VCCSUS1_5_ICH_2

212mA

+VCCCL1_05_ICH

+3VS

Security Classification

Issued Date

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

0.1U_0402_16V4Z

1

C1232

2

0.01U_0402_16V7K

+VCC_DM

1

2

+3VS

.1U_0402_16V7K~D

C1248

.1U_0402_16V7K~D

C1248

.1U_0402_16V7K~D

1

2

0.1U_0402_16V4Z

T140T140 T141T141

T142T142

0.1U_0402_16V4Z~D

1

C1259

2

1

@

C1265 1U_0603_10V4Z@C1265 1U_0603_10V4Z

2

3

0.1U_0402_16V4Z

1

C1233

2

L97

BLM18PG181SN1_0603~D

1 2

1

2

.1U_0402_16V7K~D

+3VS

C1247

C1249

1

2

+3VALW

1

2

1

2

C1239

C1238

22U_0805_6.3V6M~D

1

2

.1U_0402_16V7K~D

1

2

0.1U_0402_16V4Z

1

C1253

2

0.022U_0402_16V7K~D

C1260

@

C1266 0.1U_0402_16V4Z~D@C1266 0.1U_0402_16V4Z~D

10U_0805_10V4Z

2

5ohm@100MHz

1 2

L98

L98 BLM18PG181SN1_0603~D

BLM18PG181SN1_0603~D

C1240

.1U_0402_16V7K~D

1

+3VS

C1245

2

C1250

Add 0.1uF

1

+3VALW

2

0.022U_0402_16V7K~D

1

C1261

2

1

C1264

.1U_0402_16V7K~D

2

2006/02/13 2008/6/05

+3VS

1

C1246

2

+3VS

C1252

1

C1257

.1U_0402_16V7K~D

2

T144T144

Compal Secret Data

+VCCP

T143T143

Deciphered Date

+VCCP

4.7U_0603_6.3V6M

1

2

C1242

.1U_0402_16V7K~D

C1243

1

2

(DMI)

+1.5VS

2

.1U_0402_16V7K~D

C1244

1

2

U56E

AA26

VSS[1]

AA27

VSS[2]

AA3

VSS[3]

AA6

VSS[4]

AB1

VSS[5]

AA23

VSS[6]

AB28

VSS[7]

AB29

VSS[8]

AB4

VSS[9]

AB5

VSS[10]

AC17

VSS[11]

AC26

VSS[12]

AC27

VSS[13]

AC3

VSS[14]

AD1

VSS[15]

AD10

VSS[16]

AD12

VSS[17]

AD13

VSS[18]

AD14

VSS[19]

AD17

VSS[20]

AD18

VSS[21]

AD21

VSS[22]

AD28

VSS[23]

AD29

VSS[24]

AD4

VSS[25]

AD5

VSS[26]

AD6

VSS[27]

AD7

VSS[28]

AD9

VSS[29]

AE12

VSS[30]

AE13

VSS[31]

AE14

VSS[32]

AE16

VSS[33]

AE17

VSS[34]

AE2

VSS[35]

AE20

VSS[36]

AE24

VSS[37]

AE3

VSS[38]

AE4

VSS[39]

AE6

VSS[40]

AE9

VSS[41]

AF13

VSS[42]

AF16

VSS[43]

AF18

VSS[44]

AF22

VSS[45]

AH26

VSS[46]

AF26

VSS[47]

AF27

VSS[48]

AF5

VSS[49]

AF7

VSS[50]

AF9

VSS[51]

AG13

VSS[52]

AG16

VSS[53]

AG18

VSS[54]

AG20

VSS[55]

AG23

VSS[56]

AG3

VSS[57]

AG6

VSS[58]

AG9

VSS[59]

AH12

VSS[60]

AH14

VSS[61]

AH17

VSS[62]

AH19

VSS[63]

AH2

VSS[64]

AH22

VSS[65]

AH25

VSS[66]

AH28

VSS[67]

AH5

VSS[68]

AH8

VSS[69]

AJ12

VSS[70]

AJ14

VSS[71]

AJ17

VSS[72]

AJ8

VSS[73]

B11

VSS[74]

B14

VSS[75]

B17

VSS[76]

B2

VSS[77]

B20

VSS[78]

B23

VSS[79]

B5

VSS[80]

B8

VSS[81]

C26

VSS[82]

C27

VSS[83]

E11

VSS[84]

E14

VSS[85]

E18

VSS[86]

E2

VSS[87]

E21

VSS[88]

E24

VSS[89]

E5

VSS[90]

E8

VSS[91]

F16

VSS[92]

F28

VSS[93]

F29

VSS[94]

G12

VSS[95]

G14

VSS[96]

G18

VSS[97]

G21

VSS[98]

G24

VSS[99]

G26

VSS[100]

G27

VSS[101]

G8

VSS[102]

H2

VSS[103]

H23

VSS[104]

H28

VSS[105]

H29

VSS[106]

ICH9M REV 1.0

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

ICH9(4/4)_POWER&GND

LA-4671P

1

VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158] VSS[159] VSS[160] VSS[161] VSS[162] VSS[163] VSS[164] VSS[165] VSS[166] VSS[167] VSS[168] VSS[169] VSS[170] VSS[171] VSS[172] VSS[173] VSS[174] VSS[175] VSS[176] VSS[177] VSS[178] VSS[179] VSS[180] VSS[181] VSS[182] VSS[183] VSS[184] VSS[185] VSS[186] VSS[187] VSS[188] VSS[189] VSS[190] VSS[191] VSS[192] VSS[193] VSS[194] VSS[195] VSS[196] VSS[197] VSS[198]

VSS_NCTF[1] VSS_NCTF[2] VSS_NCTF[3] VSS_NCTF[4] VSS_NCTF[5] VSS_NCTF[6] VSS_NCTF[7] VSS_NCTF[8]

VSS_NCTF[9] VSS_NCTF[10] VSS_NCTF[11] VSS_NCTF[12]

1

H5 J23 J26 J27 AC22 K28 K29 L13 L15 L2 L26 L27 L5 L7 M12 M13 M14 M15 M16 M17 M23 M28 M29 N11 N12 N13 N14 N15 N16 N17 N18 N26 N27 P12 P13 P14 P15 P16 P17 P2 P23 P28 P29 P4 P7 R11 R12 R13 R14 R15 R16 R17 R18 R28 T12 T13 T14 T15 T16 T17 T23 B26 U12 U13 U14 U15 U16 U17 AD23 U26 U27 U3 V1 V13 V15 V23 V28 V29 V4 V5 W26 W27 W3 Y1 Y28 Y29 Y4 Y5 AG28 AH6 AF2 B25

A1 A2 A28 A29 AH1 AH29 AJ1 AJ2 AJ28 AJ29 B1 B29

20 53Friday, February 20, 2009

of

1.0

A

B

C

D

E

W=60mils

Q128

D

6

S

+LAN_IO_L

1U_0603_10V6K~D

1 1

EN_WOL#26

2 2

R1245

1 2

+3VS

1K_0402_5%

3 3

LAN_LOPWEN19

4 4

RJ45_TX0+

RJ45_RX1+

+B+_BIAS

2

G

CLK_PCIE_LAN15

CLK_PCIE_LAN#15

ISOLATEB

R1246

R1246 15K_0402_5%

15K_0402_5%

1 2

2

25MHZ_12PF_1HX25000CE1G~D

C1488

1

18P_0402_50V8J

LAN_LOPWEN ISOLATEB

C1490 0.01U_0402_16V7KC1490 0.01U_0402_16V7K

1 2

C1491 0.01U_0402_16V7KC1491 0.01U_0402_16V7K

1 2

C1492 0.01U_0402_16V7KC1492 0.01U_0402_16V7K

1 2

C1494 0.01U_0402_16V7KC1494 0.01U_0402_16V7K

1 2

CM1293-04SO_SOT23-6

1

2

3

D28

@D28

@

R1239

R1239 470K_0402_5%

470K_0402_5%

1 2

13

D

Q58

Q58 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

S

GLAN_RXP19

GLAN_RXN19

GLAN_TXP19

GLAN_TXN19

GLAN_REQ#915

PCI_RST#17,23,25

Y9

1 2

R1374

@ R1374

@

CH1

Vn

CH2

A

2

EN_WOL

C1473 0.1U_0402_16V7K~N

C1476 0.1U_0402_16V7K~N

ICH_PCIE_WAKE#19,23,25,26

0_0402_5%

1 2

+V_DAC LAN_MDIN3 LAN_MDIP3

+V_DAC LAN_MDIN2 LAN_MDIP2

+V_DAC LAN_MDIN1 LAN_MDIP1

+V_DAC LAN_MDIN0 LAN_MDIP0

4

CH4

5

Vp

6

CH3

1

C1455

1U_0603_10V6K~D

45 2 1

1 2

2

1

RJ45_RX1-

RJ45_TX0-

SI3456BDV-T1-E3 1N TSOP6

G

3

R1240

1.5M_0402_5%

@

1 2

GLAN_RXP_C

12

GLAN_RXN_C

12

GLAN_TXP

GLAN_TXN

1 2

R1244 2.49K_0402_1%

R1282

R1282 0_0402_5%

0_0402_5%

LAN_CABDT19

C1489

15P_0402_50V8J

TS1

1

TCT1

MCT1

2

TD1+

MX1+

3

TD1-

MX1-

4

TCT2

MCT2

5

TD2+

MX2+

TD2-6MX2-

7

TCT3

MCT3

8

TD3+

MX3+

9

TD3-

MX3-

10

TCT4

MCT4

11

TD4+

MX4+

12

TD4-

MX4-

BOTH_GST5009-LF

+3VS +3VS

L123

FBMA-L11-322513-201LMA40T_1210

1 2

24 23 22

21 20 19

18 17 16

15 14 13

RJ45_TX2+

RJ45_TX3-

http://laptop-motherboard-schematic.blogspot.com/

U64

20

HSOP

21

HSON

15

HSIP

16

HSIN

17

REFCLK_P

18

REFCLK_M

25

CLKREQB

27

PERSTB

46

RSET

26

LANWAKEB

28

ISOLATEB

41

CKTAL1

42

CKTAL2

23

NC

24

NC

7

GND

14

GND

31

GND

47

GND

22

EGND

RTL8111DL-GR_LQFP48

RJ45_TX3RJ45_TX3+

RJ45_TX2RJ45_TX2+

RJ45_RX1RJ45_RX1+

RJ45_TX0RJ45_TX0+

1

C1456

@

2

22U_1206_6.3V6M

CM1293-04SO_SOT23-6

1

2

3

D29

@D29

@

B

1

C1457

2

22U_1206_6.3V6M

RTL8111DL

RP42

75_1206_8P4R_5%

CH1

Vn

CH2

W=60mils

+LAN_IO+3VALW

1.5A

1

C1458

2

18 27 36 45

2

C1493

C1493 1000P_1206_2KV7K

1000P_1206_2KV7K

1

4

CH4

5

Vp

6

CH3

0.1U_0402_10V7K~N

LED3/EEDO

LED2/EEDI/AUX

LED1/EESK

SROUT12

DVDD12 DVDD12 DVDD12

RJ45_TX3+

RJ45_TX2-

1

C1459

2

0.1U_0402_10V7K~N

1

C1460

2

0.1U_0402_10V7K~N

These caps close to U64: Pin 29, 37, 44, 45

R1241 3.6K_0402_5% R 1241 3.6K_0402_5%

1 2

LAN_LED3

33

LAN_LED2

34

LAN_LED1

35 32

EECS

LED0

MDIP0 MDIN0 MDIP1 MDIN1

MDI P2

MDI N2

MDI P3

MDI N3

FB12

EVDD12

AVDD12

VDDSR VDDSR

VDD33 VDD33

AVDD33 AVDD33

ENSR

38

2 3 5 6 8 9 11 12

4

48

19 30 36 13 10

39

44 45

29 37

1 40 43

LAN_LED0

LAN_MDIP0

LAN_MDIN0

LAN_MDIP1

LAN_MDIN1

LAN_MDIP2

LAN_MDIN2

LAN_MDIP3

LAN_MDIN3

W=60mils

+LAN_SROUT

4.7UH_1008HC-472EJFS-A_5%_1008

+LAN_DVDD12

+LAN_IO

+LAN_AVDD33

+LAN_IO

These caps close to U64: Pin 1,29,37,40

Security Classification

Issued Date

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

1

C1461

2

0.1U_0402_10V7K~N

L107

1 2

C1486 0.1U_0402_16V7K~N

C1487 0.1U_0402_16V7K~N

C1544 0.1U_0402_10V7K~NC1544 0.1U_0402_10V7K~N

C1616 0.1U_0402_10V7K~NC1616 0.1U_0402_10V7K~N

1

2

+LAN_IO

W=60mils

1

C1478

2

0.1U_0402_10V7K~N

1 2

LAN_LED2

CH751H-40PT_SOD323-2

LAN_LED3

CH751H-40PT_SOD323-2

LAN_LED1

CH751H-40PT_SOD323-2

LAN_LED3

CH751H-40PT_SOD323-2

2008/03/21 2009/03/21

C1462

0.1U_0402_10V7K~N

D54

D55

D56

D57

+LAN_VDD

1

C1479

These components close to U64: Pin 48

2

( Should be place within 200 mils )

W=30mils

22U_1206_6.3V6M

+LAN_EVDD

C1484 1U_0402_6.3V6K~DC1484 1U_0402_6.3V6K~D

C1485 1U_0402_6.3V6K~DC1485 1U_0402_6.3V6K~D

These caps close to U64: Pin 19

L1080_0603_5% L1080_0603_5%

12

+LAN_IO

LED2_LED3

21

LED1_LED3

21

Compal Secret Data

Deciphered Date

W=40mils

1 2

R1238

0_0603_5%

1

C14630.1U_0402_10V7K~N C14630.1U_0402_10V7K~N

2

+LAN_DVDD12

1

C14640.1U_0402_10V7K~N C14640.1U_0402_10V7K~N

2

These caps close to U64: Pin 13, 30, 36, 10, 39

These caps close to U64: Pin 4

+LAN_VDD

2

1

2

C1744

C1743

0.1U_0402_10V7K

0.01U_0402_16V7K

L124

W=30mils

12

+LAN_VDD

R1247 220_0402_5%R1247 220_0402_5%

1 2

R1251

1 2

220_0402_5%

R1252

1 2

220_0402_5%

D

1 2

0_0603_5%

+LAN_IO

LED1_LED3

1

C14650.1U_0402_10V7K~N C14650.1U_0402_10V7K~N

2

1

C1477

@

0.1U_0402_10V7K~N

2

LAN_ACTIV ITY#LAN_LED0

RJ45_TX3-

RJ45_TX3+

RJ45_RX1-

RJ45_TX2-

RJ45_TX2+

RJ45_RX1+

RJ45_TX0-

RJ45_TX0+

LINK_10_1000#LED2_LED3

LINK_100_1000#

1

C14670.1U_0402_10V7K~N C14670.1U_0402_10V7K~N

C14660.1U_0402_10V7K~N C14660.1U_0402_10V7K~N

2

+LAN_IO

1

C1475

2

0.1U_0402_10V7K~N

C1474

1

2

22U_1206_6.3V6M

These caps close to U64: Pin 44,45

( Should be place within 200 mils )

JLAN1

13

Yellow LED-

12

Yellow LED+

8

PR4-

7

PR4+

6

PR2-

5

PR3-

4

PR3+

3

PR2+

2

PR1-

1

PR1+

11

Green LED -

9

Orange LED -

10

Green-Orange L ED+

C-1775553

CONN@

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

Gigabit LAN_RTL8111DL

LA-4671P

GND

15

14

21 53Friday, February 20, 2009

E

21 53Friday, February 20, 2009

1.0

of

5

4

3

2

1

SATA HDD CONN

JSATA1

1

D D

PSATA_ITX_DRX_P018 PSATA_ITX_DRX_N018

PSATA_IRX_DTX_N0_C18

PSATA_IRX_DTX_P0_C18

PSATA_ITX_DRX_P0 PSATA_ITX_DRX_N0

C393 3900P_0402_50V7KC393 3900P_0402_50V7K

PSATA_IRX_DTX_N0

12

PSATA_IRX_DTX_P0

12

C392 3900P_0402_50V7KC392 3900P_0402_50V7K

+5VS

10U_0805_10V4Z~N

C C

C574

1

2

C296

0.1U_0402_16V7K~N

1

2

0.1U_0402_16V7K~N

1

C377

2

1

C376

2

1000P_0402_50V7K~N

Close to SATA HDD

GND

2

A+

3

A-

4

GND

5

B-

6

B+

7

GND

8

V33

9

V33

10

V33

11

GND

12

GND

13

GND

14

V5

15

V5

16

V5

17

GND

18

Reserved

19

GND

20

V12

21

V12

22

V12

SUYIN_127072FR022G210ZR_22P_RV

CONN@

+5VS

10U_0805_10V4Z

1

C498

2

1

C506

2

1U_0603_10V4Z

0.1U_0402_16V4Z

1

C503

2

ODD_ITX_DRX_P018 ODD_ITX_DRX_N018

ODD_IRX_DTX_N0_C18 ODD_IRX_DTX_P0_C18

1

C499

2

1000P_0402_50V7K~N

SATA ODD CONN

close JSATA2

ODD_ITX_DRX_P0 ODD_ITX_DRX_N0

1 2

C328 0.01U_0402_16V7KC328 0.01U_0402_16V7K

1 2

C327 0.01U_0402_16V7K

+5VS

ODD_IRX_DTX_N0 ODD_IRX_DTX_P0

JSATA2

1

GND

2

A+

3

A-

4

GND

5

B-

6

B+

7

GND

8

DP

9

+5V

10

+5V

11

MD

12

GND GND13GND

OCTEK_SLS-13SB1G_RV

CONN@

GND GND GND

17 16 15 14

Close to ODD Conn

B B

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

http://laptop-motherboard-schematic.blogspot.com/

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2007/1/15 2008/6/05

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

HDD/CDROM

LA-4671P

1.0

22 53Friday, February 20, 2009

1

22 53Friday, February 20, 2009

1.0

of

A

B

C

D

E

Bluetooth

USB20_P419 USB20_N419

T69PAD T69PAD

BT_OFF#26

BLUETOOTH_LED#27

Fingerprint

USB20_N519 USB20_P519

+3VS

CM1293-04SO_SOT23-6

1

CH1

2

Vn

MIC_CLK

3

CH2

D62

@D62

@

Reserve for ESD.

(Close to JCA1)

Camera Conn

+5VS

+3VS

Deciphered Date

D

BT_ACTIVE CH_CLK

BT_OFF#

CH_DATA

+3VS

MIC_SIGUSB20_P1

4

CH4

5

Vp

USB20_N1

6

CH3

Felica

+5VS

USB20_N319 USB20_P319

1000P_0402_50V7K

MIC_DIAG26

C414

1

2

JFP1

66G1

5

4

3

2

1

ACES_88512-0641_6P

CONN@

+5VS

TP2TP2

C315

@C315

@

10U_0805_10V4Z

USB20_P119

USB20_N119

MIC_SIG24

MIC_CLK24

JBT1

1

2

3

4

5

6

7

8

9

10

11

GND

12

GND

ACES_88460-1001

CONN@

7 8

G2

CM1293-04SO_SOT23-6

1

CH1

2

Vn

3

CH2

D22

(Close to JFP1)

CH4

CH3

USB20_P5

4

5

6

+3VS

USB20_N5

Vp

Felica Conn

CONN@

ACES_88512-0641_6P

1

USB20_N3 USB20_P3

LEC

1

2

USB20_P1

USB20_N1

MIC_SIG

MIC_CLK

C1736

Title

WLAN/BT/FP

Size Document Number Rev

Custom

LA-4671P

Date: Sheet

1

2

3

4

5

8

5

G2

7

66G1

JFE1

JCA1

1

2

3

TP1TP1

MIC_DIAG

1

2

100P_0402_25V8K

1

C1737

2

100P_0402_25V8K

3

4

5

6

7

8

9

10

11

GND

12

GND

ACES_88460-1001

CONN@

Compal Electronics, Inc.

23 53Friday, February 20, 2009

of

E

of

1.0

GND2

WLANPW_EN#26

+3VS

2

4

6

8

10

12

14

16

18

20

22

24

26

28

30

32

34

36

38

40

42

44

46

48

50

52

54

2

4

6

8

10

12

14

16

18

20

22

24

26

28

30

32

34

36

38

40

42

44

46

48

50

52

54

B

+1.5VS

R1430 0_0402_5%R1430 0_0402_5%

1 2

R1429 0_0402_5%@ R1429 0_0402_5%@

+3V_WLAN

LED_WWAN# LED_WLAN#

C1468

1U_0603_10V6K~D

WLANPW_EN#

SSM3K7002FU_SC70-3

LPC_AD3 LPC_AD2 LPC_AD1 LPC_AD0

1 2

+3VS

+1.5VS

(+3V_WLAM=1A)

1 2

+1.5VS

R415 0_0603_5%@R415 0_0603_5%@

1 2

R412 0_0603_5%@R412 0_0603_5%@

(+1.5VS=0.5A)

LPC_FRAME# LPC_AD3 LPC_AD2 LPC_AD1 LPC_AD0

WL_OFF# PCI_RST#

1 2 1 2

+3VALW

1

2

Q59

2

G

+B+_BIAS

R3730_0402_5% R3730_0402_5% R3430_0402_5%

R3430_0402_5%

USB20_N6 USB20_P6

T61 PADT61 PAD

12

R1242

R1242 470K_0402_5%

470K_0402_5%

1 2

13

D

S

R1243

1.5M_0402_5%

LPC_FRAME# 18,26

R86100K_0402_5% R86100K_0402_5%

EN_WLANEN_WLAN

@R1243

@

1 2

LPC_FRAME# 18,26

LPC_AD[0..3] 18,26 EC_TX_P80_DATA 26

PCI_RST# 17,21,25

R1000

@R1000

EC_TX_P80_DATA

LED_WLAN# 27

Q129

D

6

2 1

G

Security Classification

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

@

0_0402_5%

C1844

10P_0402_50V8J

@

+1.5VS

+3VS

+3VALW

+3VS

LPC_AD[0..3] 18,26 WL_OFF# 26 PCI_RST# 17,21,25 +3V_WLAN

+1.5VS ICH_SM_CLK 13,14,15,19

ICH_SM_DA 13,14,15,19

USB20_N6 19

USB20_P6 19

+3V_WLAN

+1.5VS

+3V_WLAN

S

45

SI3456BDV-T1-E3 1N TSOP6

3

Issued Date

C

12

1

2

W=20mils

Compal Secret Data

2007/1/15 2008/6/05

Compal Secret Data

Debug Port

JMINI1

1

3

1 1

EC_RX_P80_CLK26

CLK_DEBUG_PORT115

+3VS

2 2

PCI_RST#

1 2

R1431 0_0402_5%@R1431 0_0402_5%@

1 2

R1432 0_0402_5%R1432 0_0402_5%

3

5

7

9

11

13

15

17

19

21

23

25

27

29

31

33

35

37

39

41

43

45

47

49

51

53

GND1

ACES_88910-5204

CONN@

Mini-Express Card---WLAN

JMINI2

ICH_PCIE_WAKE#19,21,25,26

WLAN_REQ#415

CLK_PCIE_MCARD#15

CLK_PCIE_MCARD15

CLK_DEBUG_PORT215

3 3

CLK_DEBUG_PORT2

0.01U_0402_16V7K

C500

4 4

PCIE_RXN319

PCIE_RXP319

PCIE_TXN319 PCIE_TXP319

+3V_WLAN

R999

@R999

@

0_0402_5%

C1843

10P_0402_50V8J

@

1

2

1

C489

2

0.1U_0402_16V4Z~N

ICH_PCIE_WAKE#

CH_DATA MINI_PIN3

R380 0_0402_5%@ R380 0_0402_5%@

CH_CLK MINI_PIN4

PCI_RST#

PCIE_RXN3 PCIE_C_RXN3 PCIE_RXP3 PCIE_C_RXP3

PCIE_TXN3 PCIE_TXP3

12

1

2

4.7U_0805_10V4Z~N

A

1 2

R381 0_0402_5%@ R381 0_0402_5%@

1 2

WLAN_REQ#4

1 2

R403 0_0402_5%R403 0_0402_5%

1 2

R404 0_0402_5%R404 0_0402_5%

1

C485

2

0.01U_0402_16V7K

+3V_WLAN

1

C456

2

1 2

R444 0_0402_5% R444 0_0402_5%

+1.5VS

0.01U_0402_16V7K

1

C488

2

JMINI2

1

3

5

7

9

11

13

15

17

19

21

23

25

27

29

31

33

35

37

39

41

43

45

47

49

51

53

GND1

ACES_88910-5204

CONN@

http://laptop-motherboard-schematic.blogspot.com/

5

4

3

2

1

Place close to codec

AZ_HD_BITCLK

R13

R13 10_0402_5%

10_0402_5%

@

1 2

D D

C C

B B

ACZ_BITCLK18

ADC_ACZ_SDIN018

ACZ_SDOUT18

ACZ_SYNC18

ACZ_RST#18

MIC_CLK_R

1

C1411

C1411 220P_0402_50V7K

220P_0402_50V7K

2

@

10P_0402_50V8J

+5VS

1

C7

2

@

ACZ_BITCLK

R1389 0_0402_5%R1389 0_0402_5%

1 2

MIC_CLK23

MIC_SIG23

SPDIF_OUT30

EC_MUTE#26

R314

R314 10K_0402_5%

10K_0402_5%

1 2

SENSE_B

1

2

HP_JD

1 2

R1398 20K_0402_1%

MIC_JD SENSE_A

1 2

R1399 10K_0402_1%

C122 1000P_0402_50V7K~NC122 1000P_0402_50V7K~N

+5VS

R315

2.49K_0402_1%

1 2

SENSE_A

0.47U_0603_10V7K AMP@

1 2

R1395 0_0402_5%R1395 0_0402_5%

R1391 0_0402_5%@ R1391 0_0402_5%@

1 2

CAP-

C9

CAP+

2.2U_0603_6.3V6K~D

12

C644

C656

+3VS +5VS

+DVDD_HD +AVDD_HD

1

C1727

2

1U_0603_10V6K~D

6

8

5

10

11

2

4

46

48

47

35

36

14

13

7 42 26 30 33

C640

1 2

C638

1 2

1

C1728

C1729

2

.1U_0402_16V7K~D

1

3

9

U60

DVDD

DVDD_IO

HDA_BITCLK

HDA_SDI

HDA_SDO

HDA_SYNC

HDA_RST#

DMIC_CLK/GPIO1

DMIC0/GPIO 2

DMIC1/GPIO0/SPDIF_OUT_1

SPDIF_OUT_0

EAPD

CAP-

CAP+

SENSE_B

SENSE_A

DVSS PVSS AVSS AVSS AVSS

0.1U_0402_16V4Z

DVDD_CORE

DAP

49

92HD81B1X5NLGXA1X8 QFN48P

+5V_AMP

C650

AMP@

AMP_R

AMP_L

EC_MUTE#

10U_0603_6.3V

AVDD27AVDD38PVDD39PVDD

HP0_PORT_A_L

HP0_PORT_A_R

VREFOUT_A_or_ F

HP1_PORT_B_L

HP1_PORT_B_R

PORT_C_L

PORT_C_R

VREFOUT_C

SPKR_PORT_D_L+

SPKR_PORT_D_L-

SPKR_PORT_D_R-

SPKR_PORT_D_R+

PORT_E_L PORT_E_R

PORT_F_L PORT_F_R

PC_BEEP

MONO_OUT

VREFFILT

VREG

4.7U_0603_6.3V

W=40Mil

1

C654

C654 10U_0805_10V4Z

10U_0805_10V4Z

2

AMP@

7

RIN+

17

RIN-

9

LIN+

5

LIN-

19

SHUTDOWN

45

CAP2

V-

GND

21

1

C1726

2

.1U_0402_16V7K~D

AZ_HD_BITCLK

AZ_SDIN0_HD_RADC_ACZ_SDIN0

12

R139033_0402_5% R 139033_0402_5%

MIC_CLK_RMIC_CLK

12

R13940_0603_5% R13940_0603_5%

MIC_SIG_RMIC_SIG

SENSE_B

Vref and CAP2 components need close to codec

1 2

AMP_RIGHT

0.47U_0603_10V7K AMP@

1 2

AMP_LEFT

0.47U_0603_10V7K AMP@

40mil20mil

1

C1734

C1730

2

1U_0603_10V6K~D

AMP_LEFT

28

AMP_RIGHT

29 23

HP_LEFT

31

HP_RIGHT

32

MIC_LEFT

19

MIC_RIGHT

20 24

SPKERO_L1

40

SPKERO_L2

41

SPKERO_R2

43

SPKERO_R1 SPKER_R1

44

15 16

17 18

MONO_C_IN MONO_IN

12

25

22

21

34

37

1

C490

2

16

15

6

VDD

PVDD1

PVDD2

GND41GND311GND213GND1

P3017THF TSSOP 20P

20

AMP@

C1731

2

.1U_0402_16V7K~D

R1407

IDT@ R1407

IDT@

1 2 1 2

R1408 0_0603_5%IDT@ R1408 0_0603_5%IDT@ R1409

IDT@ R1409

IDT@

1 2 1 2

R1410 0_0603_5%IDT@ R1410 0_0603_5%IDT@

1

C15

2

R539

0_0603_5%~D

AMP@

U20

GAIN0

GAIN1

ROUT+

ROUT-

LOUT+

LOUT-

NC

BYPASS

2

10U_0603_6.3V

R1397

1 2

0_0402_5%

C814

2.2U_0603_6.3V6K~D

12

+5VS

2

3

18

14

4

8

12

10

C1732

1

2

1

2

+MIC1_VREFO

0_0603_5%

AMP@

10U_0603_6.3V

+5VS

1U_0603_10V6K~D

10mil

1

C1733

2

.1U_0402_16V7K~D

SPKER_L1 SPKER_L2

SPKER_R2

1

C815

2

1U_0603_10V6K~D

R527 10K_0402_5%AMP@ R527 10K_0402_5%AMP@

R517 10K_0402_5%@ R517 10K_0402_5%@

1

C657

2

1U_0603_10V4Z

R1406

1 2

0_0805_5%

1 2

SPK_R1

SPK_R2

SPK_L1

SPK_L2

SPKERO_L1 SPKERO_L2 SPKERO_R1 SPKERO_R2

1 2

R513 0_0603_5%AMP@ R513 0_0603_5%AMP@

1 2

R519 0_0603_5%AMP@ R519 0_0603_5%AMP@

1 2

R512 0_0603_5%AMP@ R512 0_0603_5%AMP@

1 2

R518 0_0603_5%AMP@ R518 0_0603_5%AMP@

+AVDD_HD

R520 10K_0402_5%

@

1 2

@

1 2

R516 10K_0402_5%AMP@R516 10K_0402_5%AMP@

R526 10K_0402_5%@ R526 10K_0402_5%@

R529 10K_0402_5%

@

1 2

@

R53210K_0402_5%

R53310K_0402_5%

1 2

SPKER_R1

SPKER_R2

SPKER_L1

SPKER_L2

R522 10K_0402_5%

R528 10K_0402_5%

@

1 2

@

12

R53110K_0402_5%

10K_0402_1%

1 2

@

12

R53010K_0402_5%

MIC_RIGHT

HP_LEFT HP_L

HP_RIGHT

+5VALW

R1539

1 2

R362 56_0402_5%R362 56_0402_5%

R364 56_0402_5%R364 56_0402_5%

@

2N7002_SOT23-3

@

2N7002_SOT23-3

EC Beep

BEEP26

ICH Beep

SB_SPKR19

C1416 0.1U_0402_16V4Z

Speaker Connector

D19

1

PESD5V0U2BT_SOT23-3

@

C29 2. 2U_0402_6.3V6C29 2.2U _0402_6.3V6

C30 2. 2U_0402_6.3V6C30 2.2U _0402_6.3V6

R362 and R363= 40~50 ohm , C261 and C253= 68pF

1 2

13

D

Q146

S

Q148

D

1 3

2

3

D21

1

PESD5V0U2BT_SOT23-3

@

1 2

L25 BLM18BD601SN1D_0603~D

HP_R

1 2

L24 BLM18BD601SN1D_0603~D

13

D

2

SSM3K131TU_2-2U1A

G

Q141

S

Q143

G

2

D

1 3

SPKER_R1 SPKER_R2 SPKER_L1

2

3

R353 4.7K_0402_5% R353 4.7K_0402_5%

1 2

R352 4.7K_0402_5% R352 4.7K_0402_5%

1 2

L37 BLM18BD601SN 1D_0603~D

1 2

L36 BLM18BD601SN 1D_0603~D

2

G

2

SPKER_L2

12

C8 1U_0402_6.3V@ C8 1U_0402_6.3V@

2

D20

@

1

13

D

2

SSM3K131TU_2-2U1A

G

Q142

S

Q144

G

2

D

1 3

3

PESD5V0U2BT_SOT23-3

13

D

S

D

1 3

C1412 0.1U_0402_16V4Z

1 2

CONN@

ACES_88266-04001

4

G2

3

G1

2

1

JSPK1

+MIC1_VREFO

MIC-1MIC_LEFT

MIC-2

MIC_JD

C527

@ C527

@

C526

@ C526

@

100P_0402_25V8K

HP_JD

2

D27

@

Q147

@

Q147

@

2N7002_SOT23-3

Q149

@

Q149

@

2N7002_SOT23-3

R1183

499K_0402_1%~D

R1188

499K_0402_1%~D

6 5

R1189

@

1 2

@C23

@

SPKER_R1

C23

100P_0402_25V8K

MONO_IN

10K_0402_5%

@C24

@

SPKER_R2

C24

MICROPHONE IN JACK

JMIC1

1

2

6

6 7

3

4

5

FOX_JA63331-B39S4-7F

CONN@

7

7 8

8

GND

9

GND

10

HEADPHONE OUT JACK

JHP1

1

2

HPL

HPR

2

C2600.01U_0402_25V7K~D@C2600.01U_0402_25V7K~D

3

@

PESD5V0U2BT_SOT23-3

1

2

6

6 7

3

4

5

C2520.01U_0402_25V7K~D@C2520.01U_0402_25V7K~D

FOX_JA63331-B39S4-7F

@

CONN@

2

1

@

C18451000P_0402_50V7K

@C25

@

SPKER_L1

C25

100P_0402_25V8K

HP_L

HP_R

@

2

C18461000P_0402_50V7K

1

@C26

@

SPKER_L2

C26

7

7 8

8

GND

9

GND

10

A A

*

0

1

00

1

0 15.6dB

1

GAINGAIN1GAIN0

6dB

10dB

21.6dB

5

EC_MUTE#

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY TH IRD PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY TH IRD PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONICS, INC.

http://laptop-motherboard-schematic.blogspot.com/

4

MAY BE USED BY OR DISCLOSED TO ANY TH IRD PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

G

Issued Date

13

D

Q145

Q145 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

S

For pop/click noise from S3/S4/cold boot/warm boot

Q141~Q144 Co-Layout with Q146~Q149

Compal Secret Dat a

2008/05/07 2008/6/05

Compal Secret Dat a

SSM3K131TU_2-2U1A

R1540

100K_0402_1%

1 2

Deciphered Dat e

2

SSM3K131TU_2-2U1A

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Codec 92HD81B

LA-4671P

Friday, February 20, 2009

1

24 53

1.0

of

24 53

of

24 53

of

5

Express card

4

3

2

1

D D

(1A)

(1.5A)

(0.5A)

C C

B B

12

C91 0.1U_0402_16V4Z~N

12

C74 0.1U_0402_16V4Z~N

12

C85 0.1U_0402_16V4Z~N

PCI_RST#17,21,23

SYSON26,37,43

SUSP#26,29,37,42,44,47

Express Card Power Switch

+1.5VS

+3VS

PCI_RST#

SYSON

SUSP#

CPUSB#

EXPR_CPUSB#

U11

12

1.5Vin

14

1.5Vin

2

3.3Vin

4

3.3Vin

AUX_IN17AUX_OUT

6

SYSRST#

20

SHDN#

1

STBY#

10

CPPE#

9

CPUSB#

18

RCLKEN

P2231NF_QFN20

1.5Vout

3.3Vout

OC#

PERST#

GND

+1.5VS_PEC

+3VS_PEC

+3V_PEC

PERST#

(1A)

0.1U_0402_16V4Z~N

(1.5A)

(0.5A)

0.1U_0402_16V4Z~N

11 13

3 5

15

19

8

16

NC

7

C90

C92

C75

+1.5VS_PEC

1

2

+3V_PEC

1

2

+3VS_PEC

1

2

4.7U_0805_10V4Z~N

1

C89

2

4.7U_0805_10V4Z~N

1

C93

2

4.7U_0805_10V4Z~N

1

C73

2

JEXP1

1

GND

2

USB_D-

3

USB_D+

4

CPUSB#

5

RSV

6

RSV

7

SMB_CLK

8

SMB_DATA

9

+1.5V

10

+1.5V

11

WAKE#

12

+3.3VAUX

13

PERST#

14

+3.3V

15

+3.3V

16

CLKREQ#

17

CPPE#

18

REFCLK-

19

REFCLK+

20

GND

21

PERn0

22

PERp0

23

GND

24

PETn0

25

PETp0

26

GND

27

GND

28

GND

FOX_1CX41202-KH_26P

EXPCARD_REQ#1615

USB20_N7 USB20_P7

ICH_SMBCLK19 ICH_SMBDATA19

1 2

0_0402_5%

CLK_PCIE_EXPR#15

CLK_PCIE_EXPR15

USB20_N719

USB20_P719

ICH_PCIE_WAKE#19,21,23,26

R48 0_0402_5%R48 0_0402_5% R47 0_0402_5%R47 0_0402_5%

+1.5VS_PEC +1.5VS_PEC

R37

+3V_PEC

+3VS_PEC

PCIE_RXN419 PCIE_RXP419

PCIE_TXN419

PCIE_TXP419

1 2 1 2

ICH_SMBCLK ICH_SMBDATA

USB20_N7_R USB20_P7_R

EXPR_CPUSB#

PCIE_PME#

PERST#

EXPCARD_REQ#16 CPUSB# CLK_PCIE_EXPR# CLK_PCIE_EXPR

PCIE_RXN4 PCIE_RXP4

PCIE_TXN4 PCIE_TXP4

A A

Security Classification

2007/1/15 2008/6/05

Issued Date

THIS SHEET OF ENGINEERING DRAWING I S THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING I S THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

http://laptop-motherboard-schematic.blogspot.com/

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/1/15 2008/6/05

3

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

EXPRESS CARD

LA-4671P

1.0

25 53Friday, February 20, 2009

of

1

of

ICH_PCIE_WAKE#19,21,23,25

CLK_PCI_EC

12

R272

10_0402_5%@

1

C282

@C282

@

15P_0402_50V8J

2

EC_SMB_DA1

EC_SMB_CK1

EC_SMB_DA2

EC_SMB_CK2

LCD_TST

LCD_CBL_DET#

MIC_DIAG

EC_FB_SDATA_R

EC_FB_SCLK_R

MSEN#

TP_DATA TP_CLK

1 2

R413 0_0402_5%R 413 0_0402_5%

+3VALW

R263 4.7K_0402_5% R263 4.7K_0402_5%

R262 4.7K_0402_5% R262 4.7K_0402_5%

R264 4.7K_0402_5%R264 4.7K_0402_5%

R265 4.7K_0402_5%R265 4.7K_0402_5%

R269 4.7K_0402_5%@ R269 4.7K_0402_5%@

R276 4.7K_0402_5%R276 4.7K_0402_5%

R308 10K_0402_5%

R303 4.7K_0402_5% R303 4.7K_0402_5%

R304 4.7K_0402_5% R304 4.7K_0402_5%

R309 10K_0402_5%

R271

4.7K_0402_5%

1 2 1 2

R270

4.7K_0402_5%

EC_MUTE#

12

1 2

12

1 2

+5VS

EC_FB_SCLK27

EC_FB_SDATA27

10K_0402_5%

1 2

R277

32.768KHZ_12.5P_1TJS125BJ2A251

R405

10K_0402_5%

R228

1 2

47K_0402_5%

C268

0.1U_0402_16V4Z

+5VALW

+3VS

+3VALW

1 2

PCIE_PME#_R

2

1

+3VALW

R416 0_0402_5%R416 0_0402_5%

1 2

R417 0_0402_5%R417 0_0402_5%

1 2

TOUCHKEY_TINT27

XCLKO

1

C292

2

18P_0402_50V8J

X2

0.1U_0402_16V4Z~N C281

0.1U_0402_16V4Z~N

PCI_CLKRUN#19

KSI[0..7]27

KSO[0..17]27

R77 47K_0402_5%~D@ R77 47K_0402_5%~D@

R78 47K_0402_5%~D@ R78 47K_0402_5%~D@

EC_TX_P80_DATA23 EC_RX_P80_CLK23

ON_OFF27

NUMLED#27

R278

1 2

20M_0603_5%@

1

4

IN

OUT

NC3NC

2

L18

+3VALW +EC_AVCC

1000P_0402_50V7K~N

111

125

67

VCC

AVCC

INVT_PW M/PWM1/GPIO0F

BEEP#/PWM2/GPIO10

ACOFF/FANPWM2/GPIO13

BATT_TEMP/AD0/GPIO38

BATT_OVP/AD1/GPIO39

AD Input

SELIO2#/AD5/GP IO43

DAC_BRIG/D A0/GPIO3C EN_DFAN1/DA1/GPIO3D

TP_CLK/PSCLK3/GPIO4E

TP_DATA/PSDAT3/GPIO4F

CIR_RLC_TX/GPIO41

FSTCHG/SEL IO#/GPIO50

BATT_CHGI_ LED#/GPIO52

GPIO

BATT_LOW_LED#/GPIO54

VR_ON/XCLK32K/GPIO57

EC_RSMRST#/GPXO03

EC_LID_OUT#/GPXO04

ICH_PWROK/GPXO06

GPO

PM_SLP_S4#/GPXID1

GPI

GND

AGND

GND

69

94

113

1000P_0402_50V7K~N

FANPWM1/GPIO12

ADP_I/AD2/GPIO3A

IREF/DA2/GPIO3 E

PSCLK1/GPIO4 A PSDAT1/GPIO4B PSCLK2/GPIO4 C PSDAT2/GPIO4D

SDICS#/GPXOA00 SDICLK/GPXOA01

SDIDO/GPXOA02

SDIDI/GPXID0

SPICLK/GPIO58

CIR_RX/GPIO40

CAPS_LED#/GPIO53

SUSP_LED#/GPIO55

SYSON/GPIO56

AC_IN/GPIO59

EC_ON/GPXO05

EC_SWI#/GPXO06

BKOFF#/GPXO08

WL_OFF#/GPXO09

ENBKL/GPXID2

ECAGND

C493

0.1U_0402_16V4Z~N C493

0.1U_0402_16V4Z~N

C269

1000P_0402_50V7K~N C269

1000P_0402_50V7K~N

C291

1000P_0402_50V7K~N C291

1000P_0402_50V7K~N

C277

0.1U_0402_16V4Z~N C277

0.1U_0402_16V4Z~N

C285

0.1U_0402_16V4Z~N C285

0.1U_0402_16V4Z~N

1

2

KSI[0..7]

KSO[0..17]

KSO1 KSO2

EC_FB_SCLK_R EC_FB_SDATA_R

R279

R279 0_0402_5%

0_0402_5%

1 2

1

C297

2

GATEA20 KB_RST# SERIRQ LPC_FRAME# LPC_AD3 LPC_AD2 LPC_AD1 LPC_AD0

CLK_PCI_EC PLT_RST# EC_RST# EC_SCI# PCI_CLKRUN#

EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2

SLP_S3# SLP_S5# EC_SMI# LID_SW#

PCIE_PME#_R VGA_THER FAN_SPEED1 TOUCHKEY_TINT EC_TX_P80_DATA EC_RX_P80_CLK ON_OFF PWR_BLUE_LED# NUMLED#

XCLKI XCLKO

1

2

10

12 13 37 20 38

KSI0

55

KSI1

56

KSI2

57

KSI3

58

KSI4

59

KSI5

60

KSI6

61

KSI7

62

KSO0

39

KSO1

40

KSO2

41 42

KSO4

43

KSO5

44

KSO6

45

KSO7

46

KSO8

47

KSO9

48

KSO10

49

KSO11

50

KSO12

51

KSO13

52

KSO14

53 54

KSO16 MSEN#

81

KSO17

82

77 78 79 80

14 15 16 17 18 19 25 28 29 30 31 32 34 36

122 123

C281

1

2

GATEA2018 KB_RST#18 SERIRQ19 LPC_FRAME#18,23 LPC_AD318,23 LPC_AD218,23 LPC_AD118,23 LPC_AD018,23

CLK_PCI_EC15 PLT_RST#7,17,29,30

EC_SCI#19

12 12

EC_SMB_CK148 EC_SMB_DA148 EC_SMB_CK24,30 EC_SMB_DA24,30

SLP_S3#19 SLP_S5#19 EC_SMI#19

VGA_THER30

FAN_SPEED14

XCLKI

1

2

U29

1

GA20/GPIO00

2

KBRST#/GPIO01

3

SERIRQ#

4

LFRAME#

5

LAD3

7

LAD2

8

LAD1

LPC & MISC

LAD0

PCICLK PCIRST#/GPIO05 ECRST# SCI#/GPIO0E CLKRUN#/GPIO1D

KSI0/GPIO30 KSI1/GPIO31 KSI2/GPIO32 KSI3/GPIO33 KSI4/GPIO34 KSI5/GPIO35 KSI6/GPIO36 KSI7/GPIO37 KSO0/GPIO20 KSO1/GPIO21 KSO2/GPIO22 KSO3/GPIO23 KSO4/GPIO24

Int. K/B

KSO5/GPIO25

Matrix

KSO6/GPIO26 KSO7/GPIO27 KSO8/GPIO28 KSO9/GPIO29 KSO10/GPIO2A KSO11/GPIO2B KSO12/GPIO2C KSO13/GPIO2D KSO14/GPIO2E KSO15/GPIO2F KSO16/GPIO48 KSO17/GPIO49

SCL1/GPIO44 SDA1/GPIO45 SCL2/GPIO46 SDA2/GPIO47

6

PM_SLP_S3#/GPIO04 PM_SLP_S5#/GPIO07 EC_SMI#/GPIO0 8 LID_SW# /GPIO0A SUSP#/GPIO0B PBTN_OUT#/GPIO0C EC_PME#/GP IO0D EC_THERM#/GPIO11 FAN_SPEED1/FANFB1/GPIO14 FANFB2/GPIO15 EC_TX/GPIO16 EC_RX/GPIO17 ON_OFF/GPIO18 PWR_LED#/GPIO19 NUMLED#/GPIO1A

XCLK1 XCLK0

KB926QFD2_LQFP128

9

22

33

VCC

PWM Output

DA Output

PS2 Interface

SPI Device Interface

SM Bus

GPIO

GND

11

24

96

VCC

SPI Flash ROM

GND

35

C481

ECAGND

AD3/GPIO3B AD4/GPIO42

DA3/GPIO3F

SPIDI/RD#

SPIDO/WR#

SPICS#

GPXO10 GPXO11

GPXID3 GPXID4 GPXID5 GPXID6 GPXID7

V18R

1

2

21

BEEP

23

W_DISABLE#

26

ACOFF

27

63

BATT_OVP

64

ADP_I

65

AD_BID

66

MIC_DIAG

75 76

DAC_BRIG

68

EN_DFAN1

70

IREF

71 72

83

LCD_TST

84

VGA_ON

85

LCD_CBL_DET#

86

TP_CLK

87

TP_DATA

88

SPI_PULLDOWNKSO3

97

EN_WOL#

98

BT_OFF#

99

VGATE

109

FRD#SPI_SO

119

FWR#SPI_SI

120

SPI_CLK

126

FSEL#SPICS#

128

WLANPW_EN#KSO15

73 74

FSTCHG

89

BATT_CHG_LED#

90

CAPSLED#

91

BATT_LOW_LED#

92

SCRLED#

93

SYSON

95

VR_ON

121

ACIN

127

EC_RSMRST#

100

EC_LID_OUT#

101

EC_ON

102

EC_SWI#

103

ICH_PWROK

104

BKOFF#

105

WL_OFF#

106

LCD_VCC_TEST_EN

107

PSID_DISABLE#

108

SLP_S4#

110

EC_ENBKL

112

USB_EN

114

EC_THERM#

115

SUSP#

116 117

PS_ID

118

124

C270 0.1U_0402_16V4ZC270 0.1U_0402_16V4Z

L18

FBM-11-160808-601-T_0603

2

C482

0.1U_0402_16V4Z~N

1

R266 0_0402_5%R266 0_0402_5%

1 2

C273 0.01U_0402_16V7KC273 0.01U_0402_16V7K

BATT_TEMP

EC_MUTE_C#

PBTN_OUT#

1 2

C322

12

L19FBM-11-160808-601-T_0603 L19FBM-11-160808-601-T_0603

1 2

R418 0_0402_5%R418 0_0402_5%

R274 4.7K_0402_5% R274 4.7K_0402_5%

MSEN# 16

BKOFF# 16

EC_THERM# 19

PBTN_OUT# 19

1U_0603_10V4Z

12

+3VALW+EC_AVCC

INVT_PWM 16 BEEP 24

W_DISABLE# 28

ACOFF 40

BATT_TEMP 48 BATT_OVP 48 ADP_I 40

MIC_DIAG 23 POW_MON 46

DAC_BRIG 16 EN_DFAN1 4 IREF 4 0 CHGVADJ 40

LCD_TST 16 VGA_ON 45

LCD_CBL_DET# 16 TP_CLK 27 TP_DATA 27

EN_WOL# 21 BT_OFF# 23 VGATE 7,19,46

WLANPW_EN# 23

FSTCHG 40

SYSON 25,37,43 VR_ON 46 ACIN 19,39,40

EC_RSMRST# 19 EC_LID_OUT# 19 EC_ON 27 EC_SWI# 19 ICH_PWROK 7,19

PSID_DISABLE# 39

SLP_S4# 19 EC_ENBKL 16 USB_EN 28

SUSP# 25,29,37,42,44,47

PS_ID 39

ECAGND

12

CAPSLED# 27

SCRLED# 27

WL_OFF# 23

LCD_VCC_TEST_EN 16

EC_MUTE# 24

PLT_RST#7,17,29,30

LID_SW#

3

C314

1 2

0.1U_0402_16V4Z~N

FSEL#SPICS# SPI_CS#

R439 15_0402_5%

FRD#SPI_SO

1 2

Power status(Left)

PWR_BLUE_LED#27

LPC_FRAME#

PCI_CLKRUN#

+3VS

+3VALW

0.5A per each pin

18P_0402_50V8J

http://laptop-motherboard-schematic.blogspot.com/

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONIC S, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONIC S, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/1/15 2008/6/05

Compal Secret Data

Deciphered Date

REED Switch

Q28

Q28 APX9132ATI-TRL_SOT23-3

APX9132ATI-TRL_SOT23-3

2

VDD

VOUT

GND

1

+3VALW

R437

12

10K_0402_5%

12

R27515_0402_5% R27515_0402_5%

PWR_BLUE_LED#

BATT_LOW_LED#

BATT_CHG_LED#

12-22/Y2BHC-A30/2C_Y/B~D

TPM 1.2 Conn

JTPM1

1

GND1

3

SERIRQ

12mA

IAC_SDATA_OUT

5

GND2

7

IAC_SYNC

9

IAC_SDATA_IN

11

IAC_RESET#

Title

Size Document Number Rev

Custom

Date: Sheet

Board ID

Ra

Rb

M/B rev:0.1; 0.2; 0.3; 1.0 Voltage:0.0; 0.4; 0.8; 1.0

Ra

Board ID

0

1

+3VALW

1

C274

0.1U_0402_16V4Z

2

20mils

U37

1

CS#

2

SO

3

WP#

4

GND

W25X16-VSSIG_SO8

LED1

LED1 12-21-BHC-ZL1M2RY-2C BLUE

12-21-BHC-ZL1M2RY-2C BLUE

LED2

Y

3

2

B

RES0 RES1

GND3 GND4

IAC_BITCLK

GND13GND14GND15GND16GND17GND

18

2

3

4

5

SPI Flash (8Mb*1)

C507

@C507

@

1 2

0.1U_0402_16V4Z~N

8

VCC

7

HOLD#

6

SCLK

5

SI

R472

12

1 2

200_0603_5%

1

1 2

200_0603_5%

2 4 6

3.3V

8 10 12

ACES_88018-124L

CONN@

Compal Electronics, Inc.

BIOS & EC I/O Port

LA-4671P

+3VALW

R232

R232 100K_0402_5%

100K_0402_5%

1 2

R231

215K_0402_1%~D

1 2

3.3V+/-5% 0.6V~ 1.6VVCC

100k

115K +/-1% 1.7651

154K +/-1%

215K +/-1% 2.2524

0_0402_5%

SPI_CLK_RSPI_SO

SPI_SI

R471

LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3

Rb

1 2

AD_BID

1

2

2.0008STST2

R419

@ R419

@

CLK_PCI_TPM 15

26 53Friday, February 20, 2009

C272

0.1U_0402_16V4Z

SPI_CLK_R

SPI_CLK

R42015_0402_5% R42015_0402_5%

FWR#SPI_SI

R43815_0402_5% R43815_0402_5%

+5VALW

of

1.0

A

+3VALW

Power Button

R297

1 2

D15

100K_0402_5%

PWR_ON-OFF_BTN#

CHN202UPT SC-70

1 1

EC_ON26

EC_ON

+3VALW

@

CHN202UPT SC-70

R296

4.7K_0402_5%

1 2

R291

R291 0_0402_5%

0_0402_5%

2

1

2

G

3

13

D

Q26

SSM3K7002FU_SC70-3

S

51ON#

2

C313

C313 1000P_0402_50V7K~N

1000P_0402_50V7K~N

1

ON_OFF 26

51ON# 39

12

B

D13

D13 RLZ20A_LL34

RLZ20A_LL34

PWR_ON-OFF_BTN#

Power Switch

SW1

@SW1

@

SW_1BT002-0121L_4P

3

4

5

6

C

INT_KBD CONN.

KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6

1

2

KSI[0..7]26

KSO[0..17]26

KSI[0..7]

KSO[0..17]

KSO7 KSO8

KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15 KSO16 KSO17

KSI0

KSI1

KSI2

KSI3

KSI4

KSI5

KSI6

KSI7

D

JKB1

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

G1

28

G2

ACES_88514-2601_26P

CONN@

KSO8

C449 100P_0402_25V8KC449 100P_0402_25V8K

KSI3

C239 100P_0402_25V8KC239 100P_0402_25V8K

KSO9

C249 100P_0402_25V8KC249 100P_0402_25V8K

KSI2

C240 100P_0402_25V8KC240 100P_0402_25V8K

KSI1

C241 100P_0402_25V8KC241 100P_0402_25V8K

KSO10

C248 100P_0402_25V8KC248 100P_0402_25V8K

KSO11

C247 100P_0402_25V8KC247 100P_0402_25V8K

KSI0

C242 100P_0402_25V8KC242 100P_0402_25V8K

KSO12

KSO13

C245 100P_0402_25V8KC245 100P_0402_25V8K

KSO14

C244 100P_0402_25V8KC244 100P_0402_25V8K

KSO15

C243 100P_0402_25V8KC243 100P_0402_25V8K

KSO16

C251 100P_0402_25V8KC251 100P_0402_25V8K

KSI7

KSI6

KSI5

KSO0

KSO1

KSO2

KSI4

KSO3

KSO4

KSO5

KSO6

KSO7

KSO17

For EMI

E

C235 100P_0402_25V8KC235 100P_0402_25V8K

C236 100P_0402_25V8KC236 100P_0402_25V8K

C237 100P_0402_25V8KC237 100P_0402_25V8K

C441 100P_0402_25V8KC441 100P_0402_25V8K

C442 100P_0402_25V8KC442 100P_0402_25V8K

C443 100P_0402_25V8KC443 100P_0402_25V8K

C238 100P_0402_25V8KC238 100P_0402_25V8K

C444 100P_0402_25V8KC444 100P_0402_25V8K

C445 100P_0402_25V8KC445 100P_0402_25V8KC246 100P_0402_25V8KC246 100P_0402_25V8K

C446 100P_0402_25V8KC446 100P_0402_25V8K

C447 100P_0402_25V8KC447 100P_0402_25V8K

C448 100P_0402_25V8KC448 100P_0402_25V8K

C450 100P_0402_25V8KC450 100P_0402_25V8K

Function/B CONN.

2 2

Regulator for ENE sensor

1U_0402_6.3V4Z

1

2

Adjustable Output

R901

1 2

10K_0603_1%

RT9198-33PBR SOT-23 5P

SHDN#3BP

2

GND

1

VIN

VOUT

U57

LED_WLAN#23

4

5

+3VS_FUN

For ENE ( Close to JFN1 ).

Change pin 10 from FUN_KEY1# to BTOP_BTN#

FB_SDATA

C27

33P_0402_50V8J

FB_SCLK

C28

33P_0402_50V8J

For ENE near JFN1

EC_FB_SDATA26

EC_FB_SCLK26

PWR_ON-OFF_BTN#

+5VS

C250

3 3

+3VS

LED_WLAN# EC_FB_SDATA EC_FB_SCLK

close to JFN1

R882

@R882

@

0_0603_5%

1 2

SATA_LED#18

BLUETOOTH_LED#23

PWR_BLUE_LED#26

TOUCHKEY_TINT26

NUMLED#26 CAPSLED#26 SCRLED#26

D63

@

3

2

PESD5V0U2BT_SOT23-3

+3VALW

1

+3VS_FUN

1 2

R624 0_0402_5%R624 0_0402_5%

PWR_ON-OFF_BTN#

1 2

BLUETOOTH_LED#

PWR_BLUE_LED#

TOUCHKEY_TINT NUMLED# CAPSLED# SCRLED#

R_SATA_LED#

FB_SDATA

L23KC FBMA-11-100505-801T L23KC FBMA-11-100505-801T

FB_SCLK

L10KC FBMA-11-100505-801T L10KC FBMA-11-100505-801T

1 2

R610 0_0402_5%R610 0_0402_5%

JFN1

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

GND

18

GND

ACES_88512-1641

Touch PAD/B CONN.

TP/B TO M/B

TP_CLK TP_DATA

1

@

C309100P_0402_25V8K@C309100P_0402_25V8K

2

C310100P_0402_25V8K@C310100P_0402_25V8K

2

3

D24

PESD5V0U2BT_SOT23-3

JP1

6 5 4 3 2 1

ACES_88514-0441

CONN@

@D24

@

GND GND 4 3 2 1

C300

0.01U_0402_16V7K

+5VS

1

TP_CLK26 TP_DATA26

2

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

http://laptop-motherboard-schematic.blogspot.com/

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/1/15 2008/6/05

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

1

Compal Electronics, Inc.

PWR_OK/BTN/TP

LA-4671P

1.0

27 53Friday, February 20, 2009

E

27 53Friday, February 20, 2009

1.0

of

C1497

.1U_0402_16V7K~D

C1502

.1U_0402_16V7K~D

C1505

.1U_0402_16V7K~D

+5VALW

1

2

1

2

1

2

W=40mils

W=80mils

W=40mils

USB_EN#

R1253

1 2

0_0402_5%

USB_OC#019

R1256

1 2

0_0402_5%

R1261

1 2

0_0402_5%

USB_OC#219

+USB_AS

8 7 6 5

12

+USB_BS+5VALW

8 7 6 5

12

+USB_CS+5VALW

8 7 6 5

12

W=40mils

2

G

R1255

R1255 100K_0402_5%

100K_0402_5%

@

2

G

R1260

R1260 100K_0402_5%

100K_0402_5%

@

2

G

R1264

R1264 100K_0402_5%

100K_0402_5%

@

W=80mils

W=40mils

U12

1

GND

VOUT

2

VOUT

VIN VIN3VOUT

4

FLG

EN

RT9711PS_SO8

USB_EN#

U13

1

GND

VOUT

2

VOUT

VIN VIN3VOUT

4

FLG

EN

RT9711PS_SO8

USB_OC#8_919

USB_EN#

U14

1

GND

VOUT

2

VOUT

VIN VIN3VOUT

4

FLG

EN

RT9711PS_SO8

USB_EN#

Close to USB Connector.

1

+

12

R155

1K_0402_5%~D

13

D

S

+

2

Q130

Q130 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

Close to USB Connector.

1

+

12

R1257

1K_0402_5%~D

13

D

S

+

2

Q131

Q131 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

Close to USB Connector.

12

R1262

1K_0402_5%~D

13

D

S

1

+

2

Q132

Q132 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

C1495

150U_Y_6.3VM

C1500

150U_Y_6.3VM

C1503

150U_Y_6.3VM

L122

@L122

@

USB20_N0

USB20_P0

USB20_N9

USB20_P9

USB20_N8

USB20_P8

USB20_N2

USB20_P2

1

4

WCM2012F2S-900T04_0805

R208 0_0402_5%

R209 0_0402_5%

L109

@L109

@

1

4

WCM2012F2S-900T04_0805

R202 0_0402_5%

R203 0_0402_5%

L110

@L110

@

4

1

WCM2012F2S-900T04_0805

R204 0_0402_5%

R205 0_0402_5%

L111

@L111

@

1

4

WCM2012F2S-900T04_0805

R206 0_0402_5%

R207 0_0402_5%

C1496

.1U_0402_16V7K~D

C1501

.1U_0402_16V7K~D

C1504

.1U_0402_16V7K~D

USB20_N019

USB20_P019

USB20_N919

USB20_P919

USB20_N819

USB20_P819

USB20_N219

USB20_P219

+USB_AS

W=40mils

JUSBP5

TYCO_0-1775501-1_4P-T

+USB_BS

+USB_CS

JUSBP5

1

VCC

2

USB_N

3

USB_P

4

GND

5

GND

6

GND

7

GND

8

GND

CONN@

W=40mils

JUSBP3

1

VCC

2

USB_N

3

USB_P

4

GND

5

GND

6

GND

7

GND

8

GND

TYCO_0-1775501-1_4P-T

CONN@

W=40mils

JUSBP2

1

VCC

2

USB_N

3

USB_P

4

GND

5

GND

6

GND

7

GND

8

GND

TYCO_0-1775501-1_4P-T

CONN@

W=40mils

JUSBP1

1

VCC

2

USB_N

3

USB_P

4

GND

5

GND

6

GND

7

GND

8

GND

TYCO_0-1775501-1_4P-T

CONN@

+USB_AS

USB_P0-

USB_P9-

+USB_BS

USB_P8- USB_P9+

USB_P2+

+USB_CS

2

USB_P0-

USB_P0+

3

12

2

USB_P9-

USB_P9+

3

12

3

USB_P8USB_P8+

2

12

2

USB_P2USB_P2+

3

12

D58

@D58

@

6

CH3

5

Vp

4

CH4

CM1293-04SO_SOT23-6

D59

@D59

@

6

CH3

5

Vp

4

CH4

CM1293-04SO_SOT23-6

D60

@D60

@

6

CH3

5

Vp

4

CH4

CM1293-04SO_SOT23-6

CH2

CH1

CH2

CH1

USB_P0+

3

2

Vn

1

USB_P8+

3

2

Vn

1

3

CH2

2

Vn

USB_P2-

1

CH1

C1506

.1U_0402_16V7K~D

+5VALW +USB_DS

W=80mils

1

2

USB_EN#

R1266

1 2

0_0402_5%

USB_OC#10_1119

U15

1

GND

2

VIN VIN3VOUT

4

EN

RT9711PS_SO8

USB_EN#

VOUT VOUT

8 7 6 5

FLG

12

R1269

R1269 100K_0402_5%

100K_0402_5%

@

http://laptop-motherboard-schematic.blogspot.com/

W=80mils

2

G

12

R1267

1K_0402_5%~D

13

D

Q134

Q134 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

S

+5VALW

R1265

R1265 10K_0402_5%

10K_0402_5%

1 2

USB_EN#

13

D

2

G

D

Q133

Q133 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

S

Compal Secret Data

2007/1/15 2008/6/05

Compal Secret Data

USB_EN26

USB_EN

Security Classification

Issued Date

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

IEEE1394_TPBN029 IEEE1394_TPBP029 IEEE1394_TPAN029 IEEE1394_TPAP029

USB20_P1119

USB20_N1119

W_DISABLE#26

Deciphered Date

USB20_P1019 USB20_N1019

+3VS +USB_DS

W=80mils

JUSBP4

1

2

3

4

5

6

7

8

9

10

11

12

13

14

ACES_87213-1400G

CONN@

Title

Size Document Number Rev

Custom

Date: Sheet

Close to JUSBP4 Pin 13

W_DISABLE#

1

D52

DAN217_SC59-3

2

3

Compal Electronics, Inc.

USB/ESATA/1394 CONN

LA-4671P

@D52

@

+3VS

28 53Friday, February 20, 2009

of

1.0

5

0_0603_5%

CLK_PCIE_MEDIA15 CLK_PCIE_MEDIA#15

Media_REQ#3215

+1.8VCCD_CB

C1824

1 2

R1472

+1.8VCCD_CB

C1786

0_0603_5%

1 2

R1520

PCIE_TXP519 PCIE_TXN519

PCIE_RXP519 PCIE_RXN519

PLT_RST#7,17,26,30

1

2

+3VS

4.7U_0805_10V4Z

C1794

+1.8VCCD_CB

D D

Q140

@

AO3413_SOT23

D

S

D

S

0.1U_0402_10V6K

VOUT

U65

FB

+3VS_PHY

C1798

13

G

0.01U_0402_16V7K

2

1

C1790

2

@

+3VS_PHY

5

4

22U_0805_6.3V6M~D

4.7U_0805_10V4Z

+1.8V

R1474

@R1474

@

R1515

R1515 10K_0402_5%

10K_0402_5%

1 2

100K_0402_5%

1

VIN

2

GND

3

EN

RT9043-GB_SOT23-5~D

0.1U_0402_10V6K

1

C1797

C1796

2

SUSP37,47

C C

B B

A A

close to OZ888 Chipset

+3VALW

SUSP#

SUSP#25,26,37,42,44,47

1U_0402_6.3V6K~D

C1823

1

2

LED behave: Idel ---------> low Accress data --> always high

0_0603_5%

+3VS

1 2

R1477

C1782

0.1U_0402_10V6K

1

C1787

2

+3VS_PHY_PLL

4.7U_0805_10V4Z

C1795

R1480

1 2

10K_0402_5%

4

0.1U_0402_10V6K

4.7U_0805_10V4Z

1

C1783

2

0.1U_0402_10V6K

1

C1789

C1788

2

0.1U_0402_10V6K

1

2

PCIE_RXP5 PCIE_RXN5

CLK_PCIE_Media CLK_PCIE_Media#

Media_REQ#32

PLT_RST#

R1514

61.9K_0402_1%~D

1 2

R1516

R1516 100K_0402_1%~D

100K_0402_1%~D

1 2

3

0.1U_0402_10V6K

1

C1784

2

+1.8VCCA_CB

@

+1.8VCCA_CB_OUT

R1473

1 2

0_0603_5%

0.1U_0402_10V6K

1

+3VS

2

C1791

1 2

C1799 0.1U_0402_10V6K

C1800 0.1U_0402_10V6K

+1.8VCCD_CB_OUT

R1476

@ R1476

@

1 2

0_0603_5%

0.1U_0402_10V6K

4.7U_0805_10V4Z

R1517 0_0402_5%@ R1517 0_0402_5%@

MMI_MS_XD_D0

MMI_MS_XD_D2 MMI_MS_XD_D3 MMI_MMC+_MS_XD_D4 MMI_MMC+_MS_XD_D5 MMI_MMC+_MS_XD_D6 MMI_MMC+_MS_XD_D7

MMI_XD_WE# MMI_XD_WP MMI_MS_BS_XD_ALE XD_ALE MMI_XD_CD# MMI_XD_RB# MMI_XD_RE# MMI_MS_CLK_XD_CE# MS_CLK MMI_XD_CLE

C1792

12

1

2

12

0.1U_0402_10V6K

1

C1793

2

R1478

R1479

1U 10V Z Y5V 0603

1 2

0_0402_5%

12

1.2K_0402_1%

12

5.1K_0402_1%

PCIE_TXP5 PCIE_TXN5

R1518

R_PCIE_RXP5 R_PCIE_RXN5

1

C1802

2

R1483 0_0402_5%

1 2

R1484 0_0402_5%

1 2

R1485 0_0402_5%

1 2

R1486 0_0402_5%

1 2

R1487 0_0402_5%

1 2

R1488 0_0402_5%

1 2

R1489 0_0402_5%

1 2

R1490 0_0402_5%

1 2

R1491 0_0402_5%

1 2

R1492 0_0402_5%

1 2

R1493 0_0402_5%

1 2

R1495 0_0402_5%

1 2

R1498 0_0402_5%

1 2

R1499 0_0402_5%

1 2

R1500 0_0402_5%

1 2

R1501 0_0402_5%

1 2

+3VS_CR

7 14 17

1

4 18 24 41 64

20 28

44 27 19

2 40 35

3

11

9

10

12 13

15 16

5

6

32

31

65

1

2

U46

PE_VCCA PE_VCCA PE_VCCA

VCCA_OUT

POWER

CORE_VCCD CORE_VCCD CORE_VCCD CORE_VCCD CORE_VCCD

VCCD_OUT VCCD_OUT

3.3VCCD

3.3VCCA

PE_3.3VCCA

PLL_REF_RETURN

PE_RTERM2

PE_RTERM1

PE_RXP PE_RXN

PE_TXP PE_TXN

PE_REFCLKP PE_REFCLKN

PE_CLKREQ#

PE_RST#

DGND

OZ888GS0L1N_QFN64_8X8

C1803

C1803 1U 10V Z Y5V 0603

1U 10V Z Y5V 0603

XD_D0 XD_D1 XD_D2 XD_D3 XD_D4 XD_D5 XD_D6 XD_D7

XD_WE# XD_WP

XD_CD# XD_RB# XD_RE# XD_CE# XD_CLE

1394_TPBN 1394_TPBP

1394_TPAN 1394_TPAP

1394_TPBIAS

IEEE1394

1394_XI

1394_XO

1394_REF

MMI_VCC

MMI_XD_CD#

MMI_MS_CD#

MMI_SD_MMC_ CD#

MS_CLK/XD_CE#

SD_MMC_CLK

MMI_W PI#

MMI_XD_W PO

MMI_XD_RE# MMI_XD_RB# MMI_XD_CLE

SD_MMC_CMD

MMI_XD_W E#

MS_BS/XD_ALE

MMC_MS_XD_D7 MMC_MS_XD_D6 MMC_MS_XD_D5 MMC_MS_XD_D4

PCIe

CardReader

MS_XD_D3

SD_MMC_D3

MS_XD_D2

SD_MMC_D2

MS_XD_D1

SD_MMC_D1

MS_XD_D0

SD_MMC_D0

JSD1

3

XD-VCC

32

XD-D0

10

XD-D1

9

XD-D2

8

XD-D3

7

XD-D4

6

XD-D5

5

XD-D6

4

XD-D7

34

XD-WE

33

XD-WP

35

XD-ALE

40

XD-CD

39

XD-R/B

38

XD-RE

37

XD-CE

36

XD-CLE

11

7in1-GND

31

7in1-GND

41

7in1-GND

42

7in1-GND

TAITW_R015-A10-LM

AGND

GND

+3VS_CR +3VS_CR

34

36 37

38

42 43

R1475 5.9K_0402_1%R1475 5.9K _0402_1%

39

26

25 29 30

45 46 61 63 62 23 22 48 21 47

49 50 51 52

53 54 55 56 57 58 59 60

8

7 IN 1 CONN

IEEE1394_TPBP0

IEEE1394_TPAN0 IEEE1394_TPAP0

IEEE1394_TPBIAS 0

OZ888XI OZ888XO

1 2

MMI_XD_CD# MMI_MS_CD# MMI_SD_CD#

MMI_MS_CLK_XD_CE# MMI_SD_CLK MMI_SD_WP# MMI_XD_WP MMI_XD_RE# MMI_XD_RB# MMI_XD_CLE MMI_SD_CMD MMI_XD_WE# MMI_MS_BS_XD_ALE

MMI_MMC+_MS_XD_D7 MMI_MMC+_MS_XD_D6 MMI_MMC+_MS_XD_D5 MMI_MMC+_MS_XD_D4

MMI_MS_XD_D3 MMI_SD_D3 MMI_MS_XD_D2 MMI_SD_D2 MMI_MS_XD_D1 MMI_SD_D1 MMI_MS_XD_D0 MMI_SD_D0

IEEE1394_TPBN0

33

R1521

R1521 0_0603_5%

0_0603_5%

1 2

SD-VCC MS-VCC

SD_CLK SD-DAT0 SD-DAT1 SD-DAT2 SD-DAT3 SD-DAT4 SD-DAT5 SD-DAT6 SD-DAT7

SD-CD

SD-WP

SD-CMD

MS-SCLK

MS-BS

MS-INS

MS-DATA0 MS-DATA1 MS-DATA2 MS-DATA3

2

close to OZ888 Chipset

+3VS_CR

IEEE1394_TPBIAS 0

Layout Note: Place close to OZ888 Chipset.

21 28

20 14 12 30 29 27 23 18 16

1 2 25

26 13 22

17 15 19 24

SD_MMC_CLKMMI_MS_XD_D1 SD_MMC_D0 SD_MMC_D1 SD_MMC_D2 SD_MMC_D3 MMC+_D4 MMC+_D5 MMC+_D6 MMC+_D7

SD_CD# SD_WP# SD_CMD

MS_BS MS_CD#

MS_D0 MS_D1 MS_D2 MS_D3

R1522 0_0402_5%

1 2

R1523 0_0402_5%

1 2

R1524 0_0402_5%

1 2

R1525 0_0402_5%

1 2

R1526 0_0402_5%

1 2

R1527 0_0402_5%

1 2

R1528 0_0402_5%

1 2

R1529 0_0402_5%

1 2

R1530 0_0402_5%

1 2

R1494 0_0402_5%

1 2

R1531 0_0402_5%

1 2

R1532 0_0402_5%

1 2

R1533 0_0402_5%

1 2

R1534 0_0402_5%

1 2

R1502 0_0402_5%

1 2

R1535 0_0402_5%

1 2

R1536 0_0402_5%

1 2

R1537 0_0402_5%

1 2

R1538 0_0402_5%

1 2

1

Layout Note: Place close to OZ888 Chipset and Shield GND.

C1781

18P_0402_50V8J

C1785

18P_0402_50V8J

1U_0603_10V4Z

56.2_0402_1%

12

R1481

R1496

C1805

56.2_0402_1%

12

270P_0402_50V7K

2

C1805

1

R1482

56.2_0402_1%

12

R1497

5.1K_0402_1%

R1503

1 2

1U_0603_10V4Z

1

C1804

2

IEEE1394_TPAP0

IEEE1394_TPAN0 IEEE1394_TPBP0

IEEE1394_TPBN0

MMI_SD_CLK MMI_SD_D0 MMI_SD_D1 MMI_SD_D2 MMI_SD_D3 MMI_MMC+_MS_XD_D4 MMI_MMC+_MS_XD_D5 MMI_MMC+_MS_XD_D6 MMI_MMC+_MS_XD_D7

MMI_SD_CD# MMI_SD_WP# MMI_SD_CMD

MMI_MS_CLK_XD_CE# MMI_MS_BS_XD_ALE MMI_MS_CD#

MMI_MS_XD_D0 MMI_MS_XD_D1 MMI_MS_XD_D2 MMI_MS_XD_D3

R990

12

0_0402_5%

X3

24.576MHz_16P_1BG24576CKIA~D

1 2

12

OZ888XO

MMI_MS_CLK_XD_CE#

OZ888XI

12

IEEE1394_TPAP0 28

IEEE1394_TPAN0 28 IEEE1394_TPBP0 28

IEEE1394_TPBN0 28

MMI_SD_CLK

10P_0402_50V8J

R993

@R993

@

0_0402_5%

10P_0402_50V8J

R995

@R995

@

0_0402_5%

C1842

@

12

C1801

@

12

1

2

1

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2007/09/01 2008/6/05

Compal Secret Data

Deciphered Date

Title

Size Doc ument Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

OZ129_Card Reader / 1394

LA-4671P

1

1.0

of

29 53Friday, February 20, 2009

http://laptop-motherboard-schematic.blogspot.com/

5

SCLK

SDA

GND

XTALSSIN33 CLK_NVSS_27M15

PEG_NTX_GRX_P[0..15]

PEG_NTX_GRX_N[0..15]

PEG_NRX_GTX_P[0..15]

PEG_NRX_GTX_N[0..15]

EC_SMB_CK2

8

EC_SMB_DA2

7

6

5

C15110.1U_0402_10V7K~D

12

VGA@

C15130.1U_0402_10V7K~D

12

VGA@

C15150.1U_0402_10V7K~D

12

VGA@

C15170.1U_0402_10V7K~D

12

VGA@

C15190.1U_0402_10V7K~D

12

VGA@

C15210.1U_0402_10V7K~D

12

VGA@

C15230.1U_0402_10V7K~D

12

VGA@

C15250.1U_0402_10V7K~D

12

VGA@

C15270.1U_0402_10V7K~D

12

VGA@

C15290.1U_0402_10V7K~D

12

VGA@

C15310.1U_0402_10V7K~D

12

VGA@

C15330.1U_0402_10V7K~D

12

VGA@

C15350.1U_0402_10V7K~D

12

VGA@

C15370.1U_0402_10V7K~D

12

VGA@

C15390.1U_0402_10V7K~D

12

VGA@

C15410.1U_0402_10V7K~D

12

VGA@

CLK_PCIE_VGA15 CLK_PCIE_VGA#15

R1297 0_0402_5%~DVGA@R1297 0_0402_5%~DVGA@

1 2

R1300

1 2

XTALOUTBUFF33

R1158 0_0402_5%~D

R1158 0_0402_5%~D R1159 0_0402_5%~DVGA@R1159 0_0402_5%~DVGA@

C15100.1U_0402_10V7K ~D

12

VGA@

C15120.1U_0402_10V 7K~D

12

VGA@

C15140.1U_0402_10V 7K~D

12

VGA@

C15160.1U_0402_10V7K~D

12

VGA@

C15180.1U_0402_10V7K~D

12

VGA@

C15200.1U_0402_10V7K~D

12

VGA@

C15220.1U_0402_10V7K~D

12

VGA@

C15240.1U_0402_10V7K~D

12

VGA@

C15260.1U_0402_10V7K~D

12

VGA@

C15280.1U_0402_10V 7K~D

12

VGA@

C15300.1U_0402_10V 7K~D

12

VGA@

C15320.1U_0402_10V 7K~D

12

VGA@

C15340.1U_0402_10V 7K~D

12

VGA@

C15360.1U_0402_10V 7K~D

12

VGA@

C15380.1U_0402_10V 7K~D

12

VGA@

C15400.1U_0402_10V 7K~D

12

VGA@

@

1 2 1 2

PEG_NTX_GRX_P0 PEG_NTX_GRX_N0 PEG_NTX_GRX_P1 PEG_NTX_GRX_N1 PEG_NTX_GRX_P2 PEG_NTX_GRX_N2 PEG_NTX_GRX_P3 PEG_NTX_GRX_N3 PEG_NTX_GRX_P4 PEG_NTX_GRX_N4 PEG_NTX_GRX_P5 PEG_NTX_GRX_N5 PEG_NTX_GRX_P6 PEG_NTX_GRX_N6 PEG_NTX_GRX_P7 PEG_NTX_GRX_N7 PEG_NTX_GRX_P8 PEG_NTX_GRX_N8 PEG_NTX_GRX_P9 PEG_NTX_GRX_N9 PEG_NTX_GRX_P10 PEG_NTX_GRX_N10 PEG_NTX_GRX_P11 PEG_NTX_GRX_N11 PEG_NTX_GRX_P12 PEG_NTX_GRX_N12 PEG_NTX_GRX_P13 PEG_NTX_GRX_N13 PEG_NTX_GRX_P14 PEG_NTX_GRX_N14 PEG_NTX_GRX_P15 PEG_NTX_GRX_N15

PEG_MRX_GTX_C_P 0 PEG_MRX_GTX_C_N0 PEG_MRX_GTX_C_P 1 PEG_MRX_GTX_C_N1 PEG_MRX_GTX_C_P 2 PEG_MRX_GTX_C_N2 PEG_MRX_GTX_C_P 3 PEG_MRX_GTX_C_N3 PEG_MRX_GTX_C_P 4 PEG_MRX_GTX_C_N4 PEG_MRX_GTX_C_P 5 PEG_MRX_GTX_C_N5 PEG_MRX_GTX_C_P 6 PEG_MRX_GTX_C_N6 PEG_MRX_GTX_C_P 7 PEG_MRX_GTX_C_N7 PEG_MRX_GTX_C_P 8 PEG_MRX_GTX_C_N8 PEG_MRX_GTX_C_P 9 PEG_MRX_GTX_C_N9 PEG_MRX_GTX_C_P 10 PEG_MRX_GTX_C_N10 PEG_MRX_GTX_C_P 11 PEG_MRX_GTX_C_N11 PEG_MRX_GTX_C_P 12 PEG_MRX_GTX_C_N12 PEG_MRX_GTX_C_P 13 PEG_MRX_GTX_C_N13 PEG_MRX_GTX_C_P 14 PEG_MRX_GTX_C_N14 PEG_MRX_GTX_C_P 15 PEG_MRX_GTX_C_N15

CLK_PCIE_VGA CLK_PCIE_VGA#

PEX_TERMP

2.49K_0402_1%~DVGA@

XTALOUTBUFF

XTALSSIN_R

PEG_NTX_GRX_P[0..15]9

PEG_NTX_GRX_N[0..15]9

PEG_NRX_GTX_P[0..15]9

PEG_NRX_GTX_N[0..15]9

D D

PEG_NRX_GTX_P0 PEG_NRX_GTX_N0 PEG_NRX_GTX_P1 PEG_NRX_GTX_N1 PEG_NRX_GTX_P2 PEG_NRX_GTX_N2 PEG_NRX_GTX_P3 PEG_NRX_GTX_N3 PEG_NRX_GTX_P4

C C

B B

@

C1545

A A

0.1U_0402_16V4Z

PEG_NRX_GTX_N4 PEG_NRX_GTX_P5 PEG_NRX_GTX_N5 PEG_NRX_GTX_P6 PEG_NRX_GTX_N6 PEG_NRX_GTX_P7 PEG_NRX_GTX_N7 PEG_NRX_GTX_P8 PEG_NRX_GTX_N8 PEG_NRX_GTX_P9 PEG_NRX_GTX_N9 PEG_NRX_GTX_P10 PEG_NRX_GTX_N10 PEG_NRX_GTX_P11 PEG_NRX_GTX_N11 PEG_NRX_GTX_P12 PEG_NRX_GTX_N12 PEG_NRX_GTX_P13 PEG_NRX_GTX_N13 PEG_NRX_GTX_P14 PEG_NRX_GTX_N14 PEG_NRX_GTX_P15 PEG_NRX_GTX_N15

PLT_RST#7,17,26,29

1 2

R1299 10K_0402_5% ~D@R1299 10K_0402_5%~D@

XTALSSIN_R

10K_0402_5%~D

12

R1413

+3VS

External Thermal sensor

12

R1309

R1309 200_0402_5%

200_0402_5%

@

@C1545

@

12

D+

D- THER_ALERT#

VGA_THER

U71

1

VCC

2

DXP

3

DXN

ALERT#

4

OVERT#

MAX6649MUA+T_UMAX 8~D

@

5

4

VGA@

AP17

PEX_RX0

AN17

PEX_RX0_N

AN19

PEX_RX1

AP19

PEX_RX1_N

AR19

PEX_RX2

AR20

PEX_RX2_N

AP20

PEX_RX3

AN20

PEX_RX3_N

AN22

PEX_RX4

AP22

PEX_RX4_N

AR22

PEX_RX5

AR23

PEX_RX5_N

AP23

PEX_RX6

AN23

PEX_RX6_N

AN25

PEX_RX7

AP25

PEX_RX7_N

AR25

PEX_RX8

AR26

PEX_RX8_N

AP26

PEX_RX9

AN26

PEX_RX9_N

AN28

PEX_RX10

AP28

PEX_RX10_N

AR28

PEX_RX11

AR29

PEX_RX11_N

AP29

PEX_RX12

AN29

PEX_RX12_N

AN31

PEX_RX13

AP31

PEX_RX13_N

AR31

PEX_RX14

AR32

PEX_RX14_N

AR34

PEX_RX15

AP34

PEX_RX15_N

AL17

PEX_TX0

AM17

PEX_TX0_N

AM18

PEX_TX1

AM19

PEX_TX1_N

AL19

PEX_TX2

AK19

PEX_TX2_N

AL20

PEX_TX3

AM20

PEX_TX3_N

AM21

PEX_TX4

AM22

PEX_TX4_N

AL22

PEX_TX5

AK22

PEX_TX5_N

AL23

PEX_TX6

AM23

PEX_TX6_N

AM24

PEX_TX7

AM25

PEX_TX7_N

AL25

PEX_TX8

AK25

PEX_TX8_N

AL26

PEX_TX9

AM26

PEX_TX9_N

AM27

PEX_TX10

AM28

PEX_TX10_N

AL28

PEX_TX11

AK28

PEX_TX11_N

AK29

PEX_TX12

AL29

PEX_TX12_N

AM29

PEX_TX13

AM30

PEX_TX13_N

AM31

PEX_TX14

AM32

PEX_TX14_N

AN32

PEX_TX15

AP32

PEX_TX15_N

AR16

PEX_REFCLK

AR17

PEX_REFCLK_N

AR13

PEX_CLKREQ_N

AM16

PEX_RST_N

AG21

PEX_TERMP

AG19

PEX_RFU1

AG20

PEX_RFU2

D1

XTAL_OUTBUFF

D2

XTAL_SSIN

NB9P-GE2_BGA969~D

4

U59A

Part 1 of 6

PCI EXPRESS

CLK

GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8

GPIO9 GPIO10 GPIO11 GPIO12 GPIO13 GPIO14 GPIO15 GPIO16 GPIO17 GPIO18

DVO / GPIO

GPIO19 GPIO20 GPIO21

SWAP_RDY_A/GPIO22

STEREO/GPIO23

DACA_HSYNC DACA_VSYNC

DACA_RED

DACA_BLUE

DACA_GREEN

DACA_RSET DACA_VREF

DACB_RED

DACB_BLUE

DACB_GREEN

DACB_RSET

DACB_CSYNC

DACB_VREF

DACsI2C

DACC_HSYNC DACC_VSYNC

DACC_RED

DACC_BLUE

DACC_GREEN

DACC_RSET DACC_VREF

I2CA_SCL

I2CA_SDA

I2CB_SCL

I2CB_SDA

I2CC_SCL

I2CC_SDA

I2CD_SCL

I2CD_SDA

I2CE_SCL

I2CE_SDA

I2CH_SCL

I2CH_SDA

I2CS_SCL

I2CS_SDA

JTAG_TCK

JTAG_TDI JTAG_TDO JTAG_TMS

JTAG_TRST_N

TESTMODE

TEST

PEX_TSTCLK_OUT

PEX_TSTCLK_OUT_N

XTAL_IN

XTAL_OUT

SPDIF_OUT24

Codec Side

K1 K2 K3 H3 H2 H1 H4 H5 H6 J7 K4 K5 H7 J4 J6 L1 L2 L4 M4 L7 L5 K6 L6 M6

AM13 AL13 AM15 AL14 AM14 AK13 AK12

AA4 Y4 AB4 AB6 AB5 AC5

AM1 AM2 AK4 AJ4 AL4 AH7 AK6

G1 G4 G3 G2 E3 E4 F4 G5 D5 E5 F6 G6 E2 E1

AP14 AN14 AN16 AR14 AP16 AP35

AJ17 AJ18

B1

B2

GPU_VID0_V GPU_VID1_V

VGA_THER

GPIO10_REF_VGA

10K_0402_5%~D

VGA_HSYNC VGA_VSYNC VGA_CRT_R VGA_CRT_B VGA_CRT_G DACA_RSET DACA_VREF

VGA_DDCCLK VGA_DDCDATA

VGA_CLK_LCD VGA_DAT_LCD

I2CE_SCL I2CE_SDA

I2CS_SCL I2CS_SDA

PAD

PAD PAD

PAD

R1298

R1302 200_0402_1%~DVGA@R1302 200_0402_1%~DVGA@

XTALIN

NV_INVTPWM VGA_LVDDEN G7X_ENBKL

1 2

VGA@

1 2

R1306 0_0402_5%~DVGA@R1306 0_0402_5%~DVGA@

0.01U_0402_16V7K

GPU_VID0_V GPU_VID1_V

R1271

1 2

0_0402_5%~D

VGA@

0.1U_0402_10V7K~D

+3VS

R1276

VGA@

1 2

R1283 124_0402_1%~DVGA@R1283 124_0402_1%~DVGA@

R1290 0_0402_5%

EC_SMB_CK2

12

EC_SMB_DA2

12

R1292 0_0402_5% VGA@R1292 0_0402_5% VGA@

TP56

TP56 TP57

TP57 TP58

TP58 TP59

TP59 TP60

TP60

12

10K_0402_5%~D

1 2

C1721

@

3

R14040_0402_5%~D R14040_0402_5%~D

12 12

R14050_0402_5%~D R14050_0402_5%~D

TP55

PAD

VGA_LVDDEN 16

G7X_ENBKL 16

R1270

THER_ALERT#

R1272 10K_0402_5% VGA@R1272 10K_0402_5% VGA@

C1508

@C1508

@

VGA_HSYNC 16 VGA_VSYNC 16 VGA_CRT_R 16 VGA_CRT_B 16 VGA_CRT_G 16

VGA_DDCCLK 16 VGA_DDCDATA 16

VGA_CLK_LCD 16 VGA_DAT_LCD 16

VGA@

+3VS

4.99K_0402_1%~D

12

36K_0402_5%~D

12

10K_0402_5%

12

2

12

1

VGA@

10K_0402_5%~D

1 2

C1509

0.1U_0402_10V7K~D

EC_SMB_CK2 4,26 EC_SMB_DA2 4,26

CLK_NV_27M 15

2

3

@

R1375

1

SPDIF_OUT_GPU

@

R1376

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

GPU_VID0 45 GPU_VID1 45

For Internal Thermal Sensor

VGA@R1270

R1274

VGA@

+3VS

VGA_THER 26

+3VS

VRAM_REF 34,35

VGA_CLK_LCD

VGA_DAT_LCD

<---CRT

<---Second CRT

<---LVDS

<---HDMI

<---Display Port

<---HDCP ROM

<---Thermal

D61

@D61

@

DA204U_SOT323-3~D

VGA_LVDSAC+16

VGA_LVDSAC-16 VGA_LVDSA0+16

VGA_LVDSA0-16

VGA_LVDSA1+16

VGA_LVDSA1-16

VGA_LVDSA2+16

VGA_LVDSA2-16

VGA_LVDSBC+16

VGA_LVDSBC-16 VGA_LVDSB0+16

VGA_LVDSB0-16

VGA_LVDSB1+16

VGA_LVDSB1-16

VGA_LVDSB2+16

VGA_LVDSB2-16

R1293

VGA@ R1293

VGA@

1 2

2.2K_0402_5%

R1294

VGA@R1294

VGA@

1 2

2.2K_0402_5%

STRAP036

STRAP136

STRAP236

I2CE_SCL

R1301 2.2K_0402_5%~D

I2CE_SDA

I2CS_SCL

I2CS_SDA

VGA_CRT_R

VGA_CRT_G

VGA_CRT_B

1 2

R1303 2.2K_0402_5%~D

1 2

R1304 2.2K_0402_5%~D

1 2

R1305 2.2K_0402_5%~D

1 2

VGA_LVDSAC+ VGA_LVDSACVGA_LVDSA0+ VGA_LVDSA0VGA_LVDSA1+ VGA_LVDSA1VGA_LVDSA2+ VGA_LVDSA2-

VGA_LVDSBC+ VGA_LVDSBCVGA_LVDSB0+ VGA_LVDSB0VGA_LVDSB1+ VGA_LVDSB1VGA_LVDSB2+ VGA_LVDSB2-

R1275 1K_0402_5% ~D

10K_0402_5%~D

+3VS

@

VGA@

1 2

R1284 150_0402_1%~DVGA@R1284 150_0402_1%~DVGA@

1 2

R1285 150_0402_1%~DVGA@R1285 150_0402_1%~DVGA@

1 2

R1286 150_0402_1%~DVGA@R1286 150_0402_1%~DVGA@

2

@

12

R1411

VGA@ R1411

VGA@

12

R1412

VGA@ R1412

VGA@

R1288

10K_0402_5%~D

VGA@

STRAP0 STRAP1 STRAP2

+3VS

2

1

U59D

VGA@

U59D

VGA@

AM11

IFPA_TXC

AM12

IFPA_TXC_N

AM8

IFPA_TXD0

AL8

IFPA_TXD0_N

AM10

IFPA_TXD1

AM9

IFPA_TXD1_N

AK10

IFPA_TXD2

AL10

IFPA_TXD2_N

AK11

IFPA_TXD3

AL11

IFPA_TXD3_N

AP13

IFPB_TXC

AN13

IFPB_TXC_N

AN8

IFPB_TXD4

AP8

IFPB_TXD4_N

AP10

IFPB_TXD5

AN10

IFPB_TXD5_N

AR11

IFPB_TXD6

AR10

IFPB_TXD6_N

AN11

IFPB_TXD7

AP11

IFPB_TXD7_N

AJ11

12

IFPAB_RSET

D7

HDA_BCLK

A7

HDA_SYNC

C7

HDA_SDI

B7

HDA_SDO

D6

HDA_RST_N

N4

MIOA_CLKIN

R4

MIOA_CLKOUT

T4

MIOA_CLKOUT_N

P5

MIOA_CT L3

N2

MIOA_DE

N3

MIOA_HSYNC

L3

MIOA_VSYNC

N1

MIOA_D0

P4

MIOA_D1

P1

MIOA_D2

P2

MIOA_D3

P3

MIOA_D4

T3

MIOA_D5

T2

MIOA_D6

T1

MIOA_D7

U4

MIOA_D8

U1

MIOA_D9

U2

MIOA_D10

U3

MIOA_D11

R6

MIOA_D12

T6

MIOA_D13

N6

MIOA_D14

N5

MIOA_VR EF

AE1

MIOB_CLKIN

V4

MIOB_CLKOUT

W4

MIOB_CLKOUT_N

W3

MIOB_CT L3

Y5

MIOB_DE

W1

MIOB_HSYNC

W2

MIOB_VSYNC

Y1

MIOB_D0

Y2

MIOB_D1

Y3

MIOB_D2

AB3

MIOB_D3

AB2

MIOB_D4

AB1

MIOB_D5

AC4

MIOB_D6

AC1

MIOB_D7

AC2

MIOB_D8

AC3

MIOB_D9

AE3

MIOB_D10

AE2

MIOB_D11

U6

MIOB_D12

W6

MIOB_D13

Y6

MIOB_D14

W5

MIOB_D15/(STRAP0)

W7

MIOB_D16/(STRAP1)

V7

MIOB_D17/(STRAP2)

AF1

MIOB_VR EF

A2

NC_0

AB7

NC_1

AD6

NC_2

AF6

NC_3

AG6

NC_4

AJ5

NC_5

AK15

NC_6

AL7

NC_7

D35

NC_8

NB9P-GE2_BGA969~D

Part 4 of 6

LVDS

HDA

MXM/DVI/DP

MULTIUSE INPUT OUTPUT

NC

IFPC_DPL0_TXD2

IFPC_DPL0_TXD2_N

IFPC_DPL1_TXD1

IFPC_DPL1_TXD1_N

IFPC_DPL2_TXD0

IFPC_DPL2_TXD0_N

IFPC_DPL3_TXC

IFPC_DPL3_TXC_N

IFPD_DPL0_TXD2

IFPD_DPL0_TXD2_N

IFPD_DPL1_TXD1

IFPD_DPL1_TXD1_N

IFPD_DPL2_TXD0

IFPD_DPL2_TXD0_N

IFPD_DPL3_TXC

IFPD_DPL3_TXC_N

IFPE_DPL0_TXD2

IFPE_DPL0_TXD2_N

IFPE_DPL1_TXD1

IFPE_DPL1_TXD1_N

IFPE_DPL2_TXD0

IFPE_DPL2_TXD0_N

IFPE_DPL3_TXC

IFPE_DPL3_TXC_N

IFPF_DPL0_TXD2

IFPF_DPL0_TXD2_N

IFPF_DPL1_TXD1

IFPF_DPL1_TXD1_N

IFPF_DPL2_TXD0

IFPF_DPL2_TXD0_N

IFPF_DPL3_TXC

IFPF_DPL3_TXC_N

STRAP_REF_MIOB

GENERAL

STRAP_REF_3V3

RUF

IFPC_AUX

IFPC_AUX_N

IFPD_AUX

IFPD_AUX_N

IFPCD_RSET

IFPE_AUX

IFPE_AUX_N

IFPF_AUX

IFPF_AUX_N

IFPEF_RSET

ROM_SCLK

ROM_SI

ROM_SO

ROM_CS_N

SPDIF

BUFRST_N

PGOOD_OUT

THERMDN THERMDP

RFU_0 RFU_1 RFU_2 RFU_3 RFU_4 RFU_5 RFU_6 RFU_7 RFU_8

RFU_9 RFU_10 RFU_11 RFU_12 RFU_13 RFU_14 RFU_15 RFU_16 RFU_17

NC_9 NC_10 NC_11 NC_12 NC_13 NC_14 NC_15 NC_16 NC_17 NC_18

AP2 AN3 AM7 AM6 AL5 AM5 AM3 AM4 AP1 AR2

AP4 AN4 AR8 AR7 AP7 AN7 AN5 AP5 AR5 AR4

AK7

AE4 AD4 AH6 AH5 AH4 AG4 AF4 AF5 AE6 AE5

AF3 AF2

AL2 AL3 AJ3 AJ2 AJ1 AH1 AH2 AH3

AL1

D4 D3 C4 C3

A5

A4

C5

M9 N9

B4 B5

AD29 AE29 AG29 AH29 G11 G12 G14 G15 G24 G25 G27 G28 J25 J26 L29 M29 P29 R29

E35 E7 F7 H32 M7 P6 P7 R7 U7 V6

VGA@

1 2

R12771K _0402_1%~D

VGA@

1 2

R1287

ROM_SCLK_GPU ROM_SI_GPU ROM_SO_GPU

SPDIF_OUT_GPU

R1289 40.2K_0402_1%~DVGA@R1289 40.2K _0402_1%~DVGA@

1 2

R1291

1 2

1K_0402_1%~D

40.2K_0402_1%~DVGA@

D-

1

C1542

@C1542

@

2200P_0402_50V7K

2

D+

ROM_SCLK_GPU 36 ROM_SI_GPU 36 ROM_SO_GPU 36

Close to Sensor

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Title

Size Docum ent Number Rev

Date: Sheet

Compal Electronics, Inc.

NVG98 PCIE,GPIO,CLK,LVDS

LA-4671P

1

1.0

30 53Friday , February 20, 2009

1.0

of

http://laptop-motherboard-schematic.blogspot.com/

5

4

3

2

1

0..31 32..63

FBAD[0..63]

DQMA#[0..7]

DQSA_WP [0..7]

D D

DQSA_RN[0..7]

FBA_CMD[0..27]

FBAD[0..63] 34

DQMA#[0..7] 34 FBCD[0..63] 35

DQSA_WP [0..7] 34

DQSA_RN[0..7] 34

FBA_CMD[0..27] 34

FBA_CMD0

FBA_CMD1

FBA_CMD2

FBA_CMD3

FBA_CMD4

FBA_CMD5

U59B

VGA@

U59B

R30

FBA_D0

R32

FBA_D1

P31

FBA_D2

N30

FBA_D3

L31

FBA_D4

M32

FBA_D5

M30

FBA_D6

L30

FBA_D7

P33

FBA_D8

P34

FBA_D9

N35

FBA_D10

P35

FBA_D11

N34

FBA_D12

L33

FBA_D13

L32

FBA_D14

N33

FBA_D15

K31

FBA_D16

K30

FBA_D17

G30

FBA_D18

K32

FBA_D19

G32

FBA_D20

H30

FBA_D21

F30

FBA_D22

G31

FBA_D23

H33

FBA_D24

K35

FBA_D25

K33

FBA_D26

G34

FBA_D27

K34

FBA_D28

E33

FBA_D29

E34

FBA_D30

G33

FBA_D31 FBA_D32 FBA_D33 FBA_D34 FBA_D35 FBA_D36 FBA_D37 FBA_D38 FBA_D39 FBA_D40 FBA_D41 FBA_D42 FBA_D43 FBA_D44 FBA_D45 FBA_D46 FBA_D47 FBA_D48 FBA_D49 FBA_D50 FBA_D51 FBA_D52 FBA_D53 FBA_D54 FBA_D55 FBA_D56 FBA_D57 FBA_D58 FBA_D59 FBA_D60 FBA_D61 FBA_D62 FBA_D63

NB9P-GE2_BGA969~D

VGA@

Part 2 of 6

MEMORY

INTERFACE 1

MEMORY

INTERFACE 1

FBA_DQS_RN0 FBA_DQS_RN1 FBA_DQS_RN2 FBA_DQS_RN3 FBA_DQS_RN4 FBA_DQS_RN5 FBA_DQS_RN6 FBA_DQS_RN7

FBA_DQS_WP0 FBA_DQS_WP1 FBA_DQS_WP2 FBA_DQS_WP3 FBA_DQS_WP4 FBA_DQS_WP5 FBA_DQS_WP6 FBA_DQS_WP7

FBA_CMD0 FBA_CMD1 FBA_CMD2 FBA_CMD3 FBA_CMD4 FBA_CMD5 FBA_CMD6 FBA_CMD7 FBA_CMD8

FBA_CMD9 FBA_CMD10 FBA_CMD11 FBA_CMD12 FBA_CMD13 FBA_CMD14 FBA_CMD15 FBA_CMD16 FBA_CMD17 FBA_CMD18 FBA_CMD19 FBA_CMD20 FBA_CMD21 FBA_CMD22 FBA_CMD23 FBA_CMD24 FBA_CMD25 FBA_CMD26 FBA_CMD27 FBA_CMD28 FBA_CMD29 FBA_CMD30

FBA_DQM0

FBA_DQM1

FBA_DQM2

FBA_DQM3

FBA_DQM4

FBA_DQM5

FBA_DQM6

FBA_DQM7

FB_VREF

FBA_CLK0

FBA_CLK0_N

FBA_CLK1

FBA_CLK1_N

FBA_DEBUG

FBAD0 FBAD1 FBAD2 FBAD3 FBAD4 FBAD5 FBAD6 FBAD7 FBAD8 FBAD9 FBAD10 FBAD11 FBAD12 FBAD13 FBAD14 FBAD15 FBAD16 FBAD17 FBAD18 FBAD19

C C

B B

FBAD20 FBAD21 FBAD22 FBAD23 FBAD24 FBAD25 FBAD26 FBAD27 FBAD28 FBAD29 FBAD30 FBAD31 FBAD32 FBAD33 FBAD34 FBAD35 FBAD36 FBAD37 FBAD38 FBAD39 FBAD40 FBAD41 FBAD42 FBAD43 FBAD44 FBAD45 FBAD46 FBAD47 FBAD48 FBAD49 FBAD50 FBAD51 FBAD52 FBAD53 FBAD54 FBAD55 FBAD56 FBAD57 FBAD58 FBAD59 FBAD60 FBAD61 FBAD62 FBAD63

AG30 AH31 AG32 AF31 AF30 AD30 AC32 AE30 AE32 AF33 AF34 AE35 AE33 AE34 AC35 AB32 AN33 AK32

AL33

AM33

AL31

AK30

AJ30

AH30

AM35

AH33 AH35 AH32 AH34

AM34

AL35 AJ33

V32 W31 U31 Y32 AB35 AB34 W35 W33 W30 T34 T35 AB31 Y30 Y34 W32 AA30 AA32 Y33 U32 Y31 U34 Y35 W34 V30 U35 U30 U33 AB30 AB33 T33 W29

P30 P32 J30 H34 AF32 AF35 AL32 AL34

N32 L35 H31 G35 AD32 AC34 AJ31 AJ35

N31 L34 J32 H35 AE31 AC33 AJ32 AJ34

J27

T32 T31 AC31 AC30 T30

FBA_CMD0

FBA_CMD4 FBA_CMD5 FBA_CMD6 FBA_CMD7 FBA_CMD8 FBA_CMD9 FBA_CMD10 FBA_CMD11 FBA_CMD12 FBA_CMD13 FBA_CMD14 FBA_CMD15 FBA_CMD16 FBA_CMD17 FBA_CMD18 FBA_CMD19 FBA_CMD20 FBA_CMD21 FBA_CMD22 FBA_CMD23 FBA_CMD24 FBA_CMD25 FBA_CMD26 FBA_CMD27 SNN_FBA_CMD28 FBA_CMD29 FBA_CMD30

DQMA#0 DQMA#1 DQMA#2 DQMA#3 DQMA#4 DQMA#5 DQMA#6 DQMA#7

DQSA_RN0 DQSA_RN1 DQSA_RN2 DQSA_RN3 DQSA_RN4 DQSA_RN5 DQSA_RN6 DQSA_RN7

DQSA_WP0 DQSA_WP1 DQSA_WP2 DQSA_WP3 DQSA_WP4 DQSA_WP5 DQSA_WP6 DQSA_WP7

FBA_VREF

R1313

1 2

10K_0402_5%~D

T147T147

T88T88

T115T115 T149T149 T151T151

15mil , TLC less than 500mil

CLKA0 34 CLKA0# 34 CLKA1 34 CLKA1# 34

+FBVDDQ

0.01U_0402_16V7K

1

@

C1546

2

+FBVDDQ

12

1K_0402_1%~D

@

R1310

1K_0402_1%~D

@

R1311

FBA_CMD6

FBA_CMD7

FBA_CMD8

FBA_CMD9

FBA_CMD10

FBA_CMD11

FBA_CMD12

FBA_CMD13

FBA_CMD14

FBA_CMD15

FBA_CMD16

FBA_CMD17

FBA_CMD18

FBA_CMD19

FBA_CMD20

FBA_CMD21

FBA_CMD22

FBA_CMD23

FBA_CMD24

FBA_CMD25

FBA_CMD26

FBA_CMD27

FBA_CMD28

FBA_CMD29

FBA_CMD30

FBA_RST#

FBA_CMD15

1 2

R1315 10K_0402_5%~D

FBA_CMD18

R1315 10K_0402_5%~D

VGA@

1 2

R1317 10K_0402_5%~D

VGA@

FBA_CKE

A A

Pull-down for initialization

A4

RAS#

A5

BA1 BA1

CS1#

CS0#

A11

CAS#

WE#

BA0

A12

RST/ODT

A7

A10

CKE

A0

A9

A6

A2

A8

A3

A1

A13

BA2

RFU0

RFU1 RFU1

RFU2 RFU2

RAS#

A2

A4

A3

CS1#

CS0#

A11

CAS#

WE#

BA0

A5

A12

RST/ODT

A7

A10

CKE

A0

A9

A6

A8

A1

A13

BA2

RFU0

FBCD0 FBCD1FBA_CMD1 FBCD2FBA_CMD2 FBCD3FBA_CMD3 FBCD4 FBCD5 FBCD6 FBCD7 FBCD8 FBCD9 FBCD10 FBCD11 FBCD12 FBCD13 FBCD14 FBCD15 FBCD16 FBCD17 FBCD18 FBCD19 FBCD20 FBCD21 FBCD22 FBCD23 FBCD24 FBCD25 FBCD26 FBCD27 FBCD28 FBCD29 FBCD30 FBCD31 FBCD32 FBCD33 FBCD34 FBCD35 FBCD36 FBCD37 FBCD38 FBCD39 FBCD40 FBCD41 FBCD42 FBCD43 FBCD44 FBCD45 FBCD46 FBCD47 FBCD48 FBCD49 FBCD50 FBCD51 FBCD52 FBCD53 FBCD54 FBCD55 FBCD56 FBCD57 FBCD58 FBCD59 FBCD60 FBCD61 FBCD62 FBCD63

FBCD[0..63]

DQMC#[0..7]

DQSC_WP[0..7]

DQSC_RN[0..7]

FBC_CMD[0..27]

U59C

D11

FBC_D0

E11

FBC_D1

F10

FBC_D2

D8

FBC_D3

F8

FBC_D4

F9

FBC_D5

E8

FBC_D6

F12

FBC_D7

B11

FBC_D8

C13

FBC_D9

A11

FBC_D10

B8

FBC_D11

A8

FBC_D12

C8

FBC_D13

C11

FBC_D14

C10

FBC_D15

D12

FBC_D16

E13

FBC_D17

F17

FBC_D18

F15

FBC_D19

F16

FBC_D20

E16

FBC_D21

F14

FBC_D22

F13

FBC_D23

D13

FBC_D24

A13

FBC_D25

B13

FBC_D26

A14

FBC_D27

C16

FBC_D28

A17

FBC_D29

B16

FBC_D30

D16

FBC_D31

D24

FBC_D32

D26

FBC_D33

E25

FBC_D34

F25

FBC_D35

F27

FBC_D36

E28

FBC_D37

F28

FBC_D38

D29

FBC_D39

A25

FBC_D40

B25

FBC_D41

D25

FBC_D42

C26

FBC_D43

C28

FBC_D44

B28

FBC_D45

A28

FBC_D46

A29

FBC_D47

E29

FBC_D48

F29

FBC_D49

D30

FBC_D50

E31

FBC_D51

C33

FBC_D52

D33

FBC_D53

F32

FBC_D54

E32

FBC_D55

B29

FBC_D56

C29

FBC_D57

B31

FBC_D58

C31

FBC_D59

B32

FBC_D60

C32

FBC_D61

B34

FBC_D62

B35

FBC_D63

NB9P-GE2_BGA969~D

FBA_RST#

DQMC#[0..7] 35

DQSC_WP[0..7] 35

DQSC_RN[0..7] 35

FBC_CMD[0..27] 35

VGA@

Part 3 of 6

MEMORY

INTERFACE 2

MEMORY

INTERFACE 2

FBC_DQS_WP0 FBC_DQS_WP1 FBC_DQS_WP2 FBC_DQS_WP3 FBC_DQS_WP4 FBC_DQS_WP5 FBC_DQS_WP6 FBC_DQS_WP7

FBC_CMD15

1 2

R1314

VGA@R1314

VGA@

10K_0402_5%~D

FBA_CKE

FBC_CMD18

1 2

R1316

VGA@R1316

VGA@

10K_0402_5%~D

Pull-down for initialization

FBC_CMD0 FBC_CMD1 FBC_CMD2 FBC_CMD3 FBC_CMD4 FBC_CMD5 FBC_CMD6 FBC_CMD7 FBC_CMD8

FBC_CMD9 FBC_CMD10 FBC_CMD11 FBC_CMD12 FBC_CMD13 FBC_CMD14 FBC_CMD15 FBC_CMD16 FBC_CMD17 FBC_CMD18 FBC_CMD19 FBC_CMD20 FBC_CMD21 FBC_CMD22 FBC_CMD23 FBC_CMD24 FBC_CMD25 FBC_CMD26 FBC_CMD27 FBC_CMD28 FBC_CMD29 FBC_CMD30

FBC_DQM0

FBC_DQM1

FBC_DQM2

FBC_DQM3

FBC_DQM4

FBC_DQM5

FBC_DQM6

FBC_DQM7

FBC_DQS_RN0 FBC_DQS_RN1 FBC_DQS_RN2 FBC_DQS_RN3 FBC_DQS_RN4 FBC_DQS_RN5 FBC_DQS_RN6 FBC_DQS_RN7

FBC_CLK0

FBC_CLK0_N

FBC_CLK1

FBC_CLK1_N

FBC_DEBUG

C17 B19 D18 F21 A23 D21 B23 E20 G21 F20 F19 F23 A22 C22 B17 F24 C25 E22 C20 B22 A19 D22 D20 E19 D19 F18 C19 F22 C23 B20 A20

F11 D10 D15 A16 D27 D28 D34 A34

D9 B10 E14 B14 F26 A26 D31 A31

E10 A10 D14 C14 E26 B26 D32 A32

E17 D17 D23 E23 G19

FBC_CMD0 FBC_CMD1 FBC_CMD2 FBC_CMD3 FBC_CMD4 FBC_CMD5 FBC_CMD6 FBC_CMD7 FBC_CMD8 FBC_CMD9 FBC_CMD10 FBC_CMD11 FBC_CMD12 FBC_CMD13 FBC_CMD14 FBC_CMD15 FBC_CMD16 FBC_CMD17 FBC_CMD18 FBC_CMD19 FBC_CMD20 FBC_CMD21 FBC_CMD22 FBC_CMD23 FBC_CMD24 FBC_CMD25 FBC_CMD26 FBC_CMD27 SNN_FBC_CMD28 FBC_CMD29 FBC_CMD30

DQMC#0 DQMC#1 DQMC#2 DQMC#3 DQMC#4 DQMC#5 DQMC#6 DQMC#7

DQSC_RN0 DQSC_RN1 DQSC_RN2 DQSC_RN3 DQSC_RN4 DQSC_RN5 DQSC_RN6 DQSC_RN7

DQSC_WP0 DQSC_WP1 DQSC_WP2 DQSC_WP3 DQSC_WP4 DQSC_WP5 DQSC_WP6 DQSC_WP7

CLKC0 CLKC0# CLKC1 CLKC1#

R1312

1 2

10K_0402_5%~DVGA@

CLKC0 35 CLKC0# 35 CLKC1 35 CLKC1# 35

+FBVDDQ

T148T148

T158T158

T156T156 T150T150 T152T152

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

http://laptop-motherboard-schematic.blogspot.com/

4

3

2

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

NVG98 Memory Interface

LA-4671P

1.0

31 53Friday, February 20, 2009

1

1.0

of

5

+GPU_CORE

0.1U_0402_10V7K~D

C1553

C1563

4.7U_0603_6.3V6M~D

0.1U_0402_10V7K~D

C1601

VGA@

1

2

1

2

1

2

C1583

VGA@

4.7U_0603_6.3V6M~D

0.1U_0402_10V7K~D

1

C1554

2

VGA@

0.47U_0402_10V4Z~D

1

C1564

2

VGA@

0.1U_0402_10V7K~D

1

C1584

2

+DACA_VDD

4700P_0402_25V7K~D

1

C1602

2

VGA@

BLM18PG600SN1_0603~D

C1626

C1555

VGA@

C1565

VGA@

470P_0402_50V7K~D

1 2

0.1U_0402_10V7K~D

1

C1552

2

VGA@

D D

0.47U_0402_10V4Z~D

1

C1562

2

VGA@

+3VS

1U_0805_10V7K~D

1

2

C1582

2

1

VGA@

DACA VDD= 53mA

L115

VGA@

1 2

VGA@

470P_0402_50V7K~D

1

C1624

2

Close J9~J13

1

2

20mil

@

C C

+3VS

BLM15AG121SN1D_2P~D

+IFPE_IOVDD

B B

@

IFPCD_PLLVDD = 160 mA

+IFPCD_PLLVDD

+GPU_PLLVDD

A A

470P_0402_50V7K~D

1

C1636

@

2

GPU_PLLVDD = 140 mA

0.1U_0402_10V7K~D

4.7U_0603_6.3V6M~D

1

C1643

C1642

2

VGA@

1 2

4.7U_0603_6.3V6M~D

1

C1638

2

@

0.1U_0402_10V7K~D

1U_0402_6.3V6K~D

1

C1644

C1645

2

VGA@

5

0.1U_0402_10V7K~D

1

C1557

C1556

2

VGA@

0.47U_0402_10V4Z~D

1

C1567

C1566

2

VGA@

0.1U_0402_10V7K~D

1

C1604

C1603

2

VGA@

+1.1V_GFX_PCIE

L117

@L117

@

+FBVDDQ

L119

BLM15AG121SN1D_2P~D

@

+1.1V_GFX_PCIE

L121

1 2

BLM15AG121SN1D_2P~D

0.1U_0402_10V7K~D

VGA@

1

C1646

2

VGA@

Place near Balls

0.1U_0402_10V7K~D

C1558

C1568

0.1U_0402_10V7K~D

1

C1559

C1560

2

VGA@

0.47U_0402_10V4Z~D

1

C1569

C1570

2

VGA@

0.1U_0402_10V7K~D

1

2

VGA@

0.47U_0402_10V4Z~D

1

2

VGA@

Place near BGA

4.7U_0603_6.3V4Z~D

1

C1585

2

VGA@

Delete TV Fucntion 2007/11/20

NVVDD_SENSE45

0.1U_0402_10V7K~D

1

C1561

2

0.47U_0402_10V4Z~D

1

C1571

2

VGA@

4.7U_0603_6.3V4Z~D

1

C1586

2

VGA@

4

U59E

VGA@

U59E

VGA@

L11

VDD_0

L12

VDD_1

L13

VDD_2

L14

VDD_3

L15

VDD_4

L16

VDD_5

L17

VDD_6

L18

VDD_7

L19

VDD_8

L20

VDD_9

L21

VDD_10

L22

VDD_11

L23

VDD_12

L24

VDD_13

L25

VDD_14

M12

VDD_15

M14

VDD_16

M16

VDD_17

M18

VDD_18

M20

VDD_19

M22

VDD_20

M24

VDD_21

P11

VDD_22

P13

VDD_23

P15

VDD_24

P17

VDD_25

P19

VDD_26

P21

VDD_27

P23

VDD_28

P25

VDD_29

R11

VDD_30

R12

VDD_31

R13

VDD_32

R14

VDD_33

4.7U_0603_6.3V4Z~D

1

C1587

2

R15

VDD_34

R16

VDD_35

R17

VDD_36

R18

VDD_37

R19

VDD_38

R20

VDD_39

R21

VDD_40

R22

VDD_41

R23

VDD_42

R24

VDD_43

R25

VDD_44

T12

VDD_45

T14

VDD_46

T16

VDD_47

T18

VDD_48

T20

VDD_49

T22

VDD_50

T24

VDD_51

V11

VDD_52

V13

VDD_53

V15

VDD_54

V17

VDD_55

V19

VDD_56

V21

VDD_57

V23

VDD_58

V25

VDD_59

W11

VDD_60

W12

VDD_61

W13

VDD_62

W14

VDD_63

W15

VDD_64

W16

VDD_65

W17

VDD_66

W18

VDD_67

W19

VDD_68

W20

VDD_69

W21

VDD_70

W22

VDD_71

W23

VDD_72

W24

VDD_73

W25

VDD_74

Y12

VDD_75

Y14

VDD_76

Y16

VDD_77

Y18

VDD_78

Y20

VDD_79

Y22

VDD_80

Y24

VDD_81

AB11

VDD_82

AB13

VDD_83

AB15

VDD_84

AB17

VDD_85

AB19

VDD_86

AB21

VDD_87

AB23

VDD_88

AB25

VDD_89

AC11

VDD_90

AC12

VDD_91

AC13

VDD_92

AC14

VDD_93

AC15

VDD_94

AC16

VDD_95

AC17

VDD_96

AC18

VDD_97

AC19

VDD_98

AC20

VDD_99

AC21

VDD_100

AC22

VDD_101

AC23

VDD_102

AC24

VDD_103

AC25

VDD_104

AD12

VDD_105

AD14

VDD_106

AD16

VDD_107

AD18

VDD_108

AD22

VDD_109

AD24

VDD_110

AD20

VDD_SENSE

NB9P-GE2_BGA969~D

Part 5 of 6

FBAC_DLLAVDD FBAC_PLLAVDD

FB_CAL_PD_VDDQ

MIOA_VDDQ_0 MIOA_VDDQ_1 MIOA_VDDQ_2 MIOA_VDDQ_3

MIOA_CAL_PD_VDDQ

MIOB_VDDQ_0 MIOB_VDDQ_1 MIOB_VDDQ_2 MIOB_VDDQ_3

MIOB_CAL_PD_VDDQ

PEX_IOVDD_0 PEX_IOVDD_1 PEX_IOVDD_2 PEX_IOVDD_3 PEX_IOVDD_4

PEX_IOVDDQ_0 PEX_IOVDDQ_1 PEX_IOVDDQ_2 PEX_IOVDDQ_3 PEX_IOVDDQ_4 PEX_IOVDDQ_5 PEX_IOVDDQ_6 PEX_IOVDDQ_7 PEX_IOVDDQ_8

PEX_IOVDDQ_9 PEX_IOVDDQ_10 PEX_IOVDDQ_11 PEX_IOVDDQ_12 PEX_IOVDDQ_13 PEX_IOVDDQ_14 PEX_IOVDDQ_15 PEX_IOVDDQ_16 PEX_IOVDDQ_17 PEX_IOVDDQ_18 PEX_IOVDDQ_19

POWER

PEX_IOVDDQ_20 PEX_IOVDDQ_21 PEX_IOVDDQ_22 PEX_IOVDDQ_23 PEX_IOVDDQ_24

IFPAB_PLLVDD IFPCD_PLLVDD IFPEF_PLLVDD

FB_DLLAVDD

PEX_PLLVDD

VDD33_0 VDD33_1 VDD33_2 VDD33_3 VDD33_4

DACA_VDD DACB_VDD

DACC_VDD

FB_PLLAVDD

FBVDDQ_0 FBVDDQ_1 FBVDDQ_2 FBVDDQ_3 FBVDDQ_4 FBVDDQ_5 FBVDDQ_6 FBVDDQ_7 FBVDDQ_8

FBVDDQ_9 FBVDDQ_10 FBVDDQ_11 FBVDDQ_12 FBVDDQ_13 FBVDDQ_14 FBVDDQ_15 FBVDDQ_16 FBVDDQ_17 FBVDDQ_18 FBVDDQ_19 FBVDDQ_20 FBVDDQ_21 FBVDDQ_22 FBVDDQ_23 FBVDDQ_24 FBVDDQ_25 FBVDDQ_26 FBVDDQ_27 FBVDDQ_28 FBVDDQ_29 FBVDDQ_30 FBVDDQ_31 FBVDDQ_32 FBVDDQ_33 FBVDDQ_34 FBVDDQ_35 FBVDDQ_36 FBVDDQ_37

IFPA_IOVDD IFPB_IOVDD IFPC_IOVDD IFPD_IOVDD IFPE_IOVDD

IFPF_IOVDD

PLLVDD

VID_PLLVDD

SP_PLLVDD

J9 J10 J11 J12 J13

AJ12 AC6 AG7

AG27 AF27 J19 J18

K27

P9 R9 T9 U9 U5 AA9 AB9 W9 Y9 AA7

AK16 AK17 AK21 AK24 AK27

AG11 AG12 AG13 AG15 AG16 AG17 AG18 AG22 AG23 AG24 AG25 AG26 AJ14 AJ15 AJ19 AJ21 AJ22 AJ24 AJ25 AJ27 AK18 AK20 AK23 AK26 AL16

AG14

B18 E21 G8 G9 G17 G18 G22 H29 J14 J15 J16 J17 J20 J21 J22 J23 J24 J29 N27 P27 R27 T27 U27 U29 V27 V29 V34 W27 Y27 AA27 AA29 AA31 AB27 AB29 AC27 AD27 AE27 AJ28

AG9 AG10 AJ8 AK8 AE7 AD7 AK9 AJ9 AJ6

AE9 AD9 AF9

3

change R1320 to 44.2k for 55nm

+3VS

+DACA_VDD +DACB_VDD

+DACC_VDD

1 2

VGA@R1319

VGA@

10K_0402_5%~D

+FB_DLLAVDD

FB_CAL_PD_VDDQ

R1321

1 2

10K_0402_5%~D

VGA@

+3.3V_MIO

PEX_IOVDD = 500mA

VGA@

Place near Balls

PEX_IOVDDQ = 1600mA

0.1U_0402_10V7K~D

1

C1593

2

VGA@

Place near Balls

+PEX_PLLVDD

4700P_0402_25V7K~D

1

C1608

2

@

1U_0402_6.3V6K~D

1

2

VGA@

10K_0402_5%~D

VGA@

1 2

0.1U_0402_10V7K~D

1

2

0.1U_0402_10V7K~D

1

C1594

2

VGA@

4700P_0402_25V7K~D

1

2

C1630

@

R1318

R1319

R1320

VGA@R1320

VGA@

49.9_0402_1%~D

1 2

0.1U_0402_10V7K~D

1

VGA@

2

1U_0402_6.3V6K~D

1

C1577

C1578

2

VGA@

0.47U_0402_10V4Z~D

1

C1595

2

VGA@

0.1U_0402_10V7K~D

1

C1609

C1610

2

VGA@

0.022U_0402_16V7K~D

1

C1631

2

VGA@

R706

45.3 ohm (8X GPU) TBD (9X GPU)

10 mil

+FBVDDQ

R1322

1 2

0_0402_5%~D

VGA@

C1572

1

2

VGA@

+3VS

MIOA_VDD pull-down 10K. No use! 200711/26

+1.1V_GFX_PCIE

0.47U_0402_10V4Z~D

1

C1579

C1580

2

VGA@

Place near GPU

1U_0402_6.3V6K~D

0.47U_0402_10V4Z~D

1

C1597

C1596

2

VGA@

Place near GPU

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D 1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

C1611

VGA@

1

2

0.1U_0402_10V7K~D

1

2

C1633

VGA@

C1612

VGA@

1

2

0.1U_0402_10V7K~D

1

2

C1634

VGA@

0.1U_0402_10V7K~D

1

2

C1632

VGA@

MIOA/B = 20mA

22U_0805_6.3V6M~D

1

C1581

2

+1.1V_GFX_PCIE

4.7U_0603_6.3V4Z~D

1

C1599

C1598

2

VGA@

+FBVDDQ

4.7U_0603_6.3V4Z~D

1U_0402_6.3V6K~D

1

C1613

C1614

2

VGA@

0.1U_0402_10V7K~D

1

C1635

2

22U_0805_6.3V6M~D

1

C1600

2

1U_0402_6.3V6K~D

1

2

Remove R1415 for 55nm

+IFPAB_IOVDD

+IFPC_IOVDD

+IFPE_IOVDD

+IFPAB_PLLVDD +IFPCD_PLLVDD

+IFPEF_PLLVDD

+GPU_PLLVDD

12

R1414 10K _0402_5%~DVGA@ R1414 10K_0402_5%~DVGA@

12

R1415 10K _0402_5%~DVGA@ R1415 10K_0402_5%~DVGA@

12

R1416 10K_0402_5%~DVGA@ R1416 10K_0402_5%~DVGA@

12

R1417 10K_0402_5%~DVGA@ R1417 10K_0402_5%~DVGA@

Change R1416 R1417 to 1K for 55nm

2

L112

C1574

4.7U_0603_6.3V4Z~D

1

2

VGA@

L112

1 2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D BLM15AG121SN1D_2P~D

BLM15AG121SN1D_2P~D

1

@

C1550

C1551

2

1U_0603_10V6K~D

1

C1575

2

VGA@

+FB_DLLAVDD

0.1U_0402_10V7K~D

0.01U_0402_16V7K

VGA@ C1547

VGA@

1

C1548

C1547

2

VGA@

PEX_PLLVDD = 100mA

+PEX_PLLVDD

VGA@

1

2

10 mil

0.1U_0402_10V7K~D

C1573

VGA@

1U_0402_6.3V6K~D

1

C1549

2

VGA@

0.01U_0402_16V7K

1

2

Place near Balls Place near GPU

1.8V for G84 & G9X

IFPAB_IOVDD = 100mA

+IFPAB_IOVDD

4700P_0402_25V7K~D

1

C1588

2

VGA@

IFPAB_PLLVDD = 160 mA

+IFPAB_PLLVDD

1

2

VGA@

C1615

470P_0402_50V7K~D

1

2

C1605

@

C1627

470P_0402_50V7K~D

C1589

VGA@

2

1

2

1

2

20mil

+IFPC_IOVDD

470P_0402_50V7K~D

4700P_0402_25V7K~D

4.7U_0603_6.3V6M~D

1

C1590

2

VGA@

4700P_0402_25V7K~D

1

C1606

2

VGA@

+IFPEF_PLLVDD

BLM18AG121SN1D_0603~D

470P_0402_50V7K~D

1

C1592

C1591

2

VGA@

4.7U_0603_6.3V6M~D

C1607

BLM18PG600SN1_0603~D

2

1

C1629

@

4.7U_0603_6.3V6M~D

@

1 2

DELL CONFIDENTIAL/PROPRIETARY

Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

http://laptop-motherboard-schematic.blogspot.com/

4

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

2

Title

Size Doc ument Number Rev

Date: Sheet

+1.1V_GFX_PCIE

VGA@

+1.1V_GFX_PCIE

4.7U_0603_6.3V4Z~D

1

2

L116

BLM15AG121SN1D_2P~D

VGA@

470P_0402_50V7K~D

1

2

12

L113

VGA@L113

VGA@

10UH_CB2012T100MR_20%_0805~D

C1576

+FBVDDQ

L114

1 2

VGA@

+FBVDDQ

12

@

L118

1 2

4.7U_0603_6.3V6M~D

1

C1639

2

@

IFPEF_PLLVDD = 160 mA

Compal Electronics, Inc.

LA-4671P

1

+1.1V_GFX_PCIE

+FBVDDQ

L120

@

BLM15AG121SN1D_2P~D

C1641

NVG98 POWER

1

1.0

32 53Friday, February 20, 2009

1.0

of

5

D D

D_C

-1.75% (DOWN)

±0.875% (CENTER)

D_C Internal pull up

XTALOUTBUFF30

XTALSSIN30

@

C C

B B

A A

10K_0402_5%~D

12

R711

R710

@R711

@

0

1

U45

@U45

@

1

XIN/CLKIN

2 3

0_0402_5%~D

12

R712

VGA@

R712

VGA@

XOUT

VSS

VDD

D_C

PD#

ModOUT4REFCLK

P1819GF-08SR_SO8~D

4

BLM18AG121SN1D_0603~D

+3VS

12

R709

R708

VGA@

VGA@ 8 7 6 5

10K_0402_5%~D

+3VL

1

C870

10U_0805_10V4Z~D

VGA@

2

BLM18AG121SN1D_0603~D

1

C871

2

0.1U_0402_10V7K~D

L50

1 2

VGA@

3

U59F

VGA@

U59F

VGA@

B3

GND_0

B6

GND_1

B9

GND_2

B12

GND_3

B15

GND_4

B21

GND_5

B24

GND_6

B27

GND_7

B30

GND_8

B33

GND_9

C2

GND_10

C34

GND_11

E6

GND_12

E9

GND_13

E12

GND_14

+3VS

E15

GND_15

E18

GND_16

E24

GND_17

E27

GND_18

E30

GND_19

F2

GND_20

F5

GND_21

F31

GND_22

F34

GND_23

J2

GND_24

J5

GND_25

J31

GND_26

J34

GND_27

L9

GND_28

M2

GND_29

M5

GND_30

M11

GND_31

M13

GND_32

M15

GND_33

M17

GND_34

M19

GND_35

M21

GND_36

M23

GND_37

M25

GND_38

M31

GND_39

M34

GND_40

N11

GND_41

N12

GND_42

N13

GND_43

N14

GND_44

N15

GND_45

N16

GND_46

N17

GND_47

N18

GND_48

N19

GND_49

N20

GND_50

N21

GND_51

N22

GND_52

N23

GND_53

N24

GND_54

N25

GND_55

P12

GND_56

P14

GND_57

P16

GND_58

P18

GND_59

P20

GND_60

P22

GND_61

P24

GND_62

R2

GND_63

R5

GND_64

R31

GND_65

R34

GND_66

T11

GND_67

T13

GND_68

T15

GND_69

T17

GND_70

T19

GND_71

T21

GND_72

T23

GND_73

T25

GND_74

U11

GND_75

U12

GND_76

U13

GND_77

U14

GND_78

U15

GND_79

U16

GND_80

U17

GND_81

U18

GND_82

U19

GND_83

U20

GND_84

U21

GND_85

U22

GND_86

U23

GND_87

U24

GND_88

U25

GND_89

V2

GND_90

V5

GND_91

V9

GND_92

V12

GND_93

V14

GND_94

V16

GND_95

V18

GND_96

V20

GND_97

V22

GND_98

V24

GND_99

NB9P-GE2_BGA969~D

2

Part 6 of 6

GND

FB_CAL_PU_GND

FB_CAL_TERM_GND

MIOA_CAL_PU_GND MIOB_CAL_PU_GND

GND_100 GND_101 GND_102 GND_103 GND_104 GND_105 GND_106 GND_107 GND_108 GND_109 GND_110 GND_111 GND_112 GND_113 GND_114 GND_115 GND_116 GND_117 GND_118 GND_119 GND_120 GND_121 GND_122 GND_123 GND_124 GND_125 GND_126 GND_127 GND_128 GND_129 GND_130 GND_131 GND_132 GND_133 GND_134 GND_135 GND_136 GND_137 GND_138 GND_139 GND_140 GND_141 GND_142 GND_143 GND_144 GND_145 GND_146 GND_147 GND_148 GND_149 GND_150 GND_151 GND_152 GND_153 GND_154 GND_155 GND_156 GND_157 GND_158 GND_159 GND_160 GND_161 GND_162 GND_163 GND_164 GND_165 GND_166 GND_167 GND_168 GND_169 GND_170 GND_171 GND_172 GND_173 GND_174 GND_175 GND_176 GND_177 GND_178 GND_179 GND_180 GND_181 GND_182 GND_183 GND_184 GND_185 GND_186 GND_187 GND_188 GND_189

GND_190 RFU_GND_0 RFU_GND_1 GND_SENSE

V31 Y11 Y13 Y15 Y17 Y19 Y21 Y23 Y25 AA2 AA5 AA11 AA12 AA13 AA14 AA15 AA16 AA17 AA18 AA19 AA20 AA21 AA22 AA23 AA24 AA25 AA34 AB12 AB14 AB16 AB18 AB20 AB22 AB24 AC9 AD2 AD5 AD11 AD13 AD15 AD17 AD21 AD23 AD25 AD31 AD34 AE11 AE12 AE13 AE14 AE15 AE16 AE17 AE18 AE19 AE20 AE21 AE22 AE23 AE24 AE25 AG2 AG5 AG31 AG34 AK2 AK5 AK31 AK34 AL6 AL9 AL12 AL15 AL18 AL21 AL24 AL27 AL30 AN2 AN34 AP3 AP6 AP9 AP12 AP15 AP18 AP21 AP24 AP27 AP30 AP33 AK14 K9 AD19

L27 M27

T5 AA6

1

change R1326 to 33.2k for 55nm

FB_CAL_PU_GND

FB_CAL_TERM_GND

MIOA_CAL_PU_GND MIOB_CAL_PU_GND

R1326 30.9_0402_1%VGA@R1326 30.9_0402_1%VGA@

1 2

R1327 40.2_0402_1%~D

1 2

VGA@

R1328 49.9_0402_1%~D

@

R1329 49.9_0402_1%~D

@

12 12

R860/R861 ; depop for G84

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

http://laptop-motherboard-schematic.blogspot.com/

4

3

2

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

NVG98 GND

LA-4671P

1.0

33 53Friday, February 20, 2009

1

1.0

of

5

FBA_CMD19 FBA_CMD25

D D

CLKA0

R1330

R1330 475_0402_1%~D

475_0402_1%~D

VGA@

VGA@ 1 2

CLKA0#

243 ohm for NB8P 475 ohm for NB9X Place close to U51

C C

1 2

R1332

243_0402_1%~D

VGA@

+VREFA0

1 2

R1377 976_0402_1%

+VREFA1

1 2

R1378 976_0402_1%

SSM3K7002FU_SC70-3

B B

+FBVDDQ

12

R1379

1.05K_0402_1%

VGA@

12

R1380

2.49K_0402_1%

VGA@

D

Q135

VGA@

S

+VREFA0

1

C1722

0.01U_0402_16V7K

VGA@

2

13

2

G

FBA_CMD22 FBA_CMD24 FBA_CMD0 FBA_CMD2 FBA_CMD21 FBA_CMD16 FBA_CMD23 FBA_CMD20 FBA_CMD17 FBA_CMD9 FBA_CMD12 FBA_CMD3

DQMA#3 DQMA#2 DQMA#1 DQMA#0

DQSA_WP3 DQSA_WP2 DQSA_WP1 DQSA_WP0

+VREFA0 +VREFA1

FBA_CMD14

FBA_CMD1 FBA_CMD10 FBA_CMD11 FBA_CMD8

FBA_CMD18

CLKA031

CLKA0#31

DQSA_RN3 DQSA_RN2 DQSA_RN1 DQSA_RN0

+FBVDDQ

FBA_CMD15 FBA_CMD27

VRAM_REF 30,35

H11 K10

K11

E10 N10

D11 P11

H12

ZQ1

D10 P10

A11

M12

V11

H10

4

32Mx32 GDDR3

B12

U51

VSSQB1VSSQB4VSSQB9VSSQ

A0 A1 A2 A3 A4 A5 A6 A7 A8/AP A9 A10 A11 BA0 BA1

DM0 DM1 DM2 DM3

WDQS0 WDQS1 WDQS2 WDQS3

VREF VREF RFU1 RFU2

RAS# CAS# WE# CS#

CKE CK CK#

ZQ MF

RDQS0 RDQS1 RDQS2 RDQS3

VDD VDD VDD VDD VDD VDD VDD VDD

SEN RESET BA2

VSSA VSSA

+FBVDDQ

VGA@

1

2

4.7U_0603_6.3V6M~D

VGA@

C1661

VSSQD1VSSQD4VSSQD9VSSQ

K4

H2

K3

M4

K9

L9

M9

K2

L4 G4 G9

E3

N3

D2

P2

H1

J2

J3

H3

F4 H9

F9

H4

J11 J10

A4

A9

D3

P3

A2

F1

F12

M1

V2

V4

V9

J1

J12

D12

G11

L11

P12

T12

VSSQG2VSSQ

VSSQL2VSSQ

VSSQP1VSSQP4VSSQP9VSSQ

VSSA3VSS

A10

VSSQT1VSSQT4VSSQT9VSSQ

VSSG1VSS

VSSL1VSS

VSSV3VSS

K4J52324QE-BC14_FBGA136~D

L12

V10

G12

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8

DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VDDA VDDA

X76@

B2 B3 C2 C3 E2 F3 F2 G3 B11 B10 C11 C10 E11 F10 F11 G10 M11 L10 N11 M10 R11 R10 T11 T10 M2 L3 N2 M3 R2 R3 T2 T3

A1 A12 C1 C4 C9 C12 E1 E4 E9 E12 J4 J9 N1 N4 N9 N12 R1 R4 R9 R12 V1 V12

K1 K12

FBAD26 FBAD27 FBAD24 FBAD31 FBAD25 FBAD30 FBAD28 FBAD29 FBAD23 FBAD19 FBAD20 FBAD16 FBAD21 FBAD17 FBAD22 FBAD18 FBAD14 FBAD11 FBAD12 FBAD9 FBAD15 FBAD8 FBAD13 FBAD10 FBAD1 FBAD5 FBAD3 FBAD4 FBAD2 FBAD6 FBAD0 FBAD7

Place below decoupling caps close U57

0.1U_0402_10V7K~D

4.7U_0603_6.3V6M~D

C1663

1

C1662

2

VGA@

0.1U_0402_10V7K~D

1

C1665

C1664

2

VGA@

0.1U_0402_10V7K~D

C1666

1

2

VGA@

+FBVDDQ

C1667

1

2

VGA@

RAS# --> BA2 CAS# --> CS0# WE --> CKE CS0# --> CAS# A0 --> A4 A1 --> A5 A2 --> A6 A3 --> A9 A4 --> A0 A5 --> A1 A6 --> A2 A7 --> A11 A8 --> A10 A9 --> A3 A10 --> A8 A11 --> A7 CKE --> WE# BA0 --> BA1 BA1 --> BA0 BA2 --> RAS# NC/CS1# --> NV/CS1#

0.1U_0402_10V7K~D

C1668

1

C1669

2

VGA@

3

Mirror U52

243_0402_1%~D

+FBVDDQ

4.7U_0603_6.3V6M~D

1

2

VGA@

FBA_CMD5 FBA_CMD13 FBA_CMD21 FBA_CMD20 FBA_CMD19 FBA_CMD25 FBA_CMD4 FBA_CMD9 FBA_CMD17 FBA_CMD6 FBA_CMD23 FBA_CMD16 FBA_CMD3 FBA_CMD12

DQMA#7 DQMA#6 DQMA#5 DQMA#4

DQSA_WP7 DQSA_WP6 DQSA_WP5 DQSA_WP4

+VREFA0 +VREFA1

FBA_CMD14

FBA_CMD27 FBA_CMD8 FBA_CMD18 FBA_CMD10

FBA_CMD11

CLKA131

1 2

R1333

VGA@R1333

VGA@

CLKA1#31

+FBVDDQ

ZQ2

DQSA_RN7 DQSA_RN6 DQSA_RN5 DQSA_RN4

FBA_CMD15 FBA_CMD1

Place below decoupling caps close U58

4.7U_0603_6.3V6M~D

C1652

4.7U_0603_6.3V6M~D

1

C1653

2

VGA@

0.1U_0402_10V7K~D

1

C1655

VGA@

1

C1656

C1657

2

VGA@

C1654

2

VGA@

32Mx32 GDDR3

B12

U52

VSSQB1VSSQB4VSSQB9VSSQ

VSSQD1VSSQD4VSSQD9VSSQ

A0 A1 A2 A3 A4 A5 A6 A7 A8/AP A9 A10 A11 BA0 BA1

DM0 DM1 DM2 DM3

WDQS0 WDQS1 WDQS2 WDQS3

VREF VREF RFU1 RFU2

RAS# CAS# WE# CS#

U52 is Mirror

CKE CK CK#

ZQ MF

RDQS0 RDQS1 RDQS2 RDQS3

VDD VDD VDD VDD VDD VDD VDD VDD

SEN RESET BA2

VSSA VSSA

0.1U_0402_10V7K~D

1

C1658

C1659

2

VGA@

H11 K10

K11

E10 N10

D11 P11

H12

D10 P10

A11

M12

V11

H10

K4 H2 K3

M4

K9

L9

M9

K2

L4 G4 G9

E3

N3

D2

P2

H1

J2 J3

H3

F4

H9

F9

H4

J11 J10

A4

A9

D3

P3

A2

F1

F12

M1

V2

V4

V9

J1

J12

1

2

0.1U_0402_10V7K~D

2

D12

VSSA3VSS

C1660

G11

VSSQG2VSSQ

A10

VSSQL2VSSQ

VSSG1VSS

G12

L11

VSSQP1VSSQP4VSSQP9VSSQ

VSSL1VSS

VSSV3VSS

L12

P12

T12

VSSQT1VSSQT4VSSQT9VSSQ

DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VDDA VDDA

K4J52324QE-BC14_FBGA136~D

V10

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9

X76@

B2 B3 C2 C3 E2 F3 F2 G3 B11 B10 C11 C10 E11 F10 F11 G10 M11 L10 N11 M10 R11 R10 T11 T10 M2 L3 N2 M3 R2 R3 T2 T3

A1 A12 C1 C4 C9 C12 E1 E4 E9 E12 J4 J9 N1 N4 N9 N12 R1 R4 R9 R12 V1 V12

K1 K12

FBAD59 FBAD62 FBAD63 FBAD57 FBAD61 FBAD58 FBAD56 FBAD60 FBAD54 FBAD50 FBAD53 FBAD49 FBAD52 FBAD51 FBAD55 FBAD48 FBAD46 FBAD45 FBAD47 FBAD40 FBAD43 FBAD42 FBAD44 FBAD41 FBAD35 FBAD38 FBAD34 FBAD37 FBAD33 FBAD39 FBAD32 FBAD36

+FBVDDQ

FBAD[0..63]

DQSA_WP [0..7]

DQSA_RN[0..7]

DQMA#[0..7]

FBA_CMD[0..27]

1

FBAD[0..63] 31

DQSA_WP[0..7] 31

DQSA_RN[0..7] 31

DQMA#[0..7] 31

FBA_CMD[0..27] 31

CLKA1

CLKA1#

243 ohm for NB8P 475 ohm for NB9X Place close to U52

VGA@

R1331

R1331 475_0402_1%~D

475_0402_1%~D

1 2

0.01U_0402_16V7K

VGA@

4

0.01U_0402_16V7K

C1670

1

2

VGA@

+FBVDDQ

12

R1381

1.05K_0402_1%

VGA@

A A

VGA@

12

R1382

2.49K_0402_1%

VGA@

+VREFA1

1

C1723

0.01U_0402_16V7K

VGA@

2

5

http://laptop-motherboard-schematic.blogspot.com/

0.01U_0402_16V7K

C1672

C1671

1

2

VGA@

0.01U_0402_16V7K

1

C1673

C1674

2

VGA@

0.01U_0402_16V7K

1

C1676

C1675

2

VGA@

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

VGA@

0.01U_0402_16V7K

1

C1677

2

VGA@

0.01U_0402_16V7K

1

C1679

C1678

2

VGA@

0.01U_0402_16V7K

1

C1681

C1680

2

VGA@

0.01U_0402_16V7K

1

C1683

C1682

2

VGA@

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

NVG94 External GDDR3-A

LA-4671P

1

1.0

34 53Friday, February 20, 2009

1.0

of

5

U53

FBC_CMD19 FBC_CMD25 FBC_CMD22 FBC_CMD24

ZQ3

+FBVDDQ

FBC_CMD0 FBC_CMD2 FBC_CMD21 FBC_CMD16 FBC_CMD23 FBC_CMD20 FBC_CMD17 FBC_CMD9 FBC_CMD12

DQMC#1 DQMC#0 DQMC#3 DQMC#2

DQSC_WP1 DQSC_WP0 DQSC_WP3 DQSC_WP2

+VREFC0 +VREFC1

FBC_CMD14

FBC_CMD1 FBC_CMD10 FBC_CMD11 FBC_CMD8

FBC_CMD18 CLKC0 CLKC0#

DQSC_RN1 DQSC_RN0 DQSC_RN3 DQSC_RN2

FBC_CMD15 FBC_CMD27

D D

CLKC0

CLKC0#

243 ohm for NB8P 475 ohm for NB9X Place close to U53

C C

+VREFC0

R1383 976_0402_1%

+VREFC1

R1384 976_0402_1%

B B

VGA@

R1346

R1346 475_0402_1%~D

475_0402_1%~D

1 2

SSM3K7002FU_SC70-3

VGA@

Q136

VGA@

1 2

R1348

VGA@ R1348

VGA@

243_0402_1%~D

13

D

2

G

S

CLKC031

CLKC0#31

VRAM_REF 30,34

M12

K4 H2 K3

M4

K9 H11 K10

L9

K11

M9

K2

L4 G4 G9

E3 E10 N10

N3

D2 D11 P11

P2

H1 H12

J2 J3

H3

F4

H9

F9

H4

J11 J10

A4

A9

D3 D10 P10

P3

A2 A11

F1 F12

M1

V2 V11

V4

V9 H10

J1

J12

4

32Mx32 GDDR3

B12

D12

G11

VSSQB1VSSQB4VSSQB9VSSQ

VSSQD1VSSQD4VSSQD9VSSQ

A0 A1 A2 A3 A4 A5 A6 A7 A8/AP A9 A10 A11 BA0 BA1

DM0 DM1 DM2 DM3

WDQS0 WDQS1 WDQS2 WDQS3

VREF VREF RFU1 RFU2

RAS# CAS# WE# CS#

CKE CK CK#

ZQ MF

RDQS0 RDQS1 RDQS2 RDQS3

VDD VDD VDD VDD VDD VDD VDD VDD

SEN RESET BA2

VSSA VSSA

VSSQG2VSSQ

VSSA3VSS

A10

VSSG1VSS

G12

L11

P12

VSSQL2VSSQ

VSSQP1VSSQP4VSSQP9VSSQ

VSSQT1VSSQT4VSSQT9VSSQ

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8

DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VDDA VDDA

VSSL1VSS

VSSV3VSS

K4J52324QE-BC14_FBGA136~D

X76@

L12

V10

3

2

1

32Mx32 GDDR3

T12

+FBVDDQ

FBC_CMD5 FBC_CMD13 FBC_CMD21 FBC_CMD20 FBC_CMD19 FBC_CMD25 FBC_CMD4 FBC_CMD9 FBC_CMD17 FBC_CMD6 FBC_CMD23 FBC_CMD16 FBC_CMD3FBC_CMD3 FBC_CMD12

DQMC#7 DQMC#6 DQMC#5 DQMC#4

DQSC_WP7 DQSC_WP6 DQSC_WP5 DQSC_WP4

+VREFC0 +VREFC1

FBC_CMD14

FBC_CMD27 FBC_CMD8 FBC_CMD18 FBC_CMD10

FBC_CMD11 CLKC1 CLKC1#

ZQ4

DQSC_RN7 DQSC_RN6 DQSC_RN5 DQSC_RN4

FBC_CMD15 FBC_CMD1

B2 B3 C2 C3 E2 F3 F2 G3 B11 B10 C11 C10 E11 F10 F11 G10 M11 L10 N11 M10 R11 R10 T11 T10 M2 L3 N2 M3 R2 R3 T2 T3

A1 A12 C1 C4 C9 C12 E1 E4 E9 E12 J4 J9 N1 N4 N9 N12 R1 R4 R9 R12 V1 V12

K1 K12

FBCD9 FBCD11 FBCD10 FBCD12 FBCD14 FBCD13 FBCD8 FBCD15 FBCD3 FBCD5 FBCD2 FBCD1 FBCD6 FBCD0 FBCD4 FBCD7 FBCD27 FBCD26 FBCD25 FBCD24 FBCD31 FBCD30 FBCD29 FBCD28 FBCD21 FBCD22 FBCD20 FBCD23 FBCD19 FBCD17 FBCD18 FBCD16

+FBVDDQ

Mirror U54

RAS# --> BA2 CAS# --> CS0# WE --> CKE CS0# --> CAS# A0 --> A4 A1 --> A5 A2 --> A6 A3 --> A9 A4 --> A0 A5 --> A1 A6 --> A2 A7 --> A11 A8 --> A10 A9 --> A3 A10 --> A8 A11 --> A7 CKE --> WE# BA0 --> BA1 BA1 --> BA0 BA2 --> RAS# NC/CS1# --> NV/CS1#

CLKC131

R1349

VGA@R1349

VGA@

CLKC1#31

1 2

243_0402_1%~D

B12

U54

VSSQB1VSSQB4VSSQB9VSSQ

VSSQD1VSSQD4VSSQD9VSSQ

A0 A1 A2 A3 A4 A5 A6 A7 A8/AP A9 A10 A11 BA0 BA1

DM0 DM1 DM2 DM3

WDQS0 WDQS1 WDQS2 WDQS3

VREF VREF RFU1 RFU2

RAS# CAS# WE# CS#

U54 is Mirror

CKE CK CK#

ZQ MF

RDQS0 RDQS1 RDQS2 RDQS3

VDD VDD VDD VDD VDD VDD VDD VDD

SEN RESET BA2

VSSA VSSA

H11 K10

K11

E10 N10

D11 P11

H12

D10 P10

A11

M12

V11

H10

K4 H2 K3

M4

K9

L9

M9

K2

L4 G4 G9

E3

N3

D2

P2

H1

J2

J3

H3

F4

H9

F9

H4

J11 J10

A4

A9

D3

P3

A2

F1

F12

M1

V2

V4

V9

J1

J12

D12

VSSQG2VSSQ

VSSA3VSS

A10

G11

VSSG1VSS

L11

VSSQL2VSSQ

G12

VSSQP1VSSQP4VSSQP9VSSQ

VSSL1VSS

L12

P12

T12

VSSQT1VSSQT4VSSQT9VSSQ

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8

DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VDDA VDDA

VSSV3VSS

K4J52324QE-BC14_FBGA136~D

V10

X76@

B2 B3 C2 C3 E2 F3 F2 G3 B11 B10 C11 C10 E11 F10 F11 G10 M11 L10 N11 M10 R11 R10 T11 T10 M2 L3 N2 M3 R2 R3 T2 T3

A1 A12 C1 C4 C9 C12 E1 E4 E9 E12 J4 J9 N1 N4 N9 N12 R1 R4 R9 R12 V1 V12

K1 K12

FBCD62 FBCD56 FBCD63 FBCD57 FBCD61 FBCD59 FBCD60 FBCD58 FBCD51 FBCD53 FBCD50 FBCD52 FBCD48 FBCD55 FBCD49 FBCD54 FBCD44 FBCD46 FBCD47 FBCD45 FBCD41 FBCD43 FBCD42 FBCD40 FBCD34 FBCD39 FBCD32 FBCD38 FBCD35 FBCD36 FBCD33 FBCD37

+FBVDDQ

FBCD[0..63]

DQSC_WP[0..7]

DQSC_RN[0..7]

DQMC#[0..7]

FBC_CMD[0..27]

CLKC1

CLKC1#

243 ohm for NB8P 475 ohm for NB9X Place close to U54

FBCD[0..63] 31

DQSC_WP[0..7] 31

DQSC_RN[0..7] 31

DQMC#[0..7] 31

FBC_CMD[0..27] 31

VGA@

R1347

R1347 475_0402_1%~D

475_0402_1%~D

1 2

+FBVDDQ

12

R1385

1.05K_0402_1%

VGA@

12

R1386

2.49K_0402_1%

VGA@

+FBVDDQ

12

R1387

A A

R1387

1.05K_0402_1%

VGA@

12

R1388

2.49K_0402_1%

VGA@

+VREFC0

1

C1724

0.01U_0402_16V7K

VGA@

2

+VREFC1

1

C1725

0.01U_0402_16V7K

VGA@

2

5

+FBVDDQ

1

2 VGA@

VGA@

Place below decoupling caps close U59

4.7U_0603_6.3V6M~D

1

C1689

C1688

2 VGA@

VGA@

0.01U_0402_16V7K

1

C1707

2

VGA@

http://laptop-motherboard-schematic.blogspot.com/

1

2 VGA@

VGA@

1

2

0.01U_0402_16V7K

C1690

C1708

VGA@

1

2 VGA@

VGA@

1

2

4

0.1U_0402_10V7K~D

0.01U_0402_16V7K

C1691

C1709

VGA@

1

2 VGA@

VGA@

1

2

0.1U_0402_10V7K~D

0.01U_0402_16V7K

C1692

C1710

VGA@

0.1U_0402_10V7K~D

1

2 VGA@

VGA@

0.01U_0402_16V7K

1

2

C1693

C1711

VGA@

1

2 VGA@

VGA@

1

2

0.1U_0402_10V7K~D

0.01U_0402_16V7K

C1694

C1712

VGA@

1

2 VGA@

VGA@

1

2

0.1U_0402_10V7K~D

1

C1695

C1696

2 VGA@

VGA@

0.01U_0402_16V7K

C1713

+FBVDDQ

VGA@

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Place below decoupling caps close U60

4.7U_0603_6.3V6M~D

1

2

VGA@

1

2

VGA@

4.7U_0603_6.3V6M~D

0.1U_0402_10V7K~D

1

C1698

C1699

C1700

2

VGA@

0.01U_0402_16V7K

1

C1714

2

VGA@

0.01U_0402_16V7K

1

C1716

C1715

2

VGA@

4.7U_0603_6.3V6M~D

1

C1697

2

3

0.1U_0402_10V7K~D

VGA@

0.1U_0402_10V7K~D

1

C1705

C1704

2

VGA@

0.01U_0402_16V7K

1

C1720

2

0.1U_0402_10V7K~D

VGA@

0.1U_0402_10V7K~D

1

C1702

C1703

2

VGA@

0.01U_0402_16V7K

1

C1719

C1718

2

VGA@

0.1U_0402_10V7K~D

1

C1701

2

0.01U_0402_16V7K

1

C1717

2

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

NVG94 External GDDR3-B

LA-4671P

1

35 53Friday, February 20, 2009

of

1.0

5

D D

C C

@

B B

R1362

VGA@ R1362

VGA@

R1368

+3VS

4

R1365

R1363

@

1 2

45.3K_0402_1%~D

4.99K_0402_1%~D

R1369

10K_0402_1%

1 2

VGA@ R1369

VGA@

R1364

1 2

VGA@ R1364

VGA@

R1370

@

1 2

R1365

@

1 2

4.99K_0402_1%~D

R1371

1 2

4.99K_0402_1%~D

VGA@ R1371

VGA@

1 2

15K_0402_1%

1 2

R1366

@

1 2

20K_0402_1%~D

R1372

@

1 2

45.3K_0402_1%~D

X76@ R1372

X76@

R1367

VGA@ R1367

VGA@

R1373

1 2

4.99K_0402_1%~D

1 2

2K_0402_1%~D

3

STRAP0

STRAP1

STRAP2

ROM_SCLK_GPU

ROM_SI_GPU

ROM_SO_GPU

STRAP0 30

STRAP1 30

STRAP2 30

ROM_SCLK_GPU 30

ROM_SI_GPU 30

ROM_SO_GPU 30

2

STRAP0

STRAP1

STRAP2

ROM_SCLK_GPU

ROM_SI_GPU

ROM_SO_GPU

Pull up 45K

Pull down 10K

Pull up 5K

Pull down 15K

--------------------------------->

Pull up 5K

All GDDR3

ROM_SI_GPU

Q:16x32

H:16x32

S:16x32

----------------

Q:32x32

H:32x32

1

Pull down

10K_1%

15K_1%

20K_1%

30K_1%

35K_1%

S:32x32 45.3K_1%

R1364

17" 15K

ZZZ

A A

ZZZ

VRAM

5

Security Classification

Issued Date

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

http://laptop-motherboard-schematic.blogspot.com/

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2008/03/21 2008/6/05

Compal Secret Data

Deciphered Date

2

24.9K NB9P-???

R1365

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

NB8P-SE_Straps

LA-4671P

1

36 53Friday, February 20, 2009

of

1.0

A

B

C

D

E

+5VALW to +5VS Transfer+3VALW to +3VS Transfer

C264

1

S

2

S

3

S

4

G

SYSON

+3VS+3VALW

10U_0805_10V4Z~N

1

C465

2

0.1U_0402_16V4Z~N

+3VALW

R409

100K_0402_5%

SYSON#

2

G

R365

R365 10K_0402_5%

10K_0402_5%

1 2

1

C256

2

12

13

D

Q42

Q42 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

S

U39

8

S

D

7

S

D

6

1

C278

2

10U_0805_10V4Z~N

RUNON 5VS_GATE

D

5

D

SI4800DY_SO8

1 2

R267

R267 47K_0402_5%

47K_0402_5%

+CPU_CORE

S G

1

2

+B+_BIAS

12

R198

330K_0402_5%

1 1

SUSP

2

G

2 2

1

2

RUNON 3VS_GATE

13

D

Q18

SSM3K7002FU_SC70-3

S

U40

8

D

7

D

6

D

5

D

C271

SI4800DY_SO8

10U_0805_10V4Z~N

1 2

R197

R197 100K_0402_5%

100K_0402_5%

SYSON25,26,43

1

0.01U_0402_25V7K~D

2

+5VS+5VALW

1 2 3 4

0.1U_0402_16V4Z~N

C279

0.01U_0402_25V7K~D

1 2

C211 0.1U_0402_16V4Z~N@ C211 0.1U_0402_16V4Z~N@

1

C284

2

1

C283

10U_0805_10V4Z~N

2

+VCCP

+1.8V to +1.8VS Transfer

VGA_PWGOD#

SUSP

R665

1 2

0_0402_5%@

+B+_BIAS

1

R559

VGA@

2

G

C727

1 2

2

10U_0805_10V4Z~N

47K_0402_5%~D

VGA@

1.8VS ON 1.8VS_GATE

1 2

R608

R608 100K_0402_5%

100K_0402_5%

VGA@

13

D

Q48

SSM3K7002FU_SC70-3

S

VGA@

U41

8

D

7

D

6

D

5

D

SI4800DY_SO8

VGA@

1

C696

0.01U_0402_25V7K~D

2

VGA@

1

S

2

S

3

S

4

G

+FBVDDQ+1.8V

10U_0805_10V4Z~N

1

C728

0.1U_0402_16V4Z~N

2

VGA@

4.7A

1

2

C697

VGA@

+5VALW

12

R340

2

G

R338

R338 10K_0402_5%

10K_0402_5%

1 2

+3VALW

R668

2

G

VGA@

R340

100K_0402_5%

13

D

Q32

Q32 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

S

12

13

D

Q49

Q49 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

S

VGA Discharge circuit

Discharge circuit-1

+1.8VCCD_CB

12

R536

R536 470_0402_5%

470_0402_5%

13

D

@

SUSP

http://laptop-motherboard-schematic.blogspot.com/

B

@

2

G

Q50

Q50 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

S

@

+1.8V

12

R133

470_0402_5%

13

D

@

SYSON#

@

2

G

Q12

S

@

SSM3K7002FU_SC70-3

Security Classification

Issued Date

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

3 3

R551

100K_0402_5%

VGA_PWGOD

SUSP

SUSP#

+5VALW

12

VGA@

100K_0402_5%

VGA_PWGOD#

SUSP29,47

SUSP#25,26,29,42,44,47

4 4

VGA_PWGOD45

SYSON -> SUSP# -> VGA_ON->VGA_PWGOD

A

+1.1V_GFX_PCIE +GPU_CORE

12

R646

470_0402_5%

@

13

D

2

G

Q61

S

@

SSM3K7002FU_SC70-3

SUSP

Compal Secret Data

2007/1/15 2008/6/05

Compal Secret Data

Deciphered Date

+0.9VS

12

13

D

@

2

G

S

SUSPSUSP

2

G

R351

470_0402_5%

SUSP SUSPSUSP

Q33

@

SSM3K7002FU_SC70-3

D

12

R647

470_0402_5%

@

13

D

Q62

S

@

SSM3K7002FU_SC70-3

+5VS

12

470_0402_5%

13

D

@

2

G

Q39

S

SSM3K7002FU_SC70-3

+FBVDDQ

12

R609

470_0402_5%

@

13

D

VGA_PWGOD#

+3VS

R391

@

Custom

Date: Sheet

12

39_0402_5%

13

D

2

G

Q38

S

SSM3K7002FU_SC70-3

Title

DC/DC Circuits

Size Document Number Rev

LA-4671P

D

2

G

Q65

S

@

SSM3K7002FU_SC70-3

+1.5VS

R383

12

13

D

@

2

G

S

R382

470_0402_5%

Q37

@

SSM3K7002FU_SC70-3

Compal Electronics, Inc.

E

1.0

37 53Friday, February 20, 2009

1.0

of

5

FD3

FD2

FD1

FD1 FIDUCAL

D D

H_4P2

H_3P2

C C

H_3P7

FIDUCAL

@

1

H6 HOLEA@H6HOLEA@

1

H1 HOLEA@H1HOLEA@

1

H3 HOLEA@H3HOLEA@

1

FIDUCAL

1

H11

H11 HOLEA@

HOLEA@

1

H9 HOLEA@H9HOLEA@

1

FIDUCAL

@

1

H7 HOLEA@H7HOLEA@

1

H17

H17 HOLEA@

HOLEA@

1

FD4

FD4 FIDUCAL

FIDUCAL

1

H10

H10 HOLEA@

HOLEA@

1

H27

H27 HOLEA@

HOLEA@

1

4

H21

H19

H18

H18 HOLEA@

HOLEA@

1

HOLEA@

1

3

2

1

Change Location H5 (3P2), H17 (3P7) Add H27 (3P2) (2008-10-31 update)

H8

H12

H4

H2 HOLEA@H2HOLEA@

1

H5

HOLEA@H4HOLEA@

HOLEA@H5HOLEA@

1

H12

H13

HOLEA@H8HOLEA@

1

H13

HOLEA@

1

H15

H15 HOLEA@

HOLEA@

1

H_3P2

H34

H23

H24

H22

H22 HOLEA@

HOLEA@

B B

H_2P5

NPTH

A A

5

1

H16

H16 HOLEA@

HOLEA@

1

H29

H29 HOLEA@

HOLEA@

1

H31

H31 HOLEA@

HOLEA@

1

H24

HOLEA@

1

H28

H20

HOLEA@

1

H35

H30

HOLEA@

1

H32

H32 HOLEA@

HOLEA@

1

http://laptop-motherboard-schematic.blogspot.com/

H26

H25

HOLEA@

1

4

H34

H33

HOLEA@

1

Security Classification

Issued Date

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

Add H34 (3P2) (2008-11-11 update)

Compal Secret Data

2007/1/15 2008/6/05

Compal Secret Data

Deciphered Date

2

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

Screws

LA-4671P

38 53Friday, February 20, 2009

of

1

of

1.0

5

4

3

2

1

ADPIN

PJPDC1

1

2

3

4

5

6

7

D D

C C

B B

+1.1V_GFX_PCIEP

A A

GND GND

ACES_88299-0600

@

+5VALWP

+3VALWP

+1.8VP

+1.5VSP

8

BLM18BD102SN1D_0603~D

PD4

BATT+

51ON#27

PJP2

PJP2 JUMP_43X118@

JUMP_43X118@

112

PJP3

PJP3 JUMP_43X118@

JUMP_43X118@

112

PJP5

PJP5 JUMP_43X118@

JUMP_43X118@

112

PJP7

PJP7 JUMP_43X118@

JUMP_43X118@

112

PJP9

PJP9 JUMP_43X118@

JUMP_43X118@

112

PJP11

PJP11 JUMP_43X118@

JUMP_43X118@

112

PJP4

PJP4 JUMP_43X118@

JUMP_43X118@

112

5

2 1

CH751H-40PT_SOD323-2

CHGRTCP

100K_0402_5%~D

PR206

22K_0402_5%~D

1 2

RTCVREF

2

12

PR205

APL5156-33DI-TRL_SOT89-3

3

12

PC166

4.7U_0805_6.3V6K~D

+1.1V_GFX_PCIE

+5VALW

+3VALW

+1.8V

+1.5VS

PU14

PC164

VOUT

12

0.22U_1206_25V7K

GND

1

+VGA_COREP

12

PC286

PC290

100P_0402_50V8J~D

0.01U_0402_25V7K~D

PL16

DOCK_PSIDPSID

12

PJP1

PJP1 JUMP_43X118@

JUMP_43X118@

2

112

2

12

APL5156_IN

2

VIN

12

+0.9VSP

+VCCPP

http://laptop-motherboard-schematic.blogspot.com/

12

PC287

PC291

1000P_0402_50V7K~D

VIN

PD3

RLS4148_LL34-2

1 2 12

PR203

33_1206_5%

PQ50

TP0610K-T1-E3_SOT23-3

13

32.8

32.8 12

PC165

0.1U_0603_25V7K~D

PR207

PR207 200_0805_5%

200_0805_5%

PC167

PC167 1U_0805_25V4Z~D

1U_0805_25V4Z~D

PJP6

PJP6 JUMP_43X118@

JUMP_43X118@

2

112

PJP8

PJP8 JUMP_43X118@

JUMP_43X118@

2

112

PJP10

PJP10 JUMP_43X118@

JUMP_43X118@

2

112

PJP12

PJP12 JUMP_43X118@

JUMP_43X118@

2

112

PJP13

PJP13 JUMP_43X118@

JUMP_43X118@

2

112

PJP14

PJP14 JUMP_43X118@

JUMP_43X118@

2

112

PJP18

PJP18 JUMP_43X118@

JUMP_43X118@

2

112

PJP21

PJP21 JUMP_43X118@

JUMP_43X118@

2

112

4

12

PC158

100P_0402_50V8J~D

0.1U_0603_25V7K~D

12

PR204

68_1206_5%~D

+0.9VS

+VCCP

+GPU_CORE

SMB3025500YA_2P

PC157

1000P_0402_50V7K~D

PL17

1 2

VS

12

PC160

100P_0402_50V8J~D

VIN

PC156

2200P_0402_50V7K~D

@

1 2

PR189

PR189 1M_0402_1%~D@

12

PC159

1000P_0402_50V7K~D

@

PC162

.1U_0402_16V7K~D

VIN

12

@

PR190

82.5K_0402_1%~D

PR193

PR193 22K_0402_1%~D@

22K_0402_1%~D@

1 2

12

@

12

5

6

PR194

19.6K_0402_1%~D

8

P

+

-

G

4

PU13B

@ PU13B

@

7

O

LM393DR_SO8

12

@

PC163

PC163 1000P_0402_50V7K~D

1000P_0402_50V7K~D

1M_0402_1%~D@

1 2

VinDe_IN3N41

3

VinDe_Ref

2

PR198

@PR198

@

10K_0402_5%~D

Vin Detector

VS

8

@

+

-

4

12

Max. typ. Min.

L-->H 18.234 17.841 17.449 H-->L 17.597 17.210 16.813

PR208

@ PR208

@

1 2

0_0402_5%~D

DOCK_PSID

PR213

2

3

@

1

PD7

PD7 SM24_SOT23

SM24_SOT23

Security Classification

Issued Date

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2006/10/1 2008/6/05

1 2

100K_0402_1%~D

PR215

1 2

15K_0402_1%~D

Compal Secret Data

Deciphered Date

PQ53

D

1 3

RHU002N06_SOT323-3

G

2

C

PQ54

2

B

MMST3904-7-F_SOT323~D

E

3 1

2

S

PR188

56K_0402_5%~D@

@

12

PC161

PU13A

P

1

O

G

LM393DR_SO8

33_0402_5%~D

0.01U_0402_25V7K~D

RLZ4.3B_LL34

RTCVREF

3.3V

PR212

1 2

VIN

@

12

PR191

PR191 10K_0402_5%~D

10K_0402_5%~D

12

@

PD1

2

3

PD5

DA204U_SOT323~D

1

+5VALW

12

Title

Size Document Number Rev

Date: Sheet

PR192

@PR192

@

1K_0402_5%~D

1 2

VinDe_Out

12

@

PR195

PR195 10K_0402_5%~D

10K_0402_5%~D

+3VALW+5VALW

PR209

1 2

2.2K_0402_5%~D

+5VALW

2

3

PD6

PR214

@

DA204U_SOT323~D

10K_0402_1%~D

PR216

1 2

10K_0402_1%~D@

1

DCIN / Precharge

LA-4671P

ACIN 19,26,40

1

39 53Friday, February 20, 2009

PS_ID 26

PSID_DISABLE# 26

of

1.0Custom

A

PQ55

VIN

12

PR339

1 1

3.3_1210_5%~D

12

PR272

3.3_1210_5%~D

PC169

2.2U_0805_25V6K

1 2

PC170

0.01U_0603_50V7K~D

1 2

90W adapter

Icharge=(Vsrset/Vvdac)*(0.1/PR222)=3.3A

Iadapter=(Vacset/Vvdac)*(0.1/PR217)=4.4A

Input OVP : 22.3V

2 2

Input UVP : 16.98V

Fsw : 300KHz

VREF

PR229

PR229 47K_0402_1%~D

47K_0402_1%~D

1 2

13

D

S

GND

CELLS

VREF

CELLS

2

G

PQ61

PQ61 SSM3K7002F_SC59-3

SSM3K7002F_SC59-3

3 Cell

4 Cell

ACGOOD#

3cell/4cell# 4 8

FDS4435BZ_SO8

8 7 6 5

1 2

PR226

PR226 340K_0402_1%~D

340K_0402_1%~D

1 2

OVPSET

PR227

54.9K_0402_1%

1 2

100K_0402_1%~D

0.1U_0603_25V7K~D

PQ55

1

S

D

2

S

D

3

S

D

4

G

D

PR221

PR221 340K_0402_1%~D

340K_0402_1%~D

ACDET

PR223

54.9K_0402_1%

SI2301BDS-T1-E3_SOT23-3

PR228

GATE

1 2

PC189

REGN

Cells selector

PR53

210K_0402_1%~D

0.1U_0805_25V7M~N

210K_0402_1%~D

1 2

+B+_BIAS

ACOFF

1 2

PC354

.1U_0402_16V7K~D

100K_0402_1%~D

3 3

PR235

1 2

+B+

100_0805_5%~D

+5VALW

PR236

1 2

12

PD9

PR238

1 2

32.8

220K_0402_5%

1SS355_SOD323-2

4 4

12

PC194

PR239

1 2

220K_0402_5%

0.1U_0603_25V7K~D

220K_0402_5%

2

470K_0402_5%~D

13

D

PQ64

2

G

RHU002N06_SOT323-3

S

A

CHGVADJ26

PQ63

TP0610K-T1-E3_SOT23-3

13

32.8

PC193

1 2

B

PVCC_CHG

PC174

1 2

+3VALW

CP setting

2

12

ACSET

12

VREF

PR378

http://laptop-motherboard-schematic.blogspot.com/

FDS4435BZ_SO8

1 2 3 4

12

PR219

100K_0402_1%~D

0.01U_0402_25V7K~D

51.1K_0402_1%

1 2

0.01U_0402_25V7K~D

@

PQ60

1 3

PR51

PR51 0_0402_5%~D@

0_0402_5%~D@

VADJ

PR54

PR54 499K_0402_1%~D

499K_0402_1%~D

VREF

12

2

G

12

PR379

340K_0402_1%~D

B

PQ56

8

S

D

7

S

D

6

S

D

5

G

D

12

PR224

PC182

1U_0603_10V6K~D

+3VALW

12

PR377

PR377 200K_0402_1%~D

200K_0402_1%~D

13

D

PQ90

PQ90 SSM3K7002F_SC59-3

SSM3K7002F_SC59-3

S

PR217

0.015_2512_1%

1

2

PC175

.1U_0402_16V7K~D

1 2

PC178

0.1U_0603_25V7K~D

ACDRV_CHG#

ACSET

12

PR225

PR225 100K_0402_1%~D

100K_0402_1%~D

VREF

PC188

PR262

12

0_0402_5%~D

GATE

13

D

PQ89

2

G

SSM3K7002F_SC59-3

S

4

3

CHGEN#

12

PC176

0.1U_0603_25V7K~D

ACN ACP

1 2

PC184

0.47U_0603_16V7K~D

12

PR261

@PR261

@

0_0402_5%~D

VDAC

VADJ

/BATDRV

PU15

1

CHGEN

2

ACN

3

ACP

4

ACDRV

5

ACDET

6

ACSET

7

ACOP

8

OVPSET

9

AGND

10

VREF

11

VDAC

12

VADJ

13

ACGOOD

14

BATDRV

BQ24751ARHDR_QFN28_5X5

Security Classification

Issued Date

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

PVCC

BTST

HIDRV

PH

REGN

LODRV

PGND

LEARN

CELLS

SRP

SRN

BAT

TP

SRSET

IADAPT

ADP_I26

+COINCELL

RTCVREF

2

PD2

1

BAT54CW_SOT323~D

27.4

C

+B+

PJP15

2

112

JUMP_43X118@

PC177

0.1U_0805_25V7K

1 2

28

PR220

2.2_0603_5%~D

1 2

27

DH_CHG

26

LX_CHG

25

PD8

RLS4148_LL34-2

REGN

24

12

PC183

PC183 1U_0603_10V6K~D

1U_0603_10V6K~D

DL_CHG

23

22

21

CELLS

20

SRP

19

SRN

18

17

12

PC190

0.1U_0603_25V7K~D

29

SRSET

16

1 2

15

PR233

10_0603_5%~D

PC192

100P_0402_50V8J~D

12

PR1

PR1 1K_0402_5%~D

1K_0402_5%~D

Z4012

3

+RTCVCC

1

PC1

PC1 1U_0603_10V4Z~D

1U_0603_10V4Z~D

2

2006/10/1 2008/6/05

PQ57

FDS8884_SO8

12

1 2

PC179

0.1U_0603_25V7K~D

FDS6690AS_NL_SO8

ACOFF 26

ICHG setting

12

PR234

PR234 100K_0402_1%~D

100K_0402_1%~D

12

+COINCELL

Compal Secret Data

PQ59

CHG_B+

578

3 6

241

10UH_SIL1045RA-100PF_4.5A_30%

578

12

PR265

12

3 6

241

PC219

PR231

12

49.9K_0402_1%~D

12

PC191

0.01U_0402_25V7K~D

@

IREF Current

2.968V 3A

COIN RTC Battery

PJP24

1

+

SUYIN_060003FA002G201NL~D

@

Deciphered Date

D

PC1714.7U_1206_25V6K~D PC1714.7U_1206_25V6K~D

1 2

12

PL18

1 2

@

4.7_1206_5%~D

@

680P_0603_50V7K~D

D

PC2921000P_0402_50V7K~D PC2921000P_0402_50V7K~D

1 2

IREF 26

2

-

PC2931000P_0402_50V7K~D PC2931000P_0402_50V7K~D

PC1724.7U_1206_25V6K~D PC1724.7U_1206_25V6K~D

1 2

12

PC180

1 2

10U_1206_25V6M~D

12

PC186

0.1U_0603_25V7K~D

PC1734.7U_1206_25V6K~D PC1734.7U_1206_25V6K~D

/BATDRV

0.02_2512_1%

1

2

.1U_0402_16V7K~D

FSTCHG26

E

12

PR218

PC168

PR222

PC185

1 2

PR230

47K_0402_1%~D

ACGOOD#

Title

Size Document Number Rev

B

Date: Sheet

PR218 100K_0402_1%~D

100K_0402_1%~D

1 2

0.01U_0402_25V7K~D

4

3

RTCVREF

12

4

3

G

5

12

PC187

0.1U_0603_25V7K~D

VREF

47K_0402_1%~D

1 2

13

D

PQ62

2

G

SSM3K7002F_SC59-3

S

VREF

PR237

PR237 47K_0402_1%~D

47K_0402_1%~D

1 2

CHGEN#

13

D

PQ65

2

G

SSM3K7002F_SC59-3

S

Compal Electronics, Inc.

˖˻˴˺˸

˖˻˴˺˸˖˻˴˺˸

˞ˠ˟ˉ˃

˞ˠ˟ˉ˃˞ˠ˟ˉ˃

PQ58

S1S2S

FDS4435BZ_SO8

D8D7D6D

12

PC181

10U_1206_25V6M~D

PR232

E

BATT+

12

PC215

10U_1206_25V6M~D

ACIN 19,26,39

40 53Friday, February 20, 2009

of

1.0

5

4

3

2

1

+B+

PJP20

PJP20 JUMP_43X118@

JUMP_43X118@

2

PC204

112

12

PC216

0.1U_0603_25V7K~D

3.3UH_1164AY-3R3N-P3_7.5A_30%

1

+

2

1 2

PR244

0_0402_5%~D

PR247

@

10K_0402_1%~D

VS

PC196

PC195

4.7U_1206_25V6K~D

PL20

1 2

PD10

RLZ5.1B_LL34

1 2

4.7U_1206_25V6K~D

12

PC197

2200P_0402_50V7K~D

PR241

4.7_1206_5%~D

PC206

680P_0603_50V7K~D

MAINPWON48

2

1 3

PD16

1 2

1SS355TE-17_SOD323-2

D D

+3VALWP

330U_D3L_6.3VM_R25M

C C

B B

A A

3.3VALWP

330U_D3L_6.3VM_R25M

Thermal Design Current=4.2A Peak Current=6A

OCP min=9A Fsw=300K

Rds(on) = 18m ohm(max) ; Rds(on) = 15m ohm(typical)

5

http://laptop-motherboard-schematic.blogspot.com/

TPS51427_B+

241

786

12

123

PR251

100K_0402_1%~D

1 2

PQ97

TP0610K-T1-E3_SOT23-3

4

578

PQ66

AO4466_SO8

3 6

5

PQ68

AO4710_SO8

4

PR252

1 2

200K_0402_5%~D

PR259

0_0402_5%~D

PR240

0_0805_5%

1 2

VL

PC201

PC205

0.1U_0603_25V7K~D

1 2

PC212

0.22U_0603_25V7-K

1 2

VL

PR257

1 2

806K_0603_1%

12

PC213

12

0.1U_0603_25V7K~D

PR243

BST3A

12

0_0603_5%~D

LX3

DL3

FB3

VL

2VREF_TPS51427

1 2

PC211 0.22U_0603_10V7K~DPC211 0.22U_0603_10V7K~D

EN_LDO

TPS51427_EN1

TPS51427_EN2

PR254

@PR254

@

0_0402_5%~D

1 2

PR260

47K_0402_5%~D@

1 2

12

PC201

1 2

PU16

33

26

24

25

23

30

32

1

8

20

4

14

27

PR256

1 2

0_0402_5%~D

PC285

2VREF_TPS51427

6

VIN

TP

DRVH2

VBST2

LL2

DRVL2

VOUT2

REFIN2

VREF2

LDOREFIN

NC

EN_LDO

EN1

EN2

VREF3

5

12

1 2

PC202

3

V5FILT

TONSE

2

12

PR258

@

0_0402_5%~D

12

PC203

1U_0603_10V6K~D

7

19

LDO

V5DRV

15

DRVH1

17

VBST1

16

LL1

18

DRVL1

22

PGND

10

VOUT1

11

FB1

9

VSW

29

SKIPSEL

28

PGOOD2

13

PGOOD1

12

TRIP1

31

TRIP2

GND

TPS51427_QFN32_5X5

21

PC207

1U_0603_10V6K~D

4.7U_0805_6.3V6K~D

1 2

DH5DH3

PR245

BST5A

0_0603_5%~D

0.1U_0603_25V7K~D

LX5

DL5

FB5

PR249 0_0402_5%~D@PR249 0_0402_5%~D@

PR250 0_0402_5%~DPR250 0_0402_5%~D

1 2

ILM1

ILIM2

5VALWP Thermai Design Current=4.2A Peak Current=6A

PC208

OCP min=9A

1U_0603_10V6K~D

PC214

@

0.047U_0402_16V7K~N

0.047U_0603_16V7K~D

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING I S THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING I S THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2VREF_TPS51427

Compal Secret Data

2006/10/1 2008/6/05

3

Compal Secret Data

Deciphered Date

Fsw=400K Rds(on) = 18m ohm(max) ; Rds(on) = 15m ohm(typical)

12

1 2

12

PR253

274K_0402_1%~D

PR255

267K_0402_1%~D

PQ67

AO4466_SO8

PQ69

AO4710_SO8

12

2

578

3 6

241

786

5

PR242

4

123

VL

POK 19

TPS51427_B+

12

PC199

PC198

4.7U_1206_25V6K~D

PL21

3.3UH_1164AY-3R3N-P3_7.5A_30%

12

4.7_1206_5%~D

12

PC209

680P_0603_50V7K~D

Compal Electronics, Inc.

Title

ʾˆ˩˔˟˪ˣʿʳʾˈ˩˔˟˪ˣ

ʾˆ˩˔˟˪ˣʿʳʾˈ˩˔˟˪ˣʾˆ˩˔˟˪ˣʿʳʾˈ˩˔˟˪ˣ

Size Document Number Rev

Friday, February 20, 2009

Date: Sheet

12

PC200

2200P_0402_50V7K~D

12

LA-4671P

12

PC217

0.1U_0603_25V7K~D

PR246

1 2

61.9K_0402_1%~D

PR248

1 2

10K_0402_1%~D

1

+5VALWP

1

+

PC210

PC210 330U_D3L_6.3VM_R25M

330U_D3L_6.3VM_R25M

2

41 53

of

1.0Custom

A

1 1

B

C

VCCP_B++

D

PJP28

12

10U_1206_25V6M~D

PC401

12

10U_1206_25V6M~D

PC398

PC417

2200P_0402_50V7K~D

12

PC418

0.1U_0603_25V7K~D

PAD-OPEN 4x4m

@

+B+

2 2

PR436

0_0402_5%~D

SUSP#25,26,29,37,44,47

PR434

PR434 300_0603_5%~D

+5VALW

3 3

VCCP Thermal Desig Current=11.6A Peak Current=14A

4 4

OCP min=17A Fsw=298KHz

<Vo=1.05V> VFB=0.75V Vo=VFB*(1+PR430/PR433)=0.75*(1+8.66K/21.5K)=1.052V

300_0603_5%~D

1 2

12

PR423

30.1K_0402_1%~D

12

PC400

1U_0603_10V6K~D

21.5K_0402_1%~D

12

PC404

.1U_0402_16V7K~D

@

12

PR433

12

PC405

47P_0402_50V8J~D

12

@

PR430

8.66K_0402_1%~D

12

TON_VCCP

V5FILT_VCCP

FB_VCCP

2

3

4

5

6

http://laptop-motherboard-schematic.blogspot.com/

A

EN_VCCP

PU28

TON

VOUT

V5FILT

VFB

PGOOD

PR429

267K_0402_1%~D

1 2

15

1

TP

EN_PSV

GND7PGND

8

B

PR424

BST_VCCP

1 2

0_0603_5%~D

14

VBST

V5DRV

TPS51117RGYR_QFN14_3.5x3.5

UG_VCCP

13

DRVH

LX_VCCP

12

LL

TRIP_VCCP

11

TRIP

V5DRV_VCCP

10

LG_VCCP

9

DRVL

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1 2

PC395 0.1U_0603_25V7K~DPC395 0.1U_0603_25V7K~D

PR435

1 2

14.7K_0402_1%~D

+5VALW

12

PR431

PR431 0_0603_5%~D

0_0603_5%~D

12

PC396

4.7U_0805_10V6K~D

Compal Secret Data

2008/2/5 2008/6/05

Compal Secret Data

578

5

4

Deciphered Date

C

3 6

241

786

123

PQ105

PQ105 AO4466_SO8

AO4466_SO8

PQ106

AO4710_SO8

4

PL33

1UH_PCMB103E-1R0MS_20A_20%

786

5

PQ109

1 2

AO4710_SO8

123

PL33

1 2

PR432

4.7_1206_5%~D@

PC403

PC403 680P_0603_50V8J~D@

680P_0603_50V8J~D@

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sh eet

LA-4671P

Friday, February 20, 2009

PC399

+VCCP

1

+

2

220U_D2_4VM

D

+VCCPP

PC402

12

4.7U_0805_6.3V6K~D

of

42 53

1.0Custom

A

1 1

B

C

+1.8VP_B++

D

PJP29

12

PC411

10U_1206_25V6M~D

12

PC409

10U_1206_25V6M~D

PC419

2200P_0402_50V7K~D

PAD-OPEN 4x4m

@

12

PC420

@

0.1U_0603_25V7K~D

+B+

2 2

PR446

0_0402_5%~D

PR444

PR444 300_0603_5%~D

300_0603_5%~D

1 2

0_0402_5%~D

12

PR437

30.1K_0402_1%~D

12

PC410

1U_0603_10V6K~D

21.5K_0402_1%~D

12

PC414

.1U_0402_16V7K~D

@

12

PR443

12

PC415

47P_0402_50V8J~D

12

@

PR441

30.1K_0402_1%~D

TON_1.8

V5FILT_1.8

FB_1.8

12

2

3

4

5

6

SYSON25,26,37

+5VALW

3 3

1.8V Thermal Design Current=6.3A Peak Currnet=9A OCP min=12A

4 4

Fsw=297KHz

EN_1.8

PU29

TON

VOUT

V5FILT

VFB

PGOOD

PR439

267K_0402_1%~D

1 2

15

1

TP

EN_PSV

GND7PGND

8

PR438

BST_1.8

1 2

0_0603_5%~D

14

DRVH

TRIP

DRVL

UG_1.8

13

LX_1.8

12

LL

TRIP_1.8

11

1 2

15.8K_0402_1%~D

V5DRV_1.8

10

LG_1.8

9

VBST

V5DRV

TPS51117RGYR_QFN14_3.5x3.5

1 2

PC406 0.1U_0603_25V7K~DPC406 0.1U_0603_25V7K~D

+5VALW

PR445

12

PR440

PR440 0_0603_5%~D

0_0603_5%~D

12

PC407

4.7U_0805_10V6K~D

578

PQ107

PQ107 AO4466_SO8

AO4466_SO8

3 6

241

1UH_SIL104-1R0-R_11A_30%

786

5

PQ108

AO4710_SO8

123

1 2

4

PR442

4.7_1206_5%~D@

PC413

PC413 680P_0603_50V8J~D@

680P_0603_50V8J~D@

PL34

1 2

PC408

+1.8VP

PC412

1

12

+

2

220U_D2_4VM

4.7U_0805_6.3V6K~D

<Vo=1.8V> VFB=0.75V Vo=VFB*(1+PR441/PR443)=0.75*(1+30.1K/21.5K)=1.8V Fsw=297KHz

A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

http://laptop-motherboard-schematic.blogspot.com/

B

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/2/5 2008/6/05

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

+1.8VP

Size Document Number Rev

Date: Sh eet

LA-4671P

Friday, February 20, 2009

of

43 53

D

43 53

1.0Custom

A

1 1

PR393

0_0402_5%~D

PR427

PR427 300_0603_5%~D

300_0603_5%~D

1 2

0_0402_5%~D

12

PR416

30.1K_0402_1%~D

12

PC390

1U_0603_10V6K~D

22.1K_0402_1%~D

12

PC368

.1U_0402_16V7K~D

@

12

PR425

12

PC394

47P_0402_50V8J~D

12

@

PR422

22.1K_0402_1%~D

TON_1.5

V5FILT_1.5

FB_1.5

12

2 2

3 3

SUSP#25,26,29,37,42,47

+5VALW

2

3

4

5

6

B

EN_1.5

PU27

TON

VOUT

V5FILT

VFB

PGOOD

PR420

267K_0402_1%~D

1 2

15

1

TP

EN_PSV

GND7PGND

8

PR417

BST_1.5

1 2

0_0603_5%~D

14

DRVH

TRIP

DRVL

UG_1.5

13

LX_1.6

12

LL

TRIP_1.5

11

1 2

9.09K_0402_1%~D

V5DRV_1.5

10

LG_1.5

9

VBST

V5DRV

TPS51117RGYR_QFN14_3.5x3.5

1 2

PC388 0.1U_0603_25V7K~DPC388 0.1U_0603_25V7K~D

+5VALW

PR419

12

PR418

PR418 0_0603_5%~D

0_0603_5%~D

12

PC389

4.7U_0805_10V6K~D

C

4

+1.5VSP_B++

578

3 6

241

786

5

PQ102

PQ102 AO4466_SO8

AO4466_SO8

4.7UH_SIL104R-4R7PF_5.7A_30%

PR421

4.7_1206_5%~D@

PQ103

1 2

PC393

PC393 680P_0603_50V8J~D@

680P_0603_50V8J~D@

1 2

AO4710_SO8

123

12

PC387

1 2

12

10U_1206_25V6M~D

PL32

10U_1206_25V6M~D

PC386

10U_1206_25V6M~D

12

PC421

2200P_0402_50V7K~D

PC391

PC422

0.1U_0603_25V7K~D

1

+

2

D

PJP27

PAD-OPEN 4x4m

@

12

220U_D2_4VM

PC392

4.7U_0805_6.3V6K~D

12

+1.5VSP

+B+

1.5V Thermal Design Current=2.45A Peak Current=3.5A

4 4

OCP min=5.25A Fsw=298KHz

<Vo=1.5V> VFB=0.75V Vo=VFB*(1+PR422/PR425)=0.75*(1+22.1K/22.1K)=1.5V

A

http://laptop-motherboard-schematic.blogspot.com/

B

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/2/5 2008/6/05

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

Size Document Number Rev

Friday, February 20, 2009

Date: Sh eet

LA-4671P

+1.5VSP

of

44 53

D

1.0Custom

5

4

3

2

1

D D

+B+

C C

B B

A A

PJP26

1 2

PAD-OPEN 4x4m

@

VGA_ON26

GPU_VID030

5

VGA@

12

PC424

2200P_0402_50V7K~D

PR401

22K_0402_1%~D

1 2

VGA@

+3VS

PR412

10K_0402_5%~D

VGA@

1 2

PR414

10K_0402_5%~D

VGA@

12

PC423

0.1U_0603_25V7K~D

12

PC397

0.1U_0603_25V7K~D

@

12

PC378

PC378 .1U_0402_16V7K~D

.1U_0402_16V7K~D

VGA@

12

PR415

VGA@ PR415

VGA@

12

PC369

10U_1206_25V6M~D

0_0603_5%~D

12

2.2U_0603_6.3V6K~D

12

100K_0402_5%~D

VGA_B++

VGA@

12

PC370

10U_1206_25V6M~D

2

G

1

PC385

VGA@

PC385

VGA@

2

0.01U_0402_16V7K~D

12

PR426

VGA@

PC373

VGA@

http://laptop-motherboard-schematic.blogspot.com/

VGA_PWGOD37

VIN_VGA

6268_VGA

EN_VGA

12

PC379

VGA@

12

PR410

8.45K_0402_1%~D

VGA@

13

D

PQ101

PQ101 BSS138W-7-F_SOT323~D

BSS138W-7-F_SOT323~D

VGA@

S

4

COMP_VGA

33P_0402_50V8J~D

6268_VGA

VGA@

PR394

10K_0402_1%~D

8

PU26

GND

3

VIN

4

VCC

5

EN

COMP6FB7FSET

12

PR403

22.1K_0402_1%~D

VGA@

12

PC381

2200P_0402_25V7K~D

VGA@

PR407

PR407 0_0402_5%~D

0_0402_5%~D

VGA@

PC383

PC383 820P_0402_50V7K~D

820P_0402_50V7K~D

@

12

2

ISL6268CAZ-T_SSOP16

Security Classification

THIS SHEET OF ENGINEERING DRAWING I S THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING I S THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1

PHASE

PGOOD

VGA@

9

FSET_VGA

12

PR404

VGA@

40.2K_0402_1%~D

12

GPU_VID130

Issued Date

PHASE_VGA

BOOT_VGA

15

16

UG

BOOT

VO

10

12

PR395

1 2

0_0603_5%~D

VGA@

PVCC

PGND

ISEN

+5VALW

VGA@

14

2.2U_0603_6.3V6K~D

13

LG

12

ISEN_VGA

11

PC380

0.01U_0402_25V7K~D

VGA@

+3VS

PR409

10K_0402_5%~D

@

1 2

10K_0402_5%~D

2008/2/5 2008/06/05

3

UG_VGA

1 2

PC371 0.1U_0603_25V7K~D

12

PR396

PR396 0_0603_5%~D

0_0603_5%~D

PR397

4.7_0603_5%

1 2

VGA@

PC372

PVCC_VGA

1 2

LG_VGA

1 2

PR400

4.22K_0402_1%~D

VGA@

12

PR411

12

@

PR413

@ PR413

@

VGA@

6268_VGA

VGA@

FB_VGA

2

G

1

PC384

2

@

0.01U_0402_16V7K~D

100K_0402_5%~D

0.01U_0402_16V7K~D

Compal Secret Data

Deciphered Date

4

PQ99

FDMS8670S_MLP8

3 5

241

VGA@ PQ99

VGA@

12

PR408

@PR408

@

11.3K_0402_1%~D

13

D

PQ100

@

PQ100

@

BSS138W-7-F_SOT323~D

S

123 5

AP

3 5

241

2

+VGA_COREP Thermal Design Current=12.929A Peak Current=18.47A OCP min=22.164A Fsw=300KHz

PQ98

VGA@

FDMS8692_POWER56-8-5

0.56UH_MPC1040LR56_23A_20%

PR399

4.7_1206_5%~D@

1 2

PC377

PC377 680P_0603_50V8J~D@

680P_0603_50V8J~D@

PQ104

1 2

FDMS8670S_MLP8

VGA@ PQ104

VGA@

12

PR406

@PR406

@

0_0402_5%~D

12

PC382

PC382 820P_0402_50V7K~D

820P_0402_50V7K~D

@

0.89V 1.00V GPU_VID_0 0 1

PL31

1 2

1

+

PC374

PC375

2

220U_X_2VMVGA@

12

PR398

PR398 10_0402_1%~D

10_0402_1%~D

VGA@

1 2

PR428

PR428 0_0402_5%~D

0_0402_5%~D

VGA@

1 2

PR402

1.5K_0402_1%

VGA@

12

PR405

VGA@PR405

VGA@

3.09K_0402_1%~D

Compal Electronics, Inc.

Title

Size Document Number Rev

Friday, February 20, 2009

Date: Sheet

+VGA_COREP

LA-4671P

1

+

PC416

2

220U_X_2VMVGA@

NVVDD_SENSE 32

45 53

1

+VGA_COREP

PC376

12

VGA@

4.7U_0805_6.3V6K~D

of

1.0

5

@

D D

PR157

499_0402_1%~D

VGATE7,19,26

H_PSI#5

POW_MON 26

C C

PR165 4.22K_0402_1%@PR165 4.22K_0402_1%@

VR_TT#

1 2

PC1471U_0603_10V6K~D PC1471U_0603_10V6K~D

1 2

PR164 147K_0402_1%~DPR164 147K_0402_1%~D

1 2

PH2

1 2

100K_0603_1%_TH11-4H104FT@

1 2

PC1280.015U_0402_16V7K@ PC1280.015U_0402_16V7K@

PR166 11.5K_0402_1%~DPR166 11.5K_0402_1%~D

1 2

PC131

1000P_0402_50V7K~D

1 2

PR169 8.25K_0402_1%~DPR169 8.25K_0402_1%~D

1 2

DPRSLPVR7,19

H_DPRSTP#5,7,18

CLK_EN#

+3VS

PR156

1 2

PR181 10K_0402_1%~DPR181 10K_0402_1%~D

1 2

PC1290.068U_0603_50V7K~D PC1290.068U_0603_50V7K~D

1 2

12

1.91K_0402_1%~D

RBIAS_CPU

NTC_CPU

SOFT_CPU

OCSET_CPU

1 2

PC132 1000P_0402_50V7K~DPC132 1000P_0402_50V7K~D

PR175 97.6K_0402_1%~DPR175 97.6K_0402_1%~D

1 2

B B

PR184

@ PR184

@

100K_0402_1%~D

VCCSENSE5

PC137 100P_0402_50V8J~DPC137 100P_0402_50V8J~D

12

PR177

1 2

PR179 1K_0402_1%~DPR179 1K_0402_1%~D

VSSSENSE5

PC134 270P_0402_50V7K~DPC134 270P_0402_50V7K~D

1 2

PC138 2200P_0402_50V7K~DPC138 2200P_0402_50V7K~D

100_0402_1%~D

1 2

PR180 0_0402_5%~DPR180 0_0402_5%~D

12

1 2

PR143 499_0402_1%~DPR143 499_0402_1%~D

PR144 0_0402_5%~DPR144 0_0402_5%~D

PR145 0_0402_5%~DPR145 0_0402_5%~D

1 2

PR154 0_0402_5%~DPR154 0_0402_5%~D

1 2

12

PC121

1U_0603_10V6K~D

1

PGOOD

2

FB2_CPU

PSI#

3

PMON

4

RBIAS

5

VR_TT#

6

NTC

7

SOFT

8

OCSET

9

VW

10

COMP

11

FB

12

FB2

PMON_CPU

VW_CPU

COMP_CPU

FB_CPU

12

PR176

PR176 1K_0402_1%~D

1K_0402_1%~D

PC140 330P_0402_50V7K~DPC140 330P_0402_50V7K~D

1 2

12

PC141

PC141 330P_0402_50V7K~D

330P_0402_50V7K~D

@

1 2

PR183 0_0402_5%~DPR183 0_0402_5%~D

PC143 180P_0402_50V8J~DPC143 180P_0402_50V8J~D

1 2

PR186 1K_0402_1%~DPR186 1K_0402_1%~D

VCC_PRM

PC145

A A

PC145

0.22U_0603_16V7K~D

4

PC112

12

5600P_0402_25V7K

CLK_EN#_CPU

DPRSTP#_CPU

3V3_CPU

48

GND

46

47

3V3

CLK_EN#

DPRSTP#

49

CPU_VID6

VR_ON

12

PR153

PR146 0_0402_5%~DPR146 0_0402_5%~D

0_0402_5%~D

VID6

VR_ON_CPU

DPRSLPVR_CPU

44

45

43

VID6

VR_ON

DPRSLPVR

ISL6266ACRZ-T_QFN48_7X7

26

CPU_VID3

CPU_VID45CPU_VID2

CPU_VID5

12

PR149 0_0402_5%~DPR149 0_0402_5%~D

PR147 0_0402_5%~DPR147 0_0402_5%~D

PR148 0_0402_5%~DPR148 0_0402_5%~D12PR150 0_0402_5%~DPR150 0_0402_5%~D

VID5

VID4

VID3

40

41

42

VID4

VID5

5

12

VID2

VID239VID3

VDIFF13VSEN14RTN15DROOP16DFB17VO18VSUM19VIN20GND21VDD22ISEN223ISEN1

VDD_CPU

VDIFF_CPU

DROOP_CPU

VSEN_CPU

RTN_CPU

12

PC142

0.01U_0402_25V7K~D

1 2

PR187 3.57K_0402_1%~DPR187 3.57K_0402_1%~D

PC144 0.068U_0603_50V7K~NPC144 0.068U_0603_50V7K~N

PC146 0.22U_0603_10V7K~DPC146 0.22U_0603_10V7K~D

12

DFB_CPU

1 2

12

VIN_CPU

12

PC139

0.1U_0603_25V7K~D

VSUM

12

PR185

12

1 2

PR182

11K_0402_1%~D

5

12

VID1

38

PC136

PC136 1U_0603_10V6K~D

1U_0603_10V6K~D

PR178

10_0603_5%~D

5

CPU_VID0

CPU_VID1

12

PR151 0_0402_5%~DPR151 0_0402_5%~D

PR152 0_0402_5%~DPR152 0_0402_5%~D

VID0

37

VID0

VID1

36

BOOT1

35

UGATE1

34

PHASE1

33

PGND1

32

LGATE1

31

PVCC

30

LGATE2

29

PGND2

28

PHASE2

27

UGATE2

26

BOOT2

25

NC

PU11

24

29.1

ISEN1 ISEN2

1 2

PR174 1_0603_5%~DPR174 1_0603_5%~D

12

2.61K_0402_1%~D

PH3

10KB_0603_ERTJ1VR103J

1 2

5

BOOT_CPU1

UGATE_CPU1

PHASE_CPU1

LGATE_CPU1

PVCC_CPU

BOOT_CPU2

2.2_0603_5%~D

+CPU_B+

2.2_0603_5%~D

LGATE_CPU2

PHASE_CPU2

PR167

1 2

+5VS

3

12

PC118

PC117

0.01U_0402_25V7K~D

0.22U_0603_10V7K~D

PR155

1 2

FDS6676AS_SO8

UGATE_CPU2

PC130

1 2

0.22U_0603_10V7K~D

12

PC119

1U_0603_10V6K~D

PC122

0.01U_0402_25V7K~D

1 2

PQ44

PQ47

FDS6676AS_SO8

+5VS

1 2

12

5

4

PR142

PR142 1_0603_5%~D

1_0603_5%~D

PC120

1U_0603_10V6K~D

D8D7D6D

S1S2S3G

5

D8D7D6D

S1S2S3G

4

SI7686DP-T1-E3_SO8

PQ43

3 5

241

5

D8D7D6D

PQ45

S1S2S3G

4

FDS6676AS_SO8

3 5

241

5

D8D7D6D

S1S2S3G

4

FDS6676AS_SO8

2

12

PC114

@

10U_1206_25V6M~D

12

PR158

12

PC123

SI7686DP-T1-E3_SO8

PQ46

12

PQ48

12

PC116

PC115

10U_1206_25V6M~D

PR159

4.7_1206_5%~D

680P_0603_50V8J~D

12

PR168

4.7_1206_5%~D

PC133

PC133 680P_0603_50V8J~D

680P_0603_50V8J~D

PR159

12

PC151

PC150

2200P_0402_50V7K~D

+CPU_B+

1

+

PC113

2

220U_25V_M

12

PR160

3.65K_1206_1%

3.65K_1206_1% 10K_0402_1%~D

10K_0402_1%~D

VSUM

ISEN1

0.22U_0603_16V7K~D

12

PC125

10U_1206_25V6M~D

0.1U_0603_25V7K~D

12

PR171

PR170

3.65K_1206_1%

10K_0402_1%~D

VSUM

0.22U_0603_16V7K~D

12

PL14

0.36UH_SF-I104-R36_23A_20%

4

3

PR162 0_0402_5%~D@PR162 0_0402_5%~D@

1 2

PC124

1 2

12

PC148

PC149

2200P_0402_50V7K~D

1

2

12

PR161

1_0402_5%~D

VCC_PRM

+CPU_B+

12

PC127

PC126

@ PC127

@

10U_1206_25V6M~D

PL15

0.36UH_SF-I104-R36_23A_20%

1 2

PC135

1 2

1

2

12

PR172

1_0402_5%~D

VCC_PRM

4

3

12

PR173 0_0402_5%~D@PR173 0_0402_5%~D@

ISEN2

Fsw=290KHz

1

PL13

FBMA-L18-453215-900LMA90T_1812

0.1U_0603_25V7K~D

PL13

1 2

+CPU_CORE

+B+

Security Classification

2007/1/15 2008/6/05

Issued Date

THIS SHEET OF ENGINEERING DRAWING I S THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING I S THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

http://laptop-motherboard-schematic.blogspot.com/

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/1/15 2008/6/05

3

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

+CPU_CORE

LA-4671P

1.0

46 53Friday, February 20, 2009

of

1

of

5

D D

C C

PR315

SUSP#25,26,29,37,42,44

B B

1 2

0_0402_5%~D

VGA@

EN_1.1

12

PC269

PC269 .1U_0402_16V7K~D

.1U_0402_16V7K~D

@

6

PU19

POK

EN

VIN

VOUT

VCNTL

VOUT

FB

VIN

GND

1

APL5913-KAC-TRL_SO8~DVGA@

7

8

4

+1.5VS+5VALW

PJP16

2

JUMP_43X118@

FB_1.1

1

12

VGA@

PR316

1K_0402_1%~D

12

2

1

VGA@

PC264

4.7U_0805_6.3V6K~D

12

0.01U_0402_25V7K~D

PR319

VGA@

2.61K_0402_1%~D

PC265

VGA@

12

PC266

VGA@

10U_0805_6.3V6M~D

12

VGA@

PC263

1U_0603_10V6K~D

VIN_1.1

5

3

4

2

9

3

+1.1V_GFX_PCIEP

2

+1.8V

1

PJP17

1

JUMP_43X118@

2

12

PC267

1K_0402_1%~D

4.7U_0805_6.3V6K~D

PR318

0_0402_5%~D

SUSP29,37

1 2

PC272

.1U_0402_16V7K~D

@

13

2

G

12

PQ78

RHU002N06_SOT323-3

D

S

12

PR317

12

PR320

1K_0402_1%~D

VIN_0.9

VREF_0.9

PC270

.1U_0402_16V7K~D

12

PU20

VIN1VCNTL

2

GND

3

VREF

4

VOUT

APL5331KAC-TRL_SO8~D

+0.9VSP

12

PC271

10U_0805_6.3V6M~D

6

5

NC

7

NC

8

NC

9

TP

1

+3VALW

12

PC268

4.7U_0805_6.3V6K~D

1.1V_GFX_PCIEP Thermal Design Current=1.61A Peak Currnet=2.3A OCP min=2.76A

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

http://laptop-motherboard-schematic.blogspot.com/

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2005/10/1 2008/6/05

Compal Secret Data

Deciphered Date

2

0.9VSP Thermal Design Current=0.7A Peak Currnet=1A OCP min=1.2A

Compal Electronics, Inc.

Title

+0.9VSP/ +1.1V_GFX_PCIEP

Size Document Number Rev

Friday, February 20, 2009

Date: Sheet

LA-4671P

1.0Custom

47 53

1

47 53

1.0Custom

of

5

D D

BATT+

PL28

SMB3025500YA_2P

BATT+

1 2

12

PC278

0.01U_0402_25V7K~D

PC288

100P_0402_50V8J~D

PJPB1 battery connector

60$57

60$5760$57 %DWWHU\

%DWWHU\

%DWWHU\%DWWHU\

C C

%$7

%$7%$7 %$7

%$7

%$7%$7 ,'

,'

,',' %,

%,

%,%, 76

76

7676 60'

60'

60'60' 60&

60&

60&60& *1'

*1'

*1'*1' *1'

*1'

*1'*1'

BATT++

12

PC279

PC279 1000P_0402_50V7K~D

1000P_0402_50V7K~D

PJP19

11

GND

10

GND

SUYIN_200275MR009G186ZL@

9 8 7 6 5 4 3 2 1

BATT++

12

PC289

100P_0402_50V8J~D

9 8 7 6 5 4 3 2 1

3cell/4cell#

+3VALWP

1 2

PR328

100_0402_5%~D

1 2

PR329

100_0402_5%~D

4

+3VALWP

PD12

@

DA204U_SOT323~D

PR324

PR324 47K_0402_5%~D

47K_0402_5%~D

3cell/4cell# 4 0

2

3

1

BATT_B/I

PD13

DA204U_SOT323~D

@

BATT_SMD

BATT_SMC

PR326

1K_0402_5%~D

EC_SMB_DA1 26

EC_SMB_CK1 26

3

2

3

1

3

PD14

DA204U_SOT323~D

1

@

2

3

PD15

DA204U_SOT323~D

1

@

2

Battery Connect/OTP

1

Place clsoe to EC pin

BATT_TEMP

1 2

PR325

1K_0402_5%~D

12

1 2

PR327

6.49K_0402_1%~D

PC280

PC280 .1U_0402_16V7K~D

.1U_0402_16V7K~D

1 2

@

+3VALWP

BATT_TEMP 26

CPU

PH4 under CPU botten side :

CPU thermal protection at 90 +-3 degree C Recovery at 50 +-3 degree C

BATT+

12

PR330

PR330 453K_0402_1%~D

0.01U_0402_25V7K~D

453K_0402_1%~D

12

PR332

499K_0402_1%~D

BATT_IN

12

PR337

86.6K_0402_1%

PC283

1000P_0402_50V7K~D

B B

BATT_OUT

1 2

PR354

BATT_OVP26

PR354

10K_0402_1%~D

7

PU22B

0

VS

8

LM358ADR_SO8

5

P

+

6

-

G

4

12

PC282

VL VS

12

CPU

12

PR331

10.7K_0402_1%~D

PR335

61.9K_0402_1%~D

OTP_IN OTP_IN+

61.9K_0402_1%~D

1 2

VL

PR336

12

PH4

PH4 100K_0603_1%_TH11-4H104FT

100K_0603_1%_TH11-4H104FT

PR336

150K_0402_1%~D

PR338

PR333

147K_0402_1%~D

1 2

OTP_IN-

12

8

3

P

+

0

2

-

G

PU22A

4

LM358ADR_SO8

PC284

PC284 1U_0603_10V6K~D

1U_0603_10V6K~D

PC281

0.1U_0603_25V7K~D

1 2

OTP_OUT

1

1 2

VL

1 2

PD11

1SS355_SOD323-2

PR334

PR334 205K_0402_1%~D

205K_0402_1%~D

MAINPWON 41

LI-3S :13.5V----BATT-OVP=1.5V

A A

5

BATT-OVP=0.111*BATT+

Security Classification

Issued Date

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

http://laptop-motherboard-schematic.blogspot.com/

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2005/10/1 2008/6/05

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

BATTERY CONN

Size Document Number Rev

Date: Sheet

LA-4671P

Friday, February 20, 2009

48 53

of

1

of

1.0Custom

5

5HTXHVW

,WHP

,WHP ,VVXH'HVFULSWLRQ

,WHP,WHP

D D

C C

B B

3DJH 7LWOH

3DJH3DJH

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

40

41

42

44

46

43

45

47

48

7LWOH

7LWOH7LWOH

Charger Common circuit design modify add PR262 between +3VALW and PU15.11

+3VALWP,+5VALWP Common circuit design modify add PC216,PC217 between TPS51427+B+ and GND

+1.8VP +1.8V no power issue in S3 mode change PR440.1,PR444.1 POWER source from +5VS to +5VALW

+VGA_COREP Common circuit design modify add PC423,PC424 between VGA_B++ and GND

+VCCP Common circuit design modify

+1.5VSP Common circuit design modify

+CPU_CORE Common circuit design modify

+VGA_COREP

'DWH

'DWH'DWH

08/12/17

08/12/22

08/12/22 COMPAL Relink data base Relink data base for PQ98

5HTXHVW5HTXHVW 2ZQHU

2ZQHU

2ZQHU2ZQHU

4

9HUVLRQ&KDQJH/LVW3,5/LVW

9HUVLRQ&KDQJH/LVW3,5/LVW9HUVLRQ&KDQJH/LVW3,5/LVW

,VVXH'HVFULSWLRQ'DWH

,VVXH'HVFULSWLRQ,VVXH'HVFULSWLRQ

COMPAL

Common circuit design modify add PC290,PC291 between ADPIN and GNDDCIN/Precharge 08/12/17

Common circuit design modify add PR204 between VS and PD3.1

Common circuit design modify change PR224.1 POWER source from VREF into +3VALW

Wrong net name issue change PU16.1 net name from 2VREF_ISL6237 to 2VREF_TPS51427

Common circuit design modify add PC419,PC420 between +1.8VP_B++ and GND

Change VID require change PR410 to 5.62K ohm

Change VID require reserve PQ100,PR406,PC382,PR408,PC384,PR413,PR411,PR409

Common circuit design modify change PR409.2,PR412.2 POWER source from +5VS to +3VS

Common circuit design modify change 396.1 POWER source from +5VS to +5ALW

Common circuit design modify

Common circuit design modify reserve PR184 between PU11.11 and GND

Change VID require change PR410 to 8.45K ohm

3

2

3DJH

3DJH3DJH

6ROXWLRQ'HVFULSWLRQ

6ROXWLRQ'HVFULSWLRQ 5HY

6ROXWLRQ'HVFULSWLRQ6ROXWLRQ'HVFULSWLRQ

reserve PR261 between PU15.10 and PU15.11Common circuit design modify

add PC417,PC418 between VCCP_B++ and GND

change PR434.1,PR431.1 POWER source from +5VS to +5ALW

add PC421,PC422 between +1.5VSP_B++ and GND

change PR427.1,PR418.1 POWER source from +5VS to +5ALW

add PC148,PC149,PC150,PC151 between +CPU_B+ and GND

add PR176 between PU11.12 and PU11.13

1

5HY3DJH

5HY5HY

24

25

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

http://laptop-motherboard-schematic.blogspot.com/

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2007/1/15 2008/6/05

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

PW PIR-1

LA-4671P

1.0

49 53Friday, February 20, 2009

1

1.0

of

5

,WHP

,WHP ,VVXH'HVFULSWLRQ

,WHP,WHP

D D

C C

B B

3DJH 7LWOH

3DJH3DJH

1

P10 Cantiga(4/6)-PWR 12/15/2008 EE DIS can not boot issue

2

P17 ICH9(1/4)-PCI/INT 12/15/2008 EE PCI reset and PLT reset connect error change R1112 pin 1 net name from PLT_RST# to PCI_RST# X02

3

P24 Codec 92HD81B 12/15/2008 EE Internal MIC no function issue add a 2.49K ohm pull high resistor (R315) to +5VS at SENSE_A X02

4

P27 PWR_OK/BTN/TP 12/15/2008 EE CAP sensor no function issue SWAP JFN1 pin 6 and pin 7 signals X02

5

P27 PWR_OK/BTN/TP 12/15/2008 EE Battery only can not boot issue

6

P19 ICH9(3/4)_DMI,USB,GPIO,PCIE 12/15/2008 EE part change to consistent with 13" and 15" Change Q106 to SSM3K7002FU_SC70-3 and add Q107 X02

7

P26 BIOS & EC I/O Port 12/15/2008 EE X02

P23 WLAN/BT/FP 12/16/2008 EE WLAN card S3/S4 resume fail issue and add wake on LAN function

8

9

P10 Cantiga(4/6)-PWR 12/16/2008 EE X02

P26 BIOS & EC I/O Port 12/16/2008 EE X02follow 13"/15" design unpop R77 R78

10

P21 Gigabit LAN_RTL8111DL 12/16/2008 EE X02follow 13"/15" design Change C1484, C1485 from 0.1uF to 1uF

11

P10 Cantiga(4/6)-PWR 12/16/2008 EE change R69 to L15 X02

12

P24 Codec 92HD81B 12/16/2008 EE vendor (IDT) request unpop C260 C262 X02

13

P22 HDD/CDROM 12/17/2008 ME For ODD CONN SMT issue Change part of JSATA2 X02

14

P34 P35 NVG94 External GDDR3 12/17/2008 EE Change Q135 Q136 to SSM3K7002FU_SC70-3 X02

15

P29 OZ129_Card Reader / 1394 12/19/2008 EE For Card Reader / 1394 issue add a LDO (U65) for +1.8VS_CB X02

16

P16 CRT CONN/LCD CONN 12/19/2008 EE U29 pin 21 (INVT_PWM) broken issue add a ESD diode(D51) to INVT_PWM close to JLCD1 X02

17

18

19

P7 Cantiga(1/6)-AGTL/DMI/DDR 12/22/2008 EE 13"/15" system hang with some special CPUs issue Reserve 0.1uF Cap. C141 at H_DPRSTP# close to MCH X02

20

P38 Screws 12/22/2008 ME ME change ODD connector and change screw holes remove H14 X02

21

22

P18 ICH9(2/4)_LAN,HD,IDE,LPC 12/23/2008 change C1211 from 15pF to 12pF X02EE crystal vendor suggestion23

P23 WLAN/BT/FP 12/23/2008 change D22, D62 to SC300000O00 X02EE ESD team request

24

P24 Codec 92HD81B 12/23/2008 change D19, D20, D21, D27 to SCA00000T00 X02EE ESD team request

25

P27 PWR_OK/BTN/TP 12/23/2008 change D63 D24 to SC300000O00 X02EE ESD team request

26

27

28

29

30

P29 OZ129_Card Reader / 1394 01/05/2009 EE customer suggestion change LDO output to 1.95V X02

31

32

7LWOH

7LWOH7LWOH

Gigabit LAN_RTL8111DL 12/19/2008 EEP21 crystal vendor suggestion

PWR_OK/BTN/TP 12/23/2008P27 EE ESD team request

WLAN/BT/FP 12/23/2008P23 EE ESD team request add a 1000pF cap C414 at +3VS close to JCA1 X02

USB/ESATA/1394 CONNP28 12/24/2008 EE follow 13"/15" schematic

'DWH

'DWH'DWH

12/22/2008GMCHP07~P12 X02change GMCH from A1 version to B3GMCH revision changeEE

12/23/2008USB/ESATA/1394 CONNP28 X02change D58 D59 D60 to SC300000O00ESD team requestEE

4

9HUVLRQ&KDQJH/LVW3,5/LVW

9HUVLRQ&KDQJH/LVW3,5/LVW9HUVLRQ&KDQJH/LVW3,5/LVW

5HTXHVW

5HTXHVW5HTXHVW 2ZQHU

2ZQHU

2ZQHU2ZQHU

Add wake on LAN feature

EE12/19/2008OZ129_Card Reader / 1394P29 X02change X3 bypass CAP. C1781 C1785 from 15pF to 18pFcrystal vendor suggestion

,VVXH'HVFULSWLRQ'DWH

,VVXH'HVFULSWLRQ,VVXH'HVFULSWLRQ

3

2

3DJH

3DJH3DJH

6ROXWLRQ'HVFULSWLRQ

6ROXWLRQ'HVFULSWLRQ 5HY

6ROXWLRQ'HVFULSWLRQ6ROXWLRQ'HVFULSWLRQ

a. change L13 L14 BOM structure from "UMA@" to "@" b. change R1400 R1401 BOM structure to "UMA@"

The breakdown voltage of D63 is too low now. Change D63 back to old part.

change PCIE wake up signal connection to support wake up on LAN/WLAN feature.

Add Q129 and net WLANPW_DIS# to switch +3V_WLAN power from +3VALW unpop R412, R415

change R101 from 0603 to 0805 sizefollow 13"/15" design

change Y9 from CL=20pF to CL=12pF change C1488=18pF, C1489=15pF

change L10, L23 from 301T to 801T pop C27, C28

change R155 R1257 R1262 R1267 from 30K to 470 ohm un-pop R1255 R1260 R1264 R1269

1

5HY3DJH

5HY5HY

X02

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

http://laptop-motherboard-schematic.blogspot.com/

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2007/1/15 2008/6/05

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

EE PIR-1

LA-4671P

1.0

50 53Friday, February 20, 2009

1

1.0

of

A

LBM71!QPXFS!VQ!TFRVFODF

LBM71!QPXFS!VQ!TFRVFODFLBM71!QPXFS!VQ!TFRVFODF

ACIN/BATT-IN

51ON# (only BATT-IN)

5VALW/3VALW

RSMRST#

Suspend Clock (32KHz) ICH9 internal clock

A A

This signal is asserted high when both SLP_S3# and VRMPWRGD are high

SUSCLK

ON/OFF#

EC_ON

PWRBTN_OUT#

SYSON#

1.8V

SLP_S5#

SLP_S4#

SLP_S3#

+1.5VS

+0.9VS

CPU_CORE

CK_PWRGD

CLK_MCH_BCLK

ICH_PWROK

PCI_RST#

H_PWRGOOD

H_RESET#

ĸĺ

644ms

SUSP#

+5VS

+3VS

VCCP

VR_ON

VGATE

126ms

ĺĸ

864us

ĸĺ

ĸ

1.59ms

244ms

ĺĸ

360ms

ĺ

ĸĺ

ĺĸ

ĸ

2.74ms

250ms

ĺĸ

ĸ

30.6us

ĺ

3.88s

30us

ĺĸ

ĺ

888us

ĸ

ĺ

104us

112us

ĸĺ

ĺĸ

2.02ms

ĺĸ

1.46ms

ĸĺ

24.1ms

ĸĺ

1.20ms

ĸ

ĺ

5.26ms

ĺ

ĸ

1.03ns

ĸĺ

114ms

ĸĺ

1.20ms

ĸĺ

1.06ms

ĺ

ĸ

2.20ms

ĺĸ

Title

Power Se quence

Size Docu ment Numbe r Rev

LA-4671P 1.0

Custom

LA-4671P 1.0

Custom

LA-4671P 1.0

http://laptop-motherboard-schematic.blogspot.com/

A

Custom

Date: Sheet

of

51 53Friday, February 20, 2009

of

51 53Friday, February 20, 2009

of

51 53Friday, February 20, 2009

5

4

3

2

1

+B

ADAPTER

D D

VGA_ON

MAINPWON

+PWR_SRC

INVERTER

ISL6268CAZ-T +VGA_COREP

(PU26)

TPS51427

(PU16)

(0.9V~1.17V)

+5V_ALWP +5V_ALW

+15V_ALW

BATTERY

RT9711PS (U12~U15)

+USB_AS

SI4800DY

(U40)

CHARGER

SI4800DY

(U39)

+5VS

+3VS

C C

ALWON

MAINPWON

SN0608098

(PU2)

TPS51427

(PU16)

+3.3V_ALW

+3.3V_ALWP

SI2301BDS-T1-E3

(Q6)

+LCDVDD

SI3456BDV-T1-E3

(Q128)

EN_WOL#

SUSON

B B

SUSP#

A A

SUSUP#

ISL6266ACRZ-T

(PU11) +VCC_CORE

TPS51117RGYR

(PU29)

+1.8VP

TPS51117RGYR

(PU27)

+1.5VSP

TPS51117RGYR

(PU28)

+VCCP

APL5331KAC-TRL (PU20)

+0.9VSP

APL5913-KAC-TRL (PU19)

+1.1V_GFX_PCIEP

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

http://laptop-motherboard-schematic.blogspot.com/

4

3

2

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

Power Rails

LA-4671P

1.0

52 53Friday, February 20, 2009

1

1.0

of

5

G16

ICH_SMBCLK

ICH_SMBDATA

A13

D D

ICH9-M

2.2K

4

3

2

1

2.2K

+3VALW

2N7002

2.2K

MEM_SDATA

MEM_SCLK 197

+3VS

195

SMBUS Address [A0]JDIMMA

195

197

JDIMMB

SMBUS Address [TBD]

32

Mini-Express Card

30

C C

SMBUS Address [TBD]

4.7K

EC_SMB_CK1 7

77

78

EC_SMB_DA1

+5VALW

100 ohm

6

SMBUS Address [16]BATT CONN

100 ohm

KBC

+3VS

B B

KB926

4.7K

EC_SMB_CK2

EC_SMB_DA2

0K

7980EC_SMB_CK2

4.7K

EC_SMB_DA2

A A

5

http://laptop-motherboard-schematic.blogspot.com/

+3VS

EC_SMB_CK2

EC_SMB_DA2

4

3

8

7

External Thermal sensor

+3.VS

E2

VGA

E1

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SMBus Topology

LA-4671P

1.0

53 53Friday, February 20, 2009

1

1.0

of

Dell 1720 Schematics

Specifications and Main Features

Frequently Asked Questions

User Manual