Dell 14R Schematics

5

D D

4

3

2

1

DJ1 Montevina UMA Schematics Document

uFCPGA Mobile Penryn

C C

Intel GM45+ICH9M

2010-02-10

REV : A00

B B

DY : Nopop Component

A A

5

4

3

2

DJ1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

DJ1 Montevina UMA

Taipei Hsien 221, Taiwan, R.O.C.

Cover Page

1

of

188Wednesday, February 24, 2010

A00

5

4

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1

DJ1 Montevina UMA Block Diagram

Project code : 91.4EK01.001

Intel Mobile CPU

D D

C C

Clock Generator

SLG8SP513VTR

7

CRT

LCD

55

54

RGB CRT

LVDS(Dual Channel)

DMIx4 C-LINK

Penryn

Socket P

FSB 800/1066MHz

Intel

GM45

AGTL + CPU I/F

DDR Memory I/F

External Graphics

10,11,12,13,14,15

Intel

8,9

DDRIII 800/1066 Channel A

DDRIII 800/1066 Channel B

SATA

ICH9-M

CardReader

SD/MMC/MS/ MS Pro/xD

B B

MIC IN

Internal Analog MIC

HP1

70

60

Realtek RTS5138

Azalia CODEC

IDT 92HD79B1

32

30

USB2.0

AZALIA

USB 2.0/1.1 ports (12)

PCI Express ports (8)

High Definition Audio

SATA ports (4)

LPC I/F

ACPI 1.1

PCI/PCI BRIDGE

20,21,22,23

PCIE

USB 2.0

PCB P/N : 48.4EK06.0SA Revision : 09275-SA

DDRIII 800/1066

PCIE x 2

USB 2.0 x 1

LPC Bus

Slot 0

Slot 1

I/O Board

Connector

75

USB 2.0 x 1

USB 2.0 x 2

18

19

10/100 NIC

Mini-Card

802.11a/b/g

Left Side: USB x 1

Atheros AR8132

CAMERA

Bluetooth

Right Side: USB x 2

RJ45 CONN

54

72

63

CPU DC/DC

TPS51620

INPUTS

+PWR_SRC

OUTPUTS

+VCC_CORE

SYSTEM DC/DC

TPS51218

INPUTS

+PWR_SRC

OUTPUTS

+1.05V_VCCP

SYSTEM DC/DC

TPS51125

INPUTS

+PWR_SRC

OUTPUTS

+5V_ALW2 +3.3V_RTC_LDO +5V_ALW +3.3V_ALW +15V_ALW

SYSTEM DC/DC

TPS51116

INPUTS

+PWR_SRC

OUTPUTS

+1.5V_SUS +0.75V_DDR_VTT +V_DDR_REF

MAXIM CHARGER

BQ24745

INPUTS

+DC_IN +PBATT

26

SYSTEM DC/DC

26

INPUTS OUTPUTS

+1.5V_SUS +5V_ALW

OUTPUTS

+PWR_SRC

Switches

+1.5V_RUN +5V_RUN +3.3V_RUN+3.3V_ALW

PCB LAYER

L1: Top

L2: VCC

L3: Signal

L4: Signal

L5: GND

L6: Bottom

47

49

46

50

42

KBC

SATA

SPI

SATA

NUVOTON

NPCE781BA0DX

37

A A

2CH SPEAKER

HDD

60

5

4

ODD

5959

Flash ROM

2MB

3

62

Touch PAD

ThermalInt.

KB

67

67 25

EMC2102

Fan

58

2

39

DJ1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

DJ1 Montevina UMA

Taipei Hsien 221, Taiwan, R.O.C.

Block Diagram

1

of

288Wednesday, February 24, 2010

of

288Wednesday, February 24, 2010

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288Wednesday, February 24, 2010

A00

5

4

3

2

1

DJ1 Montevina UMA Power Block Diagram

D D

Adapter

+PWR_SRC

TPS51125

TPS51620

TPS51218

TPS51116

Charger

BQ24745

Battery

C C

+15V_ALW

46

B B

+3.3V_RTC_LDO

46

+VCHGR

+5V_ALW2

46

+5V_ALW

G547F2P81U

+5V_USB1

63

46 46

SI4800

+5V_RUN

42

G547F2P81U

+5V_USB2

63

+VCC_CORE

47

+1.05V_VCCP

49

FDS8880

+3.3V_RUN

42

50

+3.3V_ALW

+0.75V_DDR_VTT+V_DDR_REF

50

PA102

+3.3V_LAN

+1.5V_SUS

FSD8880

+1.5V_RUN

50

42

G9091

G5285T11U

RTS5159

RT9198

RTL8103T

+3.3V_CRT_LDO

15

A A

Power Shape

+LCDVDD

54

+3.3V_RUN_CARD

32

Regulator LDO Switch

5

4

3

+1.8V_NB_S0

15

2

+1.2V_LOM

DJ1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Power Block Diagram

Size Document Number Rev

A3

Date: Sheet

Power Block Diagram

DJ1 Montevina UMA

Taipei Hsien 221, Taiwan, R.O.C.

of

388Wednesday, February 24, 2010

1

A00

A

ICH SMBus Block Diagram

+3.3V_RUN

Θ

+3.3V_RUN

Θ

SRN4K7J-8-GP

ICH_SMBCLK

ICH_SMBDATA

ICH_SMBCLK

ICH_SMBDATA

ICH_SMBCLK

ICH_SMBDATA

ICH_SMBCLK

ICH_SMBDATA

DIMM 1

SCL

SDA

SMBus Address:A0

DIMM 2

SCL

SDA

SMBus Address:A4

Clock Generator

SCLK

SDATA

SMBus address:D2

Minicard WLAN

SMB_CLK

SMB_DATA

+3.3V_ALW

Θ

SRN4K7J-8-GP

ICH

SMBCLK

1 1

2 2

SMBDATA

SMB_CLK

SMB_DATA

Θ

2N7002SPT

B

NPCE781BA0DX

C

KBC SMBus Block Diagram

+5V_RUN

Θ

SRN10KJ-5-GP

TouchPad Conn.

TPDATA

TPCLK

PBAT_SMBCLK1

PBAT_SMBDAT1

Battery Conn.

CLK_SMB

DAT_SMB

BQ24745

SCL

SDA

SMBus address:12

+3.3V_RUN

Θ

SMBus address:16

SRN4K7J-8-GP

THERM_SCL

THERM_SDA

KBC

PSDAT1

PSCLK1

SCL1

SDA1

GPIO61/SCL2

GPIO62/SDA2

TPDATA

TPCLK

BAT_SCL

BAT_SDA

KBC_SCL1

KBC_SDA1

+KBC_PWR

Θ

+KBC_PWR

Θ

SRN4K7J-8-GP

SRN100J-3-GP

TPDATA

TPCLK

2N7002DW-1-GP

D

Thermal

SCL

SMBus address:7A

SDA

E

+3.3V_RUN

Θ

SRN2K2J-1-GP

Θ

2N7002DW-1-GP

C

LCD CONN

+3.3V_RUN

Θ

+5V_CRT_RUN

Θ

SRN2K2J-1-GP

Θ

DDC_CLK_CON

DDC_DATA_CON

CRT CONN

D

DJ1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiw an, R.O.C.

Taipei Hsien 221, Taiw an, R.O.C.

Title

Size Document Number Rev

A2

DJ1 Montevina UMA

Date: Sheet

Taipei Hsien 221, Taiw an, R.O.C.

SMBUS Block Diagram

488Wednesday, Feb ruary 24, 2010

E

488Wednesday, Feb ruary 24, 2010

of

A00

3 3

DDC1CLK

DDC1DATA

LDDC_CLK

LDDC_DATA

+3.3V_RUN

Θ

VGA

4 4

A

B

DDC2CLK

DDC2DATA

GMCH_DDCCLK

GMCH_DDCDATA

Θ

A

B

C

D

E

Thermal Block Diagram

1 1

DP1

H_THERMDA

SC470P50V3JN-2GP

2 2

DN1

H_THERMDC

SC470P50V3JN-2GP

THRMDA

THRMDC

CPU

Audio Block Diagram

SPKR_PORT_D_L-/L+

SPKR_PORT_D_R-/R+

HP1_PORT_B_L

HP1_PORT_B_R

Codec

2CH SPEAKERS

HP

OUT

Thermal

92HD79B1

EMC2102

DP2

DN2

EMC2102_DP2

EMC2102_DN2

SC470P50V3JN-2GP

PMBS3904-1-GP

Put between CPU and NB

HP0_PORT_A_L

HP0_PORT_A_R

VREFOUT_A_OR_F

MIC

IN

3 3

DP3

EMC2102_DP3

SC470P50V3JN-2GP

DN3

EMC2102_DN3

4 4

A

B

PMBS3904-1-GP

HW T8 sensor

PORTC_L

PORTC_R

VREFOUT_C

DJ1

Title

Size Document Number Rev

Custom

Date: Sheet

C

D

Date: Sheet

Analog MIC

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Thermal/Audio Block Diagram

DJ1 Montevina UMA

E

of

588Wednesday, February 24, 2010

of

588Wednesday, February 24, 2010

of

588Wednesday, February 24, 2010

A00

A

B

C

D

E

ICH9M Functional Strap Definitions

Signal

HDA_SDOUT

1 1

HDA_SYNC PCI Express Port Config

GNT2#/ GPIO53

GPIO20 Reserved, Rising Edge

GNT1#/ GPIO51

GNT3#/ GPIO55

2 2

GNT0#

SPI_CS1#/ GPIO58

3 3

SATALED# PCI Express Lane

SPKR

TP3

GPIO33 / HDA_DOCK_ EN# (Mobile Only)

4 4

GPIO49

SPI_MOSI (Moble Only)

Usage/When Sampled

XOR Chain Entrance / PCI Express* Port Config 1 bit 1 (Port 1-4), Rising Edge of PWROK

1 bit 0 (Port 1-4), Rising Edge of PWROK.

PCI Express Port Config 2 bit 2 (Port 5-6), Rising Edge of PWROK

of PWROK

ESI Strap (Server Only), Rising Edge of PWROK.

Top-Block Swap override. Rising Edge of PWROK.

Boot BIOS Destination Selection 1, Rising Edge of PWROK.

Boot BIOS Destination Selection 0, Rising Edge of CLPWROK.

Reversal (Lanes 1-4). Rising Edge of PWROK.

No Reboot, Rising Edge of PWROK.

XOR Chain Entrance. Rising Edge of PWROK.

Flash Descriptor Security Override Strap. Rising Edge of PWROK.

DMI Termination Voltage. Rising Edge of CLPWROK.

Integrated TPM Enable. Rising Edge of CLPWROK.

A

Allows entrance to XOR Chain testing when TP3 pulled low at rising edge of PWROK. When TP3 not pulled low at rising edge of PWROK, sets bit 1 of RPC.PC (Chipset Config Registers: Offset 224h).This signal has a weak internal pull-down.

This signal has a weak internal pull-down. Sets bit 0 of RPC.PC (Chipset Config Registers: Offset 224h)

This signal has a weak internal pull-up. Sets bit 2 of RPC.PC2 (Chipset Config Registers:Offset 0224h) when sampled low.

This signal has a weak internal pull-down. NOTE: This signal should not be pulled high

Tying this strap low configures DMI for ESIcompatible operation. This signal has a weak internal pull-up. NOTE: ESI compatible mode is for server platforms only. This signal should not be pulled low for desktop and mobile.

Sampled low: this indicates that the system is strapped to the “top-block swap” mode (IntelR ICH9 inverts A16 for all cycles targeting BIOS space). The status of this strap is readable via the Top Swap bit (Chipset Config Registers:Offset 3414h: bit 0). Note that software will not be able to clear the Top-Swap bit until the system is rebooted without GNT3# being pulled down.

Controllable via Boot BIOS Destination bit (Chipset Config Registers:Offset 3410h:bit 11). This strap is used in conjunction with Boot BIOS Destination Selection 0 strap.

Bit11 (GNT0#)

Controllable via Boot BIOS Destination bit (Chipset Config Registers:Offset 3410h:bit 10). This strap is used in conjunction with Boot BIOS Destination Selection 1 strap.

Bit11 (GNT0#)

Signal has weak internal pull-up. Sets bit 27 of MPC.LR (Device 28: Function 0: Offset D8)

Sampled high: this indicates that the system is strapped to the “No Reboot” mode (ICH9 will disable the TCO Timer system reboot feature). The status of this strap is readable via the NO REBOOT bit (Chipset Config Registers:Offset 3410h:bit 5).

This signal should not be pull low unless using XOR Chain testing.

Sampled low: the Flash Descriptor Security will be overridden. Sampled high: the security measures will be in effect. This strap should only be enabled in manufacturing environments.

The signal is required to be high for mobile applications.

Sampled low: the Integrated TPM will be disabled. Sampled high: the MCH TPM enable strap is sampled low and the TPM Disable bit is clear, the Integrated TPM will be enabled. NOTE: This signal is required to be floating or pulled low for desktop applications.

Bit 10 (SPI_CS1#)

0 1 SPI 1 0 PCI 1 1 LPC 0 0 Reserved

ICH9 EDS 642879 Rev.2.3

Comment

Boot BIOS Destination

Bit 10 (SPI_CS1#)

Boot BIOS Destination

B

ICH9 Integrated pull-up and pull-down Resistors

ICH9 EDS 642879 Rev.2.3

SIGNAL

CL_CLK[1:0]

CL_DATA[1:0]

CL_RST0#

DPRSLPVR/GPIO16

HDA_BIT_CLK

HDA_DOCK_EN#/GPIO33

HDA_RST#

HDA_SDIN[3:0]

HDA_SDOUT

HDA_SYNC

GNT0#, GNT[3:1]#/ GPIO[55,53,51]

GPIO20

GPIO49

LAD[3:0]# / FHW[3:0]#

LAN_RXD[2:0]

LDRQ0

LDRQ1 / GPIO23

PME#

PWRBTN#

SATALED#

SPI_CS1# / GPIO58 (Desktop Only) / CLGPIO6 (Digital Office Only)

SPI_MOSI

SPI_MISO

SPKR

TACH[3:0]

TP3

USB[11:0][P,N]

Resistor Type/Value

PULL-UP 20K

PULL-UP 10K

PULL-DOWN 20K

PULL-UP 20K

PULL-DOWN 20K

PULL-UP 20K

PULL-DOWN 20K

PULL-UP 20K

PULL-UP 15K

PULL-UP 20K

PULL-DOWN 20K

PULL-UP 20K

PULL-DOWN 20K

PULL-UP 20K

PULL-DOWN 15K

PCIE Routing

LANE1

LANE2

MiniCard WLAN

LANE3 LAN

USB Table

USB Pair

0

1

2

3

4

5

6

7

8

9

10

11

Device

USB0 (I/O Board)

USB1 (I/O Board 17")

USB2

USB3

BLUETOOTH

RESERVED

WLAN

RESERVED

Card Reader

CAMERA

C

Cantiga chipset and ICH9M I/O controller Hub strapping configuration

Pin Name Strap Description Configuration

CFG2:0 FSB Frequency

CFG5 DMI x2 Select 0 = DMI x2

CFG6 ITPM Host Interface

CFG7 Intel Management

CFG9

CFG10 PCIE Loopback enable 0 = Enable (Note 3)

CFG12 ALLZ 0 =ALLZ mode enabled (Note 3)

CFG13 XOR

CFG16 FSB Dynamic ODT 0 = Dynamic ODT Disabled

CFG19 DMI Lane Reversal

CFG20

SDVO _CTRLDATA (Note4)

L_DDC_DATA Local Flat Panel

DDPC _CTRLDATA (Note4)

CFG4:3 CFG8 CFG11 CFG14 CFG15 CFG17 CFG18

NOTE:

1. All strap signals are sampled with respect to the leading edge of the GMCH Power OK (PWROK) signal.

2. iTPM can be disabled by a ‘Soft-Strap’ option in the Flash-descriptor section of the Firmware. This ‘Soft-Strap’ is activated only after enabling iTPM via CFG6.

3. Only one of the CFG10/CFG12/CFG13 straps can be enabled at any time.

4. DDPC_CTRL_DATA & SDVO_CTRL_DATA straps should both be high to enable Display Port.

engine crypto strap

PCIE Graphics Lane

Digital Display Port (SDVO/DP/HDMI) Concurrent with PCIe

SDVO Present

(LFP) Present

Digital Display Present

Reserved

D

Montevina Platform Design guide 355648 Rev.2.3

000 = FSB1066 010 = FSB800 011 = FSB667 Others = Reserved

1 = DMI x4 (Default)

0 = The iTPM Host Interface is enabled (Note 2)

1 = The iTPM Host Interface is disabled (default)

0 = Intel Management Engine Crypto Transport Layer Security (TLS) cipher suite with no confidentiality 1 = Intel Management Engine Crypto TLS cipher suite with confidentiality (default)

0 = Reverse Lanes, 15->0, 14->1 etc. 1 = Normal operation (default): Lane Numbered in Order

1 = Disable (Default)

0 = XOR mode enabled (Note 3)

1 = Disable (Default)

1 = Dynamic ODT Enabled (Default)

0 = Normal operation (Default): Lane Numbered in

Order

1 = Reverse Lanes DMI x4 mode [MCH->ICH]: (3->0, 2->1, 1->2 and 0->3) DMI x2 mode [MCH->ICH]: (3->0, 2->1)

0 = Only digital DisplayPort (SDVO/DP/HDMI) or PCIe is operational (default) 1 = Digital DisplayPort (SDVO/DP/HDMI) and PCIe are operating simultaneously via the PEG port

0 = No SDVO/HDMI/DP interface disabled (default) 1 = SDVO/HDMI/DP interface enabled

0 = LFP Disabled (Default)

1 = LFP Card Present; PCIE disabled

0 = Digital display (HDMI/DP) device absent (default) 1 = Digital display (HDMI/DP) Device Present

DJ1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Custom

Date: Sheet

DJ1 Montevina UMA

Taipei Hsien 221, Taiwan, R.O.C.

Table of Content

688Wednesday, February 24, 2010

E

A00

of

A00

5

4

3

2

1

SSID = CLOCK

23

VDD_PLL3

VSS_IO

VSS_SRC

22

30

36

1D05V_CK505_IO3D3V_S0_CK505

27

19

33

43

52

56

VDD_IO

VDD_SRC_IO

VDD_PLL3_IO

SRCT1/LCDT_100/27M_NSS

SRCC1/LCDT_100/27M_SS

VSS_PLL3

VSS_SRC

VSS_CPU

26

49

59

65

CPUC0

VDD_CPU_IO

CPUC1

SRCT8/CPU2_ITPT

SRCC8/CPU2_ITPC

SRCT7/CR#_F

SRCC7/CR#_E

SRCC6

SRCT10 SRCC10

SRCT1/CR#_H

SRCC1/CR#_G

SRCC9

SRCC4

SRCT3/CR#_C

SRCC3/CR#_D

SRCT2/SATAT

SRCC2/SATAC

SRCT0/DOT96T

SRCC0/DOT96C

GND

SLG8SP513VTR-GP

61

CPUT0

60

58

CPUT1

57

54 53

51 50

48

SRCT6

47

41 42

40 39

37

SRCT9

38

34

SRCT4

35

31 32

28 29

24 25

20 21

Main = 71.08513.003(SLG)

Second = 71.09356.00W(ICS)

12

C706

SCD1U16V2KX-3GP

12

C701

SCD1U16V2KX-3GP

1D05V_CK505_IO

12

C707

SCD1U16V2KX-3GP

12

C717

SCD1U16V2KX-3GP

12

C708

SCD1U16V2KX-3GP

12

C718

SCD1U16V2KX-3GP

DY

12

DY

12

C709

SCD1U16V2KX-3GP

SC15P50V2JN-2-GP

C719

Do Not Stuff

12

C720

DY

Do Not Stuff

C710

CLK_48M_CARD32

CLK_48M_ICH22

H_STP_PCI#22 H_STP_CPU#22

ICH_SMBCLK18,19,22,76

ICH_SMBDATA18,19,22,76

CK_PWRGD22

R707 475R2F-L1-GPR707 475R2F-L1-GP

R708 Do Not Stuff

R709 33R2J-2-GPR709 33R2J-2-GP R710 33R2J-2-GPR710 33R2J-2-GP

R711 33R2J-2-GPR711 33R2J-2-GP

12

C722

C721

DY

Do Not Stuff

X701

1 2

X-14D31818M-37GP

12

R705 22R2J-2-GPR705 22R2J-2-GP

1 2

DY

C712 Do Not Stuff

1 2

12

DY

1 2 1 2

1 2

CLK_XTAL_ IN

CLK_XTAL_OUT

12

C711

SC15P50V2JN-2-GP

R701

1 2

22R2J-2-GP

CLKSATARE Q# CLKREQ#_1 PCI2_TME

27_SEL ITP_EN

FSB FSC

FSA

U701

3

XN

2

XOUT

17

USB_48/FSA

45

PC_STOP#

44

CPU_STOP#

7

SCLK

6

SDATA

63

CKPWRGD/PWRDW N#

8

PCI0/CR#_A

10

PCI1/CR#_B

11

PCI2/TME

12

PCI3

13

PCI4/GCLK_SEL

14

PCIF0/ITP_EN

64

FSB/TEST_MODE

5

REF0/FSC/TEST_SEL

55

NC#55

4

9

16

VDD_48

VDD_REF

VSS_PCI

VSS_48

1

15

18

46

62

VDD_PCI

VDD_SRC

VDD_CPU

VSS_REF

+1.05V_VCCP

D D

+3.3V_RUN 3D3V_S0_CK505

C C

12

C702

SC1U10V3KX-3GP

12

C713

SC1U10V3KX-3GP

R704

1 2

Do Not Stuff

R706

1 2

Do Not Stuff

12

C714

SC10U6D3V5KX-1GP

12

C704

SCD1U16V2KX-3GP

12

C715

SCD1U16V2KX-3GP

12

C705

SCD1U16V2KX-3GP

12

C716

SCD1U16V2KX-3GP

CLKSATARE Q#22

CLKREQ#_B11

PCLK_FWH58

PCLK_KBC37 CLK_PCI_ICH21

CLK_14M_ICH22

MINI1_CLKREQ#

CLK_CPU_BCLK CLK_CPU_BCLK#

CLK_MCH_BCLKCLK_MCH_BCLK CLK_MCH_BCLK#

CLK_PCIE_LAN CLK_PCIE_LAN#CLK_PCIE_LAN#

CLK_PCIE_ICHCLK_PCIE_ICH CLK_PCIE_ICH#

CLK_PCIE _MINI1 CLK_PCIE _MINI1#CLK_PCIE _MINI1#

CLK_MCH_3GPLLCLK_MCH_3GPLL CLK_MCH_3GPLL#CLK_MCH_3GPLL#

CLK_PCIE_SATA CLK_PCIE_SATA#CLK_PCIE_SATA#

MCH_SSCDREFCLKMCH_SSCDREFCLK MCH_SSCDREFCLK#

CLK_MCH_DREFCLK CLK_MCH_DREFCLK#

R702 10KR2J-3-GPR702 10KR2J-3-GP

1 2

CLK_CPU_BCLK 8 CLK_CPU_BCLK# 8

CLK_MCH_BCLK 10 CLK_MCH_BCLK# 10

CLK_PCIE_LAN 76 CLK_PCIE_LAN# 76

CLK_PCIE_ICH 21 CLK_PCIE_ICH# 21

MINI1_CLKREQ# 76

CLK_PCIE _MINI1 76 CLK_PCIE _MINI1# 76

CLK_MCH_3GPLL 11 CLK_MCH_3GPLL# 11

CLK_PCIE_SATA 20 CLK_PCIE_SATA# 20

MCH_SSCDREFCLK 11 MCH_SSCDREFCLK# 11

CLK_MCH_DREFCLK 11 CLK_MCH_DREFCLK# 11

+3.3V_RUN

B B

3D3V_S0_CK505

12

R712

R712 10KR2J-3-GP

10KR2J-3-GP

12

R715

DY

Do Not Stuff

ITP_EN

ITP_EN Output

0 SRC8 1 CPU_ITP

3D3V_S0_CK505

12

R713

R713 10KR2J-3-GP

10KR2J-3-GP

12

R716

R716 Do Not Stuff

Do Not Stuff

DY

PCI2_TME

PCI2_TME Output

0

Overclocking of CPU and SRC allowed

1

Overclocking of CPU and SRC not allowed

R714

R714 10KR2J-3-GP

10KR2J-3-GP

1 2

27_SEL

27_SEL PIN24/25

PIN20/21

96M0

100M

100M1 27M

SEL2

SEL1

A A

FSC

FSB

01

1

01

0 01 0

FSA

1 01

00 0

5

SEL0

CPU

100M 133M 166M 200M

FSB

533M 667M 800M

1067M266M

R717 10KR2J-3-GPR717 10KR2J-3-GP

CPU_BSEL28

X

CPU_BSEL18

CPU_BSEL08

4

1 2

R718 Do Not StuffR718 Do Not Stuff

1 2

R719 2K2R2J-2-GPR719 2K2R2J-2-GP

1 2

R720 1KR2J-1-GPR720 1KR2J-1-GP

1 2

R721 1KR2J-1-GPR721 1KR2J-1-GP

1 2

R722 1KR2J-1-GPR722 1KR2J-1-GP

1 2

FSC

FSB

FSA

MCH_CLKSEL0 11

MCH_CLKSEL1 11

MCH_CLKSEL2 11

3

DJ1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Clock Generator SLG8SP513VTR

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

DJ1 Montevina UMA

Taipei Hsien 221, Taiwan, R.O.C.

of

788Friday, February 26, 2010

of

788Friday, February 26, 2010

of

788Friday, February 26, 2010

1

A00

5

4

3

2

1

SSID = CPU

1 OF 4

CPU1A

J4 L5 L4

K5 M3 N2

J1

N3

P5

P2

L2

P4

P1 R1 M1

K3 H2

K2

J3

L1

Y2 U5 R3

W6

U4

Y5 U1 R4

T5

T3

W2 W5

Y4 U2

V4

W3 AA4 AB2 AA3

V1

A6 A5

C4

D5 C6

B4 A3

M4 N5

T2 V3

B2 C3 D2

D22

D3

F6

B1

ITP_TMS

ITP_TDI

ITP_BPM#5

ITP_TDO

ITP_DBRESET#

ITP_TCK

ITP_TRST#

CPU1A

A3# A4# A5# A6# A7# A8# A9# A10# A11# A12# A13# A14# A15# A16# ADSTB0#

REQ0# REQ1# REQ2# REQ3# REQ4#

A17# A18# A19# A20# A21# A22# A23# A24# A25# A26# A27# A28# A29# A30# A31# A32# A33# A34# A35# ADSTB1#

A20M# FERR# IGNNE#

STPCLK# LINT0 LINT1 SMI#

RSVD#M4 RSVD#N5 RSVD#T2 RSVD#V3 RSVD#B2 RSVD#C3 RSVD#D2 RSVD#D22 RSVD#D3 RSVD#F6

KEY_NC

BGA479-SKT6-GPU7

62.10079.001

R816 51R2F-2-GPR816 51R2F-2-GP

R817 51R2F-2-GPR817 51R2F-2-GP

R818 51R2F-2-GPR818 51R2F-2-GP

R801 Do Not Stuff

R825 Do Not Stuff

R819 51R2F-2-GPR819 51R2F-2-GP

R820 51R2F-2-GPR820 51R2F-2-GP

ADDR GROUP 0

ADDR GROUP 1

ICH

TEST7

RESERVED

1 2

DY

1 2

DY

1 2

DEFER#

DRDY# DBSY#

LOCK#

RESET#

TRDY#

BPM0# BPM1# BPM2# BPM3# PRDY#

PREQ#

TRST#

XDP/ITP SIGNALS CONTROL

XDP/ITP SIGNALS CONTROL THERMAL

THERMAL

PROCHOT#

THRMDA THRMDC

THERMTRIP#

HCLK

BCLK0 BCLK1

ADS# BNR# BPRI#

BR0#

IERR#

INIT#

RS0# RS1# RS2#

HIT#

HITM#

TCK

TDI TDO TMS

DBR#

+1.05V_VCCP

+3.3V_RUN

H1 E2 G5

H5 F21 E1

F1

CPU_IERR#

D20 B3

H4

H_CPURST#

C1

H_RS#0

F3

H_RS#1

F4

H_RS#2

G3 G2

G6 E4

AD4 AD3 AD1 AC4 AC2

ITP_BPM#5

AC1

ITP_TCK

AC5

ITP_TDI

AA6

ITP_TDO

AB3

ITP_TMS

AB5

ITP_TRST#

AB6

ITP_DBRESET#

C20

R803 Do Not Stuff

R804 56R2J-4-GPR804 56R2J-4-GP

D21 A24 B25

C7

R805 Do Not Stuff

A22 A21

D D

H_A#[35..3]10

C C

B B

A A

H_A#[35..3]

H_ADSTB#010

H_REQ#[4..0]10

H_ADSTB#110

H_A20M#20

H_FERR#20

H_IGNNE#20

H_STPCLK#20

H_INTR20 H_NMI20 H_SMI#20

TP802TP802 TP803TP803 TP804TP804 TP805TP805 TP806TP806 TP807TP807 TP808TP808 TP809TP809 TP810TP810 TP811TP811

TP812TP812

H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16

H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4

H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35

RSVD_CPU_1 RSVD_CPU_2 RSVD_CPU_3 RSVD_CPU_4 RSVD_CPU_5 RSVD_CPU_6 RSVD_CPU_7 RSVD_CPU_8 RSVD_CPU_9 RSVD_CPU_10

RSVD_CPU_11

All place within 2" to CPU

5

4

TP801TP801

1

R802 56R2J-4-GPR802 56R2J-4-GP

1 2

DY

1 2

H_THERMDA H_THERMDC

1 2

DY

H_ADS# 10 H_BNR# 10

H_BPRI# 10

H_DEFER# 10 H_DRDY# 10 H_DBSY# 10

H_BREQ#0 10

H_INIT# 20

H_LOCK# 10

H_CPURST# 10

H_RS#[2..0] 10

H_TRDY# 10

H_HIT# 10 H_HITM# 10

+1.05V_VCCP

H_THERMDA 39

H_THERMDC 39

H_THRMTRIP# 11,20,37,42

+1.05V_VCCP

CLK_CPU_BCLK 7 CLK_CPU_BCLK# 7

+1.05V_VCCP

H_THERMDA

H_THERMDC

H_THERMDA, H_THERMDC routing together, Trace width / Spacing = 10 / 10 mil

CPU_PROCHOT# 47

+1.05V_VCCP

1 2

12

R812

2KR2F-3-GP

Layout notes Z= 55 Ohm 0.5" MAX for CPU_GTLREF0

12

C849

DY

Do Not Stuff

H_THRMTRIP# should connect to ICH9 and MCH without T-ing.

R806

R806 1KR2F-3-GP

1KR2F-3-GP

CPU_GTLREF0

12

C801

SC1KP50V2KX-1GP

3

H_DSTBN#010 H_DSTBP#010 H_DINV#010

H_DSTBN#110 H_DSTBP#110 H_DINV#110

R808 Do Not Stuff

1 2

DY

R810 Do Not Stuff

1 2

DY

R813 Do Not Stuff

1 2

DY

R815 Do Not Stuff

1 2

DY

CPU_BSEL07 CPU_BSEL17 CPU_BSEL27

TP813TP813

H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15

H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31

TEST1 TEST2 CPU_TEST3

CPU_TEST5

H_CPURST#

1

2

H_DINV#[3..0]

H_DSTBN#[3..0]

H_DSTBP#[3..0]

H_D#[63..0]

CPU1B

E22

D0#

F24

D1#

E26

D2#

G22

D3#

F23

D4#

G25

D5#

E25

D6#

E23

D7#

K24

D8#

G24

D9#

J24

D10#

J23

D11#

H22

D12#

F26

D13#

K22

D14#

H23

D15#

J26

DSTBN0#

H26

DSTBP0#

H25

DINV0#

N22

D16#

K25

D17#

P26

D18#

R23

D19#

L23

D20#

M24

D21#

L22

D22#

M23

D23#

P25

D24#

P23

D25#

P22

D26#

T24

D27#

R24

D28#

L25

D29#

T25

D30#

N25

D31#

L26

DSTBN1#

M26

DSTBP1#

N24

DINV1#

AD26

GTLREF

C23

TEST1

D25

TEST2

C24

TEST3

AF26

TEST4

AF1

TEST5

A26

TEST6

B22

BSEL0

B23

BSEL1

C21

BSEL2

BGA479-SKT6-GPU7

62.10079.001

H_DINV#[3..0] 10

H_DSTBN#[3..0] 10

H_DSTBP#[3..0] 10

H_D#[63..0] 10

2 OF 4

H_D#32

Y22

D32# D33# D34# D35#

DATA GRP0 DATA GRP1

D36# D37# D38# D39# D40# D41# D42#

DATA GRP2DATA GRP3

D43# D44# D45# D46#

D47# DSTBN2# DSTBP2#

DINV2#

D48#

D49#

D50#

D51#

D52#

D53#

D54#

D55#

D56#

D57#

D58#

D59#

D60#

D61#

D62#

D63# DSTBN3# DSTBP3#

DINV3#

COMP0

MISC

COMP1 COMP2 COMP3

DPRSTP#

DPSLP#

DPWR#

PWRGOOD

SLP#

PSI#

Layout Note: Comp0, 2 connect with Zo=27.4 ohm, make trace length shorter than 0.5". Comp1, 3 connect with Zo=55 ohm, make trace length shorter than 0.5".

DJ1

Title

Size Document Number Rev

Custom

Date: Sheet

H_D#33

AB24

H_D#34

V24

H_D#35

V26

H_D#36

V23

H_D#37

T22

H_D#38

U25

H_D#39

U23

H_D#40

Y25

H_D#41

W22

H_D#42

Y23

H_D#43

W24

H_D#44

W25

H_D#45

AA23

H_D#46

AA24

H_D#47

AB25 Y26 AA26 U22

H_D#48

AE24

H_D#49

AD24

H_D#50

AA21

H_D#51

AB22

H_D#52

AB21

H_D#53

AC26

H_D#54

AD20

H_D#55

AE22

H_D#56

AF23

H_D#57

AC25

H_D#58

AE21

H_D#59

AD21

H_D#60

AC22

H_D#61

AD23

H_D#62

AF22

H_D#63

AC23 AE25 AF24 AC20

COMP0

R26

COMP1

U26

COMP2

AA1

COMP3

Y1

E5 B5 D24 D6 D7 AE6

CPU-FSB(1/2)

DJ1 Montevina UMA

H_DSTBN#2 10 H_DSTBP#2 10 H_DINV#2 10

H_DSTBN#3 10 H_DSTBP#3 10 H_DINV#3 10

R807 27D4R2F-L1-GPR807 27D4R2F-L1-GP

1 2

R809 54D9R2F-L1-GPR809 54D9R2F-L1-GP

1 2

R811 27D4R2F-L1-GPR811 27D4R2F-L1-GP

1 2

R814 54D9R2F-L1-GPR814 54D9R2F-L1-GP

1 2

H_DPRSTP# 11,20,47 H_DPSLP# 20 H_DPWR# 10 H_PWRGOOD 20,42 H_CPUSLP# 10

PSI# 47

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

888Friday, February 26, 2010

1

A00

of

A00

5

4

3

2

1

SSID = CPU

D D

+VCC_CORE

3 OF 4

CPU1C

A7

VCC

A9

VCC

A10

VCC

A12

VCC

A13

VCC

A15

VCC

A17

VCC

A18

VCC

A20

VCC

B7

VCC

B9

VCC

B10

VCC

B12

VCC

B14

VCC

B15

VCC

B17

VCC

B18

VCC

B20

VCC

C9

VCC

C10

VCC

C12

VCC

C13

VCC

C15

VCC

C C

B B

C17

VCC

C18

VCC

D9

VCC

D10

VCC

D12

VCC

D14

VCC

D15

VCC

D17

VCC

D18

VCC

E7

VCC

E9

VCC

E10

VCC

E12

VCC

E13

VCC

E15

VCC

E17

VCC

E18

VCC

E20

VCC

F7

VCC

F9

VCC

F10

VCC

F12

VCC

F14

VCC

F15

VCC

F17

VCC

F18

VCC

F20

VCC

AA7

VCC

AA9

VCC

AA10

VCC

AA12

VCC

AA13

VCC

AA15

VCC

AA17

VCC

AA18

VCC

AA20

VCC

AB9

VCC

AC10

VCC

AB10

VCC

AB12

VCC

AB14

VCC

AB15

VCC

AB17

VCC

AB18

VCC

BGA479-SKT6-GPU7

62.10079.001

VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC

VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP

VCCA VCCA

VID0 VID1 VID2 VID3 VID4 VID5 VID6

VCCSENSE

VSSSENSE

AB20 AB7 AC7 AC9 AC12 AC13 AC15 AC17 AC18 AD7 AD9 AD10 AD12 AD14 AD15 AD17 AD18 AE9 AE10 AE12 AE13 AE15 AE17 AE18 AE20 AF9 AF10 AF12 AF14 AF15 AF17 AF18 AF20

G21 V6 J6 K6 M6 J21 K21 M21 N21 N6 R21 R6 T21 T6 V21 W21

B26 C26

AD6 AF5 AE5 AF4 AE3 AF3 AE2

AF7

AE7

+VCC_CORE

CPU_VID0 CPU_VID1 CPU_VID2 CPU_VID3 CPU_VID4 CPU_VID5 CPU_VID6

layout note: "+1.5V_VCCA" as short as possible

CPU_VID[6..0] 47

R902

1 2

100R2F-L1-GP-U

R903

1 2

100R2F-L1-GP-U

+VCC_CORE

12

DY

+VCC_CORE

12

+VCC_CORE

12

+1.05V_VCCP

12

SCD1U10V2KX-5GP

PG902

1 2

Do Not Stuff

PG901

1 2

Do Not Stuff

12

C902

C901

Do Not Stuff

DY

12

C921

C911

DY

Do Not Stuff

SC22U6D3V5MX-2GP

12

C924

C923

SC10U6D3V5KX-1GP

SC22U6D3V5MX-2GP

12

C933

C934

SCD1U16V2KX-3GP

SCD01U16V2KX-3GP

12

C920

Do Not Stuff

DY

12

C912

DY

Do Not Stuff

12

C925

DY

Do Not Stuff

12

C935

SCD1U10V2KX-5GP

C939

+VCC_CORE

VCC_SENSE 47

VSS_SENSE 47

12

C903

Do Not Stuff

DY

12

C913

DY

Do Not Stuff

12

C926

SC22U6D3V5MX-2GP

12

C936

SCD1U16V2KX-3GP

12

C904

Do Not Stuff

DY

12

C914

Do Not Stuff

12

C927

SC22U6D3V5MX-2GP

12

C938

SCD1U10V2KX-5GP

R901

1 2

Do Not Stuff

12

C940

C940 SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

12

C906

C905

Do Not Stuff

DY

12

C915

C916

DY

Do Not Stuff

SC22U6D3V5MX-2GP

12

C928

C929

DY

Do Not Stuff

SC10U6D3V5KX-1GP

12

C937

DY

Do Not Stuff

TC901

SC1U6D3V2KX-GP

+1.5V_RUN+1.5V_VCCA

Layout Note: Place as close as possible to the CPU VCCA pin.

VCC_SENSE and VSS_SENSE lines should be of equal length.

DY

12

C907

12

C922

12

C930

12

C908

DY

SC22U6D3V5MX-2GP

12

C917

Do Not Stuff

12

C931

SC22U6D3V5MX-2GP

12

C909

Do Not Stuff

SC22U6D3V5MX-2GP

12

C918

SC10U6D3V5KX-1GP

SC22U6D3V5MX-2GP

12

C932

C932 SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

C910

C910 SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

C919

C919 SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

CPU1D

A4

VSS

A8

VSS

A11

VSS

A14

VSS

A16

VSS

A19

VSS

A23

VSS

AF2

VSS

B6

VSS

B8

VSS

B11

VSS

B13

VSS

B16

VSS

B19

VSS

B21

VSS

B24

VSS

C5

VSS

C8

VSS

C11

VSS

C14

VSS

C16

VSS

C19

VSS

C2

VSS

C22

VSS

C25

VSS

D1

VSS

D4

VSS

D8

VSS

D11

VSS

D13

VSS

D16

VSS

D19

VSS

D23

VSS

D26

VSS

E3

VSS

E6

VSS

E8

VSS

E11

VSS

E14

VSS

E16

VSS

E19

VSS

E21

VSS

E24

VSS

F5

VSS

F8

VSS

F11

VSS

F13

VSS

F16

VSS

F19

VSS

F2

VSS

F22

VSS

F25

VSS

G4

VSS

G1

VSS

G23

VSS

G26

VSS

H3

VSS

H6

VSS

H21

VSS

H24

VSS

J2

VSS

J5

VSS

J22

VSS

J25

VSS

K1

VSS

K4

VSS

K23

VSS

K26

VSS

L3

VSS

L6

VSS

L21

VSS

L24

VSS

M2

VSS

M5

VSS

M22

VSS

M25

VSS

N1

VSS

N4

VSS

N23

VSS

N26

VSS

P3

VSS

BGA479-SKT6-GPU7

62.10079.001

4 OF 4

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

P6 P21 P24 R2 R5 R22 R25 T1 T4 T23 T26 U3 U6 U21 U24 V2 V5 V22 V25 W1 W4 W23 W26 Y3 Y6 Y21 Y24 AA2 AA5 AA8 AA11 AA14 AA16 AA19 AA22 AA25 AB1 AB4 AB8 AB11 AB13 AB16 AB19 AB23 AB26 AC3 AC6 AC8 AC11 AC14 AC16 AC19 AC21 AC24 AD2 AD5 AD8 AD11 AD13 AD16 AD19 AD22 AD25 AE1 AE4 AE8 AE11 AE14 AE16 AE19 AE23 AE26 A2 AF6 AF8 AF11 AF13 AF16 AF19 AF21 A25 AF25

CPU_GND1

CPU_GND2 CPU_GND3

CPU_GND4

NCTF PIN

TP902TP902

TP901TP901 TP903TP903

TP904TP904

A A

5

4

3

2

DJ1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Custom

Date: Sheet

DJ1 Montevina UMA

Taipei Hsien 221, Taiwan, R.O.C.

CPU-Power(2/2)

988Friday, February 26, 2010

1

of

A00

5

SSID = MCH

4

3

2

1

1 OF 10

NB1A

D D

C C

H_SWING routing Trace width and Spacing use 10 / 20 mil

H_SWING Resistors and Capacitors close MCH 500 mil ( MAX )

12

H_RCOMP routing Trace width and Spacing use 10 / 20 mil

B B

1 2

R1003

+1.05V_VCCP

H_SWING

C1002

C1002 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

H_RCOMP

24D9R2F-L-GP

12

R1002

R1002 221R2F-2-GP

221R2F-2-GP

12

R1001

R1001 100R2F-L1-GP-U

100R2F-L1-GP-U

H_D#[63..0]8

Place R1001 near to the chip ( < 0.5")

+1.05V_VCCP

R1004

R1004 1KR2F-3-GP

1KR2F-3-GP

1 2

12

R1005

R1005 2KR2F-3-GP

2KR2F-3-GP

H_AVREF

H_D#[63..0]

H_CPURST#8 H_CPUSLP#8

DY

12

C1001

C1001 Do Not Stuff

Do Not Stuff

H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63

H_SWING H_RCOMP

NB1A

F2

H_D#_0

G8

H_D#_1

F8

H_D#_2

E6

H_D#_3

G2

H_D#_4

H6

H_D#_5

H2

H_D#_6

F6

H_D#_7

D4

H_D#_8

H3

H_D#_9

M9

H_D#_10

M11

H_D#_11

J1

H_D#_12

J2

H_D#_13

N12

H_D#_14

J6

H_D#_15

P2

H_D#_16

L2

H_D#_17

R2

H_D#_18

N9

H_D#_19

L6

H_D#_20

M5

H_D#_21

J3

H_D#_22

N2

H_D#_23

R1

H_D#_24

N5

H_D#_25

N6

H_D#_26

P13

H_D#_27

N8

H_D#_28

L7

H_D#_29

N10

H_D#_30

M3

H_D#_31

Y3

H_D#_32

AD14

H_D#_33

Y6

H_D#_34

Y10

H_D#_35

Y12

H_D#_36

Y14

H_D#_37

Y7

H_D#_38

W2

H_D#_39

AA8

H_D#_40

Y9

H_D#_41

AA13

H_D#_42

AA9

H_D#_43

AA11

H_D#_44

AD11

H_D#_45

AD10

H_D#_46

AD13

H_D#_47

AE12

H_D#_48

AE9

H_D#_49

AA2

H_D#_50

AD8

H_D#_51

AA3

H_D#_52

AD3

H_D#_53

AD7

H_D#_54

AE14

H_D#_55

AF3

H_D#_56

AC1

H_D#_57

AE3

H_D#_58

AC3

H_D#_59

AE11

H_D#_60

AE8

H_D#_61

AG2

H_D#_62

AD6

H_D#_63

C5

H_SWING

E3

H_RCOMP

C12

H_CPURST#

E11

H_CPUSLP#

A11

H_AVREF

B11

H_DVREF

CANTIGA-GM-GP-U-NF

HOST

1 OF 10

H_A#_3 H_A#_4 H_A#_5 H_A#_6 H_A#_7 H_A#_8

H_A#_9 H_A#_10 H_A#_11 H_A#_12 H_A#_13 H_A#_14 H_A#_15 H_A#_16 H_A#_17 H_A#_18 H_A#_19 H_A#_20 H_A#_21 H_A#_22 H_A#_23 H_A#_24 H_A#_25 H_A#_26 H_A#_27 H_A#_28 H_A#_29 H_A#_30 H_A#_31 H_A#_32 H_A#_33 H_A#_34 H_A#_35

H_ADS# H_ADSTB#_0 H_ADSTB#_1

H_BNR#

H_BPRI#

H_BREQ#

H_DEFER#

H_DBSY#

HPLL_CLK

HPLL_CLK#

H_DPWR#

H_DRDY#

H_HIT#

H_HITM#

H_LOCK#

H_TRDY#

H_DINV#_0 H_DINV#_1 H_DINV#_2 H_DINV#_3

H_DSTBN#_0 H_DSTBN#_1 H_DSTBN#_2 H_DSTBN#_3

H_DSTBP#_0 H_DSTBP#_1 H_DSTBP#_2 H_DSTBP#_3

H_REQ#_0 H_REQ#_1

H_REQ#_2 H_REQ#_3

H_REQ#_4

H_RS#_0 H_RS#_1 H_RS#_2

A14 C15 F16 H13 C18 M16 J13 P16 R16 N17 M13 E17 P17 F17 G20 B19 J16 E20 H16 J20 L17 A17 B17 L16 C21 J17 H20 B18 K17 B20 F21 K21 L20

H12 B16 G17 A9 F11 G12 E9 B10 AH7 AH6 J11 F9 H9 E12 H11 C9

J8 L3 Y13 Y1

L10 M7 AA5 AE6

L9 M8 AA6 AE5

B15 K13 F13 B13 B14

B6 F12 C8

H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35

H_DINV#0 H_DINV#1 H_DINV#2 H_DINV#3

H_DSTBN#0 H_DSTBN#1 H_DSTBN#2 H_DSTBN#3

H_DSTBP#0 H_DSTBP#1 H_DSTBP#2 H_DSTBP#3

H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4

H_RS#0 H_RS#1 H_RS#2

H_A#[35..3]

H_ADS# 8 H_ADSTB#0 8 H_ADSTB#1 8 H_BNR# 8 H_BPRI# 8 H_BREQ#0 8 H_DEFER# 8 H_DBSY# 8 CLK_MCH_BCLK 7 CLK_MCH_BCLK# 7 H_DPWR# 8 H_DRDY# 8 H_HIT# 8 H_HITM# 8 H_LOCK# 8 H_TRDY# 8

H_DINV#[3..0]

H_DSTBN#[3..0]

H_DSTBP#[3..0]

H_REQ#[4..0]

H_RS#[2..0]

H_A#[35..3] 8

H_DINV#[3..0] 8

H_DSTBN#[3..0] 8

H_DSTBP#[3..0] 8

H_REQ#[4..0] 8

H_RS#[2..0] 8

A A

5

4

3

2

DJ1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Custom

Date: Sheet

DJ1 Montevina UMA

Taipei Hsien 221, Taiwan, R.O.C.

Cantiga-Host(1/6)

10 88Friday, February 26, 2010

1

of

A00

5

SSID = MCH

is current setting

*

CFG Strap HighLow

CFG 5

D D

CFG 6

CFG 7

DMI X 2

ITPM enable

TLS cipher suite with no confidentiality

CFG 9 PCIE GFX lane reversed

CFG 10 PCIE loopback enable PCIE loopback disable

CFG 12 ALLZ mode enable ALLZ mode disable

CFG 13 XOR mode enable XOR mode disable

CFG 16

CFG 19 DMI Lane Reserved

CFG 20 SDVO concurrent with PCIE

SDVO_CTRLDATA

L_DDC_DATA LFP disable LFP card present

DDPC_CTRLDATA

C C

+3.3V_RUN

R1112 Do Not Stuff

1 2

DY

R1113 Do Not Stuff

1 2

DY

RN1102

4

SRN10KJ-5-GP

R1118 Do Not Stuff

1 2

DY

B B

A A

DY

R1119 Do Not Stuff

1 2

DY

R1124 Do Not Stuff

1 2

DY

FSB dynamic ODT disable

Normal operation Reverse DMI lanes

Only PCIE or SDVO is operational

SDVO interface disable

SDVO/iHDMI/DP interface disabled

CFG19

CFG20

PM_EXTTS#0

1

PM_EXTTS#1

23

CFG9

CFG10

CFG16

H_THRMTRIP#8,20,37,42

5

*

PCIE and SDVO are operatiing simultaneously

*

via the PEG port

* *

*

FSB setting

PM_PWROK22,37

PLT_RST#21,37,58,76

DPRSLPVR22,47

DMI X 4

ITPM disable

TLS cipher suite with confidentiality

PCIE GFX lane numbered in oder

FSB Dynamic ODT enable

SDVO interface enable

SDVO/iHDMI/DP interface enabled

MCH_CLKSEL07 MCH_CLKSEL17 MCH_CLKSEL27

TP1102TP1102 TP1103TP1103

TP1104TP1104 TP1105TP1105

TP1101TP1101

PM_SYNC#22

H_DPRSTP#8,20,47 PM_EXTTS#018 PM_EXTTS#119

R1125

1 2

Do Not Stuff

1 2

R1127100R2J-2-GP R1127100R2J-2-GP

Do Not Stuff

C1107

DY

4

NB1B

M36

RESERVED#M36

N36

RESERVED#N36

R33

RESERVED#R33

T33

RESERVED#T33

AH9

RESERVED#AH9

AH10

RESERVED#AH10

AH12

RESERVED#AH12

AH13

RESERVED#AH13

K12

* * *

*

* * * *

CFG3 CFG4

CFG9 CFG10

CFG14 CFG15 CFG16 CFG17

CFG19 CFG20

PWROK_R RSTIN#

12

4

RESERVED#K12

AL34

RESERVED#AL34

AK34

RESERVED#AK34

AN35

RESERVED#AN35

AM35

RESERVED#AM35

T24

RESERVED#T24

B31

RESERVED#B31

B2

RESERVED#B2

M1

RESERVED#M1

AY21

RESERVED#AY21

BG23

RESERVED#BG23

BF23

RESERVED#BF23

BH18

RESERVED#BH18

BF18

RESERVED#BF18

T25

CFG_0

R25

CFG_1

P25

CFG_2

P20

CFG_3

P24

CFG_4

C25

CFG_5

N24

CFG_6

M24

CFG_7

E21

CFG_8

C23

CFG_9

C24

CFG_10

N21

CFG_11

P21

CFG_12

T21

CFG_13

R20

CFG_14

M20

CFG_15

L21

CFG_16

H21

CFG_17

P29

CFG_18

R28

CFG_19

T28

CFG_20

R29

PM_SYNC#

B7

PM_DPRSTP#

N33

PM_EXT_TS#_0

P32

PM_EXT_TS#_1

AT40

PWROK

AT11

RSTIN#

T20

THERMTRIP#

R32

DPRSLPVR

BG48

NC#BG48

BF48

NC#BF48

BD48

NC#BD48

BC48

NC#BC48

BH47

NC#BH47

BG47

NC#BG47

BE47

NC#BE47

BH46

NC#BH46

BF46

NC#BF46

BG45

NC#BG45

BH44

NC#BH44

BH43

NC#BH43

BH6

NC#BH6

BH5

NC#BH5

BG4

NC#BG4

BH3

NC#BH3

BF3

NC#BF3

BH2

NC#BH2

BG2

NC#BG2

BE2

NC#BE2

BG1

NC#BG1

BF1

NC#BF1

BD1

NC#BD1

BC1

NC#BC1

F1

NC#F1

A47

NC#A47

CANTIGA-GM-GP-U-NF

RSVD

CFG

PM

NC

MISC

3

2 OF 10

AP24

SA_CK_0

AT21

SA_CK_1

AV24

SB_CK_0

AU20

SB_CK_1

AR24

SA_CK#_0

AR21

SA_CK#_1

AU24

SB_CK#_0

AV20

SB_CK#_1

BC28

SA_CKE_0

AY28

SA_CKE_1

AY36

SB_CKE_0

BB36

SB_CKE_1

BA17

SA_CS#_0

AY16

SA_CS#_1

AV16

SB_CS#_0

AR13

SB_CS#_1

BD17

SA_ODT_0

AY17

SA_ODT_1

BF15

SB_ODT_0

AY13

SB_ODT_1

SM_RCOMP

SM_RCOMP#

SM_RCOMP_VOH SM_RCOMP_VOL

SM_VREF

SM_PWROK

SM_REXT

SM_DRAMRST#

DPLL_REF_CLK

DDR CLK/ CONTROL/COMPENSATION

DPLL_REF_CLK#

DPLL_REF_SSCLK

DPLL_REF_SSCLK#

PEG_CLK

PEG_CLK#

CLK

DMI_RXN_0 DMI_RXN_1 DMI_RXN_2 DMI_RXN_3

DMI_RXP_0 DMI_RXP_1 DMI_RXP_2 DMI_RXP_3

DMI_TXN_0 DMI_TXN_1 DMI_TXN_2

DMI

DMI_TXN_3

DMI_TXP_0 DMI_TXP_1 DMI_TXP_2 DMI_TXP_3

GFX_VID_0 GFX_VID_1 GFX_VID_2 GFX_VID_3 GFX_VID_4

GFX_VR_EN

GRAPHICS VID

CL_CLK

CL_DATA

CL_PWROK

CL_RST#

MEHDA

CL_VREF

BG22 BH21

BF28 BH28

AV42 AR36 BF17 BC36

B38 A38 E41 F41

F43 E43

AE41 AE37 AE47 AH39

AE40 AE38 AE48 AH40

AE35 AE43 AE46 AH42

AD35 AE44 AF46 AH43

B33 B32 G33 F33 E33

C34

AH37 AH36 AN36 AJ35 AH34

M_RCOMPP M_RCOMPN

SM_RCOMP_VOH SM_RCOMP_VOL

CANTIGA_SM_VREF SM_PWROK SM_REXT DDR3_DRAMRST#

DMI_IRXN0 _MTXN0 DMI_IRXN1 _MTXN1 DMI_IRXN2 _MTXN2 DMI_IRXN3 _MTXN3

DMI_IRXP0_MTXP0 DMI_IRXP1_MTXP1 DMI_IRXP2_MTXP2 DMI_IRXP3_MTXP3

MCH_CLVREF

CLK_MCH_DREFCLK CLK_MCH_DREFCLK# MCH_SSCDREFCLK MCH_SSCDREFCLK#

CLK_MCH_3GPLL CLK_MCH_3GPLL#

DMI_ITXN0 _MRXN0 DMI_ITXN1 _MRXN1 DMI_ITXN2 _MRXN2 DMI_ITXN3 _MRXN3

DMI_ITXP0_MRXP0 DMI_ITXP1_MRXP1 DMI_ITXP2_MRXP2

DMI_ITXP3_MRXP3

M_CLK_DDR0 18 M_CLK_DDR1 18 M_CLK_DDR2 19 M_CLK_DDR3 19

M_CLK_DDR#0 18 M_CLK_DDR#1 18 M_CLK_DDR#2 19 M_CLK_DDR#3 19

M_CKE0 18 M_CKE1 18 M_CKE2 19 M_CKE3 19

M_CS#0 18 M_CS#1 18 M_CS#2 19 M_CS#3 19

M_ODT0 18 M_ODT1 18 M_ODT2 19 M_ODT3 19

1 2

R1109

R1109 499R2F-2-GP

499R2F-2-GP

CLK_MCH_DREFCLK 7 CLK_MCH_DREFCLK# 7 MCH_SSCDREFCLK 7 MCH_SSCDREFCLK# 7

CLK_MCH_3GPLL 7 CLK_MCH_3GPLL# 7

DMI_ITXN0 _MRXN0 21 DMI_ITXN1 _MRXN1 21 DMI_ITXN2 _MRXN2 21 DMI_ITXN3 _MRXN3 21

DMI_ITXP0_MRXP0 21 DMI_ITXP1_MRXP1 21 DMI_ITXP2_MRXP2 21 DMI_ITXP3_MRXP3 21

DMI_IRXN0 _MTXN0 21 DMI_IRXN1 _MTXN1 21 DMI_IRXN2 _MTXN2 21 DMI_IRXN3 _MTXN3 21

DMI_IRXP0_MTXP0 21 DMI_IRXP1_MTXP1 21 DMI_IRXP2_MTXP2 21 DMI_IRXP3_MTXP3 21

CL_CLK0 22 CL_DATA0 22

M_PWROK 22

CL_RST#0 22

MCH_CLVREF ~= 0.35V

CLKREQ#

ICH_SYNC#

TSATN#

HDA_BCLK

HDA_RST#

HDA_SDI

HDA_SDO

HDA_SYNC

3

N28 M28 G36 E36 K36 H36

B12

B28 B30 B29 C29 A28

GMCH_HDMI_DATA

TSATN#

TP1106TP1106

1

CLKREQ#_B 7 MCH_ICH_SYNC# 22

DDPC_CTRLCLK

DDPC_CTRLDATA

SDVO_CTRLCLK

SDVO_CTRLDATA

2

12

C1108

2

80D6R2F-L-GP

+1.05V_VCCP

1 2

12

SCD1U10V2KX-5GP

+1.5V_SUS

12

R1103

12

R1105

DDR3_DRAMRST# 18,19

SM_PWRO K 41

12

DY

R1126

R1126 1KR2F-3-GP

1KR2F-3-GP

R1128

R1128 499R2F-2-GP

499R2F-2-GP

C1105

Do Not Stuff

12

DY

TSATN#

CLKREQ#_B

1

SM_RCOMP_VOH

SC2D2U6D3V3KX-GP

SM_RCOMP_VOL

SC2D2U6D3V3KX-GP

Do Not Stuff

C1106

12

R1122

R1122 56R2J-4-GP

56R2J-4-GP

R1129

1 2

10KR2J-3-GP

DJ1

Title

Size Document Number Rev

Custom

Date: Sheet

12

C1102

SCD01U16V2KX-3GP

12

C1104

SCD01U16V2KX-3GP

+V_DDR_REF

R1108

1 2

Do Not Stuff

+3.3V_RUN+1.05V_VCCP

12

R1123

DY

Do Not Stuff

TSATN#_KBC

C

Q1101

B

DY

Do Not Stuff

E

+3.3V_RUN

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., H sichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., H sichih, Taipei Hsien 221 , Taiwan, R.O.C.

Taipei Hsien 221 , Taiwan, R.O.C.

Cantiga-DMI/CFG(2/6)

DJ1 Montevina UMA

1

C1103

C1101

11 88Friday, February 26, 2010

+1.5V_SUS

R1102

R1102 1KR2F-3-GP

1KR2F-3-GP

1 2

12

R1106

R1106 1KR2F-3-GP

1KR2F-3-GP

1 2

TSATN#_KBC 37

of

R1104

3K01R2F-3-GP

A00

5

SSID = MCH

4

3

2

1

M_A_DQ[63..0]18

D D

C C

B B

M_A_DQ[63..0]

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63

NB1D

AJ38

SA_DQ_0

AJ41

SA_DQ_1

AN38

SA_DQ_2

AM38

SA_DQ_3

AJ36

SA_DQ_4

AJ40

SA_DQ_5

AM44

SA_DQ_6

AM42

SA_DQ_7

AN43

SA_DQ_8

AN44

SA_DQ_9

AU40

SA_DQ_10

AT38

SA_DQ_11

AN41

SA_DQ_12

AN39

SA_DQ_13

AU44

SA_DQ_14

AU42

SA_DQ_15

AV39

SA_DQ_16

AY44

SA_DQ_17

BA40

SA_DQ_18

BD43

SA_DQ_19

AV41

SA_DQ_20

AY43

SA_DQ_21

BB41

SA_DQ_22

BC40

SA_DQ_23

AY37

SA_DQ_24

BD38

SA_DQ_25

AV37

SA_DQ_26

AT36

SA_DQ_27

AY38

SA_DQ_28

BB38

SA_DQ_29

AV36

SA_DQ_30

AW36

SA_DQ_31

BD13

SA_DQ_32

AU11

SA_DQ_33

BC11

SA_DQ_34

BA12

SA_DQ_35

AU13

SA_DQ_36

AV13

SA_DQ_37

BD12

SA_DQ_38

BC12

SA_DQ_39

BB9

SA_DQ_40

BA9

SA_DQ_41

AU10

SA_DQ_42

AV9

SA_DQ_43

BA11

SA_DQ_44

BD9

SA_DQ_45

AY8

SA_DQ_46

BA6

SA_DQ_47

AV5

SA_DQ_48

AV7

SA_DQ_49

AT9

SA_DQ_50

AN8

SA_DQ_51

AU5

SA_DQ_52

AU6

SA_DQ_53

AT5

SA_DQ_54

AN10

SA_DQ_55

AM11

SA_DQ_56

AM5

SA_DQ_57

AJ9

SA_DQ_58

AJ8

SA_DQ_59

AN12

SA_DQ_60

AM13

SA_DQ_61

AJ11

SA_DQ_62

AJ12

SA_DQ_63

CANTIGA-GM-GP-U-NF

4 OF 10

BD21

SA_BS_0

BG18

SA_BS_1

AT25

SA_BS_2

BB20

SA_RAS#

BD20

SA_CAS#

AY20

SA_WE#

SA_DM_0 SA_DM_1 SA_DM_2 SA_DM_3 SA_DM_4 SA_DM_5 SA_DM_6 SA_DM_7

SA_DQS_0 SA_DQS_1 SA_DQS_2 SA_DQS_3 SA_DQS_4 SA_DQS_5 SA_DQS_6

SA_DQS_7 SA_DQS#_0 SA_DQS#_1 SA_DQS#_2 SA_DQS#_3 SA_DQS#_4 SA_DQS#_5 SA_DQS#_6 SA_DQS#_7

SA_MA_0 SA_MA_1 SA_MA_2 SA_MA_3 SA_MA_4 SA_MA_5 SA_MA_6 SA_MA_7 SA_MA_8

SA_MA_9 SA_MA_10 SA_MA_11 SA_MA_12 SA_MA_13 SA_MA_14

DDR SYSTEM MEMORY A

AT41 AY41 AU39 BB12 AY6 AT7 AJ5

AJ44 AT44 BA43 BC37 AW12 BC8 AU8 AM7 AJ43 AT43 BA44 BD37 AY12 BD8 AU9 AM8

BA21 BC24 BG24 BH24 BG25 BA24 BD24 BG27 BF25 AW24 BC21 BG26 BH26 BH17 AY25

M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7

M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6

M_A_DQS7 M_A_DQS# 0 M_A_DQS# 1 M_A_DQS# 2 M_A_DQS# 3 M_A_DQS# 4 M_A_DQS# 5 M_A_DQS# 6 M_A_DQS# 7

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14

M_A_DM0

AM37

M_A_DM[7..0]

M_A_DQS[7..0]

M_A_DQS#[7..0]

M_A_A[14. .0]

M_A_BS0 18 M_A_BS1 18 M_A_BS2 18

M_A_RAS# 1 8 M_A_CAS# 1 8 M_A_WE # 18

M_A_DM[7..0] 18

M_A_DQS[7..0] 18

M_A_DQS#[7..0] 18

M_A_A[14. .0] 18

M_B_DQ[63..0]19

M_B_DQ[63..0]

M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ1 0 M_B_DQ1 1 M_B_DQ1 2 M_B_DQ1 3 M_B_DQ1 4 M_B_DQ1 5 M_B_DQ1 6 M_B_DQ1 7 M_B_DQ1 8 M_B_DQ1 9 M_B_DQ2 0 M_B_DQ2 1 M_B_DQ2 2 M_B_DQ2 3 M_B_DQ2 4 M_B_DQ2 5 M_B_DQ2 6 M_B_DQ2 7 M_B_DQ2 8 M_B_DQ2 9 M_B_DQ3 0 M_B_DQ3 1 M_B_DQ3 2 M_B_DQ3 3 M_B_DQ3 4 M_B_DQ3 5 M_B_DQ3 6 M_B_DQ3 7 M_B_DQ3 8 M_B_DQ3 9 M_B_DQ4 0 M_B_DQ4 1 M_B_DQ4 2 M_B_DQ4 3 M_B_DQ4 4 M_B_DQ4 5 M_B_DQ4 6 M_B_DQ4 7 M_B_DQ4 8 M_B_DQ4 9 M_B_DQ5 0 M_B_DQ5 1 M_B_DQ5 2 M_B_DQ5 3 M_B_DQ5 4 M_B_DQ5 5 M_B_DQ5 6 M_B_DQ5 7 M_B_DQ5 8 M_B_DQ5 9 M_B_DQ6 0 M_B_DQ6 1 M_B_DQ6 2 M_B_DQ6 3

NB1E

AK47

SB_DQ_0

AH46

SB_DQ_1

AP47

SB_DQ_2

AP46

SB_DQ_3

AJ46

SB_DQ_4

AJ48

SB_DQ_5

AM48

SB_DQ_6

AP48

SB_DQ_7

AU47

SB_DQ_8

AU46

SB_DQ_9

BA48

SB_DQ_10

AY48

SB_DQ_11

AT47

SB_DQ_12

AR47

SB_DQ_13

BA47

SB_DQ_14

BC47

SB_DQ_15

BC46

SB_DQ_16

BC44

SB_DQ_17

BG43

SB_DQ_18

BF43

SB_DQ_19

BE45

SB_DQ_20

BC41

SB_DQ_21

BF40

SB_DQ_22

BF41

SB_DQ_23

BG38

SB_DQ_24

BF38

SB_DQ_25

BH35

SB_DQ_26

BG35

SB_DQ_27

BH40

SB_DQ_28

BG39

SB_DQ_29

BG34

SB_DQ_30

BH34

SB_DQ_31

BH14

SB_DQ_32

BG12

SB_DQ_33

BH11

SB_DQ_34

BG8

SB_DQ_35

BH12

SB_DQ_36

BF11

SB_DQ_37

BF8

SB_DQ_38

BG7

SB_DQ_39

BC5

SB_DQ_40

BC6

SB_DQ_41

AY3

SB_DQ_42

AY1

SB_DQ_43

BF6

SB_DQ_44

BF5

SB_DQ_45

BA1

SB_DQ_46

BD3

SB_DQ_47

AV2

SB_DQ_48

AU3

SB_DQ_49

AR3

SB_DQ_50

AN2

SB_DQ_51

AY2

SB_DQ_52

AV1

SB_DQ_53

AP3

SB_DQ_54

AR1

SB_DQ_55

AL1

SB_DQ_56

AL2

SB_DQ_57

AJ1

SB_DQ_58

AH1

SB_DQ_59

AM2

SB_DQ_60

AM3

SB_DQ_61

AH3

SB_DQ_62

AJ3

SB_DQ_63

CANTIGA-GM-GP-U-NF

5 OF 10

BC16

SB_BS_0

BB17

SB_BS_1

BB33

SB_BS_2

AU17

SB_RAS#

BG16

SB_CAS#

BF14

SB_WE#

SB_DM_0 SB_DM_1 SB_DM_2 SB_DM_3 SB_DM_4 SB_DM_5 SB_DM_6 SB_DM_7

SB_DQS_0 SB_DQS_1 SB_DQS_2 SB_DQS_3 SB_DQS_4 SB_DQS_5 SB_DQS_6

SB_DQS_7 SB_DQS#_0 SB_DQS#_1 SB_DQS#_2 SB_DQS#_3 SB_DQS#_4 SB_DQS#_5 SB_DQS#_6 SB_DQS#_7

SB_MA_0 SB_MA_1 SB_MA_2 SB_MA_3 SB_MA_4 SB_MA_5 SB_MA_6 SB_MA_7 SB_MA_8

SB_MA_9 SB_MA_10 SB_MA_11 SB_MA_12 SB_MA_13 SB_MA_14

DDR SYSTEM MEMORY B

AY47 BD40 BF35 BG11 BA3 AP1 AK2

AL47 AV48 BG41 BG37 BH9 BB2 AU1 AN6 AL46 AV47 BH41 BH37 BG9 BC2 AT2 AN5

AV17 BA25 BC25 AU25 AW25 BB28 AU28 AW28 AT33 BD33 BB16 AW33 AY33 BH15 AU33

M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7

M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7 M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14

M_B_DM0

AM47

M_B_DM[7..0]

M_B_DQS[7..0]

M_B_DQS#[7..0]

M_B_A[14..0]

M_B_BS0 19 M_B_BS1 19 M_B_BS2 19

M_B_RAS# 19 M_B_CAS# 19 M_B_W E# 19

M_B_DM[7..0] 19

M_B_DQS[7..0] 19

M_B_DQS#[7..0] 19

M_B_A[14..0] 19

A A

5

4

3

2

DJ1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Custom

Date: Sheet

DJ1 Montevina UMA

Taipei Hsien 221, Taiwan, R.O.C.

Cantiga-DDR(3/6)

12 88Friday, February 26, 2010

1

of

A00

5

4

3

2

1

SSID = MCH

T37 T36

H44 J46 L44 L40 N41 P48 N44 T43 U43 Y43 Y48 Y36 AA43 AD37 AC47 AD39

H43 J44 L43 L41 N40 P47 N43 T42 U42 Y42 W47 Y37 AA42 AD36 AC48 AD40

J41 M46 M47 M40 M42 R48 N38 T40 U37 U40 Y40 AA46 AA37 AA40 AD43 AC46

J42 L46 M48 M39 M43 R47 N37 T39 U36 U39 Y39 Y46 AA36 AA39 AD42 AD46

+3.3V_RUN

+1.05V_VCCP

1 2

PEG_CMP

DDC_DATA_CON 55

R1303

R1303 49D9R2F-GP

49D9R2F-GP

Place R1303 close to MCH within 500 mils.

10 OF 10

VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF

VSS NCTF

VSS_NCTF VSS_NCTF

VSS SCB

NC

10 OF 10

VSS_SCB VSS_SCB VSS_SCB VSS_SCB VSS_SCB

NC#E1 NC#D2 NC#C3 NC#B4 NC#A5

NC#A6 NC#A43 NC#A44 NC#B45 NC#C46 NC#D47 NC#B47 NC#A46 NC#F48 NC#E48 NC#C48 NC#B48

AH8

VSS

Y8

VSS

L8

VSS

E8

VSS

B8

VSS

AY7

VSS

AU7

VSS

AN7

VSS

AJ7

VSS

AE7

VSS

AA7

VSS

N7

VSS

J7

VSS

BG6

VSS

BD6

VSS

AV6

VSS

AT6

VSS

AM6

VSS

M6

VSS

C6

VSS

BA5

VSS

AH5

VSS

AD5

VSS

Y5

VSS

L5

VSS

J5

VSS

H5

VSS

F5

VSS

BE4

VSS

BC3

VSS

AV3

VSS

AL3

VSS

R3

VSS

P3

VSS

F3

VSS

BA2

VSS

AW2

VSS

AU2

VSS

AR2

VSS

AP2

VSS

AJ2

VSS

AH2

VSS

AF2

VSS

AE2

VSS

AD2

VSS

AC2

VSS

Y2

VSS

M2

VSS

K2

VSS

AM1

VSS

AA1

VSS

P1

VSS

H1

VSS

U24

VSS

U28

VSS

U25

VSS

U29

VSS

AF32 AB32 V32 AJ30 AM29 AF29 AB29 U26 U23 AL20 V20 AC19 AL17 AJ17 AA17 U17

GMCH_GND1

BH48

GMCH_GND2

BH1

GMCH_GND3

A48

GMCH_GND4

C1 A3

E1 D2 C3 B4 A5 A6 A43 A44 B45 C46 D47 B47 A46 F48 E48 C48 B48

+3.3V_RUN

CRT_IREF routing Trace width use 20 mil.

TP1303TP1303

NCTF

TP1304TP1304 TP1301TP1301

TP1305TP1305

RN1301

1 2 3

SRN2K2J-1-GP

4

LDDC_CLK LDDC_DATA

+3.3V_RUN

M_BLUE55

M_GREEN55

M_RED55

GMCH_HSYNC55

GMCH_VSYNC55

LBKLT_CTL54 GMCH_BL_ON37

RN1302

1

4

23

SRN10KJ-5-GP

LDDC_CLK54 LDDC_DATA54

LCDVDD_EN54

R1302

12

2K37R2F-GP

TP1302

VGA_TXACLK-54 VGA_TXACLK+54

VGA_TXAOUT0-54 VGA_TXAOUT1-54 VGA_TXAOUT2-54

VGA_TXAOUT0+54 VGA_TXAOUT1+54 VGA_TXAOUT2+54

R1301 75R2F-2-GPR1301 75R2F-2-GP

1 2

R1305 75R2F-2-GPR1305 75R2F-2-GP

1 2

R1306 75R2F-2-GPR1306 75R2F-2-GP

1 2

M_BLUE

M_GREEN

M_RED

R131033R2J-2-GP R131033R 2J-2-GP

1 2

R13111K02R2F-1-GP R13111K02R2F-1-GP

1 2

R131233R2J-2-GP R131233R 2J-2-GP

1 2

DDC_CLK_CON55

L_CTRL_CLK L_CTRL_DATA

LIBG LVDS_VBG

1

Do Not Stuff

TV_DACA TV_DACB TV_DACC

R1307 150R2F-1-GPR1307 150R2F-1-GP

1 2

R1308 150R2F-1-GPR1308 150R2F-1-GP

1 2

R1309 150R2F-1-GPR1309 150R2F-1-GP

1 2

GMCH_DDCCLK GMCH_DDCDATA GMCH_HS CRT_IREF GMCH_VS

L32 G32 M32

M33 K33

J33

M29 C44 B43 E37 E38 C41 C40 B37 A37

H47 E46 G40 A40

H48 D45 F40 B40

A41 H38 G37

J37

B42 G38 F37 K37

F25 H25 K25

H24

C31 E32

E28

G28

J28

G29

H32

J32

J29 E29 L29

GMCH_DDCDATA

DDC_CLK_CON

NB1C

L_BKLT_CTRL L_BKLT_EN L_CTRL_CLK

L_CTRL_DATA L_DDC_CLK L_DDC_DATA

L_VDD_EN LVDS_IBG LVDS_VBG LVDS_VREFH LVDS_VREFL LVDSA_CLK# LVDSA_CLK LVDSB_CLK# LVDSB_CLK

LVDSA_DATA#_0 LVDSA_DATA#_1 LVDSA_DATA#_2 LVDSA_DATA#_3

LVDSA_DATA_0 LVDSA_DATA_1 LVDSA_DATA_2 LVDSA_DATA_3

LVDSB_DATA#_0 LVDSB_DATA#_1 LVDSB_DATA#_2 LVDSB_DATA#_3

LVDSB_DATA_0 LVDSB_DATA_1 LVDSB_DATA_2 LVDSB_DATA_3

TVA_DAC TVB_DAC TVC_DAC

TV_RTN

TV_DCONSEL_0 TV_DCONSEL_1

CRT_BLUE

CRT_GREEN

CRT_RED

CRT_IRTN

CRT_DDC_CLK CRT_DDC_DATA CRT_HSYNC CRT_TVO_IREF CRT_VSYNC

CANTIGA-GM-GP-U-NF

5

6

+3.3V_RUN

U1301

34

2

1

2N7002EDW-GP

LVDS

TV VGA

3 OF 10

PEG_COMPI

PEG_COMPO

PEG_RX#_0 PEG_RX#_1 PEG_RX#_2 PEG_RX#_3 PEG_RX#_4 PEG_RX#_5 PEG_RX#_6 PEG_RX#_7 PEG_RX#_8

PEG_RX#_9 PEG_RX#_10 PEG_RX#_11 PEG_RX#_12 PEG_RX#_13 PEG_RX#_14 PEG_RX#_15

PEG_RX_0 PEG_RX_1 PEG_RX_2 PEG_RX_3 PEG_RX_4 PEG_RX_5 PEG_RX_6 PEG_RX_7 PEG_RX_8

PEG_RX_9 PEG_RX_10 PEG_RX_11 PEG_RX_12 PEG_RX_13 PEG_RX_14 PEG_RX_15

PEG_TX#_0 PEG_TX#_1 PEG_TX#_2 PEG_TX#_3 PEG_TX#_4 PEG_TX#_5 PEG_TX#_6 PEG_TX#_7 PEG_TX#_8 PEG_TX#_9

PEG_TX#_10 PEG_TX#_11 PEG_TX#_12

PCI-EXPRESS GRAPHICS

PEG_TX#_13 PEG_TX#_14 PEG_TX#_15

PEG_TX_0 PEG_TX_1 PEG_TX_2 PEG_TX_3 PEG_TX_4 PEG_TX_5 PEG_TX_6 PEG_TX_7 PEG_TX_8

PEG_TX_9 PEG_TX_10 PEG_TX_11 PEG_TX_12 PEG_TX_13 PEG_TX_14 PEG_TX_15

RN1303

23 1

4

SRN2K2J-1-GP

DDC_DATA_CON

GMCH_DDCCLK

9 OF 10

NB1I

AU48

VSS

AR48

VSS

AL48

VSS

BB47

VSS

AW47

VSS

AN47

VSS

AJ47

VSS

AF47

VSS

AD47

VSS

AB47

VSS

Y47

D D

C C

B B

VSS

T47

VSS

N47

VSS

L47

VSS

G47

VSS

BD46

VSS

BA46

VSS

AY46

VSS

AV46

VSS

AR46

VSS

AM46

VSS

V46

VSS

R46

VSS

P46

VSS

H46

VSS

F46

VSS

BF44

VSS

AH44

VSS

AD44

VSS

AA44

VSS

Y44

VSS

U44

VSS

T44

VSS

M44

VSS

F44

VSS

BC43

VSS

AV43

VSS

AU43

VSS

AM43

VSS

J43

VSS

C43

VSS

BG42

VSS

AY42

VSS

AT42

VSS

AN42

VSS

AJ42

VSS

AE42

VSS

N42

VSS

L42

VSS

BD41

VSS

AU41

VSS

AM41

VSS

AH41

VSS

AD41

VSS

AA41

VSS

Y41

VSS

U41

VSS

T41

VSS

M41

VSS

G41

VSS

B41

VSS

BG40

VSS

BB40

VSS

AV40

VSS

AN40

VSS

H40

VSS

E40

VSS

AT39

VSS

AM39

VSS

AJ39

VSS

AE39

VSS

N39

VSS

L39

VSS

B39

VSS

BH38

VSS

BC38

VSS

BA38

VSS

AU38

VSS

AH38

VSS

AD38

VSS

AA38

VSS

Y38

VSS

U38

VSS

T38

VSS

J38

VSS

F38

VSS

C38

VSS

BF37

VSS

BB37

VSS

AW37

VSS

AT37

VSS

AN37

VSS

AJ37

VSS

H37

VSS

C37

VSS

BG36

VSS

BD36

VSS

AK15

VSS

AU36

VSS

CANTIGA-GM-GP-U-NF

VSS

9 OF 10

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

AM36 AE36 P36 L36 J36 F36 B36 AH35 AA35 Y35 U35 T35 BF34 AM34 AJ34 AF34 AE34 W34 B34 A34 BG33 BC33 BA33 AV33 AR33 AL33 AH33 AB33 P33 L33 H33 N32 K32 F32 C32 A31 AN29 T29 N29 K29 H29 F29 A29 BG28 BD28 BA28 AV28 AT28 AR28 AJ28 AG28 AE28 AB28 Y28 P28 K28 H28 F28 C28 BF26 AH26 AF26 AB26 AA26 C26 B26 BH25 BD25 BB25 AV25 AR25 AJ25 AC25 Y25 N25 L25 J25 G25 E25 BF24 AD12 AY24 AT24 AJ24 AH24 AF24 AB24 R24 L24 K24 J24 G24 F24 E24 BH23 AG23 Y23 B23 A23 AJ6

NB1J

BG21

VSS

L12

VSS

AW21

VSS

AU21

VSS

AP21

VSS

AN21

VSS

AH21

VSS

AF21

VSS

AB21

VSS

R21

VSS

M21

VSS

J21

VSS

G21

VSS

BC20

VSS

BA20

VSS

AW20

VSS

AT20

VSS

AJ20

VSS

AG20

VSS

Y20

VSS

N20

VSS

K20

VSS

F20

VSS

C20

VSS

A20

VSS

BG19

VSS

A18

VSS

BG17

VSS

BC17

VSS

AW17

VSS

AT17

VSS

R17

VSS

M17

VSS

H17

VSS

C17

VSS

BA16

VSS

AU16

VSS

AN16

VSS

N16

VSS

K16

VSS

G16

VSS

E16

VSS

BG15

VSS

AC15

VSS

W15

VSS

A15

VSS

BG14

VSS

AA14

VSS

C14

VSS

BG13

VSS

BC13

VSS

BA13

VSS

AN13

VSS

AJ13

VSS

AE13

VSS

N13

VSS

L13

VSS

G13

VSS

E13

VSS

BF12

VSS

AV12

VSS

AT12

VSS

AM12

VSS

AA12

VSS

J12

VSS

A12

VSS

BD11

VSS

BB11

VSS

AY11

VSS

AN11

VSS

AH11

VSS

Y11

VSS

N11

VSS

G11

VSS

C11

VSS

BG10

VSS

AV10

VSS

AT10

VSS

AJ10

VSS

AE10

VSS

AA10

VSS

M10

VSS

BF9

VSS

BC9

VSS

AN9

VSS

AM9

VSS

AD9

VSS

G9

VSS

B9

VSS

BH8

VSS

BB8

VSS

AV8

VSS

AT8

VSS

CANTIGA-GM-GP-U-NF

VSS

A A

DJ1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu R d., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu R d., Hsichih, Taipei Hsien 221, Taiwan, R.O.C .

Taipei Hsien 221, Taiwan, R.O.C .

Title

Cantiga-GND/LVDS/VGA(4/6)

Size Doc ument Number Rev

Custom

Date: Sheet

5

4

3

2

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C .

DJ1 Montevina UMA

1

A00

of

13 88Friday, February 26, 2010

5

4

3

2

1

SSID = MCH

+1.05V_VCCP

7 OF 10

NB1G

+1.5V_SUS

D D

12

C1408

SC1U6D3V2KX-GP

Close to (G)MCH

SC22U6D3V5MX-2GP

C1415

C1416

12

C C

C1416

12

On the edge

+1.05V_VCCP

12

C1429

B B

A A

12

C1428

SCD1U16V2KX-3GP

SC4D7U6D3V5KX-3GP

TP1401TP1401 TP1402TP1402

5

C1430

SCD1U10V2KX-5GP

VCC_AXG_SENSE VSS_AXG_SENSE

NB1G

AP33

VCC_SM

AN33

VCC_SM

BH32

VCC_SM

BG32

VCC_SM

BF32

VCC_SM

BD32

VCC_SM

BC32

VCC_SM

BB32

VCC_SM

BA32

VCC_SM

AY32

VCC_SM

AW32

VCC_SM

AV32

VCC_SM

AU32

VCC_SM

AT32

VCC_SM

AR32

VCC_SM

AP32

VCC_SM

AN32

VCC_SM

BH31

VCC_SM

BG31

VCC_SM

BF31

VCC_SM

BG30

VCC_SM

BH29

VCC_SM

BG29

VCC_SM

BF29

VCC_SM

BD29

VCC_SM

BC29

VCC_SM

BB29

VCC_SM

BA29

VCC_SM

AY29

VCC_SM

AW29

VCC_SM

AV29

VCC_SM

AU29

VCC_SM

AT29

VCC_SM

AR29

VCC_SM

AP29

VCC_SM

BA36

VCC_SM/NC

BB24

VCC_SM/NC

BD16

VCC_SM/NC

BB21

VCC_SM/NC

AW16

VCC_SM/NC

AW13

VCC_SM/NC

AT13

VCC_SM/NC

Y26

VCC_AXG

AE25

VCC_AXG

AB25

VCC_AXG

AA25

VCC_AXG

AE24

VCC_AXG

AC24

VCC_AXG

AA24

VCC_AXG

Y24

VCC_AXG

AE23

VCC_AXG

AC23

VCC_AXG

AB23

VCC_AXG

AA23

VCC_AXG

AJ21

VCC_AXG

AG21

VCC_AXG

AE21

VCC_AXG

AC21

VCC_AXG

AA21

VCC_AXG

Y21

VCC_AXG

AH20

VCC_AXG

AF20

VCC_AXG

AE20

VCC_AXG

AC20

VCC_AXG

AB20

VCC_AXG

AA20

VCC_AXG

T17

VCC_AXG

T16

VCC_AXG

AM15

VCC_AXG

AL15

VCC_AXG

AE15

VCC_AXG

AJ15

VCC_AXG

AH15

VCC_AXG

AG15

VCC_AXG

AF15

VCC_AXG

AB15

VCC_AXG

AA15

VCC_AXG

Y15

VCC_AXG

V15

VCC_AXG

U15

VCC_AXG

AN14

VCC_AXG

AM14

VCC_AXG

U14

VCC_AXG

T14

VCC_AXG

AJ14

VCC_AXG_SENSE

AH14

VSS_AXG_SENSE

CANTIGA-GM-GP-U-NF

3000mA

8700mA

POWER

VCC SMVCC GFX

VCC GFX NCTF

4

7 OF 10

VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF

VCC_SM_LF VCC_SM_LF VCC_SM_LF VCC_SM_LF VCC_SM_LF VCC_SM_LF VCC_SM_LF

VCC SM LF

W28 V28 W26 V26 W25 V25 W24 V24 W23 V23 AM21 AL21 AK21 W21 V21 U21 AM20 AK20 W20 U20 AM19 AL19 AK19 AJ19 AH19 AG19 AF19 AE19 AB19 AA19 Y19 W19 V19 U19 AM17 AK17 AH17 AG17 AF17 AE17 AC17 AB17 Y17 W17 V17 AM16 AL16 AK16 AJ16 AH16 AG16 AF16 AE16 AC16 AB16 AA16 Y16 W16 V16 U16

AV44 BA37 AM40 AV21 AY5 AM10 BB13

12

SM_LF1_GMCH SM_LF2_GMCH SM_LF3_GMCH SM_LF4_GMCH SM_LF5_GMCH SM_LF6_GMCH SM_LF7_GMCH

12

C1414

SCD1U10V2KX-5GP

12

C1417

SCD1U10V2KX-5GP

Coupling CAP

12

C1411

SCD1U10V2KX-5GP

12

C1418

SCD1U10V2KX-5GP

12

C1413

SC1U10V3KX-3GP

12

C1401

SCD22U10V2KX-1GP

3

12

C1412

TC1401

DY

TC1401

DY

Do Not Stuff

SC10U6D3V5KX-1GP

12

1

C1419

2

SCD22U10V2KX-1GP

Supply Signal Group

+1.05V_VCCP

+1.05V_VCCP 50mA

+1.5V_RUN VCCD_TVDAC 35mA

+1.8V_SUS

+1.5V_RUN VCCA_PEG_BG 414uA

+3.3V_RUN VCC_HV 105.3mA

12

C1421

C1420

SC1U10V3KX-3GP

SCD47U6D3V2KX-GP

+1.05V_VCCP

12

C1427

SC10U6D3V5KX-1GP

12

C1424

SC10U6D3V5KX-1GP

VCCA_SM

VCCA_SM_CK 26mA

VCCA_HPLL 24mA

VCCD_PEG_PLL

VCC_AXF+1.05V_VCCP

VCC_SM_CK

12

C1422

SC1U10V3KX-3GP

12

C1402

SCD1U10V2KX-5GP

12

C1425

SCD1U16V2KX-3GP

Coupling CAP

Imax

3060mAVCC+1.05V_VCCP

852mAVTT

1782mAVCC_PEG

456mAVCC_DMI

720mA+1.05V_VCCP

139.2mAVCCA_MPLL

157.2mAVCCD_HPLL

50mAVCCA_PEG_PLL

321.35mA

3000mAVCC_SM

124mA

2

12

C1405

C1403

SC1U6D3V2KX-GP

12

C1423

C1426

SCD1U16V2KX-3GP

SC1U6D3V2KX-GP

SCD1U16V2KX-3GP

NB1F

AG34

VCC

AC34

VCC

AB34

VCC

AA34

VCC

Y34

VCC

V34

VCC

U34

VCC

AM33

VCC

AK33

VCC

AJ33

VCC

AG33

VCC

AF33

VCC

AE33

AC33

AA33

W33

AH28

AF28

AC28

AA28 AJ26

AG26

AE26 AC26 AH25 AG25

AF25 AG24

AJ23 AH23

AF23

3060mA

VCC VCC VCC

Y33

VCC VCC

V33

VCC

U33

VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC

T32

VCC

CANTIGA-GM-GP-U-NF

DJ1

Title

Size Document Number Rev

Custom

Date: Sheet

VCC CORE

POWER

Cantiga-Power(5/6)

DJ1 Montevina UMA

6 OF 10

+1.05V_VCCP

AM32

VCC_NCTF

AL32

VCC_NCTF

AK32

VCC_NCTF

AJ32

VCC_NCTF

AH32

VCC_NCTF

AG32

VCC_NCTF

AE32

VCC_NCTF

AC32

VCC_NCTF

AA32

VCC_NCTF

Y32

VCC_NCTF

W32

VCC_NCTF

U32

VCC_NCTF

AM30

VCC_NCTF

AL30

VCC_NCTF

AK30

VCC_NCTF

AH30

VCC_NCTF

AG30

VCC_NCTF

AF30

VCC_NCTF

AE30

VCC_NCTF

AC30

VCC_NCTF

AB30

VCC_NCTF

AA30

VCC_NCTF

Y30

VCC_NCTF

W30

VCC_NCTF

V30

VCC_NCTF

U30

VCC_NCTF

AL29

VCC_NCTF

AK29

VCC_NCTF

AJ29

VCC_NCTF

AH29

VCC_NCTF

AG29

VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF

1

AE29 AC29 AA29 Y29 W29 V29 AL28 AK28 AL26 AK26 AK25 AK24 AK23

of

14 88Wednesday, February 24, 2010

of

14 88Wednesday, February 24, 2010

of

14 88Wednesday, February 24, 2010

VCC NCTF

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

A00

5

+1.05V_VCCP

R1502

1 2

Do Not Stuff

D D

C C

B B

A A

1 2

+1.05V_VCCP

BLM18PG121SN1D-GP

120ohm 100MHz

BLM18PG121SN1D-GP

120ohm 100MHz

+1.05V_VCCP

BLM18BB221SN1D-GP

220ohm 100MHz

+1.5V_RUN

SC1U10V3KX-3GP

+3.3V_CRT_LDO

R1504

Do Not Stuff

L1502

1 2

L1501

1 2

L1503

1 2

L1504

1 2

PBY160808T-181Y-GP

C1549

12

C1502

SCD1U16V2KX-3GP

12

C1511

SCD1U16V2KX-3GP

DY

Do Not Stuff

SC10U6D3V5KX-1GP

+5V_RUN

12

C1554

C1554 SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

M_VCCA_DPLLA

12

C1503

C1504

DY

Do Not Stuff

SCD1U16V2KX-3GP

M_VCCA_DPLLB

12

C1512

C1513

DY

Do Not Stuff

SCD1U16V2KX-3GP

M_VCCA_HPLL

12

C1516

C1517

C1517 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SC4D7U6D3V3KX-GP

M_VCCA_MPLL

12

C1521

C1520

SCD1U10V2KX-5GP

1D05V_RUN_PEGPLL

12

C1533

C1529

SCD1U10V2KX-5GP

1D5VRUN_QDAC

12

C1540

C1541

C1541 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD01U16V2KX-3GP

U1502

1

EN

2

GND

3

VIN

4

VOUT

5

NC#5

G9091-330T12U-GP

74.09091.H3F

Second = 74.09198.07F

+3.3V_CRT_LDO

1D8V_TXLVDS_S3

+1.5V_RUN

+1.05V_VCCP

+1.5V_RUN

+1.05V_VCCP

+1.8V_NB_S0

1 2

R1510

1 2

Do Not Stuff

R1513

1 2

Do Not Stuff

R1516

1 2

Do Not Stuff

Reserved for CRT ripple

5

R1503

Do Not Stuff

R1505

Do Not Stuff

R1508

Do Not Stuff

12

DY

R1515

1 2

Do Not Stuff

R1520

1 2

Do Not Stuff

R1521

1 2

Do Not Stuff

4

12

TC1502

DY

Do Not Stuff

12

+3.3V_TV_DAC+3.3V_CRT_LDO

VCCD_TVDAC

12

C1559

12

4

12

C1506

C1505

SCD1U10V2KX-5GP

SCD01U16V2KX-3GP

12

C1515

C1514

SCD1U10V2KX-5GP

SCD01U16V2KX-3GP

C1518

C1518 SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

C1519

C1519 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

1D05V_SM

12

C1501

C1524

Do Not Stuff

12

C1534

DY

C1530

Do Not Stuff

SC22U6D3V5MX-2GP

12

DY

Do Not Stuff

C1537

12

C1560

SCD1U10V2KX-5GP

SCD01U16V2KX-3GP

C1547

C1547 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

C1555

C1555 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

3D3V_CRTDAC_S0

M_VCCA_DAC_BG

M_VCCA_DPLLA

M_VCCA_DPLLB

M_VCCA_HPLL

M_VCCA_MPLL

VCCA_PEG_BG

1D05V_RUN_PEGPLL

12

C1525

SC22U6D3V5MX-2GP

SC4D7U6D3V3KX-GP

1D05V_SM_CK

12

C1531

SCD1U10V2KX-5GP

12

C1538

DY

Do Not Stuff

VCC_HDA

1D5VRUN_QDAC

1D05V_RUN_HPLL

1D05V_RUN_PEGPLL

12

SCD1U10V2KX-5GP

1D8V_SUS_DLVDS

B27 A26

A25 B25

F47

L48

AD1

AE1

J48

J47

AD48

AA48

AR20 AP20 AN20 AR17

C1526

AP17 AN17 AT16 AR16

SC1U10V3KX-3GP

AP16

AP28 AN28 AP25 AN25

AN24 AM28 AM26 AM25

AL25 AM24

AL24 AM23

AL23

B24 A24

A32

M25

L28

AF1

AA47

M38

C1548

L37

NB1H

VCCA_CRT_DAC VCCA_CRT_DAC

VCCA_DAC_BG VSSA_DAC_BG

414uA

60.31mA

64.8mA

24mA

139.2mA

13.2mA

50mA

720mA

37.5mA

79mA

50mA

35mA

2mA

157.2mA

50mA

R1522

1 2

Do Not Stuff

VCCA_DPLLA

VCCA_DPLLB

VCCA_HPLL

VCCA_MPLL

VCCA_LVDS

VSSA_LVDS

VCCA_PEG_BG

VCCA_PEG_PLL

VCCA_SM VCCA_SM VCCA_SM VCCA_SM VCCA_SM VCCA_SM VCCA_SM VCCA_SM VCCA_SM

VCCA_SM_CK VCCA_SM_CK VCCA_SM_CK VCCA_SM_CK VCCA_SM_CK VCCA_SM_CK_NCTF VCCA_SM_CK_NCTF VCCA_SM_CK_NCTF VCCA_SM_CK_NCTF VCCA_SM_CK_NCTF VCCA_SM_CK_NCTF VCCA_SM_CK_NCTF VCCA_SM_CK_NCTF

VCCA_TV_DAC VCCA_TV_DAC

VCC_HDA

VCCD_TVDAC

VCCD_QDAC

VCCD_HPLL

VCCD_PEG_PLL

VCCD_LVDS VCCD_LVDS

CANTIGA-GM-GP-U-NF

3

CRTPLLA PEGA SM

A LVDS

TV

HDA

LVDS

POWER

A CK

118.8mA

D TV/CRT

DMI

VCC_HDA

8 OF 10

852mA

VTT

VCC_AXF VCC_AXF VCC_AXF

AXF

321.35mA

VCC_SM_CK VCC_SM_CK VCC_SM_CK VCC_SM_CK

124mA

SM CK

VCC_TX_LVDS

VCC_HV VCC_HV VCC_HV

HV

105.3mA

VCC_PEG VCC_PEG VCC_PEG VCC_PEG VCC_PEG

1782mA

PEG

VCC_DMI VCC_DMI VCC_DMI VCC_DMI

456mA

VTTLF VTTLF VTTLF

VTTLF

VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT

U13 T13 U12 T12 U11 T11 U10 T10 U9 T9 U8 T8 U7 T7 U6 T6 U5 T5 V3 U3 V2 U2 T2 V1 U1

B22 B21 A21

BF21 BH20 BG20 BF20

K47

C35 B35 A35

V48 U48 V47 U47 U46

AH48 AF48 AH47 AG47

A8 L1 AB2

12

C1507

SCD1U16V2KX-3GP

1D05V_VCC_AXF

1D8V_VCC_SM_CK

1D8V_TXLVDS_S3

1D05V_VCC_DMI

VTTLF1 VTTLF2 VTTLF3

1

2

12

C1508

SC1U10V3KX-3GP

12

C1522

12

C1532

SCD1U10V2KX-5GP

12

C1536

12

C1543

SC4D7U6D3V3KX-GP

1

C1551

2

SCD47U6D3V2KX-GP

2

12

C1509

SC1U10V3KX-3GP

R1509

1 2

12

Do Not Stuff

C1523

DY

Do Not Stuff

SC1U10V3KX-3GP

R1511

1 2

Do Not Stuff

R1512

R1512 1R3F-GP

1R3F-GP

1 2 12

C1535

SC10U6D3V3MX-GP

R1514

1 2

12

Do Not Stuff

C1539

C1539 SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC1KP50V2KX-1GP

12

C1544

SC10U6D3V5KX-1GP

1

C1552

2

SCD47U6D3V2KX-GP

1

SSID = MCH

+1.05V_VCCP

12

C1510

SC1U10V3KX-3GP

C1545

SC10U6D3V5KX-1GP

C1553

SCD47U6D3V2KX-GP

12

TC1501

EC1501

DY

Do Not Stuff

SC1U10V3KX-3GP

+1.05V_VCCP

+1.5V_SUS

+1.8V_NB_S0

12

C1546

SC10U6D3V5KX-1GP

R1501

1 2

12

Do Not Stuff

C1550

C1550 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

DJ1

Title

Size Document Number Rev

Custom

Date: Sheet

+3.3V_RUN +1.8V_NB_S0

SC1U6D3V2KX-GP

+3.3V_RUN +3.3V_VCC_HV

1 2

+1.05V_VCCP

Cantiga-Power/Filter(6/6)

DJ1 Montevina UMA

I=300mA

U1501

1

VIN

2

GND

1 2

R1523

Do Not Stuff

3

C1557

EN

4

NC#4

5

VOUT

G9091-180T11U-GP

74.09091.G3F

+3.3V_VCC_HV

+1.05V_VCCP

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

15 88Wednesday, February 24, 2010

1

NB:180mA

12

C1542

SCD1U10V2KX-5GP

of

1 2

C1558

SC1U6D3V2KX-GP

A00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

DJ1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

DJ1 Montevina UMA

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

of

16 88Wednesday, February 24, 2010

A00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

DJ1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

DJ1 Montevina UMA

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

of

17 88Wednesday, February 24, 2010

A00

5

D D

TP1801TP1801

M_A_BS212

M_A_BS012 M_A_BS112

M_A_DQ[63..0]12

C C

+V_DDR_REF

B B

+V_DDR_REF

R1806

1 2

Do Not Stuff

SCD1U10V2KX-5GP

R1807

1 2

Do Not Stuff

SCD1U10V2KX-5GP

M_VREF_CA_DIMM 0

12

C1811

M_VREF_DQ_DIMM0

12

C1817

12

C1812

C1812 SC2D2U6D3V3KX-GP

SC2D2U6D3V3KX-GP

12

C1818

C1818 SC2D2U6D3V3KX-GP

SC2D2U6D3V3KX-GP

Place between DM1 and DM2.

+0.75V_DDR_VTT

C1824

C1819

12

SC10U10V5ZY-1GP

+0.75V_DDR_VTT

A A

Place these caps close to VTT1 and VTT2.

12

C1820

C1820 SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

12

DY

12

C1822

C1821

SC1U6D3V2KX-GP

C1824 Do Not Stuff

Do Not Stuff

12

5

C1823

C1823 SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

DDR3_DRAMRST#11,19

M_ODT011 M_ODT111

+0.75V_DDR_VTT

M_VREF_CA_DIMM 0 M_VREF_DQ_DIMM0

1

4

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63

M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7

M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7

H =5.2 mm

4

DM1

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12

119

A13

80

A14

78

A15

79

A16/BA2

109

BA0

108

BA1

5

DQ0

7

DQ1

15

DQ2

17

DQ3

4

DQ4

6

DQ5

16

DQ6

18

DQ7

21

DQ8

23

DQ9

33

DQ10

35

DQ11

22

DQ12

24

DQ13

34

DQ14

36

DQ15

39

DQ16

41

DQ17

51

DQ18

53

DQ19

40

DQ20

42

DQ21

50

DQ22

52

DQ23

57

DQ24

59

DQ25

67

DQ26

69

DQ27

56

DQ28

58

DQ29

68

DQ30

70

DQ31

129

DQ32

131

DQ33

141

DQ34

143

DQ35

130

DQ36

132

DQ37

140

DQ38

142

DQ39

147

DQ40

149

DQ41

157

DQ42

159

DQ43

146

DQ44

148

DQ45

158

DQ46

160

DQ47

163

DQ48

165

DQ49

175

DQ50

177

DQ51

164

DQ52

166

DQ53

174

DQ54

176

DQ55

181

DQ56

183

DQ57

191

DQ58

193

DQ59

180

DQ60

182

DQ61

192

DQ62

194

DQ63

10

DQS0#

27

DQS1#

45

DQS2#

62

DQS3#

135

DQS4#

152

DQS5#

169

DQS6#

186

DQS7#

12

DQS0

29

DQS1

47

DQS2

64

DQS3

137

DQS4

154

DQS5

171

DQS6

188

DQS7

116

ODT0

120

ODT1

126

VREF_CA

1

VREF_DQ

30

RESET#

203

VTT1

204

VTT2

DDR3-204P-41-GP-U

62.10017.N41

RAS#

WE#

CAS#

CS0# CS1#

CKE0 CKE1

CK0#

CK1#

DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7

EVENT#

VDDSPD

NC#1 NC#2

NC#/TEST

VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8

VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18

3

M_A_DM[7..0] 12

M_A_DQS#[7..0] 12

M_A_DQS[7..0] 1 2

+1.5V_SUS

M_A_A[14..0] 12

M_A_RAS# 12 M_A_WE# 12 M_A_CAS# 12

M_CS#0 11 M_CS#1 11

M_CKE0 11 M_CKE1 11

M_CLK_DDR0 11 M_CLK_DDR#0 11

M_CLK_DDR1 11 M_CLK_DDR#1 11

ICH_SMBDATA 7,19,22,7 6 ICH_SMBCLK 7,19,22,76

PM_EXTTS#0 11

SCD1U10V2KX-5GP

3

12

C1801

DY

+1.5V_SUS

Layout Note: Place these Caps near SO-DI MMA.

12

SA0_DIM0

SA1_DIM0

C1802

C1802 Do Not Stuff

Do Not Stuff

12

R1802

R1802 10KR2J-3-GP

10KR2J-3-GP

+3.3V_RUN

SODIMM A DECOUPLING

TC1801

Do Not Stuff

DY

C1813

SCD1U16V2KX-3GP

C1813

SCD1U16V2KX-3GP

NP1

NP2

110 113 115

114 121

73 74

101

CK0

103

102

CK1

104

M_A_DM0

11

M_A_DM1

28

M_A_DM2

46

M_A_DM3

63

M_A_DM4

136

M_A_DM5

153

M_A_DM6

170

M_A_DM7

187

200

SDA

202

SCL

198

199

SA0_DIM0

197

SA0 SA1

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

SA1_DIM0

201

77 122 125

75 76 81 82 87 88 93 94 99 100 105 106 111 112 117 118 123 124

2 3 8 9 13 14 19 20 25 26 31 32 37 38 43 44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196 205 206

2

Note: If SA0 DIM0 = 0, SA1_DIM0 = 0 SO-DIMMA SPD Address is 0xA0 SO-DIMMA TS Address is 0x30

12

R1803

R1803 10KR2J-3-GP

10KR2J-3-GP

C1804

C1803

SC10U10V5ZY-1GP

12

SCD1U16V2KX-3GP

C1814

SCD1U16V2KX-3GP

C1814

SCD1U16V2KX-3GP

12

If SA0 DIM0 = 1, SA1_DIM0 = 0 SO-DIMMA SPD Address is 0xA2 SO-DIMMA TS Address is 0x32

C1807

C1806

SC10U10V5ZY-1GP

12

C1807

SC10U10V5ZY-1GP

12

C1816

C1816 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SC10U10V5ZY-1GP

C1815

2

C1805

12

C1808

SC10U10V5ZY-1GP

12

DJ1

Title

Size Document Number Rev

Date: Sheet of

DJ1 Montevina UMA

1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

DDR3-SODIMM1

1

A00

18 88Friday, February 26, 2010

A00

5

D D

M_B_DQ[63..0]12

C C

+V_DDR_REF

B B

+V_DDR_REF

A A

Place these caps close to VTT1 and VTT2.

R1906

1 2

Do Not Stuff

SCD1U10V2KX-5GP

R1907

1 2

Do Not Stuff

SCD1U10V2KX-5GP

+0.75V_DDR_VTT

M_VREF_CA_DIMM1

C1903

M_VREF_DQ_DIMM1

C1913

12

C1919

C1919 SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

5

12

C1920

C1920 SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

C1904

C1904 SC2D2U6D3V3KX-GP

SC2D2U6D3V3KX-GP

C1914

C1914 SC2D2U6D3V3KX-GP

SC2D2U6D3V3KX-GP

12

C1921

C1921 SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

DDR3_DRAMRST#11,18

C1922

C1922 SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

TP1901TP1901

M_B_BS212

M_B_BS012 M_B_BS112

M_ODT211 M_ODT311

4

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15

1

M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63

M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7

M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7

M_VREF_CA_DIMM1 M_VREF_DQ_DIMM1

H = 9.2mm

4

DM2

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12

119

A13

80

A14

78

A15

79

A16/BA2

109

BA0

108

BA1

5

DQ0

7

DQ1

15

DQ2

17

DQ3

4

DQ4

6

DQ5

16

DQ6

18

DQ7

21

DQ8

23

DQ9

33

DQ10

35

DQ11

22

DQ12

24

DQ13

34

DQ14

36

DQ15

39

DQ16

41

DQ17

51

DQ18

53

DQ19

40

DQ20

42

DQ21

50

DQ22

52

DQ23

57

DQ24

59

DQ25

67

DQ26

69

DQ27

56

DQ28

58

DQ29

68

DQ30

70

DQ31

129

DQ32

131

DQ33

141

DQ34

143

DQ35

130

DQ36

132

DQ37

140

DQ38

142

DQ39

147

DQ40

149

DQ41

157

DQ42

159

DQ43

146

DQ44

148

DQ45

158

DQ46

160

DQ47

163

DQ48

165

DQ49

175

DQ50

177

DQ51

164

DQ52

166

DQ53

174

DQ54

176

DQ55

181

DQ56

183

DQ57

191

DQ58

193

DQ59

180

DQ60

182

DQ61

192

DQ62

194

DQ63

10

DQS0#

27

DQS1#

45

DQS2#

62

DQS3#

135

DQS4#

152

DQS5#

169

DQS6#

186

DQS7#

12

DQS0

29

DQS1

47

DQS2

64

DQS3

137

DQS4

154

DQS5

171

DQS6

188

DQS7

116

ODT0

120

ODT1

126

VREF_CA

1

VREF_DQ

30

RESET#

203

VTT1

204

VTT2

DDR3-204P-40-GP-U

62.10017.N11

RAS#

WE#

CAS#

CS0# CS1#

CKE0 CKE1

CK0#

CK1#

DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7

SDA

EVENT#

VDDSPD

NC#1 NC#2

NC#/TEST

VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8

VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18

3

NP1

NP2

110 113 115

114 121

73 74

101

CK0

103

102

CK1

104

M_B_DM0

11

M_B_DM1

28

M_B_DM2

46

M_B_DM3

63

M_B_DM4

136

M_B_DM5

153

M_B_DM6

170

M_B_DM7

187

200 202

SCL

198

199

SA0_DIM1

197

SA0 SA1

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

SA1_DIM1

201

77 122 125

75 76 81 82 87 88 93 94 99 100 105 106 111 112 117 118 123 124

2 3 8 9 13 14 19 20 25 26 31 32 37 38 43 44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196 205 206

+1.5V_SUS

3

M_B_RAS# 12 M_B_WE# 12 M_B_CAS# 12

M_CS#2 11 M_CS#3 11

M_CKE2 11 M_CKE3 11

M_CLK_DDR2 11 M_CLK_DDR#2 11

M_CLK_DDR3 11 M_CLK_DDR#3 11

ICH_SMBDATA 7,18,22,76 ICH_SMBCLK 7,18,22,76

PM_EXTTS#1 11

C1901

SCD1U10V2KX-5GP

+1.5V_SUS

Layout Note: Place these Caps near SO-DI MMB.

12

DY

M_B_DM[7..0] 12

M_B_DQS#[7..0] 12

M_B_DQS[7..0] 12

M_B_A[14..0] 12

12

C1902

C1902 Do Not Stuff

Do Not Stuff

SODIMM B DECOUPLING

TC1901

Do Not Stuff

DY

C1915

SCD1U10V2KX-5GP

+3.3V_RUN

C1810

12

C1916

12

2

+3.3V_RUN

12

R1901

R1901 10KR2J-3-GP

10KR2J-3-GP

SA1_DIM1

SA0_DIM1

12

R1902

R1902 10KR2J-3-GP

10KR2J-3-GP

Note: SO-DIMMB SPD Address is 0xA4 SO-DIMMB TS Address is 0x34

SO-DIMMB is placed farther from the Processor than SO-DIMMA

C1911

C1907

C1906

SC10U10V5ZY-1GP

12

C1917

SCD1U10V2KX-5GP

12

C1908

SC10U10V5ZY-1GP

12

C1918

Do Not Stuff

SCD1U10V2KX-5GP

12

DY

2

C1911

C1809

SC10U6D3V5KX-1GP

SC10U10V5ZY-1GP

12

DJ1

Title

Size Document Number Rev

Date: Sheet of

DJ1 Montevina UMA

1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

DDR3-SODIMM2

1

A00

19 88Friday, February 26, 2010

A00

5

4

3

2

1

SSID = ICH

ICH_RTCX1

12

C2001

ICH_RTCRST#

21

G2001

G2001 Do Not Stuff

Do Not Stuff

ICH_SDIN_CODEC30

ICH_RTCX2

SC15P50V2JN-2-GP

Do Not Stuff

R2007

1 2

DY

SATA_TXN0_C SATA_TXP0_C

SATA_TXN1_C SATA_TXP1_C

ICH_RTCRST# SRTCRST# SM_INTRUDER#

ICH_INTVRMEN LAN100_SLP

GPIO56

GLAN_COMP

ACZ_BIT_CLK_R ACZ_SYNC_R

ACZ_RST#_R

ACZ_SDATAO UT_R

SATA_LED#

SB1A

C23

RTCX1

C24

RTCX2

A25

RTCRST#

F20

SRTCRST#

C22

INTRUDER#

B22

INTV RMEN

A22

LAN100_SLP

E25

GLAN_CLK

C13

LAN_RSTSYNC

F14

LAN_RXD0

G13

LAN_RXD1

D14

LAN_RXD2

D13

LAN_TXD0

D12

LAN_TXD1

E13

LAN_TXD2

B10

GLAN_DOCK#/GPIO56

B28

GLAN_COMPI

B27

GLAN_COMPO

AF6

HDA_BIT_CLK

AH4

HDA_SYNC

AE7

HDA_RST#

AF4

HDA_SDIN0

AG4

HDA_SDIN1

AH3

HDA_SDIN2

AE5

HDA_SDIN3

AG5

HDA_SDOUT

AG7

HDA_DOCK_EN#/GPIO33

AE8

HDA_DOCK_RST#/GPIO34

AG8

SATALED#

AJ16

SATA0RXN

AH16

SATA0RXP

AF17

SATA0TXN

AG17

SATA0TXP

AH13

SATA1RXN

AJ13

SATA1RXP

AG14

SATA1TXN

AF14

SATA1TXP

ICH9M-GP-NF

1 OF 6

FWH0/LAD0 FWH1/LAD1 FWH2/LAD2 FWH3/LAD3

FWH4/LFRAME#

RTCLAN / GLAN

LPCCPU

RTCLAN / GLAN

LPCCPU

LDRQ0#

LDRQ1#/GPIO23

A20GATE

A20M#

DPRSTP#

DPSLP#

FERR#

CPUPWRGD

IGNNE#

RCIN#

STPCLK#

THRMTRIP#

SATA4RXN

IHDA

SATA4RXP SATA4TXN SATA4TXP

SATA5RXN SATA5RXP SATA5TXN SATA5TXP

SATA_CLKN SATA_CLKP

SATA

SATARBIAS#

SATARBIAS

INIT# INTR

SMI#

PECI

LPC_LAD0

K5

LPC_LAD1

K4

LPC_LAD2

L6

LPC_LAD3

K2

K3

J3 J1

N7 AJ27

H_DPRSTP#

AJ25 AE23

H_FERR#_R

AJ26

AD22

AF25

AE22 AG25 L3

AF23

NMI

AF24

AH27

H_THERMTRIP_R

AG26

AG27

Placed Within 2" from SB.

AH11 AJ11 AG12 AF12

AH9 AJ9 AE10 AF10

AH18 AJ18

SATARBIAS

AJ7 AH7

Place within 500 mils from SB.

LPC_LAD[0..3]

LPC_LFRAME# 37,58

KA20GATE 37 H_A20M# 8

H_DPRSTP# 8,11,47 H_DPSLP# 8

1 2

R2006 56R2J-4-GPR2006 56R2J-4-GP

R2013 54D9R2F-L1-GPR2013 54D9R2F-L1-GP

R2017 24D9R2F-L-GPR2017 24D9R2F-L-GP

1 2

H_PWRGOOD 8,42

H_IGNNE# 8

H_INIT# 8 H_INTR 8

H_NMI 8 H_SMI# 8

H_STPCLK# 8

H_THERMTRIP_1

CLK_PCIE_SATA# 7 CLK_PCIE_SATA 7

LPC_LAD[0..3] 37,58

R2001

1 2

DY

Do Not Stuff

R2005

1 2

56R2J-4-GP

R2008

1 2

DY

Do Not Stuff

R2011

1 2

R2014

1 2

A00

+3.3V_RUN

+1.05V_VCCP

+3.3V_RUN

+1.05V_VCCP

56R2J-4-GP

Do Not Stuff

H_FERR# 8

KBRCIN# 37

H_THRMTRIP# 8,11,37,42

R2002 10MR2J-L-GPR2002 10MR2J-L-GP

1 2

X2001

1

SC15P50V2JN-2-GP

D D

+RTC_CELL

C C

+1.5V_RUN

ICH_AZ_CODEC_BITCLK30

ICH_AZ_CODEC_SYNC30

ICH_AZ_CODEC_RST#30

ICH_SDOUT_CODEC30

HDD

B B

ODD

1 2

SATA_RXN0_C59

SATA_RXP0_C59 SATA_TXN059 SATA_TXP059

SATA_RXN1_C59

SATA_RXP1_C59 SATA_TXN159 SATA_TXP159

4

12

C2002

23

X-32D768KHZ-46GP

2nd 82.30001.A81

R2003

1 2

20KR2F-L-GP

SC1U10V3KX-3GP

R2004

1 2

20KR2F-L-GP

Place within 500 mil of SB.

R2009 24D9R2F-L-GPR2009 24D9R2F-L-GP

1 2

33R2J-2-GPR2010 33R2J-2-GPR2010

33R2J-2-GPR2012 33R2J-2-GPR2012

33R2J-2-GPR2015 33R2J-2-GPR2015

33R2J-2-GPR2016 33R2J-2-GPR2016

SATA_LED#66

12

C2003

12

C2004

C2004 SC1U10V3KX-3GP

SC1U10V3KX-3GP

C2005 SCD01U50V2KX-1GPC2005 SCD01U50V2KX-1GP

1 2

C2006 SCD01U50V2KX-1GPC2006 SCD01U50V2KX-1GP

1 2

C2007 SCD01U50V2KX-1GPC2007 SCD01U50V2KX-1GP

1 2

C2008 SCD01U50V2KX-1GPC2008 SCD01U50V2KX-1GP

1 2

2010/01/04

+RTC_CELL

A A

R2018

1 2

330KR2J-L1-GP

R2019

1 2

330KR2J-L1-GP

R2020

1MR2J-1-GP

12

ICH_INTVRMEN

LAN100_SLP

SM_INTRUDER#

5

integrated VccSus1_05,VccSus1_5,VccCL1_5

INTVRMEN

High=Enable Low=Disable

integrated VccLan1_05VccCL1_05

LAN100_SLP

High=Enable Low=Disable

4

ICH_AZ_CODEC_BITCLK

12

EC2001

DY

Do Not Stuff

Lay Out Close SB1

DJ1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

ICH9-LAN/HDA/SATA/LPC(1/4)

Size Document Number Rev

Custom

Date: Sheet

3

2

Date: Sheet

DJ1 Montevina UMA

Taipei Hsien 221, Taiwan, R.O.C.

of

20 88Friday, February 26, 2010

of

20 88Friday, February 26, 2010

of

20 88Friday, February 26, 2010

1

A00

5

SSID = ICH

5 OF 6

SB1E

AA26

VSS

AA27

VSS

AA3

VSS

AA6

VSS

AB1

VSS

AA23

VSS

AB28

D D

C C

B B

A A

AB29

AB4

AB5 AC17 AC26 AC27

AC3

AD1 AD10 AD12 AD13 AD14 AD17 AD18 AD21 AD28 AD29

AD4

AD5

AD6

AD7

AD9 AE12 AE13 AE14 AE16 AE17

AE2 AE20 AE24

AE3

AE4

AE6

AE9 AF13 AF16 AF18 AF22 AH26 AF26 AF27

AF5

AF7

AF9 AG13 AG16 AG18 AG20 AG23

AG3

AG6

AG9 AH12 AH14 AH17 AH19

AH2 AH22 AH25 AH28

AH5

AH8

AJ12 AJ14 AJ17

AJ8

B11

B14

B17

B20

B23

C26

C27

E11

E14

E18

E21

E24

F16

F28

F29

G12

G14

G18

G21

G24

G26

G27

H23

H28

H29

G8 H2

B2

B5 B8

E2

E5 E8

ICH9M-GP-NF

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

5

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

H5 J23 J26 J27 AC22 K28 K29 L13 L15 L2 L26 L27 L5 L7 M12 M13 M14 M15 M16 M17 M23 M28 M29 N11 N12 N13 N14 N15 N16 N17 N18 N26 N27 P12 P13 P14 P15 P16 P17 P2 P23 P28 P29 P4 P7 R11 R12 R13 R14 R15 R16 R17 R18 R28 T12 T13 T14 T15 T16 T17 T23 B26 U12 U13 U14 U15 U16 U17 AD23 U26 U27 U3 V1 V13 V15 V23 V28 V29 V4 V5 W26 W27 W3 Y1 Y28 Y29 Y4 Y5 AG28 AH6 AF2 B25

A1 A2 A28 A29 AH1 AH29 AJ1 AJ2 AJ28 AJ29 B1 B29

ICH_GND1

ICH_GND2

ICH_GND3

ICH_GND4

PLT_RST#11,37,58,76

+3.3V_ALW

WLAN

LAN

TP2113TP2113

TP2117TP2117

NCTF PIN

TP2101TP2101

4

R2102 Do Not StuffR2102 Do Not Stuff

1 2

Layout Note: Place as close as possible to the ICH Pin

RP2101

USB_OC#7 USB_OC#11

USB_OC#4

PCIE_RXN276

PCIE_RXP276 PCIE_TXN276 PCIE_TXP276

PCIE_RXN376

PCIE_RXP376 PCIE_TXN376 PCIE_TXP376

RP2101

1 2 3 4 5 6

SRN10KJ-L3-GP

4

USB_OC#0_163

USB_OC#2_363

10 9 8 7

C2101

C2101 C2104

C2104

C2105

C2105 C2106

C2106

USB_OC#0_1 USB_OC#1USB_OC#5 USB_OC#6 USB_OC#2_3

1 2 1 2

TP2106TP2106 TP2107TP2107

TP2110TP2110 TP2111TP2111

R2101

R2101 22D6R2F-L1-GP

22D6R2F-L1-GP

3

PCI_PLTRST#PLT_RST#

+3.3V_ALW +3.3V_ALW

SB1D

N29

PERN1

N28

PERP1

P27

PETN1

P26

PETP1

L29

SCD1U10V2KX-5GP

PCIE_C_TXN2 PCIE_C_TXP2

SCD1U10V2KX-5GP

PCIE_C_TXN3 PCIE_C_TXP3

SCD1U10V2KX-5GP

12

SPI_CS#1

USB_OC#0_1 USB_OC#1 USB_OC#2_3 USB_OC#3 USB_OC#4 USB_OC#5 USB_OC#6 USB_OC#7 USB_OC#8 USB_OC#9 USB_OC#10 USB_OC#11

USB_RBIAS_PN

PERN2

L28

PERP2

M27

PETN2

M26

PETP2

J29

PERN3

J28

PERP3

K27

PETN3

K26

PETP3

G29

PERN4

G28

PERP4

H27

PETN4

H26

PETP4

E29

PERN5

E28

PERP5

F27

PETN5

F26

PETP5

C29

PERN6/GLAN_RXN

C28

PERP6/GLAN_RXP

D27

PETN6/GLAN_TXN

D26

PETP6/GLAN_TXP

D23

SPI_CLK

D24

SPI_CS0#

F23

SPI_CS1#/GPIO58/CLGPIO6

D25

SPI_MOSI

E23

SPI_MISO

N4

OC0#/GPIO59

N5

OC1#/GPIO40

N6

OC2#/GPIO41

P6

OC3#/GPIO42

M1

OC4#/GPIO43

N2

OC5#/GPIO29

M4

OC6#/GPIO30

M3

OC7#/GPIO31

N3

OC8#/GPIO44

N1

OC9#/GPIO45

P5

OC10#/GPIO46

P3

OC11#/GPIO47

AG2

USBRBIAS

AG1

USBRBIAS#

ICH9M-GP-NF

3

PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD#

RN2106

8 7 6

SRN8K2J-4-GP

4 OF 6

V27

DMI0RXN

V26

DMI0RXP

U29

DMI0TXN

U28

DMI0TXP

Y27

DMI1RXN

Y26

DMI1RXP

W29

DMI1TXN

W28

DMI1TXP

AB27

DMI2RXN

AB26

DMI2RXP

AA29

DMI2TXN

AA28

DMI2TXP

AD27

DMI3RXN

AD26

DMI3RXP

AC29

DMI3TXN

AC28

DMI3TXP

T26

DMI_CLKN

PCI-Express

DMI_ZCOMP

DMI_IRCOMP

SPI

USB

T25

DMI_CLKP

Direct Media Interface

AF29 AF28

AC5

USBP0N

AC4

USBP0P

AD3

USBP1N

AD2

USBP1P

AC1

USBP2N

AC2

USBP2P

AA5

USBP3N

AA4

USBP3P

AB2

USBP4N

AB3

USBP4P

AA1

USBP5N

AA2

USBP5P

W5

USBP6N

W4

USBP6P

Y3

USBP7N

Y2

USBP7P

W1

USBP8N

W2

USBP8P

V2

USBP9N

V3

USBP9P

U5

USBP10N

U4

USBP10P

U1

USBP11N

U2

USBP11P

SB1B

D11

AD0

C8

AD1

D9

AD2

E12

AD3

E9

AD4

C9

AD5

E10

AD6

B7

AD7

C7

AD8

C5

AD9

G11

AD10

F8

AD11

F11

AD12

E7

AD13

A3

AD14

D2

AD15

F10

AD16

D5

AD17

D10

AD18

B3

AD19

F7

AD20

C3

AD21

F3

AD22

F4

AD23

C1

AD24

G7

AD25

H7

AD26

D1

AD27

G5

AD28

H6

AD29

G1

AD30

H3

AD31

Interrupt I/F

J5

PIRQA#

E1

PIRQB#

J6

PIRQC#

C4

PIRQD#

ICH9M-GP-NF

USB_OC#9

1

USB_OC#8

2

USB_OC#10

3

USB_OC#3

45

DMI_IRXN0_MTXN0 11 DMI_IRXP0_MTXP0 11 DMI_ITXN0_MRXN0 11 DMI_ITXP0_MRXP0 11

DMI_IRXN1_MTXN1 11 DMI_IRXP1_MTXP1 11 DMI_ITXN1_MRXN1 11 DMI_ITXP1_MRXP1 11

DMI_IRXN2_MTXN2 11 DMI_IRXP2_MTXP2 11 DMI_ITXN2_MRXN2 11 DMI_ITXP2_MRXP2 11

DMI_IRXN3_MTXN3 11 DMI_IRXP3_MTXP3 11 DMI_ITXN3_MRXN3 11 DMI_ITXP3_MRXP3 11

DMI_IRCOMP_R

USB_PN0 USB_PP0

USB_PN2 USB_PP2 USB_PN3 USB_PP3 USB_PN4 USB_PP4

USB_PN6 USB_PP6 USB_PN7 USB_PP7 USB_PN8 USB_PP8 USB_PN9 USB_PP9 USB_PN10 USB_PP10

2

2 OF 6

PCI

REQ1#/GPIO50

GNT1#/GPIO51

REQ2#/GPIO52

GNT2#/GPIO53

REQ3#/GPIO54

GNT3#/GPIO55

PCIRST#

DEVSEL#

PLOCK#

FRAME#

PLTRST#

PIRQE#/GPIO2

PIRQF#/GPIO3 PIRQG#/GPIO4 PIRQH#/GPIO5

CLK_PCIE_ICH# 7 CLK_PCIE_ICH 7

USB_PN0 76 USB_PP0 76

USB_PN2 63 USB_PP2 63 USB_PN3 63 USB_PP3 63 USB_PN4 73 USB_PP4 73

USB_PN6 76

USB_PP6 76

TP2115TP2115 TP2116TP2116 TP2118TP2118 TP2119TP2119 TP2112TP2112 TP2114TP2114TP2120TP2120

USB_PN10 32

USB_PP10 32

USB_PN11 54

USB_PP11 54

2

F1

REQ0#

G4

GNT0#

B6 A7 F13 F12 E6 F6

D8

C/BE0#

B4

C/BE1#

D6

C/BE2#

A5

C/BE3#

D3

IRDY#

E3

PAR

R1 C6 E4

PERR#

C2 J4

SERR#

A4

STOP#

F5

TRDY#

D7

C14 D4

PCICLK

R2

PME#

H4 K6 F2 G2

USB0

USB2 USB3

WLAN

Card Reader CAMERA

1

PCI_REQ0# PCI_GNT0# PCI_REQ1# PCI_GNT1# PCI_REQ2# PCI_GNT2# PCI_REQ3# PCI_GNT3#

PCI_IRDY#

PCIRST1# PCI_DEVSEL# PCI_PERR# PCI_PLOCK# PCI_SERR# PCI_STOP# PCI_TRDY# PCI_FRAME#

PCI_PLTRST#

ICH_PME#

PCI_PIRQE# PCI_PIRQF# PCI_PIRQG# PCI_PIRQH#

TP2102TP2102

TP2103TP2103

TP2104TP2104

CLK_PCI_ICH 7

TP2105TP2105

PCI_GNT0#

SPI_CS#1

PCI_GNT3#

1 2

R2103 Do Not Stuff

1 2

R2104 Do Not Stuff

1 2

R2105 Do Not Stuff

DY

DY DY

DY

PCI_REQ1# PCI_DEVSEL# PCI_REQ3# PCI_TRDY#

PCI_SERR# PCI_PIRQE# PCI_PIRQH# PCI_PIRQB#

PCI_REQ0# PCI_PLOCK# PCI_PIRQG# PCI_IRDY#

PCI_FRAME# PCI_PIRQC# PCI_PIRQF# PCI_REQ2#

PCI_STOP# PCI_PIRQD# PCI_PERR# PCI_PIRQA#

8 7 6

BOOT BIOS Strap

SPI_CS#1 BOOT BIOS LocationPCI_GNT#0

0 1 SPI

PCI

01

LPC(Default)

A16 swap override strap

PCI_GNT#3

+1.5V_RUN

R2106

R2106 24D9R2F-L-GP

24D9R2F-L-GP

1 2

DJ1

Title

ICH9-PCI/PCIE/DMI/USB/GND(2/4)

Size Document Number Rev

Custom

Date: Sheet

11

low = A16 swap override enable high = default

USB Pair

0

1

2

3

4

5

6

7

8

9

10

11

DJ1 Montevina UMA

Device

USB0 (I/O Board)

RESERVED

USB2

USB3

BLUETOOTH

RESERVED

WLAN

RESERVED

Card Reader

CAMERA

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

1

RN2102

SRN8K2J-4-GP

RN2101

SRN8K2J-4-GP

RN2103

SRN8K2J-4-GP

RN2104

SRN8K2J-4-GP

RN2105

SRN8K2J-4-GP

of

21 88Friday, February 26, 2010

of

21 88Friday, February 26, 2010

of

21 88Friday, February 26, 2010

1 2 3 45

+3.3V_RUN

A00

5

SSID = ICH

+3.3V_ALW

RN2203

4

SRN4K7J-8-GP

D D

C C

+3.3V_RUN

SRN4K7J-8-GP

R2202 10KR2J-3-GPR2202 10KR2J-3-GP

1 2

RN2201

4

SRN10KJ-5-GP

R2207 10KR2J-3-GPR2207 10KR2J-3-GP

1 2

RN2204

8 7 6

SRN8K2J-4-GP

R2210 10KR2J-3-GPR2210 10KR2J-3-GP

1 2

R2211 10KR2J-3-GPR2211 10KR2J-3-GP

1 2

RN2205

4

DY

Do Not Stuff

R2214 10KR2J-3-GPR2214 10KR2J-3-GP R2215 10KR2J-3-GPR2215 10KR2J-3-GP R2201 10KR2J-3-GPR2201 10KR2J-3-GP R2216 10KR2J-3-GPR2216 10KR2J-3-GP R2217 10KR2J-3-GPR2217 10KR2J-3-GP

1 2

R2218 10KR2J-3-GPR2218 10KR2J-3-GP R2219 8K2R2J-3-GPR2219 8K2R2J-3-GP

1 2

SMB_CLK

1

SMB_DATA

23

LINKALERT#

23 1

1 2 3 45

1 23

12 12 12 12

12

ME_EC_DATA1 ME_EC_CLK1

SMB_ALERT# ICH_RI# PM_BATLOW#_R

ECSMI# SYS_RESET#

H_STP_CPU# H_STP_PCI#

PM_CLKRUN# INT_SERIRQ GPIO18 ECSCI# ECSWI# CLKSATARE Q# THERM_SC I#

PM_SYNC#11

H_STP_PCI#7 H_STP_CPU#7

PM_CLKRUN#37

PCIE_WAKE#76 INT_SERIRQ37

VGATE_PWRGD37,47

R2208 Do Not Stuff

1 2

DY

ECSCI#37

ECSWI#37 ECSMI#37

CLKSATAREQ#7

ACZ_SPKR30

MCH_ICH_SYNC#11

TP2204TP2204

TP2203TP2203

TP2210TP2210

TP2219TP2219

4

SMB_CLK SMB_DATA LINKALERT# ME_EC_CLK1 ME_EC_DATA1

ICH_RI#

SUS_STAT# SYS_RESET#

SMB_ALERT#

H_STP_PCI# H_STP_CPU#

PCIE_WAKE#PCIE_WAKE# INT_SERIRQ THERM_SC I#

VGATE_PWRGD

ICH_TP7

ECSCI#

ECSWI# ECSMI#

GPIO18

iTPM_EN

ICH_TP3

SB1C

G16

SMBCLK

A13

SMBDATA

E17

LINKALERT#/GPIO60/CLGPIO4

C17

SMLINK0

B18

SMLINK1

F19

RI#

R4

SUS_STAT#/LPCPD#

G19

SYS_RESET#

M6

PMSYNC#/GPIO0

A17

SMBALERT#/GPIO11

A14

STP_PCI#

E19

STP_CPU#

L4

CLKRUN#

E20

WAKE#

M5

SERIRQ

AJ23

THRM#

D21

VRMPWRGD

A20

SST

AG19

TACH1/GPIO1

AH21

TACH2/GPIO6

AG21

TACH3/GPIO7

A21

GPIO8

C12

LAN_PHY_PWR_CTRL/GPIO12

C21

ENERGY_DETECT/GPIO13

AE18

TACH0/GPIO17

K1

GPIO18

AF8

GPIO20

AJ22

SCLOCK/GPIO22

A9

GPIO27

D19

GPIO28

L1

SATACLKREQ#/GPIO35

AE19

SLOAD/GPIO38

AG22

SDATAOUT0/GPIO39

AF21

SDATAOUT1/GPIO48

AH24

GPIO49

A8

GPIO57/CLGPIO5

M7

SPKR

AJ24

MCH_SYNC#

B21

TP3

AH20

PWM0

AJ20

PWM1

AJ21

PWM2

ICH9M-GP-NF

3 OF 6

3

SATA0GP/GPIO21 SATA1GP/GPIO19 SATA4GP/GPIO36 SATA5GP/GPIO37

SATA

GPIO

SATA

GPIO

SMB

Clocks

SYS GPIO

Power MGTController Link

GPIO

GPIO10/SUS_PWR_ACK

GPIO14/AC_PRESENT

MISC

CLK14 CLK48

SUSCLK

SLP_S3# SLP_S4# SLP_S5#

S4_STATE#/GPIO26

PWROK

DPRSLPVR/GPIO16

BATLOW#

PWRBTN#

LAN_RST#

RSMRST#

CK_PWRGD

CLPWROK

SLP_M#

CL_CLK0 CL_CLK1

CL_DATA0 CL_DATA1

CL_VREF0 CL_VREF1

CL_RST0# CL_RST1#

GPIO24/MEM_LED

GPIO9/WOL_EN

AH23 AF19 AE21 AD20

H1 AF3

P1

C16 E16 G17

C10

G20

M2

B13

R3

D20

D22

R5

R6

B16

F24 B19

F22 C19

C25 A19

F21 D18

A16 C18 C11 C20

SATA0GP SATA1GP SATA2GP SATA3GP

ICH_SUSCLK

SB_SLP_S3#

PM_SLP_S5#

GPIO26

PM_PWROK

PM_BATLOW#_R

LAN_RST#1

M_PWR OK

PM_SLP_M#

CL_VREF0_ICH

2

CLK_14M_ICH 7 CLK_48M_ICH 7

R2221

1 2

Do Not Stuff

1 2

R2220 22R2J-2-GPR2220 22R2J-2-GP

PM_SLP_S4# 37,41,50

TP2202TP2202

TP2205TP2205

DPRSLPVR 11,47

PM_PWRBTN# 37

RSMRST#_KBC 37

CK_PWRGD 7

M_PWR OK 11

TP2207TP2207

CL_CLK0 11

CL_DATA0 11

CL_RST#0 11

ICH_SUSCLK_2102 39

ICH_SUSCLK_KBC 37

+3.3V_RUN

12

R2212

3K24R2F-GP

12

C2201

SCD1U10V2KX-5GP

R2213

453R2F-1-GP

M_PWR OK

SB_SLP_S3#

SATA0GP SATA2GP SATA3GP SATA1GP

PM_PWROK DPRSLPVR LAN_RST#1 RSMRST#_KBC

R2209

1 2

Do Not Stuff

R2226

1 2

Do Not Stuff

1

RN2202

1

8

2

7

3

6

45

SRN10KJ-6-GP

R2203 10KR2J-3-GPR2203 10KR2J-3-GP

1 2

R2205 Do Not Stuff

1 2

DY

R2204 Do Not StuffR2204 Do Not Stuff

1 2

R2206 10KR2J-3-GPR2206 10KR2J-3-GP

1 2

PM_PWROK 11,37

PM_SLP_S3# 37,42,49,50

+3.3V_RUN

L7306HOHFW1RW

L7306HOHFW1RWL7306HOHFW1RW 6WUDS3LQ

6WUDS3LQ

6WUDS3LQ6WUDS3LQ

B B

12

R2223

100KR2J-1-GP

iTPM_EN

L730B(1

 'LVDEOH

 (QDEOH

+3.3V_RUN

RN2206

1

4

23

SRN4K7J-8-GP

A A

ICH_SMBDATA7,18,19,76

SMB_CLK

5

4

U2202

1

2

3 4

2N7002EDW-GP

3

6

5

SMB_DATA

ICH_SMBCLK 7,18,19,76

2

DJ1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

ICH9-GPIO/PM/CL(3/4)

Size Document Number Rev

Custom

Date: Sheet

ICH9-GPIO/PM/CL(3/4)

DJ1 Montevina UMA

Taipei Hsien 221, Taiwan, R.O.C.

of

22 88Friday, February 26, 2010

of

22 88Friday, February 26, 2010

of

22 88Friday, February 26, 2010

1

A00

5

+RTC_CELL

SSID = ICH

D D

C C

B B

A A

*Within a given well, 5VREF needs to be up before the corre sponding 3.3V rail

+3.3V_RUN +5V_ALW+3.3V_ALW+5V_RUN

D2301

CH751H-40PT-GP

V5REF_S0 V5REF_S5

+3.3V_RUN

R2308

+1.5V_RUN

R2308

1 2

Do Not Stuff

R2311

1 2

Do Not Stuff

SB_VCCLAN3_3

12

VCC_GLAN_PLL

12

21

1 2

12

C2311

C2311 SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

+1.5V_RUN

12

DY

C2334

C2333

Do Not Stuff

SCD1U10V2KX-5GP

12

C2340

C2339

SC10U6D3V5KX-1GP

SC2D2U6D3V3KX-GP

5

R2304

R2304 10R2J-2-GP

10R2J-2-GP

SC4D7U6D3V3KX-GP

CH751H-40PT-GP

12

DY

+1.5V_RUN

C2352

DY

C2319

Do Not Stuff

+1.5V_RUN

12

D2302

12

C2320

1 2

DY

21

12

C2312

C2312 SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

12

DY

Do Not Stuff

1 2

R2313

Do Not Stuff

12

C2353

Do Not Stuff

TC2301

Do Not Stuff

L2302

IND-10UH-215-GP

DY

+3.3V_RUN

12

C2302

SCD1U10V2KX-5GP

R2302

R2302 10R2J-2-GP

10R2J-2-GP

1 2

12

C2321

SC10U6D3V5KX-1GP

+VCCSATAP LL+1.5V_RUN

+1.5V_RUN

12

C2344

Do Not Stuff

VCCLAN1D05

12

DY

4

12

C2309

SCD1U10V2KX-5GP

12

C2322

SC10U6D3V5KX-1GP

12

C2331

C2331 SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

12

C2336

SC1U6D3V2KX-GP

1D5V_USB_S0

12

C2345

SCD1U10V2KX-5GP

C2350

SB_VCCLAN3_3

Do Not Stuff

VCC_GLAN_PLL

4

V5REF_S0

V5REF_S5

12

C2323

SC2D2U6D3V3KX-GP

12

C2332

SC1U10V3KX-3GP

12

C2337

SC1U6D3V2KX-GP

12

C2346

SCD1U10V2KX-5GP

AE1

AA24 AA25 AB24 AB25 AC24 AC25 AD24 AD25 AE25 AE26 AE27 AE28 AE29

G25 H24 H25

M24 M25 N23 N24 N25

R24 R25 R26 R27

U24 U25

U23 W24 W25

AJ19

AC16 AD15 AD16 AE15 AF15

AG15

AH15

AJ15

AC11 AD11 AE11

AF11 AG10 AG11

AH10

AJ10

AC9

AC18

AC19

AC21

G10

AC12

AC13

AC14

AA7 AB6 AB7 AC6 AC7

D28 D29

A23

F25

J24 J25 K24 K25 L23 L24 L25

P24 P25

T24 T27 T28 T29

V24 V25

K23 Y24 Y25

AJ5

A10 A11

A12 B12

A27

E26 E27

A26

SB1F

A6

G9

ICH9M-GP-NF

VCCRTC

2mA

V5REF

V5REF_SUS

VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B

VCCSATAPLL

VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A

VCC1_5_A

VCC1_5_A VCC1_5_A

VCC1_5_A

VCC1_5_A VCC1_5_A

VCC1_5_A VCC1_5_A VCC1_5_A

VCCUSBPLL

VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A

VCCLAN1_05 VCCLAN1_05

VCCLAN3_3 VCCLAN3_3

VCCGLANPLL

VCCGLAN1_5 VCCGLAN1_5 VCCGLAN1_5 VCCGLAN1_5

VCCGLAN3_3

2mA

646mA

47mA

1342mA

11mA

78mA

23mA

80mA

1mA

6 OF 6

CORE

23mA

50mA

2mA

VCCA3GP ATXARX USB CORE

VCCP_CORE

PCI

11mA

VCCPSUSVCCPUSB

212mA

GLAN POWER

VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05

1634mA

VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05

VCCDMIPLL

VCCDMI VCCDMI

V_CPU_IO V_CPU_IO

VCC3_3

VCC3_3 VCC3_3 VCC3_3 VCC3_3

VCC3_3

308mA

VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3

VCCHDA

VCCSUSHDA

VCCSUS1_05 VCCSUS1_05

VCCSUS1_5

VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3

VCCSUS3_3

VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3

VCCCL1_05

VCCCL1_5

VCCCL3_3 VCCCL3_3

73mA

3

A15 B15 C15 D15 E15 F15 L11 L12 L14 L16 L17 L18 M11 M18 P11 P18 T11 T18 U11 U18 V11 V12 V14 V16 V17 V18

R29

W23 Y23

AB23 AC23

AG29

AJ6

AC10

AD19 AF20 AG24 AC20

B9 F9 G3 G6 J2 J7 K7

AJ4

AJ3

AC8 F17

AD8

F18

A18 D16 D17 E22

AF1

T1 T2 T3 T4 T5 T6 U6 U7 V6 V7 W6 W7 Y6 Y7 T7

G22

G23

A24 B24

3

12

DY

1D5V_DMIPLL_ICH_S0

VCCDMI

SB_V_CPU_IO

12

C2327

C2327 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

VCCSUSHDA_ICH

VCCSUS1_05[1] VCCSUS1_05[2]

VCCSUS1_5[1]

VCCSUS1_5[2]

SB_VCCSUS3_3

ICH9_SUS3_3

VCCSUS1_05[3]

VCCSUS1_5[3]

SB_VCCCL3_3

C2303

Do Not Stuff

+3.3V_RUN

1 1

1 2

R2315

1 2

Do Not Stuff

12

C2304

SC1U6D3V2KX-GP

1D5V_DMIPLL_ICH_S0

12

C2313

12

C2324

SCD1U10V2KX-5GP

12

TP2302TP2302 TP2301TP2301

C2338

C2338 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

12

+3.3V_RUN

12

C2310

DY

SC1U6D3V2KX-GP

12

C2308

SCD01U16V2KX-3GP

12

SCD1U10V2KX-5GP

12

C2325

SCD1U10V2KX-5GP

12

C2328

SCD1U10V2KX-5GP

R2316

1 2

DY

Do Not Stuff

12

DY

C2341

SCD1U10V2KX-5GP

12

C2347

SCD1U10V2KX-5GP

DY

2

12

C2306

C2305

SC1U6D3V2KX-GP

Do Not Stuff

COIL-1UH-31-GP

C2307

C2307 SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

12

C2314

C2315

SC10U6D3V5KX-1GP

+3.3V_RUN

C2326

+3.3V_RUN

SCD1U10V2KX-5GP

12

C2329

C2330

SCD1U10V2KX-5GP

12

DY

C2342

C2343

Do Not Stuff

12

C2349

C2348

SCD1U16V2KX-3GP

12

C2351

Do Not Stuff

2

+1.5V_RUN

L2301

12

R2305

1 2

Do Not Stuff

SC4D7U6D3V3KX-GP

SCD1U10V2KX-5GP

R2317

1 2

Do Not Stuff

+1.5V_RUN

R2312

1 2

Do Not Stuff

R2314

1 2

Do Not Stuff

SCD022U16V2KX-3GP

12

C2354

C2301

SCD1U10V2KX-5GP

1

+1.05V_VCCP

SB_V_CPU_IO

12

DY

C2316

SCD1U10V2KX-5GP

+3.3V_ALW

C2355

C2355 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

1 2

+3.3V_ALW

DJ1

Title

ICH9-Power(4/4)

SCD1U10V2KX-5GP

Size Document Number Rev

Custom

Date: Sheet of

Date: Sheet

ICH9-Power(4/4)

DJ1 Montevina UMA

C2318

C2317

Do Not Stuff

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

1

+1.05V_VCCP

R2306

1 2

Do Not Stuff

SC4D7U6D3V3KX-GP

23 88Wednesday, February 24, 2010

of

23 88Wednesday, February 24, 2010

of

23 88Wednesday, February 24, 2010

A00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

DJ1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Custom

Date: Sheet

DJ1 Montevina UMA

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

of

24 88Wednesday, February 24, 2010

of

24 88Wednesday, February 24, 2010

of

24 88Wednesday, February 24, 2010

A00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

DJ1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Custom

Date: Sheet

DJ1 Montevina UMA

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

of

25 88Wednesday, February 24, 2010

of

25 88Wednesday, February 24, 2010

of

25 88Wednesday, February 24, 2010

A00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

DJ1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Custom

Date: Sheet

DJ1 Montevina UMA

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

of

26 88Wednesday, February 24, 2010

of

26 88Wednesday, February 24, 2010

of

26 88Wednesday, February 24, 2010

A00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

DJ1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Custom

Date: Sheet

DJ1 Montevina UMA

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

of

27 88Wednesday, February 24, 2010

of

27 88Wednesday, February 24, 2010

of

27 88Wednesday, February 24, 2010

A00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

DJ1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Custom

Date: Sheet

DJ1 Montevina UMA

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

of

28 88Wednesday, February 24, 2010

of

28 88Wednesday, February 24, 2010

of

28 88Wednesday, February 24, 2010

A00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

DJ1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

DJ1 Montevina UMA

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

of

29 88Wednesday, February 24, 2010

A00

5

SSID = AUDIO

4

3

2

1

D D

ICH_AZ_CODEC_BITCLK

12

C3010

DY

Do Not Stuff

+3.3V_RUN

12

R3005

R3005 10KR2J-3-GP

10KR2J-3-GP

AMP_MUTE#

C C

B B

+3.3V_RUN

1 2

ICH_AZ_CODEC_BITCLK20

+3.3V_RUN

Close to codec

12

C3002

C3001

SCD1U10V2KX-5GP

ICH_SDIN_CODEC20

ICH_SDOUT_CODEC20

ICH_AZ_CODEC_SYNC20

ICH_AZ_CODEC_RST#20

C3002

SC1U6D3V2KX-GP

1 2

SC2D2U25V5KX-1GP

AMP_MUTE#37

C3003

SCD1U10V2KX-5GP

C3014

33R2J-2-GPR3001 33R2J-2-GPR3001

Close to codec

AUD_DVDDCORE

12

C3004

C3004 SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

ICH_AZ_CODEC_BITCLK

ICH_SDIN_CODEC_C0

ICH_SDOUT_CODEC

ICH_AZ_CODEC_SYNC

ICH_AZ_CODEC_RST#

AMP_MUTE#

PUMP_CAPN

12

PUMP_CAPP

AUD_AGND

U3001

1

DVDD_CORE

9

DVDD

3

DVDD_IO

6

HDA_BITCLK

8

HDA_SDI

5

HDA_SDO

10

HDA_SYNC

11

HDA_RST#

2

DMIC_CLK/GPIO1

4

DMIC 0/GPIO2

46

DMIC1/GPIO0/SPDIF_OUT_1

48

SPDIF_OUT_0

47

EAPD

35

CAP-

36

CAP+

7

DVSS

33

AVSS

30

AVSS

26

AVSS

42

PVSS

49

GND

92HD79B1A5NLGXTAX-GP

71.92H79.003

AVDD AVDD

PVDD PVDD

SENSE_A SENSE_B

HP0_PORT_A_L HP0_PORT_A_R

VREFOUT _A_OR_F

HP1_PORT_B_L HP1_PORT_B_R

PORT_C_L

PORT_C_R

VREFOUT _C

SPKR_PORT_D_L+

SPKR_PORT_D_L-

SPKR_PORT_D_R-

SPKR_PORT_D_R+

PORT_E_L

PORT_E_R

PORT_F_L

PORT_F_R

PC_BEEP

MONO_OUT

CAP2

VREFFILT

VREG

V-

27 38

39 45

13 14

28 29 23

31 32

AUD_INT_MIC_R_L

19 20

AUD_VREFOUT_C

24

40 41

43 44

15 16

17 18

12

25

22

21

34

37

AUD_SENSE_A AUD_SENSE_B

AUD_EXT_MIC_L AUD_EXT_MIC_R AUD_VREFOUT_B

AUD_HP1_JACK_L AUD_HP1_JACK_R

AUD_SPK_L+ AUD_SPK_L-

AUD_SPK_RAUD_SPK_R+

AUD_CAP2

AUD_VREFFLT

AUD_V_B

AUD_VREG

+AVDD

1 2

Do Not Stuff

12

C3005

C3006

SC1U10V3KX-3GP

SCD1U10V2KX-5GP

AUD_AGND

AUD_EXT_MIC_L 60 AUD_EXT_MIC_R 60

C3011 SC1U10V3KX-3GPC3011 SC1U10V3KX-3GP

1 2

R3004 2K2R2J-2-GPR3004 2K2R2J-2-GP

1 2

AUD_SPK_L+ 60

AUD_SPK_L- 60

AUD_SPK_R- 60

AUD_SPK_R+ 60

AUD_PC_BEEP

AUD_PC_BEEP Trace width>15 mils

12

C3015

AUD_AGND

Close to codec

C3016

C3016 SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC4D7U6D3V5KX-3GP

AUD_AGND

C3017

C3017 SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

AUD_AGND

R3021

12

C3018

+5V_RUN

12

SCD1U10V2KX-5GP

1 2

C3008

SC1U10V3KX-3GP

AUD_AGND

G3001

G3001 Do Not Stuff

Do Not Stuff

12

C3009

SC10U6D3V5KX-1GP

AUD_VREFOUT_B 60

AUD_HP1_JACK_L 60

AUD_HP1_JACK_R 60

INT_MIC_L_R 60

C3012

12

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP C3013

C3013

12

SCD1U10V2KX-5GP

SB_SPKR_R

KBC_BEEP_R

R3006

R3006 120KR2F-L-GP

120KR2F-L-GP

1 2

R3007

R3007 499KR2F-1-GP

499KR2F-1-GP

From SB

ACZ_SPKR 22

KBC_BEEP 37

From EC

C3007

SC1U6D3V2KX-GP

$]DOLD,)(0,

ICH_SDOUT_CODEC

A A

12

R3013

R3013 Do Not Stuff

Do Not Stuff

DY

ICH_AZ_CODEC_SDOUT1

AUD_SENSE_A

12

C3020

DY

Do Not Stuff

5

+AVDD

12

AUD_AGND

R3016

R3016 2K49R2F-GP

2K49R2F-GP

C3019

C3019 SC1000P50V3JN-GP-U

SC1000P50V3JN-GP-U

Close to Pin13

R3015

R3015 20KR2F-L-GP

20KR2F-L-GP

1 2

R3020

R3020 39K2R2F-L-GP

39K2R2F-L-GP

AUD_HP1_JD# 60

12

EXT_MIC_JD# 60

Close to Pin14

4

AUD_SENSE_B

+AVDD

AUD_AGND

12

R3017

R3017 2K49R2F-GP

2K49R2F-GP

12

R3019

R3019 20KR2F-L-GP

20KR2F-L-GP

R3012

1 2

Do Not Stuff

R3014

1 2

Do Not Stuff

R3018

1 2

Do Not Stuff

AUD_AGND

A00

3

2

DJ1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, T aiwan, R.O.C.

Taipei Hsien 221, T aiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet

Audio Codec 92HD79B1

Custom

DJ1 Montevina UMA

Taipei Hsien 221, T aiwan, R.O.C.

30 88Friday, February 26, 2010

1

30 88Friday, February 26, 2010

of

A00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

DJ1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

DJ1 Montevina UMA

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

of

31 88Wednesday, February 24, 2010

A00

5

SSID = SDIO

4

3

2

1

D D

+3.3V_RUN

USB_PN10_1 USB_PP10_1

+3.3V_RUN_CARD

12

DY

C302

C C

SCD1U10V2KX-5GP

DY

C303

1 2

Do Not Stuff

12

C304

C304 SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

C301

1 2

DY

Do Not Stuff

1 2

6K2R2F-GP

V18

R301

CLK_48M_CARD7

RREF

1 2 3 4 5 6

25

U301

RREF DM DP 3V3_IN CARD_3V3 V18

GND

24

CLK_IN

XD_CD#7SP18SP29SP310SP411SP5

23

XD_D7

22

SP1119SP1220SP1321SP14

12

XD_D7 XD_D6/MS_BS XD_D5/SD_D2/MS_D5 XD_D4/SD_D3/MS_D1 XD_D3/SD_D4/MS_D4

18

SP10

17

GPIO0

16

SP9

15

SP8

14

SP7

13

SP6

RTS5138-GR-GP

XD_ALE/SD_D7/MS_D3 XD_CLE/SD_D0/MS_D7 XD_CE#/SD_D1 XD_RE#/MS_INS# XD_RDY/SD_WP/MS_CLK_R XD_CD#

XD_D2/SD_CMD

CR_GPIO0 XD_D1/SD_D5/MS_D0 XD_D0/SD_CLK/MS_D2 XD_WP/SD_D6/MS_D6 XD_WE#/SD_CD#

XD_ALE/SD_D7/MS_D3 71 XD_CLE/SD_D0/MS_D7 71 XD_CE#/SD_D1 71 XD_RE#/MS_INS# 71

XD_CD# 71

XD_D7 71 XD_D6/MS_BS 71 XD_D5/SD_D2/MS_D5 71 XD_D4/SD_D3/MS_D1 71 XD_D3/SD_D4/MS_D4 71

XD_D2/SD_CMD 71

1

TP2 Do Not StuffTP2 Do Not Stuff

XD_D1/SD_D5/MS_D0 71 XD_D0/SD_CLK/MS_D2 71 XD_WP/SD_D6/MS_D6 71 XD_WE#/SD_CD# 71

R302

12

22R2J-2-GP

XD_RDY/SD_WP/MS_CLK 71

Close U27

Close to U301

+3.3V_RUN_CARD

B B

C305

C305 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

1 2

Do Not Stuff

USB_PN10_1

XD_D4/SD_D3/MS_D1

XD_D5/SD_D2/MS_D5

XD_CE#/SD_D1

XD_CLE/SD_D0/MS_D7

12

EC302

EC303

EC301

DY

Do Not Stuff

A A

5

4

DY

EC303

Do Not Stuff

DY

Do Not Stuff

DY

12

EC304

12

Do Not Stuff

DY

3

USB_PP10_1

2

Do Not Stuff

R3211

1 2

R3210

1 2

Do Not Stuff

2010/01/05

DJ1

Title

Size Document Number Rev

Custom

Date: Sheet

USB_PN10 21 USB_PP10 21

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Card Reader-RTS5138

DJ1 Montevina UMA

32 88Friday, February 26, 2010

1

A00

of

A00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

DJ1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

DJ1 Montevina UMA

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

of

33 88Wednesday, February 24, 2010

A00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

DJ1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

DJ1 Montevina UMA

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

of

34 88Wednesday, February 24, 2010

A00

A

4 4

3 3

B

C

D

E

(Blanking)

2 2

1 1

A

B

C

D

DJ1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet

Date: Sheet of

DJ1 Montevina UMA

Taipei Hsien 221, Taiwan, R.O.C.

(Reserved)

E

of

35 88Wednesday, February 24, 2010

A00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

DJ1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

DJ1 Montevina UMA

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

of

36 88Wednesday, February 24, 2010

A00

5

+KBC_PWR

R3747 Do Not Stuff

1 2

DY

L3701 BLM18AG601SN-3GPL3701 BLM18AG601SN-3GP

1 2

12

C3704

C3705

D D

C C

B B

SC2D2U6D3V3KX-GP

+KBC_PWR

12

R3749

R3749 2K2R2J-2-GP

2K2R2J-2-GP

DJ1/DJ2

12

DJ3

PH for DJ1 PL for DJ2/DJ3

+KBC_PWR

RSMRST#_KBC22

EC_SPI_WP#_R62

PSID_DISABLE#76

USB_PWR_EN#63

PSID_EC76

KBC_GPIO05

+3.3V_RUN

12

KB_DET_KBC

R3753

R3753 Do Not Stuff

Do Not Stuff

PWR_LED#66

BATCHG66

PM_SLP_S4#22,41,50

3V_5V_POK46

PM_PWROK11,22

BLON_OUT54

CPUCORE_ON47

R3722

Do Not StuffDYR3722

Do Not Stuff

12

DY

PCB_VER0 PCB_VER1 PCB_VER2

R3727

10KR2J-3-GP

R3727

10KR2J-3-GP

12

DY

C3706

Do Not Stuff

SCD1U10V2KX-5GP

KBC_GPIO05

TSATN#_KBC11

PM_SLP_S3#22,42,49,50

LID_CLOSE#69

R3710 2 K2R2J-2-GPR3710 2K2R2J-2-GP

R3718

R3719

R3723

10KR2J-3-GP

R3723

10KR2J-3-GP

R3724

Do Not StuffDYR3724

Do Not Stuff

12

DY

R3728

Do Not StuffDYR3728

Do Not Stuff

R3729

10KR2J-3-GP

R3729

10KR2J-3-GP

12

DY

E51_TxD

R3735

DY

Do Not Stuff

1 2

A A

AD_IA76

12

DY

C3721

Do Not Stuff

5

+3.3V_RTC_LDO

12

C3708

C3707

SCD1U10V2KX-5GP

AD_IA76

PSID_EC76

TP3704TP3704

12

1 2

Do Not Stuff

1 2

D

Q3706

.

. .

.

Do Not Stuff

G

0%9(56,21,'

0%9(56,21,'0%9(56,21,'

9(5



;



; $



$



.%&&/.

.%&&/..%&&/. (0,

(0,

(0,(0,

DY

CAP close to VCC-GND pin pair

VBAT

12

C3710

C3701

SC2D2U6D3V3KX-GP

KBC_THERMTRIP#

PM_PWROK_R

EC_ENABLE#

CPUCORE_ON_R

A00

C3701

SCD1U10V2KX-5GP

U3701A

104

VREF

97

GPI90/AD0

98

GPI91/AD1

99

GPI92/AD2

100

GPI93/AD3

108

GPIO05

96

GPIO04

101

GPI94

105

GPI95

106

GPI96

107

GPI97

64

GPIO01/TB2

95

GPIO03

93

GPIO06

94

GPIO07

119

GPIO23

6

GPIO24

109

GPIO30

120

GPIO31

65

GPIO32/D_PWM

66

GPIO33/H_PWM

16

GPIO40/F_PWM

17

GPIO42/TCK

20

GPIO43/TMS

21

GPIO44/TDI

22

GPIO45/E_PWM

23

GPIO46/TRST#

24

GPIO47

25

GPIO50/TDO

26

GPIO51

27

GPIO52/RDY#

28

GPIO53

73

GPIO70

74

GPIO71

75

GPIO72

110

GPO82/TRIS#

NPCE781BA0DX-GP

C3709

SCD1U10V2KX-5GP

KB_DET_KBC SUBWOOFER_M UTE#

1

PCB_VER2

KBC_PWRBTN_EC# AC_IN#_KBC

PCB_VER0 KBC_BIOS_ID

PCB_VER1

Do Not Stuff

DY

S

For RCID Function

9(5

9(5

 





PCLK_KBC

R3732

R3732 Do Not Stuff

Do Not Stuff

PCLK_KBC_RC

1 2

C3716

C3716 Do Not Stuff

Do Not Stuff

1 2

4

88

115

VCC

A/D

D/A

GPIO

THERM_SDA39

PLT_RST1#_1

4

VCC19VCC46VCC76VCC

116

12

DY

80

4

102

VDD

AVCC

GPIO41

GPIO10/LPCPD#

LPC

GPIO11/CLKRUN#

ECSCI#/GPIO54

GPIO67/PWUREQ#

SMB

SP

GPIO66/G_PWM

SPI

GPO83/SOUT_CR/BADDR1

GPIO87/SIN_CR

GPO84/BADDR0

SER/IR

GND5GND18GND45GND78GND89GND

AGND

103

KBC_AGND

R3725

1 2

Do Not Stuff

A00

KBC_SCL1

R3734

1 2

Do Not Stuff

C3714

C3714 Do Not Stuff

Do Not Stuff

ECRST#_C

3

+3.3V_RUN

12

C3703

DY

C3702

1 OF 2

124 7

LRESET#

2

LCLK

3

LFRAME#

126

LAD0

127

LAD1

128

LAD2

1

LAD3

125

SERIRQ

8 122

KBRST#

121

GA20

29 9

GPIO65/SMI#

123

GPIO74/SDA2 GPIO73/SCL2 GPIO22/SDA1 GPIO17/SCL1

GPIO76/SHBM

68 67 69 70

81

84

GPIO77

83 82

GPIO75

91

GPIO81

111 113 112

114

GPIO16

14

GPIO34

15

GPIO36

KBC_VCORF

44

VCORF

Layout note:

1. Connect KBC_AGND and GND at one point

2. R3725 close to Pin 103 (AGND)

1 2

DY

R3702 Do Not Stuff

Q3702

34

2

5

1

6

2N7002EDW-GP

R3704

1 2

DY

Do Not Stuff

U3702

1

GND

VCC

DY

2

RESET#

Do Not Stuff

SCD1U10V2KX-5GP

PLT_RST1#_1

LPC_LAD0 LPC_LAD1 LPC_LAD2 LPC_LAD3

ECSCI#_KBC

ECSWI#_KBC

R3709 100KR2J-1-GPR3709 100KR2J-1-GP

KBC_SDA1 KBC_SCL1

KBC_GPIO66

1

ECSMI#_KBC

E51_TxD E51_RxD

RUNPWROK_R

PLT_RST# 11,21,58,76

12

+3.3V_RUN

+KBC_PWR

3

R3711

1 2

Do Not Stuff

C3712

C3712 SC1U10V3KX-3GP

SC1U10V3KX-3GP

KBC_SDA1

BAT_IN# 76

PCLK_KBC 7 LPC_LFRAME# 20,58

LPC_LAD[0..3] 20,58

INT_SERIRQ 22

PM_CLKRUN# 22 KBRCIN# 20 KA20GATE 20

GMCH_BL_ON 13

12

BAT_SDA 76 BAT_SCL 76

TP3706TP3706

BLUETOOTH_EN_L 73,76 WIFI_RF_EN 76

E51_TxD 76 E51_RxD 76

PM_LAN_ENABLE 76

S5_ENABLE 42

THERM_SCL 39

PURE_HW_SHUTDOWN#39,42

A00

3

2

+KBC_PWR

R3745

3

D3704

12

BAT54C-U-GP

3

2

3

R3745

100KR2J-1-GP

12

+3.3V_RTC_LDO

BAT54C-U-GP

BAT54C-U-GP D3705

D3705

1 2

KBC_ON#

12

DY

C3711 Do Not Stuff

KBC_THERMTRIP#

ECSWI#_KBC

ECSCI#_KBC

ECSMI#_KBC

U3701B

77

32KX1/32KCLKIN

79

32KX2

30

GPIO55/CLKOUT

63

GPIO14/TB1

117

GPIO20/TA2

31

GPIO56/TA1

32

GPIO15/A_PWM

118

GPIO21/B_PWM

62

GPIO13/C_PWM

13

GPIO12/PSDAT3

12

GPIO25/PSCLK3

11

GPIO27/PSDAT2

10

GPIO26/PSCLK2

71

GPIO35/PSDAT1

72

GPIO37/PSCLK1

86

F_SDI

87

F_SDO

90

F_CS0#

92

F_SCK

NPCE781BA0DX-GP

ECRST#

12

C3715

DY

Do Not Stuff

12

R3744

R3744 10KR2J-3-GP

10KR2J-3-GP

R3754

1 2

10KR2J-3-GP

AC_IN# 76

+3.3V_RTC_LDO

Q3704

G

SI2301CDS-T1-GE3-GP

12

C3718

PS/2

FIU

SI2301CDS-T1-GE3-GP

D S

+KBC_PWR

SCD1U16V2KX-3GP

E51_RxD

KBC_SCL1 KBC_SDA1

BAT_SDA BAT_SCL

LCD_CBL_DET#

KB_DET#

KBC_THERMTRIP#

S5_ENABLE

KCOL0

CPUCORE_ON

BLUETOOTH_EN_L

2 OF 2

KBSOUT0/JENK#

KBSOUT1/TCK KBSOUT2/TMS

KBSOUT3/TDI

KBSOUT4/JEN0#

KBSOUT5/TDO

KBSOUT6/RDY#

KBSOUT7

KBC

KBSOUT8

KBSOUT9 KBSOUT10 KBSOUT11

KBSOUT12/GPIO64 KBSOUT13/GPIO63 KBSOUT14/GPIO62

KBSOUT15/GPIO61/XOR_OUT

GPIO60/KBSOUT16 GPIO57/KBSOUT17

KBSIN0 KBSIN1 KBSIN2 KBSIN3 KBSIN4 KBSIN5 KBSIN6 KBSIN7

VCC_POR#

DJ1

Title

KBC Nuvoton NPCE781BA0DX

Size Document Number Rev

Custom

Date: Sheet of

DJ1 Montevina UMA

KBC_PWRBTN_EC#

1 2

DY

R3746 Do Not Stuff

R3751

1 2

10KR2J-3-GP

AC_IN#_KBC

Q3705

KBC_PWRBTN#

R3752

1 2

DY

Do Not Stuff

.....

KBC_ON#

D

2N7002E-1-GP

+1.05V_VCCP +KBC_PWR

12

R3705

R3705 2K2R2J-2-GP

2K2R2J-2-GP

H_THERMTRIP_R#

312

Q3703

Q3703 PMBS3904-1-GP

PMBS3904-1-GP

D3702

1

BAS16-6-GP

2

D3701

1

BAS16-6-GP

2

D3703

1

2

BAS16-6-GP

KBC_XI

R3748

1 2

Do Not Stuff

ICH_SUSCLK_KBC22

KBC_PWRBTN#76

EC_ENABLE#

+KBC_PWR

G

S

H_THRMTRIP#8,11,20,42

ECSWI#22

RUNPWROK 49

ECSCI#22

ECSMI#22

A00

AMP_MUTE#30

VGATE_PWRGD22,47

PM_PWRBTN#22

LCD_TST_EN54

KBC_BEEP30

BATLOW_LED66

KB_DET#68

LCD_CBL_DET#54

LCD_TST54

TPDATA68

TPCLK68

EC_SPI_DI62 EC_SPI_DO_R62 EC_SPI_CS#62 EC_SPI_CLK62

EC_SPI_DI EC_SPI_DO_R EC_SPI_CS# EC_SPI_CLK

+KBC_PWR

R3750 33R2J-2-GPR3750 33R2J-2-GP

1 2

R3731 33R2J-2-GPR3731 33R2J-2-GP

4K7R2J-2-GP

R3737

1 2

ECRST#_C

1 2

R3738

Do Not Stuff

PMBS3906-GP

EC_SPI_DO

EC_SPI_CLK_C

1

Q3701

2

1

SSID = KBC

1 2

DY

R3706 Do Not Stuff

RN3702

1

4

23

SRN4K7J-8-GP

SRN4K7J-8-GP RN3701

RN3701

1

4

23

SRN4K7J-8-GP

1 2

R3713 100KR2J-1-GPR3713 100KR2J-1-GP

1 2

R3714 100KR2J-1-GPR3714 100KR2J-1-GP

1 2

R3717 100KR2J-1-GPR3717 100KR2J-1-GP

1 2

R3720 10KR2J-3-GPR3720 10KR2J-3-GP

1 2

DY

R3721 Do Not Stuff

1 2

R3730 10KR2J-3-GPR3730 10KR2J-3-GP

1 2

R3742 10KR2J-3-GPR3742 10KR2J-3-GP

KCOL0

53

KCOL1

52

KCOL2

51

KCOL3

50

KCOL4

49

KCOL5

48

KCOL6

47

KCOL7

43

KCOL8

42

KCOL9

41

KCOL10

40

KCOL11

39

KCOL12

38

KCOL13

37

KCOL14

36

KCOL15

35

KCOL16

34

KCOL17

33

KROW0

54

KROW1

55

KROW2

56

KROW3

57

KROW4

58

KROW5

59

KROW6

60

KROW7

61

ECRST#

85

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

1

TP3703 Do Not StuffTP3703 Do Not Stuff

1

37 88Friday, February 26, 2010

+3.3V_RUN

KCOL[0..16] 68

KROW[0..7] 68

DY

12

A00

EC3701

Do Not Stuff

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

DJ1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

DJ1 Montevina UMA

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

of

38 88Wednesday, February 24, 2010

A00

5

SSID = Thermal

4

+5V_RUN

12

C3908

C3908 SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

12

C3905

C3905 SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

+3.3V_RUN

12

R3902

R3902 10KR2J-3-GP

10KR2J-3-GP

3

2

1

D D

R3907

+3.3V_RUN

1.For CPU Sensor

H_THERMDC8

12

H_THERMDA, H_THERMDC routing together,

C3901

SC470P50V2JN-GP

H_THERMDA8

C C

2

84.03904.L06

Q3904

PMBS3904-1-GP

3

C3901

Trace width / Spacing = 10 / 10 mil

C388 must be near Q18

12

C3904

DY

Do Not Stuff

1

Do Not Stuff

Layout notice : Both DN2 and DP2 routing 10 mil trace width and 10 mil spacing.

12

C3903

SC470P50V2JN-GP

C61 must be near EMC2102

2.System Sensor, Put between CPU and NB.

C3907 must be near Q3902

Q3903

PMBS3904-1-GP

2

84.03904.L06

1

3

DY

C3902

C3902 Do Not Stuff

Do Not Stuff

12

C3909

SC470P50V2JN-GP

C63 must be near EMC2102

3.HW T8 sensor

Layout notice : Both DN3 and DP3 routing 10 mil

B B

trace width and 10 mil spacing.

R3907

49D9R2F-GP

EMC2102_VDD_3D3

12

C3910

SCD1U16V2KX-3GP

1 2

H_THERMDC

H_THERMDA

EMC2102_DN2

EMC2102_DP2

EMC2102_DN3

EMC2102_DP3

GND = Channel 1 OPEN = Channel 3 +3.3V = Disabled

+3.3V_RUN

GND = Fan is OFF OPEN = Fan is at 60% full-scale +3.3V = Fan is at 75% full-scale

R3914

DY

Do Not Stuff

R3909

DY

Do Not Stuff

R3906

1 2

Do Not Stuff

U3901

1

VDD_3V

2

DN1

3

DP1

4

DN2

5

DP2

6

DN3

7

DP3

EMC2102_SHDN

12

EMC2102_FAN_mode

12

29

GND

EMC2102_FAN_TACH_1

EMC2102_FAN_DRIVE

24

27

25

26

28

TACH

VDD_5Va

EMC2102

SHDN_SEL9FAN_MODE10TRIP_SET11SYS_SHDN#12THERMTRIP#13POWER_OK#

NC#8

8

FANb

FANa

THERM_SYS_SHDN#

23

SMCLK

VDD_5Vb

G

S

RN3901

4

SRN4K7J-8-GP

22

SMDATA

NC#21

GND

ALERT#

CLK_IN

CLK_SEL

RESET#

NC#15

EMC2102-DZK-GP

14

THERM_PO WER_OK# THERMTRIP#

THERMAL_P_HW_SHT

Q3901

.....

D

2N7002E-1-GP

23

+3.3V_RUN

1

THERM_SC L 37 THERM_SD A 37

21

20

19

CLK_32K

18

EMC2102_CLK_SEL

17

16

15

1st SMSC 74.02102.A73 2nd GMT 74.07922.0B3

SRN10KJ-5-GP

1

23

4

RN3959

RN3960

RN3960 SRN10KJ-5-GP

SRN10KJ-5-GP

+3.3V_RTC_LDO+3.3V_RUN

R3911

1 2

Do Not Stuff

23 1

PURE_HW_SHUTDOWN# 37,42

EMC2102_FAN_TACH_1 58

EMC2102_FAN_DRIVE 58

+3.3V_RUN

V_DEGREE

GND = Internal Oscillator Selected +3.3V = External 32.768kHz Clock Selected

+3.3V_RUN

12

R3905

C3906

SCD1U16V2KX-3GP

C3911

SCD1U16V2KX-3GP

R3905 10KR2F-2-GP

10KR2F-2-GP

TRIP_SET Pin Voltage V_DEGREE=(((Degree-75)/21)

12

R3915

R3915 2K37R2F-GP

2K37R2F-GP

T8 shutdown is set 88 deg-C.

32K suspend clock output

RUN_ENABLE42

ICH_SUSCLK_210222

A A

5

2N7002E-1-GP

D

.....

Q3902

G

CLK_32KCLK_32K_R

DY

CLK_32K

12

4

C3912

C3912 Do Not Stuff

Do Not Stuff

DJ1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Thermal/Fan Controllor EMC2102

Size Document Number Rev

Custom

Date: Sheet

3

2

Date: Sheet

DJ1 Montevina UMA

Taipei Hsien 221, Taiwan, R.O.C.

of

39 88Friday, February 26, 2010

1

A00

R3901

S

R3901

1 2

Do Not Stuff

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

DJ1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

DJ1 Montevina UMA

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

of

40 88Wednesday, February 24, 2010

A00

5

SSID = Reset.Suspend

4

3

2

1

+3.3V_ALW

D D

SM_PWROK11

C C

1 2

R4101 12K1R2F-L1-GPR4101 12K1R2F-L1-GP

R4102

R4102 10KR2J-3-GP

10KR2J-3-GP

1 2

SM_PWROK_R

U4101

5

4

A

VCC

B

GND

Y

NL17SZ08DFT2G-GP

1 2 3

S3_PWRGD 50 PM_SLP_S4# 22,37,50

B B

A A

5

4

3

2

DJ1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

DJ1 Montevina UMA

Taipei Hsien 221, Taiwan, R.O.C.

Power On Logic

41 88Friday, February 26, 2010

1

of

A00

5

4

3

2

1

SSID = Reset.Suspend

DY

C4202

B

12

E

DY

Q4202

Do Not Stuff

C

Do Not Stuff

R4202

R4203

Do Not Stuff

S

S S

S GD

GD

S

S S

S GD

GD

1 2 3 45

1 2

DY

Do Not Stuff

+3.3V_RUN

H_PWRGOOD8,20

D D

3V_5V_EN46

12

DY

AO4468 MAX 11.6A

C C

B B

+3.3V_ALW_2

R4204

1 2

100KR2J-1-GP

PM_SLP_S3#22,37,49,50

RUN_ENABLE39

RUN_ON_5V#

GDS

5

6

123 4

Q4203

Q4203 2N7002EDW-GP

2N7002EDW-GP

RUN_ENABLE

Run Power

+15V_ALW

R4205

R4205 100KR2J-1-GP

100KR2J-1-GP

1 2

R4206

1 2

10KR2J-3-GP

2010/01/07

R4210

1 2

10KR2J-3-GP

D4203

D4203 CH751H-40PT-GP

CH751H-40PT-GP

21

5V_RUN_ENABLE

12

C4201

C4201 SC6800P25V2KX-1GP

SC6800P25V2KX-1GP

3.3V_RUN_ENABLE3.3V_RUN_ENABLE

12

C4205

C4205 SCD01U50V2KX-1GP

SCD01U50V2KX-1GP

RDS(ON) < 14mȍ (VGS = 10V)

+5V_ALW +5V_RUN

+3.3V_ALW

D

8

D

7

D

6

D

8

D

7

D

6

U4202

AO4468-GP

U4203

AO4468-GP

H_PWRGD_R

2

D4202

3

BAS16-6-GP

1

1 2

R4201 1KR2J-1-GPR4201 1KR2J-1-GP

MAX Current 2313.3 mA

12

Design Current 1619.3 mA

C4203

C4203 SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

MAX Current 5395.1 mA Design Current 3776.5 mA

C4204

C4204 SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

H_THRMTRIP# 8,11,20,37

PURE_HW_SHUTDOW N# 37,39

S5_ENABLE 37

RUN_ON_5V#

Q4205

G

S

2N7002E-1-GP

.....

+3.3V_RUN

12

Q4205_D

D

R4211

100R2J-2-GP

U4201

D

8

D

7

D

6

R4215

A A

5

1 2

100KR2J-1-GP

4

1.5V_RUN_ENABLE

12

C4208

C4208 SCD1U25V2KX-GP

SCD1U25V2KX-GP

AO4468-GP

+1.5V_RUN+1.5V_SUS

S

1

S

2

S

3

GD

45

12

MAX Current 2911.1 mA Design Current 2037.8 mA

C4207

C4207 SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

3

DJ1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Power Plane Enable

Size Document Number Rev

A3

Date: Sheet

2

Date: Sheet

Power Plane Enable

DJ1 Montevina UMA

Taipei Hsien 221, Taiwan, R.O.C.

of

42 88Friday, February 26, 2010

1

A00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

DJ1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

DJ1 Montevina UMA

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

of

43 88Wednesday, February 24, 2010

A00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

DJ1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

DJ1 Montevina UMA

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

of

44 88Wednesday, February 24, 2010

A00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

DJ1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

DJ1 Montevina UMA

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

of

45 88Wednesday, February 24, 2010

A00

A

+3D3V_PWR

+3.3V_ALW

PG4603

12

Do Not Stuff

PG4604

12

Do Not Stuff

PG4607

12

Do Not Stuff

PG4609

12

Do Not Stuff

4 4

Do Not Stuff

PG4601

PG4612

PG4613

1 2

PG4616

1 2

12

+PWR_SRC

Do Not Stuff

PG4634

1 2

PG4611

PG4614

PG4617

+PWR_SRC _3V

12

PQ4602

.

2N7002E-1-GP

3V_5V_EN42

G

D

.

. .

.

51125_ENTRIP

Do Not Stuff

S

B

PC4605

C

+3.3V_ALW_2

12

PR4602

PR4602 100KR2J-1-GP

100KR2J-1-GP

51125_ENTIP1

12

PR4603

DY

130KR2F-GP

5

6

123 4

PQ4601

PQ4601 2N7002EDW-GP

2N7002EDW-GP

51125_ENTIP2

DY

PC4606

Do Not Stuff

12

PR4604

PR4604 160KR2F-GP

160KR2F-GP

Do Not Stuff

1 2

PG4615

51125_VCLK

12

PC4602

SC1KP50V2KX-1GP

PC4602

SC1KP50V2KX-1GP

PD4602

BAT54S-5-GP

PD3903_2

12

PD3903_1

3

2

12

PC4607

PC4607 SC1U25V3KX-1-GP

SC1U25V3KX-1-GP

PC4603

SCD1U25V3KX-GP

1

12

PD3904_1

3

2

PD3903_04

12

SCD1U25V3KX-GP

D

PC4604

SCD1U25V3KX-GP

PD4601

BAT54S-5-GP

1

+5V_PWR+15V_ALW

PC4609

12

PC4608

SCD1U25V3KX-GP

E

+PWR_SRC _3V

PC4610

PC4611

SCD01U50V2KX-1GP

12

SC10U25V6KX-1GP

D

678

DDD

PU4602

Design Current =7.6A

11.95A<OCP<14.12A

3 3

+3D3V_PWR +5V_PWR

PTC4601

PTC4603

12

DY

PC4619

Do Not Stuff

ST220U6D3VDM-15GP

Do Not Stuff

DY

20100118

6K65R2F-GP

10KR2F-2-GP

2 2

PR4601

PR4613

1 2

IND-2D2UH-111-G P

Do Not Stuff

12

PG4623

12

DY

51125_FB2_R

12

DY

12

PL4602

2D2R5F-2-GP

SC680P-GP

PR4610

PR4610 Do Not Stuff

Do Not Stuff

PC4601

PC4601 Do Not Stuff

Do Not Stuff

PR4607

PC4622

12

Close to VFB Pin (pin5)

I/P cap: 10U 25V K1206 X5R/ 78.10622.52L Inductor: 2.2UH FDVE0630-2R2M=P3 TOKO 21mohm Isat =8.7Arms 68.2R21B.10A O/P cap: 220U 6.3V PSLV0J227M(25) 25mOhm 2.236Arms NEC_TOKIN/77.C2271.00L O/P cap: 100U 6.3V TEPSLB20J107M(45)8R 45mOhm 1.374Arms NEC_TOKIN/77.C1071.081 H/S: FDSS8884 SO-8/ 23mohm/30mOhm@4.5Vgs/ 84.08884.037 L/S: FDS6690AS SO-8/ 12mohm/15mOhm@4.5Vgs/ 84.06690.E37

1 1

PU4602 FDS8884-GP

FDS8884-GP

SCD1U25V3KX-GP

SSS

GD

SSS

GD

123

4 5

SG

D

678

DDD

PU4601

PU4601 FDS6690AS-GP

FDS6690AS-GP

SSS

GD

SSS

GD

123

4 5

S

G

51125_VREF

+3.3V_ALW_2

51125_VREF

+3.3V_ALW_2

PC4616

12

PR4605

0R3J-0-U-GP

51125_VBST2_1 51125_VBST1_1

DY

PR4617

1 2

Do Not Stuff

PR4618

1 2

Do Not Stuff

PR4619 Do Not Stuff

PR4620 Do Not Stuff

TONSEL

GND

VREF

VREG3

VREG5

1 2

DY

PR4609 Do Not Stuff

51125_VREF

PC4623

SCD22U10V2KX-1GP

PC4623

SCD22U10V2KX-1GP

12

PR4615

12

Do Not Stuff

12

DY

12

DY

51125_VBST2

51125_DRVH2

51125_LL2

51125_DRVL2

51125_VO2

51125_FB2

51125_EN

51125_ENTIP2

51125_TONSEL

51125_SKIPSEL

TPS51125RGER-GP

74.51125.073

+3.3V_ALW_2

Do Not Stuff

200kHz

245kHz

300kHz

365kHz

+PWR_SRC

PC4613

PC4612

SCD01U50V2KX-1GP

Do Not Stuff

12

DY

16

PU4603

VIN

9

VBST2

10

DRVH2

11

LL2

12

DRVL2

7

VO2

5

VFB2

13

EN0

6

ENTRIP2

3

VREF

4

TONSEL

14

SKIPSEL

PG4628

1 2

PG4631

1 2

PC4625

SC4D7U10V5KX-4GP

CH2CH1 VREF(2V)

265kHz

305kHz

375kHz

460kHz

22

VBST1

21

DRVH1

20

LL1

19

DRVL1

24

VO1

2

VFB1

23

PGOOD

1

ENTRIP1

15

GND

25

GND

18

VCLK

VREG3

VREG5

8

17

+5V_ALW2

PC4626

3D3V_AUX_S5_5_51125

SC22U6D3V5MX-2GP

SC10U6D3V5KX-1GP

12

PC4627

SKIPSEL GNDVREG3 or VREG5

Operating

OOA Auto Skip Auto Skip

Mode

Operating

enable both

Mode

LDOs, VCLK on and ready to turn on switcher channels

PR4606

0R3J-0-U-GP

51125_VBST1

1 2

51125_DRVH1

51125_LL1

51125_DRVL1

51125_VO1

51125_FB1

3V_5V_POK

51125_ENTIP1

51125_VCLK

+3.3V_ALW_2

PR4621

1 2

Do Not Stuff

OpenEN0 820kȍ to GND

enable both LDOs, VCLK off and ready to turn on switcher channels

+3.3V_ALW

+3.3V_RTC_LDO

+PWR_SRC _5V

PC4618

PC4615

PC4614

D

12

SC10U25V6KX-1GP

12

Do Not Stuff

SC10U25V6KX-1GP

PL4601

1 2

IND-2D2UH-111-G P

PR4608

PR4608 2D2R5F-2-GP

2D2R5F-2-GP

PC4621

PC4621 SC680P-GP

SC680P-GP

Do Not Stuff

PC4624

12

PR4611

SCD01U50V2KX-1GP

12

PG4624

12

DY

51125_FB1_R

12

DY

12

Close to VFB Pin (pin2)

Design Current = 7A 11A<OCP< 13A

Do Not Stuff

12

DY

PC4620

Do Not Stuff

PR4612

PR4612 33KR2F-GP

33KR2F-GP

PR4614

PR4614 21K5R2F-GP

21K5R2F-GP

20100118

12

PTC4602

ST220U6D3VDM-15GP

678

DDD

PU4604

FDS8884-GP

SSS

GD

SSS

3V_5V_POK 37

GD

123

4 5

G

S

D

678

DDD

PU4605

FDS6690AS-GP

SSS

GD

SSS

GD

123

4 5

SG

SCD1U25V3KX-GP

SCD1U25V3KX-GP PC4617

PC4617

1 2

12

PR4616

PR4616 100KR2J-1-GP

100KR2J-1-GP

I/P cap: 10U 25V K1206 X5R/ 78.10622.52L Inductor: 2.2UH FDVE0630-2R2M=P3 TOKO 21mohm Isat =8.7Arms 68.2R21B.10A O/P cap: 220U 6.3V TLPSLV0J227M(15)12RE 15mOhm 2.887Arms NEC_TOKIN/77.C2271.31L H/S: FDSS8884 SO-8/ 23mohm/30mOhm@4.5Vgs/ 84.08884.037 L/S: FDS6690AS SO-8/ 12mohm/15mOhm@4.5Vgs/ 84.06690.E37

PWM only

GND

disable all circuit

+5V_PWR

1 2

Do Not Stuff

1 2

Do Not Stuff

1 2

Do Not Stuff

1 2

Do Not Stuff

1 2

Do Not Stuff

1 2

Do Not Stuff

1 2

Do Not Stuff

1 2

Do Not Stuff

PG4618

PG4621

PG4619

PG4620

PG4622

PG4625

PG4626

PG4627

+5V_ALW

PG4602

1 2

Do Not Stuff

PG4605

1 2

Do Not Stuff

PG4606

1 2

Do Not Stuff

PG4608

1 2

Do Not Stuff

PG4610

1 2

Do Not Stuff

+PWR_SRC _5V+PWR_SRC

DJ1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiw an, R.O.C.

Taipei Hsien 221, Taiw an, R.O.C.

Title

Size Document Number Rev

A2

DJ1 Montevina UMA

Date: Sheet

A

B

C

D

Date: Sheet of

Taipei Hsien 221, Taiw an, R.O.C.

TPS51125_5V/3D3V

46 88Friday, February 26, 2010

E

46 88Friday, February 26, 2010

A00

of

5

4

3

2

1

SSID = CPU.Regulator

51620_PWRMON

51620_VR_ON

1 2

PR4705Do Not Stuff PR4705Do Not Stuff

51620_CLKEN#

51620_DPRSLPVR

32

31

33

36

37

38

39

34

35

40

GND

ISLEW

V5FILT

VR_TT#11PSI#

12

13

PU4705

VR_ON

PGOOD

CLK_EN#

DPRSLPVR

VID317VID416VID515VID614DPRSTP#

VID119VID2

18

30

DRVH1

29

VBST1

28

LL1

27

DRVL1

26

V5IN

25

PGND

24

DRVL2

23

LL2

22

VBST2

21

DRVH2

VID0

TPS51620RHAR-GP

20

4

TONSEL

OSRSEL

TRIPSEL

PWRMON

51620_V5IN

51620_DRVH1 51620_VBST1 51620_LL1 51620_DRVL1

51620_DRVL2 51620_LL2 51620_VBST2 51620_DRVH2

1 2

Do Not Stuff

1 2

PR4708

499R2F-2-GP

PR4709

1 2

1K91R2F-1-GP

PG4711

1

CPUCORE_ON 37

1

TP4701TP4701

DPRSLPVR 11,22

+3.3V_RUN

PR4712

1 2

2D2R3-1-U-GP

PC4708

12

SC2D2U6D3V3KX-GP

51620AGND

TP4702TP4702

VGATE_PWRGD 22,37

+5V_RUN

PR4743

12

0R3J-0-U-GP

51620_VBST1_R

PR4742

PR4742 0R3J-0-U-GP

0R3J-0-U-GP

1 2

51620_VBST2_R

SC1U25V3KX-1-GP

PC4709

SC1U25V3KX-1-GP

PC4716

1 2

84.07686.037

1 2

3

678

DDD S

PU4703

SI7686DP-T1-GP

SSGD

123

4 5

678

DDD

D

DDD

D

PU4704

SSS

G

123

4 5

PC4715

12

SC100P50V2JN-3GP

51620_CSN1

678

DDD S

PU4707

SSGD

123

678

D

PU4709

SSS

123

51620_CSP2

12

PC4727

PC4727 SC100P50V2JN-3GP

SC100P50V2JN-3GP

SI7686DP-T1-GP

4 5

SIR460DP-T1-GE3-GP

G

4 5

12

PC4717

PC4717 SC100P50V2JN-3GP

SC100P50V2JN-3GP

678

SI7686DP-T1-GP

4 5

84.07686.037

678

DDD

SIR460DP-T1-GE3-GP

G

4 5

51620_CSN2

12

SI7686DP-T1-GP

SIR460DP-T1-GE3-GP

51620_CSP1 51620_CSP1_R

4 5

84.07686.037

DDD

G

4 5

PU4706

PU4708

PU4702

PU4701

SI7686DP-T1-GP

SIR460DP-T1-GE3-GP

DDD S

SSGD

84.07686.037

123

678

DDD

D

DDD

D

SSS

123

12

PC4714

PC4714 SC100P50V2JN-3GP

SC100P50V2JN-3GP

DDD S

SSGD

123

D

DY

SSS

123

DY

12

PC4728

PC4728 SC100P50V2JN-3GP

SC100P50V2JN-3GP

12

PC4702

SC10U25V6KX-1GP

12

PR4772

Do Not Stuff

DY

12

PC4740

DY

Do Not Stuff

PR4721

1 2

470R2F-GP

PR4723

1 2

470R2F-GP

12

PC4719

SC10U25V6KX-1GP

12

PR4773

Do Not Stuff

12

PC4741

Do Not Stuff

1 2

PC4726

SC100P50V2JN-3GP

1 2

12

PC4720

SC10U25V6KX-1GP

PR4740

470R2F-GP

PR4741

470R2F-GP

PC4703

SC10U25V6KX-1GP

PG4632

12

PC4721

12

PC4704

SC10U25V6KX-1GP

12

Do Not Stuff

12

51620_CSN1_R

12

PC4722

SC10U25V6KX-1GP

Do Not Stuff

51620_CSP2_R

2

+PWR_SRC

12

PC4705

SC10U25V6KX-1GP

PL4701

1 2

L-D36UH-1-GP

14KR2F-GP

PR4716

1 2

PR4717

1 2

NTC-100K-10-GP

PC4712

1 2

SCD033U16V2KX-GP

+PWR_SRC

12

PC4723

SCD1U25V3KX-GP

SC10U25V6KX-1GP

12

PG4629

12

PR4735

PR4735 14KR2F-GP

14KR2F-GP

PR4738

1 2

NTC-100K-10-GP

51620_CSN2_R

12

PC4706

SCD1U25V3KX-GP

PR4715

56K2R2F-2-GP

PR4718

PR4717_R

1 2

20K5R2F-GP

12

PC4724

SCD1U25V3KX-GP

PL4702

1 2

L-D36UH-1-GP

PR4737

1 2

56K2R2F-2-GP

PR4738_R

PC4725

1 2

SCD033U16V2KX-GP

12

PG4633

PR4739

1 2

20K5R2F-GP

+VCC_CORE

PTC4701

PTC4703

12

Do Not Stuff

DY

Do Not Stuff

PTC4702

12

ST330U2VDM-4-GP

+PWR_SRC

12

PTC4704

DY

Do Not Stuff

CPU noise

Thermal Design Current = 34A PeakCurrent = 47A OCP >57.8A

+VCC_CORE

PTC4708

PTC4707

12

ST330U2VDM-4-GP

12

PG4630

Do Not Stuff

DJ1

Title

Size Document Number Rev

Custom

Date: S heet

ST330U2VDM-4-GP

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

CPU VCORE POWER

DJ1 Montevina UMA

1

DY

12

47 88Friday, February 26, 2010

PTC4705

PTC4705 Do Not Stuff

Do Not Stuff

of

A00

VREF

51620_CSP1

51620_CSN1 51620_CSN2 51620_CSP2

V5FILT

30mV

OFFMedium

500KHz

51620_TRIPSEL

51620_TONSEL

51620_OSRSEL

51620_ISLEW

V5FILT

12

PC4701

51620_DPRSTP#

51620_PSI#

41

1

DROOP

2

VREF

3

GND

4

CSP1

5

CSN1

6

CSN2

7

CSP2

8

GNDSNS

9

VSNS

10

THERM

VID6 VID5 VID4 VID3

VID2 VID1 VID0

12

PR4744

PSI#8

CPU_VID6 CPU_VID5 CPU_VID4 CPU_VID3

CPU_VID2 CPU_VID1 CPU_VID0

1 2

DY

1 2

PC4707

1 2

SC68P50V2JN-1GP

PR4713

1 2

5K1R2F-2-GP

12

DY

PR4714

PR4714 Do Not Stuff

Do Not Stuff

2K7R2J-GP

1 2

PR4727

1 2

56R2J-4-GP

1 2

PR4728 Do Not StuffPR4728 Do Not Stuff

1 2

PR4729 Do Not StuffPR4729 Do Not Stuff

400KHz

DY

PR4704Do Not StuffDYPR4704Do Not Stuff

PR4706Do Not Stuff PR4706Do Not Stuff

PR4707Do Not Stuff PR4707Do Not Stuff

12

PR4710Do Not StuffDYPR4710Do Not Stuff

PR4726Do Not Stuff PR4726Do Not Stuff

PR4711124KR2F-GP PR4711124KR2F-GP

SC1U10V3KX-3GP

51620_DROOP

1 2

DY

PC4710

PC4710 Do Not Stuff

Do Not Stuff

PC4711

1 2

SCD22U10V3KX-2GP

51620_GNDS 51620_VSNS 51620_THERM

PR4730 Do Not StuffPR4730 Do Not Stuff

1 2

PR4731 Do Not StuffPR4731 Do Not Stuff

1 2

PR4732 Do Not StuffPR4732 Do Not Stuff

1 2

PR4733 Do Not StuffPR4733 Do Not Stuff

1 2

PR4701 Do Not StuffPR4701 Do Not Stuff

1 2

PR4734 Do Not StuffPR4734 Do Not Stuff

1 2

PR4736 Do Not StuffPR4736 Do Not Stuff

1 2

3.3V

25mV

Maximum

N/A

+3.3V_RUN

V5FILT

PR4719

1 2

Do Not Stuff

PC4713

VREF

V5FILT

VREF

12

D D

C C

VSS_SENSE9

SC100P50V2JN-3GP

2009/10/30 X02

PR4724

VCC_SENSE9

B B

A A

TRIPSEL

OSRSEL

TONSEL

OVPSEL N/A

1 2

8D2R2J-GP

12

PC4718

SC100P50V2JN-3GP

PR4725

1 2

20KR2F-L-GP

+1.05V_VCCP

CPU_PROCHOT#8

H_DPRSTP#8,11,20

CPU_VID[6..0]9

I/P cap: 10U 25V K1206 X5R/ 78.10622.52L Inductor: 0.36UH ETQP4LR36WFC Irat =24Arms PANASONIC 1.1mohm/ 68.R3610.20A O/P cap: 330U 2V EEFSX0D331XE 6mOhm 3.0Arms Panasonic/79.33719.20L H/S: SI7686DP/ POWERPAK-8/ 11mOhm/14mOhm @4.5Vgs/ 84.07686.037 L/S: SiR460DP/ POWERPAK-8/ 4.9mOhm/6.1mohm@4.5Vgs/ 84.00460.037 NTC:TH11-3H103FT Mitsubishi 10Kohm /B-vaLue 3370K / 69.60026.001 Freq=300KHz@PER PHASE

GND

15mV

VREF

20mV

Minimum

200KHz

ENABLE

300KHz

DISABLE

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

DJ1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU VCORE POWER(2/2)

Size Document Number Rev

A3

Date: Sheet

CPU VCORE POWER(2/2)

DJ1 Montevina UMA

Taipei Hsien 221, Taiwan, R.O.C.

of

48 88Wednesday, February 24, 2010

1

A00

5

4

3

2

1

+1.05V_VCCP+1.05VTT_PWR

PG4902

SSID = PWR.Plane.Regulator_1p05v

D D

C C

PG4908

1 2

Do Not Stuff

PG4901

1 2

Do Not Stuff

PG4913

1 2

Do Not Stuff

PG4915

1 2

Do Not Stuff

PM_SLP_S3#22,37,42,50

+1.05V_VTT_PWR_SRC+PW R_SRC

PM_SLP_S3#

+5V_RUN

+3.3V_RUN

PR4902 84K5R2F-GPPR4902 84K5R2F-GP

1 2

PR4907 120KR2J-GPPR4907 120KR2J-GP

PD4902

CH751H-40PT-GP

RUNPWROK37

21

SCD1U16V2KX-3GP

Do Not Stuff

1

DY

2

PD4901

100KR2J-1-GP

PR4901

51218_1.05VTT_TRIP

+1.05V_EN VTT_SENSE 51218_1.05VTT_CCM

PC4901

12

3

12

PR4904

PR4904 470KR2F-GP

470KR2F-GP

TPS51218 for +1.05V_VCCP

PC4906

PU4903

1

PGOOD

2

TRIP

3

EN

4

VFB

5

RF

TPS51218DSCR-GP-U1

GND

VBST

DRVH

V5IN

DRVL

11

51218_VBST_VTT

10 9 8

SW

7

51218_DRVL_VTT

6

1 2

PR4903

51117B_LL1_VTT

1R3F-GP

+5V_ALW

12

PC4907

PC4907 SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

51218_DRVL_VTT

A00

PC4906

SCD1U25V3KX-GP

SIR460DP-T1-GE3-GP

+1.05V_VTT_PWR_SRC

12

51218_DRVH_VTT 51218_SW_VTT

PU4901

4 5

G

3

S

2

S

1

S

SC10U25V6KX-1GP

PC4904

PC4902

1 2

678

DDD S

PU4902

SI7686DP-T1-GP

SSGD

123

4 5

D

6

D

7

D

8

D

1 2

12

PR4905 2D2R5J-1-GPPR4905 2D2R5J-1-GP

51218_SW_GND_VTT

12

PC4910

PC4910 SC330P50V2KX-3GP

SC330P50V2KX-3GP

SC4D7U25V5KX-GP

SCD1U50V3KX-GP

PC4905

1 2

PL4901

1 2

IND-1UH-80-GP

VTT_SENSE

1 2

PC4903

Do Not Stuff

PG4919

12

R1

PR4906

10KR2F-2-GP

1.05V_VTT

PG4902

1 2

Do Not Stuff

PG4904

1 2

Do Not Stuff

PG4906

1 2

Do Not Stuff

PG4909

1 2

Do Not Stuff

PG4911

1 2

Do Not Stuff

PG4914

1 2

Do Not Stuff

PG4917

1 2

Do Not Stuff

PC4908

12

Design Current = 13.7A

21.55A<OCP<25.47A

SC4D7U6D3V5KX-3GP

12

SCD1U10V2KX-5GP

PC4909

12

PG4903

1 2

Do Not Stuff

PG4905

1 2

Do Not Stuff

PG4907

1 2

Do Not Stuff

PG4910

1 2

Do Not Stuff

PG4912

1 2

Do Not Stuff

PG4916

1 2

Do Not Stuff

PG4918

1 2

Do Not Stuff

+1.05VTT_PWR

12

PTC4902

SE220U2VDM-8GP

+1.05V_VCCP+1.05VTT_PWR

PTC4901

SE220U2VDM-8GP

12

R2

20KR2F-L-GP

PR4908

Frequency setting

B B

470K -->290KHz 200K -->340KHz

PR4908

Vout=0.704V*(R1+R2)/R2

100K -->380KHz 39K -->430KHz

A A

5

4

3

I/P cap: 10U 25V K1206 X5R/ 78.10622.52L Inductor: 1uH FDUE1040D-1R0M=P3 TOKO DCR:2.35mohm Isat =17.9Arms 68.1R01B.10A O/P cap: 220U 2V EEFCX0D221R 15mOhm 2.7Arms PANASONIC/ 79.22719.20L H/S: SI7686DP-T1-E3/11mohm/ 14mOhm@4.5Vgs/ 84.07686.037 L/S: SIR460DP-T1-GE3-GP/4.5mOhm/6.1mohm@4.5Vgs/ 84.00460.037

DJ1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

TPS51218_+1.05V_VCCP

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

DJ1 Montevina UMA

Taipei Hsien 221, Taiwan, R.O.C.

1

A00

of

49 88Friday, February 26, 2010

of

49 88Friday, February 26, 2010

of

49 88Friday, February 26, 2010

A00

5

4

3

2

1

SSID = PWR.Plane.Regulator_1p5v0p75v

+5V_ALW

PR5002

12

5D1R3J-GP

+5V_ALW

PR5015

12

C5022

PR5008

DY

PR5009

Do Not Stuff

11KR2F-L-GP

1 2

SC1KP50V2KX-1GP

SCD1U16V2KX-3GP

+1.5V_SUS_P

SC1U10V3KX-3GP

Do Not Stuff

PC5006

D D

+3.3V_ALW

PR5005

PR5005 20KR2J-L2-GP

+5116_PWR_SRC

C C

S3_PWRGD41

PM_SLP_S4#22,37,41

+5V_ALW

+1.5V_SUS_P

+0D75V_DDR_P

20KR2J-L2-GP

1 2

PR5006 Do Not Stuff

1 2

DY

R5017

1 2

10KR2J-3-GP

1 2

Do Not Stuff

Design Current = 0.7A

+0D75V_DDR_P

12

PC5013

B B

PC5013

SCD1U10V2KX-5GP

SC10U6D3V5KX-1GP

PC5014

12

PC5015

PC5016

SC10U6D3V5KX-1GP

State S3 S5 VDDR VTTREF VTT

S0

S3

S4/S5

Lo Hi

HiHi

On

LoLo

VDDQSET

GND

V5IN

A A

FB Resistors

2.5

1.8

Adjustable

5

VVDDQSNS/2

1 2

PC5002

On

51116_VDD

RT: Non_ASM TI: ASM

PC5005

DY

1 2

+0D75V_DDR_P

Do Not Stuff

Off(Hi-Z)

OffOffOff

12

PC5004

SC1U10V3KX-3GP

16

ILIM

13

PGD

12

NC#12

11

0D75V_EN

12

PG5014

1 2

PG5016

1 2

EN/PSV

10

VTTEN

23

VTTIN

7

NC#7

TPS51116RGER-GP-U

1

PGND2

4

TON

24

VTT

2

VTTS

GND

25

+0.75V_DDR_VTT

VSSA

3

On

NOTEVTTREF and VTTVDDQ (V)

DDR

DDR2

1.5 V < VVDDQ < 3 V

+5V_ALW

12

PC5003

PC5003 SC1U10V3KX-3GP

SC1U10V3KX-3GP

15

14

PU5002

PR5007

VDDP

22

BST

TPS51116_UGT

21

DH

TPS51116_PHS

20

LX

TPS51116_LGT

19

DL

18

PGND1

17

PGND1

VDDQS

FB

VCCA

REF

5

+V_DDR_REF

PR5011

1 2

Do Not Stuff

12

PC5008

PC5008 SCD033U16V3KX-GP

SCD033U16V3KX-GP

TPS51116_UGT

TPS51116_VBST

I/P cap: 10U 25V K1206 X5R/ 78.10622.52L Inductor: 1.5UH FDVE1040-1R5M=P3 DCR:4.6mohm Isat =13.7Arms TOKO/ 68.1R51A.10G O/P cap: 330U 2.5V EEFCX0E331QR 15mOhm 2.7Arms PANASONIC/ 79.3371V.20L H/S: FDS8880 SO-8/9.6mohm/ 12mOhm@4.5Vgs/ 84.08880.037 L/S: FDS6676AS/ 5.9mOhm/7.25mohm@4.5Vgs/ 84.06676.A37 Switching freq-->400KHz

4

8

9

6

SCD1U25V3KX-GP

TPS51116_LGT

TPS51116_VDDQSNS

51116_VDDQSET

+5V_ALW

DY

1 2

PC5017

TPS51116_VBST1

VDDP

1 2

0R3J-0-U-GP

1 2

Do Not Stuff

12

PC5007

PC5007 Do Not Stuff

Do Not Stuff

TPS51116_VBST

PR5010

DY

2 1

PD5001

PD5001 Do Not Stuff

Do Not Stuff

PM_SLP_S3#22,37,42,49

PM_SLP_S4#22,37,41

FDS8880-NL-GP

3

1 2

PR5004 Do Not Stuff

1 2

+5116_PWR_SRC

678

DDD

PU5003

SSS

GD

SSS

GD

123

4 5

TPS51116_PHS

678

DDD

PU5001 FDS6676AS-GP

SSS

GD

SSS

GD

123

4 5

PR5003 Do Not StuffPR5003 Do Not Stuff

DY

PC5009

1 2

SC10U25V6KX-1GP

IND-1D5UH-55-GP

12

PR5012

DY

Do Not Stuff

TPS51116_PHS_SET

12

PC5020

DY

Do Not Stuff

DY

PC5010

1 2

SC10U25V6KX-1GP

PL5001

1 2

TPS51116_VDDQSNS

51116_VDDQSET

0D75V_EN

12

PC5001

PC5001 Do Not Stuff

Do Not Stuff

1 2

30KR2F-GP

PC5011

SCD1U50V3KX-GP

PR5013

PR5014

12

PC5012

1 2

PG5017

12

2

+PWR_SRC

SC4D7U25V5KX-GP

Do Not Stuff

12

DY

PG5003

Do Not Stuff

PG5001

Do Not Stuff

PG5006

Do Not Stuff

PG5008

Do Not Stuff

Design Current = 9.82A

15.43A<OCP< 18.24A

12

PC5018

SC4D7U6D3V5KX-3GP

PC5021

PC5021 Do Not Stuff

Do Not Stuff

Close to VFB Pin (pin5)

DJ1

Title

Size Document Number Rev

Date: Sheet

+5116_PWR_SRC

12

+1.5V_SUS_P

12

DY

PC5019

SCD1U10V2KX-5GP

Custom

PTC5001

PTC5001 SE220U2VDM-8GP

SE220U2VDM-8GP

PTC5002

Do Not Stuff

TPS51116_+1.5V_SUS

20100118

DJ1 Montevina UMA

+1.5V_SUS_P

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

1

PG5002

1 2

Do Not Stuff

PG5004

1 2

Do Not Stuff

PG5005

1 2

Do Not Stuff

PG5007

1 2

Do Not Stuff

PG5009

1 2

Do Not Stuff

PG5010

1 2

Do Not Stuff

PG5011

1 2

Do Not Stuff

PG5012

1 2

Do Not Stuff

PG5013

1 2

Do Not Stuff

PG5015

1 2

Do Not Stuff

50 88Friday, February 26, 2010

+1.5V_SUS

of

A00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

DJ1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

DJ1 Montevina UMA

Taipei Hsien 221, Taiwan, R.O.C.

(Reserved)

1

of

51 88Wednesday, February 24, 2010

A00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

DJ1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

DJ1 Montevina UMA

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

of

52 88Wednesday, February 24, 2010

A00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

DJ1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

DJ1 Montevina UMA

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

of

53 88Wednesday, February 24, 2010

A00

5

4

3

2

1

SSID = VIDEO

SSID = Inverter

LVDS CONNECTOR

LCD1

D D

C C

B B

A A

49

47

46

45

44

43

42

41

48

IPEX-CONN40-2R-GP-U

20.F1093.040

1 2

Do Not Stuff

GFX_PWR_SRC +LCDVDD

51 40 39 38 37 36 35 34 33

LCD_BRIGHTNESS

32

LCD_CBL_DET#_C

31

BLON_OUT_C

30

LCD_TST_C

29 28 27 26

LCD_DET_G

25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2

1 50

Camera Power

R5411

EC5403

DY

12

+3.3V_CAMERA+3.3V_RUN

12

C5401

SCD1U10V2KX-5GP

+3.3V_RUN

LDDC_CLK 13 LDDC_DATA 13

VGA_TXAOUT0- 13 VGA_TXAOUT0+ 13

VGA_TXAOUT1- 13 VGA_TXAOUT1+ 13

VGA_TXAOUT2- 13 VGA_TXAOUT2+ 13

VGA_TXACLK- 13 VGA_TXACLK+ 13

+3.3V_CAMERA

C5407

C5407 SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

1 2

C5404

SC1U6D3V2KX-GP

R5417 100R2J-2-GPR5417 100R2J-2-GP

1 2

12

R5418

R5418 100KR2J-1-GP

100KR2J-1-GP

USB_CAMERA# USB_CAMERA

LBKLT_CTL

LCD_TST

12

DY

EC5405

Do Not Stuff

EC5406

Do Not Stuff

LCD_CBL_DET#_C LCD_TST_C BLON_OUT_C LCD_DET_G

LBKLT_CTL 13

RN5401

1 2 3 4 5

SRN100J-4-GP

R5409Do Not Stuff R5409Do Not Stuff

1 2

R5412

1 2

2010/01/05

8 7 6

Do Not Stuff

LCD_CBL_DET# 37

LCD_TST 37

BLON_OUT 37

USB_PN11 21 USB_PP11 21

GFX_PWR_SRC +PWR_SRC

+15V_ALW

LCDVDD_EN13

LCD_TST_EN37

For EMI request

5

4

3

INVERTER POWER

12

C5402

SC1KP50V2KX-1GP

C5403

C5403 SCD1U50V3KX-GP

SCD1U50V3KX-GP

1 2

SSID = VIDEO

+3.3V_RUN

330KR2J-L1-GP

R5414

12

FPVCC_CTL1

1 2

C5411 SCD068U50V-GPC5411 SCD068U50V-GP

1 2

DY

Do Not Stuff

R5415

2

ENVDD_D

+3.3V_ALW

Q4103

R1

2

IN

DDTC144EUA-7F-GP

12

X01

D4102

D4102 BAT54C-U -GP

BAT54C-U -GP

3

F5401

12

POLYSW-1D1A24V-GP-U

LCD POWER

Q5401

D

1 2 3 4

1 2

R5416 47KR2J-2-GPR5416 47KR2J-2-GP

R2

DJ1

Title

Size Document Number Rev

A3

Date: Sheet

D

6

D

D G

G

SI3456DDV-T1-GE3-GP

OUT

3

GND

1

5

S

Q5402

34

2

5

1

6

2N7002EDW-GP

FPVCC_CTL3

LCD/Inverter Connector

DJ1 Montevina UMA

+LCDVDD

12

R5413

120R3J-2-GP

LCDVDD_1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

12

C5405

SC10U6D3V5KX-1GP

of

54 88Friday, February 26, 2010

1

12

C5406

SCD1U10V2KX-5GP

A00

5

SSID = VIDEO

D D

Layout Note:

*Pi-filter & 150 Ohm pull-down resistors should be as close as to CRT CONN.

4

3

DDC_DATA_CON13

DDC_CLK_CON13

SC22P50V2JN-4GP

+5V_CRT_RUN

C5514

1

23

RN5501

SRN2K2J-1-GP

4

DDC_DATA_CON

12

C5513

SC22P50V2JN-4GP

DDC_CLK_CON

2

+5V_CRT_RUN

AFTP5502AFTP5502

CRT_R

CRT_G

CRT_B

1

CRT1

16

6 1

11

7 2 8 3 9 4

10

5

17

VIDEO-15-127-GP-U

1

VIDEO-15-127-GP-U

20.20401.015

DDC_DATA_CON

12

JVGA_HS

13

JVGA_VS

14

DDC_CLK_CON

15

12

DY

C5515

Do Not Stuff

12

DY

C5516

Do Not Stuff

* RGB signal will hit 75 Ohm first, then pi-filter, finally CRT CONN.

L5501

BLM15BB220SS1D-GP

L5502

L5503

BLM15BB220SS1D-GP

12

C5507

SC8P250V2CC-GP

12

C5506

Do Not Stuff

1 2

M_RED13

M_GREEN13

C C

M_BLUE13

12

R5501

150R2F-1-GP

12

R5502

150R2F-1-GP

12

DY

R5503

150R2F-1-GP

12

C5504

Do Not Stuff

DY

12

C5505

Do Not Stuff

DY

CRT_R

CRT_G

CRT_B

12

C5508

SC8P250V2CC-GP

12

C5509

SC8P250V2CC-GP

AFTP5501AFTP5501 AFTP5508AFTP5508 AFTP5503AFTP5503 AFTP5506AFTP5506 AFTP5507AFTP5507 AFTP5504AFTP5504

TP5505TP5505 TP5509TP5509

+5V_CRT_RUN

1

DDC_DATA_CON

1

DDC_CLK_CON

1

CRT_R

1

CRT_G

1

CRT_B

1

JVGA_HS

1

JVGA_VS

1

2010/01/15

B B

R5505

1 2

Do Not Stuff

A00

Hsync & Vsync level shift

GMCH_HSYNC13

14

4

U5501B

A A

GMCH_VSYNC13

5 6

DY

Do Not Stuff

7

R5506

1 2

Do Not Stuff

+5V_CRT_RUN

14

13

U5501D

12 11

DY

Do Not Stuff

7

DY

12

C5512

C5512 Do Not Stuff

Do Not Stuff

HSYNC_5

VSYNC_5

RN5502

4

Do Not Stuff

DY

CRT_R

CRT_G

JVGA_HS

23

JVGA_VS

1

CRT_B

D5501

3

DY

Do Not Stuff

D5503

3

DY

Do Not Stuff

D5504

3

DY

Do Not Stuff

+5V_RUN

2

1

2

1

2

1

+5V_CRT_RUN

14

1

2 3

DY

U5501A

7

Do Not Stuff

+5V_CRT_RUN

14

10

9 8

DY

U5501C

7

Do Not Stuff

SCD01U16V2KX-3GP

+5V_CRT_RUN +5V_RUN

12

C5511

A00

5

4

3

2

D5502

K A

RB551V-30-2GP

DJ1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet

DJ1 Montevina UMA

Taipei Hsien 221, Taiwan, R.O.C.

CRT Connector

1

of

55 88Friday, February 26, 2010

of

55 88Friday, February 26, 2010

of

55 88Friday, February 26, 2010

A00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

DJ1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

DJ1 Montevina UMA

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

of

56 88Wednesday, February 10, 2010

A00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

DJ1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

DJ1 Montevina UMA

Taipei Hsien 221, Taiwan, R.O.C.

HDMI

57 88Wednesday, February 24, 2010

1

of

A00

5

4

3

2

1

SSID = User.Interface

ITP Connector

D D

C C

DEBUG1

DY

Do Not Stuff

+3.3V_RUN

1 2 3 4 5 6 7 8 9 10 11 12

LPC_LFRAME#_IN

R5802 Do Not Stuff

1 2

DY

R5804 Do Not Stuff

1 2

DY

1 2

DY

R5805 Do Not Stuff

R5806 Do Not Stuff

R5801

Do Not Stuff

1 2

DY

R5803 Do Not Stuff

1 2

DY

1 2

DY

LPC_LAD0LPC_LAD0_IN LPC_LAD1LPC_LAD1_IN LPC_LAD2LPC_LAD2_IN LPC_LAD3LPC_LAD3_IN

LPC_LFRAME# 20,37 PLT_RST# 11,21,37,76

PCLK_FWH 7

LPC_LAD[0..3] 20,37

H_CPURST# use pull-up Resistor close ITP connector 500 mil ( max ), others place near CPU side.

CPU

ITP Connector

TCK(PIN AC5)

TCK(PIN 5)

FBO(PIN 11)

SSID = Thermal

Fan Connector

B B

FAN1

EMC2102_FAN_TACH_139

EMC2102_FAN_DRIVE39

*Layout* 20 mil

A A

5

4

EMC2102_FAN_TACH_1

EMC2102_FAN_DRIVE

KA

12

C5801

C5801 SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

AFTP5801AFTP5801

D5801

D5801 RB551V-30-2GP

RB551V-30-2GP

1

3

5 3 2

1 4

FOX-CON3-6-GP-U

20.D0210.103

AFTP5802AFTP5802

AFTP5803AFTP5803

31

EMC2102_FAN_TACH_1

1

EMC2102_FAN_DRIVE

1

2

DJ1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

ITP/Fan Connector

Size Document Number Rev

A3

Date: Sheet

ITP/Fan Connector

DJ1 Montevina UMA

Taipei Hsien 221, Taiwan, R.O.C.

of

58 88Friday, February 26, 2010

1

A00

5

4

3

2

1

SSID = SATA

SATA HDD Connector

D D

+3.3V_RUN

SC10U6D3V5KX-1GP

+5V_RUN

SC10U6D3V5KX-1GP

SATA_TXN020

SATA_RXP0_C20

C C

SATA_RXN0_C20

12

C5901

DY

Do Not Stuff

12

C5906

C5906 SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

1 2 1 2

C5904SCD01U50V2KX-1GP C5904SCD01U50V2KX-1GP C5905SCD01U50V2KX-1GP C5905SCD01U50V2KX-1GP

SATA_RXP0 SATA_RXN0

C5903

C5902

SATA_TXP020

HDD1

P1

V33

P2

V33

P3

V33

P7

V5

P8

V5

P9

V5

P13

V12

P14

V12

P15

V12

S2

A+

S3

A-

S6

B+

S5

B-

SKT-SATA7P-15P-23-GP

GND GND GND GND GND GND GND GND

DAS/DSS

NP1 NP2

23

24

NP1 NP2

S1 S4 S7 P4 P5 P6 P10 P12

P11

ODD Connector

B B

ODD1

8 NP1 S1

SATA_TXP1_DJ2

S2

SATA_TXN1_DJ2

S3 S4

SATA_RXN1

S5

SATA_RXP1

S6 S7

P1 P2 P3 P4 P5 P6 NP2 9

SKT-SATA7P-6P-4-GP

22.10300.811

2010/01/05

A A

A00

Do Not Stuff

R5901

1 2

R5902

1 2

Do Not Stuff

1 2 1 2

C5907SCD01U50V2KX-1GP C5907SCD01U50V2KX-1GP C5908SCD01U50V2KX-1GP C5908SCD01U50V2KX-1GP

SATA_TXP1 20 SATA_TXN1 20

SATA_RXN1_C 20 SATA_RXP1_C 20

SATA_RX- and SATA_RX+ Trace Length match within 20 mil

+5V_RUN

12

C5909

C5910

SCD1U10V2KX-5GP

DJ1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

5

4

3

2

Date: Sheet

DJ1 Montevina UMA

Taipei Hsien 221, Taiwan, R.O.C.

HDD/ODD

1

A00

of

59 88Friday, February 26, 2010

A00

5

4

3

2

1

SSID = AUDIO

/,1(

/,1(/,1(

6SHDNHU

6SHDNHU6SHDNHU &RQQHFWRU

&RQQHFWRU

&RQQHFWRU&RQQHFWRU

D D

5

SPK1

AUD_SPK_L-30

AUD_SPK_L+30 AUD_SPK_R-30 AUD_SPK_R+30

FOX-CON4-19-GP

DY

12

EC6004

Do Not Stuff

FOX-CON4-19-GP

12

DY

Do Not Stuff

EC6002

EC6001

AUD_SPK_L-

1

AFTP6002AFTP6002 AFTP6003AFTP6003 AFTP6004AFTP6004 AFTP6005AFTP6005

C C

,QWHUQDO

,QWHUQDO,QWHUQDO 0LFURSKRQH

0LFURSKRQH

0LFURSKRQH0LFURSKRQH

B B

A A

INT_MIC_L_R30

AUD_SPK_L+

1

AUD_SPK_R-

1

AUD_SPK_R+

1

EC6007

SC1KP50V2KX-1GP

G6001

12

Do Not Stuff

5

1

12

AUD_AGND

Do Not Stuff

2

AUD_AGND

Do Not Stuff

EC6003

MIC1

MIC1 Do Not Stuff

Do Not Stuff

1

2 3 4

20.F0711.004

6

1

AFTP6013AFTP6013

4

287

287287

AUD_HP1_JACK_L30

AUD_HP1_JACK_R30

0,&,1

0,&,10,&,1

AUD_EXT_MIC_L30

AUD_EXT_MIC_R30

LINEOUT1

AUD_HP1_JD#30

AUD_EXT_MIC_L

AUD_EXT_MIC_R

R6012

1 2

60D4R2F-GP

R6011

1 2

60D4R2F-GP

AFTP6010AFTP6010

AFTP6011AFTP6011

AFTP6012AFTP6012

AUD_VREFOUT_B30

C6002 SC1U10V3KX-3GPC6002 SC1U10V3KX-3GP

C6003 SC1U10V3KX-3GPC6003 SC1U10V3KX-3GP

AFTP6006AFTP6006

AFTP6007AFTP6007

AFTP6008AFTP6008

3

AUD_HP1_JACK_L2

AUD_HP1_JACK_R2

SC1KP50V2KX-1GP

AUD_HP1_JD#

1

AUD_HP1_JACK_L1

1

AUD_HP1_JACK_R1

1

12

EC6010

RN6001

SRN4K7J-8-GP

MIC_IN_L_C

1

MIC_IN_R_C

1

EXT_MIC_JD#

1

12

23

1

4

MIC_IN_L_2

MIC_IN_R_2

L6001

BLM15BD601SS1D-GP

1 2

BLM15BD601SS1D-GP

1 2

L6002

12

EC6011

EC6011 SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

600ohm 100MHz 200mA 0.5ohm DC

12

C6001

SC1U10V3KX-3GP

A00

R6009

1 2

Do Not Stuff

R6010

1 2

Do Not Stuff

EXT_MIC_JD#30

2

AUD_HP1_JD#

AUD_HP1_JACK_L1

AUD_HP1_JACK_R1

12

EC6005

SCD01U16V2KX-3GP

EC6006

1

AFTP6009AFTP6009

SCD01U16V2KX-3GP

2010/01/08

MIC_IN_L_C

MIC_IN_R_C

12

EC6009

EC6008

SC100P50V2JN-3GP

DJ1

Title

Audio Jack/Mic/Speaker

Size Document Number Rev

A3

Date: Sheet

Audio Jack/Mic/Speaker

DJ1 Montevina UMA

8 7 3 1 4

2 5 6

PHONE-JK383-GP

22.10133.K31

MICIN1

8 7 3 1 4

2 5 6

PHONE-JK383-GP

22.10133.K31

AFTP6001AFTP6001

1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

of

60 88Friday, February 26, 2010

1

A00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

DJ1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

DJ1 Montevina UMA

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

of

61 88Wednesday, February 24, 2010

A00

5

SSID = Flash.ROM

4

3

2

1

D D

C C

EC_SPI_CS#37

EC_SPI_DI37

EC_SPI_WP#_R37

Do Not Stuff

EC6201

DY

12

SPI FLASH ROM (16M bits) for KBC

+KBC_PWR

12

DY

12

DY

EC_SPI_DO_R

12

DY

Do Not Stuff

EC6203

Do Not Stuff

C6202

C6202 Do Not Stuff

Do Not Stuff

R6201 33R2J-2-GPR6201 33R2J-2-GP

1 2

R6203

1 2

Do Not Stuff

R6209

R6209 100KR2J-1-GP

100KR2J-1-GP

R6202

Do Not Stuff

R6210

10KR2J-3-GP

12

4

RN6201

RN6201 SRN100KJ-6-GP

1

2 3

EC_SPI_CS#

EC_SPI_DI_R

EC_SPI_WP#

12

SRN100KJ-6-GP

EC_SPI_HOLD#

U6201

1 2 3 4

MX25L1605DM2I-12G-GP

72.25165.A01

DY

2nd 72.25016.D01

CS# SO/SIO1 WP#/ACC GND

VCC

HOLD#

SCLK

SI/SIO0

+KBC_PWR

8 7 6 5

DY

EC6202

+KBC_PWR

12

C6203

SCD1U16V2KX-3GP

EC_SPI_CLK 37 EC_SPI_DO_R 37

A00

B B

SSID = RBATT

RTC Connector

2

1

+3.3V_RTC_LDO

RTC_PWR

TP6202TP6202

+RTC_VCC

R6208

1 2

1KR2J-1-GP

TP6201TP6201

2010/01/15

+RTC_VCC

1

RTC1

1

PWR

1

2

GND

NP1

NP2

BAT-CON2-1-GP-U

62.70001.011

2010/01/05

3

2

DJ1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

DJ1 Montevina UMA

Taipei Hsien 221, Taiwan, R.O.C.

Flash/RTC

1

of

62 88Friday, February 26, 2010

A00

D6203

+RTC_CELL

A A

5

12

C6207

C6207 SC1U10V3KX-3GP

SC1U10V3KX-3GP

4

D6203

3

SDMG0340LC7F-GP-U

Width=20mils

5

4

3

2

1

SSID = USB

IO Board USB Power

U6302

D D

12

C6306

C6306 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

at least 80 mil

1

GND

2

VIN

3

VIN EN#4OC#

UP7534BRA8-15-GP

74.07534.079

2nd 74.09715.079

VOUT#8 VOUT#7 VOUT#6

8 7 6 5

at least 80 mil

USB_OC#0_1 21USB_PWR_EN#37

20100111

+5V_USB1+5V_ALW

12

C6304

C6304 SC1U10V3KX-3GP

SC1U10V3KX-3GP

USB Socket

+5V_USB2

C C

+5V_ALW

at least 80 mil

12

C6303

C6303 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

Right USB Power

U6301

1

GND

2

VIN

3

VIN EN#4OC#

UP7534BRA8-15-GP

74.07534.079

2nd 74.09715.079

VOUT#8 VOUT#7 VOUT#6

8 7 6 5

at least 80 mil

USB_P2-

+5V_USB2

12

USB_OC#2_3 21USB_PWR_EN#37

DY

R6301

Do Not Stuff

12

C6301

SCD1U10V2KX-5GP

12

C6302

SC1U10V3KX-3GP

TC6301

ST100U6D3VBML1GP

USB_P2+

+5V_USB2

20100111

USB_P3USB_P3+

Do Not Stuff

R6302

USB_PN221

USB_PP221

B B

USB_PN321

USB_PP321

A A

USB_PP2

USB_PN3 USB_P3-

USB_PP3

1 2

R6303

1 2

Do Not Stuff

2010/01/05

Do Not Stuff

R6304

1 2

R6305

1 2

Do Not Stuff

USB_P2-USB_PN2

USB_P2+

USB_P3+

USB_P2+

USB_P3+

D6301

1

DY

2 3

Do Not Stuff

D6302

1

DY

2 3

Do Not Stuff

+5V_USB2

4

DJ1

1 1 1 1 1

+5V_USB2 USB_P2USB_P2+ USB_P3USB_P3+

AFTP6304AFTP6304 AFTP6302AFTP6302 AFTP6301AFTP6301

USB_P2-

+5V_USB2

4

USB_P3-

AFTP6306AFTP6306 AFTP6305AFTP6305

USB1

1

2 3 4 6 8

SKT-USB8-29-GP

22.10254.451

USB3

1

2 3 4 6 8

SKT-USB8-29-GP

22.10254.451

75

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet

Date: Sheet of

5

4

3

2

Date: Sheet of

DJ1 Montevina UMA

Taipei Hsien 221, Taiwan, R.O.C.

USB

of

63 88Friday, February 26, 2010

1

A00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

DJ1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

DJ1 Montevina UMA

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

of

64 88Wednesday, February 24, 2010

A00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

DJ1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

DJ1 Montevina UMA

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

of

65 88Wednesday, February 24, 2010

A00

5

4

3

2

1

SSID = LED

Power button LED

D D

C C

Power LED

PWR_LED#37

PWR_LED#

PDTA144VT-GP

B

R1

Q6605

E

C

+5V_ALW

PWR_LED_R

R6605

330R2J-3-GP

12

PWR_LED_B

LED-W-27-GP

1 2

AK

LED3

3

83.01221.R70

R2

Battery LED

White

LED-OW -3-GP

R6601

12

EC6601

EC6601 Do Not Stuff

Do Not Stuff

EC6602

EC6602 Do Not Stuff

Do Not Stuff

R6601

1 2

330R2J-3-GP

R6602

1 2

330R2J-3-GP

BATCHG_LED_B

BAT_LED_B

Q6601

R1

BATCHG37

B B

BATLOW_LED37

B

R2

PDTC124EU-1-GP

Q6602

R1

B

R2

PDTC124EU-1-GP

C

E

LED_BATCHG#

C

E

DY

LED_BAT#

12

DY

LED-OW -3-GP

3

2

LED1

Amber

1

83.00326.G70

+5V_ALW

HDD LED

E

C

+5V_RUN

SATA_LED_R

R6604

330R2J-3-GP

12

4

SATA_LED_B

LED-W-27-GP

1 2

AK

LED2

3

83.01221.R70

DJ1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

3

2

Date: Sheet

DJ1 Montevina UMA

Taipei Hsien 221, Taiwan, R.O.C.

LED

66 88Friday, February 26, 2010

1

A00

of

A00

PDTA144VT-GP

R2

A A

SATA_LED#20

SATA_LED#

5

R2

B

R1

Q6604

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

DJ1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

DJ1 Montevina UMA

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

of

67 88Wednesday, February 24, 2010

A00

5

4

3

2

1

SSID = KBC

D D

C C

Internal KeyBoard Connector TouchPad Connector

KB1

31

1

2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30

32

ACES-CON30-3-GP

20.K0421.030

KROW7 KROW6 KROW4 KROW2 KROW5 KROW1 KROW3 KROW0 KCOL5 KCOL4 KCOL7 KCOL6 KCOL8 KCOL3 KCOL1 KCOL2 KCOL0 KCOL12 KCOL16 KCOL15 KCOL13 KCOL14 KCOL9 KCOL11 KCOL10

1

AFTP6831AFTP6831

1

AFTP6827AFTP6827

1

AFTP6825AFTP6825

1

AFTP6824AFTP6824

1

AFTP6822AFTP6822

1

AFTP6823AFTP6823

1

AFTP6820AFTP6820

1

AFTP6821AFTP6821

1

AFTP6819AFTP6819

1

AFTP6817AFTP6817

1

AFTP6818AFTP6818

1

AFTP6816AFTP6816

1

AFTP6814AFTP6814

1

AFTP6812AFTP6812

1

AFTP6813AFTP6813

1

AFTP6815AFTP6815

1

AFTP6810AFTP6810

1

AFTP6808AFTP6808

1

AFTP6809AFTP6809

1

AFTP6806AFTP6806

1

AFTP6807AFTP6807

1

AFTP6804AFTP6804

1

AFTP6805AFTP6805

1

AFTP6803AFTP6803

1

AFTP6801AFTP6801

1

AFTP6802AFTP6802

1

KB_DET# 37

KROW [0..7] 37

KCOL[0..16] 37

AFTP6829AFTP6829

SSID = Touch.Pad

TPCLK37

TPDATA37

SC33P50V2JN-3GP

RN6801

SRN10KJ-5-GP

C6803

+5V_RUN

1

23

4

12

AFTP6826AFTP6826 AFTP6828AFTP6828 AFTP6830AFTP6830

+5V_RUN

AFTP6811AFTP6811

C6804

C6804 SC33P50V2JN-3GP

SC33P50V2JN-3GP

1

1 1 1

+5V_RUN TPCLK TPDATA

12

C6802

SCD1U16V2KX-3GP

5

1

2 3 4

6

TP1

ACES-CON4-10-GP-U

20.K0320.004

2nd 20.K0461.030

B B

A A

5

4

3

2

DJ1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Key Board/Touch Pad

Size Document Number Rev

A3

Date: Sheet

Key Board/Touch Pad

DJ1 Montevina UMA

Taipei Hsien 221, Taiwan, R.O.C.

of

68 88Friday, February 26, 2010

1

A00

5

D D

4

3

2

1

C C

Hall switch

A00

B B

A A

LID_CLOSE#37

+3.3V_ALW

12

DY

12

C6902

SCD1U10V2KX-5GP

R6902

R6902 100KR2J-1-GP

100KR2J-1-GP

C6901

C6901 SCD047U16V2KX-1-GP

SCD047U16V2KX-1-GP

LID_CLOSE#_1

1 2

R6901 10R2J-2-GPR6901 10R2J-2-GP

HSC1

2

VDD

VSS

3

OUT

S-5711ACDL-M3T1S-GP

20100114

1

LID_CLOSE#_1LID_CLOSE#

DJ1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

5

4

3

2

Date: Sheet

DJ1 Montevina UMA

Taipei Hsien 221, Taiwan, R.O.C.

Hall Sensor

1

A00

of

69 88Friday, February 26, 2010

A00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

DJ1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

DJ1 Montevina UMA

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

of

70 88Wednesday, February 24, 2010

A00

5

4

3

2

1

SSID = SDIO

D D

C C

TP402TP402 TP403TP403 TP404TP404 TP405TP405 TP406TP406 TP407TP407 TP408TP408 TP409TP409 TP410TP410 TP411TP411 TP412TP412 TP413TP413 TP414TP414 TP415TP415 TP416TP416 TP417TP417

B B

2010/01/15

XD_CD# XD_RDY/SD_WP/MS_CLK XD_RE#/MS_INS# XD_CE#/SD_D1 XD_CLE/SD_D0/MS_D7 XD_ALE/SD_D7/MS_D3 XD_WE#/SD_CD# XD_WP/SD_D6/MS_D6 XD_D0/SD_CLK/MS_D2 XD_D1/SD_D5/MS_D0 XD_D2/SD_CMD XD_D3/SD_D4/MS_D4 XD_D4/SD_D3/MS_D1 XD_D5/SD_D2/MS_D5 XD_D6/MS_BS XD_D7

SD/XD/MS Card Reader

+3.3V_RUN_CARD

12

DY

C7103

Do Not Stuff

2010/01/15

TP7112TP7112

XD_D0/SD_CLK/MS_D232 XD_D1/SD_D5/MS_D032 XD_D2/SD_CMD32 XD_D3/SD_D4/MS_D432 XD_D4/SD_D3/MS_D132 XD_D5/SD_D2/MS_D532 XD_D6/MS_BS32 XD_D732

XD_RDY/SD_WP/MS_CLK32 XD_RE#/MS_INS#32 XD_CE#/SD_D132 XD_CLE/SD_D0/MS_D732 XD_ALE/SD_D7/MS_D332 XD_WE#/SD_CD#32 XD_WP/SD_D6/MS_D632 XD_CD#32

12

C7104

SCD1U16V2KX-3GP

12

C7105

SC2D2U6D3V3KX-GP

1

+3.3V_RUN_CARD

NP1 NP2

DY

12

C7101

Do Not Stuff

DY

12

C7102

Do Not Stuff

CARD1

23

SD_VCC

14

MS_VCC

33

XD_VCC

8

XD_D0

9

XD_D1

26

XD_D2

27

XD_D3

28

XD_D4

30

XD_D5

31

XD_D6

32

XD_D7

1

XD_R/B

2

XD_RE

3

XD_CE

4

XD_CLE

5

XD_ALE

6

XD_WE

7

XD_WP

34

XD_CD_SW

NP1 NP2

CARDBUS36P-1-GP

20.I0109.001

SD_DAT0 SD_DAT1 SD_DAT2 SD_DAT3

SD_CMD

SD_CLK

SD_CD_SW

SD_WP_SW

MS_DATA0 MS_DATA1 MS_DATA2 MS_DATA3

MS_BS

MS_INS

MS_SCLK

4IN1_GND 4IN1_GND 4IN1_GND 4IN1_GND

25 29 10 11

12 24 36 35

19 20 18 16

21 17 15

13 22 38 37

XD_D6/MS_BS 32 XD_RE#/MS_INS# 32 XD_RDY/SD_WP/MS_CLK 32

1

TP7124TP7124

2010/01/15

XD_CLE/SD_D0/MS_D7 32 XD_CE#/SD_D1 32 XD_D5/SD_D2/MS_D5 32 XD_D4/SD_D3/MS_D1 32

XD_D2/SD_CMD 32

XD_D0/SD_CLK/MS_D2 32

XD_WE#/SD_CD# 32

XD_RDY/SD_WP/MS_CLK 32

XD_D1/SD_D5/MS_D0 32 XD_D4/SD_D3/MS_D1 32 XD_D0/SD_CLK/MS_D2 32 XD_ALE/SD_D7/MS_D3 32

A A

5

4

3

2

DJ1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

CARD Reader Connector

Size Document Number Rev

A3

Date: Sheet

CARD Reader Connector

DJ1 Montevina UMA

Taipei Hsien 221, Taiwan, R.O.C.

of

71 88Friday, February 26, 2010

1

A00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

DJ1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

DJ1 Montevina UMA

Taipei Hsien 221, Taiwan, R.O.C.

RESERVED

1

of

72 88Wednesday, February 24, 2010

A00

5

4

3

2

1

SSID = User.Interface

D D

BT1

15

AFTP7319AFTP7319

WLAN_ACT76

BLUETOOTH_EN_L37,76

C C

AFTP7311AFTP7311

AFTP7308AFTP7308 AFTP7318AFTP7318 AFTP7316AFTP7316

BLUETOOTH_DET#

1

BT_LED

1

BLUETOOTH_GPIO3

1

BLUETOOTH_GPIO5

1

3 5 7

9 11 13

NP1 2

4 6 8 10 12 14 NP2 16

HRS-CONN14D-GP-U

20.F0987.014

BT_ACT 76

USB_PP4 21 USB_PN4 21

AFTP7313AFTP7313

1

+3.3V_RUN

12

C7303

C7303 SC2D2U6D3V3KX-GP

SC2D2U6D3V3KX-GP

AFTP7314AFTP7314 AFTP7309AFTP7309 AFTP7315AFTP7315 AFTP7312AFTP7312 AFTP7310AFTP7310 AFTP7317AFTP7317

3

R7305

Do Not Stuff

DY

BT_ACT BLUETOOTH_EN_L WLAN_ACT

12

EC7306

Do Not Stuff

R7304

10KR2J-3-GP

BT_ACT76

BLUETOOTH_EN_L37,76

WLAN_ACT76

DY

12

B B

A A

5

4

WLAN_ACT

1

BLUETOOTH_EN_L

1

BT_ACT

1

+3.3V_RUN

1

USB_PP4

1

USB_PN4

1

DJ1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

2

Date: Sheet

DJ1 Montevina UMA

Taipei Hsien 221, Taiwan, R.O.C.

Bluetooth

1

A00

of

73 88Friday, February 26, 2010

A00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

DJ1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

DJ1 Montevina UMA

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

of

74 88Wednesday, February 24, 2010

A00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

DJ1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

DJ1 Montevina UMA

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

of

75 88Wednesday, February 24, 2010

A00

5

4

3

2

1

SSID = PWR.Support

D D

IOBD 1

+PWR_SRC

BATT SMBUS WLAN SMBUS

WLAN CLK

C C

WLAN PCIE

WLAN USB

LAN CLK

LAN PCIE

USB Port

BAT_SDA37 BAT_SCL37

ICH_SMBDATA7,18,19,22

ICH_SMBCLK7,18,19,22 CLK _PCIE_ MINI1#7 CLK _PCIE_ MINI17

PCIE_RXN221 PCIE_RXP221

PCIE_TXN221 PCIE_TXP221

USB_PN621 USB_PP621

CLK_PCIE_LAN#7 CLK_PCIE_LAN7

PCIE_RXN321

PCIE_RXP321

PCIE_TXN321 PCIE_TXP321

USB_PN021

USB_PP021

CLK _PCIE_ MINI1# CLK _PCIE_ MINI1

PCIE_RXN2 PCIE_RXP2

PCIE_TXN2 PCIE_TXP2

USB_PN6 USB_PP6

USB_PN0

USB_PP0

65

64 66

31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59

60

63

62

NP1 NP2

ACES-CONN60C-1-GP-U

20.F1563.060

30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2

1

61

+PWR_SRC

+3.3V_RUN

+1.5V_RUN +5V_USB1

+5V_ALW +KBC_PWR +3.3V_ALW

E51_RXD 37 E51_TXD 37

BAT_IN# 37 AC_IN# 37 PSID_DISABLE# 37 PSID_EC 37 AD_IA 37

WIFI_RF_EN 37

MINI1_CLKREQ# 7 PCIE_WAKE# 22 PLT_RST# 11,21,37,58

PM_LAN_ENABLE 37

KBC_PWRBTN# 37

BT_ACT 73

BLUETOOTH_EN_L 37,73

WLAN_ACT 73

B B

Close to IOBD Conn

A A

12

C7601

C7603

SCD1U16V2KX-3GP

+KBC_PWR+5V_USB1 +5V_ALW +PW R_SRC+3.3V_RUN +3.3V_ALW +1.5V_RUN

12

5

12

C7604

SCD1U16V2KX-3GP

12

C7605

SCD1U16V2KX-3GP

C7606

SCD1U16V2KX-3GP

12

C7607

SCD1U50V3KX-GP

12

C7609

SCD1U16V2KX-3GP

DJ1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

IO Board Connector

Size Document Number Rev

A3

Date: Sheet

4

3

2

Date: Sheet

IO Board Connector

DJ1 Montevina UMA

Taipei Hsien 221, Taiwan, R.O.C.

of

76 88Friday, February 26, 2010

1

A00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

DJ1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

DJ1 Montevina UMA

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

of

77 88Wednesday, February 24, 2010

A00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

DJ1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

DJ1 Montevina UMA

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

of

78 88Wednesday, February 24, 2010

A00

5

4

3

2

1

SSID = Mechanical

H21

H21 Do Not Stuff

Do Not Stuff

H3

H3 Do Not Stuff

Do Not Stuff

1

H4

H4 Do Not Stuff

Do Not Stuff

1

D D

C C

H22

H22 Do Not Stuff

Do Not Stuff

1

H2

H2 Do Not Stuff

Do Not Stuff

1

H13

H13 Do Not Stuff

Do Not Stuff

H23

H23 Do Not Stuff

Do Not Stuff

1

H6

H6 Do Not Stuff

Do Not Stuff

1

H18

H18 Do Not Stuff

Do Not Stuff

SPR1

SPR1 SPRING-51-GP

SPRING-51-GP

34.4F822.002

1

H1

H1 Do Not Stuff

Do Not Stuff

1

H8

H8 Do Not Stuff

Do Not Stuff

HBT1

HBT1 STF237R115H123-GP

STF237R115H123-GP

34.4A902.001

1

H7

H7 Do Not Stuff

Do Not Stuff

H20

H20 Do Not Stuff

Do Not Stuff

HMI2

HMI2 STF217R128H83-GP

STF217R128H83-GP

34.4Y702.001

1

2nd 34.4H103.201

1

+PWR_SRC +PWR_SRC +PW R_SRC +PWR_SRC +PW R_SRC +PWR_SRC

+PWR_SRC +PWR_SRC +PW R_SRC +PWR_SRC +PW R_SRC

+PWR_SRC +PW R_SRC +1.5V_SUS_P

SCD1U50V3KX-GP

EC7901

1 2

SCD1U50V3KX-GP

EC7907

1 2

SCD1U50V3KX-GP

EC7912

1 2

SCD1U50V3KX-GP

EC7902

1 2

SCD1U50V3KX-GP

EC7908

1 2

SCD1U50V3KX-GP

EC7913

1 2

EC7903

EC7909

SCD1U50V3KX-GP

1 2

SCD1U50V3KX-GP

1 2

Do Not Stuff

EC7914

DY

1 2

SCD1U50V3KX-GP

EC7904

SCD1U50V3KX-GP

EC7910

1 2

EC7905

EC7911

SCD1U50V3KX-GP

1 2

SCD1U50V3KX-GP

1 2

EC7906

SCD1U50V3KX-GP

EC7925

EC7926

1 2

+PWR_SRC +PWR_SRC +PW R_SRC+PWR_SRC +PWR_SRC

SCD1U50V3KX-GP

EC7922

1 2

Do Not Stuff

EC7923

DY

1 2

Do Not Stuff

EC7924

DY

1 2

1

G6004

1 2

Do Not Stuff

4

1

+1.05V_VCCP

Do Not Stuff

+3.3V_RUN +3.3V_RUN +3.3V_RUN

SCD1U50V3KX-GP

EMI Request

+5V_ALW +5V_ALW +5V_ALW +5V_ALW +5V_ALW

SCD1U50V3KX-GP

3

+1.05V_VCCP +1.05V_VCCP +1.05V_VCCP

Do Not Stuff

DY

12

1 2

EC7921

EC7918

EC7930

EC7915

DY

1 2

SCD1U50V3KX-GP

EC7919

1 2

SCD1U50V3KX-GP

EC7931

1 2

2

Do Not Stuff

EC7916

DY

1 2

SCD1U50V3KX-GP

EC7920

1 2

SCD1U50V3KX-GP

EC7932

1 2

+5V_RUN +5V_RUN +5V_RUN

SCD1U50V3KX-GP

Do Not Stuff

EC7917

DY

1 2

SCD1U50V3KX-GP

EC7933

1 2

DJ1

Title

UNUSED PARTS/EMI Capacitors

Size Document Number Rev

A3

Date: Sheet

SCD1U50V3KX-GP

+3.3V_RUN +3.3V_RUN +3.3V_RUN

SCD1U50V3KX-GP

EC7936

1 2

Do Not Stuff

EC7934

DY

1 2

DJ1 Montevina UMA

SCD1U50V3KX-GP

EC7928

EC7927

1 2

SCD1U50V3KX-GP

1 2

EC7928

1 2

SCD1U50V3KX-GP

EC7937

EC7938

1 2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

79 88Wednesday, February 24, 2010

1

SCD1U50V3KX-GP

EC7929

1 2

2010/01/07

of

A00

G6003

1 2

Do Not Stuff

1

B B

G6002

1 2

Do Not Stuff

A A

1

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

DJ1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

Date: Sheet of

DJ1 Montevina UMA

Taipei Hsien 221, Taiwan, R.O.C.

(Reserved)

1

of

80 88Wednesday, February 24, 2010

A00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

DJ1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu R d., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu R d., Hsichih, Taipei Hsien 221, Taiwan, R.O.C .

Taipei Hsien 221, Taiwan, R.O.C .

Title

Size Doc ument Number Rev

C

DJ1 Montevina UMA

Date: Sheet

5

4

3

2

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C .

(Reserved)

1

A00

of

81 88Wednesday, February 24, 2010

of

81 88Wednesday, February 24, 2010

of

81 88Wednesday, February 24, 2010

5

D D

4

3

2

1

C C

B B

A A

(Blanking)

DJ1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiw an, R.O.C.

Taipei Hsien 221, Taiw an, R.O.C.

Title

Size Document Number Rev

A2

DJ1 Montevina UMA A00

Date: Sheet of

5

4

3

2

Date: Sheet

Taipei Hsien 221, Taiw an, R.O.C.

(Reserved)

1

of

82 88Wednesday, Febr uary 24, 2010

5

D D

C C

4

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1

(Blanking)

B B

A A

DJ1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu R d., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu R d., Hsichih, Taipei Hsien 221, Taiwan, R.O.C .

Taipei Hsien 221, Taiwan, R.O.C .

Title

Size Doc ument Number Rev

C

DJ1 Montevina UMA

Date: Sheet

5

4

3

2

Date: Sheet

DJ1 Montevina UMA

Taipei Hsien 221, Taiwan, R.O.C .

(Reserved)

1

A00

of

83 88Wednesday, February 24, 2010

of

83 88Wednesday, February 24, 2010

of

83 88Wednesday, February 24, 2010

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

DJ1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Custom

Date: Sheet

DJ1 Montevina UMA

Taipei Hsien 221, Taiwan, R.O.C.

(Reserved)

84 88Wednesday, February 24, 2010

1

of

A00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

DJ1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Custom

Date: Sheet

DJ1 Montevina UMA

Taipei Hsien 221, Taiwan, R.O.C.

(Reserved)

1

of

85 88Wednesday, February 24, 2010

of

85 88Wednesday, February 24, 2010

of

85 88Wednesday, February 24, 2010

A00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

DJ1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

DJ1 Montevina UMA

Taipei Hsien 221, Taiwan, R.O.C.

(Reserved)

1

of

86 88Wednesday, February 24, 2010

A00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

DJ1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

DJ1 Montevina UMA

Taipei Hsien 221, Taiwan, R.O.C.

(Reserved)

1

of

87 88Wednesday, February 24, 2010

A00

5

4

3

2

1

Page#Item

1

D D

20 2010/01/04 R2018.R2019 to J accurityWistron Change R2018 R2019 to 63.33434.1DL

54 2010/01/04 Wistron2

Date

37 2010/01/04 MB version chang to X01 Change R3722 pop,R3727 dummy.3

4 Wistron

59 ME change ODD&RTC Conn Change ODD Conn to 22.10300.811

2009/01/06

Request By

Wistron

Rev.Solution DescriptionIssue description

X01

D4102 change to 83.00054.Q81D4102 Change

X01

Change RTC Conn to 62.70001.011

Add EC7927 EC7928 EC7929 EC7936 EC7937 EC7938

5

79

Wistron2009/01/07

EMI Request

EC7930 EC7931 EC7932 EC7933 EC7934 POP EC7913 EC7912 EC7925 EC7922 EC7926 PC4610

X01

PC4615

54 32 63 Wistron USB layout change

6

C C

7 42 Wistron Change R4210 for POP noise Change R4210 to 10K 63.10334.1DL

8 60 IDT IDT Request change EMI CAP to 0.01u EC6005 EC6006 change to 0.01u 78.10321.2FL

9 63 Wistron USB power switch change Change U6301 U6302 to 74.07534.079 X01

10 37

2010/01/07

2010/01/08

2010/01/11

2010/01/12

Prevent BIOS damage POP U3702 74.00690.I7BWistron

Del TR5401 TR3201 TR6301 TR6302 Change R5409 R5412 R3211 R3210 R6302 R6303 R6304 R6305 to 0ohm

X01

11 37 DELL Add one capacitor for IPCC function Add C3721 close KBC Pin AD_IA

12 69 Wistron SMT issue Change HSC1 layout symbol to Seiko 74.05711.07B

B B

2010/01/12

2010/01/14

13 2010/01/16 Wistron change PC4740 PC4741 PC4910 PC5020to 78.33124.2FLPower team request47 49 50

14 46 2010/01/18 Wistron Power team request DY PTC4603.change PTC5001 PTC4602

15 37 2010/02/10 Wistron U3702 reset timing is too long DY U3702

X01

A00

16 37 2010/02/10 Wistron Change PCB version from X01 to A00 DY R3722 and R3728, stuff R3727 and R3723 A00

17 20 37 55 2010/02/24 Wistron Change 0ohm to short pad.

Change R2014 R3725 R3748 R5505 R5506 R3012 R3014 R3018 RN5901 R6009 R6010

18 37 2010/02/24 DELL Add one FET for RCID function Reserve Q3706

19 69 2010/02/25 Wistron Do not stuff R6902 Reserve R6902

A A

5

4

3

2

DJ1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Change History

Size Document Number Rev

A3

Date: Sheet

Change History

DJ1 Montevina UMA

Taipei Hsien 221, Taiwan, R.O.C.

88 88Thursday, February 25, 2010

1

A00

of

A00