DELL 1440 Schematics

5

D D

4

3

2

1

Alba UMA Schematics

uFCPGA Mobile Penryn

Intel Cantiga-GM + ICH9M

C C

2009-04-06

REV : -1

B B

DY : Nopop Component

A A

5

4

3

2

Alba UMA

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Custom

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

Cover Page

Alba UMA

1

1 61Monday, April 06, 2009

-1

5

4

3

2

1

ALBA UMA Block Diagram

D D

Clock Generator

SLG8SP513VTR

7

Intel Mobile CPU

Penryn

Socket P

8,9

FSB 800/1066MHz

Intel

CRT

C C

LCD

RGB CRT

42

LVDS(Dual Channel)

41

CardReader

(7 in 1)SD/MMC MS/MS Pro/xD

B B

(On Express Card board)

RJ11

Digital Mic Array (Option)

Internal Mic

47

44

Realtek RTS5159

MDC MODEM

Azalia CODEC

50

4642

USB2.0

AZALIA

Cantiga-GM

AGTL+ CPU I/F

DDR Memory I/F

External Graphics

DMIx4

ICH9-M

USB 2.0/1.1 ports (12)

PCI Express ports (6)

High Definition Audio

SATA ports (4)

PCI/PCI BRIDGE

10,11,12,13,14,15

CONTROL-LINK

Intel

LPC I/F

ACPI 1.1

18,19,20,21

DDRII 800 Channel A

DDR II 800 Channel B

PCIE

USB 2.0

Project code : 91.4BK01.001 Part Number : 48.4BK04.0SA PCB P/N : 08243 Revision : SA

LPC Bus

PCIE x 1

DDRII 800

PCIE x 1 & USB 2.0 x 1

10/100 LOM

RTL8103EL

USB 2.0 x 2

PCIE x 1

Slot 0

16

Slot 1

17

25

USB 2.0 x 1

Mini-Card

802.11a/b/g/n

CAMERA (Option)

Bluetooth

Right Side: USB x 1

Power SW

TPS2231RGP

50

New Card

(On Express Card board)

RJ45

42

CONN

Left Side: USB x 2

46

43

47

45

51

50

L1: Top L2: GND L3: Signal L4: Signal L5: VCC L6: Signal L7: GND L8: Bottom

ISL6266A/CPU_CORE

INPUTS

+PWR_SRC

TPS51117/1.05V

INPUTS

+PWR_SRC

TPS51125/3V,5V

INPUTS

+PWR_SRC

+5V_ALW2 +3.3V_RTC_LDO +5V_ALW +3.3V_ALW

TPS51116/1.8V,0.9V

INPUTS OUTPUTS

+PWR_SRC

+1.8V_SUS +0.9V_DDR_VTT +V_DDR_MCH_REF

L6935TR/1.5V

INPUTS OUTPUTS

+1.8V_SUS

MAX8731A/CHARGER

INPUTS

+DC_IN

34,35

OUTPUTS

+VCC_CORE

OUTPUTS

+1.05V_VCCP

OUTPUTS

+1.5V_RUN

OUTPUTS

+PWR_SRC+PBATT

36

33

38

37

32

PCB LAYER

MIC IN

HP OUT

(On Express Card board)

A A

2CH SPEAKER

44

5

OP AMP

IDT 92HD81

SATA

22

HDD

44 44

4

SATA

ODD

SPI

Flash ROM

2MB

3

47

KBC

WINBOND

WPCE773L

Touch PAD

45

26

Int. KB

Thermal & Fan

45 28,44

EMC2102

RUN PWR/3V,5V

INPUTS

+5V_ALW +3.3V_ALW

Alba UMA

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

Block Diagram

Alba UMA

1

2 61Monday, April 06, 2009

OUTPUTS

+5V_RUN +3.3V_RUN

30

-1

5

4

3

2

1

D D

Adapter

SI4835BDY

32

Battery

+PWR_SRC TPS51116

ISL6266A

34,35 36

TPS51117

LDO

Charger

MAX8731A

+PBATT

32

TPS51125

+VCC_CORE

33

+1.05V_VCCP

38

+1.8V_SUS

+0.9V_DDR_VTT+V_DDR_MCH_REF

L6935TR

37

+1.5V_RUN

C C

+5V_ALW2

3D3V_AUX_S5

+3.3V_RTC_LDO

TPS2062AD

+5V_USB1

B B

+5V_ALW

AO4468

46 51

+5V_RUN

TPS2062AD

30 30

+5V_USB2

AO3403

+3.3V_LAN

RTL8103EL

+DVDD12

25

+3.3V_ALW

TPS2231RGP

SI3456BDV

50

+LCDVDD

AO4468

+3.3V_RUN+3.3V_CARDAUX

41

TPS2231RGP

+3.3V_CARD

TPS2231RGP

50

+1.5V_CARD

+3.3V_MIC+5V_CAMERA

5025

Power Shape

Regulator LDO Switch

A A

5

4

3

2

Alba UMA

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Power Block Diagram

Size Document Number Rev

Custom

Date: Sheet of

Power Block Diagram

Taipei Hsien 221, Taiwan, R.O.C.

Alba UMA

1

3 61Monday, April 06, 2009

-1

A

ICH9M SMBus Block Diagram

B

C

D

E

KBC SMBus Block Diagram

+5V_RUN

‧

PBAT_SMBCLK1

PBAT_SMBDAT1

2N7002DW-1-GP

SRN10KJ-5-GP

+3.3V_RUN

‧

TouchPad Conn.

TPDATA

TPCLK

Battery Conn.

CLK_SMB

DAT_SMB

MAX8731

SCL

SDA

+3.3V_RUN

SMBus address:12

32

‧

SRN4K7J-8-GP

Thermal

THERM_SCL

‧

THERM_SDA

‧

SCL

SDA

45

SMBus address:16

31

SMBus address:7A

28

1 1

TPDATA

PSDAT1

PSCLK1

SCL1

SDA1

TPCLK

BAT_SCL

BAT_SDA

+3.3V_RTC_LDO

‧

SRN4K7J-8-GP

‧

+3.3V_RTC_LDO

‧

SRN100J-3-GP

+3.3V_RUN

‧

50

+3.3V_RUN

‧

SRN2K2J-1-GP

DIMM 1

ICH_SMBCLK

ICH_SMBDATA

SCL

SDA

SMBus Address:A0

DIMM 2

ICH_SMBCLK

ICH_SMBDATA

SCL

SDA

SMBus Address:A4

Clock Generator

ICH_SMBCLK

ICH_SMBDATA

SCLK

SDATA

16

17

09

KBC

WPC773L

+3.3V_ALW

‧

SRN2K2J-1-GP

ICH9M

2 2

SMBCLK

SMBDATA

20

SMB_CLK

SMB_DATA

‧

2N7002SPT

Express Card

SMB_CLK

SMB_DATA

SMBus address:D2

‧

SMB_CLK

SMB_DATA

Minicard WLAN

SMB_CLK

SMB_DATA

43

GPIO73/SCL2

GPIO74/SDA2

KBC_SCL1

KBC_SDA1

SRN4K7J-8-GP

‧

+3.3V_RUN

‧

+3.3V_RUN

‧

SRN2K2J-1-GP

‧

SRN2K2J-1-GP

‧

2N7002DW-1-GP

LCD Conn.

+3.3V_RUN

‧

41

+5V_CRT_RUN

‧

D

‧

SRN2K2J-1-GP

‧

DDC_CLK_CON

DDC_DATA_CON

CRT CONN

42

Alba UMA

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

C

Date: Sheet of

SMBUS Block Diagram

Taipei Hsien 221, Taiwan, R.O.C.

Alba UMA

E

-1

4 61Monday, April 06, 2009

-1

L_DDC_CLK

L_DDC_DATA

26

LDDC_CLK

LDDC_DATA

3 3

GM45

CRT_DDC_CLK

CRT_DDC_DATA

4 4

A

B

54

GMCH_DDCCLK

GMCH_DDCDATA

C

A

B

C

D

E

Thermal Block Diagram Audio Block Diagram

1 1

SPKR_PORT_D_L+

SPKR_PORT_D_L-

SPKR_PORT_D_R-

SPKR_PORT_D_R+

HP1_PORT_B_L

H_THERMDA

DP1

SC470P50V3JN-2GP

H_THERMDC

2 2

DN1

THRMDA

THRMDC

CPU

8

Thermal

HP1_PORT_B_R

Codec 92HD81

AUD_SPK_L1

AUD_SPK_L2

AUD_SPK_R2

AUD_SPK_R1

AUD_HP1_JACK_L

AUD_HP1_JACK_R

0R3-0-U-GP

0R3-0-U-V-GP

AUD_SPK_L1_R

AUD_SPK_L2_R

AUD_SPK_R2_R

AUD_SPK_R1_R

SPEAKER

44

HP

OUT

50

EMC2102

DP2

DN2

EMC2102_DP2

EMC2102_DN2

SC470P50V3JN-2GP

MMBT3904-3-GP

HP0_PORT_A_L

HP0_PORT_A_R

VREFOUT_A_OR_F

System sensor, put between CPU and NB.

3 3

T8_THERMDA

DP3

DN3

T8_THERMDC

SC470P50V3JN-2GP

MMBT3904-3-GP

DMIC_CLK/GPIO1

DMIC0/GPIO2

3.HW T8 sensor

28

VREFOUT_C

PORT_C_L

PORT_C_R

22

AUD_DMIC_CLK

AUD_INT_MIC_L

AUD_INT_MIC_R

AUD_VREFOUT_C

AUD_EXT_MIC_L

AUD_EXT_MIC_R

AUD_VREFOUT_B

33R2J-2-GP

AUD_DMIC_IN0

4K7R2J-2-GP

SC1U10V3KX-3GP

33R2J-2-GP

AUD_DMIC_CLK_G_R

AUD_DMIC_IN0_R

INT_MIC_L_R

MIC

IN

50

Digital MIC Array

Internal MIC

47

44

4 4

A

B

C

D

Alba UMA

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Thermal/Audio Block Diagram

Size Document Number Rev

Custom

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

Alba UMA

E

5 61Monday, April 06, 2009

-1

A

ICH9M Functional Strap Definitions

Signal

HDA_SDOUT

4 4

HDA_SYNC PCIE config1 bit0 ,

GNT2#/ GPIO53

GPIO20 Reserved.

GNT1#/ GPIO51

GNT3#/ GPIO55

GNT0#: SPI_CS1#/

3 3

GPIO58

SPI_MOSI Integrated TPM En able,

GPIO49 DMI Termination

SATALED# PCI Express Lane

SPKR

TP3

GPIO33/ HDA_DOCK

2 2

_EN#

Usage/When Sampled

XOR Chain Entrance/ PCIE Port Config1 bit1, Rising Edge of PWROK.

Rising Edge of PWROK.

PCIE config2 bit2, Rising Edge of PWROK.

ESI Strap (Server Only) Rising Edge of PWROK.

Top-Block Swap override. Rising Edge of PWROK.

Boot BIOS Destination Selection 0:1. Rising Edge of PWROK.

Rising Edge of CLPWROK.

Voltage. Rising Edge of CLPWROK.

Reversal. Rising Edge of PWROK.

No Reboot. Rising Edge of PWROK.

XOR Chain Entrance. Rising Edge of PWROK.

Flash Descriptor Security Override Strap. Rising Edge of PWROK.

Allows entrance to XOR Chain t esting when TP3 pulled low. When TP3 not pulle d low at rising edge of PWROK, sets bit1 of RPC.PC (Cofig Registers: offset 224h). This signal has weak internal pull-down.

This signal has a weak interna l pull-down. Sets bit0 of PRC.PC (Config Re gisters: Offset 224h).

This signal has a weak interna l pull-up. Sets bit2 of PRC.PC2 (Config R egisters: Offset 224h).

This signal should not be pull ed high.

ESI compatible mode is for ser ver platforms only. This signal should not be pull ed low for desktop and mobile.

Sampled low: Top-Block Swap mo de (inverts A16 for all cycles targeting FWH BIOS space). Note: Software will not be abl e to clear the Top-Swap bit until the system is rebooted without GNT3# being pulled dow n.

Controllable via Boot BIOS Des tination bit (Config Registers: Offset 3410 h:bit 11:10). GNT0# is MSB, 01-SPI, 10-PCI, 11-LPC

Sample low: the Integrated TPM will be disable. Sample high: the MCH TPM enabl e strap is sampled low and the TPM Disable bit is clear, the Integrated TPM will be enable.

The signal is required to be l ow for desktop applications and required to b e high for mobile applications.

Signal has weak internal pull- up. Sets bit 27 of MPC.LR (Device 28: Function 0:Offset D8).

If sampled high, the system is strapped to the "No Reboot" mode (ICH9 will di sable the TCO Timer system reboot feature). The st atus is readable via the NO REBOOT bit.

This signal should not be pull low unless using XOR Chain testing.

Sampled low: the Flash Descrip tor Security will be overridden. If high, the secur ity measures will be in effect. This should only be enabled in manufacturing environments usi ng an external pull-up resister.

ICH9 EDS 642879 Rev.1.5

Comment

B

ICH9 Integrated pull-up and pull-down Resistors

C

Cantiga chipset and ICH9M I/O controller

D

E

Hub strapping configuration

ICH9 EDS 642879 Rev.1.5 Montevina Platform Design guide 22339 Rev.0.5

SIGNAL Resistor Type/Value

CL_CLK[1:0]

CL_DATA[1:0]

CL_RST0#

DPRSLPVR/GPIO16

ENERGY_DETECT

HDA_BIT_CLK

HDA_DOCK_EN#/GPIO33

HDA_RST#

HDA_SDIN[3:0]

HDA_SDOUT

HDA_SYNC

GLAN_DOCK#

GNT[3:0]#/GPIO[55,53,51]

GPIO20

GPIO49

LDA[3:0]#/FHW[3:0]#

LAN_RXD[2:0]

LDRQ[0]

LDRQ[1]/GPIO23

PME#

PWRBTN#

SATALED#

SPI_CS1#/GPIO58/CLGPIO6

SPI_MOSI

SPI_MISO

SPKR

TACH_[3:0]

TP[3]

USB[11:0][P,N]

PULL-UP 20K

PULL-DOWN 20K

PULL-UP 20K

PULL-DOWN 20K

PULL-UP 20K

PULL-DOWN 20K

The pull-up or pull-down active when configured for native GLAN_DOCK# functionality and determined by LAN controller.

PULL-UP 20K

PULL-DOWN 20K

PULL-UP 20K

PULL-UP 15K

PULL-UP 20K

PULL-DOWN 20K

PULL-UP 20K

PULL-DOWN 20K

PULL-UP 20K

PULL-DOWN 15K

Pin Name

CFG[2:0] FSB Frequen cy Select 000 = FSB1067

CFG[4:3] CFG8 CFG[15:14] CFG[18:17]

CFG5 DMI x2 Select 0 = DMI x2

CFG6 iTPM Host Interface

CFG7 Intel Management

CFG9

CFG10 PCIE Loopback enable 0 = Enable (Note 3)

CFG[13:12] XOR/ALL

CFG16 FSB Dynamic ODT 0 = Dynamic ODT Disabled

CFG19 DMI Lane Reversal

CFG20 Digital Display Port

SDVO _CTRLDATA

L_DDC_DATA Local Flat Panel

NOTE:

1. All strap signals are sampl ed with respect to the leading edge of the (G)MCH Power OK (PWROK) signal.

2. iTPM can be disabled by a ' Soft-Strap' option in the Flas h-decriptor section of the Firmware. This 'Soft-St rap' is activated only after e nabling iTPM via CFG6. Only one of the CFG10/CFG12 /CFG13 straps can be enabled a t any time.

Strap Description Configuration

011 = FSB667 010 = FSB800

Reserved

engine crypto strap

PCIE Graphics Lane 0 = Reserved Lanes, 15->0, 1 4->1 ect..

(SDVO/DP/iHDMI) Concurrent with PCIe

SDVO Present

(LFP) Present

others = Reserved

1 = DMI x4 (Default)

0 = The iTPM Host Interface is enabled (Note 2)

1 = The iTPM Host Interface is disabled (default)

0 = Transport Layer Security ( TLS) cipher

suite with no confidentiality

1 = TLS cipher suite with conf identiality(Default)

1 = Normal operation (Default) : Lane Numbered in

Order

1 = Disable (Default)

00 = Reserve 10 = XOR mode Enabled 01 = ALLZ mode Enable (Note 3)

11 = Disabled (Default)

1 = Dynamic ODT Enabled (Defau lt)

0 = Normal operation (Default) : Lane Numbered in

Order

1 = Reverse Lanes DMI x4 mode [MCH->ICH]: (3->0, 2->1, 1->2 and 0->3) DMI x2 mode [MCH->ICH]: (3->0, 2->1)

0 = Only Digital Display Port or PCIE is

operational (Default)

1 = Digital display Port and P CIe are operating

simulataneously via the PEG po rt

0 = No SDVO Card Present (Defa ult)

1 = SDVO Card Present

0 = LFP Disabled (Default)

1 = LFP Card Present; PCIE dis abled

USB TablePCIE Routing

0 1 2 3 4 5 6 7 8 9 10 11

USB

USB1 USB2 USB3 RESERVED MINI CARD RESERVED BLUETOOTH NEW CARD RESERVED RESERVED Card Reader CAMERA

Alba UMA

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Custom

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

Table of Content

Alba UMA

6 61Monday, April 06, 2009

-1

LANE2

MiniCard WLAN

Pair Device

LANE3 LAN

LANE5 New Card

1 1

5

SSID = CLOCK

+3.3V_RUN

A00-0402

R703

12

Do Not Stuff

D D

C C

Do Not Stuff

12

C701

SC1U10V3KX-3GP

A00-0402

+3.3V_RUN 3D3V_S0_CK505

R704

1 2

Do Not Stuff

12

C715

SC1U10V3KX-3GP

DY

12

C702

Do Not Stuff

12

C716

SC10U6D3V5MX-3GP

12

C703

C704

SCD1U16V2KX-3GP

12

C717

C718

SCD1U16V2KX-3GP

CLKSATAREQ#20

CLKREQ#_B11

PCLK_FWH43

PCLK_KBC26 CLK_PCI_ICH19

CLK_14M_ICH20

12

C705

SCD1U16V2KX-3GP

C719

SCD1U16V2KX-3GP

3D3V_S0_CK505_IO

12

C706

SCD1U16V2KX-3GP

12

C712

SCD1U16V2KX-3GP

C707

SCD1U16V2KX-3GP

C720

SCD1U16V2KX-3GP

DY

12

DY

4

CLK_XTAL_IN

X701

1 2

CLK_XTAL_OUT

12

C711

C711 SC12P50V2JN-3GP

SC12P50V2JN-3GP

R706

1 2

22R2J-2-GP

CLKSATAREQ#

CLKREQ#_1 PCI2_TME

27_SEL ITP_EN

FSB FSC

1 2

X-14D31818M-50GP

12

C708

C724

Do Not Stuff

CLK_48M_CARD50

CLK_48M_ICH20

H_STP_PCI#20 H_STP_CPU#20

C713

Do Not Stuff

12

C721

ICH_SMBCLK16,17,20,43

ICH_SMBDATA16,17,20,43

CK_PWRGD20

12

Do Not Stuff

C722

DY

C708 SC12P50V2JN-3GP

SC12P50V2JN-3GP

R705 22R2J-2-GPR705 22R2J-2-GP

1 2

DY

C714 Do Not Stuff

R708 475R2F-L1-GPR708 475R2F-L1-GP

1 2

R707 Do Not Stuff

1 2

DY

R709 33R2J-2-GPR709 33R2J-2-GP

1 2

R710 33R2J-2-GPR710 33R2J-2-GP

1 2

R711 33R2J-2-GPR711 33R2J-2-GP

1 2

12

Do Not Stuff

C723

3

U701

ICS9LPRS355BKLFT-GP-U

3

X1

2

X2

FSA

17

USB_48M HZ/FSLA

45

PCI_STOP#

44

CPU_STO P#

7

SCLK

6

SDATA

63

CK_PW RGD/PD#

8

PCI0/CR#_A

10

PCI1/CR#_B

11

PCI2/TME

12

PCI3

13

PCI4/27_SE LECT

14

PCI_F5/ITP_EN

64

FSLB/TES T_MODE

5

REF0/FSL C/TEST_SEL

55

NC#55

2

NEWCARD_CLKREQ# MINI1_CLKREQ#

NEWCARD_CLKREQ#

CLK_CPU_BCLK1

61

CLK_CPU_BCLK1#

60

CLK_MCH_BCLK1

58

CLK_MCH_BCLK1#

57

CLK_CPU_ITP1

54

CLK_CPU_ITP1#

53

CLK_PCIE_LAN1

51

CLK_PCIE_LAN1#

50

CLK_PCIE_MINI2

48

CLK_PCIE_MINI2#

47

CLK_PCIE_NEW1

41

CLK_PCIE_NEW1#

42

40 39

CLK_PCIE_MINI1_1

37

CLK_PCIE_MINI1_1#

38

CLK_MCH_3GPLL1

34

CLK_MCH_3GPLL1#

35

CLK_PCIE_ICH1

31

CLK_PCIE_ICH1#

32

CLK_PCIE_SATA1

28

CLK_PCIE_SATA1#

29

MCH_SSCDREFCLK1

24

MCH_SSCDREFCLK1#

25

CLK_MCH_DREFCLK1

20

CLK_MCH_DREFCLK1#

21

CLK_PCIE_NEW CLK_PCIE_NEW#

A00-0402

3D3V_S0_CK505_IO3D3V_S0_CK505

4

9

16

VDD48

VDDPCI

VDDREF

GNDREF

GNDPCI

GND48

1

15

18

19

23

27

33

46

62

VDDSRC

VDDCPU

43

52

56

VDDPLL3

VDD96_IO

VDDSRC_IO

VDDCPU_IO

VDDPLL3_IO

SRCT11 SRCC11

27MHZ_N ONSS/SRCT1/SE1

27MHZ_S S/SRCC1/SE2

GND

GNDSRC

GNDCPU

GND

22

26

30

36

49

59

65

CPUT0 CPUC0

CPUT1_F CPUC1_F

CPUT2_ITP /SRCT8

CPUC2_ITP /SRCC8

SRCT7/CR #_F

SRCC7/CR #_E

SRCT6 SRCC6

SRCT10 SRCC10

SRCT11/C R#_H

SRCC11/C R#_G

SRCT9 SRCC9

SRCT4 SRCC4

SRCT3/CR #_C

SRCC3/CR #_D

SRCT2/SA TAT

SRCC2/SA TAC

SRCT0/DO TT_96

SRCC0/DO TC_96

Main source: 71.08513.003 (SLG8SP513VTR) Second source: 71.00875.C03 (RTM875N-606-VD-GRT)

R702 10KR2J-3-GPR702 10KR2J-3-GP

1 2

R701 10KR2J-3-GPR701 10KR2J-3-GP

1 2

12

Do Not Stuff

C709

DY

RN

Do Not StuffRN701

RN

TP701TP701 TP702TP702

RN

Do Not StuffRN701

4

Do Not StuffRN702

4

Do Not StuffRN703

4

Do Not StuffRN704

4

Do Not StuffRN705

4

Do Not StuffRN706

4

Do Not StuffRN707

4

Do Not StuffRN708

4

Do Not StuffRN709

4

Do Not StuffRN711

4

Do Not StuffRN710

4

1 2 3

1 1

2 3 1

for UMA Rename for GPU clock

1

+3.3V_RUN

12

Do Not Stuff

C710

EC701

SC22P50V2JN-4GP

CLK_CPU_BCLK 8 CLK_CPU_BCLK# 8

CLK_MCH_BCLK 10 CLK_MCH_BCLK# 10

CLK_CPU_ITP 43 CLK_CPU_ITP# 43

CLK_PCIE_LAN 25 CLK_PCIE_LAN# 25

CLK_PCIE_NEW 50 CLK_PCIE_NEW# 50

NEWCARD_CLKREQ# 50 MINI1_CLKREQ# 43

CLK_PCIE_MINI1 43 CLK_PCIE_MINI1# 43

CLK_MCH_3GPLL 11 CLK_MCH_3GPLL# 11

CLK_PCIE_ICH 19 CLK_PCIE_ICH# 19

CLK_PCIE_SATA 18 CLK_PCIE_SATA# 18

MCH_SSCDREFCLK 11 MCH_SSCDREFCLK# 11

CLK_MCH_DREFCLK 11 CLK_MCH_DREFCLK# 11

B B

3D3V_S0_CK505

12

R713

R713 10KR2J-3-GP

10KR2J-3-GP

12

R716

DY

Do Not Stuff

ITP_EN

ITP_EN Output

0 SRC8 1 CPU_ITP

3D3V_S0_CK505

12

R714

R714 10KR2J-3-GP

10KR2J-3-GP

12

R717

R717 Do Not Stuff

Do Not Stuff

DY

PCI2_TME

PCI2_TME Output

0

Overclocking of CPU and SRC all owed

1

Overclocking of CPU and SRC not allowed

27_SEL CLK_MCH_DREFCLK CLK_MCH_DREFCLK#

12

R715

R715 10KR2J-3-GP

10KR2J-3-GP

DY

12

EC702

EC702 Do Not Stuff

Do Not Stuff

DY

12

27_SEL PIN 20 PIN 21

0 DOT96T DOT96C

EC703

EC703 Do Not Stuff

Do Not Stuff

1 SRCT0 SRCC0

SEL1 FSB

0 1 0 1

SEL0 FSA

1 01

CPU

100M 133M 166M 200M

4

FSB

533M 667M 800M

1067M266M

R718 10KR2J-3-GPR718 10KR2J-3-GP

CPU_BSEL28

X

CPU_BSEL18

CPU_BSEL08

1 2

R719 0R2J-2-GPR719 0R2J-2-GP

1 2

R720 2K2R2J-2-GPR720 2K2R2J-2-GP

1 2

R721 1KR2J-1-GPR721 1KR2J-1-GP

1 2

R722 1KR2J-1-GPR722 1KR2J-1-GP

1 2

R723 1KR2J-1-GPR723 1KR2J-1-GP

1 2

3

FSC

FSB

FSA

MCH_CLKSEL0 11

MCH_CLKSEL1 11

MCH_CLKSEL2 11

Alba UMA

Title

Clock Generator SLG8SP513VTR

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Alba UMA

A A

FSC

1 0 0 1 0 0 0 0

5

SEL2

for UMA

UMA

Discrete

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

-1

7 61Monday, April 06, 2009

1

-1

D

C

B

A

SSID = CPU

D

H_A#[35..3]10

H_REQ#[4..0]10

C

B

5

1 OF 4

CPU1A

H_A#3 H_A#4 H_A#5

H_A#[35..3]

H_ADSTB#010

H_ADSTB#110

H_A20M#18

H_FERR#18

H_IGNNE#18

H_STPCLK#18

H_INTR18 H_NMI18 H_SMI#18

TP807TP807 TP808TP808 TP802TP802 TP804TP804 TP803TP803 TP805TP805 TP813TP813 TP810TP810 TP806TP806 TP809TP809

TP801TP801

H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16

H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4

H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35

RSVD_CPU_1 RSVD_CPU_2 RSVD_CPU_3 RSVD_CPU_4 RSVD_CPU_5 RSVD_CPU_6 RSVD_CPU_7 RSVD_CPU_8 RSVD_CPU_9 RSVD_CPU_10

RSVD_CPU_11

CPU1A

J4

A3#

L5

A4#

L4

A5#

K5

A6#

M3

A7#

N2

A8#

J1

A9#

N3

A10#

P5

A11#

P2

A12#

L2

A13#

P4

A14#

P1

A15#

R1

A16#

M1

ADSTB0#

K3

REQ0#

H2

REQ1#

K2

REQ2#

J3

REQ3#

L1

REQ4#

Y2

A17#

U5

A18#

R3

A19#

W6

A20#

U4

A21#

Y5

A22#

U1

A23#

R4

A24#

T5

A25#

T3

A26#

W2

A27#

W5

A28#

Y4

A29#

U2

A30#

V4

A31#

W3

A32#

AA4

A33#

AB2

A34#

AA3

A35#

V1

ADSTB1#

A6

A20M#

A5

FERR#

C4

IGNNE#

D5

STPCLK#

C6

LINT0

B4

LINT1

A3

SMI#

M4

RSVD#M4

N5

RSVD#N5

T2

RSVD#T2

V3

RSVD#V3

B2

RSVD#B2

C3

RSVD#C3

D2

RSVD#D2

D22

RSVD#D2 2

D3

RSVD#D3

F6

RSVD#F6

B1

KEY_NC

BGA479-SKT6-GPU7

62.10040.221

TEST7

ADDR GROUP 0

ADDR GROUP 1

XDP/ITP SIGNALS CONTROL

THERMAL

PROCHOT #

ICH

THERMTR IP#

HCLK

RESERVED

ADS# BNR# BPRI#

DEFER#

DRDY# DBSY#

BR0#

IERR#

INIT#

LOCK#

RESET#

RS0# RS1# RS2#

TRDY#

HIT#

HITM#

BPM0# BPM1# BPM2# BPM3# PRDY#

PREQ#

TCK

TDO TMS

TRST#

DBR#

THRMDA THRMDC

BCLK0 BCLK1

4

H1 E2 G5

H5 F21 E1

F1

CPU_IERR#

D20 B3

H4

H_CPURST#

C1

H_RS#0

F3

H_RS#1

F4

H_RS#2

G3 G2

G6 E4

ITP_BPM#0

AD4

ITP_BPM#1

AD3

ITP_BPM#2

AD1

ITP_BPM#3

AC4

ITP_BPM#4

AC2

ITP_BPM#5

AC1

ITP_TCK

AC5

ITP_TDI

AA6

TDI

ITP_TDO

AB3

ITP_TMS

AB5

ITP_TRST#

AB6

ITP_DBRESET#

C20

R805 Do Not Stuff

R806 56R2J-4-GPR806 56R2J-4-GP

D21 A24 B25

C7

R810 Do Not Stuff

A22 A21

TP814TP814

1

R804 56R2J-4-GPR804 56R2J-4-GP

1 2

DY

1 2

H_THERMDA H_THERMDC

1 2

DY

H_ADS# 10 H_BNR# 10 H_BPRI# 10

H_DEFER# 10 H_DRDY# 10 H_DBSY# 10

H_BREQ#0 10

H_INIT# 18

H_LOCK# 10 H_CPURST# 10,43 H_RS#[2..0] 10

H_TRDY# 10

H_HIT# 10 H_HITM# 10

ITP_BPM#0 43 ITP_BPM#1 43 ITP_BPM#2 43 ITP_BPM#3 43 ITP_BPM#4 43 ITP_BPM#5 43 ITP_TCK 43

ITP_TDI 43 ITP_TDO 43 ITP_TMS 43 ITP_TRST# 43 ITP_DBRESET# 20,43

CPU_PROCHOT# 34

+1.05V_VCCP

H_THERMDA 28 H_THERMDC 28

H_THRMTRIP# 11,18,26,30,54

+1.05V_VCCP

CLK_CPU_BCLK 7 CLK_CPU_BCLK# 7

2KR2F-3-GP

3

+1.05V_VCCP

H_THRMTRIP# should connect to ICH9 and MCH without T-ing.

+1.05V_VCCP

R814

R814 1KR2F-3-GP

1KR2F-3-GP

1 2

12

R813

Layout notes Z= 55 Ohm 0.5" MAX for CPU_GTLREF0

CPU_GTLREF0

12

C802

SC1KP50V2KX-1GP

X01-0112

H_DSTBN#010 H_DSTBP#010 H_DINV#010

H_DSTBN#110 H_DSTBP#110 H_DINV#110

R807 Do Not Stuff

1 2

DY

R809 Do Not Stuff

1 2

DY

R808 Do Not Stuff

1 2

DY

R801 Do Not Stuff

1 2

DY

CPU_BSEL07 CPU_BSEL17 CPU_BSEL27

2

H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15

H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31

TEST1 TEST2 CPU_TEST3

CPU_TEST5

H_DINV#[3..0]

H_DSTBN#[3..0]

H_DSTBP#[3..0]

H_D#[63..0]

CPU1B

E22

D0#

F24

D1#

E26

D2#

G22

D3#

F23

D4#

G25

D5#

E25

D6#

E23

D7#

K24

D8#

G24

D9#

J24

D10#

J23

D11#

H22

D12#

F26

D13#

K22

D14#

H23

D15#

J26

DSTBN0#

H26

DSTBP0#

H25

DINV0#

N22

D16#

K25

D17#

P26

D18#

R23

D19#

L23

D20#

M24

D21#

L22

D22#

M23

D23#

P25

D24#

P23

D25#

P22

D26#

T24

D27#

R24

D28#

L25

D29#

T25

D30#

N25

D31#

L26

DSTBN1#

M26

DSTBP1#

N24

DINV1#

AD26

GTLREF

C23

TEST1

D25

TEST2

C24

TEST3

AF26

TEST4

AF1

TEST5

A26

TEST6

B22

BSEL0

B23

BSEL1

C21

BSEL2

BGA479-SKT6-GPU7

62.10040.221

2 OF 4

DATA GRP0 DATA GRP1

MISC

1

H_DINV#[3..0] 10

H_DSTBN#[3..0] 10

H_DSTBP#[3..0] 10

H_D#[63..0] 10

H_D#32

Y22

D32# D33# D34# D35# D36# D37# D38# D39# D40# D41# D42#

DATA GRP2DATA GRP3

D43# D44# D45# D46#

D47# DSTBN2# DSTBP2#

DINV2#

D48#

D49#

D50#

D51#

D52#

D53#

D54#

D55#

D56#

D57#

D58#

D59#

D60#

D61#

D62#

D63# DSTBN3# DSTBP3#

DINV3#

COMP0 COMP1 COMP2 COMP3

DPRSTP#

DPSLP# DPWR #

PWRG OOD

SLP#

PSI#

Layout Note: Comp0, 2 connect with Zo=27.4 ohm, make trace length shorter than 0.5" . Comp1, 3 connect with Zo=55 oh m, make trace length shorter than 0.5" .

AB24 V24 V26 V23 T22 U25 U23 Y25 W22 Y23 W24 W25 AA23 AA24 AB25 Y26 AA26 U22

AE24 AD24 AA21 AB22 AB21 AC26 AD20 AE22 AF23 AC25 AE21 AD21 AC22 AD23 AF22 AC23 AE25 AF24 AC20

R26 U26 AA1 Y1

E5 B5 D24 D6 D7 AE6

H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47

H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63

COMP0 COMP1 COMP2 COMP3

H_DSTBN#2 10 H_DSTBP#2 10 H_DINV#2 10

H_DSTBN#3 10 H_DSTBP#3 10 H_DINV#3 10

R812 27D4R2F-L1-GPR812 27D4R2F-L1-GP

1 2

R811 54D9R2F-L1-GPR811 54D9R2F-L1-GP

1 2

R803 27D4R2F-L1-GPR803 27D4R2F-L1-GP

1 2

R802 54D9R2F-L1-GPR802 54D9R2F-L1-GP

1 2

H_DPRSTP# 11,18,34 H_DPSLP# 18 H_DPWR# 10 H_PWRGOOD 18,30 H_CPUSLP# 10

PSI# 34

Alba UMA

A

Alba UMA

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Custom

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

CPU-FSB(1/2)

Alba UMA

8 61Monday, April 06, 2009

-1

5

4

3

2

1

SSID = CPU

D D

+VCC_CORE

3 OF 4

CPU1C

A7

VCC

A9

VCC

A10

VCC

A12

VCC

A13

VCC

A15

VCC

A17

VCC

A18

VCC

A20

VCC

B7

VCC

B9

VCC

B10

VCC

B12

VCC

B14

VCC

B15

VCC

B17

VCC

B18

VCC

B20

VCC

C9

VCC

C10

VCC

C12

VCC

C13

VCC

C15

VCC

C C

B B

C17

VCC

C18

VCC

D9

VCC

D10

VCC

D12

VCC

D14

VCC

D15

VCC

D17

VCC

D18

VCC

E7

VCC

E9

VCC

E10

VCC

E12

VCC

E13

VCC

E15

VCC

E17

VCC

E18

VCC

E20

VCC

F7

VCC

F9

VCC

F10

VCC

F12

VCC

F14

VCC

F15

VCC

F17

VCC

F18

VCC

F20

VCC

AA7

VCC

AA9

VCC

AA10

VCC

AA12

VCC

AA13

VCC

AA15

VCC

AA17

VCC

AA18

VCC

AA20

VCC

AB9

VCC

AC10

VCC

AB10

VCC

AB12

VCC

AB14

VCC

AB15

VCC

AB17

VCC

AB18

VCC

BGA479-SKT6-GPU7

62.10040.221

VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC

VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP

VCCA VCCA

VID0 VID1 VID2 VID3 VID4 VID5 VID6

VCCSENS E

VSSSENS E

AB20 AB7 AC7 AC9 AC12 AC13 AC15 AC17 AC18 AD7 AD9 AD10 AD12 AD14 AD15 AD17 AD18 AE9 AE10 AE12 AE13 AE15 AE17 AE18 AE20 AF9 AF10 AF12 AF14 AF15 AF17 AF18 AF20

G21 V6 J6 K6 M6 J21 K21 M21 N21 N6 R21 R6 T21 T6 V21 W21

B26 C26

AD6 AF5 AE5 AF4 AE3 AF3 AE2

AF7

AE7

+VCC_CORE

CPU_VID0 CPU_VID1 CPU_VID2 CPU_VID3 CPU_VID4 CPU_VID5 CPU_VID6

layout note: "+1.5V_VCCA" as short as possible

CPU_VID[6..0] 34

R902

1 2

100R2F-L1-GP-U

R901

1 2

100R2F-L1-GP-U

+VCC_CORE

+1.05V_VCCP

VCC_SENSE_1

VSS_SENSE_1

DY

12

C922

C915

Do Not Stuff

DY

12

C911

C912

DY

SC22U6D3V5MX-2GP

12

C913

C909

SC22U6D3V5MX-2GP

12

C924

Do Not Stuff

TC901

SCD01U16V2KX-3GP

PG902 Do Not StuffPG902 Do Not Stuff

1 2

PG901 Do Not StuffPG901 Do Not Stuff

1 2

X01-0106

12

C919

Do Not Stuff

DY

12

C931

Do Not Stuff

DY

C938

C908

Do Not Stuff

C916

Do Not Stuff

DY

12

C921

Do Not Stuff

C903

C902

Do Not Stuff

DY

12

C927

C936

Do Not Stuff

DY

SC22U6D3V5MX-2GP

12

DY

12

C934

C901

Do Not Stuff

DY

SC22U6D3V5MX-2GP

12

C932

C910

Do Not Stuff

SC22U6D3V5MX-2GP

X01-0106

12

C920

Do Not Stuff

DY

SC22U6D3V5MX-2GP

12

C923

SC1U10V2KX-1GP

SC1U6D3V2KX-GP

12

C917

C918

SC22U6D3V5MX-2GP

12

C925

C906

SC1U10V2KX-1GP

12

C929

C928

Do Not Stuff

DY

SC22U6D3V5MX-2GP

12

C905

C904

SC1U10V2KX-1GP

SC1U6D3V2KX-GP

12

C937

C930

SC22U6D3V5MX-2GP

A00-0402

+1.5V_RUN+1.5V_VCCA

R903

Do Not Stuff

1 2

12

C939

12

+VCC_CORE

C940

C940 SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

VCC_SENSE 34

VSS_SENSE 34

Layout Note: Place as close as possible to the CPU VCCA pin.

VCC_SENSE and VSS_SENSE lines should be of equal length.

12

C935

SC22U6D3V5MX-2GP

12

C933

SC22U6D3V5MX-2GP

12

C926

C926 SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

C907

C907 SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

C914

C914 SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

A11 A14 A16 A19 A23 AF2

B11 B13 B16 B19 B21 B24

C11 C14 C16 C19

C22 C25

D11 D13 D16 D19 D23 D26

E11 E14 E16 E19 E21 E24

F11 F13 F16 F19

F22 F25

G23 G26

H21 H24

K23 K26

M22 M25

N23 N26

J22 J25

L21 L24

CPU1D

A4

VSS

A8

VSS VSS VSS VSS VSS VSS VSS

B6

VSS

B8

VSS VSS VSS VSS VSS VSS VSS

C5

VSS

C8

VSS VSS VSS VSS VSS

C2

VSS VSS VSS

D1

VSS

D4

VSS

D8

VSS VSS VSS VSS VSS VSS VSS

E3

VSS

E6

VSS

E8

VSS VSS VSS VSS VSS VSS VSS

F5

VSS

F8

VSS VSS VSS VSS VSS

F2

VSS VSS VSS

G4

VSS

G1

VSS VSS VSS

H3

VSS

H6

VSS VSS VSS

J2

VSS

J5

VSS VSS VSS

K1

VSS

K4

VSS VSS VSS

L3

VSS

L6

VSS VSS VSS

M2

VSS

M5

VSS VSS VSS

N1

VSS

N4

VSS VSS VSS

P3

VSS

BGA479-SKT6-GPU7

62.10040.221

4 OF 4

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

P6 P21 P24 R2 R5 R22 R25 T1 T4 T23 T26 U3 U6 U21 U24 V2 V5 V22 V25 W1 W4 W23 W26 Y3 Y6 Y21 Y24 AA2 AA5 AA8 AA11 AA14 AA16 AA19 AA22 AA25 AB1 AB4 AB8 AB11 AB13 AB16 AB19 AB23 AB26 AC3 AC6 AC8 AC11 AC14 AC16 AC19 AC21 AC24 AD2 AD5 AD8 AD11 AD13 AD16 AD19 AD22 AD25 AE1 AE4 AE8 AE11 AE14 AE16 AE19 AE23 AE26 A2 AF6 AF8 AF11 AF13 AF16 AF19 AF21 A25 AF25

CPU_GND1

CPU_GND2 CPU_GND3

CPU_GND4

NCTF PIN

TP902TP902

TP901TP901 TP903TP903

TP904TP904

X01-0106

A A

5

4

3

2

Alba UMA

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU-Power(2/2)

Size Document Number Rev

Custom

Date: Sheet of

CPU-Power(2/2)

Taipei Hsien 221, Taiwan, R.O.C.

Alba UMA

1

9 61Monday, April 06, 2009

-1

5

D

C

B

A

SSID = MCH

4

3

2

1

1 OF 10

U1001A

F2

H_D#_0

G8

H_D#_1

F8

H_D#_2

E6

H_D#_3

G2

H_D#_4

H6

H_D#_5

H2

H_D#_6

F6

H_D#_7

D4

H_D#_8

H3

H_D#_9

M9

H_D#_10

M11

H_D#_11

J1

H_D#_12

J2

H_D#_13

N12

H_D#_14

J6

H_D#_15

P2

H_D#_16

L2

H_D#_17

R2

H_D#_18

N9

H_D#_19

L6

H_D#_20

M5

H_D#_21

J3

H_D#_22

N2

H_D#_23

R1

H_D#_24

N5

H_D#_25

N6

H_D#_26

P13

H_D#_27

N8

H_D#_28

L7

H_D#_29

N10

H_D#_30

M3

H_D#_31

Y3

H_D#_32

AD14

H_D#_33

Y6

H_D#_34

Y10

H_D#_35

Y12

H_D#_36

Y14

H_D#_37

Y7

H_D#_38

W2

H_D#_39

AA8

H_D#_40

Y9

H_D#_41

AA13

H_D#_42

AA9

H_D#_43

AA11

H_D#_44

AD11

H_D#_45

AD10

H_D#_46

AD13

H_D#_47

AE12

H_D#_48

AE9

H_D#_49

AA2

H_D#_50

AD8

H_D#_51

AA3

H_D#_52

AD3

H_D#_53

AD7

H_D#_54

AE14

H_D#_55

AF3

H_D#_56

AC1

H_D#_57

AE3

H_D#_58

AC3

H_D#_59

AE11

H_D#_60

AE8

H_D#_61

AG2

H_D#_62

AD6

H_D#_63

C5

H_SW ING

E3

H_RCOMP

C12

H_CPURS T#

E11

H_CPUSL P#

A11

H_AVREF

B11

H_DVREF

CANTIGA-GM-GP-U-NF

HOST

H_AVREF

H_D#[63..0]

H_CPURST#8,43 H_CPUSLP#8

DY

12

C1002

C1002 Do Not Stuff

Do Not Stuff

H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63

H_SWING H_RCOMP

D

H_SWING

H_RCOMP

+1.05V_VCCP

12

R1003

R1003 221R2F-2-GP

221R2F-2-GP

12

R1002

R1002 100R2F-L1-GP-U

100R2F-L1-GP-U

C

B

H_SWING routing Trace width and Spacing use 10 / 20 mil

H_SWING Resistors and Capacitors close MCH 500 mil ( MAX )

12

C1001

C1001 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

H_RCOMP routing Trace width and Spacing use 10 / 20 mil

1 2

24D9R2F-L-GP

R1001

H_D#[63..0]8

Place R1001 near to the chip ( < 0.5")

+1.05V_VCCP

R1004

R1004 1KR2F-3-GP

1KR2F-3-GP

1 2

12

R1005

R1005 2KR2F-3-GP

2KR2F-3-GP

1 OF 10

H_A#_3 H_A#_4 H_A#_5 H_A#_6 H_A#_7 H_A#_8

H_A#_9 H_A#_10 H_A#_11 H_A#_12 H_A#_13 H_A#_14 H_A#_15 H_A#_16 H_A#_17 H_A#_18 H_A#_19 H_A#_20 H_A#_21 H_A#_22 H_A#_23 H_A#_24 H_A#_25 H_A#_26 H_A#_27 H_A#_28 H_A#_29 H_A#_30 H_A#_31 H_A#_32 H_A#_33 H_A#_34 H_A#_35

H_ADS# H_ADSTB #_0 H_ADSTB #_1

H_BNR#

H_BPRI#

H_BREQ#

H_DEFER #

H_DBSY#

HPLL_CL K

HPLL_CL K#

H_DPW R#

H_DRDY#

H_HIT#

H_HITM#

H_LOCK#

H_TRDY#

H_DINV#_0 H_DINV#_1 H_DINV#_2 H_DINV#_3

H_DSTBN #_0 H_DSTBN #_1 H_DSTBN #_2 H_DSTBN #_3

H_DSTBP #_0 H_DSTBP #_1 H_DSTBP #_2 H_DSTBP #_3

H_REQ#_ 0 H_REQ#_ 1 H_REQ#_ 2 H_REQ#_ 3 H_REQ#_ 4

H_RS#_0 H_RS#_1 H_RS#_2

A14 C15 F16 H13 C18 M16 J13 P16 R16 N17 M13 E17 P17 F17 G20 B19 J16 E20 H16 J20 L17 A17 B17 L16 C21 J17 H20 B18 K17 B20 F21 K21 L20

H12 B16 G17 A9 F11 G12 E9 B10 AH7 AH6 J11 F9 H9 E12 H11 C9

J8 L3 Y13 Y1

L10 M7 AA5 AE6

L9 M8 AA6 AE5

B15 K13 F13 B13 B14

B6 F12 C8

H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35

H_DINV#0 H_DINV#1 H_DINV#2 H_DINV#3

H_DSTBN#0 H_DSTBN#1 H_DSTBN#2 H_DSTBN#3

H_DSTBP#0 H_DSTBP#1 H_DSTBP#2 H_DSTBP#3

H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4

H_RS#0 H_RS#1 H_RS#2

H_A#[35..3]

H_ADS# 8 H_ADSTB#0 8 H_ADSTB#1 8 H_BNR# 8

H_BPRI# 8

H_BREQ#0 8

H_DEFER# 8

H_DBSY# 8

CLK_MCH_BCLK 7 CLK_MCH_BCLK# 7

H_DPWR# 8 H_DRDY# 8 H_HIT# 8 H_HITM# 8

H_LOCK# 8

H_TRDY# 8

H_DINV#[3..0]

H_DSTBN#[3..0]

H_DSTBP#[3..0]

H_REQ#[4..0]

H_RS#[2..0]

H_A#[35..3] 8

H_DINV#[3..0] 8

H_DSTBN#[3..0] 8

H_DSTBP#[3..0] 8

H_REQ#[4..0] 8

H_RS#[2..0] 8

Alba UMA

A

Alba UMA

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Custom

Date: Sheet of

Cantiga-HOST(1/6)

Taipei Hsien 221, Taiwan, R.O.C.

Alba UMA

10 61Monday, April 06, 2009

-1

D

C

B

A

SSID = MCH

is current setting

*

CFG Strap HighLow

CFG 5

D

C

B

A

CFG 6

CFG 7

CFG 9 PCIE GFX lane reversed

CFG 10 PCIE loopback enable PCIE loopback disable

CFG 12 ALLZ mode enable ALLZ mode disable

CFG 13 XOR mode enable XOR mode disable

CFG 16

CFG 19 DMI Lane Reserved

CFG 20 SDVO concurrent with PCIE

SDVO_CTRLDATA

L_DDC_DATA LFP disable LFP card present

DDPC_CTRLDATA

+3.3V_RUN

R1105 Do Not Stuff

1 2

DY

R1115 Do Not Stuff

1 2

DY

R1110 Do Not Stuff

1 2

DY

R1112 Do Not Stuff

1 2

DY

RN1101

4

SRN10KJ-5-GP

R1128 Do Not Stuff

1 2

DY

R1108 Do Not Stuff

1 2

DY

R1107 Do Not Stuff

1 2

DY

R1103 Do Not Stuff

1 2

DY

R1127 Do Not Stuff

1 2

DY

R1124 Do Not Stuff

1 2

DY

R1102 Do Not Stuff

1 2

DY

R1106 Do Not Stuff

1 2

DY

R1104 Do Not Stuff

1 2

DY

5

DMI X 2

ITPM enable

TLS cipher suite with no confidentiality

FSB dynamic ODT disable

Normal operation Reverse DMI lanes

Only PCIE or SDVO is operational

SDVO interface disable

SDVO/iHDMI/DP interface disabled

CFG11

CFG18

CFG19

CFG20

PM_EXTTS#0

1

PM_EXTTS#1

23

CFG5

CFG6

CFG7

CFG8

CFG9

CFG10

CFG12

CFG13

CFG16

H_THRMTRIP#8,18,26,30,54

DMI X 4

ITPM disable

TLS cipher suite with confidentiality

PCIE GFX lane numbered in oder

FSB Dynamic ODT enable

*

PCIE and SDVO are operatiing simultaneously

*

via the PEG port

SDVO interface enable

* *

SDVO/iHDMI/DP

*

interface enabled

4

* * *

*

* * * *

M36 N36 R33

AH9 AH10 AH12 AH13

AL34 AK34 AN35

AM35

AY21

BG23

BF23 BH18 BF18

T33

K12

T24

B31

B2

M1

U1001B

RESERVE D#M36 RESERVE D#N36 RESERVE D#R33 RESERVE D#T33 RESERVE D#AH9 RESERVE D#AH10 RESERVE D#AH12 RESERVE D#AH13 RESERVE D#K12 RESERVE D#AL34 RESERVE D#AK34 RESERVE D#AN35 RESERVE D#AM35 RESERVE D#T24

RESERVE D#B31 RESERVE D#B2 RESERVE D#M1

RESERVE D#AY21

RESERVE D#BG23 RESERVE D#BF23 RESERVE D#BH18 RESERVE D#BF18

RSVD

DDR CLK/ CONTROL/COMPENSATION

DPLL_RE F_SSCLK

DPLL_RE F_SSCLK#

CLK

FSB setting

MCH_CLKSEL07 MCH_CLKSEL17 MCH_CLKSEL27

TP1103TP1103 TP1105TP1105

TP1101TP1101 TP1102TP1102

TP1104TP1104

PM_SYNC#20

H_DPRSTP#8,18,34 PM_EXTTS#016 PM_EXTTS#117

R1118

PM_PWROK20,26,28

PLT_RST#19,25,26,43,50

DPRSLPVR20,34

1 2

0R2J-2-GP

1 2

100R2J-2-GP

Do Not Stuff

R1101

C1101

DY

CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15 CFG16 CFG17 CFG18 CFG19 CFG20

PWROK_R RSTIN#

12

T25

CFG_0

R25

CFG_1

P25

CFG_2

P20

CFG_3

P24

CFG_4

C25

CFG_5

N24

CFG_6

M24

CFG_7

E21

CFG_8

C23

CFG_9

C24

CFG_10

N21

CFG_11

P21

CFG_12

T21

CFG_13

R20

CFG_14

M20

CFG_15

L21

CFG_16

H21

CFG_17

P29

CFG_18

R28

CFG_19

T28

CFG_20

R29

PM_SYNC#

B7

PM_DPRS TP#

N33

PM_EXT_ TS#_0

P32

PM_EXT_ TS#_1

AT40

PWRO K

AT11

RSTIN#

T20

THERMTR IP#

R32

DPRSLPV R

BG48

NC#BG48

BF48

NC#BF48

BD48

NC#BD48

BC48

NC#BC48

BH47

NC#BH47

BG47

NC#BG47

BE47

NC#BE47

BH46

NC#BH46

BF46

NC#BF46

BG45

NC#BG45

BH44

NC#BH44

BH43

NC#BH43

BH6

NC#BH6

BH5

NC#BH5

BG4

NC#BG4

BH3

NC#BH3

BF3

NC#BF3

BH2

NC#BH2

BG2

NC#BG2

BE2

NC#BE2

BG1

NC#BG1

BF1

NC#BF1

BD1

NC#BD1

BC1

NC#BC1

F1

NC#F1

A47

NC#A47

CANTIGA-GM-GP-U-NF

DMI

CFG

PM

GRAPHICS VID

MEHDA

NC

MISC

3

2 OF 10

SA_CK_0 SA_CK_1 SB_CK_0 SB_CK_1

SA_CK#_ 0 SA_CK#_ 1 SB_CK#_ 0 SB_CK#_ 1

SA_CKE_ 0 SA_CKE_ 1 SB_CKE_ 0 SB_CKE_ 1

SA_CS#_ 0 SA_CS#_ 1 SB_CS#_ 0 SB_CS#_ 1

SA_ODT_ 0 SA_ODT_ 1 SB_ODT_ 0 SB_ODT_ 1

SM_RCOM P

SM_RCOM P#

SM_RCOM P_VOH

SM_RCOM P_VOL

SM_VREF

SM_PW ROK

SM_REXT

SM_DRAM RST#

DPLL_RE F_CLK

DPLL_RE F_CLK#

PEG_CLK

PEG_CLK #

DMI_RXN_0 DMI_RXN_1 DMI_RXN_2 DMI_RXN_3

DMI_RXP_0 DMI_RXP_1 DMI_RXP_2 DMI_RXP_3

DMI_TXN_0 DMI_TXN_1 DMI_TXN_2 DMI_TXN_3

DMI_TXP_0 DMI_TXP_1 DMI_TXP_2 DMI_TXP_3

GFX_VID_0 GFX_VID_1 GFX_VID_2 GFX_VID_3 GFX_VID_4

GFX_VR_ EN

CL_CLK

CL_DATA

CL_PW ROK

CL_RST# CL_VREF

DDPC_CT RLCLK

DDPC_CT RLDATA

SDVO_CT RLCLK

SDVO_CT RLDATA

CLKREQ#

ICH_SYNC#

TSATN#

HDA_BCL K HDA_RST #

HDA_SDI

HDA_SDO

HDA_SYNC

AP24 AT21 AV24 AU20

AR24 AR21 AU24 AV20

BC28 AY28 AY36 BB36

BA17 AY16 AV16 AR13

BD17 AY17 BF15 AY13

M_RCOMPP

BG22

M_RCOMPN

BH21

SM_RCOMP_VOH

BF28

SM_RCOMP_VOL

BH28

CANTIGA_SM_VREF

AV42 AR36

SM_REXT

BF17 BC36

CLK_MCH_DREFCLK

B38

CLK_MCH_DREFCLK#

A38

MCH_SSCDREFCLK

E41

MCH_SSCDREFCLK#

F41

CLK_MCH_3GPLL

F43

CLK_MCH_3GPLL#

E43

DMI_ITXN0_MRXN0

AE41

DMI_ITXN1_MRXN1

AE37

DMI_ITXN2_MRXN2

AE47

DMI_ITXN3_MRXN3

AH39

DMI_ITXP0_MRXP0

AE40

DMI_ITXP1_MRXP1

AE38

DMI_ITXP2_MRXP2

AE48

DMI_ITXP3_MRXP3

AH40

DMI_IRXN0_MTXN0

AE35

DMI_IRXN1_MTXN1

AE43

DMI_IRXN2_MTXN2

AE46

DMI_IRXN3_MTXN3

AH42

DMI_IRXP0_MTXP0

AD35

DMI_IRXP1_MTXP1

AE44

DMI_IRXP2_MTXP2

AF46

DMI_IRXP3_MTXP3

AH43

B33 B32 G33 F33 E33

C34

AH37 AH36 AN36 AJ35

MCH_CLVREF

AH34

N28 M28 G36 E36 K36 H36

TSATN#

B12

B28 B30 B29 C29 A28

MCH_CLVREF ~= 0.35V

1

TP1106TP1106

M_CLK_DDR0 16 M_CLK_DDR1 16 M_CLK_DDR2 17 M_CLK_DDR3 17

M_CLK_DDR#0 16 M_CLK_DDR#1 16 M_CLK_DDR#2 17 M_CLK_DDR#3 17

M_CKE0 16 M_CKE1 16 M_CKE2 17 M_CKE3 17

M_CS0# 16 M_CS1# 16 M_CS2# 17 M_CS3# 17

M_ODT0 16 M_ODT1 16 M_ODT2 17 M_ODT3 17

CLK_MCH_DREFCLK 7 CLK_MCH_DREFCLK# 7 MCH_SSCDREFCLK 7 MCH_SSCDREFCLK# 7

CLK_MCH_3GPLL 7 CLK_MCH_3GPLL# 7

DMI_ITXN0_MRXN0 19 DMI_ITXN1_MRXN1 19 DMI_ITXN2_MRXN2 19 DMI_ITXN3_MRXN3 19

DMI_ITXP0_MRXP0 19 DMI_ITXP1_MRXP1 19 DMI_ITXP2_MRXP2 19 DMI_ITXP3_MRXP3 19

DMI_IRXN0_MTXN0 19 DMI_IRXN1_MTXN1 19 DMI_IRXN2_MTXN2 19 DMI_IRXN3_MTXN3 19

DMI_IRXP0_MTXP0 19 DMI_IRXP1_MTXP1 19 DMI_IRXP2_MTXP2 19 DMI_IRXP3_MTXP3 19

CL_CLK0 20 CL_DATA0 20

M_PWROK 20

CL_RST#0 20

CLKREQ#_B 7 MCH_ICH_SYNC# 20

1 2

R1123

R1123 499R2F-2-GP

499R2F-2-GP

For UMA

12

2

+1.05V_VCCP

1 2

12

C1106

SCD1U10V2KX-4GP

80D6R2F-L-GP

R1114

R1114 1KR2F-3-GP

1KR2F-3-GP

R1116

R1116 499R2F-2-GP

499R2F-2-GP

DY

12

R1126

R1125

+1.8V_SUS

12

DY

C1144

Do Not Stuff

TSATN#

1

+1.8V_SUS

SM_RCOMP_VOH

SC2D2U10V3KX-1GP

SM_RCOMP_VOL

SC2D2U10V3KX-1GP

+1.8V_SUS

12

DY

R1119

Do Not Stuff

12

R1129

DY

C1143

Do Not Stuff

12

R1121

R1121 56R2J-4-GP

56R2J-4-GP

CLKREQ#_B

Alba UMA

Title

Size Document Number Rev

Custom

Date: Sheet of

12

SCD01U16V2KX-3GP

C1104

12

SCD01U16V2KX-3GP

C1102

A00-0402

+V_DDR_MCH_REF

R1139

Do Not Stuff

1 2

+3.3V_RUN+1.05V_VCCP

12

R1122

DY

Do Not Stuff

TSATN#_KBC

C

Q1101

B

DY

Do Not Stuff

E

+3.3V_RUN

R1117

1 2

10KR2J-3-GP

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Cantiga-DMI/CFG(2/6)

Alba UMA

C1105

C1103

12

TSATN#_KBC 26

11 61Monday, April 06, 2009

R1113

R1113 1KR2F-3-GP

1KR2F-3-GP

1 2

12

R1109

R1109 3K01R2F-3-GP

3K01R2F-3-GP

R1111

R1111 1KR2F-3-GP

1KR2F-3-GP

1 2

-1

5

D

C

B

A

SSID = MCH

4

3

2

1

M_A_DQ[63..0]16

D

C

B

M_A_DQ[63..0]

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63

U1001D

AJ38

SA_DQ_0

AJ41

SA_DQ_1

AN38

SA_DQ_2

AM38

SA_DQ_3

AJ36

SA_DQ_4

AJ40

SA_DQ_5

AM44

SA_DQ_6

AM42

SA_DQ_7

AN43

SA_DQ_8

AN44

SA_DQ_9

AU40

SA_DQ_1 0

AT38

SA_DQ_1 1

AN41

SA_DQ_1 2

AN39

SA_DQ_1 3

AU44

SA_DQ_1 4

AU42

SA_DQ_1 5

AV39

SA_DQ_1 6

AY44

SA_DQ_1 7

BA40

SA_DQ_1 8

BD43

SA_DQ_1 9

AV41

SA_DQ_2 0

AY43

SA_DQ_2 1

BB41

SA_DQ_2 2

BC40

SA_DQ_2 3

AY37

SA_DQ_2 4

BD38

SA_DQ_2 5

AV37

SA_DQ_2 6

AT36

SA_DQ_2 7

AY38

SA_DQ_2 8

BB38

SA_DQ_2 9

AV36

SA_DQ_3 0

AW3 6

SA_DQ_3 1

BD13

SA_DQ_3 2

AU11

SA_DQ_3 3

BC11

SA_DQ_3 4

BA12

SA_DQ_3 5

AU13

SA_DQ_3 6

AV13

SA_DQ_3 7

BD12

SA_DQ_3 8

BC12

SA_DQ_3 9

BB9

SA_DQ_4 0

BA9

SA_DQ_4 1

AU10

SA_DQ_4 2

AV9

SA_DQ_4 3

BA11

SA_DQ_4 4

BD9

SA_DQ_4 5

AY8

SA_DQ_4 6

BA6

SA_DQ_4 7

AV5

SA_DQ_4 8

AV7

SA_DQ_4 9

AT9

SA_DQ_5 0

AN8

SA_DQ_5 1

AU5

SA_DQ_5 2

AU6

SA_DQ_5 3

AT5

SA_DQ_5 4

AN10

SA_DQ_5 5

AM11

SA_DQ_5 6

AM5

SA_DQ_5 7

AJ9

SA_DQ_5 8

AJ8

SA_DQ_5 9

AN12

SA_DQ_6 0

AM13

SA_DQ_6 1

AJ11

SA_DQ_6 2

AJ12

SA_DQ_6 3

CANTIGA-GM-GP-U-NF

4 OF 10

BD21

SA_BS_0

BG18

SA_BS_1

AT25

SA_BS_2

BB20

SA_RAS#

BD20

SA_CAS#

AY20

SA_W E#

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14

M_A_DM[7..0]

M_A_DQS[7..0]

M_A_DQS#[7..0]

M_A_A[14..0]

SA_DM_0 SA_DM_1 SA_DM_2 SA_DM_3 SA_DM_4 SA_DM_5 SA_DM_6 SA_DM_7

SA_DQS_ 0 SA_DQS_ 1 SA_DQS_ 2 SA_DQS_ 3 SA_DQS_ 4 SA_DQS_ 5 SA_DQS_ 6

SA_DQS_ 7 SA_DQS# _0 SA_DQS# _1 SA_DQS# _2 SA_DQS# _3 SA_DQS# _4 SA_DQS# _5 SA_DQS# _6 SA_DQS# _7

SA_MA_0 SA_MA_1 SA_MA_2 SA_MA_3 SA_MA_4 SA_MA_5 SA_MA_6 SA_MA_7 SA_MA_8

SA_MA_9 SA_MA_1 0 SA_MA_1 1 SA_MA_1 2 SA_MA_1 3 SA_MA_1 4

DDR SYSTEM MEMORY A

AT41 AY41 AU39 BB12 AY6 AT7 AJ5

AJ44 AT44 BA43 BC37 AW1 2 BC8 AU8 AM7 AJ43 AT43 BA44 BD37 AY12 BD8 AU9 AM8

BA21 BC24 BG24 BH24 BG25 BA24 BD24 BG27 BF25 AW2 4 BC21 BG26 BH26 BH17 AY25

M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7

M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6

M_A_DQS7 M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7

M_A_DM0

AM37

M_A_BS#0 16 M_A_BS#1 16 M_A_BS#2 16

M_A_RAS# 16 M_A_CAS# 16 M_A_WE# 16

M_A_DM[7..0] 16

M_A_DQS[7..0] 16

M_A_DQS#[7..0] 16

M_A_A[14..0] 16

M_B_DQ[63..0]17

M_B_DQ[63..0]

M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63

U1001E

AK47

SB_DQ_0

AH46

SB_DQ_1

AP47

SB_DQ_2

AP46

SB_DQ_3

AJ46

SB_DQ_4

AJ48

SB_DQ_5

AM48

SB_DQ_6

AP48

SB_DQ_7

AU47

SB_DQ_8

AU46

SB_DQ_9

BA48

SB_DQ_1 0

AY48

SB_DQ_1 1

AT47

SB_DQ_1 2

AR47

SB_DQ_1 3

BA47

SB_DQ_1 4

BC47

SB_DQ_1 5

BC46

SB_DQ_1 6

BC44

SB_DQ_1 7

BG43

SB_DQ_1 8

BF43

SB_DQ_1 9

BE45

SB_DQ_2 0

BC41

SB_DQ_2 1

BF40

SB_DQ_2 2

BF41

SB_DQ_2 3

BG38

SB_DQ_2 4

BF38

SB_DQ_2 5

BH35

SB_DQ_2 6

BG35

SB_DQ_2 7

BH40

SB_DQ_2 8

BG39

SB_DQ_2 9

BG34

SB_DQ_3 0

BH34

SB_DQ_3 1

BH14

SB_DQ_3 2

BG12

SB_DQ_3 3

BH11

SB_DQ_3 4

BG8

SB_DQ_3 5

BH12

SB_DQ_3 6

BF11

SB_DQ_3 7

BF8

SB_DQ_3 8

BG7

SB_DQ_3 9

BC5

SB_DQ_4 0

BC6

SB_DQ_4 1

AY3

SB_DQ_4 2

AY1

SB_DQ_4 3

BF6

SB_DQ_4 4

BF5

SB_DQ_4 5

BA1

SB_DQ_4 6

BD3

SB_DQ_4 7

AV2

SB_DQ_4 8

AU3

SB_DQ_4 9

AR3

SB_DQ_5 0

AN2

SB_DQ_5 1

AY2

SB_DQ_5 2

AV1

SB_DQ_5 3

AP3

SB_DQ_5 4

AR1

SB_DQ_5 5

AL1

SB_DQ_5 6

AL2

SB_DQ_5 7

AJ1

SB_DQ_5 8

AH1

SB_DQ_5 9

AM2

SB_DQ_6 0

AM3

SB_DQ_6 1

AH3

SB_DQ_6 2

AJ3

SB_DQ_6 3

CANTIGA-GM-GP-U-NF

5 OF 10

BC16

SB_BS_0

BB17

SB_BS_1

BB33

SB_BS_2

AU17

SB_RAS#

BG16

SB_CAS#

BF14

SB_W E#

SB_DM_0 SB_DM_1 SB_DM_2 SB_DM_3 SB_DM_4 SB_DM_5 SB_DM_6 SB_DM_7

SB_DQS_ 0 SB_DQS_ 1 SB_DQS_ 2 SB_DQS_ 3 SB_DQS_ 4 SB_DQS_ 5 SB_DQS_ 6

SB_DQS_ 7 SB_DQS# _0 SB_DQS# _1 SB_DQS# _2 SB_DQS# _3 SB_DQS# _4 SB_DQS# _5 SB_DQS# _6 SB_DQS# _7

SB_MA_0 SB_MA_1 SB_MA_2 SB_MA_3 SB_MA_4 SB_MA_5 SB_MA_6 SB_MA_7 SB_MA_8

SB_MA_9 SB_MA_1 0 SB_MA_1 1 SB_MA_1 2 SB_MA_1 3 SB_MA_1 4

DDR SYSTEM MEMORY B

AY47 BD40 BF35 BG11 BA3 AP1 AK2

AL47 AV48 BG41 BG37 BH9 BB2 AU1 AN6 AL46 AV47 BH41 BH37 BG9 BC2 AT2 AN5

AV17 BA25 BC25 AU25 AW2 5 BB28 AU28 AW2 8 AT33 BD33 BB16 AW3 3 AY33 BH15 AU33

M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7

M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7 M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14

M_B_DM0

AM47

M_B_DM[7..0]

M_B_DQS[7..0]

M_B_DQS#[7..0]

M_B_A[14..0]

M_B_BS#0 17 M_B_BS#1 17 M_B_BS#2 17

M_B_RAS# 17 M_B_CAS# 17 M_B_WE# 17

M_B_DM[7..0] 17

M_B_DQS[7..0] 17

M_B_DQS#[7..0] 17

M_B_A[14..0] 17

Alba UMA

A

Alba UMA

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Custom

Date: Sheet of

Cantiga-DDR(3/6)

Taipei Hsien 221, Taiwan, R.O.C.

Alba UMA

12 61Monday, April 06, 2009

-1

5

4

3

2

1

SSID = MCH

9 OF 10

U1001I

AU48

VSS

AR48

VSS

AL48

VSS

BB47

VSS

AW47

VSS

AN47

VSS

AJ47

VSS

AF47

VSS

AD47

VSS

AB47

VSS

Y47

VSS

T47

VSS

N47

D D

C C

B B

VSS

L47

VSS

G47

VSS

BD46

VSS

BA46

VSS

AY46

VSS

AV46

VSS

AR46

VSS

AM46

VSS

V46

VSS

R46

VSS

P46

VSS

H46

VSS

F46

VSS

BF44

VSS

AH44

VSS

AD44

VSS

AA44

VSS

Y44

VSS

U44

VSS

T44

VSS

M44

VSS

F44

VSS

BC43

VSS

AV43

VSS

AU43

VSS

AM43

VSS

J43

VSS

C43

VSS

BG42

VSS

AY42

VSS

AT42

VSS

AN42

VSS

AJ42

VSS

AE42

VSS

N42

VSS

L42

VSS

BD41

VSS

AU41

VSS

AM41

VSS

AH41

VSS

AD41

VSS

AA41

VSS

Y41

VSS

U41

VSS

T41

VSS

M41

VSS

G41

VSS

B41

VSS

BG40

VSS

BB40

VSS

AV40

VSS

AN40

VSS

H40

VSS

E40

VSS

AT39

VSS

AM39

VSS

AJ39

VSS

AE39

VSS

N39

VSS

L39

VSS

B39

VSS

BH38

VSS

BC38

VSS

BA38

VSS

AU38

VSS

AH38

VSS

AD38

VSS

AA38

VSS

Y38

VSS

U38

VSS

T38

VSS

J38

VSS

F38

VSS

C38

VSS

BF37

VSS

BB37

VSS

AW37

VSS

AT37

VSS

AN37

VSS

AJ37

VSS

H37

VSS

C37

VSS

BG36

VSS

BD36

VSS

AK15

VSS

AU36

VSS

CANTIGA-GM-GP-U-NF

VSS

9 OF 10

U1001J

BG21

AM36

VSS

AE36

VSS

P36

VSS

L36

VSS

J36

VSS

F36

VSS

B36

VSS

AH35

VSS

AA35

VSS

Y35

VSS

U35

VSS

T35

VSS

BF34

VSS

AM34

VSS

AJ34

VSS

AF34

VSS

AE34

VSS

W34

VSS

B34

VSS

A34

VSS

BG33

VSS

BC33

VSS

BA33

VSS

AV33

VSS

AR33

VSS

AL33

VSS

AH33

VSS

AB33

VSS

P33

VSS

L33

VSS

H33

VSS

N32

VSS

K32

VSS

F32

VSS

C32

VSS

A31

VSS

AN29

VSS

T29

VSS

N29

VSS

K29

VSS

H29

VSS

F29

VSS

A29

VSS

BG28

VSS

BD28

VSS

BA28

VSS

AV28

VSS

AT28

VSS

AR28

VSS

AJ28

VSS

AG28

VSS

AE28

VSS

AB28

VSS

Y28

VSS

P28

VSS

K28

VSS

H28

VSS

F28

VSS

C28

VSS

BF26

VSS

AH26

VSS

AF26

VSS

AB26

VSS

AA26

VSS

C26

VSS

B26

VSS

BH25

VSS

BD25

VSS

BB25

VSS

AV25

VSS

AR25

VSS

AJ25

VSS

AC25

VSS

Y25

VSS

N25

VSS

L25

VSS

J25

VSS

G25

VSS

E25

VSS

BF24

VSS

AD12

VSS

AY24

VSS

AT24

VSS

AJ24

VSS

AH24

VSS

AF24

VSS

AB24

VSS

R24

VSS

L24

VSS

K24

VSS

J24

VSS

G24

VSS

F24

VSS

E24

VSS

BH23

VSS

AG23

VSS

Y23

VSS

B23

VSS

A23

VSS

AJ6

VSS

L12

VSS

AW21

VSS

AU21

VSS

AP21

VSS

AN21

VSS

AH21

VSS

AF21

VSS

AB21

VSS

R21

VSS

M21

VSS

J21

VSS

G21

VSS

BC20

VSS

BA20

VSS

AW20

VSS

AT20

VSS

AJ20

VSS

AG20

VSS

Y20

VSS

N20

VSS

K20

VSS

F20

VSS

C20

VSS

A20

VSS

BG19

VSS

A18

VSS

BG17

VSS

BC17

VSS

AW17

VSS

AT17

VSS

R17

VSS

M17

VSS

H17

VSS

C17

VSS

BA16

VSS

AU16

VSS

AN16

VSS

N16

VSS

K16

VSS

G16

VSS

E16

VSS

BG15

VSS

AC15

VSS

W15

VSS

A15

VSS

BG14

VSS

AA14

VSS

C14

VSS

BG13

VSS

BC13

VSS

BA13

VSS

AN13

VSS

AJ13

VSS

AE13

VSS

N13

VSS

L13

VSS

G13

VSS

E13

VSS

BF12

VSS

AV12

VSS

AT12

VSS

AM12

VSS

AA12

VSS

J12

VSS

A12

VSS

BD11

VSS

BB11

VSS

AY11

VSS

AN11

VSS

AH11

VSS

Y11

VSS

N11

VSS

G11

VSS

C11

VSS

BG10

VSS

AV10

VSS

AT10

VSS

AJ10

VSS

AE10

VSS

AA10

VSS

M10

VSS

BF9

VSS

BC9

VSS

AN9

VSS

AM9

VSS

AD9

VSS

G9

VSS

B9

VSS

BH8

VSS

BB8

VSS

AV8

VSS

AT8

VSS

CANTIGA-GM-GP-U-NF

VSS

10 OF 10

AH8

VSS

Y8

VSS

L8

VSS

E8

VSS

B8

VSS

AY7

VSS

AU7

VSS

AN7

VSS

AJ7

VSS

AE7

VSS

AA7

VSS

N7

VSS

J7

VSS

BG6

VSS

BD6

VSS

AV6

VSS

AT6

VSS

AM6

VSS

M6

VSS

C6

VSS

BA5

VSS

AH5

VSS

AD5

VSS

Y5

VSS

L5

VSS

J5

VSS

H5

VSS

F5

VSS

BE4

VSS

BC3

VSS

AV3

VSS

AL3

VSS

R3

VSS

P3

VSS

F3

VSS

BA2

VSS

AW2

VSS

AU2

VSS

AR2

VSS

AP2

VSS

AJ2

VSS

AH2

VSS

AF2

VSS

AE2

VSS

AD2

VSS

AC2

VSS

Y2

VSS

M2

VSS

K2

VSS

AM1

VSS

AA1

VSS

P1

VSS

H1

VSS

U24

VSS

U28

VSS

U25

VSS

U29

VSS

AF32

VSS_NCTF

AB32

VSS_NCTF

V32

VSS_NCTF

AJ30

VSS_NCTF

AM29

VSS_NCTF

AF29

VSS_NCTF

AB29

VSS_NCTF

U26

VSS_NCTF

U23

VSS_NCTF

AL20

VSS_NCTF

V20

VSS_NCTF

AC19

VSS_NCTF

AL17

VSS_NCTF

AJ17

VSS_NCTF

VSS NCTF

VSS SCB

NC

VSS_NCTF VSS_NCTF

VSS_SCB VSS_SCB VSS_SCB VSS_SCB VSS_SCB

NC#E1 NC#D2 NC#C3

NC#B4

NC#A5

NC#A6

NC#A43 NC#A44 NC#B45 NC#C46 NC#D47 NC#B47 NC#A46

NC#F48 NC#E48 NC#C48 NC#B48

AA17 U17

BH48 BH1 A48 C1 A3

E1 D2 C3 B4 A5 A6 A43 A44 B45 C46 D47 B47 A46 F48 E48 C48 B48

GMCH_GND1 GMCH_GND2 GMCH_GND3 GMCH_GND4

TP1303TP1303 TP1302TP1302 TP1304TP1304 TP1301TP1301

NCTF PIN

LDDC_CLK41 LDDC_DATA41

+3.3V_RUN

23

GMCH_HSYNC42

GMCH_VSYNC42

1

RN1302

RN1302 SRN2K2J-1-GP

SRN2K2J-1-GP

4

DDC_CLK_CON46

LBKLT_CTL41 GMCH_BL_ON26

+3.3V_RUN

M_BLUE42

M_GREEN42

M_RED42

4

LCDVDD_EN41

1 2

R1303 2K4R2F-GPR1303 2K4R2F-GP

VGA_TXACLK-41 VGA_TXACLK+41 VGA_TXBCLK-41 VGA_TXBCLK+41

VGA_TXAOUT0-41 VGA_TXAOUT1-41 VGA_TXAOUT2-41

VGA_TXAOUT0+41 VGA_TXAOUT1+41 VGA_TXAOUT2+41

VGA_TXBOUT0-41 VGA_TXBOUT1-41 VGA_TXBOUT2-41

VGA_TXBOUT0+41 VGA_TXBOUT1+41 VGA_TXBOUT2+41

R1304 75R2F-2-GPR1304 75R2F-2-GP

1 2

R1305 75R2F-2-GPR1305 75R2F-2-GP

1 2

R1306 75R2F-2-GPR1306 75R2F-2-GP

1 2

R1310 33R2J-2-GPR1310 33R2J-2-GP

1 2

R1311 1K02R2F-1-GPR1311 1K02R2F-1-GP

1 2

R1312 33R2J-2-GPR1312 33R2J-2-GP

1 2

GMCH_DDCDATA

RN1303

L_CTRL_CLK

1

L_CTRL_DATA

23

TP225TP225

LDDC_CLK LDDC_DATA

LIBG

TV_DACA TV_DACB TV_DACC

SRN10KJ-5-GP

UMA-SA

R1307 150R2F-1-GPR1307 150R2F-1-GP

1 2

R1308 150R2F-1-GPR1308 150R2F-1-GP

1 2

R1309 150R2F-1-GPR1309 150R2F-1-GP

1 2

GMCH_DDCCLK GMCH_DDCDATA

GMCH_HS

CRT_IREF

GMCH_VS

CRT_IREF routing Trace width use 20 mil.

LVDS_VBG

1

M_BLUE

M_GREEN

M_RED

+3.3V_RUN

Q1301

5

6

2N7002DW-7F-GP

U1001C

L32

L_BKLT_CTRL

G32

L_BKLT_EN

M32

L_CTRL_CLK

M33

L_CTRL_DATA

K33

L_DDC_CLK

J33

L_DDC_DATA

M29

L_VDD_EN

C44

LVDS_IBG

B43

LVDS_VBG

E37

LVDS_VREFH

E38

LVDS_VREFL

C41

LVDSA_CLK#

C40

LVDSA_CLK

B37

LVDSB_CLK#

A37

LVDSB_CLK

H47

LVDSA_DATA#_0

E46

LVDSA_DATA#_1

G40

LVDSA_DATA#_2

A40

LVDSA_DATA#_3

H48

LVDSA_DATA_0

D45

LVDSA_DATA_1

F40

LVDSA_DATA_2

B40

LVDSA_DATA_3

A41

LVDSB_DATA#_0

H38

LVDSB_DATA#_1

G37

LVDSB_DATA#_2

J37

LVDSB_DATA#_3

B42

LVDSB_DATA_0

G38

LVDSB_DATA_1

F37

LVDSB_DATA_2

K37

LVDSB_DATA_3

F25

TVA_DAC

H25

TVB_DAC

K25

TVC_DAC

H24

TV_RTN

C31

TV_DCONSEL_0

E32

TV_DCONSEL_1

E28

CRT_BLUE

G28

CRT_GREEN

J28

CRT_RED

G29

CRT_IRTN

H32

CRT_DDC_CLK

J32

CRT_DDC_DATA

J29

CRT_HSYNC

E29

CRT_TVO_IREF

L29

CRT_VSYNC

CANTIGA-GM-GP-U-NF

34

2

1

RN1301

4

SRN2K2J-1-GP

DDC_DATA_CON

GMCH_DDCCLKDDC_CLK_CON

5V @ ext. CRT side

23 1

+3.3V_RUN

LVDS

TV VGA

PCI-EXPRESS GRAPHICS

DDC_DATA_CON 46

3 OF 10

PEG_COMPI

PEG_COMPO

PEG_RX#_0 PEG_RX#_1 PEG_RX#_2 PEG_RX#_3 PEG_RX#_4 PEG_RX#_5 PEG_RX#_6 PEG_RX#_7 PEG_RX#_8

PEG_RX#_9 PEG_RX#_10 PEG_RX#_11 PEG_RX#_12 PEG_RX#_13 PEG_RX#_14 PEG_RX#_15

PEG_RX_0 PEG_RX_1 PEG_RX_2 PEG_RX_3 PEG_RX_4 PEG_RX_5 PEG_RX_6 PEG_RX_7 PEG_RX_8

PEG_RX_9 PEG_RX_10 PEG_RX_11 PEG_RX_12 PEG_RX_13 PEG_RX_14 PEG_RX_15

PEG_TX#_0 PEG_TX#_1 PEG_TX#_2 PEG_TX#_3 PEG_TX#_4 PEG_TX#_5 PEG_TX#_6 PEG_TX#_7 PEG_TX#_8

PEG_TX#_9 PEG_TX#_10 PEG_TX#_11 PEG_TX#_12 PEG_TX#_13 PEG_TX#_14 PEG_TX#_15

PEG_TX_0 PEG_TX_1 PEG_TX_2 PEG_TX_3 PEG_TX_4 PEG_TX_5 PEG_TX_6 PEG_TX_7 PEG_TX_8

PEG_TX_9 PEG_TX_10 PEG_TX_11 PEG_TX_12 PEG_TX_13 PEG_TX_14 PEG_TX_15

T37 T36

H44 J46 L44 L40 N41 P48 N44 T43 U43 Y43 Y48 Y36 AA43 AD37 AC47 AD39

H43 J44 L43 L41 N40 P47 N43 T42 U42 Y42 W47 Y37 AA42 AD36 AC48 AD40

J41 M46 M47 M40 M42 R48 N38 T40 U37 U40 Y40 AA46 AA37 AA40 AD43 AC46

J42 L46 M48 M39 M43 R47 N37 T39 U36 U39 Y39 Y46 AA36 AA39 AD42 AD46

PEG_CMP

+1.05V_VCCP

1 2

R1301

R1301 49D9R2F-GP

49D9R2F-GP

Place R1301 close to MCH within 500 mils.

A A

Alba UMA

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Cantiga-GND/LVDS/VGA(6/6)

Size Document Number Rev

C

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

Alba UMA

-1

13 61Monday, April 06, 2009

-1

D

C

B

A

SSID = MCH

D

Close to (G)MCH

C

+1.05V_VCCP

B

12

A

5

12

C1412

SC1U6D3V2KX-GP

SC22U6D3V5MX-2GP

C1411

C1414

12

On the edge

12

C1421

C1420

SCD1U16V2KX-3GP

SC4D7U6D3V5KX-3GP

SC22U6D3V5MX-2GP

C1416

TP1402TP1402 TP1401TP1401

+1.8V_SUS

SCD1U10V2KX-4GP

For UMA

VCC_AXG_SENSE VSS_AXG_SENSE

U1001G

AP33

VCC_SM

AN33

VCC_SM

BH32

VCC_SM

BG32

VCC_SM

BF32

VCC_SM

BD32

VCC_SM

BC32

VCC_SM

BB32

VCC_SM

BA32

VCC_SM

AY32

VCC_SM

AW3 2

VCC_SM

AV32

VCC_SM

AU32

VCC_SM

AT32

VCC_SM

AR32

VCC_SM

AP32

VCC_SM

AN32

VCC_SM

BH31

VCC_SM

BG31

VCC_SM

BF31

VCC_SM

BG30

VCC_SM

BH29

VCC_SM

BG29

VCC_SM

BF29

VCC_SM

BD29

VCC_SM

BC29

VCC_SM

BB29

VCC_SM

BA29

VCC_SM

AY29

VCC_SM

AW2 9

VCC_SM

AV29

VCC_SM

AU29

VCC_SM

AT29

VCC_SM

AR29

VCC_SM

AP29

VCC_SM

BA36

VCC_SM/N C

BB24

VCC_SM/N C

BD16

VCC_SM/N C

BB21

VCC_SM/N C

AW1 6

VCC_SM/N C

AW1 3

VCC_SM/N C

AT13

VCC_SM/N C

Y26

VCC_AXG

AE25

VCC_AXG

AB25

VCC_AXG

AA25

VCC_AXG

AE24

VCC_AXG

AC24

VCC_AXG

AA24

VCC_AXG

Y24

VCC_AXG

AE23

VCC_AXG

AC23

VCC_AXG

AB23

VCC_AXG

AA23

VCC_AXG

AJ21

VCC_AXG

AG21

VCC_AXG

AE21

VCC_AXG

AC21

VCC_AXG

AA21

VCC_AXG

Y21

VCC_AXG

AH20

VCC_AXG

AF20

VCC_AXG

AE20

VCC_AXG

AC20

VCC_AXG

AB20

VCC_AXG

AA20

VCC_AXG

T17

VCC_AXG

T16

VCC_AXG

AM15

VCC_AXG

AL15

VCC_AXG

AE15

VCC_AXG

AJ15

VCC_AXG

AH15

VCC_AXG

AG15

VCC_AXG

AF15

VCC_AXG

AB15

VCC_AXG

AA15

VCC_AXG

Y15

VCC_AXG

V15

VCC_AXG

U15

VCC_AXG

AN14

VCC_AXG

AM14

VCC_AXG

U14

VCC_AXG

T14

VCC_AXG

AJ14

VCC_AXG _SENSE

AH14

VSS_AXG _SENSE

CANTIGA-GM-GP-U-NF

4

7 OF 10

VCC_AXG _NCTF VCC_AXG _NCTF VCC_AXG _NCTF VCC_AXG _NCTF VCC_AXG _NCTF VCC_AXG _NCTF VCC_AXG _NCTF VCC_AXG _NCTF VCC_AXG _NCTF VCC_AXG _NCTF VCC_AXG _NCTF VCC_AXG _NCTF VCC_AXG _NCTF

POWER

VCC_AXG _NCTF VCC_AXG _NCTF VCC_AXG _NCTF VCC_AXG _NCTF VCC_AXG _NCTF VCC_AXG _NCTF VCC_AXG _NCTF VCC_AXG _NCTF VCC_AXG _NCTF VCC_AXG _NCTF VCC_AXG _NCTF VCC_AXG _NCTF VCC_AXG _NCTF VCC_AXG _NCTF VCC_AXG _NCTF VCC_AXG _NCTF VCC_AXG _NCTF VCC_AXG _NCTF VCC_AXG _NCTF VCC_AXG _NCTF VCC_AXG _NCTF VCC_AXG _NCTF VCC_AXG _NCTF VCC_AXG _NCTF VCC_AXG _NCTF VCC_AXG _NCTF VCC_AXG _NCTF VCC_AXG _NCTF VCC_AXG _NCTF VCC_AXG _NCTF VCC_AXG _NCTF VCC_AXG _NCTF VCC_AXG _NCTF VCC_AXG _NCTF VCC_AXG _NCTF VCC_AXG _NCTF VCC_AXG _NCTF

VCC GFX NCTF

VCC_AXG _NCTF VCC_AXG _NCTF VCC_AXG _NCTF VCC_AXG _NCTF VCC_AXG _NCTF VCC_AXG _NCTF VCC_AXG _NCTF VCC_AXG _NCTF VCC_AXG _NCTF VCC_AXG _NCTF

3000mA

VCC SMVCC GFX

8700mA

VCC_SM_ LF VCC_SM_ LF VCC_SM_ LF VCC_SM_ LF VCC_SM_ LF VCC_SM_ LF VCC_SM_ LF

VCC SM LF

W28 V28 W26 V26 W25 V25 W24 V24 W23 V23 AM21 AL21 AK21 W21 V21 U21 AM20 AK20 W20 U20 AM19 AL19 AK19 AJ19 AH19 AG19 AF19 AE19 AB19 AA19 Y19 W19 V19 U19 AM17 AK17 AH17 AG17 AF17 AE17 AC17 AB17 Y17 W17 V17 AM16 AL16 AK16 AJ16 AH16 AG16 AF16 AE16 AC16 AB16 AA16 Y16 W16 V16 U16

AV44 BA37 AM40 AV21 AY5 AM10 BB13

12

SM_LF1_GMCH SM_LF2_GMCH SM_LF3_GMCH SM_LF4_GMCH SM_LF5_GMCH SM_LF6_GMCH SM_LF7_GMCH

TC1401

12

ST220U2D5VBM-2GP

C1406

Coupling CAP

12

C1415

SCD1U16V2KX-3GP

12

SCD1U10V2KX-4GP

12

For UMA

C1404

SCD1U10V2KX-4GP

3

+1.05V_VCCP

12

C1413

SC10U10V5KX-2GP

+1.05V_VCCP

12

C1419

C1418

C1417

SC22U6D3V5MX-2GP

C1418

SC1U10V3KX-3GP

SCD1U16V2KX-3GP

Coupling CAP

Supply Signal Group

+1.05V_VCCP

VCCA_SM

+1.05V_VCCP

VCCA_SM_CK 26mA

VCCA_HPLL 24mA

+1.05V_VCCP

+1.05V_VCCP 50mA

VCCD_PEG_PLL

VCC_AXF+1.05V_VCCP

+1.5V_RUN VCCD_TVDAC 35mA

+1.8V_SUS

+1.8V_SUS 124mA

VCC_SM_CK

+1.5V_RUN VCCA_PEG_BG 414uA

+3.3V_RUN VCC_HV 105.3mA

12

C1401

SCD22U10V2KX-1GP

1

C1407

C1409

2

SCD22U10V2KX-1GP

SCD47U6D3V2KX-GP

12

C1410

C1408

SC1U10V3KX-3GP

12

C1424

SC22U6D3V5MX-2GP

12

C1402

SCD1U10V2KX-4GP

12

C1423

SCD1U16V2KX-3GP

Imax

3060mAVCC+1.05V_VCCP

852mAVTT

1782mAVCC_PEG

456mAVCC_DMI

720mA+1.05V_VCCP

139.2mAVCCA_MPLL

157.2mAVCCD_HPLL

50mAVCCA_PEG_PLL

321.35mA

3000mAVCC_SM

2

C1405

SC1U6D3V2KX-GP

C1422

SCD1U16V2KX-3GP

For UMA

1

6 OF 10

U1001F

AG34

VCC

AC34

VCC

AB34

VCC

12

AA34

VCC

Y34

VCC

V34

C1403

SC1U6D3V2KX-GP

C1426

SCD1U16V2KX-3GP

VCC

U34

VCC

AM33

VCC

AK33

VCC

AJ33

VCC

AG33

VCC

AF33

VCC

AE33 AC33 AA33

AH28 AF28 AC28 AA28

AG26 AE26 AC26 AH25 AG25 AF25 AG24

AH23 AF23

3060mA

VCC VCC VCC

Y33

VCC

W33

VCC

V33

VCC

U33

VCC VCC VCC VCC VCC

AJ26

VCC VCC VCC VCC VCC VCC VCC VCC

AJ23

VCC VCC VCC

T32

VCC

CANTIGA-GM-GP-U-NF

Alba UMA

Title

Size Document Number Rev

Custom

Date: Sheet of

VCC CORE

POWER

Cantiga-Power(4/6)

6 OF 10

+1.05V_VCCP

AM32

VCC_NCT F

AL32

VCC_NCT F

AK32

VCC_NCT F

AJ32

VCC_NCT F

AH32

VCC_NCT F

AG32

VCC_NCT F

AE32

VCC_NCT F

AC32

VCC_NCT F

AA32

VCC_NCT F

Y32

VCC_NCT F

W32

VCC_NCT F

U32

VCC_NCT F

AM30

VCC_NCT F

AL30

VCC_NCT F

AK30

VCC_NCT F

AH30

VCC_NCT F

AG30

VCC_NCT F

AF30

VCC_NCT F

AE30

VCC_NCT F

AC30

VCC_NCT F

AB30

VCC_NCT F

AA30

VCC_NCT F

Y30

VCC_NCT F

W30

VCC_NCT F

V30

VCC_NCT F

U30

VCC_NCT F

AL29

VCC_NCT F

AK29

VCC_NCT F

AJ29

VCC_NCT F

AH29

VCC_NCT F

AG29

VCC_NCT F VCC_NCT F VCC_NCT F VCC_NCT F VCC_NCT F VCC_NCT F VCC_NCT F VCC_NCT F VCC_NCT F VCC_NCT F VCC_NCT F VCC_NCT F VCC_NCT F VCC_NCT F

AE29 AC29 AA29 Y29 W29 V29 AL28 AK28 AL26 AK26 AK25 AK24 AK23

14 61Monday, April 06, 2009

VCC NCTF

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Alba UMA

-1

D

C

B

A

+5V_RUN

D

C

B

A

+1.05V_VCCP

12

DY

C1548

Do Not Stuff

BLM18PG121SN1D-GP

+1.05V_VCCP

BLM18BB221SN1D-GP

220ohm 100MHz

+1.5V_RUN

12

C1543

SCD1U10V2KX-4GP

+3.3V_RUN

U1502

1

IN

2

GND EN3NR/FB

Do Not Stuff

L1502

1 2

L1505

1 2

X02-0219

L1504

1 2

12

+1.5V_RUN

C1544

SCD01U16V2KX-3GP

5

R1518 0R3J-0-U-GPR1518 0R3J-0-U-GP

1 2

OUT

DY

IND-10UH-144-GP

L1503

L1523BLM18PG121SN1D-GP L1523BLM18PG121SN1D-GP

C1536

SC10U6D3V5KX-1GP

1D05V_RUN_PEGPLL

12

C1531

SCD1U10V2KX-4GP

L1501

1 2

BLM18PG181SN1D-GP

+3.3V_CRT_LDO

5

4

12

C1537

SCD1U10V2KX-4GP

12

R1507

R1507 1R2F-GP

1R2F-GP

VCCA_PEG_PLL_L

12

C1535

12

SC10U6D3V5MX-3GP

12

X01-1127

+3.3V_CRT_LDO

1 2

Do Not Stuff

12

C1549

C1549 SC2D2U10V3KX-1GP

SC2D2U10V3KX-1GP

12

C1538

SCD1U10V2KX-4GP

SC10U6D3V5KX-1GP

+1.5V_RUN

A00-0402

+1.05V_VCCP

A00-0402

12

C1514

C1516

SCD01U16V2KX-3GP

A00-0402

R1514

12

C1539

R1501

1 2

Do Not Stuff

+1.05V_VCCP

A00-0402

+1.05V_VCCP

SCD1U10V2KX-4GP

C1523

12

1 2

SC4D7U6D3V3KX-GP

Do Not Stuff

1 2

4

12

C1550

SCD01U16V2KX-3GP

12

C1522

C1521

SCD1U10V2KX-4GP

SC10U6D3V5KX-1GP

R1512

C1530 SCD1U10V2KX-4GPC1530 SCD1U10V2KX-4GP

12

TC1502

Do Not Stuff

R1504

1 2

R1513

Do Not Stuff

1D05V_RUN_PEGPLL

C1520

SC1U6D3V2KX-GP

DY

12

DY

Do Not Stuff

12

C1551

SCD1U10V2KX-4GP

12

SCD1U10V2KX-4GP

12

C1504

Do Not Stuff

C1511

SC22U6D3V5MX-2GP

+3.3V_TV_DAC+3.3V_CRT_LDO

12

C1552

SCD01U16V2KX-3GP

12

C1519

1D05V_RUN_PEGPLL

12

C1503

SC22U6D3V5MX-2GP

12

DY

C1513

Do Not Stuff

12

DY

C1540

SCD1U10V2KX-4GP

A00-0402

12

C1529

SCD1U10V2KX-4GP

3D3V_CRTDAC_S0

12

C1553

SCD1U10V2KX-4GP

M_VCCA_DPLLA

M_VCCA_DPLLB

M_VCCA_HPLL

M_VCCA_MPLL

1D8V_TXLVDS

C1554

12

SC1KP50V2KX-1GP

VCCA_PEG_BG

1D05V_SM

12

C1507

SC4D7U6D3V3KX-GP

1D05V_SM_CK

12

C1515

SCD1U10V2KX-4GP

12

C1541

Do Not Stuff

1 2

R1516

Do Not Stuff

1D5VRUN_QDAC

+1.8V_SUS

C1545

3

2

1

SSID = MCH

+1.05V_VCCP

8 OF 10

AXF

VCC_SM_ CK VCC_SM_ CK VCC_SM_ CK VCC_SM_ CK

124mA

SM CK

VCC_TX_ LVDS

HV

PEG

DMI

VTTLF

8 OF 10

852mA

VTT

VCC_AXF VCC_AXF VCC_AXF

321.35mA

VCC_HV VCC_HV VCC_HV

105.3mA

VCC_PEG VCC_PEG VCC_PEG VCC_PEG VCC_PEG

1782mA

VCC_DMI VCC_DMI VCC_DMI VCC_DMI

456mA

VTTLF VTTLF VTTLF

VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT

U13 T13 U12 T12 U11 T11 U10 T10 U9 T9 U8 T8 U7 T7 U6 T6 U5 T5 V3 U3 V2 U2 T2 V1 U1

B22 B21 A21

BF21 BH20 BG20 BF20

K47

C35 B35 A35

V48 U48 V47 U47 U46

AH48 AF48 AH47 AG47

A8 L1 AB2

12

C1512

SCD1U16V2KX-3GP

1D05V_VCC_AXF

1D8V_VCC_SM_CK

1D8V_TXLVDS

VTTLF1 VTTLF2 VTTLF3

12

DY

1

2

12

C1502

SC1U10V3KX-3GP

+1.05V_VCCP

12

C1518

Do Not Stuff

1

C1524

2

SCD47U6D3V2KX-GP

C1505

SC1U10V3KX-3GP

1

3

BAT54-7-F-GP

C1527

SC1U10V3KX-3GP

C1508

SCD1U10V2KX-4GP

+1.05V_VCCP

C1532

SC4D7U6D3V5KX-3GP

C1501

SCD47U6D3V2KX-GP

12

C1509

SC1U10V3KX-3GP

12

C1534

SC1U10V3KX-3GP

1

C1525

2

SCD47U6D3V2KX-GP

12

DY

TC1501

EC1501

Do Not Stuff

SC1U10V3KX-3GP

D1501

2

R1509

1 2

0R3J-0-U-GP

12

C1526

DY

Do Not Stuff

A00-0402

R1502

1 2

Do Not Stuff

R1503

R1503 1R3F-GP

1R3F-GP

1 2

C1510

C1510 SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

1 2

A00-0402

1 2

12

C1546

SC1KP50V2KX-1GP

12

C1533

+1.05V_VCCP

SC4D7U6D3V5KX-3GP

12

C1517

C1517 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

Alba UMA

Title

Size Document Number Rev

Custom

Date: Sheet

Date: Sheet of

+3.3V_RUN

R1510

12

10R2J-2-GP

+1.05V_VCCP

+1.8V_SUS

R1517

Do Not Stuff

C1547

C1547 SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

Cantiga-Power/Filter(5/6)

+3.3V_RUN

12

C1528

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Alba UMA

SCD1U10V2KX-4GP

15 61Monday, April 06, 2009

-1

of

-1

U1001H

B27

VCCA_CR T_DAC

A26

VCCA_CR T_DAC

A25

VCCA_DA C_BG

B25

VSSA_DA C_BG

F47

VCCA_DP LLA

L48

VCCA_DP LLB

AD1

VCCA_HP LL

AE1

VCCA_MP LL

J48

VCCA_LV DS

J47

VSSA_LV DS

AD48

VCCA_PE G_BG

414uA

AA48

VCCA_PE G_PLL

AR20

VCCA_SM

AP20

VCCA_SM

AN20

VCCA_SM

AR17

VCCA_SM

AP17

C1506

SC1U10V3KX-3GP

12

SC1U6D3V2KX-GP

VCCA_SM

AN17

VCCA_SM

AT16

VCCA_SM

AR16

VCCA_SM

AP16

VCCA_SM

AP28

VCCA_SM _CK

AN28

VCCA_SM _CK

AP25

VCCA_SM _CK

AN25

VCCA_SM _CK

AN24

VCCA_SM _CK

AM28

VCCA_SM _CK_NCTF

AM26

VCCA_SM _CK_NCTF

AM25

VCCA_SM _CK_NCTF

AL25

VCCA_SM _CK_NCTF

AM24

VCCA_SM _CK_NCTF

AL24

VCCA_SM _CK_NCTF

AM23

VCCA_SM _CK_NCTF

AL23

VCCA_SM _CK_NCTF

B24

VCCA_TV _DAC

A24

VCCA_TV _DAC

A32

VCC_HDA

M25

VCCD_TV DAC

L28

VCCD_QD AC

AF1

VCCD_HP LL

AA47

VCCD_PE G_PLL

M38

VCCD_LV DS

L37

VCCD_LV DS

CANTIGA-GM-GP-U-NF

60.31mA

64.8mA

24mA

139.2mA

13.2mA

720mA

37.5mA

50mA

2mA

157.2mA

50mA

79mA

35mA

50mA

CRTPLLA PEGA SM

A LVDS

POWER

A CK

118.8mA

TV

HDA

D TV/CRT

LVDS

5

SSID = MEMORY

M_A_DQS#[7..0]12

D D

+1.8V_SUS

DY

12

C1620

SC1U10V3KX-3GP

12

DY

C1627

C1610

Do Not Stuff

SCD1U16V2KX-3GP

C C

+0.9V_DDR_VTT

B B

A A

M_A_DQ[63..0]12

M_A_DM[7..0]12

M_A_DQS[7..0]12

M_A_A[14..0]12

Layout Note: Place near SKT1

DY

12

DY

C1616

SC1U10V3KX-3GP

12

C1630

Do Not Stuff

12

DY

Do Not Stuff

C1619

SC1U10V3KX-3GP

Layout Note: Place one cap close to every 2 pullup resistors terminated to +0.9V_ DDR_VTT.

12

C1611

Do Not Stuff

5

Do Not Stuff

C1622

C1621

12

DY

C1608

C1605

Do Not Stuff

SCD1U16V2KX-3GP

Do Not Stuff

C1607

DY

C1606

SCD1U16V2KX-3GP

12

C1613

12

C1614

SCD1U16V2KX-3GP

12

SCD1U16V2KX-3GP

12

DY

Do Not Stuff

4

12

C1609

C1612

SC1U6D3V2KX-GP

SCD1U16V2KX-3GP

12

C1618

C1617

Do Not Stuff

SCD1U16V2KX-3GP

+V_DDR_MCH_REF

12

C1626

4

DY

3

DM1

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14

M_A_BS#212

M_A_BS#012 M_A_BS#112

12

Do Not Stuff

TC1601

12

C1628

C1629

C1615

SCD1U16V2KX-3GP

M_ODT011 M_ODT111

12

C1625

DY

Do Not Stuff

M_A_BS#2

M_A_BS#0 M_A_BS#1

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54

SCD1U16V2KX-3GP

M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63

M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7

M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7

M_ODT0 M_ODT1

102 101 100

105

116

107 106

123 125 135 137 124 126 134 136 141 143 151 153 140 142 152 154 157 159 173 175 158 160 174 176 179 181 189 191 180 182 192 194

129 146 167 186

131 148 169 188

114 119

202

3

DM1

A0 A1 A2

99

A3

98

A4

97

A5

94

A6

92

A7

93

A8

91

A9 A10/AP

90

A11

89

A12 A13

86

A14

84

A15

85

A16/BA2

BA0 BA1

5

DQ0

7

DQ1

17

DQ2

19

DQ3

4

DQ4

6

DQ5

14

DQ6

16

DQ7

23

DQ8

25

DQ9

35

DQ10

37

DQ11

20

DQ12

22

DQ13

36

DQ14

38

DQ15

43

DQ16

45

DQ17

55

DQ18

57

DQ19

44

DQ20

46

DQ21

56

DQ22

58

DQ23

61

DQ24

63

DQ25

73

DQ26

75

DQ27

62

DQ28

64

DQ29

74

DQ30

76

DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63

11

/DQS0

29

/DQS1

49

/DQS2

68

/DQS3 /DQS4 /DQS5 /DQS6 /DQS7

13

DQS0

31

DQS1

51

DQS2

70

DQS3 DQS4 DQS5 DQS6 DQS7

ODT0 ODT1

1

VREF

2

VSS

GND

DDR2-200P-10-U1

62.10017.881

VDDSPD

NC#50 NC#69 NC#83

NC#120

NC#163/T EST

Height 6.5mm

/RAS

/WE

/CAS

/CS0 /CS1

CKE0 CKE1

CK0

/CK0

CK1

/CK1

DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7

SDA

SCL

SA0 SA1

VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

GND

108 109 113

110 115

79 80

30 32

164 166

10 26 52 67 130 147 170 185

195 197

199

198 200

50 69 83 120 163

81 82 87 88 95 96 103 104 111 112 117 118

3 8 9 12 15 18 21 24 27 28 33 34 39 40 41 42 47 48 53 54 59 60 65 66 71 72 77 78 121 122 127 128 132 133 138 139 144 145 149 150 155 156 161 162 165 168 171 172 177 178 183 184 187 190 193 196

201

M_CLK_DDR0 M_CLK_DDR#0

M_CLK_DDR1 M_CLK_DDR#1

M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7

ICH_SMBDATA ICH_SMBCLK

+1.8V_SUS

2

M_A_RAS# 12

M_A_WE# 12

M_A_CAS# 12

M_CS0# 11

M_CS1# 11

M_CKE0 11

M_CKE1 11

M_CLK_DDR0 11 M_CLK_DDR#0 11

M_CLK_DDR1 11 M_CLK_DDR#1 11

ICH_SMBDATA 7,17,20,43 ICH_SMBCLK 7,17,20,43

ALBA X00

PM_EXTTS#0 11

2

1

put near connector

M_CLK_DDR0 M_CLK_DDR#0 M_CLK_DDR1 M_CLK_DDR#1

12

RN1606

RN1607

12

C1623

C1604

1

Do Not Stuff

M_CKE0

4

M_A_BS#2

M_A_A13

M_A_A3

8

M_A_A1

7

M_A_A10

6

M_A_BS#0

M_A_A7

1

M_A_A11

2

M_A_A14

3

M_CKE1

45

16 61Monday, April 06, 2009

12

C1603

Do Not Stuff

+3.3V_RUN

12

DY

C1602

C1601

Do Not Stuff

SCD1U16V2KX-3GP

Layout Note: Place these resistors close to DM1, all trace length Max=1.5".

+0.9V_DDR_VTT

RN1605

RN1601

Custom

RN1601

1

8

2

7

3

6

4 5

SRN56J-5-GP

RN1602

1

8

2

7

3

6

4 5

SRN56J-5-GP

RN1603

1

8

2

7

3

6

4 5

SRN56J-5-GP

RN1604

1

8

2

7

3

6

4 5

SRN56J-5-GP

DDRII-SODIMM SLOT1

M_A_A5 M_A_A8 M_A_A9 M_A_A12

M_ODT0 M_CS0# M_A_BS#1 M_A_RAS#

M_ODT1 M_CS1# M_A_CAS# M_A_WE#

M_A_A0 M_A_A2 M_A_A4 M_A_A6

Alba UMA

Title

Size Document Number Rev

Date: Sheet of

RN1605

1 2 3

SRN56J-4-GP

1 2

R1663 56R2J-4-GPR1663 56R2J-4-GP

1 2 3 4 5

SRN56J-5-GP

8 7 6

SRN56J-5-GP

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Alba UMA

12

C1624

Do Not Stuff

-1

5

SSID = MEMORY

M_B_DQS#[7..0]12

D D

+1.8V_SUS

C C

+0.9V_DDR_VTT

12

DY

B B

A A

12

C1716

SC1U10V3KX-3GP

12

C1726

C1729

Do Not Stuff

SCD1U16V2KX-3GP

M_B_DQ[63..0]12

M_B_DM[7..0]12

M_B_DQS[7..0]12

M_B_A[14..0]12

Layout Note: Place near SKT2

12

Do Not Stuff

DY

C1707

Layout Note: Place one cap close to every 2 pullup resistors terminated to +0.9V_DDR_VTT.

12

DY

C1728

SCD1U16V2KX-3GP

5

12

C1711

C1712

SC1U10V3KX-3GP

12

C1725

C1727

Do Not Stuff

SCD1U16V2KX-3GP

12

C1710

SC1U10V3KX-3GP

12

C1723

C1722

SCD1U16V2KX-3GP

12

DY

C1714

C1717

SCD1U10V2KX-4GP

12

C1706

SCD1U16V2KX-3GP

4

M_B_BS#212

M_B_BS#012 M_B_BS#112

12

Do Not Stuff

C1709

SC1U6D3V2KX-GP

12

DY

C1724

SCD1U16V2KX-3GP

4

DY

C1715

SC1U6D3V2KX-GP

12

C1713

Do Not Stuff

+V_DDR_MCH_REF

12

TC1701

DY

C1705

SCD1U16V2KX-3GP

12

Do Not Stuff

12

C1721

Do Not Stuff

C1730

C1730 SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

C1708

SCD1U16V2KX-3GP

M_ODT211

M_ODT311

12

C1720

C1720 SC2D2U10V3KX-1GP

SC2D2U10V3KX-1GP

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14

M_B_BS#2

M_B_BS#0 M_B_BS#1

M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63

M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7

M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7

M_ODT2 M_ODT3

3

DM2

102

A0

101

A1

100

A2

99

A3

98

A4

97

A5

94

A6

92

A7

93

A8

91

A9

105

A10/AP

90

A11

89

A12

116

A13

86

A14

84

A15

85

A16/BA2

107

BA0

106

BA1

5

DQ0

7

DQ1

17

DQ2

19

DQ3

4

DQ4

6

DQ5

14

DQ6

16

DQ7

23

DQ8

25

DQ9

35

DQ10

37

DQ11

20

DQ12

22

DQ13

36

DQ14

38

DQ15

43 45 55 57 44 46 56 58 61 63 73 75 62 64 74

76 123 125 135 137 124 126 134 136 141 143 151 153 140 142 152 154 157 159 173 175 158 160 174 176 179 181 189 191 180 182 192 194

11

29

49

68 129 146 167 186

13

31

51

70 131 148 169 188

114 119

1 2

NP1 NP2

3

DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41

Height 11mm

DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63

DQS0# DQS1# DQS2# DQS3# DQS4# DQS5# DQS6# DQS7#

DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7

ODT0 ODT1

VREF VSS

NP1 NP2

DDR2-200P-33-GP

NC#163/TEST

RAS#

WE#

CAS#

CS0# CS1#

CKE0 CKE1

CK0

CK0#

CK1

CK1#

DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7

SDA SCL

VDDSPD

SA0 SA1

NC#50 NC#69 NC#83

NC#120

VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

GND GND

108 109 113

110 115

79 80

30 32

164 166

10 26 52 67 130 147 170 185

195 197

199

198 200

50 69 83 120 163

81 82 87 88 95 96 103 104 111 112 117 118

3 8 9 12 15 18 21 24 27 28 33 34 39 40 41 42 47 48 53 54 59 60 65 66 71 72 77 78 121 122 127 128 132 133 138 139 144 145 149 150 155 156 161 162 165 168 171 172 177 178 183 184 187 190 193 196

201 202

M_CLK_DDR2 M_CLK_DDR#2

M_CLK_DDR3 M_CLK_DDR#3

M_B_DM0 M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7

ICH_SMBDATA

+1.8V_SUS

ICH_SMBCLK

ALBA X00

PM_EXTTS#1 11

2

M_B_RAS# 12

M_B_WE # 12

M_B_CAS# 12

M_CS2# 11

M_CS3# 11

M_CKE2 1 1

M_CKE3 1 1

M_CLK_DDR2 11 M_CLK_DDR#2 11

M_CLK_DDR3 11 M_CLK_DDR#3 11

ICH_SMBDATA 7,16,20,43 ICH_SMBCLK 7,16,20,4 3

+3.3V_RUN

1

put near connec tor

M_CLK_DDR2 M_CLK_DDR#2 M_CLK_DDR3 M_CLK_DDR#3

12

C1703

C1704

Do Not Stuff

+3.3V_RUN

12

DY

C1701

C1702

Do Not Stuff

SCD1U16V2KX-3GP

Layout Note: Place these resistors close to DM2, all trace length Max=1.5".

+0.9V_DDR_VTT

RN1701

M_B_A8 M_B_A5 M_B_A14 M_B_A1 M_B_A3

M_ODT3 M_CS3# M_B_A0

M_B_A10 M_B_BS#0 M_B_WE # M_B_CAS# M_B_A13

Alba UMA

Title

Size Document Num ber Rev

Custom

Date: Sheet of

RN1701

1

8

2

7

3

6

4 5

SRN56J-5-GP

RN1702

1

8

2

7

3

6

4 5

SRN56J-5-GP

RN1703

1

8

2

7

3

6

4 5

SRN56J-5-GP

DDRII-SODIMM SLOT2

RN1704

1 2 3 4 5

SRN56J-5-GP

RN1705

1 2 3 4 5

SRN56J-5-GP

RN1706

1 2 3 4 5

SRN56J-5-GP

RN1707

1 2 3 4 5

SRN56J-5-GP

Wistron Corporation

21F, 88, Sec.1, H sin Tai Wu Rd., Hsich ih,

21F, 88, Sec.1, H sin Tai Wu Rd., Hsich ih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Alba UMA

1

12

C1719

C1718

Do Not Stuff

M_CKE3

8 7

M_B_A11

6

M_B_A6

M_B_A7

8

M_B_A4

7

M_B_A2

6

M_B_BS#1

M_B_RAS#

8

M_ODT2

7

M_CS2#

6

M_B_A12

8

M_B_BS#2

7

M_B_A9

6

M_CKE2

17 61Monday, April 06, 2009

Do Not Stuff

-1

5

4

3

2

1

SSID = ICH

ICH_RTCX1

12

C1806

C1806 SC12P50V3JN-GP

SC12P50V3JN-GP

ICH_RTCRST#

21

G1801

G1801 Do Not Stuff

Do Not Stuff

ICH_SDIN_CODEC22

ICH_RTCX2

R1821

1 2

DY

Do Not Stuff

ACZ_SDATAOUT_R

SATA_ITXN0_HRXN0_C SATA_ITXP0_HRXP0_C

SATA_ITXN1_ORXN1_C SATA_ITXP1_ORXP1_C

ICH_RTCRST# SRTCRST# SM_INTRUDER#

ICH_INTVRMEN LAN100_SLP

GPIO56

GLAN_COMP

ACZ_BIT_CLK ACZ_SYNC_R ACZ_RST#_R

SATA_LED#

U1801A

C23

RTCX1

C24

RTCX2

A25

RTCRST#

F20

SRTCRST #

C22

INTRUDER#

B22

INTVRMEN

A22

LAN100_ SLP

E25

GLAN_CL K

C13

LAN_RST SYNC

F14

LAN_RXD 0

G13

LAN_RXD 1

D14

LAN_RXD 2

D13

LAN_TXD 0

D12

LAN_TXD 1

E13

LAN_TXD 2

B10

GLAN_DO CK#/GPIO56

B28

GLAN_CO MPI

B27

GLAN_CO MPO

AF6

HDA_BIT_C LK

AH4

HDA_SYNC

AE7

HDA_RST #

AF4

HDA_SDIN0

AG4

HDA_SDIN1

AH3

HDA_SDIN2

AE5

HDA_SDIN3

AG5

HDA_SDO UT

AG7

HDA_DOC K_EN#/GPIO33

AE8

HDA_DOC K_RST#/GPIO34

AG8

SATALED #

AJ16

SATA0RX N

AH16

SATA0RX P

AF17

SATA0TX N

AG17

SATA0TX P

AH13

SATA1RX N

AJ13

SATA1RX P

AG14

SATA1TX N

AF14

SATA1TX P

ICH9M-GP-NF

1 OF 6

RTCLAN / GLAN

LPCCPU

RTCLAN / GLAN

LPCCPU

IHDA

SATA

FWH 0/LAD0 FWH 1/LAD1 FWH 2/LAD2 FWH 3/LAD3

FWH 4/LFRAME#

LDRQ0#

LDRQ1#/G PIO23

A20GATE

A20M#

DPRSTP#

DPSLP#

FERR#

CPUPW RGD

IGNNE#

INIT#

INTR

RCIN#

SMI#

STPCLK#

THRMTRIP#

PECI

SATA4RX N SATA4RX P

SATA4TX N SATA4TX P

SATA5RX N SATA5RX P

SATA5TX N SATA5TX P

SATA_CL KN SATA_CL KP

SATARBIAS #

SATARBIAS

NMI

LPC_LAD0

K5

LPC_LAD1

K4

LPC_LAD2

L6

LPC_LAD3

K2

K3

J3 J1

N7 AJ27

H_DPRSTP#

AJ25 AE23

H_FERR#_R

AJ26

AD22

AF25

AE22 AG25 L3

AF23 AF24

AH27

H_THERMTRIP_R

AG26

AG27

Placed Within 2" from SB.

AH11 AJ11 AG12 AF12

AH9 AJ9 AE10 AF10

AH18 AJ18

SATARBIAS

AJ7 AH7

Place within 500 mils from SB.

R1812 10MR2J-L-GPR1812 10MR2J-L-GP

1 2

X1801

1

4

D D

SC12P50V3JN-GP

X02-0224 X02-0224

C C

EC1801

+1.5V_RUN

12

DY

SATA_IRXN0_HTXN0_C44 SATA_IRXP0_HTXP0_C44

SATA_ITXN0_HRXN044 SATA_ITXP0_HRXP044

SATA_IRXN1_OTXN1_C44 SATA_IRXP1_OTXP1_C44

SATA_ITXN1_ORXN144 SATA_ITXP1_ORXP144

X01-1204

ICH_AZ_CODEC_BITCLK22 ICH_AZ_CODEC_SYNC22 ICH_AZ_CODEC_RST#22

ICH_SDOUT_CODEC22

Do Not Stuff

Lay Out Close U1801

HDD

B B

ODD

12

C1807

X-32D768KHZ-38GPU

+RTC_CELL

R1814

1 2

20KR2F-L-GP

C1801

SC1U10V3KX-3GP

R1815

1 2

20KR2F-L-GP

Place within 500 mil of SB.

R1811 24D9R2F-L-GPR1811 24D9R2F-L-GP

1 2

R1822 33R2J-2-GPR1822 33R2J-2-GP R1823 33R2J-2-GPR1823 33R2J-2-GP R1824 33R2J-2-GPR1824 33R2J-2-GP R1825 33R2J-2-GPR1825 33R2J-2-GP

12

EC1802

DY

Do Not Stuff

12 12 12 12

C1802 SCD01U50V2KX-1GPC1802 SCD01U50V2KX-1GP C1803 SCD01U50V2KX-1GPC1803 SCD01U50V2KX-1GP

C1804 SCD01U50V2KX-1GPC1804 SCD01U50V2KX-1GP C1805 SCD01U50V2KX-1GPC1805 SCD01U50V2KX-1GP

23

12

1 2 1 2

C1808

C1808 SC1U10V3KX-3GP

SC1U10V3KX-3GP

TP1801TP1801

LPC_LFRAME#

LPC_LAD3

LPC_LAD2

LPC_LAD1

LPC_LAD0

1 2

R1804 56R2J-4-GPR1804 56R2J-4-GP

1 2

R1803 54D9R2F-L1-GPR1803 54D9R2F-L1-GP

1 2

R1806 24D9R2F-L-GPR1806 24D9R2F-L-GP

LPC_LAD[0..3]

LPC_LFRAME# 26

KA20GATE 26 H_A20M# 8

H_DPRSTP# 8,11,34 H_DPSLP# 8

H_PWRGOOD 8,30

H_IGNNE# 8

H_INIT# 8 H_INTR 8

H_NMI 8 H_SMI# 8

H_STPCLK# 8

H_THERMTRIP_1

CLK_PCIE_SATA# 7 CLK_PCIE_SATA 7

Do Not Stuff

R1816

DY

DY DY

DY

R1816

R1817

R1818

R1819

R1820

12

LPC_LFRAME#_IN

LPC_LAD3_IN

LPC_LAD2_IN

LPC_LAD1_IN

LPC_LAD0_IN

For MINICARD debug board.

LPC_LAD[0..3] 26

+3.3V_RUN

R1810

1 2

DY

Do Not Stuff

+1.05V_VCCP

R1801

1 2

56R2J-4-GP

R1807

1 2

DY

Do Not Stuff

R1802

1 2

R1805

Do Not Stuff

+1.05V_VCCP

56R2J-4-GP

H_FERR# 8

+3.3V_RUN

KBRCIN# 26

H_THRMTRIP# 8,11,26,30,54

A00-0402

LPC_LFRAME#_IN 43

LPC_LAD3_IN 43

LPC_LAD2_IN 43

LPC_LAD1_IN 43

LPC_LAD0_IN 43

+RTC_CELL

R1813

330KR2F-L-GP

A A

330KR2F-L-GP

R1809

330KR2F-L-GP

R1808

1MR2J-1-GP

12

5

ICH_INTVRMEN

LAN100_SLP

SM_INTRUDER#

integrated VccSus1_05,VccSus1_5,VccCL1_5

INTVRMEN

High=Enable Low=Disable

integrated VccLan1_05VccCL1_05

LAN100_SLP

High=Enable Low=Disable

4

Alba UMA

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

ICH9-LAN/HDA/SATA/LPC(1/4)

Size Document Number Rev

Custom

Date: Sheet of

3

2

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

Alba UMA

1

-1

18 61Monday, April 06, 2009

-1

5

SSID = ICH

5 OF 6

U1801E

AA26

VSS

AA27

VSS

AA3

VSS

AA6

VSS

AB1

VSS

AA23

VSS

AB28

D D

C C

B B

A A

AB29

AB4

AB5 AC17 AC26 AC27

AC3

AD1 AD10 AD12 AD13 AD14 AD17 AD18 AD21 AD28 AD29

AD4

AD5

AD6

AD7

AD9 AE12 AE13 AE14 AE16 AE17

AE2 AE20 AE24

AE3

AE4

AE6

AE9 AF13 AF16 AF18 AF22 AH26 AF26 AF27

AF5

AF7

AF9

AG13 AG16 AG18 AG20 AG23

AG3

AG6

AG9 AH12 AH14 AH17 AH19

AH2 AH22 AH25 AH28

AH5

AH8

AJ12 AJ14 AJ17

C26

C27

G12

G14

G18

G21

G24

G26

G27

H23

H28

H29

AJ8 B11 B14 B17

B20 B23

E11 E14 E18

E21 E24

F16 F28 F29

B2

B5 B8

E2

E5 E8

G8 H2

ICH9M-GP-NF

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

5

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

H5 J23 J26 J27 AC22 K28 K29 L13 L15 L2 L26 L27 L5 L7 M12 M13 M14 M15 M16 M17 M23 M28 M29 N11 N12 N13 N14 N15 N16 N17 N18 N26 N27 P12 P13 P14 P15 P16 P17 P2 P23 P28 P29 P4 P7 R11 R12 R13 R14 R15 R16 R17 R18 R28 T12 T13 T14 T15 T16 T17 T23 B26 U12 U13 U14 U15 U16 U17 AD23 U26 U27 U3 V1 V13 V15 V23 V28 V29 V4 V5 W26 W27 W3 Y1 Y28 Y29 Y4 Y5 AG28 AH6 AF2 B25

A1 A2 A28 A29 AH1 AH29 AJ1 AJ2 AJ28 AJ29 B1 B29

Mini Card

LAN

New Card

ICH_GND1

ICH_GND2

ICH_GND3

ICH_GND4

+3.3V_ALW

PCIE_IRXN2_MTXN243

PCIE_IRXP2_MTXP243 PCIE_ITXN2_MRXN243 PCIE_ITXP2_MRXP243

PCIE_IRXN3_RTXN325

PCIE_IRXP3_RTXP325 PCIE_ITXN3_LRXN325 PCIE_ITXP3_LRXP325

PCIE_IRXN5_NTXN550

PCIE_IRXP5_NTXP550 PCIE_ITXN5_NRXN550 PCIE_ITXP5_NRXP550

TP1905TP1905

TP1906TP1906

TP1901TP1901

TP1902TP1902

NCTF PIN

PLT_RST#11,25,26,43,50

USB_OC#7 USB_OC#11

USB_OC#4

4

+3.3V_RUN

PLT_RST#

RP1901

1 2 3 4 5 6

SRN10KJ-L3-GP

C1903 SCD1U16V2KX-3GPC1903 SCD1U16V2KX-3GP

12

C1902 SCD1U16V2KX-3GPC1902 SCD1U16V2KX-3GP

12

C1904 SCD1U16V2KX-3GPC1904 SCD1U16V2KX-3GP

12

C1905 SCD1U16V2KX-3GPC1905 SCD1U16V2KX-3GP

12

C1907 SCD1U16V2KX-3GPC1907 SCD1U16V2KX-3GP

12

C1906 SCD1U16V2KX-3GPC1906 SCD1U16V2KX-3GP

12

4

U1902

5

VCC

4

Y

Do Not Stuff

1 2

R1907 Do Not StuffR1907 Do Not Stuff

A00-0402

10

USB_OC#0

9

USB_OC#1USB_OC#5

8

USB_OC#6

7

USB_OC#2

TP1917TP1917 TP1918TP1918

TP1920TP1920 TP1919TP1919

USB_OC#046 USB_OC#146 USB_OC#251

R1912

R1912 22D6R2F-L1-GP

22D6R2F-L1-GP

3

1

B

PCI_PLTRST#

2

A

DY

3

GND

+3.3V_ALW +3.3V_ALW

U1801D

N29

PERN1

N28

PERP1

P27

PETN1

P26

PETP1

L29

PERN2

L28

PCIE_ITXN2_MRXN2_C PCIE_ITXP2_MRXP2_C

PCIE_ITXN3_LRXN3_C PCIE_ITXP3_LRXP3_C

PCIE_ITXN5_NRXN5_C PCIE_ITXP5_NRXP5_C

12

SPI_CS#1

USB_OC#0 USB_OC#1USB_OC#1 USB_OC#2 USB_OC#3 USB_OC#4 USB_OC#5 USB_OC#6 USB_OC#7 USB_OC#8 USB_OC#9 USB_OC#10 USB_OC#11

USB_RBIAS_PN

PERP2

M27

PETN2

M26

PETP2

J29

PERN3

J28

PERP3

K27

PETN3

K26

PETP3

G29

PERN4

G28

PERP4

H27

PETN4

H26

PETP4

E29

PERN5

E28

PERP5

F27

PETN5

F26

PETP5

C29

PERN6/GL AN_RXN

C28

PERP6/GL AN_RXP

D27

PETN6/GL AN_TXN

D26

PETP6/GL AN_TXP

D23

SPI_CLK

D24

SPI_CS0#

F23

SPI_CS1#/G PIO58/CLGPIO6

D25

SPI_MOSI

E23

SPI_MISO

N4

OC0#/GPIO5 9

N5

OC1#/GPIO4 0

N6

OC2#/GPIO4 1

P6

OC3#/GPIO4 2

M1

OC4#/GPIO4 3

N2

OC5#/GPIO2 9

M4

OC6#/GPIO3 0

M3

OC7#/GPIO3 1

N3

OC8#/GPIO4 4

N1

OC9#/GPIO4 5

P5

OC10#/GP IO46

P3

OC11#/GP IO47

AG2

USBRBIAS

AG1

USBRBIAS#

ICH9M-GP-NF

3

4 OF 6

USB

DMI0RXN DMI0RXP DMI0TXN DMI0TXP

DMI1RXN DMI1RXP DMI1TXN DMI1TXP

DMI2RXN DMI2RXP DMI2TXN DMI2TXP

DMI3RXN DMI3RXP DMI3TXN DMI3TXP

DMI_CLKN

PCI-Express

DMI_CLKP

Direct Media Interface

DMI_ZCOMP

DMI_IRCOMP

USBP0N USBP0P USBP1N USBP1P USBP2N USBP2P USBP3N USBP3P USBP4N USBP4P USBP5N

SPI

USBP5P USBP6N USBP6P USBP7N USBP7P USBP8N USBP8P USBP9N

USBP9P USBP10N USBP10P USBP11N USBP11P

PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD#

RN1903

8 7 6

SRN8K2J-4-GP

V27 V26 U29 U28

Y27 Y26 W29 W28

AB27 AB26 AA29 AA28

AD27 AD26 AC29 AC28

T26 T25

AF29 AF28

AC5 AC4 AD3 AD2 AC1 AC2 AA5 AA4 AB2 AB3 AA1 AA2 W5 W4 Y3 Y2 W1 W2 V2 V3 U5 U4 U1 U2

U1801B

D11

AD0

C8

AD1

D9

AD2

E12

AD3

E9

AD4

C9

AD5

E10

AD6

B7

AD7

C7

AD8

C5

AD9

G11

AD10

F8

AD11

F11

AD12

E7

AD13

A3

AD14

D2

AD15

F10

AD16

D5

AD17

D10

AD18

B3

AD19

F7

AD20

C3

AD21

F3

AD22

F4

AD23

C1

AD24

G7

AD25

H7

AD26

D1

AD27

G5

AD28

H6

AD29

G1

AD30

H3

AD31

Interrupt I/F

J5

PIRQA#

E1

PIRQB#

J6

PIRQC#

C4

PIRQD#

ICH9M-GP-NF

USB_OC#9

1

USB_OC#8

2

USB_OC#10

3

USB_OC#3

45

DMI_IRXN0_MTXN0 11 DMI_IRXP0_MTXP0 11 DMI_ITXN0_MRXN0 11 DMI_ITXP0_MRXP0 11

DMI_IRXN1_MTXN1 11 DMI_IRXP1_MTXP1 11 DMI_ITXN1_MRXN1 11 DMI_ITXP1_MRXP1 11

DMI_IRXN2_MTXN2 11 DMI_IRXP2_MTXP2 11 DMI_ITXN2_MRXN2 11 DMI_ITXP2_MRXP2 11

DMI_IRXN3_MTXN3 11 DMI_IRXP3_MTXP3 11 DMI_ITXN3_MRXN3 11 DMI_ITXP3_MRXP3 11

DMI_IRCOMP_R

USB_PN2 USB_PP2 USB_PN3 USB_PP3

USB_PN5 USB_PP5

USB_PN8 USB_PP8 USB_PN9 USB_PP9 USB_PN10 USB_PP10

2

2 OF 6

PCI

REQ1#/GP IO50 GNT1#/GP IO51 REQ2#/GP IO52 GNT2#/GP IO53 REQ3#/GP IO54 GNT3#/GP IO55

PCIRST#

DEVSEL#

PLOCK#

FRAME#

PLTRST#

PIRQE#/GPIO2

PIRQF#/GPIO3 PIRQG#/GPIO4 PIRQH#/GPIO5

CLK_PCIE_ICH# 7 CLK_PCIE_ICH 7

USB_PN0 46 USB_PP0 46 USB_PN1 46 USB_PP1 46 USB_PN2 51

USB_PP2 51

TP1908TP1908 TP1909TP1909

USB_PN4 43

USB_PP4 43

TP1912TP1912 TP1913TP1913

USB_PN6 45

USB_PP6 45

USB_PN7 50

USB_PP7 50

TP1910TP1910 TP1911TP1911 TP1914TP1914 TP1915TP1915

USB_PN10 50

USB_PP10 50

USB_PN11 47

USB_PP11 47

2

F1

REQ0#

G4

GNT0#

B6 A7 F13 F12 E6 F6

D8

C/BE0#

B4

C/BE1#

D6

C/BE2#

A5

C/BE3#

D3

IRDY#

E3

PAR

R1 C6 E4

PERR#

C2 J4

SERR#

A4

STOP#

F5

TRDY#

D7

C14 D4

PCICLK

R2

PME#

H4 K6 F2 G2

USB1 USB2 USB3

MINI CARD

BlUETOOTH New Card

Card Reader CAMERA

1

PCI_REQ0# PCI_GNT0# PCI_REQ1# PCI_GNT1# PCI_REQ2# PCI_GNT2# PCI_REQ3# PCI_GNT3#

PCI_IRDY#

PCIRST1# PCI_DEVSEL# PCI_PERR# PCI_PLOCK# PCI_SERR# PCI_STOP# PCI_TRDY# PCI_FRAME#

PCI_PLTRST#

ICH_PME#

PCI_PIRQE# PCI_PIRQF# PCI_PIRQG# PCI_PIRQH#

TP1907TP1907

TP1916TP1916

TP1903TP1903

CLK_PCI_ICH 7

TP1904TP1904

PCI_GNT0#

SPI_CS#1

PCI_GNT3#

1 2

R1910 Do Not Stuff

1 2

R1911 Do Not Stuff

1 2

R1909 Do Not Stuff

DY

DY DY

DY

PCI_PIRQF# PCI_TRDY# PCI_REQ3# PCI_PIRQD#

PCI_PIRQB# PCI_PIRQG# PCI_REQ0# PCI_PIRQH#

PCI_STOP# PCI_PLOCK# PCI_IRDY# PCI_PERR#

PCI_DEVSEL# PCI_REQ1# PCI_FRAME# PCI_REQ2#

PCI_SERR# PCI_PIRQE# PCI_PIRQA# PCI_PIRQC#

8 7 6

BOOT BIOS Strap

SPI_CS#1 BOOT BIOS LocationPCI_GNT#0

0 1 SPI

01

PCI

11

LPC(Default)

A16 swap override strap

low = A16 swap override enable high = default

USB Pair

0

1

2

3

Device

USB1

USB2

USB3

RESERVED

+1.5V_RUN

1 2

PCI_GNT#3

R1908

R1908 24D9R2F-L-GP

24D9R2F-L-GP

4 MINI CARD

RESERVED

5

6

BLUETOOTH

NEW CARD

7

RESERVED

8

RESERVED

9

10

Card Reader

11

Alba UMA

Title

ICH9-PCI/PCIE/DMI/USB/GND(2/4)

Size Document Number Rev

Custom

Date: Sheet of

CAMERA

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Alba UMA

1

RN1905

SRN8K2J-4-GP

RN1901

SRN8K2J-4-GP

RN1902

SRN8K2J-4-GP

RN1906

SRN8K2J-4-GP

RN1904

SRN8K2J-4-GP

19 61Monday, April 06, 2009

1 2 3 45

+3.3V_RUN

-1