Page 1
Features
Typ e R
DS(on)
VND830MSP-E 60 mΩ 6A
1. Per channel
■ ECOPACK
■ Automotive Grade: compliance with AEC
®
: lead free and RoHS compliant
guidelines
■ Very low standby current
■ CMOS compatible input
■ On-state open-load detection
■ Off-state open-load detection
■ Thermal shutdown protection and diagnosis
■ Undervoltage shutdown
■ Overvoltage clamp
■ Output stuck to V
■ Load current limitation
■ Reverse battery protection
■ Electrostatic discharge protection
detection
CC
I
OUT
(1)
V
CC
36 V
VND830MSP-E
Double channel high-side driver
10
1
PowerSO-10
Description
The VND830MSP-E is a monolithic device made
using STMicroelectronics™ VIPower™ M0-3
technology. It is intended for driving any kind of
load with one side connected to ground. Active
V
pin voltage clamp protects the device against
CC
low energy spikes (see ISO7637 transient
compatibility table).
Active current limitation combined with thermal
shutdown and automatic restart protects the
device against overload.
The device detects open-load condition both in
on-state and off-state. Output shorted to V
detected in the off-state. The open-load threshold
is aimed at detecting the 5 W/12 V standard bulb
as an open-load fault in the on-state.
Device automatically turns off in case of ground
pin disconnection.
CC
is
Table 1. Device summary
Order codes
Package
Tube Tape and reel
PowerSO-10™ VND830MSP-E VND830MSPTR-E
February 2011 Doc ID 10903 Rev 3 1/28
www.st.com
1
Page 2
Contents VND830MSP-E
Contents
1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.4 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.1 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 17
3.1.1 Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 17
3.1.2 Solution 2: diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . . 18
3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.3 MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.4 Open-load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.5 PowerSO-10 maximum demagnetization energy (V
= 13.5 V) . . . . . . . 20
CC
4 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
4.1 PowerSO-10 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
5 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
5.1 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
5.2 PowerSO-10 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
5.3 PowerSO-10 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
2/28 Doc ID 10903 Rev 3
Page 3
VND830MSP-E List of tables
List of tables
Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table 2. Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 5
Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 4. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 5. Power output. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 6. Switching (V
Table 7. Logic input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 8. V
- output diode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
CC
Table 9. Status pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 10. Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 11. Open-load detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 12. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 13. Electrical transient requirements on V
Table 14. Electrical transient requirements on V
Table 15. Electrical transient requirements on V
Table 16. Thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Table 17. PowerSO-10 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Table 18. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
= 13 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
CC
pin (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
CC
pin (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
CC
pin (part 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
CC
Doc ID 10903 Rev 3 3/28
Page 4
List of figures VND830MSP-E
List of figures
Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 4. Status timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 5. Switching time waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 6. Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 7. Off-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 8. High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 9. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 10. Status leakage current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 11. Status low output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 12. Satus clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 13. On-state resistance vs T
Figure 14. On-state resistance vs V
Figure 15. Open-load on-state detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 16. Open-load off-state detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 17. Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 18. Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 19. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 20. Overvoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 21. Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 22. Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 23. I
LIM
vs T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
case
Figure 24. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 25. Open-load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 26. Maximum turn- off current versus load inductance
Figure 27. PowerSO-10 PC board
Figure 28. Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 29. PowerSO-10 thermal impedance junction ambient single pulse. . . . . . . . . . . . . . . . . . . . . 22
Figure 30. Thermal fitting model of a double channel HSD in PowerSO-10 . . . . . . . . . . . . . . . . . . . . 22
Figure 31. PowerSO-10 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 32. PowerSO-10 suggested pad layout and tube shipment (no suffix). . . . . . . . . . . . . . . . . . . 26
Figure 33. Tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
case
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
CC
(1)
(1)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
4/28 Doc ID 10903 Rev 3
Page 5
VND830MSP-E Block diagram and pin description
1 Block diagram and pin description
Figure 1. Block diagram
V
cc
V
GND
INPUT1
STATUS1
INPUT2
STATUS2
cc
CLAMP
OVER TEMP. 1
OVER TEMP. 2
LOGIC
OVERVO LTAGE
UNDERVOLTAGE
CLAMP 1
DRIVER 1
CURRENT LIMITER 1
OPEN LOAD ON 1
OPEN LOAD OFF 1
CLAMP 2
DRIVER 2
CURRENT LIMITER 2
OPEN LOAD ON 2
OPEN LOAD OFF 2
OUTPUT1
OUTPUT2
Figure 2. Configuration diagram (top view)
GROUND
INPUT 1
STATUS 1
STAT US 2
INPUT 2
6
7
8
9
10
5
4
3
2
1
11
V
CC
OUTPUT 1
OUTPUT 1
N.C.
OUTPUT 2
OUTPUT 2
PowerSO-10
Table 2. Suggested connections for unused and not connected pins
Connection / pin Status N.C. Output Input
Floating X X X X
To ground X
Through 10KΩ
resistor
Doc ID 10903 Rev 3 5/28
Page 6
Electrical specifications VND830MSP-E
2 Electrical specifications
Figure 3. Current and voltage conventions
I
S
V
CC
I
IN1
V
IN1
V
STAT1
I
STAT1
I
IN2
V
IN2
I
STAT2
V
STAT2
INPUT1
STATUS 1
INPUT2
STATUS 2
GND
OUTPUT1
OUTPUT2
I
GND
I
OUT1
I
OUT2
V
OUT2
(1)
V
F1
V
OUT1
V
CC
1. VFn = V
CCn
- V
during reverse battery condition.
OUTn
2.1 Absolute maximum ratings
Stressing the device above the rating listed in Tabl e 3 may cause permanent damage to the
device. These are stress ratings only and operation of the device at these or any other
conditions above those indicated in the operating sections of this specification is not implied.
Exposure to absolute maximum rating conditions for extended periods may affect device
reliability. Refer also to the STMicroelectronics sure program and other relevant quality
document.
Table 3. Absolute maximum ratings
Symbol Parameter Value Unit
V
-V
- I
I
-I
I
V
CC
GND
OUT
OUT
I
IN
STAT
ESD
DC supply voltage 41 V
Reverse DC supply voltage -0.3 V
CC
DC reverse ground pin current -200 mA
DC output current Internally limited A
Reverse DC output current -6 A
DC input current +/- 10 mA
CD status current +/- 10 mA
Electrostatic discharge (Human Body Model:
R=1.5KΩ; C=100pF)
– INPUT
–STATUS
–OUTPUT
–V
CC
4000
4000
5000
5000
V
V
V
V
6/28 Doc ID 10903 Rev 3
Page 7
VND830MSP-E Electrical specifications
Table 3. Absolute maximum ratings (continued)
Symbol Parameter Value Unit
Maximum switching energy
E
T
MAX
P
T
T
STG
(L = 0.18 mH; R
T
= 150 °C; IL=9A)
jstart
Power dissipation at Tc= 25 °C 73.5 W
tot
Junction operating temperature Internally limited °C
j
Case operating temperature -40 to 150 °C
c
=0Ω; V
L
=13.5V;
bat
Storage temperature -55 to 150 °C
100 mJ
2.2 Thermal data
Table 4. Thermal data
Symbol Parameter Value Unit
R
thj-case
R
thj-amb
1. When mounted on a standard single sided FR-4 board with 0.5 cm2 of Cu (at least 35 µm thick). Horizontal
mounting and no artificial air flow.
2. When mounted on a standard single sided FR-4 board with 6 cm2 of Cu (at least 35 µm thick). Horizontal
mounting and no artificial air flow.
Thermal resistance junction-case 1.7 °C/W
Thermal resistance junction-ambient 51.7
(1)
37
(2)
°C/W
Doc ID 10903 Rev 3 7/28
Page 8
Electrical specifications VND830MSP-E
2.3 Electrical characteristics
Values specified in this section are for 8 V < V
< 36 V; -40 °C < Tj < 150 °C, unless
CC
otherwise specified. (Per each channel).
Table 5. Power output
Symbol Parameter Test conditions Min. Typ. Max. Unit
(1)
V
V
USD
V
R
I
I
L(off1)
I
L(off2)
I
L(off3)
I
L(off4)
Operating supply voltage 5.5 13 36 V
CC
(1)
Undervoltage shutdown 3 4 5.5 V
(1)
Overvoltage shutdown 36 V
OV
I
=2A; Tj=25°C 60 mΩ
On-state resistance
ON
(1)
Supply current
S
Off-state output current VIN=V
Off-state output current VIN=0V; V
Off-state output current
Off-state output current
OUT
=2A; V
I
OUT
Off-state; V
V
IN=VOUT
Off-state; V
V
IN=VOUT
On-state; V
I
=0A
OUT
OUT
V
IN=VOUT
=125°C
T
j
V
IN=VOUT
Tj =25°C
8V 120 mΩ
CC >
=13V;
CC
=0V
=13V;
CC
=0V; Tj=25°C
=13V; VIN=5V;
CC
12 40 µA
12 25 µA
57mA
= 0 V 0 50 µA
=3.5V -75 0 µA
OUT
=0V; VCC=13V;
=0V; VCC=13V;
5µA
3µA
1. Per device.
Table 6. Switching (VCC=13V)
Symbol Parameter Test conditions Min Typ Max Unit
t
d(on)
t
d(off)
(dV
OUT
(dV
OUT
Table 7. Logic input
Turn-on delay time
Turn-on delay time
/dt)onTurn-on voltage slope
/dt)
Turn-off voltage slope
off
L
to V
R
edge to V
R
to V
R
to V
=1.3V
OUT
=6.5Ω from VIN falling
L
=6.5Ω from V
L
OUT
=6.5Ω from V
L
OUT
=11.7V
OUT
=10.4V
=1.3V
OUT
OUT
=1.3V
=11.7V
53060µs
10 30 70 µs
0.15
0.1
See
Figure 21
See
Figure 22
1.5 V/µs
0.75 V/µs
=6.5Ω from VIN rising edge
R
Symbol Parameter Test conditions Min Typ Max Unit
V
I
Input low level 1.25 V
IL
Low level input current VIN=1.25V 1 µA
IL
8/28 Doc ID 10903 Rev 3
Page 9
VND830MSP-E Electrical specifications
Table 7. Logic input (continued)
Symbol Parameter Test conditions Min Typ Max Unit
V
I
V
I(hyst)
V
Tabl e 8. V
Input high level 3.25 V
IH
High level input current VIN= 3.25 V 10 µA
IH
Input hysteresis voltage 0.5 V
I
=1mA 6 6.8 8 V
Input clamp voltage
ICL
- output diode
CC
IN
I
=-1mA -0.7 V
IN
Symbol Parameter Test conditions Min Typ Max Unit
V
Table 9. Status pin
Forward on voltage -I
F
= 1.3 A; Tj= 150 °C - - 0.6 V
OUT
Symbol Parameter Test conditions Min Typ Max Unit
Status low output voltage I
V
STAT
I
LSTAT
C
V
Status leakage current Normal operation; V
Status pin input
STAT
capacitance
Status clamp voltage
SCL
= 1.6 mA 0.5 V
STAT
= 5 V 10 mA
STAT
Normal operation; V
I
= 1 mA 6 6.8 8 V
STAT
= -1 mA -0.7 V
I
STAT
= 5 V 100 pF
STAT
Table 10. Protection
(1)
Symbol Parameter Test conditions Min. Typ. Max. Unit
T
T
t
V
demag
1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related
Shutdown temperature 150 175 200 °C
TSD
Reset temperature 135 °C
T
R
Thermal hysteresis 7 15 °C
hyst
Status delay in overload
SDL
conditions
I
Current limitation
lim
Turn-off output clamp
voltage
diagnostic signals must be used together with a proper software strategy. If the device is subjected to
abnormal conditions, this software must limit the duration and number of activation cycles.
T
> T
j
TSD
V
=13V 6 9 15 A
CC
5.5 V < V
I
OUT
<36V 15 A
CC
=2A; L=6mH VCC-41 VCC-48 VCC-55 V
20 µs
Doc ID 10903 Rev 3 9/28
Page 10
Electrical specifications VND830MSP-E
Table 11. Open-load detection
Symbol Parameter Test conditions Min Typ Max Unit
Open-load on-state detection
t
DOL(on)
VOL
T
DOL(off)
I
OL
threshold
Open-load on-state detection delay I
Openload off-state voltage detection
threshold
Open-load detection delay at turn-off 1000 µs
= 5 V 0.6 0.9 1.2 A
V
IN
= 0 A 200 µs
OUT
VIN= 0 V 1.5 2.5 3.5 V
Figure 4. Status timings
OPEN LOAD STATUS TIMING (with external pull-up)
V
> V
OUT
V
INn
V
STATn
t
DOL(off)
I
< I
OUT
OL
t
DOL(on)
OL
OVER TEMP STATUS TIMING
V
INn
V
STATn
t
SDL
Tj > T
TSD
t
SDL
Table 12. Truth table
Conditions Input Output Sense
Normal operation
Current limitation
Overtemperature
Undervoltage
Overvoltage
Output voltage > V
Output current < I
OL
OL
L
H
L
H
H
L
H
L
H
L
H
L
H
L
H
L
H
L
X
X
L
L
L
L
L
L
H
H
L
H
(T
j<TTSD
(T
j>TTSD
H
H
H
)H
)L
H
L
X
X
H
H
L
H
H
L
10/28 Doc ID 10903 Rev 3
Page 11
VND830MSP-E Electrical specifications
Figure 5. Switching time waveforms
Table 13. Electrical transient requirements on VCC pin (part 1)
ISO T/R 7637/1
Test levels
test pulse
I II III IV
1 -25 V -50 V -75 V -100 V 2 ms, 10 Ω
2 +25 V +50 V +75 V +100 V 0.2 ms, 10 Ω
3a -25 V -50 V -100 V -150 V 0.1 µs, 50 Ω
3b +25 V +50 V +75 V +100 V 0.1 µs, 50 Ω
4 -4 V -5 V -6 V -7 V 100 ms, 0.01
5 +26.5 V +46.5 V +66.5 V +86.5 V 400 ms, 2
Table 14. Electrical transient requirements on VCC pin (part 2)
ISO T/R 7637/1
Test pulse
I II III IV
Test levels results
1CCCC
2CCCC
3aCCCC
3bCCCC
Delays and
impedance
Ω
Ω
4CCCC
5C E E E
Doc ID 10903 Rev 3 11/28
Page 12
Electrical specifications VND830MSP-E
Table 15. Electrical transient requirements on VCC pin (part 3)
Class Contents
C
All functions of the device are performed as designed after exposure to
disturbance.
One or more functions of the device is not performed as designed after exposure
E
to disturbance and cannot be returned to proper operation without replacing the
device.
12/28 Doc ID 10903 Rev 3
Page 13
VND830MSP-E Electrical specifications
Figure 6. Waveforms
NORMAL OPERATION
INPUT
n
OUTPUT VOLTAGE
STATUS
V
INPUT
n
CC
n
OUTPUT VOLTAGE
STATUS
V
CC
INPUT
n
OUTPUT VOLTAGE
STATUS
n
n
UNDERVOLTAGE
V
USDhyst
V
USD
n
undefined
OVERVOLTAGE
VCC<V
OV
n
V
> V
CC
OV
INPUT
n
OUTPUT VOLTAGE
STATUS
INPUT
n
n
OUTPUT VOLTAGE
STATUS
T
INPUT
n
j
n
OUTPUT CURRENT
STATUS
n
OPEN LOAD with external pull-up
V
> V
n
V
OL
OUT
OL
OPEN LOAD without external pull-up
n
T
TSD
T
R
n
OVERTEMPERATURE
Doc ID 10903 Rev 3 13/28
Page 14
Electrical specifications VND830MSP-E
)
2.4 Electrical characteristics curves
Figure 7. Off-state output current Figure 8. High level input current
Figure 9. Input clamp voltage Figure 10. Status leakage current
IL(off1) (uA)
2.5
2.25
2
1.75
1.5
1.25
1
0.75
0.5
0.25
0
-50 -25 0 25 50 75 100 125 150 175
Off state
Vcc=36V
Vin=Vout=0V
°
Vicl (V)
8
7.8
7.6
7.4
7.2
7
6.8
6.6
6.4
6.2
6
Iin=1mA
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
Iih (uA)
5
4.5
3.5
2.5
1.5
0.5
Vin=3.25V
4
3
2
1
0
-50 -25 0 25 50 75 100 125 150 175
Tc (°C
Ilstat (uA)
0.05
0.04
Vstat=5V
0.03
0.02
0.01
0
-50 -25 0 25 50 75 100 125 150 1 75
Tc (°C)
Figure 11. Status low output current Figure 12. Satus clamp voltage
Vstat (V)
0.8
0.7
Istat=1.6mA
0.6
0.5
0.4
0.3
0.2
0.1
0
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
Vscl (V)
8
7.8
7.6
7.4
7.2
6.8
6.6
6.4
6.2
Istat=1mA
7
6
-50 -25 0 25 50 75 100 125 150 1 75
Tc (°C)
14/28 Doc ID 10903 Rev 3
Page 15
VND830MSP-E Electrical specifications
Figure 13. On-state resistance vs T
case
Ron (mOhm)
160
140
120
100
80
60
40
20
0
-50 -25 0 25 50 75 100 125 150 175
Iout=2A
Vcc=8V; 13V & 36V
Tc (°C)
Figure 15. Open-load on-state detection
threshold
Iol (mA)
1250
1200
1150
1100
1050
1000
950
900
850
800
750
Vcc=13V
Vin=5V
-50 -25 0 2 5 50 75 100 125 150 175
Tc (ºC)
Figure 14. On-state resistance vs V
CC
Ron (mOhm)
120
110
100
90
80
70
60
50
40
30
20
10
0
5 10152025303540
Tc=150°C
Tc=25°C
Tc= - 40°C
Iout=5A
Vcc (V)
Figure 16. Open-load off-state detection
threshold
Vol (V)
5
4.5
4
3.5
3
2.5
2
1.5
1
0.5
0
Vin=0V
-50 -25 0 25 50 75 100 125 150 1 75
Tc (°C)
Figure 17. Input high level Figure 18. Input low level
Vih (V)
3.6
3.4
3.2
3
2.8
2.6
2.4
2.2
2
-50 -25 0 25 50 75 100 125 150 1 75
Tc (°C)
Vil (V)
2.6
2.4
2.2
2
1.8
1.6
1.4
1.2
1
-50 -25 0 25 50 75 100 125 150 1 75
Tc (°C)
Doc ID 10903 Rev 3 15/28
Page 16
Electrical specifications VND830MSP-E
Figure 19. Input hysteresis voltage Figure 20. Overvoltage shutdown
Vhyst (V)
1.5
1.4
1.3
1.2
1.1
1
0.9
0.8
0.7
0.6
0.5
-50 -25 0 25 50 75 100 125 150 1 75
Tc (°C)
Figure 21. Turn-on voltage slope Figure 22. Turn-off voltage slope
dVout/dt(on) (V/ms)
800
700
600
500
400
300
200
100
Vcc=13V
Rl=6.5Ohm
0
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC)
Figure 23. I
LIM
vs T
case
Ilim (A)
20
18
16
14
12
10
8
6
4
2
0
Vcc=13V
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
Vov (V)
50
48
46
44
42
40
38
36
34
32
30
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
dVout/dt(off) (V/ms)
600
550
500
450
400
350
300
250
200
Vcc=13V
Rl=6.5Ohm
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC)
16/28 Doc ID 10903 Rev 3
Page 17
VND830MSP-E Application information
3 Application information
Figure 24. Application schematic
+5V
+5V
+5V
μ
R
prot
C
R
prot
R
prot
R
prot
STATUS1
INPUT1
STATUS2
INPUT2
V
CC
D
ld
OUTPUT1
V
GND
GND
R
GND
D
OUTPUT2
GND
3.1 GND protection network against reverse battery
3.1.1 Solution 1: resistor in the ground line (R
This can be used with any type of load.
The following is an indication on how to dimension the R
1. R
2. R
where -I
maximum rating section of the device’s datasheet.
Power dissipation in R
P
= (-VCC)2/ R
D
This resistor can be shared amongst several different HSDs. Please note that the value of
this resistor should be calculated with formula (1) where I
maximum on-state currents of the different devices.
≤ 600 mV / I
GND
≥ (-VCC) / (-I
GND
is the DC reverse ground pin current and can be found in the absolute
GND
GND
S(on)max
)
GND
(when V
GND
< 0: during reverse battery situations) is:
CC
GND
only)
resistor.
GND
S(on)max
becomes the sum of the
Please note that if the microprocessor ground is not shared by the device ground then the
R
produces a shift (I
GND
S(on)max
* R
) in the input thresholds and the status output
GND
Doc ID 10903 Rev 3 17/28
Page 18
Application information VND830MSP-E
values. This shift varies depending on how many devices are ON in the case of several
high-side drivers sharing the same R
GND
.
If the calculated power dissipation leads to a large resistor or several devices have to share
the same resistor then ST suggests to utilize solution 2 (see Section 3.1.2).
3.1.2 Solution 2: diode (D
A resistor (R
= 1 kΩ) should be inserted in parallel to D
GND
) in the ground line
GND
inductive load.
This small signal diode can be safely shared amongst several different HSDs. Also in this
case, the presence of the ground network produces a shift (∼600 mV) in the input threshold
and in the status output values if the microprocessor ground is not common to the device
ground. This shift does not vary if more than one HSD shares the same diode/resistor
network.
3.2 Load dump protection
Dld is necessary (Voltage Transient Suppressor) if the load dump peak voltage exceeds the
V
max DC rating. The same applies if the device is subject to transients on the VCC line
CC
that are greater than the ones shown in Ta bl e 1 3.
3.3 MCU I/Os protection
If a ground protection network is used and negative transient are present on the VCC line,
the control pins are pulled negative. ST suggests to insert a resistor (R
the microcontroller I/Os pins to latch-up.
The value of these resistors is a compromise between the leakage current of microcontroller
and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of
microcontroller I/Os.
if the device drives an
GND
) in line to prevent
prot
-V
CCpeak/Ilatchup
≤ R
prot
≤ (V
OHµC-VIH-VGND
) / I
Calculation example:
For V
CCpeak
5kΩ ≤ R
= -100 V and I
≤ 65 kΩ.
prot
latchup
≥ 20 mA; V
OHµC
Recommended values:
R
=10 kΩ.
prot
3.4 Open-load detection in off-state
Off-state open-load detection requires an external pull-up resistor (RPU) connected between
OUTPUT pin and a positive supply voltage (V
microprocessor.
The external resistor has to be selected according to the following requirements:
18/28 Doc ID 10903 Rev 3
PU
IHmax
≥ 4.5 V
) like the +5 V line used to supply the
Page 19
VND830MSP-E Application information
1. No false open-load indication when load is connected:
in this case we have to avoid V
condition V
=(VPU/(RL+RPU))RL<V
OUT
to be higher than V
OUT
Olmin
; this results in the following
Olmin
.
2. No misdetection when load is disconnected:
in this case the V
condition R
Because I
up resistor R
PU
may significantly increase if V
s(OFF)
should be connected to a supply that is switched OFF when the module is in
PU
standby. The values of V
has to be higher than V
OUT
<(VPU–V
OLmin
OLmax
, V
OLmax
)/I
L(off2)
and I
; this results in the following
OLmax
.
is pulled high (up to several mA), the pull-
OUT
are available in Section 2.3: Electrical
L(off2)
characteristics.
Figure 25. Open-load detection in off-state
V batt. VPU
V
CC
R
PU
INPUT
STATUS
DRIVER
+
LOGIC
+
R
-
VOL
OUT
I
L(off2)
R
L
GROUND
Doc ID 10903 Rev 3 19/28
Page 20
Application information VND830MSP-E
3.5 PowerSO-10 maximum demagnetization energy
(V
= 13.5 V)
CC
Figure 26. Maximum turn- off current versus load inductance
I
LM A X ( A)
100
10
C
1
0,1 1 10 100
L( m H )
(1)
A
B
A: Single pulse at T
B: Repetitive pulse at T
C: Repetitive pulse at T
Condition:
V
= 13.5 V
CC
VIN, I
L
1. Values are generated with R
In case of repetitive pulses, T
the temperature specified above for curves B and C.
jstart
= 150 °C
jstart
jstart
L
= 100 °C
=125°C
Demagnetization
=0Ω
(at beginning of each demagnetization) of every pulse must not exceed
jstart
Demagnetization
Demagnetization
t
20/28 Doc ID 10903 Rev 3
Page 21
VND830MSP-E Package and PCB thermal data
4 Package and PCB thermal data
4.1 PowerSO-10 thermal data
Figure 27. PowerSO-10 PC board
1. Layout condition of R
Cu thickness = 35 µm, Copper areas: from minimum pad lay-out to 8 cm2).
Figure 28. R
thj-amb
RTHj_amb (°C/W)
and Zth measurements (PCB FR4 area = 58 mm x 58 mm, PCB thickness = 2 mm,
th
vs PCB copper area in open box free air condition
(1)
55
50
Tj-Tamb=50°C
45
40
35
30
0246810
PCB Cu heatsink area (cm^2)
Doc ID 10903 Rev 3 21/28
Page 22
Package and PCB thermal data VND830MSP-E
Figure 29. PowerSO-10 thermal impedance junction ambient single pulse
ZTH (°C/W)
1000
100
10
1
0.1
0.0001 0.001 0.01 0.1 1 10 100 1000
Time (s)
Equation 1
Z
THδ
where
: pulse calculation formula
RTHδ Z
THtp
1 δ–()+⋅=
δ tpT⁄=
0.5 cm
6 cm
2
2
Figure 30. Thermal fitting model of a double channel HSD in PowerSO-10
Tj_1
Pd1
Tj_2
22/28 Doc ID 10903 Rev 3
C1
C1 C2
R1
Pd2
C3 C4
R3R1 R6R5R2
R2
C5 C6C2
R4
T_amb
Page 23
VND830MSP-E Package and PCB thermal data
Table 16. Thermal parameter
Area/island (cm2)0.56
R1 (°C/ W) 0.15
R2 (°C/ W) 0.8
R3 (°C/ W) 0.7
R4 (°C/ W) 0.8
R5 (°C/ W) 12
R6 (°C/ W) 37 22
C1 (W.s/ °C) 0.0006
C2 (W.s /°C) 2.10E-03
C3 (W.s/ °C) 0.013
C4 (W.s/ °C) 0.3
C5 (W.s/ °C) 0.75
C6 (W.s/ °C) 3 5
Doc ID 10903 Rev 3 23/28
Page 24
Package and packing information VND830MSP-E
5 Package and packing information
5.1 ECOPACK® packages
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK®
®
is an ST trademark.
5.2 PowerSO-10 mechanical data
Figure 31. PowerSO-10 package dimensions
10
HE
h
A
F
A1
1
eB
0.25
D
= =
D1
= =
E2
DETAIL "A"
B
0.10 A
E
SEATING
PLANE
A
C
B
E4
SEATING
PLANE
A1
DETAIL "A"
24/28 Doc ID 10903 Rev 3
L
α
Page 25
VND830MSP-E Package and packing information
Table 17. PowerSO-10 mechanical data
Millimeters
Dim.
Min. Typ. Max.
A 3.35 3.65
(1)
A
A1 0 0.10
B 0.40 0.60
(1)
B
C 0.35 0.55
(1)
C
D 9.40 9.60
D1 7.40 7.60
E 9.30 9.50
3.4 3.6
0.37 0.53
0.23 0.32
E2 7.20 7.60
(1)
E2
E4 5.90 6.10
(1)
E4
e1.27
F 1.25 1.35
(1)
F
H 13.80 14.40
(1)
H
h0.50
L 1.20 1.80
(1)
L
α 0° 8°
(1)
α
1. Muar only POA P013P.
7.30 7.50
5.90 6.30
1.20 1.40
13.85 14.35
0.80 1.10
2° 8°
Doc ID 10903 Rev 3 25/28
Page 26
Package and packing information VND830MSP-E
5.3 PowerSO-10 packing information
Figure 32. PowerSO-10 suggested pad layout and tube shipment (no suffix)
14.6 - 14.9
10.8 - 11
6.30
0.67 - 0.73
1
2
3
9.5
4
5
10
0.54 - 0. 6
9
8
7
1.27
6
C
A
All dimensions are in mm.
Casablanca 50 1000 532 10.4 16.4 0.8
Muar 50 1000 532 4.9 17.2 0.8
Figure 33. Tape and reel shipment (suffix “TR”)
B
Base Q.ty Bulk Q.ty Tube length (± 0.5) A B C (± 0.1)
REEL DIMENSIONS
Base Q.ty 600
Bulk Q.ty 600
A (max) 330
B (min) 1.5
C (± 0.2) 13
F 20.2
G (+ 2 / -0) 24.4
N (min) 60
T (max) 30.4
All dimensions are in mm.
TAPE DIMENSIONS
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb. 1986
Tape width W 24
Tape Hole Spacing P0 (± 0.1) 4
Component Spacing P 24
Hole Diameter D (± 0.1/-0) 1.5
Hole Diameter D1 (min) 1.5
Hole Position F (± 0.05) 11.5
Compartment Depth K (max) 6.5
Hole Spacing P1 (± 0.1) 2
All dimensions are in mm.
End
Top
cover
tape
26/28 Doc ID 10903 Rev 3
500mm min
Empty components pockets
saled with cover tape.
User directio n of feed
Start
No componentsNo components Components
500mm min
Page 27
VND830MSP-E Revision history
6 Revision history
Table 18. Document revision history
Date Revision Changes
01-Oct-2004 1 Initial release.
19-Jul-2010 2
25-Feb-2011 3
Changed Features list.
Reformatted entire document. No content change.
Updated Figure 26: Maximum turn- off current versus load
inductance
(1)
Doc ID 10903 Rev 3 27/28
Page 28
VND830MSP-E
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28/28 Doc ID 10903 Rev 3
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