Datasheet UDA1334BTS Datasheet (Philips)

INTEGRATED CIRCUITS

DATA SH EET

UDA1334BTS

Low power audio DAC

Product specification
Supersedes data of 2000 Feb 07
File under Integrated Circuits, IC01

2000 Jul 31

Philips Semiconductors Product specification

Low power audio DAC UDA1334BTS

CONTENTS

1 FEATURES

1.1 General

1.2 Multiple format data interface

1.3 DAC digital sound processing

1.4 Advanced audio configuration
2 APPLICATIONS
3 GENERAL DESCRIPTION
4 ORDERING INFORMATION
5 QUICK REFERENCE DATA
6 BLOCK DIAGRAM
7 PINNING
8 FUNCTIONAL DESCRIPTION

8.1 System clock

8.2 Interpolation filter

8.3 Noise shaper

8.4 Filter stream DAC

8.5 Power-on reset

8.6 Feature settings

8.6.1 Digital interface format select

8.6.2 Mute control

8.6.3 De-emphasis control

8.6.4 Power control and sampling frequency select
9 LIMITING VALUES
10 HANDLING
11 THERMAL CHARACTERISTICS
12 QUALITY SPECIFICATION

13 DC CHARACTERISTICS
14 AC CHARACTERISTICS

14.1 2.0 V supply voltage

14.2 3.0 V supply voltage

14.3 Timing
15 APPLICATION INFORMATION
16 PACKAGE OUTLINE
17 SOLDERING

17.1 Introduction to soldering surface mount
packages

17.2 Reflow soldering

17.3 Wave soldering

17.4 Manual soldering

17.5 Suitability of surface mount IC packages for
wave and reflow soldering methods

18 DATA SHEET STATUS
19 DEFINITIONS
20 DISCLAIMERS

2000 Jul 31 2

Philips Semiconductors Product specification

Low power audio DAC UDA1334BTS

1 FEATURES

1.1 General

• 1.8 to 3.6 V power supply voltage

• Integrated digital filter plus DAC

• Supports sample frequencies from 8 to 100 kHz

• Automatic system clock versus sample rate detection

• Low power consumption

• No analog post filtering required for DAC

• Slave mode only applications

• Easy application

• SSOP16 package.

2 APPLICATIONS

This audio DAC is excellently suitable for digital audio
portable application, such as portable MD, MP3 and
DVD players.

1.2 Multiple format data interface

• I2S-bus and LSB-justified format compatible

• 1fs input data rate.

1.3 DAC digital sound processing

• Digital de-emphasis for 44.1 kHz sampling rate

• Mute function.

1.4 Advanced audio configuration

• High linearity, wide dynamic range and low distortion

• Standby or Sleep mode in which the DAC is powered

down.

4 ORDERING INFORMATION

TYPE

NUMBER

UDA1334BTS SSOP16 plastic shrink small outline package; 16 leads; body width 4.4 mm SOT369-1

NAME DESCRIPTION VERSION

3 GENERAL DESCRIPTION

The UDA1334BTS supports the I2S-bus data format with
word lengths of up to 24 bits and the LSB-justified serial
data format with word lengths of 16, 20 and 24 bits.

The UDA1334BTS has basic features such as
de-emphasis (at 44.1 kHz sampling rate) and mute.

PACKAGE

2000 Jul 31 3

Philips Semiconductors Product specification

Low power audio DAC UDA1334BTS

5 QUICK REFERENCE DATA

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Supplies

V

DDA

V

DDD

I

DDA

I

DDD

T

amb

Digital-to-analog converter (V

V

o(rms)

(THD + N)/S total harmonic

S/N signal-to-noise ratio f

α

cs

Digital-to-analog converter (V

V

o(rms)

(THD + N)/S total harmonic

S/N signal-to-noise ratio f

α

cs

Power dissipation (at fs= 44.1 kHz)

DAC analog supply voltage 1.8 2.0 3.6 V
digital supply voltage 1.8 2.0 3.6 V
DAC analog supply current normal operating mode − 2.3 − mA

Sleep mode − 125 −µA

digital supply current normal operating mode − 1.4 − mA

Sleep mode

clock running − 250 −µA
no clock running − 20 −µA

ambient temperature −40 − +85 °C

DDA=VDDD

= 2.0 V)

output voltage (RMS value) at 0 dB (FS) digital input; note 1 − 600 − mV

= 44.1 kHz; at 0 dB −−80 − dB

f

s

distortion-plus-noise to signal
ratio

f

= 44.1 kHz; at −60 dB; A-weighted −−37 − dB

s

= 96 kHz; at 0 dB −−75 − dB

f

s

f

= 96 kHz; at −60 dB; A-weighted −−35 − dB

s

= 44.1 kHz; code = 0; A-weighted − 97 − dB

s

= 96 kHz; code = 0; A-weighted − 95 − dB

f

s

channel separation − 100 − dB

DDA=VDDD

= 3.0 V)

output voltage (RMS value) at 0 dB (FS) digital input; note 1 − 900 − mV

f

= 44.1 kHz; at 0 dB −−90 − dB

s

distortion-plus-noise to signal
ratio

f

= 44.1 kHz; at −60 dB; A-weighted −−40 − dB

s

f

= 96 kHz; at 0 dB −−85 − dB

s

= 96 kHz; at −60 dB; A-weighted −−37 − dB

f

s

= 44.1 kHz; code = 0; A-weighted − 100 − dB

s

f

= 96 kHz; code = 0; A-weighted − 98 − dB

s

channel separation − 100 − dB

P power dissipation playback mode

at 2.0 V supply voltage − 7.4 − mW
at 3.0 V supply voltage − 17 − mW

Sleep mode; at 2.0 V supply voltage

clock running − 0.75 − mW
no clock running − 0.3 − mW

Note

1. The DAC output voltage scales proportionally to the power supply voltage.

2000 Jul 31 4

Philips Semiconductors Product specification

Low power audio DAC UDA1334BTS

6 BLOCK DIAGRAM

handbook, full pagewidth

BCK

WS

DATAI

SYSCLK

MUTE

DEEM

PCS

VOUTL

V

DDD

4

1
2
3

UDA1334BTS

6
8
9
10

14

13 12

V

DDA

DIGITAL INTERFACE

DE-EMPHASIS

INTERPOLATION FILTER

NOISE SHAPER

DAC

15

V

SSA

V

DAC

SSD

5

7

SFOR1

11

SFOR0

16

VOUTR

MGL964

V

ref(DAC)

Fig.1 Block diagram.

2000 Jul 31 5

Philips Semiconductors Product specification

Low power audio DAC UDA1334BTS

7 PINNING

SYMBOL PIN PAD TYPE DESCRIPTION

BCK 1 5 V tolerant digital input pad; note 1 bit clock input
WS 2 5 V tolerant digital input pad; note 1 word select input
DATAI 3 5 V tolerant digital input pad; note 1 serial data input
V

DDD

V

SSD

SYSCLK 6 5 V tolerant digital input pad; note 1 system clock input
SFOR1 7 5 V tolerant digital input pad; note 1 serial format select 1
MUTE 8 5 V tolerant digital input pad; note 1 mute control
DEEM 9 5 V tolerant digital input pad; note 1 de-emphasis control
PCS 10 3-level input pad; note 2 power control and sampling frequency select
SFOR0 11 digital input pad; note 2 serial format select 0
V

ref(DAC)

V

DDA

VOUTL 14 analog output pad DAC output left
V

SSA

VOUTR 16 analog output pad DAC output right

4 digital supply pad digital supply voltage
5 digital ground pad digital ground

12 analog pad DAC reference voltage
13 analog supply pad DAC analog supply voltage

15 analog ground pad DAC analog ground

Notes

1. 5 V tolerantis only supported if the power supply voltage is between 2.7 and 3.6 V. For lower power supply voltages
this is maximum 3.3 V tolerant.

2. Because of test issues these pads are not 5 V tolerant and they should be at power supply voltage level or at a
maximum of 0.5 V above that level.

handbook, halfpage

BCK

WS

DATAI

V

DDD

V

SSD

1
2
3
4

UDA1334BTS

5
6
7
8

MGL963

16
15
14
13
12
11
10

9

VOUTR
V

SSA

VOUTL
V

DDA

V

ref(DAC)

SFOR0SYSCLK
PCSSFOR1
DEEMMUTE

Fig.2 Pin configuration.

2000 Jul 31 6

Philips Semiconductors Product specification

Low power audio DAC UDA1334BTS

8 FUNCTIONAL DESCRIPTION

8.1 System clock

The UDA1334BTS operates in slave mode only; this
means that in all applications the system must provide the
system clock and the digital audio interface signals
(BCK and WS).

Thesystemclockmustbelocked in frequency to the digital
interface signals.

TheUDA1334BTSautomaticallydetectstheratiobetween
the SYSCLK and WS frequencies.

The BCK clock can be up to 64fs, or in other words the
BCK frequency is 64 times the Word Select (WS)
frequency or less: f

≤ 64 × fWS.

BCK

Remarks:

1. The WS edge MUST fall on the negative edge of the
BCK at all times for proper operation of the digital I/O
data interface

2. For LSB-justified formats it is important to have a WS
signal with a duty factor of 50%.

The modes which are supported are given in Table 1.

Table 1 Supported sampling ranges

CLOCK MODE SAMPLING RANGE

768f
512f
384f
256f
192f
128f

s
s
s
s
s
s

8to55kHz
8 to 100 kHz
8 to 100 kHz
8 to 100 kHz

8 to 100 kHz

8 to 100 kHz

(1)(2)

(2)

Notes

1. This mode can only be supported for power supply
voltages down to 2.4 V. For lower voltages, in
192fsmode the sampling frequency should be limited
to 55 kHz.

2. Not supported in the low sampling frequency mode.

Table 2 Example using a 12.228 MHz system clock

CLOCK MODE SAMPLING FREQUENCY

128f
192f
256f
384f
512f
768f

s
s
s
s
s
s

96 kHz

64 kHz

48 kHz
32 kHz
24 kHz
16 kHz

(1)

Note

1. This mode can only be supported for power supply
voltages down to 2.4 V. For lower voltages, in 192f
mode the sampling frequency should be limited to
55 kHz.

8.2 Interpolation filter

The interpolation digital filter interpolates from 1fsto 64f
by cascading FIR filters (see Table 3).

Table 3 Interpolation filter characteristics

ITEM CONDITION VALUE (dB)

Pass-band ripple 0 to 0.45f
Stop band >0.55f
Dynamic range 0 to 0.45f

s

s

s

±0.02

−50

>114

8.3 Noise shaper

The 5th-order noise shaper operates at 64f

. It shifts

s

in-band quantization noise to frequencies well above the
audio band. This noise shaping technique enables high
signal-to-noise ratios to be achieved. The noise shaper
output is converted into an analog signal using a
Filter Stream DAC (FSDAC).

s

s

An example is given in Table 2 for a 12.228 MHz system
clock input.

2000 Jul 31 7

Philips Semiconductors Product specification

Low power audio DAC UDA1334BTS

8.4 Filter stream DAC

The FSDAC is a semi-digital reconstruction filter that
converts the 1-bit data stream of the noise shaper to an
analog output voltage. The filter coefficients are
implemented as current sources and are summed at
virtual ground of the output operational amplifier. In this
way very high signal-to-noise performance and low clock
jitter sensitivity is achieved. No post-filter is needed due to
the inherent filter function of the DAC. On-board amplifiers
convert the FSDAC output current to an output voltage
signal capable of driving a line output.

The output voltage of the FSDAC scales proportionally
with the power supply voltage.

handbook, halfpage

3.0 V

V

V

ref(DAC)

DDA

13

50 kΩ

RESET

12

CIRCUIT

8.5 Power-on reset

The UDA1334BTS has an internal Power-on reset circuit
(see Fig.3) which resets the test control block.

The reset time (see Fig.4) is determined by an external
capacitor which is connected between pin V

ref(DAC)

and
ground. The reset time should be at least 1 µs for
V

ref(DAC)

will be reset again for V

< 1.25 V. When V

ref(DAC)

is switched off, the device

DDA

< 0.75 V.

During the reset time the system clock should be running.

3.0

handbook, halfpage

V

DDD
(V)

1.5

V

0

3.0

DDA
(V)

1.5

t

C1 >
10 µF

50 kΩ

UDA1334BTS

MGL985

Fig.3 Power-on reset circuit.

2000 Jul 31 8

V

ref(DAC)

(V)

1.25

0.75

3.0

1.5

0

0

>1 µs

Fig.4 Power-on reset timing.

t

t

MGL984

Philips Semiconductors Product specification

Low power audio DAC UDA1334BTS

8.6 Feature settings

The features of the UDA1334BTS can be set by control
pins SFOR1, SFOR0, MUTE, DEEM and PCS.

8.6.1 DIGITAL INTERFACE FORMAT SELECT
The digital audio interface formats (see Fig.5) can be

selected via the pins SFOR1 and SFOR0 as shown in
Table 4.

Table 4 Data format selection

SFOR1 SFOR0 INPUT FORMAT

2

LOW LOW I

S-bus input

LOW HIGH LSB-justified 16 bits input
HIGH LOW LSB-justified 20 bits input
HIGH HIGH LSB-justified 24 bits input

8.6.2 MUTE CONTROL
The output signal can be soft muted by setting pin MUTE

to HIGH level as shown in Table 5.

Table 5 Mute control

8.6.4 POWER CONTROL AND SAMPLING FREQUENCY

SELECT

Pin PCS is a 3-level pin and is used to set the mode of the
UDA1334BTS. The definition is given in Table 7.

Table 7 PCS function definition

PCS FUNCTION

LOW normal operating mode

MID low sampling frequency mode

HIGH Power-down or Sleep mode

The low sampling frequency mode is required to have a
higher oversampling rate in the noise shaper in order to
improve the signal-to-noise ratio. In this mode the
oversamplingratioofthenoiseshaperwillbe128f

instead

s

of 64fs.

MUTE FUNCTION

LOW mute off
HIGH mute on

8.6.3 DE-EMPHASIS CONTROL
De-emphasis can be switched on for fs= 44.1 kHz by

setting pin DEEM at HIGH level. The function description
of pin DEEM is given in Table 6.

Table 6 De-emphasis control

DEEM FUNCTION

LOW de-emphasis off
HIGH de-emphasis on

Remark: the de-emphasis function in only supported in
the normal operating mode, not in the low sampling
frequency mode.

2000 Jul 31 9

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2000 Jul 31 10

handbook, full pagewidth

Philips Semiconductors Product specification

Low power audio DAC UDA1334BTS

WS

BCK

DATA

WS

BCK

DATA

WS

BCK

DATA

WS

BCK

MSB B2

LEFT

RIGHT

3

21> = 812 3

MSB MSBB2

2

S-BUS FORMAT

I

LEFT

16

MSB

LEFT

16

MSB B2 B3 B4 B5 B6

LEFT

16

15 2 1

B2

1518 1720 19 2 1

1518 1720 1922 212324 2 1

B15

LSB-JUSTIFIED FORMAT 16 BITS

B19

LSB-JUSTIFIED FORMAT 20 BITS

> = 8

LSB

LSB

RIGHT

16

MSB B2

RIGHT

16

MSB B2 B3 B4 B5 B6

RIGHT

16

15 2 1

B15 LSB

1518 1720 19 2 1

B19 LSB

1518 1720 1922 212324 21

DATA

MSB

B23

B2

B3 B4

B5 B6 B7 B8 B9 B10

LSB-JUSTIFIED FORMAT 24 BITS

LSB

MSB

B2

B3 B4

B5 B6 B7 B8 B9 B10

B23 LSB

MGS752

Fig.5 Digital audio formats

Philips Semiconductors Product specification

Low power audio DAC UDA1334BTS

9 LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 60134).

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT

V

DD

T

xtal(max)

T

stg

T

amb

V

es

I

sc(DAC)

Note

1. All supply connections must be made to the same power supply.

2. Short-circuit test at T

supply voltage note 1 − 4.0 V
maximum crystal temperature − 150 °C
storage temperature −65 +125 °C
ambient temperature −40 +85 °C
electrostatic handling voltage human body model −2000 +2000 V

machine model −200 +200 V

short-circuit current of DAC note 2

=0°C and V

amb

output short-circuited to V
output short-circuited to V

= 3 V. DAC operation after short-circuiting cannot be warranted.

DDA

SSA
DDA

− 450 mA

− 300 mA

10 HANDLING

Inputs and outputs are protected against electrostatic discharge in normal handling. However, it is good practice to take
normal precautions appropriate to handling MOS devices.

11 THERMAL CHARACTERISTICS

SYMBOL PARAMETER CONDITIONS VALUE UNIT

R

th(j-a)

thermal resistance from junction to ambient in free air 145 K/W

12 QUALITY SPECIFICATION

In accordance with

“SNW-FQ-611-E”

.

13 DC CHARACTERISTICS

V

DDD=VDDA

= 2.0 V; T

=25°C; RL=5kΩ; all voltages with respect to ground (pins V

amb

SSA

and V

SSD

); unless

otherwise specified.

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Supplies

V
V
I

DDA

DDA
DDD

DAC analog supply voltage note 1 1.8 2.0 3.6 V
digital supply voltage note 1 1.8 2.0 3.6 V
DAC analog supply current normal operating mode

at 2.0 V supply voltage − 2.3 − mA
at 3.0 V supply voltage − 3.5 − mA

Sleep mode

at 2.0 V supply voltage − 125 −µA
at 3.0 V supply voltage − 175 −µA

2000 Jul 31 11

Philips Semiconductors Product specification

Low power audio DAC UDA1334BTS

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

I

DDD

Digital input pins; note 2
V

IH

V

IL

I

 input leakage current −−1µA

LI

C

i

3-level input: pin PCS

V

IH

V

IM

V

IL

DAC

V

ref(DAC)

R

o(ref)

I

o(max)

R

L

C

L

Notes

1. All supply connections must be made to the same external power supply unit.

2. At 3 V supply voltage, the input pads are TTL compatible. However, at 2.0 V supply voltage no TTL levels can be
accepted, but levels from 3.3 V domain can be applied to the pins.

3. When the DAC drives a capacitive load above 50 pF, a series resistance of 100 Ω must be used to prevent
oscillations in the output operational amplifier.

digital supply current normal operating mode

at 2.0 V supply voltage − 1.4 − mA
at 3.0 V supply voltage − 2.1 − mA

Sleep mode;
at 2.0 V supply voltage

clock running − 250 −µA
no clock running − 20 −µA

Sleep mode;
at 3.0 V supply voltage

clock running − 375 −µA
no clock running − 30 −µA

HIGH-level input voltage at 2.0 V supply voltage 1.3 − 3.3 V

at 3.0 V supply voltage 2.0 − 5.0 V

LOW-level input voltage at 2.0 V supply voltage −0.5 − +0.5 V

at 3.0 V supply voltage −0.5 − +0.8 V

input capacitance −−10 pF

HIGH-level input voltage 0.9V
MID-level input voltage 0.4V

DDD
DDD

− V

DDD

− 0.6V

+ 0.5 V

DDD

V

LOW-level input voltage −0.5 − +0.5 V

reference voltage with respect to V

SSA

output resistance on
pin V

ref(DAC)

maximum output current (THD + N)/S < 0.1%;

0.45V

DDA

0.5V

DDA

0.55V

DDA

V

− 25 − kΩ

− 1.6 − mA

RL= 800 Ω
load resistance 3 −−kΩ
load capacitance note 3 −−50 pF

2000 Jul 31 12

Philips Semiconductors Product specification

Low power audio DAC UDA1334BTS

14 AC CHARACTERISTICS

14.1 2.0 V supply voltage

V

DDD=VDDA

unless otherwise specified.

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

DAC

V

o(rms)

∆V

o

(THD + N)/S total harmonic

S/N signal-to-noise ratio f

α

cs

PSRR power supply rejection ratio f

= 2.0 V; fi= 1 kHz; T

=25°C; RL=5kΩ.; all voltages with respect to ground (pins V

amb

SSA

and V

output voltage (RMS value) at 0 dB (FS) digital input − 600 − mV
unbalance between channels − 0.1 − dB

f

= 44.1 kHz; at 0 dB −−80 − dB

s

distortion-plus-noise to signal
ratio

f

= 44.1 kHz; at −60 dB;

s

−−37 − dB

A-weighted

= 96 kHz; at 0 dB −−75 − dB

f

s

f

= 96 kHz; at −60 dB; A-weighted −−35 − dB

s

= 44.1 kHz; code = 0; A-weighted − 97 − dB

s

f

= 96 kHz; code = 0; A-weighted − 95 − dB

s

channel separation − 100 − dB

ripple

= 1 kHz; V

= 30 mV (p-p) − 60 − dB

ripple

SSD

);

14.2 3.0 V supply voltage

V

DDD=VDDA

= 3.0 V; fi= 1 kHz; T

=25°C; RL=5kΩ; all voltages with respect to ground (pins V

amb

SSA

and V

SSD

unless otherwise specified.

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

DAC

V

o(rms)

∆V

o

(THD + N)/S total harmonic

S/N signal-to-noise ratio f

α

cs

PSRR power supply rejection ratio f

output voltage (RMS value) at 0 dB (FS) digital input − 900 − mV
unbalance between channels − 0.1 − dB

f

= 44.1 kHz; at 0 dB −−90 − dB

s

distortion-plus-noise to signal
ratio

f

= 44.1 kHz; at −60 dB;

s

−−40 − dB

A-weighted
f

= 96 kHz; at 0 dB −−85 − dB

s

f

= 96 kHz; at −60 dB; A-weighted −−37 − dB

s

= 44.1 kHz; code = 0; A-weighted − 100 − dB

s

f

= 96 kHz; code = 0; A-weighted − 98 − dB

s

channel separation − 100 − dB

ripple

= 1 kHz; V

= 30 mV (p-p) − 60 − dB

ripple

);

2000 Jul 31 13

Philips Semiconductors Product specification

Low power audio DAC UDA1334BTS

14.3 Timing

V

DDD=VDDA

unless otherwise specified; note 1.

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

System clock timing (see Fig.6)

T

sys

t

CWH

t

CWL

Reset timing

t

reset

Serial interface timing (see Fig.7)
f

BCK

t

BCKH

t

BCKL

t

r

t

f

t

su(DATAI)

t

h(DATAI)

t

su(WS)

t

h(WS)

= 1.8 to 3.6 V; T

system clock cycle time f

system clock HIGH time f

system clock LOW time f

= −20 to +85 °C; RL=5kΩ; all voltages with respect to ground (pins V

amb

= 256f

sys

f

sys

f

sys
sys

f

sys
sys

f

sys

s

= 384f

s

= 512f

s

< 19.2 MHz 0.3T
≥ 19.2 MHz 0.4T
< 19.2 MHz 0.3T
≥ 19.2 MHz 0.4T

35 88 780 ns
23 59 520 ns
17 44 390 ns

− 0.7T

sys

− 0.6T

sys

− 0.7T

sys

− 0.6T

sys

SSA

and V

sys
sys
sys
sys

SSD

ns
ns
ns
ns

reset time 1 −−µs

bit clock frequency −−64f

Hz

s

bit clock HIGH time 50 −−ns
bit clock LOW time 50 −−ns
rise time −−20 ns
fall time −−20 ns
set-up time data input 20 −−ns
hold time data input 0 −−ns
set-up time word select 20 −−ns
hold time word select 10 −−ns

);

Note

1. The typical value of the timing is specified at f

= 44.1 kHz (sampling frequency).

s

2000 Jul 31 14

Philips Semiconductors Product specification

Low power audio DAC UDA1334BTS

handbook, full pagewidth

handbook, full pagewidth

WS

t

CWH

t

CWL

T

sys

MGR984

Fig.6 System clock timing.

t

h(WS)

BCK

DATAI

t

BCKH

t

r

T

cy(BCK)

t

f

t

BCKL

Fig.7 Serial interface timing.

2000 Jul 31 15

t

su(WS)

t

su(DATAI)

t

h(DATAI)

MGL880

Philips Semiconductors Product specification

Low power audio DAC UDA1334BTS

15 APPLICATION INFORMATION

handbook, full pagewidth

system

clock

R5

47 Ω

SYSCLK

BCK

WS

DATAI
SFOR1
SFOR0

MUTE

DEEM

PCS

15 13

6

1

2
3
7
11

8
9

10

analog

supply voltage

C9

47 µF

(16 V)

C10

100 nF

(63 V)

V

SSA

UDA1334BTS

V

R7
1 Ω

DDA

digital

supply voltage

C5

47 µF

(16 V)

C6

100 nF

(63 V)

V

SSD

45

V

R6
1 Ω

DDD

14

16

12

VOUTL

VOUTR

V

ref(DAC)

C3

47 µF
(16 V)

C4

47 µF
(16 V)

C8
100 nF
(63 V)

100 Ω

R1
220 kΩ

100 Ω

R2
220 kΩ

R3

R4

C7
47 µF
(16 V)

C1

C2

10 nF
(63 V)

10 nF
(63 V)

MGL965

left
output

right
output

Fig.8 Typical application diagram.

2000 Jul 31 16

Philips Semiconductors Product specification

Low power audio DAC UDA1334BTS

16 PACKAGE OUTLINE

SSOP16: plastic shrink small outline package; 16 leads; body width 4.4 mm

SOT369-1

D

c

y

Z

16

pin 1 index

9

18

w M

b

e

p

E

H

E

A

2

A

1

L

detail X

A

X

v M

A

Q

(A )

L

p

A

3

θ

0 2.5 5 mm

scale

DIMENSIONS (mm are the original dimensions)

UNIT A1A2A

Note

1. Plastic or metal protrusions of 0.20 mm maximum per side are not included.

A

max.

0.15

mm

1.5

OUTLINE
VERSION

SOT369-1 MO-152

0.00

1.4

1.2

IEC JEDEC EIAJ

0.25

b

3

p

0.32

0.25

0.20

0.13

(1)E(1)

cD

5.30

5.10

REFERENCES

4.5

4.3

0.65

2000 Jul 31 17

eHELLpQZywv θ

1.0

0.75

0.45

0.65

0.45

PROJECTION

0.130.2 0.1

EUROPEAN

6.6

6.2

(1)

0.48

0.18

ISSUE DATE

95-02-04
99-12-27

o

10

o

0

Philips Semiconductors Product specification

Low power audio DAC UDA1334BTS

17 SOLDERING

17.1 Introduction to soldering surface mount
packages

Thistextgivesaverybriefinsight to a complex technology.
A more in-depth account of soldering ICs can be found in
our

“Data Handbook IC26; Integrated Circuit Packages”

(document order number 9398 652 90011).
There is no soldering method that is ideal for all surface

mount IC packages. Wave soldering is not alwayssuitable
for surface mount ICs, or for printed-circuit boards with
high population densities. In these situations reflow
soldering is often used.

17.2 Reflow soldering

Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
tothe printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.

Several methods exist for reflowing; for example,
infrared/convection heating in a conveyor type oven.
Throughput times (preheating, soldering and cooling) vary
between 100 and 200 seconds depending on heating
method.

Typical reflow peak temperatures range from
215 to 250 °C. The top-surface temperature of the
packages should preferable be kept below 230 °C.

If wave soldering is used the following conditions must be
observed for optimal results:

• Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.

• For packages with leads on two sides and a pitch (e):
– larger than or equal to 1.27 mm, the footprint

longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;

– smaller than 1.27 mm, the footprint longitudinal axis

must be parallel to the transport direction of the
printed-circuit board.

The footprint must incorporate solder thieves at the
downstream end.

• Forpackageswithleadsonfoursides,thefootprintmust
be placed at a 45° angle to the transport direction of the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.

During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.

Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.

17.3 Wave soldering

Conventional single wave soldering is not recommended
forsurfacemountdevices(SMDs)orprinted-circuitboards
with a high component density, as solder bridging and
non-wetting can present major problems.

To overcome these problems the double-wave soldering
method was specifically developed.

2000 Jul 31 18

17.4 Manual soldering

Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300 °C.

When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320 °C.

Philips Semiconductors Product specification

Low power audio DAC UDA1334BTS

17.5 Suitability of surface mount IC packages for wave and reflow soldering methods

PACKAGE

WAVE REFLOW

(1)

BGA, LFBGA, SQFP, TFBGA not suitable suitable

SOLDERING METHOD

HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, SMS not suitable

(3)

PLCC

, SO, SOJ suitable suitable
LQFP, QFP, TQFP not recommended
SSOP, TSSOP, VSO not recommended

(2)

(3)(4)
(5)

suitable

suitable
suitable

Notes

1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the

“Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”

.

2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink
(at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version).

3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.
The package footprint must incorporate solder thieves downstream and at the side corners.

4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm;
it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.

5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is
definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.

2000 Jul 31 19

Philips Semiconductors Product specification

Low power audio DAC UDA1334BTS

18 DATA SHEET STATUS

DATA SHEET STATUS

Objective specification Development This data sheet contains the design target or goal specifications for

Preliminary specification Qualification This data sheet contains preliminary data, and supplementary data will be

Product specification Production This data sheet contains final specifications. Philips Semiconductors

Note

1. Please consult the most recently issued data sheet before initiating or completing a design.

19 DEFINITIONS
Short-form specification  The data in a short-form

specification is extracted from a full data sheet with the
same type number and title. For detailed information see
the relevant data sheet or data handbook.

Limiting values definition  Limiting values given are in
accordance with the Absolute Maximum Rating System
(IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device.
These are stress ratings only and operation of the device
attheseorat any other conditions above those given in the
Characteristics sections of the specification is not implied.
Exposure to limiting values for extended periods may
affect device reliability.

Application information  Applications that are
described herein for any of these products are for
illustrative purposes only. Philips Semiconductors make
norepresentationorwarrantythatsuchapplicationswillbe
suitable for the specified use without further testing or
modification.

PRODUCT

STATUS

DEFINITIONS

product development. Specification may change in any manner without
notice.

published at a later date. Philips Semiconductors reserves the right to
make changes at any time without notice in order to improve design and
supply the best possible product.

reserves the right to make changes at any time without notice in order to
improve design and supply the best possible product.

20 DISCLAIMERS Life support applications  These products are not

designed for use in life support appliances, devices, or
systems where malfunction of these products can
reasonably be expected to result in personal injury.Philips
Semiconductorscustomersusingorsellingtheseproducts
for use in such applications do so at their own risk and
agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.

Right to make changes  Philips Semiconductors
reserves the right to make changes, without notice, in the
products, including circuits, standard cells, and/or
software, described or contained herein in order to
improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for
theuseofanyoftheseproducts,conveysnolicenceortitle
under any patent, copyright, or mask work right to these
products,andmakes no representations or warranties that
these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified.

(1)

2000 Jul 31 20

Philips Semiconductors Product specification

Low power audio DAC UDA1334BTS

NOTES

2000 Jul 31 21

Philips Semiconductors Product specification

Low power audio DAC UDA1334BTS

NOTES

2000 Jul 31 22

Philips Semiconductors Product specification

Low power audio DAC UDA1334BTS

NOTES

2000 Jul 31 23

Philips Semiconductors – a w orldwide compan y

Argentina: see South America
Australia: 3 Figtree Drive, HOMEBUSH, NSW 2140,

Tel. [phone], Fax. [phone]
Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213,

Tel. [phone], Fax. [phone]
Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6,

220050 MINSK, Tel. [phone], Fax. [phone]

Belgium: see The Netherlands
Brazil: see South America
Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor,

51 James Bourchier Blvd., 1407 SOFIA,
Tel. [phone], Fax. [phone]

Canada: PHILIPS SEMICONDUCTORS/COMPONENTS,
Tel. [phone], Fax. [phone]

China/Hong Kong: 501 Hong Kong Industrial Technology Centre,
72 Tat Chee Avenue, Kowloon Tong, HONG KONG,
Tel. [phone], Fax. [phone]

Colombia: see South America
Czech Republic: see Austria
Denmark: Sydhavnsgade 23, 1780 COPENHAGEN V,

Tel. [phone], Fax. [phone]
Finland: Sinikalliontie 3, FIN-02630 ESPOO,

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Hungary: see Austria
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Indonesia: PT Philips DevelopmentCorporation, SemiconductorsDivision,
Gedung Philips, Jl. Buncit Raya Kav.99-100, JAKARTA 12510,
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Ireland: Newstead, Clonskeagh, DUBLIN 14,
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Israel: RAPAC Electronics, 7 Kehilat Saloniki St, PO Box 18053,
TEL AVIV 61180, Tel. [phone], Fax. [phone]

Italy: PHILIPS SEMICONDUCTORS,Via Casati, 23 - 20052 MONZA(MI),
Tel. [phone], Fax [phone]

Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku,
TOKYO 108-8507, Tel. [phone], Fax. [phone]

Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL,
Tel. [phone], Fax. [phone]

Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR,
Tel. [phone], Fax. [phone]

Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905,
Tel. [phone], Fax [phone]

Middle East: see Italy

Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB,

Tel. [phone], Fax. [phone]
New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND,

Tel. [phone], Fax. [phone]
Norway: Box 1, Manglerud 0612, OSLO,

Tel. [phone], Fax. [phone]

Pakistan: see Singapore
Philippines: Philips Semiconductors Philippines Inc.,

106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI,
Metro MANILA, Tel. [phone], Fax. [phone]

Poland: Al.Jerozolimskie 195 B, 02-222 WARSAW,
Tel. [phone], Fax. [phone]

Portugal: see Spain
Romania: see Italy
Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW,

Tel. [phone], Fax. [phone]
Singapore: Lorong 1, Toa Payoh, SINGAPORE 319762,

Tel. [phone], Fax. [phone]

Slovakia: see Austria
Slovenia: see Italy
South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale,

2092 JOHANNESBURG, P.O. Box 58088 Newville 2114,
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04547-130 SÃO PAULO, SP, Brazil,
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Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM,
Tel. [phone], Fax. [phone]

Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH,
Tel. [phone] Fax. [phone]

Taiwan: Philips Semiconductors, 5F, No. 96, Chien Kuo N. Rd., Sec. 1,
TAIPEI, Taiwan Tel. [phone], Fax. [phone]

Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd.,
60/14 MOO 11, Bangna Trad Road KM. 3, Bagna, BANGKOK 10260,
Tel. [phone], Fax. [phone]

Turkey: Yukari Dudullu, Org. San. Blg., 2.Cad. Nr. 28 81260 Umraniye,
ISTANBUL, Tel. [phone], Fax. [phone]

Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7,
252042 KIEV, Tel. [phone], Fax. [phone]

United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes,
MIDDLESEX UB3 5BX, Tel. [phone], Fax. [phone]

United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,
Tel. [phone], Fax. [phone]

Uruguay: see South America
Vietnam: see Singapore
Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,

Tel. [phone], Fax.[phone]

For all other countries apply to: Philips Semiconductors,
Marketing Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN,
The Netherlands, Fax. [phone]

© Philips Electronics N.V. SCA
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.

The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.

2000

Internet: http://www.semiconductors.philips.com

70

Printed in The Netherlands 753503/25/02/pp24 Date of release: 2000 Jul 31 Document order number: 9397750 07239