Page 1
STP10NK80Z - STP10NK80ZFP
STW10NK80Z
N-CHANNEL 800V - 0.78Ω - 9A TO-220/TO-220FP/TO-247
Zener-Protected SuperMESH™Power M OSF ET
TYPE V
STP10NK80Z
STP10NK80ZFP
STW10NK80Z
■ TYPICAL R
■ EXTREMELY HIGHdv/dt CAPABILITY
■ 100% AVALANCHE TESTED
■ GATE CHARGE MINIMIZED
■ VERY LOW INTRINSICCAPACITANCES
■ VERY GOOD MANUFACTURING
800 V
800 V
800 V
(on) = 0.78 Ω
DS
DSS
R
DS(on)
< 0.90 Ω
< 0.90 Ω
< 0.90 Ω
I
D
9A
9A
9A
Pw
160 W
40 W
160 W
REPEATIBILITY
DESCRIPTION
The SuperME SH™ series is obtained through an
extreme optimization of ST’s we ll established stripbased PowerMESH™ layout. In addition to pushing
on-resistance significantly down, special careis taken to ensure a very good dv/dt capability for the
most demanding applications. Such series complements S T full range of high voltage MOSFETs including revolutionary MDm es h™ products.
TO-220
1
3
2
TO-220FP
TO-247
INTERNAL SCHEMATIC DIAGRAM
3
2
1
APPLICATIONS
■ HIGH CURRENT, HIGH SPEED SWITCHING
■ SWITCH MODE POWER SUPPLIES
■ DC-AC CONVERTERS FOR WELDING, UPS
AND MOTOR DRIVE
ORDERING INFORMATION
SALES TYPE MARKING PACKAGE PACKAGING
STP10NK80Z P10NK80Z TO-220 TUBE
STP10NK80ZFP P10NK80ZFP TO-220FP TUBE
STW10NK80Z W10NK80Z TO-247 TUBE
1/11February 2003
Page 2
STP10NK80Z - STP10NK80ZF P - STW10NK80Z
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
STP10NK80Z STP10NK80ZFP STW10NK80Z
V
DS
V
DGR
V
GS
I
D
I
D
IDM()
P
TOT
V
ESD(G-S)
dv/dt (1) Peak Diode Recovery voltage slope 4.5 V/ns
V
ISO
T
j
T
stg
() Pulse width limited by safe operating area
(1) I
≤9A, di/dt ≤200A/µs, VDD≤ V
SD
(*) Limited only by maximum temperature allowed
Drain-source Voltage (VGS=0)
Drain-gate Voltage (RGS=20kΩ)
800 V
800 V
Gate- source Voltage ± 30 V
Drain Current (continuous) at TC= 25°C
Drain Current (continuous) at TC= 100°C
9 9 (*) 9 A
6 6 (*) 6 A
Drain Current (pulsed) 36 36 (*) 36 A
Total Dissipation at TC= 25°C
160 40 160 W
Derating Factor 1.28 0.32 1.28 W/°C
Gate source ESD(HBM-C=100pF, R=1.5KΩ) 4KV
Insulation Withstand Voltage (DC) - 2500 - V
Operating Junction Temperature
Storage Temperature
(BR)DSS,Tj≤TJMAX.
-55to150
-55to150
°C
°C
THERMAL DATA
TO-220 TO-220FP TO-247
Rthj-case Thermal Resistance Junction-case Max 0.78 3.1 0.78 °C/W
Rthj-amb Thermal Resistance Junction-ambient Max 62.5 50 °C/W
T
l
Maximum Lead Temperature For Soldering Purpose
300 °C
AVALANCHE CHARACTERISTICS
Symbol Parameter Max Value Unit
I
AR
Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by T
E
AS
Single Pulse Avalanche Energy
(starting T
max)
j
= 25 °C, ID=IAR,VDD=50V)
j
9A
290 mJ
GATE-SOURCE ZENER DIODE
Symbol Parameter Test Conditions Min. Typ. Max. Unit
BV
GSO
Gate-Source Breakdown
Igs=± 1mA (Open Drain) 30 V
Voltage
PROTECTION FEATURES OF GATE-TO-SOURCE ZENER DIODES
The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device’s
ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be
applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and
cost-effective intervention to protect the device’s integrity. These integrated Zener diodes thus avoid the
usage of external components.
2/11
Page 3
STP10NK80Z - STP10NK 80ZFP - STW10NK80Z
ELECTRICAL CHARACTERISTICS (TCASE =25°C UNLESS OT HERWISE SPECIFIED)
ON/OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
(BR)DSS
Drain-source
Breakdown Voltage
I
DSS
I
GSS
V
GS(th)
R
DS(on)
Zero Gate Voltage
Drain Current (V
GS
=0)
Gate-body Leakage
Current (V
DS
=0)
Gate Threshold Voltage
Static Drain-source On
Resistance
DYNAMIC
Symbol Parameter Test Conditions Min. Typ. Max. Unit
(1) Forward Transconductance VDS=15V,ID= 4.5 A 9.6 S
g
fs
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
(3) Equivalent Output
C
oss eq.
C
iss
C
oss
C
rss
Capacitance
SWITCHING ON
Symbol Parameter Test Conditions Min. Typ. Max. Unit
t
d(on)
Q
Q
Q
t
r
g
gs
gd
Turn-on Delay Time
Rise Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
ID=1mA,VGS= 0 800 V
V
= Max Rating
DS
VDS= Max Rating, TC= 125 °C
V
= ± 20V ±10 µA
GS
V
DS=VGS,ID
= 100µA
3 3.75 4.5 V
1
50
VGS=10V,ID= 4.5 A 0.78 0.9 Ω
=25V,f=1MHz,VGS= 0 2180
V
DS
205
38
VGS=0V,VDS= 0V to 640V 105 pF
VDD=400V,ID= 4.5 A
RG= 4.7Ω VGS=10V
30
20
(Resistive Load see, Figure 3)
=640V,ID=9A,
V
V
DD
GS
=10V
72
12.5
101
37
µA
µA
pF
pF
pF
ns
ns
nC
nC
nC
SWITCHING OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
t
d(off)
Turn-off Delay Time
t
f
Fall Time
VDD= 400 V, ID= 4.5 A
R
=4.7ΩVGS=10V
G
65
17
(Resistive Load see, Figure 3)
t
r(Voff)
t
t
f
c
Fall Time
Cross-over Time
Off-voltage Rise Time
= 640V, ID=9A,
V
DD
RG=4.7Ω, VGS= 10V
(Inductive Load see, Figure 5)
13
10
25
SOURCE DRAIN DIODE
Symbol Parameter Test Conditions Min. Typ. Max. Unit
I
SD
I
SDM
VSD(1)
t
rr
Q
rr
I
RRM
Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.
2. Pulse width limited by safe operating area.
3. C
Source-drain Current
(2)
Source-drain Current (pulsed)
Forward On Voltage
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
is defined as a constant equivalent capacitance giving the same charging time as C
oss eq.
.
V
DSS
ISD= 9 A, VGS=0
I
SD
VDD=45V,Tj= 150°C
(see test circuit, Figure 5)
= 9 A, di/dt = 100A/µs
645
6.4
20
when VDSincreases from 0 to 80%
oss
9
36
1.6 V
ns
ns
ns
ns
ns
A
A
ns
µC
A
3/11
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STP10NK80Z - STP10NK80ZF P - STW10NK80Z
Safe Operating Area For TO-220 Thermal Imped ance For TO-220
Thermal Impedance For TO-220F PSafe Operating Area For TO-220FP
4/11
Thermal Impedance For TO-247Safe Operating Area For TO-247
Page 5
STP10NK80Z - STP10NK 80ZFP - STW10NK80Z
Output Characteristics
Transconductance
Transfer Characteristics
Static Drain-source O n Resistance
Gate Charge vs Gate-so urce Voltage
Capacitance Variations
5/11
Page 6
STP10NK80Z - STP10NK80ZF P - STW10NK80Z
Normalized Gate Threshold Voltage vs Temp. Normalized On Resistance vs Temperature
Source-drain Diode Forward Characteristics
Maximum Avalanche Energy vs Temperature
Normalized BVDSS vs Temperature
6/11
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STP10NK80Z - STP10NK 80ZFP - STW10NK80Z
Fig. 2: Unclamped Inductive WaveformFig. 1: Unclamped Inductive Load Test Circuit
Fig. 3: Switching Times Test Circuit For
Resistive Load
Fig. 5: Test Circuit For Inductive Load Switching
And Diode Recovery Times
Fig. 4: Gate Charge test Circuit
7/11
Page 8
STP10NK80Z - STP10NK80ZF P - STW10NK80Z
E
P011C
TO-220 MECHANICAL DATA
DIM.
A 4.40 4.60 0.173 0.181
C 1.23 1.32 0.048 0.051
D 2.40 2.72 0.094 0.107
D1 1.27 0.050
E 0.49 0.70 0.019 0.027
F 0.61 0.88 0.024 0.034
F1 1.14 1.70 0.044 0.067
F2 1.14 1.70 0.044 0.067
G 4.95 5.15 0.194 0.203
G1 2.4 2.7 0.094 0.106
H2 10.0 10.40 0.393 0.409
L2 16.4 0.645
L4 13.0 14.0 0.511 0.551
L5 2.65 2.95 0.104 0.116
L6 15.25 15.75 0.600 0.620
L7 6.2 6.6 0.244 0.260
L9 3.5 3.93 0.137 0.154
DIA. 3.75 3.85 0.147 0.151
MIN. TYP. MAX. MIN. TYP. MAX.
mm inch
A
C
D
8/11
L5
Dia.
L7
D1
L6
L2
L9
F1
G1
F
H2
G
F2
L4
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STP10NK80Z - STP10NK 80ZFP - STW10NK80Z
TO-220FP MECHANICAL DATA
DIM.
A 4.4 4.6 0.173 0.181
B 2.5 2.7 0.098 0.106
D 2.5 2.75 0.098 0.108
E 0.45 0.7 0.017 0.027
F 0.75 1 0.030 0.039
F1 1.15 1.5 0.045 0.067
F2 1.15 1.5 0.045 0.067
G 4.95 5.2 0.195 0.204
G1 2.4 2.7 0.094 0.106
H 10 10.4 0.393 0.409
L2 16 0.630
L3 28.6 30.6 1.126 1.204
L4 9.8 10.6 .0385 0.417
L5 2.9 3.6 0.114 0.141
L6 15.9 16.4 0.626 0.645
L7 9 9.3 0.354 0.366
Ø 3 3.2 0.118 0.126
MIN. TYP MAX. MIN. TYP. MAX.
mm. inch
E
A
D
B
L3
L6
L7
¯
F1
F
G1
H
G
F2
123
L2
L5
L4
9/11
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STP10NK80Z - STP10NK80ZF P - STW10NK80Z
TO-247 MECHANICAL DATA
DIM.
A 4.85 5.15 0.19 0.20
D 2.20 2.60 0.08 0.10
E 0.40 0.80 0.015 0.03
F 1 1.40 0.04 0.05
F1 3 0.11
F2 2 0.07
F3 2 2.40 0.07 0.09
F4 3 3.40 0.11 0.13
G 10.90 0.43
H 15.45 15.75 0.60 0.62
L 19.85 20.15 0.78 0.79
L1 3.70 4.30 0.14 0.17
L2 18.50 0.72
L3 14.20 14.80 0.56 0.58
L4 34.60 1.36
L5 5.50 0.21
M 2 3 0.07 0.11
V
V2
Dia 3.55 3.65 0.14 0.143
MIN. TYP MAX. MIN. TYP. MAX.
mm. inch
5º 5º
60º 60º
10/11
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STP10NK80Z - STP10NK 80ZFP - STW10NK80Z
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the
consequences of u se of such inf ormat ion nor for any in fring ement of p aten ts or othe r ri ghts of th ird p arties whic h may resul t f rom
its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications
mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information
previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or
systems without express written approval of STMicroelectronics.
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11/11
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