Page 1
N - CHANNEL 100V - 0.07 Ω - 16A DPAK
TYPE V
DSS
ST D16N E 10L 100 V < 0.10 Ω 16 A
■ TYPICALR
■ AVALANCHERUGGEDTECHNOLOGY
■ LOW GATE CHARGE
■ HIGHCURRENT CAPABILITY
■ 175
■ LOW THRESHOLDDRIVE
■ ADDSUFFIX ”T4” FORORDERING IN TAPE
o
C OPERATINGTEMPERATURE
DS(on)
= 0.07 Ω
& REEL
DESCRIPTION
This Power MOSFET is the latest developmentof
STMicroelectronics unique ”Single Feature
Size” strip-based process. The resulting transi-
stor shows extremelyhigh packing density forlow
on-resistance, rugged avalanche characteristics
and less critical alignment steps therefore a remarkablemanufacturingreproducibility.
R
DS(o n)
I
D
STD16NE10L
STripFET POWER MOSFET
PRELIMINARY DATA
3
1
DPAK
TO-252
(Suffix ”T4”)
INTERNAL SCHEMATIC DIAGRAM
APPLICATIONS
■ HIGHCURRENT, HIGH SPEEDSWITCHING
■ SOLENOIDAND RELAY DRIVERS
■ DC-DC& DC-AC CONVERTERS
■ AUTOMOTIVEENVIRONMENT
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Uni t
V
V
V
I
DM
P
dv/dt (
T
(•) Pulse width limited by safe operating area (1)ISD≤16A, di/dt ≤ 300 A/µs, VDD≤ V
Dra in- sour c e Vol ta ge (VGS= 0) 100 V
DS
Drain- gate Voltage (RGS=20kΩ) 100 V
DGR
Gate-s ource Voltage ± 20 V
GS
Dra in Current ( cont inuous) at Tc=25oC16A
I
D
Dra in Current ( cont inuous) at Tc= 100oC11A
I
D
(•) Dr a in Current ( pulsed) 64 A
Tot al Dissipation a t Tc=25oC55W
tot
Der ati ng Fact or 0.36 W/
1) P eak Diode Reco ve ry volta ge slope 7 V/ ns
St orage Temperat ure -65 to 175
stg
Max. Operat ing Junct ion Te m pe ra t ure 175
T
j
,Tj≤T
(BR)DSS
JMAX
o
C
o
C
o
C
May 2000
1/6
Page 2
STD16NE10L
THERMAL DATA
R
thj-pcb
R
thj-amb
R
thj-sink
T
AVALANCHE CHARACTERISTICS
Symbol Parameter Max V alue Unit
I
AR
E
Ther mal Resistanc e Junct ion-PC B oa rd Max
Ther mal Resistanc e Junct ion-ambient Max
Ther mal Resistanc e Case-sink Ty p
Maximum Lead Te m perature For Soldering Purpos e
l
Avalanche C urrent, R epetitive or Not-Repetitive
(pulse width limited by T
Single Pulse Avalanche Energy
AS
(starting T
=25oC, ID=IAR,VDD=30V)
j
max)
j
2.73
100
1.5
275
16 A
75 mJ
o
C/W
o
C/W
o
C/W
o
C
ELECTRICAL CHARACTERISTICS
=25oC unless otherwisespecified)
(T
case
OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
(BR)DSS
Drain-source
ID=250µAVGS= 0 100 V
Break dow n Voltage
I
DSS
I
GSS
Zero Gate Volta ge
Drain Current (V
GS
Gat e- bod y L eak ag e
Current (V
DS
=0)
=0)
V
=MaxRating
DS
=MaxRating Tc= 125oC
V
DS
V
=± 20 V
GS
1
10
100 nA
±
ON (∗)
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
GS(th)
R
DS(on)
I
D(on)
Gate Threshold Voltage VDS=VGSID= 250 µ A11.72.5V
Sta t ic Drain -s ource On
Resistance
VGS=10V ID=8A
=5V ID=8A
V
GS
On State Drain Current VDS>I
D(on)xRDS(on )max
0.07
0.085
16 A
0.085
0.1
VGS=10V
DYNAMIC
Symbol Parameter Test Conditions Min. Typ. Max. Unit
g
(∗)Forward
fs
Tr ansc on duc tance
C
C
C
Input C apaci t anc e
iss
Out put Capacitanc e
oss
Reverse Tr ansfer
rss
Capacit a nc e
VDS>I
D(on)xRDS(on )maxID
=8A 5 9 S
VDS=25V f=1MHz VGS= 0 V 1750
165
45
µ
µA
Ω
Ω
pF
pF
pF
A
2/6
Page 3
STD16NE10L
ELECTRICAL CHARACTERISTICS
(continued)
SWITCHING ON
Symbol Parameter Test Conditions Min. Typ. Max. Unit
t
d(on)
Tur n-on Delay Time
Rise Ti m e
t
r
VDD=50V ID=8A
R
=4.7
G
Ω
VGS=4.5V
40
80
(Resis t iv e Loa d, see fig. 3 )
Q
Q
Q
Tot al Gat e Charge
g
Gat e- Source Charg e
gs
Gate-Drain Charge
gd
VDD=80V ID=16A VGS=5V 24
5.5
11
32 nC
SWITCHING OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
t
d(off)
Tur n-of f D ela y Time
t
Fall T ime
f
VDD=50V ID=8A
=4.7 Ω VGS=4.5V
R
G
45
12
(Resis t iv e Loa d, see fig. 3 )
t
r(Voff)
t
t
Off-volt age Rise Time
Fall T ime
f
Cross-over T im e
c
VDD=80V ID=16A
=4.7 Ω VGS=4.5V
R
G
(Indu ct iv e Load, s e e fig . 5)
12
17
35
SOURCEDRAIN DIODE
Symbol Parameter Test Conditions Min. Typ. Max. Unit
I
SD
I
SDM
V
SD
t
Q
I
RRM
(∗) Pulsed:Pulse duration = 300µs, duty cycle 1.5%
(•) Pulse width limited by safe operating area
Source-drain Current
(•)
Source-drain Current
16
64
(pulsed)
(∗)ForwardOnVoltage ISD=16A VGS=0 1.5 V
Reverse Recover y
rr
Time
Reverse Recover y
rr
ISD= 16 A di/dt = 100 A/µs
=40V Tj=150oC
V
DD
(see test circuit, fig. 5)
100
300
Charge
Reverse Recover y
6
Current
ns
ns
nC
nC
ns
ns
ns
ns
ns
A
A
ns
nC
A
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Page 4
STD16NE10L
Fig. 1
: UnclampedInductiveLoad Test Circuit
Fig. 3: Switching Times Test Circuits For
ResistiveLoad
Fig. 2
: UnclampedInductive Waveform
Fig. 4: Gate Charge test Circuit
Fig. 5
: Test Circuit For Inductive Load Switching
And Diode Recovery Times
4/6
Page 5
TO-252 (DPAK) MECHANICAL DATA
STD16NE10L
DIM.
mm inch
MIN. TYP. MAX. MIN. TYP. MAX.
A 2.2 2.4 0.086 0.094
A1 0.9 1.1 0.035 0.043
A2 0.03 0.23 0.001 0.009
B 0.64 0.9 0.025 0.035
B2 5.2 5.4 0.204 0.212
C 0.45 0.6 0.017 0.023
C2 0.48 0.6 0.019 0.023
D 6 6.2 0.236 0.244
E 6.4 6.6 0.252 0.260
G 4.4 4.6 0.173 0.181
H 9.35 10.1 0.368 0.397
L2 0.8 0.031
L4 0.6 1 0.023 0.039
H
A
E
C2
L2
B2
==
==
DETAIL”A”
D
2
13
L4
A1
C
A2
DETAIL”A”
B
G
==
0068772-B
5/6
Page 6
STD16NE10L
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is
granted by implicationor otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are
subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a trademarkof STMicroelectronics
2000 STMicroelectronics – Printed in Italy – All Rights Reserved
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