This Power MOSFET is the latest development of
SGS-THOMSON unique ”Single Feature Size”
strip-basedprocess.Theresultingtransistor
shows extremely high packing density for low onresistance, rugged avalanche characteristics and
less critical alignment steps therefore a remarkable manufacturingreproducibility.
Ther mal Resist ance Junction-ca s eMax
Ther mal Resist ance Junction-am bientMax
Ther mal Resist ance Case-si nkT yp
Maximum Lead Tempera t ure F o r S oldering Pur p ose
l
Avalanch e Curre nt , R epetit i v e o r Not- Re petit ive
(pulse w idth limited b y T
Single Pulse Avalanche Energy
AS
(starting T
=25oC, ID=IAR,VDD=30V)
j
max, δ <1%)
j
3.0
100
1.5
275
16A
75mJ
o
C/W
oC/W
o
C/W
o
C
ELECTRICAL CHARACTERISTICS (T
=25oC unlessotherwisespecified)
case
OFF
SymbolParameterTest C ondition sMin.Typ.Max.Unit
V
(BR)DSS
Drain-sou rc e
=250µAVGS=0
I
D
100V
Breakdown Voltage
I
DSS
I
GSS
Zer o G at e Voltage
Drain Cur rent (V
GS
Gat e-body Le ak a ge
Current (V
DS
=0)
=0)
=MaxRating
V
DS
V
=MaxRatingTc=125
DS
o
C
= ± 20 V
V
GS
1
10
± 100nA
ON (∗)
SymbolParameterTest C ondition sMin.Typ.Max.Unit
V
GS(th )
Gate Threshold
V
DS=VGSID
=250µA
234V
Voltage
R
DS(on)
Stati c Drain-so urce O n
VGS=10V ID=8A0.070.1Ω
Resistance
I
D(on)
On S tate D rain Cur rent VDS>I
D(on)xRDS(on)max
16A
VGS=10V
DYNAMIC
SymbolParameterTest C ondition sMin.Typ.Max.Unit
g
(∗)Forward
fs
Tr anscond uctance
C
C
C
Input Ca pac i t an c e
iss
Out put C apacitanc e
oss
Reverse T ransfer
rss
Capa cit an c e
VDS>I
D(on)xRDS(on)maxID
=8 A5S
VDS=25V f=1MHz VGS= 01600
180
50
2100
250
70
µA
µA
pF
pF
pF
2/9
Page 3
STD16NE10
ELECTRICAL CHARACTERISTICS (continued)
SWITCHINGON
SymbolParameterTest C ondition sMin.Typ.Max.Unit
t
d(on)
Turn-on Tim e
r
Rise T ime
t
VDD=50VID=10A
=4.7 ΩVGS=10V
R
G
17
37
(see test circuit, figure 3)
Q
Q
Q
Total Gate Charge
g
Gat e-Sou r ce Charge
gs
Gate-Drain Charge
gd
VDD=80V ID=20A VGS=10V38
10
12
SWITCHINGOFF
SymbolParameterTest C ondition sMin.Typ.Max.Unit
t
r(Voff)
t
t
Of f - voltag e Ris e Tim e
Fall Time
f
Cross-over T ime
c
VDD=80V ID=20A
=4.7 Ω VGS=10V
R
G
(see test circuit, figure 5)
11
18
32
SOURCE DRAIN DIODE
SymbolParameterTest C ondition sMin.Typ.Max.Unit
I
SD
I
SDM
V
SD
t
Q
I
RRM
(∗) Pulsed: Pulse duration =300 µs, duty cycle1.5 %
(•) Pulse width limited by safe operating area
Information furnished is believed tobe accurate and reliable. However,STMicroelectronicsassumes no responsibility for theconsequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is
granted by implication orotherwise under any patent orpatent rights of STMicroelectronics. Specification mentioned in this publication are
subject tochange withoutnotice. This publication supersedes andreplaces allinformation previously supplied.STMicroelectronics products
are not authorized for use as critical components in lifesupport devices orsystems withoutexpress written approval of STMicroelectronics.
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The ST logo isa trademarkof STMicroelectronics
1998 STMicroelectronics– Printed in Italy – AllRightsReserved
STMicroelectronicsGROUP OF COMPANIES
.
9/9
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