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N - CHANNEL 100V- 0.073Ω - 15A TO-252
LOW GATE CHARGE STripFET POWER MOSFET
TYPE V
DSS
ST D15N F 10 100 V < 0.08 Ω 15 A
■ TYPICALR
■ EXCEPTIONALdv/dtCAPABILITY
■ 100%AVALANCHETESTED
■ APPLICATIONORIENTED
DS(on)
= 0.073 Ω
CHARACTERIZATION
■ SURFACE-MOUNTINGDPAK (TO-252)
POWERPACKAGEIN TAPE & REEL
(SUFFIX”T4”)
DESCRIPTION
This MOSFET series realized with
STMicroelectronicsunique STripFET process has
specifically been designed to minimize input
capacitance and gate charge. It is therefore
suitable as primary switch in advanced
high-efficiency, high-frequency isolated DC-DC
converters for Telecom and Computer
applications. It is also intended for any
applicationswith low gate drive requirements.
R
DS(on)
I
D
STD15NF10
PRELIMINARY DATA
3
1
DPAK
TO-252
(Suffix ”T4”)
INTERNAL SCHEMATIC DIAGRAM
APPLICATIONS
■ HIGH-EFFICIENCYDC-DC CONVERTERS
■ UPSAND MOTORCONTROL
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Uni t
V
V
V
I
DM
P
dv/ dt (
E
AS
T
(•) Pulse width limitedby safe operatingarea (2) starting Tj
April 2000
Dra in- sour c e Volta ge (VGS= 0) 100 V
DS
Drain- gate Voltage (RGS=20kΩ) 100 V
DGR
Gate-s ource Voltage ± 20 V
GS
Dra in Cu rr ent (cont inuous) at Tc=25oC15A
I
D
Dra in Cu rr ent (cont inuous) at Tc= 100oC10A
I
D
(•) Dra in Cu rr ent (pulsed) 60 A
Tot al Dissipation at Tc=25oC45W
tot
Der ati ng F a c tor 0.3 W/
1 ) Peak Diode R ecovery volt a ge slope 9 V/ ns
(2) Single Pulse Av alan c he En er gy 75 mJ
St orage T emperat ur e -65 to 175
stg
Max. Operating Jun c t ion Tem pe ra tur e 175
T
j
=25oC, ID=24A, VDD= 50V (1) ISD≤ 80 A, di/dt ≤ 300A/µs, VDD≤ V
(BR)DSS,Tj≤TJMA
o
C
o
C
o
C
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Page 2
STD15NF10
THERMAL DATA
R
thj-case
R
thj-amb
T
Ther mal Resistanc e Junct ion-case Max
Ther mal Resistanc e Junct ion-ambient Max
Maximum Lead Tempe ra t ure For Solder ing Purpose
l
3.33
62.5
300
o
C/W
o
C/W
o
C
ELECTRICAL CHARACTERISTICS
=25oC unless otherwisespecified)
(T
case
OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
(BR)DSS
Drain-source
ID=250µAVGS= 0 100 V
Break dow n Voltage
I
DSS
I
GSS
Zero Gate Voltage
Drain Current (V
GS
Gat e- bod y Leak ag e
Current (V
DS
=0)
=0)
V
=MaxRating
DS
=MaxRating Tc=125oC
V
DS
V
= ± 20 V ± 100 nA
GS
1
10
ON(∗)
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
GS(th)
R
DS(on)
Gate Threshold Voltage VDS=VGSID= 250 µA 234V
Sta t ic Drain-s ource On
VGS=10V ID= 7.5 A 0.073 0.08 Ω
Resistance
I
D(on)
On State Drain Current VDS>I
D(on)xRDS(on)max
15 A
VGS=10V
DYNAMIC
Symbol Parameter Test Conditions Min. Typ. Max. Unit
g
(∗)Forward
fs
Tr ansc on duc tance
C
C
C
Input Capaci t anc e
iss
Out put Capac it ance
oss
Reverse Transfer
rss
Capacit a nc e
VDS>I
D(on)xRDS(on)maxID
=7.5 A 20 S
VDS=25V f=1MHz VGS= 0 870
125
52
µA
µ
pF
pF
pF
A
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Page 3
STD15NF10
ELECTRICAL CHARACTERISTICS
(continued)
SWITCHINGON
Symbol Parameter Test Conditions Min. Typ. Max. Unit
t
d(on)
Tur n-on Delay T ime
Rise Tim e
t
r
VDD=50V ID=12A
R
=4.7
G
Ω
VGS=10V
58
45
(Resis t iv e Load, s ee fig. 3 )
Q
Q
Q
Tot al Gate Charge
g
Gat e- Source Charge
gs
Gate-Drain Charge
gd
VDD=80V ID=15A VGS=10V 30
6
10
SWITCHINGOFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
t
d(off)
Tur n-of f Dela y T im e
t
Fall T ime
f
VDD=27V ID=12A
=4.7 Ω VGS=10V
R
G
49
17
(Resis t iv e Load, s ee fig. 3 )
t
d(off)
Off-voltage Rise Time
t
Fall T ime
f
t
Cross-over Time
c
Vclamp = 80 V ID=15A
=4.7 Ω VGS=10V
R
G
(Indu ct iv e Load , se e f ig. 5)
43
36
39
SOURCEDRAINDIODE
Symbol Parameter Test Conditions Min. Typ. Max. Unit
I
SD
I
SDM
V
SD
t
Q
I
RRM
(∗)Pulsed:Pulse duration = 300 µs, duty cycle 1.5 %
(•) Pulse width limited by safe operatingarea
Source-drain Current
(•)
Source-drain Current
15
60
(pulsed)
(∗)ForwardOnVoltage ISD=15A VGS=0 1.5 V
Reverse Recovery
rr
Time
Reverse Recovery
rr
ISD= 15 A di/dt = 100 A/µs
=50V Tj=150oC
V
DD
(see test circuit, fig. 5)
100
375
Charge
Reverse Recovery
7.5
Current
ns
ns
nC
nC
nC
ns
ns
ns
ns
ns
A
A
ns
nC
A
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Page 4
STD15NF10
Fig. 1
: UnclampedInductive Load Test Circuit
Fig. 3: Switching Times Test Circuits For
ResistiveLoad
Fig. 2
: UnclampedInductiveWaveform
Fig. 4: Gate Charge test Circuit
Fig. 5
: Test Circuit For Inductive Load Switching
And Diode Recovery Times
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Page 5
TO-252 (DPAK) MECHANICAL DATA
STD15NF10
DIM.
mm inch
MIN. TYP. MAX. MIN. TYP. MAX.
A 2.2 2.4 0.086 0.094
A1 0.9 1.1 0.035 0.043
A2 0.03 0.23 0.001 0.009
B 0.64 0.9 0.025 0.035
B2 5.2 5.4 0.204 0.212
C 0.45 0.6 0.017 0.023
C2 0.48 0.6 0.019 0.023
D 6 6.2 0.236 0.244
E 6.4 6.6 0.252 0.260
G 4.4 4.6 0.173 0.181
H 9.35 10.1 0.368 0.397
L2 0.8 0.031
L4 0.6 1 0.023 0.039
H
A
E
C2
L2
B2
==
==
DETAIL”A”
D
2
13
L4
A1
C
A2
DETAIL”A”
B
G
==
0068772-B
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STD15NF10
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of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in thispublication are
subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
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