This application specific Power Mosfet is the third
generation of STMicroelectronics unique “Single
Feature Size
™” strip-based process. The resulting
transistor shows the best trade-off between on-resistance and gate charge. When used a s high and
low side in buck regulators , it gives the best performance in terms of both conduction and switching
losses. This is extremely important for motherboards where fast switching and high e fficiency are
of paramount importance.
APPLICATIONS
■ SPECIFICALLY DESIGNED AND OPTIMISED
FOR HIGH EFFICIENCY CPU CORE DC/DC
CONVERTERS
3
1
D2PAK
INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
SymbolParameterValueUnit
V
DS
V
DGR
V
GS
I
D
I
D
I
DM
P
TOT
T
stg
T
j
(●) Pulse width limited by safe operating area
Drain-source Voltage (VGS = 0)
Drain-gate Voltage (RGS = 20 kΩ)
Gate- source Voltage± 18V
Drain Current (continuos) at TC = 25°C
Drain Current (continuos) at TC = 100°C
(●)
Drain Current (pulsed)360A
Total Dissipation at TC = 25°C
Derating Factor0.73W/°C
Storage Temperature
Max. Operating Junction Temperature
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such informa tion n or for an y infring ement of patent s or other rig hts of third part ies which may resu lt from its use . No l i cen se i s
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are
subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
are not authorized for use as critical compo nents in life support devices or systems without express written approval of STMicroelectronics.
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