Page 1
STB8NS25
N-CHANNEL 250V - 0.38Ω - 8A D2PAK
MESH OVERLAY™ MOSFET
TYPE V
DSS
R
DS(on)
I
D
STB8NS25 250 V < 0.45 Ω 8 A
■ TYPICAL R
■ EXTREMELY HIGH dv /d t CAPABILITY
■ 100% AVALANCHE TESTED
(on) = 0.38 Ω
DS
DESCRIPTION
Using the latest high voltage MESH OVERLAY™
process, STMicroelectronics has designed an advanced family of power MOSFETs with outstanding
performance. The new patented STrip layout coupled with the Company’s proprietary edge termination structure, makes it suitable in coverters for
lighting applications.
APPLICATIONS
■ HIGH CURRENT, HIGH SPEED SWITCHING
■ SWITH MODE POWER SUPPLI ES (SMPS)
■ DC-DC CONVERTERS FOR TELECOM,
INDUSTRIAL, AND LIGHTING EQUIPMENT
3
1
D2PAK
INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
V
DS
V
DGR
V
GS
I
(*) Drain Current (continuos) at TC = 25°C
D
I
D
I
DM
P
TOT
dv/dt (1) Peak Diode Recovery voltage slope 5 V/ns
T
stg
T
j
(•)Pu l se width limite d by safe operating area
Drain-source Voltage (VGS = 0)
Drain-gate Voltage (RGS = 20 kΩ)
250 V
250 V
Gate- source Voltage ± 20 V
8A
Drain Current (continuos) at TC = 100°C
(●)
Drain Current (pulsed) 32 A
Total Dissipation at TC = 25°C
5A
80 W
Derating Factor 0.64 W/°C
Storage Temperature –65 to 150 °C
Max. Operating Junction Temperature 150 °C
(1) ISD≤ 8A, di/dt≤300 A/µs, VDD≤ V
(*)Limit ed only by max i m um temperat ure allowed
(BR)DSS
, Tj≤ T
jMAX
1/9July 2001
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STB8NS25
THERMA L D ATA
Rthj-case Thermal Resistance Junction-case Max 1.56 °C/W
Rthj-amb Thermal Resistance Junction-ambient Max 62.5 °C/W
T
l
AVALANCHE CHARACTERISTICS
Symbol Parameter Max Value Unit
I
AR
E
AS
ELECTRICAL CHARACTERISTICS (TCASE = 25 °C UNLESS OTHERWISE SPECIFIED)
OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
(BR)DSS
I
DSS
I
GSS
Maximum Lead Temperature For Soldering Purpose 300 °C
Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by T
max)
j
Single Pulse Avalanche Energy
(starting T
Drain-source
= 25 °C, ID = IAR, VDD = 50 V)
j
ID = 250 µA, VGS = 0 250 V
8A
300 mJ
Breakdown Voltage
= Max Rating
Zero Gate Voltage
Drain Current (V
GS
Gate-body Leakage
Current (V
DS
= 0)
= 0)
V
DS
V
= Max Rating, TC = 125 °C
DS
V
= ±20V ±100 nA
GS
1µA
10 µA
ON
(1)
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
GS(th)
R
DS(on)
Gate Threshold Voltage
Static Drain-source On
V
= VGS, ID = 250µA
DS
VGS = 10V, ID = 4 A
234V
0.38 0.45 Ω
Resistance
DYNAMIC
Symbol Parameter Test Conditions Min. Typ. Max. Unit
(1) Forward Transconductance VDS > I
g
fs
C
iss
C
oss
C
rss
Input Capacitance
Output Capacitance 118 pF
Reverse Transfer
Capacitance
I
D
V
=4A
DS
D(on)
x R
DS(on)max,
= 25V, f = 1 MHz, VGS = 0
78 S
770 pF
48 pF
2/9
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STB8NS25
ELECTRICAL CHARACTERISTICS (CONTINUED)
SWITCHING ON
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
t
d(on)
Q
Q
Q
t
r
g
gs
gd
Turn-on Delay Time
Rise Time 18 ns
Total Gate Charge
Gate-Source Charge 5.2 nC
Gate-Drain Charge 14.8 nC
SWITCHING OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
t
d(Voff)
t
t
r(Voff)
t
t
f
f
c
Turn-off- Delay Time
Fall Time
Off-voltage Rise Time
Fall Time
Cross-over Time
SOURCE DRAIN DIODE
Symbol Parameter Test Conditions Min. Typ. Max. Unit
I
SD
I
SDM
VSD (1)
t
rr
Q
rr
I
RRM
Note: 1. Pulsed: Pu l se duration = 300 µs, duty cyc l e 1.5 %.
2. Pulse width li mited by safe operating area.
Source-drain Current 8 A
(2)
Source-drain Current (pulsed) 32 A
Forward On Voltage
Reverse Recovery Time
Reverse Recovery Charge 1.1 µC
Reverse Recovery Current 11.3 A
= 125 V, ID = 4 A
DD
RG= 4.7Ω VGS = 10 V
(see test circuit, Figure 3)
V
= 200V, ID = 8 A,
DD
VGS = 10V
VDD = 125V, ID = 4 A,
RG=4.7Ω, V
GS
= 10V
(see test circuit, Figure 3)
V
= 200V, ID = 8 A,
clamp
R
=4.7Ω, V
G
GS
= 10V
(see test circuit, Figure 5)
ISD = 8 A, VGS = 0
I
= 8 A, di/dt = 100A/µs
SD
VDD = 30V, Tj = 150°C
(see test circuit, Figure 5)
13 ns
37 51.8 nC
51
16
12.5
12.5
28
1.7 V
198 ns
ns
ns
ns
ns
ns
Safe Operating Area Ther m al Imp e d ence
3/9
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STB8NS25
Output Characteristics Transfer Characteristics
Static Drain-source On ResistanceTransconductance
Gate Charge vs Gate-source Voltage Capacitance Variations
4/9
Page 5
Source-drain Diode Forward Characteristics
STB8NS25
Normalized On Resistance vs TemperatureNormalized Gate Thereshold Voltage vs Temp.
5/9
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STB8NS25
Fig. 2: Unclamped Inductive WaveformFig. 1: Unclamped Inductive Load Test Circuit
Fig. 3: Switching Times Test Circuit For
Resistive Load
Fig. 5: Test Circuit For Inductive Load Switching
And Diode Recovery Times
Fig. 4: Gate Charge test Circuit
6/9
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2
D
PAK MECHANICAL DATA
STB8NS25
DIM.
MIN. TYP MAX. MIN. TYP. MAX.
A 4.4 4.6 0.173 0.181
A1 2.49 2.69 0.098 0.106
A2 0.03 0.23 0.001 0.009
B 0.7 0.93 0.027 0.036
B2 1.14 1.7 0.044 0.067
C 0.45 0.6 0.017 0.023
C2 1.23 1.36 0.048 0.053
D 8.95 9.35 0.352 0.368
D1 8 0.315
E 10 10.4 0.393
E1 8.5 0.334
G 4.88 5.28 0.192 0.208
L 15 15.85 0.590 0.625
L2 1.27 1.4 0.050 0.055
L3 1.4 1.75 0.055 0.068
mm. inch
M 2.4 3.2 0.094 0.126
R 0.4 0.015
V2 0º8º
3
7/9
1
Page 8
STB8NS25
TAPE AND REEL SHIPMENT (suffix ”T4”)*
REEL MECHANICAL DATA
TAPE MECHANICAL D ATA
DIM.
A0 10.5 10.7 0.413 0.421
B0 15.7 15. 9 0.618 0.626
D 1.5 1.6 0.059 0.063
D1 1.59 1.61 0.062 0.063
E 1.65 1.85 0.0 65 0.073
F 11.4 11.6 0.449 0.456
K0 4.8 5.0 0.1 89 0.197
P0 3.9 4.1 0.153 0.161
P1 11.9 12.1 0.468 0.476
P2 1.9 2.1 0.075 0.082
R50 1.574
T 0.25 0.35 0.0098 0.0137
W 23.7 24.3 0.933 0.956
mm inch
MIN. MAX. MIN. MAX.
DIM.
A 330 12.992
B 1.5 0.059
C 12.8 13.2 0.504 0.520
D 20.2 0795
G 24.4 26.4 0.960 1.039
N 100 3.937
T 30.4 1.197
BASE QTY BULK QTY
mm inch
MIN. MAX. MIN. MAX.
1000 1000
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STB8NS25
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such informa tion n or for an y infring ement of patent s or other rig hts of third part ies which may resu lt from its use . No l i cen se i s
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are
subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
are not authorized for use as critical compo nents in life support devices or systems without express written approval of STMicroelectronics.
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The ST logo is a trademark of STMicroelectronics
© 2001 STMicroelectronics – Printed in Italy – All Rights Reserved
STMicroelectronics GROUP OF COMPANIES
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http://www.st.com
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