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STB85NF3LL
N-CHANNEL 30V - 0.006Ω - 85A D2PAK
LOW GATE CHARGE STripFET™II POWER MOSFET
TYPE V
DSS
R
DS(on)
I
D
STB85NF3LL 30 V < 0.008 Ω 85 A
■ TYPICAL R
■ OPTIMAL R
■ CONDUCTION LOSSES REDUCED
■ SWITCHING LOSSES REDUCED
■ ADD SUFFIX “T4” FOR ORDERING IN TAPE &
(on) = 0.0075Ω (@4.5V)
DS
(on) x Qg TRADE-OFF @4.5V
DS
REEL
DESCRIPTION
This application specific Power MOSFET is the third
genaration of STMicroelectronics unique “ Single
Feature Size” strip-based process. The resulting
transistor shows the best trade-off between on-resistance and gate charge. When used a s high and
low side in buck regulators , it gives the best performance in terms of both conduction and switching
losses. This is extremely important for motherboards where fast switching and high e fficiency are
of paramount importance.
APPLICATIONS
■ SPECIFICALLY DESIGNED AND OPTIMISED
FOR HIGH EFFICIENCY CPU CORE DC/DC
CONVERTERS
3
1
D2PAK
INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
V
DS
V
DGR
V
GS
V
GSM
I
D
I
D
I
DM
P
TOT
T
stg
T
j
(●) Pulse width limited by safe operating area
Drain-source Voltage (VGS = 0)
Drain-gate Voltage (RGS = 20 kΩ)
30 V
30 V
Gate- source Voltage ± 16 V
Gate-source Voltage Pulsed
≤50µs; duty cycle 25%; Tj ≤ 150°C)
(t
p
Drain Current (continuos) at TC = 25°C
Drain Current (continuos) at TC = 100°C
(l)
Drain Current (pulsed) 340 A
Total Dissipation at TC = 25°C
± 20 V
85 A
60 A
110 W
Derating Factor 0.73 W/°C
Storage Temperature –65 to 175 °C
Max. Operating Junction Temperature 175 °C
1/9November 2001
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STB85NF3LL
THERMA L D ATA
Rthj-case Thermal Resistance Junction-case Max 1.36 °C/W
Rthj-amb Thermal Resistance Junction-ambient Max 62.5 °C/W
T
l
ELECTRICAL CHARACTERISTICS (TCASE = 25 °C UNLESS OTHERWISE SPECIFIED)
OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
(BR)DSS
I
DSS
I
GSS
ON
(1)
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
GS(th)
R
DS(on)
Maximum Lead Temperature For Soldering Purpose 300 °C
Drain-source
ID = 250 µA, VGS = 0 30 V
Breakdown Voltage
Zero Gate Voltage
Drain Current (V
GS
= 0)
Gate-body Leakage
Current (V
DS
= 0)
Gate Threshold Voltage
Static Drain-source On
Resistance
V
= Max Rating
DS
V
= Max Rating, TC = 125 °C
DS
V
= ± 16V ±100 nA
GS
V
= VGS, ID = 250µA
DS
VGS = 10V, ID = 40 A
VGS = 4.5V, ID = 40 A
1V
0.006 0.008 Ω
0.0075 0.0095 Ω
1µA
10 µA
DYNAMIC
Symbol Parameter Test Conditions Min. Typ. Max. Unit
(1) Forward Transconductance VDS > I
g
fs
C
iss
C
oss
C
rss
Input Capacitance
Output Capacitance 635 pF
Reverse Transfer
Capacitance
ID= 40 A
V
DS
D(on)
x R
DS(on)max,
= 25V, f = 1 MHz, VGS = 0
30 S
2210 pF
138 pF
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STB85NF3LL
ELECTRICAL CHARACTERISTICS (CONTINUED)
SWITCHING ON
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
t
d(on)
Q
Q
Q
t
r
g
gs
gd
Turn-on Delay Time
Rise Time 130 ns
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
SWITCHING OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
t
d(off)
t
d(off)
t
f
t
f
t
c
Turn-off-Delay Time
Fall Time
Off-voltage Rise Time
Fall Time
Cross-over Time
SOURCE DRAIN DIODE
Symbol Parameter Test Conditions Min. Typ. Max. Unit
I
SD
I
SDM
VSD (1)
t
rr
Q
rr
I
RRM
Note: 1. Pulsed: Pu l se duration = 300 µs, duty c yc l e 1.5 %.
2. Pulse width li mited by safe operating area.
Source-drain Current 85 A
(2)
Source-drain Current (pulsed) 340 A
Forward On Voltage
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
= 15V, ID = 30A
DD
R
= 4.7Ω VGS = 4.5V
G
(see test circuit, Figure 3)
= 24V, ID = 60A,
V
DD
VGS = 4.5V
= 15V, ID = 30A,
V
DD
RG=4.7Ω, V
GS
= 4.5V
(see test circuit, Figure 3)
GS
=30A
D
= 4.5V
Vclamp =24V, I
R
=4.7Ω, V
G
(see test circuit, Figure 5)
ISD = 85A, VGS = 0
= 85A, di/dt = 100A/µs,
I
SD
VDD = 15V, Tj = 150°C
(see test circuit, Figure 5)
22 ns
30
40 nC
9
12.5
36.5
36.5
32
23
40
1.3 V
65
105
3.4
nC
nC
ns
ns
ns
ns
ns
ns
nC
A
Thermal ImpedenceSafe Operating Area
3/9
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STB85NF3LL
Output Characteristics
Transconductance
Transfer Characteristics
Static Drain-source On Resistance
Gate Charge vs Gate-source Voltage Capacitance Variations
4/9
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Source-drain Diode Forward Characteristics
STB85NF3LL
Normalized On Resistance vs TemperatureNormalized Gate Thereshold Voltage vs Temp.
5/9
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STB85NF3LL
Fig. 2: Unclamped Inductive WaveformFig. 1: Unclamped Inductive Load Test Circuit
Fig. 3: Switching Times Test Circuit For
Resistive Load
Fig. 5: Test Circuit For Inductive Load Switching
And Diode Recovery Times
Fig. 4: Gate Charge test Circuit
6/9
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2
D
PAK MECH ANICAL DATA
STB85NF3LL
DIM.
MIN. TYP MAX. MIN. TYP. MAX.
A 4.4 4.6 0.173 0.181
A1 2.49 2.69 0.098 0.106
A2 0.03 0.23 0.001 0.009
B 0.7 0.93 0.027 0.036
B2 1.14 1.7 0.044 0.067
C 0.45 0.6 0.017 0.023
C2 1.23 1.36 0.048 0.053
D 8.95 9.35 0.352 0.368
D1 8 0.315
E 10 10.4 0.393
E1 8.5 0.334
G 4.88 5.28 0.192 0.208
L 15 15.85 0.590 0.625
L2 1.27 1.4 0.050 0.055
L3 1.4 1.75 0.055 0.068
mm. inch
M 2.4 3.2 0.094 0.126
R 0.4 0.015
V2 0º8º
3
7/9
1
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STB85NF3LL
D2PAK FOOTPRINT
TAPE AND REEL SHIPMENT (suffix ”T4”)*
TUBE SHIPMENT (no suffix)*
REEL MECHANICAL DATA
DIM.
A 330 12.992
B 1.5 0.059
C 12.8 13.2 0.504 0.520
D 20.2 0795
G 24.4 26.4 0.960 1.039
N 100 3 .937
T 30.4 1.197
mm inch
MIN. MAX. MIN. MAX.
TAPE MECHANICAL DATA
DIM.
A0 10.5 10.7 0.413 0.421
B0 15.7 15.9 0.618 0.626
D 1.5 1.6 0.059 0.063
D1 1.59 1.61 0.062 0.063
E 1.65 1.85 0.065 0.073
F 11.4 11.6 0.449 0.456
K0 4.8 5.0 0.189 0.197
P0 3.9 4.1 0.153 0.161
P1 11.9 12.1 0.468 0.476
P2 1.9 2.1 0.075 0.082
R 50 1.574
T 0.25 0.35 0.0098 0.0137
W 23.7 24.3 0.933 0.956
* on sales type
8/9
mm inch
MIN. MAX. MIN. MAX.
BASE QTY BULK QTY
1000 1000
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STB85NF3LL
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such informa tion n or for an y infring ement of patent s or other rig hts of third part ies which may resu lt from its use . No l i cen se i s
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are
subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
are not authorized for use as critical compo nents in life support devices or systems without express written approval of STMicroelectronics.
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The ST logo is a trademark of STMicroelectronics
© 2001 STMicroelectronics – Printed in Italy – All Rights Reserved
STMicroelectronics GROUP OF COMPANIES
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http://www.st.com
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