Datasheet Si2333DS Datasheet (Vishay) [ru]

P-Channel 12-V (D-S) MOSFET

Si2333DS

Vishay Siliconix

PRODUCT SUMMARY

VDS (V) R

- 12

DS(on)

0.032 at V

0.042 at V

0.059 at V

GS

GS

GS

FEATURES

(Ω)I

= - 4.5 V

= - 2.5 V

= - 1.8 V

(A)

D

- 5.3

- 4.6

- 3.9

TO-236

(SOT-23)

G

1

2

S

Top View

Si2333DS (E3)*

* Marking Code

Ordering Information: Si2333DS-T1-E3 (Lead (Pb)-free)

Si2333DS-T1-GE3 (Lead (Pb)-free and Halogen-free)

• Halogen-free According to IEC 61249-2-21

Available

• TrenchFET

APPLICATIONS

• Load Switch

• PA Switch

D

3

®

Power MOSFET

ABSOLUTE MAXIMUM RATINGS TA = 25 °C, unless otherwise noted

Parameter Symbol 5 s Steady State Unit

Drain-Source Voltage

Gate-Source Voltage

Continuous Drain Current (T

= 150 °C)

J

a, b

Pulsed Drain Current

Continuous Source Current (Diode Conduction)

Maximum Power Dissipation

a, b

a, b

Operating Junction and Storage Temperature Range

TA = 25 °C

= 70 °C

T

A

TA = 25 °C

= 70 °C

T

A

V

DS

V

GS

I

D

I

DM

I

S

P

D

T

, T

J

stg

- 5.3 - 4.1

- 4.2 - 3.3

- 1.0 - 0.6

1.25 0.75

- 12

± 8

- 20

0.8 0.48

- 55 to 150 °C

V

A

W

THERMAL RESISTANCE RATINGS

Parameter Symbol Typical Maximum Unit

Maximum Junction-to-Ambient

a

t ≤ 5 s

Steady State 120 166

Maximum Junction-to-Foot (Drain) Steady State

Notes:
a. Surface Mounted on 1" x 1" FR4 board.
b. Pulse width limited by maximum junction temperature.

R

thJA

R

thJF

75 100

°C/W

40 50

Document Number: 72023
S09-0130-Rev. C, 02-Feb-09

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Si2333DS

Vishay Siliconix

SPECIFICATIONS TJ = 25 °C, unless otherwise noted

Limits

Parameter Symbol Test Conditions

Static

V

Drain-Source Breakdown Voltage

Gate-Threshold Voltage

Gate-Body Leakage

Zero Gate Voltage Drain Current

On-State Drain Current

Drain-Source On-Resistance

Forward Transconductance

a

a

a

Diode Forward Voltage

Dynamic

b

Total Gate Charge

Gate-Drain Charge

Input Capacitance

Reverse Transfer Capacitance

Switching

c

Tur n -O n Ti m e

Turn-Off Time

V

(BR)DSS

V

GS(th)

I

GSS

I

DSS

I

D(on)

R

DS(on)

g

V

Q

Q

Q

C

C

C

t

d(on)

t

d(off)

fs

SD

gs

gd

iss

oss

rss

t

r

t

f

g

V

DS

V

VDS = - 6 V, VGS = 0 V, f = 1 MHz

= 0 V, ID = - 250 µA

GS

V

= VGS, ID = - 250 µA

DS

VDS = 0 V, VGS = ± 8 V

V

= - 9.6 V, V

DS

= - 9.6 V, V

≤ - 5 V, V

DS

V

= - 4.5 V, ID = - 5.3 A

GS

V

= - 2.5 V, ID = - 4.6 A

GS

V

= - 1.8 V, ID = - 2.0 A

GS

GS

= 0 V, TJ = 55 °C

GS

= - 4.5 V

GS

VDS = - 5 V, ID = - 5.3 A

IS = - 1.0 A, V

V

= - 6 V, V

DS

I

D

V

= - 6 V, RL = 6 Ω

DD

≅ - 1.0 A, V

I

D

R

≅ - 5.3 A

G

GS

GEN

= 6 Ω

= 0 V

GS

= - 4.5 V

= - 4.5 V

= 0 V

- 12

- 0.40 - 1.0

± 100 nA

- 1

- 10

- 20 A

0.025 0.032

0.033 0.042

0.046 0.059

17 S

- 0.7 - 1.2 V

11.5 18

1.5

3.2

1100

390

300

25 40

45 70

72 110

60 90

Notes:
a. Pulse test: PW ≤ 300 µs, duty cycle ≤ 2 %.
b. For design aid only, not subject to production testing.
c. Switching time is essentially independent of operating temperature.

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the de vice. These are stress rating s only, and functiona l operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.

Unit Min. Typ. Max.

V

µA

Ω

nCGate-Source Charge

pFOutput Capacitance

ns

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Document Number: 72023

S09-0130-Rev. C, 02-Feb-09

TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted

Si2333DS

Vishay Siliconix

20

VGS = 5 V thru 2.5 V

16

12

8

- Drain Current (A)

D

I

4

0

012345

VDS - Drain-to-Source Voltage (V)

2 V

1.5 V

Output Characteristics

0.15

0.12

0.09

0.06

- On-Resistance (Ω)R

DS(on)

0.03

0.00

VGS = 1.8 V

VGS = 2.5 V

VGS = 4.5 V

048121620

- Drain Current (A)

I

D

On-Resistance vs. Drain Current

1 V

20

TC = - 55 °C

16

12

8

- Drain Current (A)

D

I

4

0

0.0 0.5 1.0 1.5 2.0 2.5

VGS - Gate-to-Source Voltage (V)

25 °C

Transfer Characteristics

1800

1500

1200

900

600

C - Capacitance (pF)

C

300

rss

0

036912

VDS - Drain-to-Source Voltage (V)

C

iss

C

oss

Capacitance

125 °C

5

VDS = 6 V

= 5.3 A

I

D

4

3

2

- Gate-to-Source Voltage (V)

1

GS

V

0

03691215

Qg - Total Gate Charge (nC)

Document Number: 72023
S09-0130-Rev. C, 02-Feb-09

Gate Charge

1.4

1.3

1.2

1.1

- On-Resistance

1.0

DS(on)

R

(Normalized)

0.9

0.8

- 50 - 25 0 25 50 75 100 125 150

VGS = 4.5 V

= 5.3 A

I

D

T

- Junction Temperature (°C)

J

On-Resistance vs. Junction Temperature

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Si2333DS

Vishay Siliconix

TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted

20

10

TJ = 150 °C

1

- Source Current (A)

S

I

0.1

0.0 0.2 0.4 0.6 0.8

V

- Source-to-Drain Voltage (V)

SD

Source-Drain Diode Forward Voltage

0.4

ID = 140 µA

Variance (V)V

GS(th)

0.3

0.2

0.1

0.0

- 0.1

TJ = 25 °C

1.0 1.2

- On-Resistance (Ω)R

DS(on)

Power (W)

0.15

0.12

0.09

ID = 2 A

0.06

0.03

0.00
012345

V

ID = 5.3 A

- Gate-to-Source Voltage (V)

GS

On-Resistance vs. Gate-to-Source Voltage

12

10

8

6

4

TA = 25 °C

2

- 0.2

- 50 - 25 0 25 50 75 100 125 150

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4

TJ - Temperature (°C)

Threshold Voltage

- Drain Current (A)

D

I

0

0.01

100

Limited by R

10

1

Limited

0.1

0.01

0.1 1 10 100

* VGS > minimum VGS at which R

DS(on)*

I

D(on)

TA = 25 °C

Single Pulse

BVDSS Limited

VDS - Drain-to-Source Voltage (V)

IDMLimited

P(t) = 0.0001

P(t) = 0.001

P(t) = 0.01

P(t) = 0.1

P(t) = 1
P(t) = 10

DC

is specified

DS(on)

Safe Operating Area

1

10 6000.1

Time (s)

Single Pulse Power

Document Number: 72023

S09-0130-Rev. C, 02-Feb-09

100

TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted

2

1

Duty Cycle = 0.5

Si2333DS

Vishay Siliconix

0.1

Thermal Impedance

Normalized Effective Transient

0.01

0.2

0.1

0.05

0.02

Notes:

P

DM

t

1

t

- TA = PDMZ

JM

2

1. Duty Cycle, D =

2. Per Unit Base = R

3. T

4. Surface Mounted

t

1

t

2

= 120 °C/W

thJA

(t)

thJA

Single Pulse

-4

10

-3

10

-2

10

-1

1 10 60010

100

Square Wave Pulse Duration (s)

Normalized Thermal Transient Impedance, Junction-to-Ambient

Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?72023

Document Number: 72023

.

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S09-0130-Rev. C, 02-Feb-09

5

SOT-23 (TO-236): 3-LEAD

b

3

1

Package Information

Vishay Siliconix

E

E

1

2

S

A

A

2

A

1

Dim

A 0.89 1.12 0.035 0.044

A

1

A

2

b 0.35 0.50 0.014 0.020

c 0.085 0.18 0.003 0.007

D 2.80 3.04 0.110 0.120

E 2.10 2.64 0.083 0.104

E

1

e 0.95 BSC 0.0374 Ref

e

1

L 0.40 0.60 0.016 0.024

L

1

S 0.50 Ref 0.020 Ref

q 3°8°3°8°

ECN: S-03946-Rev. K, 09-Jul-01
DWG: 5479

e

e

1

D

0.10 mm

Seating Plane

C

0.004"

C

C

q

L

L

1

MILLIMETERS INCHES

Min Max Min Max

0.01 0.10 0.0004 0.004

0.88 1.02 0.0346 0.040

1.20 1.40 0.047 0.055

1.90 BSC 0.0748 Ref

0.64 Ref 0.025 Ref

0.25 mm

Gauge Plane

Seating Plane

Document Number: 71196
09-Jul-01

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Mounting LITTLE FOOTR SOT-23 Power MOSFETs

Wharton McDaniel

AN807

Vishay Siliconix

Surface-mounted LITTLE FOOT power MOSFETs use integrated
circuit and small-signal packages which have been been modified
to provide the heat transfer capabilities required by power devices.
Leadframe materials and design, molding compounds, and die
attach materials have been changed, while the footprint of the
packages remains the same.

See Application Note 826, Recommended Minimum Pad

Patterns With Outline Drawing Access for Vishay Siliconix
MOSFETs, (http://www.vishay.com/doc?72286), for the basis

of the pad design for a LITTLE FOOT SOT-23 power MOSFET
footprint . In converting this footprint to the pad set for a power
device, designers must make two connections: an electrical
connection and a thermal connection, to draw heat away from the
package.

The electrical connections for the SOT-23 are very simple. Pin 1 is
the gate, pin 2 is the source, and pin 3 is the drain. As in the other
LITTLE FOOT packages, the drain pin serves the additional
function of providing the thermal connection from the package to
the PC board. The total cross section of a copper trace connected
to the drain may be adequate to carry the current required for the
application, but it may be inadequate thermally. Also, heat spreads
in a circular fashion from the heat source. In this case the drain pin
is the heat source when looking at heat spread on the PC board.

ambient air. This pattern uses all the available area underneath the
body for this purpose.

0.114

2.9

0.081

2.05

0.150

3.8

0.059

1.5

0.0394

FIGURE 1. Footprint With Copper Spreading

1.0

0.037

0.95

Since surface-mounted packages are small, and reflow soldering
is the most common way in which these are affixed to the PC
board, “thermal” connections from the planar copper to the pads
have not been used. Even if additional planar copper area is used,
there should be no problems in the soldering process. The actual
solder connections are defined by the solder mask openings. By
combining the basic footprint with the copper plane on the drain
pins, the solder mask generation occurs automatically.

Figure 1 shows the footprint with copper spreading for the SOT-23
package. This pattern shows the starting point for utilizing the
board area available for the heat spreading copper. To create this
pattern, a plane of copper overlies the drain pin and provides
planar copper to draw heat from the drain lead and start the
process of spreading the heat so it can be dissipated into the

Document Number: 70739
26-Nov-03

A final item to keep in mind is the width of the power traces. The
absolute minimum power trace width must be determined by the
amount of current it has to carry. For thermal reasons, this
minimum width should be at least 0.020 inches. The use of wide
traces connected to the drain plane provides a low-impedance
path for heat to move away from the device.

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RECOMMENDED MINIMUM PADS FOR SOT-23

Application Note 826

Vishay Siliconix

0.106
(2.692)

0.037

(0.950)

0.053

(1.341)

0.097

(2.459)

Recommended Minimum Pads

Dimensions in Inches/(mm)

0.022

(0.559)

0.049

0.029

(1.245)

(0.724)

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Document Number: 72609 www.vishay.com
Revision: 21-Jan-08 25

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Revision: 02-Oct-12

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Document Number: 91000