Datasheet Si2327DS Datasheet (Vishay) [ru]

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P-Channel 200-V (D-S) MOSFET
Si2327DS
Vishay Siliconix
PRODUCT SUMMARY
VDS (V) R
- 200
2.35 at V
2.45 at V
(Ω)I
DS(on)
= - 10 V
GS
= - 6.0 V
GS
(A) Qg (Typ.)
D
- 0.49
- 0.48
8.0
FEATURES
• TrenchFET
• Ultra Low On-Resistance
®
Power MOSFET
• Small Size
APPLICATIONS
• Active Clamp Circuits in DC/DC Power Supplies
TO-236
(SOT-23)
1
G
3
D
2
S
Top View
Si2327DS (D7)*
* Marking Code
Ordering Information: Si2327DS -T1-E3 (Lead (Pb)-free)
Si2327DS -T1-GE3 (Lead (Pb)-free and Halogen-free)
ABSOLUTE MAXIMUM RATINGS TA = 25 °C, unless otherwise noted
Parameter Symbol 5 s Steady State Unit
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current (T
= 150 °C)
J
a, b
Pulsed Drain Current
Continuous Source Current (Diode Conduction)
a, b
Single Pulse Avalanche Current
Single Pulse Avalanche Energy
Maximum Power Dissipation
a, b
Operating Junction and Storage Temperature Range
TA = 25 °C
T
= 70 °C
A
L = 1.0 mH
TA = 25 °C
= 70 °C
T
A
V
DS
V
GS
I
D
I
DM
I
S
I
AS
E
AS
P
D
T
, T
J
stg
- 0.49 - 0.38
- 0.39 - 0.31
- 200
± 20
- 1.0
- 1.0 - 0.6
4.0
0.8 mJ
1.25 0.75
0.8 0.48
- 55 to 150 °C
V
A
W
THERMAL RESISTANCE RATINGS
Parameter Symbol Typical Maximum Unit
Maximum Junction-to-Ambient
a
t 5 s
Steady State 120 166
Maximum Junction-to-Foot (Drain) Steady State
Notes: a. Surface Mounted on 1" x 1" FR4 board. b. Pulse width limited by maximum junction temperature.
Document Number: 73240 S09-0133-Rev. B, 02-Feb-09
R
thJA
R
thJF
75 100
°C/W
40 50
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Si2327DS
Vishay Siliconix
SPECIFICATIONS TJ = 25 °C, unless otherwise noted
Limits
Parameter Symbol Test Conditions
Min. Typ. Max.
Static
V
Drain-Source Breakdown Voltage
Gate-Threshold Voltage
Gate-Body Leakage
Zero Gate Voltage Drain Current
On-State Drain Current
Drain-Source On-Resistance
Forward Transconductance
a
a
a
Diode Forward Voltage
Dynamic
b
Total Gate Charge
Gate-Drain Charge
Gate Resistance
Input Capacitance
Reverse Transfer Capacitance
Switching
c
Tur n -O n Ti m e
Turn-Off Time
Body Diode Reverse Recovery Charge
V
(BR)DSS
V
GS(th)
I
GSS
I
DSS
I
D(on)
R
DS(on)
g
V
Q
Q
Q
R
C
C
C
t
d(on)
t
d(off)
Q
fs
SD
gs
gd
iss
oss
rss
t
r
t
f
g
g
rr
V
DS
V
VDS = - 25 V, V
= 0 V, ID = - 250 µA
GS
V
= VGS, ID = - 250 µA
DS
VDS = 0 V, VGS = ± 20 V
V
= - 200 V, V
DS
= - 200 V, V
DS
V
GS
V
GS
GS
- 15 V, V
= - 10 V, ID = - 0.5 A
= - 6.0 V, ID = - 0.5 A
= 0 V
GS
= 0 V, TJ = 55 °C
= 10 V
GS
VDS = - 15 V, ID = - 0.5 A
IS = - 1.0 A, V
V
= - 100 V, V
DS
I
D
- 0.5 A
GS
GS
= 0 V
= 10 V
- 200
- 2.5 - 4.5
± 100 nA
- 1.0 A
1.9 2.35
1.96 2.45
1.8 S
- 0.85 - 1.2 V
8.0 12
1.3
2.5
f = 1.0 MHz 8.0 Ω
340 510
= 0 V, f = 1 MHz
GS
25
14
V
= - 100 V, RL = 100 Ω
DD
- 1.0 A, V
I
D
R
= 6 Ω
g
GEN
= - 10 V
IF = 0.5 A, dI/dt = 100 A/µs
812
11 17
16 25
11 17
140 200 nC
- 1
- 10
Notes: a. Pulse test: PW 300 µs duty cycle 2 %. b. For DESIGN AID ONLY, not subject to production testing. c. Switching time is essentially independent of operating temperature.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the de vice. These are stress rating s only, and functiona l operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Unit
V
µA
Ω
nCGate-Source Charge
pFOutput Capacitance
ns
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Document Number: 73240
S09-0133-Rev. B, 02-Feb-09
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TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
Si2327DS
Vishay Siliconix
1.0
0.8
0.6
0.4
- Drain Current (A)I
D
0.2
0.0 0246810
VGS = 10 thru 5 V
- Drain-to-Source Voltage (V)
V
DS
Output Characteristics
3.2
2.8
2.4
2.0
1.6
- On-Resistance (Ω)R
1.2
DS(on)
0.8
0.4
0.0
0.0 0.2 0.4 0.6 0.8 1.0
VGS = 6 V
VGS = 10 V
4 V
1.0
0.8
0.6
0.4
- Drain Current (A)I
D
0.2
0.0 012345
- Gate-to-Source Voltage (V)
V
GS
TC = 125 °C
25 °C
Transfer Characteristics
500
400
C
iss
300
200
C - Capacitance (pF)
100
C
rss
C
oss
0
0 30 60 90 120 150
- 55 °C
On-Resistance vs. Drain Current
10
VDS = 10 V
= 0.5 A
I
D
8
6
4
Gate-to-Source Voltage (V)
-
GS
2
V
0
012345678
Document Number: 73240 S09-0133-Rev. B, 02-Feb-09
ID - Drain Current (A)
Qg - Total Gate Charge (nC)
Gate Charge
VDS - Drain-to-Source Voltage (V)
Capacitance
2.2
1.9
1.6
1.3
- On-Resistance (Normalized)
1.0
DS(on)
R
0.7
0.4
VGS = 10 V
= 0.5 A
I
D
- 50 - 25 0 25 50 75 100 125 150
T
- Junction Temperature (°C)
J
On-Resistance vs. Junction Temperature
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Si2327DS
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
- Source Current (A)I
S
3
1
0.1
0.01 0 0.2 0.4 0.6 0.8
- Source-to-Drain Voltage (V)
V
SD
Source-Drain Diode Forward Voltage
1.0
0.7
0.4
Variance (V)V
0.1
GS(th)
- 0.2
TJ = 150 °C
ID = 250 µA
TJ = 25 °C
1.0 1.4
1.2
6
ID = 0.5 A
5
4
3
- On-Resistance (Ω)R 2
DS(on)
1
0
0246810
VGS - Gate-to-Source Voltage (V)
On-Resistance vs. Gate-to-Source Voltage
12
10
8
6
Power (W)
4
TA = 25 °C
2
- 0.5
- 50 - 25 0 25 50 75 100 125 150
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TJ - Temperature (°C)
Threshold Voltage
- Drain Current (A)I
D
0
0.01
10
IDMLimited
1
Limited by R
0.1
0.01
0.001
0.1 1 10 1000
* V
> minimum VGS at which R
GS
DS(on)*
TA = 25 °C
Single Pulse
Limited
BVDSS
- Drain-to-Source Voltage (V)
V
DS
DS(on)
100
is specified
Safe Operating Area
10 µs 100 µs
1 ms
10 ms
100 ms
10 s, 1 s DC, 100 s
1
10 6000.1
Time (s)
Single Pulse Power
Document Number: 73240
S09-0133-Rev. B, 02-Feb-09
100
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TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
2
1
Duty Cycle = 0.5
Si2327DS
Vishay Siliconix
0.1
Thermal Impedance
Normalized Effective Transient
0.01
0.2
0.1
0.05
0.02
Single Pulse
-4
10
-3
10
-2
10
-1
1 10 60010
Notes:
P
DM
t
1
t
- TA = PDMZ
JM
2
1. Duty Cycle, D =
2. Per Unit Base = R
3. T
4. Surface Mounted
thJA
thJA
(t)
t
1
t
2
= 120 °C/W
100
Square Wave Pulse Duration (s)
Normalized Thermal Transient Impedance, Junction-to-Ambient
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?73240
Document Number: 73240
.
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S09-0133-Rev. B, 02-Feb-09
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SOT-23 (TO-236): 3-LEAD
b
3
1
Package Information
Vishay Siliconix
E
E
1
2
S
A
A
2
A
1
Dim
A 0.89 1.12 0.035 0.044
A
1
A
2
b 0.35 0.50 0.014 0.020
c 0.085 0.18 0.003 0.007
D 2.80 3.04 0.110 0.120
E 2.10 2.64 0.083 0.104
E
1
e 0.95 BSC 0.0374 Ref
e
1
L 0.40 0.60 0.016 0.024
L
1
S 0.50 Ref 0.020 Ref
q 3°8°3°8°
ECN: S-03946-Rev. K, 09-Jul-01 DWG: 5479
e
e
1
D
0.10 mm
Seating Plane
C
0.004"
C
C
q
L
L
1
MILLIMETERS INCHES
Min Max Min Max
0.01 0.10 0.0004 0.004
0.88 1.02 0.0346 0.040
1.20 1.40 0.047 0.055
1.90 BSC 0.0748 Ref
0.64 Ref 0.025 Ref
0.25 mm
Gauge Plane
Seating Plane
Document Number: 71196 09-Jul-01
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Mounting LITTLE FOOTR SOT-23 Power MOSFETs
Wharton McDaniel
AN807
Vishay Siliconix
Surface-mounted LITTLE FOOT power MOSFETs use integrated circuit and small-signal packages which have been been modified to provide the heat transfer capabilities required by power devices. Leadframe materials and design, molding compounds, and die attach materials have been changed, while the footprint of the packages remains the same.
See Application Note 826, Recommended Minimum Pad
Patterns With Outline Drawing Access for Vishay Siliconix MOSFETs, (http://www.vishay.com/doc?72286), for the basis
of the pad design for a LITTLE FOOT SOT-23 power MOSFET footprint . In converting this footprint to the pad set for a power device, designers must make two connections: an electrical connection and a thermal connection, to draw heat away from the package.
The electrical connections for the SOT-23 are very simple. Pin 1 is the gate, pin 2 is the source, and pin 3 is the drain. As in the other LITTLE FOOT packages, the drain pin serves the additional function of providing the thermal connection from the package to the PC board. The total cross section of a copper trace connected to the drain may be adequate to carry the current required for the application, but it may be inadequate thermally. Also, heat spreads in a circular fashion from the heat source. In this case the drain pin is the heat source when looking at heat spread on the PC board.
ambient air. This pattern uses all the available area underneath the body for this purpose.
0.114
2.9
0.081
2.05
0.150
3.8
0.059
1.5
0.0394
FIGURE 1. Footprint With Copper Spreading
1.0
0.037
0.95
Since surface-mounted packages are small, and reflow soldering is the most common way in which these are affixed to the PC board, “thermal” connections from the planar copper to the pads have not been used. Even if additional planar copper area is used, there should be no problems in the soldering process. The actual solder connections are defined by the solder mask openings. By combining the basic footprint with the copper plane on the drain pins, the solder mask generation occurs automatically.
Figure 1 shows the footprint with copper spreading for the SOT-23 package. This pattern shows the starting point for utilizing the board area available for the heat spreading copper. To create this pattern, a plane of copper overlies the drain pin and provides planar copper to draw heat from the drain lead and start the process of spreading the heat so it can be dissipated into the
Document Number: 70739 26-Nov-03
A final item to keep in mind is the width of the power traces. The absolute minimum power trace width must be determined by the amount of current it has to carry. For thermal reasons, this minimum width should be at least 0.020 inches. The use of wide traces connected to the drain plane provides a low-impedance path for heat to move away from the device.
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RECOMMENDED MINIMUM PADS FOR SOT-23
Application Note 826
Vishay Siliconix
0.106 (2.692)
0.037
(0.950)
0.053
(1.341)
0.097
(2.459)
Recommended Minimum Pads
Dimensions in Inches/(mm)
0.022
(0.559)
0.049
0.029
(1.245)
(0.724)
Return to Index
Document Number: 72609 www.vishay.com Revision: 21-Jan-08 25
Return to Index
APPLICATION NOTE
Page 9
Legal Disclaimer Notice
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Vishay
Disclaimer
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Please note that some Vishay documentation may still make reference to RoHS Directive 2002/95/EC. We confirm that all the products identified as being compliant to Directive 2002/95/EC conform to Directive 2011/65/EU.
Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as Halogen-Free follow Halogen-Free requirements as per JEDEC JS709A standards. Please note that some Vishay documentation may still make reference to the IEC 61249-2-21 definition. We confirm that all the products identified as being compliant to IEC 61249-2-21 conform to JEDEC JS709A standards.
Revision: 02-Oct-12
1
Document Number: 91000
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