Datasheet SAA5254P Datasheet (Philips)

INTEGRATED CIRCUITS

DATA SH EET

SAA5254

Integrated VIP and teletext decoder
(IVT1.1X)

Preliminary specification
Supersedes data of July 1993
File under Integrated Circuits, IC02

1996 Nov 07

Philips Semiconductors Preliminary specification

Integrated VIP and teletext decoder
(IVT1.1X)

FEATURES

• Complete teletext decoder including page memory and
FASTEXT links in a 40-pin DIP package

• Automatic processing of extension packet 26 for widest
possible language decoding. All our standard language
options can be available, and language option is
readable via I2C-bus

• 100% hardware compatible with the SAA5244A; plug-in
replacement and extra market

• 100% hardware compatible with the SAA5244A, except
if the special OSD symbols were used with the
SAA5244A, except ROM identification number

• The device is pin-aligned with the other members of the
new Philips teletext decoder family, i.e. SAA5280 and
the SAA5249, making one hardware solution for the full
range

• Low software overhead for the control microprocessor

• Single page acquisition system

• RGB interface to standard colour decoder ICs, push-pull

output drive

• Separate text and video signal quality detectors.

SAA5254

DESCRIPTION

The Integrated VIP and Teletext decoder (IVT1.1X) is
designed to decode 625-line based World System Teletext
transmissions. This single-chip teletext decoder hardware
is based on the SAA5244A with which it is completely
compatible.

Like the SAA5244A the device contains all the hardware
necessary to decode the teletext, but the SAA5254 also
contains extra hardware to process the extension packet
26 characters automatically, extending the markets to
which the TV chassis can be shipped and opening the
possibility of many more language options.

ORDERING INFORMATION

TYPE

NUMBER

NAME DESCRIPTION VERSION

SAA5254P DIP40

plastic dual in-line package; 40 leads (600 mil)

PACKAGE

SOT129-1

QUICK REFERENCE DATA

SYMBOL PARAMETER MIN. TYP. MAX. UNIT

V

DD

I

DD

V

sync

V

video

f

XTAL

T

amb

supply voltage 4.5 5.0 5.5 V
supply current − 90 120 mA
sync voltage amplitude 0.1 0.3 0.6 V
video voltage amplitude 0.7 1.0 1.4 V
crystal frequency − 27 − MHz
operating ambient temperature −20 − +70 °C

1996 Nov 07 2

Philips Semiconductors Preliminary specification

Integrated VIP and teletext decoder
(IVT1.1X)

BLOCK DIAGRAM

Y BLAN RGBREF RGB

23 19 21 18 15 to 17 22

DISPLAY

DATA

SLICER

AND

CLOCK

REGENERATOR

ODD/EVENCOR

TELETEXT

ACQUISITION

AND

DECODING

HAMMING
CHECKER

AND

PACKET 26

PROCESSING

ENGINE

PAGE

MEMORY

SAA5254

V

SS1

REF

OSCOUT

OSCIN

5

6

2
3

DCVBS

2

I

C-BUS

INTERFACE

ANALOG

TO

DIGITAL

CONVERTER

CRYSTAL

OSCILLATOR

4 7 9 8 11 13 12

OSCGND BLACK IREF CVBS POL STTV/LFB

TIMING

CHAIN

INPUT

CLAMP

AND SYNC

SEPARATOR

SAA5254

DISPLAY

CLOCK
PHASE

LOCKED

LOOP

VCR/FFB

25
24

10
14

20

SDA
SCL

1

V

DD1

V

DD2

V

SS2

V

SS3

MLB207

Fig.1 Block diagram; SOT129 (DIP40).

1996 Nov 07 3

Philips Semiconductors Preliminary specification

Integrated VIP and teletext decoder

SAA5254

(IVT1.1X)

PINNING

SYMBOL PIN DESCRIPTION

V

DD1

OSCOUT 2 27 MHz crystal oscillator output
OSCIN 3 27 MHz crystal oscillator input
OSCGND 4 0 V crystal oscillator ground
V

SS1

REF+ 6 Positive reference voltage for the ADC. This pin should be connected to +5 V.
BLACK 7 Video black level storage pin, connected to ground via a 100 nF capacitor.
CVBS 8 Composite video input pin. A positive-going 1 V (peak-to-peak) input is required,

IREF 9 Reference current input pin, connected to ground via a 27 kΩ resistor.
V

DD2

POL 11 STTV/LFB/FFB polarity selection pin
STTV/LFB 12 Sync to TV output pin/line flyback input pin. Function controlled by an internal register bit

VCR/FFB 13 PLL time constant switch/field flyback input pin. Function controlled by an internal register

V

SS2

R 15 Dot rate character output of the RED colour information.
G 16 Dot rate character output of the GREEN colour information.
B 17 Dot rate character output of the BLUE colour information.
RGBREF 18 DC input voltage to define the output high level on the RGB pins.
BLAN 19 Dot rate fast blanking output.
V

SS3

COR 21 Programmable active LOW output to provide contrast reduction of the TV picture for mixed

EVEN 22 25 Hz output synchronized with the CVBS inputs field sync pulses to produce a

ODD/

Y 23 Dot rate character output of teletext foreground colour information; open drain output.
SCL 24 Serial clock input for the I
SDA 25 Serial input/output data port for the I

i.c. 26 to 40 Internally connected. Must be left open-circuit in application.

1 +5 V supply 1

5 0 V ground 1

connected via a 100 nF capacitor.

10 +5 V supply 2

(scan sync mode).

bit (scan sync mode).

14 0 V ground 2

20 0 V ground 3

text and picture displays or when viewing newsflash/subtitle pages; open drain output.

non-interlaced display by adjustment of the vertical deflection currents.

power-down of the device.

2

C-bus. It can still be driven during power-down of the device.

2

C-bus; open drain output. It can still be driven during

1996 Nov 07 4

Philips Semiconductors Preliminary specification

Integrated VIP and teletext decoder
(IVT1.1X)

V

DD1

OSCOUT

OSCIN

OSCGND

V

SS1

REF

BLACK

CVBS

IREF

V

DD2
POL

STTV/LFB

VCR/FFB

V

SS2

R
G

1
2
3
4
5
6
7
8
9

10

SAA5254

11
12
13

15
16

40
39
38
37
36
35
34

i.c.

33
32
31
30
29
28
2714
26
25

SDA

SAA5254

24

SCL

23

Y
ODD/EVEN

22

COR

21

RGBREF

BLAN

V

SS3

17

B

18
19
20

MLB208

Fig.2 Pin configuration; SOT129 (DIP40).

1996 Nov 07 5

Philips Semiconductors Preliminary specification

Integrated VIP and teletext decoder

SAA5254

(IVT1.1X)

QUALITY AND RELIABILITY

This device will meet Philips Semiconductors General Quality Specification for Business group

Circuits SNW-FQ-611-Part E”

. The principal requirements are shown in Tables 1 to 4.

Group A
Table 1 Acceptance tests per lot

TEST CONDITIONS REQUIREMENTS

Mechanical cumulative target < 100 ppm
Electrical cumulative target < 100 ppm

Group B
Table 2 Processability tests (by package family)

TEST CONDITIONS REQUIREMENTS

Solderability < 7% LTPD
Mechanical < 15% LTPD
Solder heat resistance < 15% LTPD

“Consumer Integrated

(1)

(1)

Group C
Table 3 Reliability tests (by process family)

TEST CONDITIONS REQUIREMENTS

Operational life 168 hours at Tj= 150 °C < 1500 FPM; equivalent to

< 100 FITS at Tj=70°C

Humidity life temperature, humidity, bias

< 2000 FPM
(1000 hours, 85 °C, 85% RH or
equivalent test)

Temperature cycling performance T

stg(min)

to T

stg(max)

< 2000 FPM

Table 4 Reliability tests (by device type)

TEST CONDITIONS REQUIREMENTS

ESD and latch-up ESD Human body model

< 15% LTPD
2000 V, 100 pF, 1.5 kΩ

ESD Machine model

< 15% LTPD
200 V, 100 pF, 1.5 kΩ

latch-up 100 mA, 1.5 × V

DD

< 15% LTPD
(absolute maximum)

Notes to Tables 1 to 4

1. ppm = fraction of defective devices, in parts per million.
LTPD = Lot Tolerance Percent Defective.
FPM = fraction of devices failing at test condition, in Failures Per Million.
FITS = Failures In Time Standard.

(1)

(1)

1996 Nov 07 6

Philips Semiconductors Preliminary specification

Integrated VIP and teletext decoder

SAA5254

(IVT1.1X)

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134).

SYMBOL PARAMETER MIN. MAX. UNIT

V

DD

V

I

V

O

I

O

I

IOK

T

amb

CHARACTERISTICS

=5V±10%; T

V

DD

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Supply

V

DD

I

DD(tot)

Inputs

supply voltage (all supplies) −0.3 +6.5 V
input voltage (any input) −0.3 VDD+ 0.5 V
output voltage (any output) −0.3 VDD+ 0.5 V
output current (each output) −10 +10 mA
DC input or output diode current −20 +20 mA
operating ambient temperature −20 +70 °C

= −20 to +70 °C, unless otherwise specified.

amb

supply voltage 4.5 5.0 5.5 V
total supply current − 90 120 mA

CVBS
V

sync

t

d(sync)

∆t

d(sync)

V

video(p-p)

PLL

catch

Z

source

C

i

IREF
R

GND

POL
V

IL

V

IH

I

LI

C

i

sync voltage amplitude 0.1 0.3 0.6 V
delay from CVBS to TCS output from

−150 0 +150 ns
STTV buffer (nominal video, average
of leading/trailing edge)

change in sync delay between all

0 − 25 ns
black and all white video input at
nominal levels

video input voltage amplitude

0.7 1.0 1.4 V

(peak-to-peak value)
display PLL catching range ±7 −−%
source impedance −−250 Ω
input capacitance −−10 pF

resistance to ground − 27 − kΩ

LOW level input voltage −0.3 − +0.8 V
HIGH level input voltage 2.0 − VDD+ 0.5 V
input leakage current VI=0toV

DD

−10 − +10 µA

input capacitance −−10 pF

1996 Nov 07 7

Philips Semiconductors Preliminary specification

Integrated VIP and teletext decoder

SAA5254

(IVT1.1X)

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

LBF
V

IL

V

IH

I

LI

I

I

t

d(LFB)

VCR/FFB
V

IL

V

IH

I

LI

I

I

RGBREF (note 2)
V

I

I

LI

I

DC

SCL
V

IL

V

IH

I

LI

f

SCL

t

i(r)

t

i(f)

C

i

Inputs/outputs

LOW level input voltage −0.3 − +0.8 V
HIGH level input voltage 2.0 − VDD+ 0.5 V
input leakage current VI=0toV

DD

−10 − +10 µA
input current note 1 −1 − +1 mA
delay between LFB front edge and

− 250 − ns
input video line sync

LOW level input voltage −0.3 − +0.8 V
HIGH level input voltage 2.0 − VDD+ 0.5 V
input leakage current VI=0toV

DD

−10 − +10 µA
input current note 1 −1 − +1 mA

input voltage −0.3 − VDD+ 0.5 V
input leakage current VI=0toV

DD

−10 − +10 µA
DC current −−10 mA

LOW level input voltage −0.3 − +1.5 V
HIGH level input voltage 3.0 − VDD+ 0.5 V
input leakage current VI=0toV

DD

−10 − +10 µA
clock frequency 0 − 100 kHz
input rise time 10% to 90% −−2µs
input fall time 90% to 10% −−2µs
input capacitance −−10 pF

C

RYSTAL OSCILLATOR (OSCIN; OSCOUT)

f

XTAL

G

v

G

m

C

i

C

FB

crystal frequency − 27 − MHz
small signal voltage gain 3.5 −−
mutual conductance f = 100 kHz 1.5 −− mA/V
input capacitance −−10 pF
feedback capacitance −−5pF

BLACK
C

I

black

LI

storage capacitor to ground − 100 − nF
input leakage current VI=0toV

1996 Nov 07 8

DD

−10 − +10 µA

Philips Semiconductors Preliminary specification

Integrated VIP and teletext decoder

SAA5254

(IVT1.1X)

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

SDA
V

IL

V

IH

I

LI

C

i

t

i(r)

t

i(f)

V

OL

t

o(f)

C

L

Outputs

STTV
G

STTV

V

TCS

V

DCshift

I

O

C

L

R, G AND B
V

OL

V

OH

 output impedance −−200 Ω

Z

o

C

L

I

DC

t

o(r)

t

o(f)

BLAN
V

OL

V

OH

V

O(max)

C

L

t

o(r)

t

o(f)

LOW level input voltage −0.3 − +1.5 V
HIGH level input voltage 3.0 − VDD+ 0.5 V
input leakage current VI=0toV

DD

−10 − +10 µA
input capacitance −−10 pF
input rise time 10% to 90% −−2µs
input fall time 90% to 10% −−2µs
LOW level output voltage IOL= 3 mA 0 − 0.5 V
output fall time 3 to 1 V −−200 ns
load capacitance −−400 pF

gain of STTV relative to video input 0.9 1.0 1.1
TCS voltage amplitude 0.2 0.3 0.45 V
DC voltage shift between TCS output

−−0.15 V
and nominal video output

output drive current −−3.0 mA
load capacitance −−100 pF

LOW level output voltage IOL= 2 mA 0 − 0.2 V
HIGH level output voltage IOH= −1.6 mA;

RGBREF ≤ VDD− 2V

RGBREF

−0.25 V

RGBREF RGBREF

+0.25 V

V

load capacitance −−50 pF
DC current −−−3.3 mA
output rise time 10% to 90% −−20 ns
output fall time 90% to 10% −−20 ns

LOW level output voltage IOL= 1.6 mA 0 − 0.4 V
HIGH level output voltage IOH= −0.2 mA;

1.1 −− V

VDD= 4.5 V

= 0 mA; VDD= 5.5 V −−2.8 V

I

OH

allowed output voltage at pin with external pull-up −−VDDV
load capacitance −−50 pF
output rise time 10% to 90% −−20 ns
output fall time 90% to 10% −−20 ns

1996 Nov 07 9

Philips Semiconductors Preliminary specification

Integrated VIP and teletext decoder

SAA5254

(IVT1.1X)

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

ODD/

EVEN

V

OL

V

OH

C

L

t

o(r)

t

o(f)

COR AND Y(OPEN DRAIN)
V

pu

V

OL

C

L

t

o(f)

I

LO

T

skew

LOW level output voltage IOL= 1.6 mA 0 − 0.4 V
HIGH level output voltage IOH= −1.6 mA VDD− 0.4 − V

DD

V
load capacitance −−120 pF
output rise time 0.6 to 2.2 V −−50 ns
output fall time 2.2 to 0.6 V −−50 ns

pull-up voltage at pin −−VDDV
LOW level output voltage IOL= 5 mA 0 − 1.0 V
load capacitance −−25 pF
output fall time load resistor of

−−50 ns

1.2 kΩ to VDD;
measured between

VDD− 0.5 and 1.5 V
output leakage current VI=0toV
skew delay between display outputs

DD

−10 − +10 µA

−−20 ns

R, G, B, COR, Y and BLAN

Timing

I2C-BUS (see Fig.3)

t

LOW

t

HIGH

t

SU;DAT

t

HD;DAT

t

SU;STO

clock LOW period 4 −− µs
clock HIGH period 4 −− µs
data set-up time 250 −− ns
data hold time 170 −− ns
set-up time from clock HIGH to

4 −− µs

STOP

t

BUF

t

HD;STA

t

SU;STA

START set-up time following a STOP 4 −− µs
START hold time 4 −− µs
START set-up time following clock

4 −− µs

LOW-to-HIGH transition

Notes

1. This current is the maximum allowed into the inputs when line and field flyback signals are connected to these inputs.
Series current limiting resistors must be used to limit the input currents to ±1 mA.

2. RGBREF is the positive supply for the RGB output pins and it must be able to source the IOH current from the
R, G and B pins. The leakage specification on RGBREF only applies when there is no current load on the RGB pins.

1996 Nov 07 10

Philips Semiconductors Preliminary specification

Integrated VIP and teletext decoder
(IVT1.1X)

handbook, full pagewidth

SDA

t

SCL

SDA

MBC764

t

BUF

t

HD;STA

LOW

t

r

t

SU;STA

t

HD;DAT

t

HIGH

SAA5254

t

f

t

SU;DAT

t

SU;STO

TIMING CHAIN

handbook, full pagewidth

LSP

(TCS)

R, G, B, Y

(1)

R, G, B, Y

(1)

0 4.66

0

0

Fig.3 I2C-bus timing.

40 µs

display period

16.67

(a)

lines 42 to 291 inclusive (and 355 to 604 inclusive interlaced)

display period

41

(b)

56.67 µs

64 µs

291

line numbers

MLA662 - 1

312

(1) Also BLAN in character and box blanking.

Fig.4 Display output timing (a) line rate (b) field rate.

1996 Nov 07 11

Philips Semiconductors Preliminary specification

Integrated VIP and teletext decoder
(IVT1.1X)

64 µs

64 µs

64 µs

59.33

SAA5254

MLA037 - 2

0 4.66

32 34.33

0 2.33

handbook, full pagewidth

27.33 32

1 2 3456 7

625

(312)

624

(311)

Fig.5 Composite sync waveforms.

623

(310)

622

(309)

621

(308)

0

309 310 311 312 313 314 (1) 315 (2) 316 (3) 317 (4) 318 (5) 319 (6) 320 (7)

308 309 310 311 312 1 2 3 4 5 6 7

LSP

(Line Sync Pulse)

EP

(Equalizing Pulse)

BP

(Broad Pulse)

1996 Nov 07 12

TCS interlaced

TCS interlaced

TCS non-interlaced

LSP, EP and BP are combined to give TCS as shown. All timings are measured from falling edge of LSP.

Line numbers placed in the middle of the line.

Equivalent count numbers in brackets.

TCS is available on STTV/LFB pin.

Philips Semiconductors Preliminary specification

Integrated VIP and teletext decoder
(IVT1.1X)

SAA5254

MBA073 - 4

1 2 3456 7

FIRST FIELD START (EVEN)

625

(312)

624

(311)

623

(310)

622

(309)

621

(308)

48 µs

31 µs

16 µs

SECOND FIELD START (ODD)

313 314 (1) 315 (2) 316 (3) 317 (4) 318 (5) 319 (6) 320 (7)

31 µs

Fig.6 ODD/EVEN timing.

2 µs

2 µs

309 310 311 312

TCS interlaced

ODD/EVEN output

(normal sync mode)

ODD/EVEN output

(normal sync mode

when VCS to SCS

mode active)

ODD/EVEN output

(slave sync mode)

1996 Nov 07 13

TCS interlaced

ODD/EVEN output

(normal sync mode)

ODD/EVEN output

(normal sync mode

when VCS to SCS

mode active)

ODD/EVEN output

(slave sync mode)

Line numbers placed in the middle of the line. Equivalent count numbers in brackets.

Philips Semiconductors Preliminary specification

Integrated VIP and teletext decoder

SAA5254

(IVT1.1X)

ON-CHIP MEMORY
SAA5254 page memory organization

The organization of the page memory is shown in Fig.7. The device provides an additional row as compared with first
generation decoders; this brings the display format up to 40 characters by 25 rows. Rows 0 to 23 form the teletext page;
Row 24 is available for software generated status messages and FLOF/FASTEXT prompt information.

fixed character

written by IVT hardware

7 characters

for status

71

alphanumerics white for normal
alphanumerics green when looking
for display page

24 characters from page header
rolling when display page looked for

MAIN PAGE DISPLAY AREA

8 characters

always rolling

(time)

824

ROW

0
1
2
3
4

5

to

20

10 bytes for

page information

PACKET X / 24 if R0D7 = 0

PACKET X / 27 / 0

PACKETS 8 / 30 / 0 to 15

MBA275 - 2

PACKET X / 22
PACKET X / 23

PACKET X / 24 STORED HERE IF R0D7 = 1

10 14

14 bytes

received

free for use

by microcontroller

Fig.7 Basic page memory organization.

REMARK TO Fig.7

Row 0

ROW

0
1
2

Row 0 is for the page header. The first seven columns
(0 to 6) are free for status messages. The eighth is an
alphanumeric white or green control character, written
automatically by the SAA5254 to give a green rolling
header when a page is being looked for. The last eight
characters are for rolling time.

Row 25

21
22
23
24
25

MBA274

Fig.8 Organization of the extension memory.

1996 Nov 07 14

The first 10 bytes of Row 25 contain control data relating
to the received page as shown in Table 5. The remaining
14 bytes are free for use by the microcontroller.

Philips Semiconductors Preliminary specification

Integrated VIP and teletext decoder

SAA5254

(IVT1.1X)

Table 5 Row 25 received control data format

ROW 25

D0 PU0 PT0 MU0 MT0 HU0 HT0 C7 C11 MAG0 0
D1 PU1 PT1 MU1 MT1 HU1 HT1 C8 C12 MAG1 0
D2 PU2 PT2 MU2 MT2 HU2 C5 C9 C13 MAG2 0
D3 PU3 PT3 MU3 C4 HU3 C6 C10 C14 0 0
D4 HAM.ER HAM.ER HAM.ER HAM.ER HAM.ER HAM.ER HAM.ER HAM.ER
D5 0 0 0 0 0 0 0 0 0 PBLF
D60000000000
D70000000000
Column 0 1 2 3 4 5 6 7 8 9

Table 6 Page number and sub-code for Table 5

BIT NAME DESCRIPTION

Page number

MAG magazine
PU page units
PT page tens
PBLF page being looked for
FOUND LOW for page has been found
HAM.ER Hamming error in corresponding byte

Register maps

SAA5254 mode registers R0 to R11 are shown in Table 7.
R0 to R10 are WRITE only; R11 is READ/WRITE.
Register map (R3), for page requests, is shown in detail in
Table 9.

FOUND 0

Page sub-code

MU minutes units
MT minutes tens
HU hours units
HT hours tens
C4 to C14 transmitted control bits

1996 Nov 07 15

Philips Semiconductors Preliminary specification

Integrated VIP and teletext decoder
(IVT1.1X)

SELECT

− R11/R11B

DISABLE

ODD/EVEN

DISPLAY

STATUS

ROW ONLY

START

COLUMN

START

COLUMN

TCS ON T1 T0

DEW/ FULL

COLUMN

FIELD

SC0

SC1

SC2

BOX ON 0

1to23

BOX ON 24 BOX ON

DOUBLE

HEIGHT

VCS

SIGNAL

TEXT

SIGNAL

ROM

VER R0

R1

SAA5254

QUALITY

QUALITY

DISABLE

AUTO

D7 D6 D5 D4 D3 D2 D1 D0

REGISTER

NAME No.

HDR ROLL

EVEN

ODD/

PLL

PKT 26

7 + P/ 8-BIT ACQ ON/OFF DISABLT

HALF

A0 R4 R3 R2 R1 R0

MEMORY

−−−−−−−−

2 −−−−TB START

5 BKGND OUT BKGND IN COR OUT COR IN TEXT OUT TEXT IN PON OUT PON IN

6 BKGND OUT BKGND IN COR OUT COR IN TEXT OUT TEXT IN PON OUT PON IN

−−−−−−−−

ROM VER R4 ROM VER R3 ROM VER R2 ROM VER

625/525

SYNC

Table 7 Register map (notes 1 to 5)

1996 Nov 07 16

Advanced control 0 X/24 POS FREE RUN

Mode 1 VCS TO SCS

Page request

address

Page request data 3 −−−PRD4 PRD3 PRD2 PRD1 PRD0

Display control

(normal)

Display control

(newsflash /subtitle)

Display mode 7 STATUS TOP CURSOR ON REVEAL ON BOTTOM

Cursor row 9 − CLEAR

Cursor column 10 −−C5 C4 C3 C2 C1 C0

Cursor data 11 D7 D6 D5 D4 D3 D2 D1 D0

Device status 11B

Philips Semiconductors Preliminary specification

Integrated VIP and teletext decoder

SAA5254

(IVT1.1X)

Notes to Table 7

1. The dash (−) indicates these bits are inactive and must be written to logic 0 for future compatibility.

2. All bits in Registers R0 to R13 are cleared to logic 0 on power-up except bits D0 and D1 of Registers R1, R5 and R6
which are set to logic 1.

3. All memory is cleared to space (00100000) on power-up, except Row 0 Column 7 Chapter 0, which is alpha white
(00000111) as the acquisition circuit is enabled but all pages are on hold.

4. TB must be set to logic 0 for normal operation.

5. The I2C-bus slave address is 00110001.

Table 8 Register description

REGISTER BIT D0 TO D7 FUNCTION

R0 AVANCED CONTROL - auto-increments to Register 1

R11/R11B SELECT Selects reading of R11 if LOW or if HIGH R11B.
DISABLE ODD/
DISPLA Y STATUS ROW When SET = 1 and R1D6 = 1 open (8-bit mode) then all the text display is blanked

DISABLE HDR ROLL Disables green rolling header and time.
AUTO ODD/

FREE RUN PLL Will force the display PLL to free run in all conditions.
X/24 POS Automatic display of FASTEXT prompt row when logic 1.

EVEN Forces ODD/EVEN output LOW when logic 1.

out apart from the status row, this allows the page memory to be used for
non-textural data, such as in the German TOP system.

EVEN When SET forces ODD/EVEN LOW if any TV picture displayed, if DISABLE

ODD/EVEN = 0

R1 MODE - auto-increments to Register 2

T0, T1 Interlace/non-interlace 312/313 line control (see Table 10).
TCS ON Text composite sync or direct sync select (see Table 10 for FFB mode selection).
DEW/FULL FIELD Field-flyback or full-channel mode.

ON/OFF Acquisition circuits turned off when logic 1.

ACQ
7 + P/8-BIT 7 bits with parity checking or 8-bit mode.
DISABLE PKT 26 Disable automatic processing of packet 26.
VCS TO SCS When logic 1 enables display of messages with 60 Hz input signal.

R2 PAGE REQUEST ADDRESS - auto-increments to Register 3

START COLUMN SC0 to SC2 Point to start column for page request data (see Table 9).
TB Must be logic 0 for normal operation.

R3 PAGE REQUEST DATA - does not auto-increment (see Table 9)
R5 NORMAL DISPLAY CONTROL - auto-increments to Register 6
R6 NEWSFLASH/SUBTITLE DISPLAY CONTROL - auto-increments to Register 7; note 1

PON Picture on.
TEXT Text on.
COR Contrast reduction on.
BKGND Background colour on.

1996 Nov 07 17

Philips Semiconductors Preliminary specification

Integrated VIP and teletext decoder

SAA5254

(IVT1.1X)

REGISTER BIT D0 TO D7 FUNCTION

R7 DISPLAY MODE - does not auto-increment

BOX ON 0 Boxing function allowed on Row 0.
BOX ON 1 to 23 Boxing function allowed on Rows1 to 23.
BOX ON 24 Boxing function allowed on Row 24.
DOUBLE HEIGHT To display double height text.
BOTTOM HALF To select bottom half of page when DOUBLE HEIGHT = 1.
REVEAL ON To reveal concealed text.
CURSOR ON To display cursor.
STATUS TOP Row 25 displayed above or below the main text.

R9 CURSOR ROW - auto-increments to Register 10

2

R0 to R4 Active row for data written to or read from memory via the I
A0 Selects display memory page (when = 0) or extension memory (when = 1).
CLEAR MEM When set to logic 1, clears the display memory. This bit is automatically reset.

R10 CURSOR COLUMN - auto-increments to Register 11 or 11B

C0 to C5 Active column for data written to or read from memory via the I

C-bus.

2

C-bus.

R11 CURSOR DATA - does not auto-increment

D0 to D7 Data read from/written to memory via I2C-bus, at location pointed to by R9 and

R10. This location automatically increments each time R11 is accessed.

R11B DEVICE STATUS - does not auto-increment

VCS SIGNAL QUALITY Indicates that the video signal quality is good and PLL is phase-locked to input

video when logic 1.
TEXT SIGNAL QUALITY If a good teletext signal is being received then logic 1.
ROM VER R0 to R4 Indicated language/ROM variant. For Western European = 11000.
625/525 SYNC If the input video is a 525 line signal then logic 1.

Note

1. These functions have IN and OUT referring to inside and outside the boxing function respectively.

1996 Nov 07 18

Philips Semiconductors Preliminary specification

Integrated VIP and teletext decoder

SAA5254

(IVT1.1X)

Table 9 Register map for page requests (R3)

START COLUMN PRD4 PRD3 PRD2 PRD1 PRD0

0 DO CARE

Magazine

1 DO CARE

Page tens PT3 PT2 PT1 PT0

2 DO CARE

Page units PU3 PU2 PU1 PU0

3 DO CARE

Hours tens X X HT1 HT0

4 DO CARE

Hours units HU3 HU2 HU1 HU0

5 DO CARE

Minutes tens X MT2 MT1 MT0

6 DO CARE

Minutes units MU3 MU2 MU1 MU0

HOLD MAG2 MAG1 MAG0

Notes to Table 9

1. Abbreviations are as for Table 5 except for DO CARE bits.

2. When the DO CARE bit is set to logic 1 this means the corresponding digit is to be taken into account for page
requests. If the DO CARE bit is set to logic 0 the digit is ignored. This allows, for example, normal or timed page
selection.

HOLD is set LOW, the page is held and not updated.

3. If

4. Columns auto-increment on successive I2C-bus transmission bytes.

5. X = Don't care.

Table 10 Interlace/non-interlace 312/313 line control and ODD/

TCS ON

FFB MODE

X 0 0 interlaced 312.5/312.5 lines
X 0 1 non-interlaced 312/313 lines (note 2)
X 1 0 non-interlaced 312/313 lines (note 2)
0 1 1 SCS (scan composite sync) mode: FFB leading edge in first broad pulse of field
1 1 1 SCS (scan composite sync) mode: FFB leading edge in second broad pulse of field

Notes

1. X = don't care.

2. Reverts to interlaced mode if a newsflash or subtitle is being displayed.

T1 T0 RESULT

(1)

EVEN field detection option

1996 Nov 07 19

Philips Semiconductors Preliminary specification

Integrated VIP and teletext decoder

SAA5254

(IVT1.1X)

CLOCK SYSTEMS
Crystal oscillator

The crystal is a conventional 2-pin design operating at 27 MHz. It is capable of oscillating with both fundamental and third
overtone mode crystals. External components should be used to suppress the fundamental output of the third overtone,
as shown in Fig.9. The crystal characteristics are given in Table 11.

handbook, full pagewidth

3.3 kΩ

1 nF

3.3 µH

27 MHz 

3rd

overtone

8.2 pF

V

DD1

OSCOUT

100 nF15 pF

OSCIN

OSCGND

1

2

3

4

SAA5254

CRYSTAL

OSCILLATOR

MGD702

Fig.9 Crystal oscillator application diagram.

Table 11 Crystal characteristics (see Fig.9)

SYMBOL PARAMETER TYP. MAX. UNIT

Crystal (27 MHz, 3rd overtone)

C1 series capacitance 1.7 − pF
C0 parallel capacitance 5.2 − pF
C

L

R

r

load capacitance 20 − pF

resonance resistance − 50 Ω
R1 series resistance 20 −Ω
X

a

X

j

X

d

ageing −±5×10

adjustment tolerance −±25 × 10

drift −±25 × 10

−6

−6

−6

year

−1

1996 Nov 07 20

Philips Semiconductors Preliminary specification

Integrated VIP and teletext decoder

SAA5254

(IVT1.1X)

CHARACTER SETS

The WST specification allows the selection of national character sets via the page header transmission bits, C12 to C14.
The basic 96 character sets differ only in 13 national option characters as indicated in Tables 17, 18, 19 and 20 with
reference to their table position in the basic character matrix illustrated in Table 16. The SAA5254 automatically decodes
transmission bits C12 to C14. Tables 12, 13, 14 and 15 illustrates the character matrixes.

MLA663

handbook, full pagewidth

alphanumerics and

graphics 'space'

character

0000010

alphanumerics

character

1011010

alphanumerics or

blast-through

alphanumerics

character

0001001

alphanumerics

character

1111111

contiguous

graphics character

0110111

separated

graphics character

0110111

= =

Fig.10 Character format.

separated

graphics character

1111111

background

colour

contiguous

graphics character

1111111

display

colour

1996 Nov 07 21

Philips Semiconductors Preliminary specification

Integrated VIP and teletext decoder
(IVT1.1X)

Table 12 SAA5254P/E character data input decoding, West European languages; notes 1 to 9
For character version number (11000) see Register 11B.

b

handbook, full pagewidth

B

8

I

b

T

7

S

b4b3b2b

0 0 0 0

0 0 1 0

0 1 0 1

1 0 0 0

b

6

b

5

1

column

r
o

w

numerics

0

numerics

10 0 0 1

numerics

2

numerics

30 0 1 1

numerics

40 1 0 0

numerics

5

magenta

numerics

60 1 1 0

70 1 1 1

numerics

8

91 0 0 1 steady

101 0 1 0 end box

111 0 1 1 start box ESC

121 1 0 0

131 1 0 1

141 1 1 0 SO

151 1 1 1 SI

0

0

0 or 1

0

0 or 1

0

0

0

0

0

0

0

0

0

0

0

1

1

0

1

0

0 1 22a3 3a4 5 66a77a8 912131415

alpha -

graphics

red

blue

flash

black

graphics

red

graphics

green

graphics

yellow

graphics

blue

graphics

magenta

graphics

cyan

(2)

graphics

white

conceal
display

(2) (2)

contiguous

graphics

(2)

separated

graphics

(2) (2)

black

back -

ground

new

back -

ground

(1)

hold

graphics

(1) (2)

release

graphics

(1)

black

alpha -

alpha -

green
alpha -

yellow

alpha -

alpha -

alpha -

cyan

alpha -

white

normal

height

double

height

1

1

1

1

1

0

1

0

0

1

1

0

1

0

1

0

1

1

1

0

0

1

1

1

0

0

0

1

SAA5254

1

1

1

1

0

0

0

1

1

1

1

0

1

1

MBA429

1

1996 Nov 07 22

Philips Semiconductors Preliminary specification

Integrated VIP and teletext decoder
(IVT1.1X)

Table 13 SAA5254P/H character data input decoding, East European languages; notes 1 to 9
For character version number (11001) see Register 11B.

handbook, full pagewidth

b

B

8

I

b

T

7

S

b4b3b2b

0 0 0 0

0 0 1 0

0 1 0 1

1 0 0 0

0

b

6

b

5

1

column

r
o
w

alpha -

numerics

0

numerics

10 0 0 1

alpha -

numerics

2

numerics

30 0 1 1

numerics

40 1 0 0

numerics

5

magenta

numerics

60 1 1 0

70 1 1 1

numerics

8

91 0 0 1 steady

101 0 1 0 end box

111 0 1 1 start box ESC

normal

121 1 0 0

double

131 1 0 1

141 1 1 0 SO

151 1 1 1 SI

0

0 or 1

0

0 or 1

0

0

0

0

0

0

0

0

0

0

0

1

1

0

1

0

0 1 22a3 3a4 5 66a77a8 912131415

graphics

red

blue

black

graphics

red

graphics

green

graphics

yellow

graphics

blue

graphics
magenta

graphics

cyan

(2)

graphics

white

conceal
display

(2) (2)

contiguous

graphics

(2)

separated

graphics

(2) (2)

black
back -

ground

new

back -

ground

(1)

hold

graphics

(1) (2)

release

graphics

(1)

black

alpha -

green
alpha -

yellow

alpha -

alpha -

alpha -

cyan

alpha -

white

flash

height

height

1

0

1

1

1

0

1

0

0

1

1

0

1

0

1

0

1

1

0

1

1

1

0

0

0

0

1

SAA5254

1

1

1

1

1

0

0

0

1

1

1

1

0

1

1

MLA961

1

1996 Nov 07 23

Philips Semiconductors Preliminary specification

Integrated VIP and teletext decoder

SAA5254

(IVT1.1X)

Table 14 SAA5254P/T character data input decoding, West European and Turkish languages; notes 1 to 9
For character version number (11010) see Register 11B.

handbook, full pagewidth

b

B

8

I

b

T
S

b4b3b2b

0 0 0 0

0 0 1 0

0 1 0 1

1 0 0 0

7

b

6

b

5

1

column

r

o

w

0

10 0 0 1

2

30 0 1 1

40 1 0 0

5

60 1 1 0

70 1 1 1

8

91 0 0 1 steady

101 0 1 0 end box

111 0 1 1 start box ESC

121 1 0 0

131 1 0 1

141 1 1 0 SO

151 1 1 1 SI

0

0

0 or 1

0

0 or 1

0

0

0

0

0

0

0

0

0

0

0

1

1

0

1

0

0 1 22a3 3a4 5 66a77a 8 912131415

alpha -

black

alpha -

red

alpha -

green
alpha -

numerics

yellow

alpha -

blue

alpha -

magenta

alpha -

cyan

alpha -

white

flash

normal

height

double

height

graphics

black

graphics

red

graphics

green

graphics

yellow

graphics

blue

graphics

magenta

graphics

cyan

(2)

graphics

white

conceal

display

(2) (2)

contiguous

graphics

(2)

separated

graphics

(2) (2)

black

back -

ground

new

back -

ground

(1)

hold

graphics

(1) (2)

release

graphics

(1)

numerics

numerics

numerics

numerics

numerics

numerics

numerics

1

1

1

1

1

0

1

0

0

1

1

0

1

0

1

0

1

1

1

1

0

0

1

0

1

0

1

1

0

0

1

1

1

1

0

0

1

1

0

MBA431

1

1

1

1

1996 Nov 07 24

Philips Semiconductors Preliminary specification

Integrated VIP and teletext decoder
(IVT1.1X)

Table 15 SAA5254P/R character data input decoding, Baltic and Cyrillic languages; notes 1 to 9
For character version number (11101) see Register 11B.

B

b

8

I

b

T
S

b4b3b2b

0 0 0 1

0 1 0 0

0 1 0 1

handbook, full pagewidth

0 1 1 1

7

b

6

b

5

1

0

column

r
o
w

alpha -

numerics

00 0 0 0

black

alpha -

numerics

1

alpha -

numerics

20 0 1 0

green
alpha -

numerics

30 0 1 1

yellow

alpha -

numerics

4

blue

alpha -

numerics

5

magenta

alpha -

numerics

60 1 1 0

cyan

alpha -

7

numerics

white

81 0 0 0 flash

steady

91 0 0 1

101 0 1 0 end box

0

0 or 1

0

0 or 1

0

0

0

0

0

0

0

0

0

0

0

1

1

0

1

0

0

1 22a33a4 5 66a77a8 912131415

graphics

black

graphics

(2)

(2)

(2)

red

graphics

green

graphics

yellow

graphics

blue

graphics
magenta

graphics

cyan

graphics

white

conceal

display

contiguous

graphics

separated

graphics

(2)

red

1

1

1

1

1

0

1

0

0

1

1

0

1

0

1

0

1

1

0

1

1

1

0

0

0

0

1

1

1

1

1

0

0

SAA5254

1

1

1

0

1

1

1

1

0

1

111 0 1 1 start box TWIST

(2) (2)

height

height

(1)

(1)

black

back -

ground

new

back -

ground

hold

graphics

release

graphics

(2)

normal

121 1 0 0

double

131 1 0 1

141 1 1 0 SO

151 1 1 1 SI

1996 Nov 07 25

MBA648 - 1

Philips Semiconductors Preliminary specification

Integrated VIP and teletext decoder

SAA5254

(IVT1.1X)

Notes to Tables 12, 13 14 and 15

1. These control characters are reserved for compatibility with other data codes.

2. These control characters are presumed before each row begins.

3. Control characters shown in Columns 0 and 1 are normally displayed as spaces.

4. Characters may be referred to by column and row (for example 2/5 refers to %).

5. Black represents displayed colour. White represents background.

6. The SAA5254 national option characters are illustrated in Tables 17, 18, 19 and 20.

7. Characters 8/6, 8/7, 9/5, 9/6 and 9/7 are special characters for combining with character 8/5 (E, H and T codes only).

8. National option characters will be displayed according to the setting of control bits C12 to C14. These will be mapped
into the basic code table into positions shown in Tables 17, 18, 19 and 20.

9. Columns 2a, 3a, 6a and 7a are displayed in graphics mode.

1996 Nov 07 26

Philips Semiconductors Preliminary specification

f

Integrated VIP and teletext decoder
(IVT1.1X)

NC

7/11

NC

6/0

7/12

NC

7/13

NC

7/14

NC

SAA5254

MLA630

NC

2/9 3/1 3/9 4/1 4/9 5/1 5/9 6/1 6/9 7/1 7/9

5/11

2/11 3/3 3/11 4/3 4/11 5/3 6/3 6/11 7/3

NC

5/12

2/12 3/4 3/12 4/4 4/12 5/4 6/4 6/12 7/4

NC

5/13

NC

5/14

NC

NC

5/15

ull pagewidth

NC

2/0 2/8 3/0 3/8 4/0 4/8 5/0 5/8 7/86/8 7/0

2/1

2/2 2/10 3/2 3/10 4/2 4/10 5/2 5/10 6/2 6/10 7/2 7/10

2/3

2/4

Table 16 SAA5254 basic character matrix; note 1

1996 Nov 07 27

NC

2/5 2/13 3/5 3/13 4/5 4/13 5/5 6/5 6/13 7/5

2/6 2/14 3/6 3/14 4/6 4/14 5/6 6/6 7/6

2/7 2/15 3/7 3/15 4/7 4/15 5/7 6/7 6/15 7/7 7/15

Note to Table 16

1. Where: NC = national option character position.

Philips Semiconductors Preliminary specification

Integrated VIP and teletext decoder
(IVT1.1X)

Table 17 SAA5254P/E national option character set

andbook, full pagewidth

LANGUAGE

C12 C13 C14

ENGLISH

GERMAN

SWEDISH

ITALIAN

FRENCH

SPANISH

(1)

PHCB

000

001

010

011

100

101

2 / 3

2 / 4 4 / 0

SAA5254

CHARACTER POSITION (COLUMN / ROW)

5 / 11 5 / 12 5 / 13 5 / 14 5 / 15 6 / 0 7 / 11 7 / 12 7 / 13 7 / 14

MLB458

(1) PHCB are the Page Header Control Bits. Other combinations default to English.

Table 18 SAA5254P/H national option character set

handbook, full pagewidth

LANGUAGE

C12 C13 C14

POLISH

GERMAN

SWEDISH

SERBO-CROAT

CZECHOSLOVAKIA

RUMANIAN

(1)

PHCB

000

001

010

101

110

111

2 / 3

2 / 4 4 / 0

CHARACTER POSITION (COLUMN / ROW)

5 / 11 5 / 12 5 / 13 5 / 14 5 / 15 6 / 0 7 / 11 7 / 12 7 / 13 7 / 14

MLA966

(1) PHCB are the Page Header Control Bits. Other combinations default to German. Only the above characters change with the PHCB. All other

characters in the basic set are shown in Table 16.

1996 Nov 07 28

Philips Semiconductors Preliminary specification

Integrated VIP and teletext decoder
(IVT1.1X)

Table 19 SAA5254P/T national option character set

ndbook, full pagewidth

LANGUAGE

C12 C13 C14

ENGLISH

GERMAN

TURKISH

ITALIAN

FRENCH

SPANISH

(1)

PHCB

000

001

110

011

100

101

2 / 3

2 / 4 4 / 0

SAA5254

CHARACTER POSITION (COLUMN / ROW)

5 / 11 5 / 12 5 / 13 5 / 14 5 / 15 6 / 0 7 / 11 7 / 12 7 / 13 7 / 14

MBA430

(1) PHCB are the Page Header Control Bits. Other combinations default to English. Only the above characters change with the PHCB. All other

characters in the basic set are shown in Table 16.

1996 Nov 07 29

Philips Semiconductors Preliminary specification

Integrated VIP and teletext decoder
(IVT1.1X)

Table 20 SAA5254P/R national option character set

handbook, full pagewidth

LANGUAGE

ESTONIAN

LETTISH /
LITHUANIAN

RUSSIAN

C12 C13 C14

(1)

PHCB

010

011

100

0

1

2

3

2 / 3

2 / 4 4 / 0

234567

SAA5254

CHARACTER POSITION (COLUMN / ROW)

5 / 11 5 / 12 5 / 13 5 / 14 5 / 15 6 / 0 7 / 11 7 / 12 7 / 13 7 / 14

4

5

6

7

8

9

10

11

12

13

14

15

(1) PHCB are the Page Header Control Bits. Other combinations default to Estonian.

1996 Nov 07 30

MEA597

Philips Semiconductors Preliminary specification

Integrated VIP and teletext decoder
(IVT1.1X)

APPLICATION INFORMATION

C4

L1

1 nF

R1

3.3 k Ω

27 MHz, 3rd Overtone

V

DD2

V

SS

3.3 µH

X1

V

SS

C8
100 nF

LK2 LK1

R10

V

SS

(1)
(1)

8.2 pF 100 nF15 pF

V

DD

V

CVBS

R17 27 k Ω

V

DDD

(1)

SS

C1C2C3

100 nF

C7 100 nF

STTV/LFB

VCR/FFB

R9

RGBREF

OSCOUT

OSCIN

OSCGND

BLACK

100 nF

V

SS2

R
G
B

BLAN
V

SS3

V

DD1

1

2

3

4

V

SS1

5

REF

6
7
8
9

IREF

10

POL

11
12
13
14
15
16
17
18
19
20 21

MLB210

SAA5254

40

39

38

37

36

35

34

33

32

31

30

29

28

27

25

25

24

23

22

SDA

SCL

ODD/EVEN

2.7 k Ω

V

DD

i.c.

COR

SAA5254

Y

2.7 k Ω

V

DD

(1) Value dependent on application.

Fig.11 Application diagram; SOT129 (DIP40).

1996 Nov 07 31

Philips Semiconductors Preliminary specification

Integrated VIP and teletext decoder
(IVT1.1X)

PACKAGE OUTLINE

DIP40: plastic dual in-line package; 40 leads (600 mil)

D

seating plane

L

Z

40

e

b

SAA5254

SOT129-1

M

E

A

2

A

A

1

w M

b

1

21

c

(e )

1

M

H

pin 1 index

1

0 5 10 mm

scale

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

A

A

A

UNIT

inches

Note

1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.

max.

mm

1 2

min.

max.

b

1.70

1.14

0.067

0.045

b

1

0.53

0.38

0.021

0.015

cD E e M

0.36

0.23

0.014

0.009

52.50

51.50

2.067

2.028

14.1

13.7

0.56

0.54

E

20

(1)(1)

L

e

1

3.60

3.05

0.14

0.12

M

15.80

15.24

0.62

0.60

E

17.42

15.90

0.69

0.63

H

w

0.2542.54 15.24

0.010.10 0.60

max.

2.254.7 0.51 4.0

0.089 0.19 0.020 0.16

(1)

Z

OUTLINE
VERSION

SOT129-1

IEC JEDEC EIAJ

051G08 MO-015AJ

REFERENCES

1996 Nov 07 32

EUROPEAN

PROJECTION

ISSUE DATE

92-11-17
95-01-14

Philips Semiconductors Preliminary specification

Integrated VIP and teletext decoder
(IVT1.1X)

SOLDERING
Introduction

There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.

This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our

“IC Package Databook”

Soldering by dipping or by wave

The maximum permissible temperature of the solder is
260 °C; solder at this temperature must not be in contact
with the joint for more than 5 seconds. The total contact
time of successive solder waves must not exceed
5 seconds.

(order code 9398 652 90011).

SAA5254

The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
specified maximum storage temperature (T
printed-circuit board has been pre-heated, forced cooling
may be necessary immediately after soldering to keep the
temperature within the permissible limit.

Repairing soldered joints

Apply a low voltage soldering iron (less than 24 V) to the
lead(s) of the package, below the seating plane or not
more than 2 mm above it. If the temperature of the
soldering iron bit is less than 300 °C it may remain in
contact for up to 10 seconds. If the bit temperature is
between 300 and 400 °C, contact may be up to 5 seconds.

stg max

). If the

1996 Nov 07 33

Philips Semiconductors Preliminary specification

Integrated VIP and teletext decoder

SAA5254

(IVT1.1X)

DEFINITIONS

Data sheet status

Objective specification This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification This data sheet contains final product specifications.

Limiting values

Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the specification.

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.

PURCHASE OF PHILIPS I

Purchase of Philips I
components in the I2C system provided the system conforms to the I2C specification defined by
Philips. This specification can be ordered using the code 9398 393 40011.

2

C COMPONENTS

2

C components conveys a license under the Philips’ I2C patent to use the

1996 Nov 07 34

Philips Semiconductors Preliminary specification

Integrated VIP and teletext decoder
(IVT1.1X)

SAA5254

NOTES

1996 Nov 07 35

Philips Semiconductors – a worldwide company

Argentina: see South America
Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113,

Tel. [phone], Fax. [phone]
Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213,

Tel. [phone], Fax. [phone]
Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6,

220050 MINSK, Tel. [phone], Fax. [phone]

Belgium: see The Netherlands
Brazil: see South America
Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor,

51 James Bourchier Blvd., 1407 SOFIA,
Tel. [phone], Fax. [phone]

Canada: PHILIPS SEMICONDUCTORS/COMPONENTS,
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Hungary: see Austria
India: Philips INDIA Ltd, Shivsagar Estate, A Block, Dr. Annie Besant Rd.

Worli, MUMBAI 400 018, Tel. [phone], Fax. [phone]

Indonesia: see Singapore
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Israel: RAPAC Electronics, 7 Kehilat Saloniki St, TEL AVIV 61180,

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Italy: PHILIPS SEMICONDUCTORS, Piazza IV Novembre 3,

20124 MILANO, Tel. [phone], Fax. [phone]
Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku, TOKYO 108,

Tel. [phone], Fax. [phone]
Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL,

Tel. [phone], Fax. [phone]
Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR,

Tel. [phone], Fax. [phone]
Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905,

Tel. [phone]

Middle East: see Italy

Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB,

Tel. [phone], Fax. [phone]
New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND,

Tel. [phone], Fax. [phone]
Norway: Box 1, Manglerud 0612, OSLO,

Tel. [phone], Fax. [phone]
Philippines: Philips Semiconductors Philippines Inc.,

106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI,
Metro MANILA, Tel. [phone], Fax. [phone]

Poland: Ul. Lukiska 10, PL 04-123 WARSZAWA,
Tel. [phone], Fax. [phone]

Portugal: see Spain
Romania: see Italy
Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW,

Tel. [phone], Fax. [phone]
Singapore: Lorong 1, Toa Payoh, SINGAPORE 1231,

Tel. [phone], Fax. [phone]

Slovakia: see Austria
Slovenia: see Italy
South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale,

2092 JOHANNESBURG, P.O. Box 7430 Johannesburg 2000,
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Spain: Balmes 22, 08007 BARCELONA,
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Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH,
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Taiwan: PHILIPS TAIWAN Ltd., 23-30F, 66,
Chung Hsiao West Road, Sec. 1, P.O. Box 22978,
TAIPEI 100, Tel. [phone], Fax. [phone]

Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd.,
209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260,
Tel. [phone], Fax. [phone]

Turkey: Talatpasa Cad. No. 5, 80640 GÜLTEPE/ISTANBUL,
Tel. [phone], Fax. [phone]

Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7,
252042 KIEV, Tel. [phone], Fax. [phone]

United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes,
MIDDLESEX UB3 5BX, Tel. [phone], Fax. [phone]

United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,
Tel. [phone]

Uruguay: see South America
Vietnam: see Singapore
Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,

Tel. [phone], Fax.[phone]

For all other countries apply to: Philips Semiconductors, Marketing & Sales Communications,
Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. [phone]

© Philips Electronics N.V. 1996 SCA52
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.

The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.

Internet: http://www.semiconductors.philips.com

Printed in The Netherlands 537021/00/02/pp36 Date of release: 1996 Nov 07 Document order number: 9397 750 01015