Product specification
Supersedes data of March 1995
File under Integrated Circuits, IC02
1996 Jul 18
Page 2
Philips SemiconductorsProduct specification
Line twenty-one acquisition and display (LITOD)SAA5252
FEATURES
• Complete ‘stand-alone’ Line 21 decoder in one package
• On-chip display RAM allowing full page Text mode
• Enhanced character display modes
• Full colour captions
• RGB interface for standard colour decoder ICs
• Automatic handling of Field 2 data
• Automatic selection of (1H, 1V), (2H, 1V) or (2H, 2V)
scan modes
• Onboard OSD facility using Character generator
• RGB inputs to support existing OSD ICs
2
C-bus or ‘stand-alone’ pin control
• I
• Automatic data-ready signal generation on data
acquisition
• Can decode signals recorded on standard VHS and
S-VHS tape.
GENERAL DESCRIPTION
The SAA5252 (LITOD) is a single-chip CMOS device,
which will acquire, decode and display Line 21 Closed
Captioning data from a 525-line composite video signal.
Operation as an On-Screen Display (OSD) device is also
possible. Normal and line progressive scan modes are
supported.
SAA5252PDIP24plastic dual in-line package; 24 leads (600 mil)SOT101-1
SAA5252TSO24plastic small outline package; 24 leads; body width 7.5 mmSOT137-1
1996 Jul 182
Page 3
Philips SemiconductorsProduct specification
Line twenty-one acquisition and display (LITOD)SAA5252
BLOCK DIAGRAM
V
V
SSDD
VH
i.c.
OSCIN
OSCGND
OSCOUT
BLACK
IREF
CVBS
1918
21
22
OSCILLATOR
20
SAA5252
23
24
1
SYNC SEPARATOR
ACQUISITION TIMING
ADC
786
DISPLAY
TIMING
CHARACTER
ROM
CODE
INTERPRETER
AND
ADDRESSING
AND
DATA
DETECTOR
Fig.1 Block diagram.
CHARACTER
GENERATOR
ADDRESSING
PAGE
RAM
SERIAL/
PARALLEL
AND
PARITY
17
RGBREF
16
BLAN
15
R
ROUNDING
ITALICS
AND
RGB
MULTIPLEXOR
2
I C
INTERFACE
CONTROL
2
2
I C/DC
14
13
9
10
11
12
5
3
4
G
B
BLANIN
RIN
GIN
BIN
DR
SDA
SCL
MBB623 - 1
1996 Jul 183
Page 4
Philips SemiconductorsProduct specification
Line twenty-one acquisition and display (LITOD)SAA5252
PINNING
SYMBOLPINDESCRIPTION
CVBS1composite video input; signal should be connected via a
100 nF capacitor
2
C/DC2input selects I2C or Direct Control
I
2
SDA3serial data port for I
direct control
SCL4serial clock input for I
direct control
DR5data-ready signal to microcontroller (active-LOW) or
mode select input for direct control
i.c.6internally connected; connect to V
operation
V7vertical reference input for display timing
H8horizontal reference input for display timing
BLANIN9video blanking input from external OSD device
RIN10RED video input from external OSD device
GIN11GREEN video input from external OSD device
BIN12BLUE video input from external OSD device
B13BLUE video output
G14GREEN video output
R15RED video output
BLAN16video blanking output
RGBREF17input voltage defining output HIGH level for RGB pins
for closed captioning output
V
DD
V
SS
18+5 V supply
190 V ground
OSCOUT20oscillator output
OSCIN21oscillator input
OSCGND22oscillator ground
BLACK23video black level storage input; connected to V
100 nF capacitor
IREF24reference current input; connected to V
resistor
C-bus or mode select input for
2
C-bus or mode select input for
for normal
SS
SS
via 27 kΩ
SS
via
1
CVBS
2
I C/DC
BLANIN
SDA
SCL
DR
i.c.
RIN
GIN
BIN
2
3
4
5
6
V
H
SAA5252
7
8
9
10
11
12
MBB622 - 1
Fig.2 Pin configuration.
24
23
22
21
20
19
18
17
16
15
14
13
IREF
BLACK
OSCGND
OSCIN
OSCOUT
V
SS
V
DD
RGBREF
BLAN
R
G
B
1996 Jul 184
Page 5
Philips SemiconductorsProduct specification
Line twenty-one acquisition and display (LITOD)SAA5252
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOLPARAMETERCONDITIONSMIN.MAX.UNIT
V
DD
V
Imax
V
Omax
V
dif
I
IOK
I
Omax
T
amb
T
stg
V
es
supply voltage (all supplies)−0.3+6.5V
maximum input voltage (any input)note 1−0.3VDD+ 0.5 V
maximum output voltage (any output)note 1−VDD+ 0.5 V
difference between VSS and OSCGND−±0.25V
DC input or output diode current−±20mA
maximum output current (each output)−±10mA
operating ambient temperature−20+70°C
storage temperature−55+125°C
electrostatic handling
human body modelnote 2−2000+2000V
machine modelnote 3−200+200V
Notes
1. This maximum value has an absolute maximum of 6.5 V independent of V
DD
.
2. The human body model ESD simulation is equivalent to discharging a 100 pF capacitor via a 1.5 kΩ resistor, which
produces a single discharge transient. Reference
to MIL-STD 883C method 3015.7)”
.
“Philips Semiconductors Test Method UZW-BO/FQ-A302 (similar
3. The machine model ESD simulation is equivalent to discharging a 200 pF capacitor via a resistor and series inductor
with effective dynamic values of 25 Ω and 2.5 µH, which produces a damped oscillating discharge. Reference
“Philips Semiconductors Test Method UZW-BO/FQ-B302 (similar to EIAJ IC-121 Test Method 20 condition C)”
.
Quality
This device will meet the requirements of the
in accordance with
“Quality Reference Handbook (order number 9397 750 00192)”
“Philips Semiconductors General Quality Specification UZW-BO/FQ-0601”
. This details the acceptance criteria
for all Q & R tests applied to the product.
1996 Jul 185
Page 6
Philips SemiconductorsProduct specification
Line twenty-one acquisition and display (LITOD)SAA5252
CHARACTERISTICS
V
= 5 to 5.5 V; VSS=0V; T
DD
SYMBOLPARAMETERCONDITIONSMIN.TYP.MAX.UNIT
Supplies
V
DD
I
DDtot
supply voltage4.55.05.5V
total supply current−30−mA
Inputs
= −20 to +70 °C; unless otherwise specified.
amb
CVBS (
V
V
V
Z
V
Z
C
PIN 1)
syn
vid(p-p)
dat
source
I
I
I
IREF (PIN 24)
R
24
V
24
H(PIN 8)
V
IL
V
IH
I
LI
I
Imax
C
I
t
r
t
f
t
W
PIN 7)
V(
V
IL
V
IH
I
LI
I
Imax
C
I
t
r
t
f
t
W
sync voltage amplitude0.10.30.6V
video voltage amplitude
0.71.01.4V
(peak-to-peak value)
caption data voltage
0.250.350.49V
amplitude
source impedance−−250Ω
input switching voltage level
1.72.02.3V
of sync separator
input impedance2.55−kΩ
input capacitance−−10pF
−10−+10µA
LOW level output voltageIOL= 1.6 mA0−0.4V
output fall timebetween 4 V and 1 V with
−−50ns
3.3 kΩ to 5 V
load capacitance−−100pF
R, G
AND B(PINS 15, 14 AND 13; CAPTION MODE)
V
OL
V
OH
Z
O
C
L
t
r
t
f
LOW level output voltageIOL=+2mA0−0.2V
HIGH level output voltageIOH= −2mAV17− 0.3V
output impedance−−200Ω
load capacitance−−50pF
output rise timebetween 10% and 90%−−10ns
output fall timebetween 90% and 10%−−10ns
BLAN (PIN 16)
V
V
C
t
r
t
f
t
skew
OL
OH
L
LOW level output voltageIOL=+2mA0−0.4V
HIGH level output voltageIOH= −2 mA1.1−2.8V
load capacitance−−50pF
output rise timebetween 10% and 90%−−10ns
output fall timebetween 90% and 10%−−10ns
skew delay time between
display and R, G, B, BLAN
17
V17+ 0.4V
−−10ns
1996 Jul 188
Page 9
Philips SemiconductorsProduct specification
Line twenty-one acquisition and display (LITOD)SAA5252
SYMBOLPARAMETERCONDITIONSMIN.TYP.MAX.UNIT
I2C timing (see Fig.3)
t
LOW
t
HIGH
t
SU;DAT
t
HD;DAT
t
SU;STO
t
BUF
t
HD;STA
t
SU;STA
t
r
t
f
Note
1. These inputs are analog, VIL and VIH values are quoted as a guide for digital RGB users.
clock LOW time4−−µs
clock HIGH time4−−µs
data set-up time250−−ns
data hold time170−−ns
set-up time from clock
4−−µs
HIGH-to-STOP
START set-up time
4−−µs
following a STOP
START hold time4−−µs
START set-up time
4−−µs
following clock
LOW-to-HIGH transition
output rise timebetween 10% and 90%−−10ns
output fall timebetween 90% and 10%−−10ns
handbook, full pagewidth
SDA
SCL
SDA
MBC764
t
BUF
t
LOW
t
HD;STA
t
t
SU;STA
Fig.3 I2C-bus timing diagram.
t
f
t
r
t
HD;DAT
HIGH
t
SU;DAT
t
SU;STO
1996 Jul 189
Page 10
Philips SemiconductorsProduct specification
Line twenty-one acquisition and display (LITOD)SAA5252
APPLICATION INFORMATION
handbook, full pagewidth
CVBS
5 V
3.3
microcontroller
kΩ
to
microcontroller
100 nF
C5
2
I C-bus
to
CVBS
2
I C/DC
SDA
SCL
DR
BLANIN
RIN
GIN
BIN
i.c.
V
H
1
2
3
4
5
6
SAA5252
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
IREF
BLACK
OSCGND
OSCIN
OSCOUT
V
SS
V
DD
RGBREF
BLAN
R
G
B
C4
27 kΩ
100 nF
C3
33 pF
33 pF
C7
100 nF
C2
C6
10 µF
5 V
5 V
12 MHz
MBB624 - 2
C3
10 nF
(1)
(1)
5 V
(1) Value dependent on application.
Fig.4 Application diagram.
C1
L1R1
Fig.5 Ceramic resonator equivalent circuit.
1996 Jul 1810
C0
MEA560
Page 11
Philips SemiconductorsProduct specification
Line twenty-one acquisition and display (LITOD)SAA5252
DISPLAY GENERATOR
General description
The displayed characters are defined on a 5-by-12 matrix
within a 7-by-13 window, allowing one blank pixel either
side of the character and a blank pixel row above. There
are a number of display options available controlled by
Register 1, or external pins in ‘stand-alone’ mode.
The three display modes are video, text and caption, the
device is powered up in the video mode.
The display generator reads the Pre-amble Address Code
(PAC) then the data associated with that row. Each
character is then rounded after which it can be italicized
and/or underlined, depending on the PAC or mid-row
codes, before being passed on to the output circuitry.
Figure 6 shows the character set.
Display of external On-Screen Display (OSD) facilities
The R, G, B and BLAN outputs of the display have the
capability to be put in a 3-state mode allowing other OSD
devices to take control of the television R, G, B and BLAN
signals.
When the BLANIN is held HIGH then the R, G, B and
BLAN outputs from display are disabled and the R, G, B
and BLAN signals come directly from the RGBIN and
BLANIN inputs. This will allow On-Screen Display to be
placed on top of the captioning without any corruption,
leaving the captions intact when the On-Screen Display is
switched off (BLANIN goes LOW). In this form of operation
the RGBIN and RGBOUT pins can be considered
transparent; BLANIN goes through the normal output
buffer to BLAN.
V
+ve/−ve
ACQ OFFEN1EN0M1M0
H3H2H1H0
Table 2 Register map (READ)
REGISTERD7D6D5D4D3D2D1D0
80POR000
81PARITY
ERROR
82PARITY
ERROR
1996 Jul 1811
DATA
BIT 7
DATA
BIT 7
DATA
BIT 6
DATA
BIT 6
DATA
BIT 5
DATA
BIT 5
F1/F2EDSPARITY
SHUTDOWN
DATA
BIT 4
DATA
BIT 4
DATA
BIT 3
DATA
BIT 3
DATA
BIT 2
DATA
BIT 2
DATA
READY
DATA
BIT 1
DATA
BIT 1
Page 12
Philips SemiconductorsProduct specification
Line twenty-one acquisition and display (LITOD)SAA5252
b
6
b3b2b1b
0 0 0 1
0 0 1 1
b
5
b
4
0
0
0
0
column
0 1234 567
r
o
w
00 0 0 0white
white
1
underline
green
20 0 1 0
green
3
underline
40 1 0 0blue
blue
50 1 0 1
underline
60 1 1 0cyan
cyan
70 1 1 1
underline
81 0 0 0red
0
0
1
0
0
1
1
0
1
11
1
0
011
0
1
1
0
1
signifies "flash on" command
signifies a transparent space
1 0 0 1
1 0 1 0
1 0 1 1
1 1 0 1
1 1 1 0
red
9
underline
A
yellow
yellow
B
underline
C1 1 0 0
magenta
magenta
D
underline
E
italics
italics
F1 1 1 1
underline
The ‘0’ and ‘zero’ use the same character, 4FH.
MBB625 - 2
Fig.6 Character set.
1996 Jul 1812
Page 13
Philips SemiconductorsProduct specification
Line twenty-one acquisition and display (LITOD)SAA5252
I2C INTERFACE
Description of WRITE registers
The write subaddresses auto increment from 0 through to 4 at which point they stay until a new write subaddress is sent.
Registers are set to all logic 0 at power-up.
Table 3 Register 0 WRITE (Control Byte 1)
BITDESCRIPTION
D0 to D3H0 to H3 set the offset position from the start of the horizontal sync pulse, set to a nominal value on reset.
D4Vertical sync pulse expected to be negative going logic 0 or positive-going logic 1.
D5Horizontal sync pulse expected to be negative going logic 0 or positive-going logic 1.
D6Video outputs will be positive going logic 0 or negative-going logic 1.
D7Data field select. When set to logic 0 Field 1 is decoded, when set to logic 1 Field 2 is decoded.
Table 4 Register 1 WRITE (Control Byte 2)
BITDESCRIPTION
D0, D1Display mode selection bits. Table 8 shows the possible display modes.
D2, D3Enhanced caption mode selection bits. Table 9 shows the possible enhanced caption modes.
D4When set to logic 1 acquisition of caption data is inhibited to allow the display to be used for
On-Screen Display purposes.
D5Acquisition window selection. When set to logic 0 only Line 21 is checked for caption data. When set to
logic 1, lines 19 to 23 of both fields are checked, allowing encrypted video signals to be handled.
D6User channel selection.
D7Clears the page memory when set HIGH. The page memory will be within two fields (30 ms).
Table 5 Register 2 WRITE (On-Screen Display data row address)
BITDESCRIPTION
D0 to D3Row 0 to 3 sets the row address for On-Screen Display. This stored value will be incremented by overflow
increments of Register 3.
Table 6 Register 3 WRITE (On-Screen Display data column address)
BITDESCRIPTION
D0 to D4Columns 0 to 4 sets the column address for On-Screen Display. This stored value will be incremented by
writes to Register 4.
Table 7 Register 4 WRITE (On-Screen Display data)
BITDESCRIPTION
D0 to D6OSD0 to OSD6, On-Screen Display data bits writing to this register causes Register 3 to increment its
stored value.
1996 Jul 1813
Page 14
Philips SemiconductorsProduct specification
Line twenty-one acquisition and display (LITOD)SAA5252
Table 8 Display modes
DISPLAY MODE OPTIONSM1M0
Video only00
Text mode01
Normal caption mode10
Enhanced caption mode11
Table 9 Enhanced caption modes
ENHANCED CAPTION MODESEN1EN0
Enhanced caption modesEN1EN0
Shadowed character/Video background00
Shadowed character/Mesh background01
Normal character/Video background10
Normal character/Mesh background11
Description of READ registers
The read subaddresses auto increment from 80H through to 82H at which point they stay until a new read subaddress
is sent.
All the bits in Table 10 are reset to logic 0 after the register is read.
Table 10 Register 80H READ (status)
BITDESCRIPTION
D0Data ready (new data has been acquired).
D1Parity error shut-down, goes HIGH when SAA5252 has a parity shut-down condition.
D2Indicates the following bytes are extended data service bytes.
D3Indicates Field 1 or Field 2 data bytes.
2
D7Indicates Power-On Reset (POR) has occurred, all I
Table 11 Register 81H READ (first data byte)
BITDESCRIPTION
D0 to D6Data Bit 1 to Data Bit 7 (see note 1).
D7Parity error flag bit. Bit goes HIGH when a parity error has occurred.
Note
1. In the Line 21, specification data bits are numbered D1 to D8.
C-bus write registers have been reset to logic 0.
Table 12 Register 82H READ (second data byte)
BITDESCRIPTION
D0 to D6Data Bit 1 to Data Bit 7 (see note 1).
D7Parity error flag bit. Bit goes HIGH when a parity error has occurred.
Note
1. In the Line 21, specification data bits are numbered D1 to D8.
1996 Jul 1814
Page 15
Philips SemiconductorsProduct specification
Line twenty-one acquisition and display (LITOD)SAA5252
Interface to microcontroller using I2C-bus
The interface to the microcontroller is via the two-wire
serial I2C-bus, and optionally by a Data-Ready signal
(DR). On power up the microcontroller initializes the
device by an I2C-bus WRITE to Registers 0
(Control Byte 1). The I2C-bus subaddress is then auto
incremented to point to Register 1 (Control Byte 2). These
two registers configure the device to the users
requirements.
If the device is to be used for data acquisition only, then
there are three methods by which the microcontroller can
be informed of the arrival of valid Line 21 data:
• It can poll the DR pin, if the function has been enabled,
and wait for it to go LOW.
• It can use the negative edge of the DR signal to cause
an interrupt.
• It can poll the Data Ready bit (bit D0 of the status byte,
I2C-bus READ Register 0).
When valid data is detected, the microcontroller must
initiate an I2C-bus READ of Registers 80H, 81H and 82H.
The first and second data bytes from the most recently
received Line 21 are in Register 81H and Register 82H
respectively.
The DR pin, and the Data Ready bit (Status bit D0) will be
cleared after any register has been read. POR is reset
after Register 80H has been read.
‘STAND-ALONE’ (NON I2C-BUS) OPERATION
To set the SAA5252 for ‘stand-alone’ operation pin 2
(I2C/DC) is tied LOW. This will change the operation of the
SCL, SDA and DR pins to mode select inputs which will
select as shown in Table 13.
In the caption mode the SAA5252 operates in the basic
Normal character/Black background mode. This complies
with the FCC ruling. In the Enhanced caption mode the
set-up will be Shadowed character/Video background.
SDA and SCL in the ‘stand-alone’ operation act as bits M0
and M1 in Table 8.
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
A
A
UNIT
inches
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
max.
mm
OUTLINE
VERSION
SOT101-1
12
min.
max.
1.7
1.3
0.066
0.051
IEC JEDEC EIAJ
051G02MO-015AD
b
b
1
0.53
0.38
0.021
0.015
0.32
0.23
0.013
0.009
REFERENCES
cD E eM
32.0
31.4
1.26
1.24
1996 Jul 1816
12
14.1
13.7
0.56
0.54
(1)(1)
e
L
3.9
3.4
EUROPEAN
PROJECTION
M
E
15.80
15.24
0.62
0.60
17.15
15.90
0.68
0.63
1
0.15
0.13
H
ISSUE DATE
w
0.252.5415.24
0.010.100.60
92-11-17
95-01-23
Z
max.
2.25.10.514.0
0.0870.200.0200.16
(1)
Page 17
Philips SemiconductorsProduct specification
Line twenty-one acquisition and display (LITOD)SAA5252
SO24: plastic small outline package; 24 leads; body width 7.5 mm
D
c
y
Z
24
pin 1 index
1
e
13
12
w M
b
p
SOT137-1
E
H
E
Q
A
2
A
1
L
p
L
detail X
(A )
A
X
v M
A
A
3
θ
0510 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
mm
OUTLINE
VERSION
SOT137-1
A
max.
2.65
0.10
A1A2A
0.30
2.45
0.10
2.25
0.012
0.096
0.004
0.089
IEC JEDEC EIAJ
075E05 MS-013AD
0.25
0.01
b
3
p
0.49
0.32
0.36
0.23
0.019
0.013
0.014
0.009
UNIT
inches
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
(1)E(1)(1)
cD
15.6
7.6
7.4
0.30
0.29
1.27
0.050
15.2
0.61
0.60
REFERENCES
1996 Jul 1817
eHELLpQ
10.65
10.00
0.42
0.39
1.4
0.055
1.1
0.4
0.043
0.016
1.1
1.0
0.043
0.039
PROJECTION
0.25
0.250.1
0.01
0.01
EUROPEAN
ywvθ
Z
0.9
0.4
8
0.004
ISSUE DATE
0.035
0.016
92-11-17
95-01-24
0
o
o
Page 18
Philips SemiconductorsProduct specification
Line twenty-one acquisition and display (LITOD)SAA5252
SOLDERING
Introduction
There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our
“IC Package Databook”
(order code 9398 652 90011).
DIP
OLDERING BY DIPPING OR BY WA VE
S
The maximum permissible temperature of the solder is
260 °C; solder at this temperature must not be in contact
with the joint for more than 5 seconds. The total contact
time of successive solder waves must not exceed
5 seconds.
The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
specified maximum storage temperature (T
stg max
). If the
printed-circuit board has been pre-heated, forced cooling
may be necessary immediately after soldering to keep the
temperature within the permissible limit.
EPAIRING SOLDERED JOINTS
R
Apply a low voltage soldering iron (less than 24 V) to the
lead(s) of the package, below the seating plane or not
more than 2 mm above it. If the temperature of the
soldering iron bit is less than 300 °C it may remain in
contact for up to 10 seconds. If the bit temperature is
between 300 and 400 °C, contact may be up to 5 seconds.
SO
REFLOW SOLDERING
Reflow soldering techniques are suitable for all SO
packages.
Several techniques exist for reflowing; for example,
thermal conduction by heated belt. Dwell times vary
between 50 and 300 seconds depending on heating
method. Typical reflow temperatures range from
215 to 250 °C.
Preheating is necessary to dry the paste and evaporate
the binding agent. Preheating duration: 45 minutes at
45 °C.
AVE SOLDERING
W
Wave soldering techniques can be used for all SO
packages if the following conditions are observed:
• A double-wave (a turbulent wave with high upward
pressure followed by a smooth laminar wave) soldering
technique should be used.
• The longitudinal axis of the package footprint must be
parallel to the solder flow.
• The package footprint must incorporate solder thieves at
the downstream end.
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Maximum permissible solder temperature is 260 °C, and
maximum duration of package immersion in solder is
10 seconds, if cooled to less than 150 °C within
6 seconds. Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
EPAIRING SOLDERED JOINTS
R
Fix the component by first soldering two diagonally-
opposite end leads. Use only a low voltage soldering iron
(less than 24 V) applied to the flat part of the lead. Contact
time must be limited to 10 seconds at up to 300 °C. When
using a dedicated tool, all other leads can be soldered in
one operation within 2 to 5 seconds between
270 and 320 °C.
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
1996 Jul 1818
Page 19
Philips SemiconductorsProduct specification
Line twenty-one acquisition and display (LITOD)SAA5252
DEFINITIONS
Data sheet status
Objective specificationThis data sheet contains target or goal specifications for product development.
Preliminary specificationThis data sheet contains preliminary data; supplementary data may be published later.
Product specificationThis data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
2
PURCHASE OF PHILIPS I
C COMPONENTS
2
Purchase of Philips I
components in the I2C system provided the system conforms to the I2C specification defined by
Philips. This specification can be ordered using the code 9398 393 40011.
C components conveys a license under the Philips’ I2C patent to use the
1996 Jul 1819
Page 20
Philips Semiconductors – a worldwide company
Argentina: see South America
Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113,
United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,
Tel. +1 800 234 7381, Fax. +1 708 296 8556
Uruguay: see South America
Vietnam: see Singapore
Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,
Tel. +381 11 825 344, Fax.+381 11 635 777
For all other countries apply to: Philips Semiconductors, Marketing & Sales Communications,
Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Printed in The Netherlands537021/01/04/pp20 Date of release: 1996 Jul 18Document order number: 9397 750 00975
Internet: http://www.semiconductors.philips.com/ps/
(1)SAA5252_4 June 26, 1996 11:51 am
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