Datasheet SAA5244AGP, SAA5244AP Datasheet (Philips)

Page 1
INTEGRATED CIRCUITS
DATA SH EET
SAA5244A
Integrated VIP and teletext decoder (IVT1.1)
Product specification File under Integrated Circuits, IC02
March 1992
Page 2
Philips Semiconductors Product specification
Integrated VIP and teletext decoder (IVT1.1)

FEATURES

Complete teletext decoder including page memory in a single 40-pin DIL package
Single +5 V power supply
Digital data slicer and display clock phase-locked loop
reduces peripheral components to a minimum
Both video and scan related synchronization modes are supported
On board single page memory including extension packets for FASTEXT
Single page acquisition system
RGB interface to standard colour decoder ICs, push-pull
output drive
Data capture performance similar to SAA5231 (VIP2)
2
Simple software control via I
Option for five national languages
32 supplementary characters for on-screen displays
Optional storage of packet 24 in the display memory
Page links in packets 27 and 8/30 are Hamming
decoded
Separate text and video signal quality detectors, 625/525 video status and language version all readable via I2C-bus
Automatic ODD/EVEN output control with manual override
Control of display PLL free-run and rolling header via I2C-bus
VCS to SCS mode for stable 525 line status display
C-bus
SAA5244A

DESCRIPTION

The Integrated VIP and Teletext (IVT1.1) is a teletext decoder (contained within a single-chip package) for decoding 625-line based World System Teletext transmissions. The teletext decoder hardware is based on a reduced function version of the device SAA5246 (IVT1.0). The Video Input Processor (VIP) section of the device uses mixed analog and digital designs for the data slicer and the display clock phase-locked loop functions. As a result the number of external components is greatly reduced and no critical or adjustable components are required. A single page static RAM is incorporated in the device thereby giving a genuine single-chip teletext decoder device.

ORDERING INFORMATION

EXTENDED TYPE
NUMBER
SAA5244AP 40 DIL plastic SOT129
SAA5244AGP 44 QFP plastic SOT205A
Notes
1. SOT129-1; 1996 December 16.
2. SOT205-1; 1996 December 16.
PINS PIN POSITION MATERIAL CODE
PACKAGE
(1)
(2)
Page 3
Philips Semiconductors Product specification
Integrated VIP and teletext decoder
SAA5244A
(IVT1.1)

QUICK REFERENCE DATA

SYMBOL PARAMETER MIN. TYP. MAX. UNIT
V
DD
I
DD
V
syn
V
vid
f
XTAL
T
amb
positive supply voltage 4.5 5 5.5 V supply current 74 148 mA sync amplitude 0.1 0.3 0.6 V video amplitude 0.7 1 1.4 V crystal frequency 27 MHz operating ambient temperature range 20 70 °C
Page 4
Philips Semiconductors Product specification
Integrated VIP and teletext decoder (IVT1.1)
handbook, full pagewidth
Y
BLAN
23 19 21 18 15-17 22
DATA
SLICER
AND
CLOCK
REGENERATOR
RGBREF RGB
DISPLAY
ODD / EVENCOR
TELETEXT
ACQUISITION
AND
DECODING
PAGE
MEMORY
SAA5244A
V
SS
REF
OSCOUT
OSCIN
DCVBS
5
6
2 3
2
I
C-BUS
INTERFACE
ANALOG
TO
DIGITAL
CONVERTER
CRYSTAL
OSCILLATOR
4 7 9 8 11 13 12
OSCGND BLACK IREF CVBS POL STTV / LFB
TIMING
CHAIN
INPUT
CLAMP
AND SYNC
SEPARATOR
SAA5244A
DISPLAY
CLOCK PHASE
LOCKED
LOOP
VCR / FFB
25
SDA
24
SCL
1
V
DD
10 14
20
V
DD
V
SS
MLA228 - 1
Fig.1 Block diagram for SOT129 (DIL40) package.
Page 5
Philips Semiconductors Product specification
Integrated VIP and teletext decoder
SAA5244A
(IVT1.1)

PINNING

SYMBOL SOT129 SOT205A DESCRIPTION
V
DD
OSCOUT 2 19 27 MHz crystal oscillator output OSCIN 3 20 27 MHz crystal oscillator input OSCGND 4 21 0 V crystal oscillator ground V
SS
REF−−− negative reference voltage for the ADC. The pin should be connected to 0 V REF+ 6 23 positive reference voltage for the ADC. The pin should be connected to +5 V BLACK 7 24 video black level storage pin, connected to ground via a 100 nF capacitor CVBS 8 25 composite video input pin. A positive-going 1 V (peak-to-peak) input is required,
IREF 9 26 reference current input pin, connected to ground via a 27 k resistor V
DD
POL 11 28 STTV/LFB/FFB polarity selection pin STTV/LFB 12 29 sync to TV output pin/line flyback input pin. Function controlled by an internal
VCR/FFB 13 32 PLL time constant switch/field flyback input pin. Function controlled by an
V
SS
R 15 34 dot rate character output of the RED colour information G 16 35 dot rate character output of the GREEN colour information B 17 36 dot rate character output of the BLUE colour information RGBREF 18 37 input DC voltage to define the output high level on the RGB pins BLAN 19 38 dot rate fast blanking output V
SS
COR 21 40 programmable output to provide contrast reduction of the TV picture for mixed
ODD/
EVEN 22 41 25 Hz output synchronized with the CVBS input’s field sync pulses to produce a
Y 23 42 dot rate character output of teletext foreground colour information open drain
SCL 24 43 serial clock input for the I
SDA 25 44 serial data port for the I
n.c. 4 to 7
i.c. 26 to 40 1 to 3
1 18 +5 V supply
5 22 0 V ground
connected via a 100 nF capacitor
10 27 +5 V supply
register bit (scan sync mode)
internal register bit (scan sync mode)
14 33 0 V ground
20 39 0 V ground
text and picture displays or when viewing newsflash/subtitle pages; open drain output
non-interlaced display by adjustment of the vertical deflection currents
output
device
power-down of the device not connected
30, 31
internally connected. Must be left open-circuit in application
8 to 17
2
C-bus. It can still be driven during power-down of the
2
C-bus; open drain output. It can still be driven during
Page 6
Philips Semiconductors Product specification
Integrated VIP and teletext decoder (IVT1.1)
handbook, halfpage
V
DD
OSCOUT
OSCIN
OSCGND
V
SS
REF
BLACK
CVBS
IREF
V
DD
POL
STTV / LFB
VCR / FFB
V
SS
R
1 2 3 4 5 6 7 8 9
10
SAA5244A
11 12 13
15
40 39 38 37 36 35
34
i.c.
33 32 31 30 29 28 2714 26
SAA5244A
RGBREF
BLAN
V
SS
G
16
B
17 18 19 20
MLA035 - 3
SDA
25
SCL
24
Y
23
ODD / EVEN
22
COR
21
Fig.2 Pin configuration; SOT129 (DIL40).
Page 7
Philips Semiconductors Product specification
Integrated VIP and teletext decoder (IVT1.1)
SDA
handbook, full pagewidth
i.c.
n.c.
i.c.
index corner
1 2 3 4 5 6 7 8 9
10
11
SCL
44
43
ODD / EVEN
Y 42
41
SAA5244A
COR
40
SAA5244A
G
VSS
RGBREF
BLAN
B
R
39
38
37
36
35
34
33
V
SS
32
VCR / FFB
31
n.c.
30
n.c.
29
STTV / LFB
28
POL
27
V
DD
26
IREF
25
CVBS
24
BLACK
23
REF
20
21
OSCIN
OSCGND
22
VSS
12
13
14
15
16
17
18
19
DD
i.c.
V
OSCOUT
Fig.3 Pin configuration; SOT205A (QFPL44).
MLA227 - 2
Page 8
Philips Semiconductors Product specification
Integrated VIP and teletext decoder
SAA5244A
(IVT1.1)

LIMITING VALUES

In accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER MIN. MAX. UNIT
V
DD
V
I
V
O
I
O
I
IOK
T
amb
T
stg
V
stat
Note
1. The human body model ESD simulation is equivalent to discharging a 100 pF capacitor through a 1.5 k resistor; this produces a single discharge transient. Reference Philips Semiconductors test method UZW-B0/FQ-A302 (compatible with MIL-STD method 3015.7).
supply voltage (all supplies) 0.3 6.5 V input voltage (any input) 0.3 VDD+0.5 V output voltage (any output) 0.3 VDD+0.5 V output current (each output) −±10 mA DC input or output diode current −±20 mA operating ambient temperature range 20 70 °C storage temperature range 55 125 °C electrostatic handling
human body model (note 1) 2000 2000 V

Failure Rate

The failure rate at T
=55°C will be a maximum of 1000 FITS (1 FIT = 1 x 10−9 failures per hour).
amb
Page 9
Philips Semiconductors Product specification
Integrated VIP and teletext decoder
SAA5244A
(IVT1.1)

CHARACTERISTICS

V
=5 V±10%; T
DD
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Supply
V
DD
I
DD
supply voltage range (VDD−VSS) 4.5 5 5.5 V total supply current 74 148 mA
Inputs
CVBS V
t
syn
syn
sync amplitude 0.1 0.3 0.6 V delay from CVBS to TCS
output from STTV buffer (nominal video, average of leading/trailing edge)
t
syd
change in sync delay between all black and all white video input at nominal levels
V
vid(p-p)
video input amplitude (peak-to-peak)
display PLL catching range ±7 −− %
Z
src
C
I
source impedance −−250
input capacitance −−10 pF IREF R
g
resistor to ground 27 k POL V
IL
V
IH
I
LI
C
I
input voltage LOW 0.3 0.8 V
input voltage HIGH 2.0 VDD+0.5 V
input leakage current VI= 0 to V
input capacitance −−10 pF LFB V
IL
V
IH
I
LI
I
I
t
LFB
input voltage LOW 0.3 0.8 V
input voltage HIGH 2.0 VDD+0.5 V
input leakage current VI= 0 to V
input current note 1 1 1mA
delay between LFB front edge
and input video line sync VCR/FFB V
IL
V
IH
I
LI
I
I
input voltage LOW 0.3 0.8 V
input voltage HIGH 2.0 VDD+.5 V
input leakage current VI= 0 to V
input current note 1 1 1mA
= 20 to +70 °C, unless otherwise specified
amb
DD
DD
DD
150 0 150 ns
0 25 ns
0.7 1 1.4 V
10 10 µA
10 10 µA
250 ns
10 10 µA
Page 10
Philips Semiconductors Product specification
Integrated VIP and teletext decoder
SAA5244A
(IVT1.1)
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Inputs
RGBREF (NOTE 2) V
I
I
LI
I
DC
SCL V
IL
V
IH
I
LI
f
SCL
t
r
t
f
C
I
Inputs/outputs
input voltage 0.3 VDD+0.5 V
input leakage current VI= 0 to V
DD
10 10 µA
DC current −−10 mA
input voltage LOW 0.3 1.5 V
input voltage HIGH 3.0 VDD+0.5 V
input leakage current VI= 0 to V
DD
10 10 µA clock frequency 0 100 kHz input rise time 10% to 90% −−2µs input fall time 90% to 10% −−2µs input capacitance −−10 pF
C
RYSTAL OSCILLATOR (OSCIN; OSCOUT)
f
XTAL
G
v
G
m
C
l
C
FB
crystal frequency 27 MHz small signal voltage gain 3.5 −− − mutual conductance f = 100 kHz 1.5 −− mA/V input capacitance −−10 pF feedback capacitance −−5pF
BLACK C
blk
I
LI
storage capacitor to ground 100 nF input leakage current VI= 0 to V
SDA V
IL
V
IH
I
LI
C
l
t
r
t
f
V
OL
t
f
C
L
input voltage LOW 0.3 1.5 V input voltage HIGH 3.0 VDD+0.5 V input leakage current VI= 0 to V input capacitance −−10 pF input rise time 10% to 90% −−2µs input fall time 90% to 10% −−2µs output voltage LOW IOL= 3 mA 0 0.5 V output fall time 3 to 1 V −−200 ns load capacitance −−400 pF
DD
DD
10 10 µA
10 10 µA
March 1992 10
Page 11
Philips Semiconductors Product specification
Integrated VIP and teletext decoder
SAA5244A
(IVT1.1)
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Outputs
STTV G
stt
gain of STTV relative to video input
V
tcs
V
DCs
TCS amplitude 0.2 0.3 0.45 V DC shift between TCS output
and nominal video output
I
O
C
L
output drive current −−3.0 mA load capacitance −−100 pF
R, G AND B V
OL
V
OH
output voltage LOW IOL= 2 mA 0 0.2 V output voltage HIGH IOH= 1.6 mA;
RGBREF VDD−2 V
output impedance −−200
Z
o
C
L
I
DC
t
r
t
f
load capacitance −−50 pF DC current −−−3.3 mA output rise time 10% to 90% −−20 ns output fall time 90% to 10% −−20 ns
BLAN V
OL
V
OH
output voltage LOW IOL= 1.6 mA 0 0.4 V output voltage HIGH IOH= 0.2 mA;
VDD= 4.5 V
V
OH
output voltage HIGH IOH= 0 mA;
VDD= 5.5 V
V
OH
C
L
t
r
t
f
allowed voltage at pin with external pull-up −−VDDV load capacitance −−50 pF output rise time 10% to 90% −−20 ns output fall time 90% to 10% −−20 ns
ODD/EVEN V
OL
V
OH
C
L
t
r
t
f
output voltage LOW IOL= 1.6 mA 0 0.4 V output voltage HIGH IOH= 1.6 mA VDD−0.4 V load capacitance −−120 pF output rise time 0.6 to 2.2 V −−50 ns output fall time 2.2 to 0.6V −−50 ns
0.9 1.0 1.1
−−0.15 V
RGBREF
0.25 V
RGBREF RGBREF
+0.25 V
V
1.1 −− V
−−2.8 V
DD
V
March 1992 11
Page 12
Philips Semiconductors Product specification
Integrated VIP and teletext decoder
SAA5244A
(IVT1.1)
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Outputs
COR AND Y(OPEN DRAIN) V
OH
V
OL
C
L
t
f
I
LO
T
SK
Timing
2
I
C-BUS
t
LOW
t
HIGH
t
SU;DAT
t
HD;DAT
t
SU;STO
t
BUF
t
HD;STA
t
SU;STA
pull-up voltage at pin −−VDDV output voltage LOW IOL= 5 mA 0 1.0 V load capacitance −−25 pF output fall time load resistor of
−−50 ns
1.2 k to VDD; measured between
0.5 and 1.5 V
V
DD
output leakage current VI= 0 to V skew delay between display
DD
10 10 µA
−−20 ns
outputs R, G, B, COR, Y and BLAN
clock LOW period 4 −− µs clock HIGH period 4 −− µs data set-up time 250 −− ns data hold time 170 −− ns set-up time from clock HIGH
4 −− µs
to STOP START set-up time following a
4 −− µs
STOP START hold time 4 −− µs START set-up time following
4 −− µs
clock LOW-to-HIGH transition
Notes to the characteristics
1. This current is the maximum allowed into the inputs when line and field flyback signals are connected to these inputs. Series current limiting resistors must be used to limit the input currents to ± 1 mA.
2. RGBREF is the positive supply for the RGB output pins and it must be able to source the IOH current from the R, G and B pins. The leakage specification on RGBREF only applies when there is no current load on the RGB pins.
March 1992 12
Page 13
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March 1992 13
Philips Semiconductors Product specification
Integrated VIP and teletext decoder
(IVT1.1)
LSP
(Line Sync Pulse)
EP
(Equalizing Pulse)
BP
(Broad Pulse)
TCS interlaced
TCS interlaced
TCS non-interlaced
0 4.66
0 2.33
0
32 34.33
27.33 32
[1]
621
(308)
309 310 311 312 313 314 (1) 315 (2) 316 (3) 317 (4) 318 (5) 319 (6) 320 (7)
308 309 310 311 312 1 2 3 4 5 6 7
622
(309)
[2]
623
(310)
624
(311)
625
(312)
1 2 3456 7
59.33
64 µs
64 µs
64 µs
MLA037 - 2
[1] LSP, EP and BP are combined to give TCS as shown below. All timings measured from falling edge of LSP. [2] Line numbers placed in the middle of the line. Equivalent count numbers in brackets.
handbook, full pagewidth
Fig.4 Composite sync waveforms.
SAA5244A
Page 14
Philips Semiconductors Product specification
Integrated VIP and teletext decoder (IVT1.1)
handbook, full pagewidth
LSP
(TCS)
R, G, B, Y
(1)
R, G, B, Y
(1)
0 4.66
0
0
16.67
lines 42 to 291 inclusive (and 355 to 604 inclusive interlaced)
41
(a) LINE RATE
(b) FIELD RATE
40 µs
display period
display period
56.67 µs
291
line numbers
SAA5244A
64 µs
312
MLA662 - 1
(1) also BLAN in character and box blanking
handbook, full pagewidth
SDA
t
BUF
SCL
SDA
MBC764
Fig.5 Display output timing (a) line rate (b) field rate.
t
HD;STA
t
LOW
t
r
t
SU;STA
t
HD;DAT
t
HIGH
t
f
t
SU;DAT
t
SU;STO
Fig.6 I2C-bus timing.
March 1992 14
Page 15
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March 1992 15
FIRST FIELD START (EVEN)
Philips Semiconductors Product specification
Integrated VIP and teletext decoder
(IVT1.1)
TCS interlaced
ODD/EVEN output (normal sync mode)
ODD/EVEN output (normal sync mode when VCS to SCS mode active)
ODD/EVEN output (slave sync mode)
TCS interlaced
621
(308)
309 310 311 312
622
(309)
623
(310)
2 µs
624
(311)
625
(312)
313 314 (1) 315 (2) 316 (3) 317 (4) 318 (5) 319 (6) 320 (7)
1 2 3456 7
48 µs
31 µs
SECOND FIELD START (ODD)
ODD/EVEN output (normal sync mode)
ODD/EVEN output (normal sync mode when VCS to SCS mode active)
ODD/EVEN output (slave sync mode)
2 µs
16 µs
SAA5244A
31 µs
MBA073 - 4
Line numbers placed in the middle of the line. Equivalent count numbers in brackets.
Fig.7 ODD/EVEN timing.
Page 16
Philips Semiconductors Product specification
Integrated VIP and teletext decoder (IVT1.1)

APPLICATION INFORMATION

handbook, full pagewidth
10 p 100 nF15 p
SS DD
CVBS
R17 27
V
DDD
(1)
C1C2C3
100 nF
SS
STTV / LFB
VCR / FFB
R9
RGBREF
C4
1 nF
R1
3.3 k
27 MHz, 3rd Overtone
V
DD
V
SS
L1
4.7 µH
X1
V
SS V
C8 100 nF
LK2 LK1
R10
V
V
V
SS
(1) (1)
OSCOUT
OSCIN
OSCGND
C7 100 nF
BLACK
100 nF
k
V
SS
R
G
B
BLAN
V
SS
V
DD
1
2
3
4 5
REF+
6 7 8 9
IREF
10
POL
11 12 13 14 15 16 17 18 19 20 21
MLA054 - 5
SAA5244A
40
39
38
37
36
35
34
33
32
31
30
29
28
27
25
25
24
23
22
SDA
SCL
ODD / EVEN
2.7 k
V
DD
i.c.
COR
SAA5244A
Y
2.7 k
V
DD
(1) Value dependent on application.
Fig.8 Application diagram.
March 1992 16
Page 17
Philips Semiconductors Product specification
Integrated VIP and teletext decoder
SAA5244A
(IVT1.1)

SAA5244A page memory organization

The organization of the page memory is shown in Fig.9. The device provides an additional row as compared with first generation decoders; this brings the display format up to 40 characters by 25 rows. Rows 0 to 23 form the teletext page; row 24 is available for software generated status messages and FLOF/FASTEXT prompt information.
fixed character
written by IVT hardware
7 characters
for status
71
alphanumerics white for normal alphanumerics green when looking for display page
24 characters from page header rolling when display page looked for
MAIN PAGE DISPLAY AREA
8 characters
always rolling
(time)
824
ROW
0 1 2 3 4
5
to
20
PACKET X / 22 PACKET X / 23
PACKET X / 24 STORED HERE IF R0D7 = 1
10 14
10 bytes for
received
page information
14 bytes
free for use
by microcontroller
Fig.9 Basic page memory organization.

Row 0:

Row 0 is for the page header. The first seven columns (0 to 6) are free for status messages. The eighth is an alphanumeric white or green control character, written automatically by SAA5244A to give a green rolling header when a page is being looked for. The last eight characters are for rolling time.

Row 25:

The first 10 bytes of row 25 contain control data relating to the received page as shown in Table 1. The remaining 14 bytes are free for use by the microcomputer.
21 22 23 24 25
MBA274
ROW
PACKET X / 24 if R0D7 = 0 PACKET X / 27 / 0 PACKETS 8 / 30 / 0 to 15
MBA275 - 2
0 1 2
Fig.10 Organization of the extension memory.
March 1992 17
Page 18
Philips Semiconductors Product specification
Integrated VIP and teletext decoder
SAA5244A
(IVT1.1)
Table 1 Row 25 received control data format
D0 PU0 PT0 MU0 MT0 HU0 HT0 C7 C11 MAG0 0 D1 PU1 PT1 MU1 MT1 HU1 HT1 C8 C12 MAG1 0 D2 PU2 PT2 MU2 MT2 HU2 C5 C9 C13 MAG2 0 D3 PU3 PT3 MU3 C4 HU3 C6 C10 C14 0 0 D4 HAM.ER HAM.ER HAM.ER HAM.ER HAM.ER HAM.ER HAM.ER HAM.ER D5 0 0 0 0 0 0 0 0 0 PBLF D60000000000 D70000000000
Column 0 1 2 3 4 5 6 7 8 9
Where:
Page number MAG magazine PU page units PT page tens PBLF page being looked for FOUND LOW for page has been found HAM.ER Hamming error in corresponding byte Page sub-code MU minutes units MT minutes tens HU hours units HT hours tens C4-C14 transmitted control bits.
FOUND 0
March 1992 18
Page 19
Philips Semiconductors Product specification
Integrated VIP and teletext decoder
SAA5244A
(IVT1.1)

Register maps

SAA5244A mode registers R0 to R11 are shown in Table 2. R0 to R10 are WRITE only; R11 is READ/WRITE. Register map (R3), for page requests, is shown in detail in Table 3.
Table 2 Register map
REGISTER D7 D6 D5 D4 D3 D2 D1 D0
Adv. control
Mode 1 VCS TO
Page request address
Page request data
Display control (normal)
Display control (newsflash /subtitle)
Display mode
Cursor row
Cursor column
Cursor data
Device status
0 X24
POS
SCS
2 −−−−TB START
3 −−−PRD4 PRD3 PRD2 PRD1 PRD0
−−−−−−−−
5 BKGND
OUT
6 BKGND
OUT
7 STATUS
TOP
−−−−−−−−
9 SUPPL.
BLAST
10 SUPPL.
ROW 24
11 D6 D5 D4 D3 D2 D1 D0
11B
625/525 SYNC
FREE RUN PLL
ACQ
BKGNDINCOR
BKGNDINCOR
CURSORONREVEALONBOTTOM
CLEAR MEM.
SUPPL. ROW 0
ROM VER R4
AUTO ODD/ EVEN
ON/OFF
OUT
OUT
A0 R4 R3 R2 R1 R0
C5 C4 C3 C2 C1 C0
ROM VER R3
DISABLE HDR ROLL
DEW/
COR IN
COR IN
HALF
ROM VER R2
DISABLE ODD/ EVEN
TCS
FULL FIELD
TEXT OUT
TEXT OUT
DOUBLE HEIGHT
ROM VER R1
ON
COLUMN SC2
TEXT IN
TEXT IN
BOX 24
ROM VER R0
R11/R11B SELECT
T1 T0
START COLUMN SC1
PON OUT
PON OUT
BOX 1-23
TEXT SIGNAL QUALITY
START COLUMN SC0
PON IN
PON IN
BOX 0
VCS SIGNAL QUALITY
Notes to Table 2
1. ‘‘ indicates these bits are inactive and must be written to logic 0 for future compatibility.
2. All bits in registers R0 to R10 are cleared to logic 0 on power-up except bits D0 to D1 of registers R1, R5 and R6 which are set to logic 1.
3. All memory is cleared to ‘space’ (00100000) on power-up, except row 0 column 7 chapter 0, which is ‘alpha’ white (00000111) as the acquisition circuit is enabled but the page is on hold.
4. TB must be set to logic 0 for normal operation.
5. The I
March 1992 19
2
C slave address is 0010001
Page 20
Philips Semiconductors Product specification
Integrated VIP and teletext decoder
SAA5244A
(IVT1.1)

REGISTER DESCRIPTION

R0 ADVANCED CONTROL - auto increments to Register 1
R11/R11B SELECT
DISABLE ODD/
EVEN
DISABLE HDR ROLL
AUTO ODD/EVEN When set forces ODD/EVEN low if any TV picture displayed, if DISABLE ODD/EVEN = 0 FREE RUN PLL Will force the PLL to free run in all conditions X24 POS Automatic display of FASTEXT prompt row when logic 1
R1 MODE - auto increments to Register 2
T0, T1 Interlace/non-interlace 312/313 line control (see Table 4) TCS ON Text composite sync or direct sync select DEW/FULL FIELD Field-flyback or full channel mode ACQ
ON/OFF Acquisition circuits turned off when logic 1
VCS TO SCS When logic 1 enables display of messages with 60 Hz input signal
Selects reading of R11 or R11B
Forces ODD/EVEN output LOW when logic 1
Disables green rolling header and time
R2 PAGE REQUEST ADDRESS - auto increments to Register 3
COL SC0 - SC2 Point to start column for page request data (see Table 3) TB Must be logic 0 for normal operation
R3 PAGE REQUEST DATA - does not auto increment (see Table 3)
R5 NORMAL DISPLAY CONTROL - auto increments to Register 6 R6 NEWSFLASH/SUBTITLE DISPLAY CONTROL - auto increments to Register 7
PON Picture on TEXT Text on COR Contrast reduction on BKGND Background colour on These functions have IN and OUT referring to inside and outside the boxing function respectively.
R7 DISPLAY MODE - does not auto increment
BOX ON 0 Boxing function allowed on Row 0 BOX ON 1-23 Boxing function allowed on Row 1-23 BOX ON 24 Boxing function allowed on Row 24 DOUBLE HEIGHT To display double height text BOTTOM HALF To select bottom half of page when DOUBLE HEIGHT = 1 REVEAL ON To reveal concealed text CURSOR ON To display cursor STATUS TOP Row 25 displayed above or below the main text
March 1992 20
Page 21
Philips Semiconductors Product specification
Integrated VIP and teletext decoder
SAA5244A
(IVT1.1)
R9 CURSOR ROW - auto increments to Register 10
R0 to R4 Active row for data written to or read from memory via the I A0 Selects display memory page (when = 0) or extension packet memory (when = 1) CLEAR MEM. When set to 1, clears the display memory.
This bit is automatically reset
SUPPL. BLAST When set to 1, column 4b and 5b (of Table 6) are mapped into 4 and 5 respectively, replacing
blast-through alphanumerics in graphics mode
R10 CURSOR COLUMN - auto increments to Register 11 or 11B
C0 to C5 Active column for data written to or read from memory via the I SUPPL. ROW 0 When set to 1, column 4b and 5b (of Table 6) are mapped into columns 6 and 7 respectively,
just for row 0 columns 0 to 7
SUPPL. ROW 24 When set to 1, column 4b and 5b (of Table 6) are mapped into columns 6 and 7 respectively
just for row 24
R11 CURSOR DATA - does not auto increment
2
D0 to D6 Data read from/written to memory via I
This location automatically increments each time R11 is accessed
R11B DEVICE STATUS - does not auto increment
VCS SIGNAL QUALITY
TEXT SIGNAL QUALITY
ROM VER R0 to R4
625/525 SYNC If the input video is a 525 line signal when = 1
Indicates that the video signal quality is good and PLL is phase locked to input video when = 1
If a good teletext signal is being received when = 1
Indicated language/ROM variant. For Western European = 01000
C, at location pointed to by R9 and R10.
2
C-bus
2
C-bus
March 1992 21
Page 22
Philips Semiconductors Product specification
Integrated VIP and teletext decoder (IVT1.1)
Table 3 Register map for page requests (R3)
START
COLUMN
0 Do care
Magazine
1 Do care
Page tens PT3 PT2 PT1 PT0
2 Do care
Page units PU3 PU2 PU1 PU0
3 Do care
Hours tens X X HT1 HT0
4 Do care
Hours units HU3 HU2 HU1 HU0
5 Do care
Minutes tens X MT2 MT1 MT0
6 Do care
Minutes units MU3 MU2 MU1 MU0
PRD4 PRD3 PRD2 PRD1 PRD0
SAA5244A
HOLD MAG2 MAG1 MAG0
Notes to Table 3
1. Abbreviations are as for Table 1 except for DO CARE bits.
2. When the DO CARE bit is set to logic 1 this means the corresponding digit is to be taken into account for page requests. If the DO CARE bit is set to logic 0 the digit is ignored. This allows, for example, ‘normal’ or ‘timed page’ selection.
HOLD is set LOW, the page is held and not updated.
3. If
4. Columns auto-increment on successive I2C-bus transmission bytes.
Table 4 Interlace/non-interlace 312/313 line control (T0 and T1)
T1 T0 RESULT
0 0 interlaced 312.5/312.5 lines 0 1 non-interlaced 312/313 lines (note 1) 1 0 non-interlaced 312/312 lines (note 1) 1 1 scan-locked
Note to Table 4
1. Reverts to interlaced mode if a newsflash or subtitle is being displayed.
March 1992 22
Page 23
Philips Semiconductors Product specification
Integrated VIP and teletext decoder
SAA5244A
(IVT1.1)
Table 5 Crystal characteristics
SYMBOL PARAMETER MIN. TYP. MAX. UNIT
Crystal (27 MHz, 3rd overtone)
C1 series capacitance 1.7 pF C0 parallel capacitance 5.2 pF C
L
Rr resonant resistance −− 50 R1 series resistance 20 −Ω Xa ageing −− ±510 Xj adjustment tolerance −− ±25 10 Xd drift −− ±25 10
handbook, full pagewidth
load capacitance 20 pF
1
SAA5244A
6
/yr
6
6
3.3 k
1 nF
4.7 µH
27 MHz
10 p
Fig.11 Crystal oscillator application diagram.
CLOCK SYSTEMS Crystal oscillator
The crystal is a conventional 2-pin design operating at 27 MHz. It is capable of oscillating with both fundamental and third overtone mode crystals. External components should be used to suppress the fundamental output of the third overtone, as shown in Fig.11. The crystal characteristics are given in Table 5.
2
CRYSTAL
100 nF15 p
3
4
OSCILLATOR
MLA036 - 5
March 1992 23
Page 24
Philips Semiconductors Product specification
Integrated VIP and teletext decoder (IVT1.1)

Character sets

The WST specification allows the selection of national character sets via the page header transmission bits, C12 to C14. The basic 96 character sets differ only in 13
handbook, full pagewidth
alphanumerics and
graphics 'space'
character
0000010
alphanumerics
character
1011010
SAA5244A
national option characters as indicated in Table 8 with reference to their table position in the basic character matrix illustrated in Table 7. The SAA5244A automatically decodes transmission bits C12 to C14. Table 6 illustrates the character matrices.
MLA663
alphanumerics or
blast-through
alphanumerics
character
0001001
alphanumerics
character
1111111
contiguous
graphics character
0110111
separated
graphics character
0110111
graphics character
background
= =
Fig.12 Character format.
separated
1111111
colour
contiguous
graphics character
1111111
display
colour
March 1992 24
Page 25
Philips Semiconductors Product specification
Integrated VIP and teletext decoder (IVT1.1)
Table 6 SAA5244P/A character data input decoding
b
B
I T S
b4b3b2b
0 0 0 0
0 0 0 1
0 0 1 0
0 0 1 1
0 1 0 0
0 1 0 1
0 1 1 0
0 1 1 1
1 0 0 0
7
b b
0
6 5
1
r o w
column
0
1
2
3
4
5
6
7
8
0
0
alpha -
numerics
black
alpha -
numerics
red
alpha -
numerics
green
alpha -
numerics
yellow alpha -
numerics
blue
alpha ­numerics magenta
alpha ­numerics
cyan
alpha ­numerics
white
flash
0
0
0
0
1
122a3 3a 4 4b 5 5b 6 6a
graphics
black
graphics
red
graphics
green
graphics
yellow
graphics
blue
graphics magenta
graphics
cyan
graphics
white
conceal
display
0
0
1
1
0
0
0
1
1
1
1
SAA5244A
1
0
1
0
0
1
1
1
1
1
0
1
7a
7
AV AILABLE AS
NATIONAL OPTIONS
ONLY
1 0 0 1
1 0 1 0
1 0 1 1
1 1 0 0
1 1 0 1
1 1 1 0
1 1 1 1
9
end box
10
11
start box
normal
12
13
14
15
hight
double
height
SO
SI
graphics
separated
graphics
ESC
black
back -
ground
new
back -
ground
hold
graphics
release
graphics
MBA266 - 1
contiguous
steady
ook, full pagewidth
Notes to Table 6 - For character version number (01000) see Register 11B
1. * These control characters are reserved for compatibility with other data codes.
2. ** These control characters are presumed before each row begins.
3. + Columns 4b and 5b can only be accessed when supplementary character bits are set (see Registers 9 and 10).
4. Control characters shown in columns 0 and 1 are normally displayed as spaces.
5. Characters may be referred to by column and row, For example 2/5 refers to %.
March 1992 25
Page 26
Philips Semiconductors Product specification
Integrated VIP and teletext decoder
SAA5244A
(IVT1.1)
6. Black represents displayed colour. White represents background.
7. Character rectangle shown as follows:
8. The SAA5244A national option characters are illustrated in Table 8.
9. Characters 4b/11, 4b/12, 5b/10, 5b/11 and 5b/12 are special characters for combining with character 4b/10.
10. National option characters will be developed according to the setting of control bits C12 to C14. These will be mapped into the basic code table into positions shown in Table 8.
11. Columns 4b and 5b are mapped into 4 and 5 respectively (replacing blast-through alphanumerics in the graphics mode) when enabled by R9 bit D7 set to 1.
12. Columns 4b and 5b are mapped into columns 6 and 7 respectively when enabled by R10 bit D6 (row 0 columns 0 to 7) and R10 bit D7 (row 24) set to 1.
13. Columns 2a, 3a, 6a and 7a are displayed in graphics mode.
March 1992 26
Page 27
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March 1992 27
Table 7 SAA5244A Basic character matrix
(IVT1.1)
Philips Semiconductors Product specification
Integrated VIP and teletext decoder
2/0 2/8 3/0 3/8 4/0 4/8 5/0 5/8 7/86/8 7/0
NC
2/1
2/2 2/10 3/2 3/10 4/2 4/10 5/2 5/10 6/2 6/10 7/2 7/10
2/3
NC
2/4
NC
2/5 2/13 3/5 3/13 4/5 4/13 5/5 6/5 6/13 7/5
2/6 2/14 3/6 3/14 4/6 4/14 5/6 6/6 7/6
2/9 3/1 3/9 4/1 4/9 5/1 5/9 6/1 6/9 7/1 7/9
2/11 3/3 3/11 4/3 4/11 5/3 6/3 6/11 7/3
2/12 3/4 3/12 4/4 4/12 5/4 6/4 6/12 7/4
5/11
NC
5/12
NC
5/13
NC
5/14
6/0
NC
7/11
7/12
7/13
7/14
NC
NC
NC
NC
2/7 2/15 3/7 3/15 4/7 4/15 5/7 6/7 6/15 7/7 7/15
Where: NC = national option character position.
andbook, full pagewidth
5/15
NC
NC
SAA5244A
MLA630
Page 28
Philips Semiconductors Product specification
Integrated VIP and teletext decoder (IVT1.1)
Table 8 SAA5244A national option character set
dbook, full pagewidth
LANGUAGE
C12 C13 C14
ENGLISH
GERMAN
SWEDISH
ITALIAN
FRENCH
(1) PHCB are the Page Header Control Bits. Other combinations default to English.
(1)
PHCB
000
001
010
011
100
2 / 3 2 / 4 4 / 0 5 / 11 5 / 12 5 / 13 5 / 14 5 / 15 6 / 0 7 / 11 7 / 12 7 / 13 7 / 14
SAA5244A
CHARACTER POSITION (COLUMN / ROW)
MLA664
March 1992 28
Page 29
Philips Semiconductors Product specification
Integrated VIP and teletext decoder (IVT1.1)

PACKAGE OUTLINES

DIP40: plastic dual in-line package; 40 leads (600 mil)
D
seating plane
L
Z
40
e
b
SAA5244A

SOT129-1

M
E
A
2
A
A
1
w M
b
1
21
c
(e )
1
M
H
pin 1 index
1
0 5 10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
A
A
UNIT
inches
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
max.
mm
1 2
min.
max.
b
1.70
1.14
0.067
0.045
b
0.53
0.38
0.021
0.015
cD E e M
1
0.36
0.23
0.014
0.009
52.50
51.50
2.067
2.028
14.1
13.7
0.56
0.54
E
20
(1)(1)
e
L
1
3.60
3.05
0.14
0.12
M
15.80
15.24
0.62
0.60
E
17.42
15.90
0.69
0.63
H
w
0.2542.54 15.24
0.010.10 0.60
max.
2.254.7 0.51 4.0
0.089 0.19 0.020 0.16
(1)
Z
OUTLINE VERSION
SOT129-1
IEC JEDEC EIAJ
051G08 MO-015AJ
REFERENCES
March 1992 29
EUROPEAN
PROJECTION
ISSUE DATE
92-11-17 95-01-14
Page 30
Philips Semiconductors Product specification
Integrated VIP and teletext decoder (IVT1.1)
QFP44: plastic quad flat package; 44 leads (lead length 2.35 mm); body 14 x 14 x 2.2 mm
c
y
X
33 23
34
Z
22
E
A
SAA5244A

SOT205-1

e
w M
b
p
v M
scale
eH
H
19.2
1
18.2
e
pin 1 index
2.3
2.1
b
0.25
12
11
Z
w M
p
D
H
D
0.50
0.35
D
B
0 5 10 mm
(1)
(1) (1)(1)
D
0.25
0.14
14.1
13.9
14.1
13.9
44
1
DIMENSIONS (mm are the original dimensions)
mm
A
max.
2.60
0.25
0.05
UNIT A1A2A3bpcE
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
v M
D
E
A
B
E
19.2
18.2
H
E
LL
2.0
1.2
A
p
A
2
A
1
detail X
Z
D
0.152.35 0.10.3
2.4
1.8
(A )
3
L
p
L
Zywv θ
E
o
2.4
7
o
1.8
0
θ
OUTLINE
VERSION
SOT205-1
IEC JEDEC EIAJ
133E01A
REFERENCES
March 1992 30
EUROPEAN
PROJECTION
ISSUE DATE
95-02-04 97-08-01
Page 31
Philips Semiconductors Product specification
Integrated VIP and teletext decoder (IVT1.1)
SOLDERING Introduction
There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used.
This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our
“IC Package Databook”
DIP
SOLDERING BY DIPPING OR BY WA VE The maximum permissible temperature of the solder is
260 °C; solder at this temperature must not be in contact with the joint for more than 5 seconds. The total contact time of successive solder waves must not exceed 5 seconds.
The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (T printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit.
R
EPAIRING SOLDERED JOINTS
Apply a low voltage soldering iron (less than 24 V) to the lead(s) of the package, below the seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is less than 300 °C it may remain in contact for up to 10 seconds. If the bit temperature is between 300 and 400 °C, contact may be up to 5 seconds.
QFP
REFLOW SOLDERING Reflow soldering techniques are suitable for all QFP
packages. The choice of heating method may be influenced by larger
plastic QFP packages (44 leads, or more). If infrared or vapour phase heating is used and the large packages are not absolutely dry (less than 0.1% moisture content by weight), vaporization of the small amount of moisture in them can cause cracking of the plastic body. For more information, refer to the Drypack chapter in our
Reference Handbook”
(order code 9398 652 90011).
). If the
stg max
“Quality
(order code 9397 750 00192).
SAA5244A
Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement.
Several techniques exist for reflowing; for example, thermal conduction by heated belt. Dwell times vary from 50 to 300 seconds depending on heating method. Typical reflow temperatures range from 215 to 250 °C.
Preheating is necessary to dry the paste and evaporate the binding agent. Preheat for 45 minutes at 45 °C.
WAVE SOLDERING Wave soldering is not recommended for QFP packages.
This is because of the likelihood of solder bridging due to closely-spaced leads and the possibility of incomplete solder penetration in multi-lead devices.
If wave soldering cannot be avoided, the following conditions must be observed:
A double-wave (a turbulent wave with high upward
pressure followed by a smooth laminar wave) soldering technique should be used.
The footprint must be at an angle of 45° to the board
direction and must incorporate solder thieves downstream and at the side corners.
Even with these conditions, do not consider wave soldering the following packages: QFP52 (SOT379-1), QFP100 (SOT317-1), QFP100 (SOT317-2), QFP100 (SOT382-1) or QFP160 (SOT322-1).
During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Maximum permissible solder temperature is 260 °C, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 °C within 6 seconds. Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications.
R
EPAIRING SOLDERED JOINTS
Fix the component by first soldering two diagonally­opposite end leads. Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C.
March 1992 31
Page 32
Philips Semiconductors Product specification
Integrated VIP and teletext decoder
SAA5244A
(IVT1.1)

DEFINITIONS

Data sheet status
Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.
PURCHASE OF PHILIPS I
Purchase of Philips I components in the I2C system provided the system conforms to the I2C specification defined by Philips. This specification can be ordered using the code 9398 393 40011.
2
C COMPONENTS
2
C components conveys a license under the Philips’ I2C patent to use the
March 1992 32
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