Datasheet S3C80A4, S3C80A5, S3C80A8, S3C80B4, S3C80B5 Datasheet (Samsung)

S3C80A4/C80A8/C80A5/C80B4/C80B8/C80B5 PRODUCT OVERVIEW

1 PRODUCT OVERVIEW

OVERVIEW

Samsung's S3C8-series of 8-bit single-chip CMOS microcontrollers offers a fast and efficient CPU, a wide range
of integrated peripherals, and various mask-programmable ROM sizes. Important CPU features include:

— Efficient register-oriented architecture
— Selectable CPU clock sources
— Idle and Stop power-down mode release by interrupt
— Built-in basic timer with watchdog function

A sophisticated interrupt structure recognizes up to eight interrupt levels. Each level can have one or more
interrupt sources and vectors. Fast interrupt processing (within a minimum six CPU clocks) can be assigned to
specific interrupt levels.

S3C80A4/C80A8/C80A5/C80B4/C80B8/C80B5 MICROCONTROLLER

The S3C80A4/C80A8/C80A5/C80B4/C80B8/C80B5 single-chip CMOS microcontroller is fabricated using a
highly advanced CMOS process and is based on Samsung's newest CPU architecture.

The S3C80A4/C80A8/C80A5/C80B4/C80B8/C80B5 is the microcontroller which has mask-programmable ROM.
The S3P80A4/P80A8/P80A5/P80B4/P80B8/P80B5 is the microcontroller which has one-time-programmable

EPROM.
Using a proven modular design approach, Samsung engineers developed the

S3C80A4/C80A8/C80A5/C80B4/C80B8/C80B5 by integrating the following peripheral modules with the powerful
SAM87 RC core:

— Three programmable I/O ports, including two 8-bit ports and one 3-bit port, for a total of 19 pins.
— Internal LVD circuit and eight bit-programmable pins for external interrupts.
— One 8-bit basic timer for oscillation stabilization and watchdog functions (system reset).
— One 8-bit timer/counter and one 16-bit timer/counter with selectable operating modes.
— One 8-bit counter with auto-reload function and one-shot or repeat control.

The S3C80A4/C80A8/C80A5/C80B4/C80B8/C80B5 is a versatile general-purpose microcontroller which is
especially suitable for use as remote transmitter controller. It is currently available in a 24-pin SOP and SDIP
package.

1-1

PRODUCT OVERVIEW S3C80A4/C80A8/C80A5/C80B4/C80B8/C80B5

FEATURES

CPU

• SAM87RC CPU core

Memory

• Program memory (ROM)

– S3C80A4/C80B4: 4-Kbyte
(0000H–0FFFH)

– S3C80A8/C80B8: 8-Kbyte
(0000H–1FFFH)

– S3C80A5/C80B5: 15,872 byte
(0000H–3E00H)

• Data memory: 256-byte RAM

Instruction Set

• 78 instructions

• IDLE and STOP instructions added for power-

down modes

Instruction Execution Time

• 500 ns at 8-MHz f

(minimum)

OSC

Timers and Timer/Counters

• One programmable 8-bit basic timer (BT) for

oscillation stabilization control or watchdog timer
function

• One 8-bit timer/counter (Timer 0) with two

operating modes; Interval mode and PWM mode.

• One 16-bit timer/counter with one operating

modes; Interval mode

Low Voltage Detect Circuit

• Low voltage detect for reset or Back-up mode.

• Low level detect voltage

– S3C80A4/C80A8/C80A5:

2.20 V (Typ) ± 200 mV
– S3C80B4/C80B8/C80B5:

1.90 V (Typ) ± 200 mV

Auto Reset Function

• Reset occurs when stop mode is released by P0.

• When a falling edge is detected at Port 0 during

Stop mode, system reset occurs.

Interrupts

• 13 interrupt sources with 10 vector.

• 5 level, 10 vector interrupt structure

I/O Ports

• Two 8-bit I/O ports (P0-P1) and one 3-bit port

(P2) for a total of 19 bit-programmable pins

• Eight input pins for external interrupts

Carrier Frequency Generator

• One 8-bit counter with auto-reload function and

one-shot or repeat control (Counter A)

Back-up mode

• When V

is lower than V

DD

, the chip enters

LVD

Back-up mode to block oscillation and reduce the
current consumption.

Operating Temperature Range

• –40°C to + 85°C

Operating Voltage Range

• 1.7 V to 3.6 V at 4 MHz f

• 2.0 V to 3.6 V at 8 MHz f

OSC
OSC

Package Type

• 24-pin SOP/SDIP

1-2

S3C80A4/C80A8/C80A5/C80B4/C80B8/C80B5 PRODUCT OVERVIEW

BLOCK DIAGRAM

P0.0-P0.7/INT0-INT4 P1.0-P1.7

XIN

XOUT

LVD

TEST

Main
OSC

8-bit
Basic
Timer

8-bit

Timer/

Counter

16-bit

Timer/

Counter

Port 0(INTR) Port 1

Internal Bus

Port I/O and Interrupt

Control

SAM87RI CPU

15-Kbyte ROM

256-Byte

Register File

Port 2

Carrier

Generator

(Counter A)

P2.0/T0PWM
P2.1/REM
P2.2

Figure 1-1. Block Diagram

1-3

PRODUCT OVERVIEW S3C80A4/C80A8/C80A5/C80B4/C80B8/C80B5

PIN ASSIGNMENTS

VDD

VSS

XIN

XOUT

TEST
P0.0/INT0/INTR
P0.1/INT1/INTR

RESETRESET/P0.2/INT2/INTR

P0.3/INT3/INTR
P0.4/INT4/INTR
P0.5/INT4/INTR
P0.6/INT4/INTR
P0.7/INT4/INTR

1
2
3
4

S3C80A4/C80A8/C80A5

5
6

C80B4/C80B8/C80B5

7
8
9
10
11
12

24-SOP/SDIP

(TOP VIEW)

24

P2.2

23

P2.1/REM/SCLK

22

P2.0/T0PWN/T0CK/SDAT

21

P1.7

20

P1.6

19

P1.5

18

P1.4

17

P1.3

16

P1.2

15

P1.1

14

P1.0

13

Figure 1-2. Pin Assignment Diagram (24-Pin SOP/SDIP Package)

1-4

S3C80A4/C80A8/C80A5/C80B4/C80B8/C80B5 PRODUCT OVERVIEW

PIN DESCRIPTIONS

Table 1-1. Pin Descriptions

Pin

Names

Pin

Type

Pin

Description

P0.0–P0.7 I/O I/O port with bit-programmable pins.

Configurable to input or push-pull output
mode. Pull-up resistors are assignable by
software. Pins can be assigned individually
as external interrupt inputs with noise filters,
interrupt enable/ disable, and interrupt
pending control. Interrupt with Reset(INTR)
is assigned to Port 0.

P1.0–P1.7 I/O I/O port with bit-programmable pins.

Configurable to input mode or output mode.
Pin circuits are either push-pull or n­channel open-drain type. Pull-up resistors
are assignable by software.

P2.0
P2.1
P2.2

I/O 3-bit I/O port with bit-programmable pins.

Configurable to input mode, push-pull
output mode, or n-channel open-drain
output mode. Input mode with pull-up
resistors are assignable by software. The
two pins of port 2 have high current drive
capability.

Circuit

Type

24-Pin

Number

Shared

Functions

1 5–12 INT0 – INT4/INTR

2 13–20

3

21–23 REM/T0CK
4
5

XIN, X

OUT

– System clock input and output pins – 2, 3 –

TEST I Test signal input pin (for factory use only;

must be connected to VSS).

V

DD

V

SS

– Power supply input pin – 24 –
– Ground pin – 1 –

– 4 –

1-5

PRODUCT OVERVIEW S3C80A4/C80A8/C80A5/C80B4/C80B8/C80B5

PIN CIRCUITS

V

DD

Pull-up
Resistor

Pull-up
Enable

V

DD

Data

Input/Output

Output

Disable

SS

V

External

Interrupt

Stop

Noise

filter

INTR (Interrupt with

RESET)

Figure 1-3. Pin Circuit Type 1 (Port 0)

NOTE

Interrupt with reset (INTR) is assigned to port 0 of S3C80A4/C80A8/C80A5/C80B4/C80B8/C80B5.
It is designed to release stop status with reset. When the falling/rising edge is detected at any pin of Port
0 during stop status, non vectored interrupt INTR signal occurs, after then system reset occurs
automatically. It is designed for a application which are using “stop mode” like remote controller. If stop
mode is not used, INTR do not operates and it can be discarded.

1-6

S3C80A4/C80A8/C80A5/C80B4/C80B8/C80B5 PRODUCT OVERVIEW

V

DD

Pull-up
Resistor

Pull-up
Enable

V

DD

Data

Input/Output

Open-drain

Output Disable

V

SS

Normal

Pull-up
Enable

Port 2.0 Data

T0_PWN

Open-drain

Noise

Input

filter

Figure 1-4. Pin Circuit Type 2 (Port 1)

P2CON.0

VDD

M

Data

U

X

Output

Disable

VSS

VDD

Pull-up Resistor
(Typical 21KΩ)

P2.0/T0PWN

P2.0 Input

Figure 1-5. Pin Circuit Type 3 (P2.0)

1-7

PRODUCT OVERVIEW S3C80A4/C80A8/C80A5/C80B4/C80B8/C80B5

VDD

Pull-up
Resistor

(Typical 21KΩ)
Pull-up
Enable

CAOF(CACON.0)

Carrier On/Off (P2.5)

Port 2.1 Data

Open-Drain

Output

Disable

P2.1 Input

P2CON.1

M
U

X

Noise filterT0CK

Data

VDD

P2.1/REM/T0CK

VSS

Pull-up
Enable

Data

Open-drain

Normal Input

Figure 1-6. Pin Circuit Type 4 (P2.1)

VDD

Pull-up Resistor
(Typical 21KΩ)

VDD

In/Out

Output

Disable

VSS

1-8

Figure 1-7. Pin Circuit Type 5 (P2.2)

S3C80A4/C80A8/C80A5/C80B4/C80B8/C80B5 ELECTRICAL DATA

13 ELECTRICAL DATA

OVERVIEW

In this section, S3C80A4/C80A8/C80A5/C80B4/C80B8/C80B5 electrical characteristics are presented in tables
and graphs. The information is arranged in the following order:

— Absolute maximum ratings
— D.C. electrical characteristics
— Data retention supply voltage in Stop mode
— Stop mode release timing when initiated by a Reset
— I/O capacitance
— A.C. electrical characteristics
— Input timing for external interrupts (port 0)
— Oscillation characteristics
— Oscillation stabilization time

13-1

ELECTRICAL DATA S3C80A4/C80A8/C80A5/C80B4/C80B8/C80B5

Table 13-1. Absolute Maximum Ratings

(TA = 25 °C)

Parameter Symbol Conditions Rating Unit

Supply voltage
Input voltage
Output voltage
Output current High

V

DD

V

IN

V

O

I

OH

– – 0.3 to + 6.5 V
–
All output pins

– 0.3 to VDD + 0.3

– 0.3 to VDD + 0.3

V

V
One I/O pin active – 18 mA
All I/O pins active – 60

Output current Low

I

OL

One I/O pin active + 30 mA
Total pin current for ports 0, 1, and 2 + 100

Total pin current for port 3 + 40

Operating

T

A

– – 40 to + 85

°

C

temperature
Storage

T

STG

– – 65 to + 150

°

C

temperature

Table 13-2. D.C. Electrical Characteristics

(T

= – 40 °C to + 85 °C, VDD = 2.0 V to 3.6 V)

A

Parameter Symbol Conditions Min Typ Max Unit

Operating Voltage

Input High
voltage

Input Low voltage

Output High
voltage

V

V

V

V

V

V

V

V

DD

IH1

IH2
IL1

IL2

OH1

OH2

OH3

f

8MHz

=

OSC

(Instruction clock = 1.33 MHz)

f

(Instruction clock = 0.67 MHz)

All input pins except V
and V

X
All input pins except V

and V
X

OSC

IN

IN

=

IH3

IL3

4MHz

IH2

IL2

VDD= 2.4 V, IOH = – 6 mA
Port 2.1 only, T

= 25°C

A

VDD = 2.4 V, IOH = – 2.2mA
Port 2.0, 2.2, T

= 25°C

A

VDD = 2.4 V, IOH = – 1 mA

2.0 – 3.6 V

1.7 – 3.6

0.8 V

DD

V

– 0.3 V

DD

–

0 –

V

DD

DD

0.2 V

DD

0.3

V

– 0.7

DD

V

0.7

-

DD

V

1.0

-

DD

– –

– –

All output pins except Port2,

V

V

V

13-2

T

A

= 25 °C

S3C80A4/C80A8/C80A5/C80B4/C80B8/C80B5 ELECTRICAL DATA

Table 13-2. D.C. Electrical Characteristics (Continued)

(T

= – 40 °C to + 85 °C, VDD = 2.0 V to 3.6 V)

A

Parameter Symbol Conditions Min Typ Max Unit

Output Low
voltage

Input High
leakage current

Input Low
leakage current

Output High
leakage current

Output Low
leakage current

Pull-up resistors

Supply current

(note)

V

V

V

I

LIH1

I

LIH2

I

LIL1

I

LIL2

I

LOH

I

LOL

R

I

DD1

OL1

OL2

OL3

V

= 2.4 V, IOL = 12 mA, port

DD

2.1 only, T

A

VDD = 2.4 V, IOL = 5 mA
Port 2.0,2.2, T

IOL = 1 mA
Ports 0 and 1, T

VIN = V

DD

All input pins except X
X

OUT

VIN = VDD, X
V

= 0 V

IN

All input pins except XIN, X
V

= 0 V

IN

X

and X

V

IN

OUT

= V

OUT

DD

All output pins
V

= 0 V

OUT

All output pins
V

= 2.4V, V

L1

DD

T

= 25 °C , Ports 0-2

A

V

= 3.6 V ± 10%

DD

8-MHz crystal

= 25 °C

= 25 °C

A

= 25 °C

A

and X

IN

= 0 V;

IN

IN

OUT

and

OUT

0.4 0.5

– 0.4 0.5

0.4 1.0

– – 1 µA

20

– – – 1 µA

– 20

– – 1 µA

– – – 1 µA

44 55 95

KΩ

– 5 9 mA

4-MHz crystal 2.6 5

I

DD2

Idle mode;

– 1.0 2.5

VDD = 3.6 V ± 10 %
8-MHz crystal

4-MHz crystal 0.7 2.0

I

DD3

Stop mode;
V

= 3.6 V

DD

– 1 6 uA

NOTE: Supply current does not include current drawn through internal pull-up resistors or external output current loads.

13-3

ELECTRICAL DATA S3C80A4/C80A8/C80A5/C80B4/C80B8/C80B5

Table 13-3. Characteristics of Low Voltage Detect circuit

(TA = – 40 °C to + 85 °C)

Parameter Symbol Conditions Min Typ Max Unit

Hysteresys Voltage of LVD

∆V

– – 30 300 mV

(Slew Rate of LVD)
Low level detect voltage

V

LVD

– 2.0 2.20 2.40 V

(S3C80A4/C80A8/C80A5)
Low level detect voltage

V

LVD

– 1.70 1.90 2.1 V

(S3C80B4/C80B8/C80B5)

Table 13-4. Data Retention Supply Voltage in Stop Mode

(TA = – 40 °C to + 85 °C)

Parameter Symbol Conditions Min Typ Max Unit

Data retention supply

V

DDDR

– 1.0 – 3.6 V

voltage
Data retention supply

current

I

DDDR

V

DDDR

= 1.0 V

Stop mode

– – 1 µA

Table 13-5. Input/output Capacitance

(T

= – 40°C to + 85 °C, V

A

DD

= 0 V)

Parameter Symbol Conditions Min Typ Max Unit

C

C

OUT

IN

f = 1 MHz; unmeasured pins
are connected to V

SS

— — 10 pF

Input
capacitance

Output
capacitance

I/O capacitance

C

IO

Table 13-6. A.C. Electrical Characteristics

(T

= – 40 °C to + 85 °C)

A

Parameter Symbol Conditions Min Typ Max Unit

Interrupt input,
High, Low width

13-4

t

INTH

t

INTL

,

P0.0–P0.7, V

DD

3.6

=

V

200 300 — ns

S3C80A4/C80A8/C80A5/C80B4/C80B8/C80B5 ELECTRICAL DATA

tINTHtINTL

0.8 VDD

0.2 VDD

NOTE: The unit tCPU means one CPU clock period.

Figure 13-1. Input Timing for External Interrupts (Port 0)

Table 13-7. Oscillation Characteristics

(TA = – 40 °C + 85 °C)

Oscillator Clock Circuit Conditions Min Typ Max Unit

Crystal

Ceramic

External clock

External

Clock

Open Pin

C1

C2

C1

C2

X

IN

X

OUT

XT

IN

XTOUT

XIN

OUT

X

CPU clock oscillation
frequency

CPU clock oscillation
frequency

X

input frequency

IN

1 – 8 MHz

1 – 8 MHz

1 – 8 MHz

13-5

ELECTRICAL DATA S3C80A4/C80A8/C80A5/C80B4/C80B8/C80B5

Table 13-8. Oscillation Stabilization Time

(T

= – 40 °C + 85 °C, VDD = 3.6 V)

A

Oscillator Test Condition Min Typ Max Unit

f

Main crystal
Main ceramic

> 400 kHz

OSC

Oscillation stabilization occurs when VDD is equal

– – 20 ms
– – 10 ms

to the minimum oscillator voltage range.
X

External clock

input High and Low width (tXH, tXL)

IN

25 – 500 ns

(main system)
Oscillator

stabilization

t

when released by a reset

WAIT

(1)

–

216/

f

OSC

– ms

wait time

t

when released by an interrupt

WAIT

NOTES:

1. f

2. The duration of the oscillation stabilization time (t

is the oscillator frequency.

OSC

in the basic timer control register, BTCON.

(2)

) when it is released by an interrupt is determined by the setting

WAIT

– – – ms

Instruction

Clock

1.33 MHz

1.00 MHz
670 kHz

500 kHz

250 kHz

8.32 kHz

Instruction Clock = 1/6n x oscillator frequency (n = 1, 2, 8, 16)
A 1.7 V: 4 MHz
b 2.0 V: 8 MHz

B

A

1 2 3 4 5 6 7

Supply Voltage (V)

Instruction
Clock

8 MHz

6 MHz
4 kHz

400 kHz

Figure 13-2. Operating Voltage Range of S3C80A4/C80A8/C80A5/C80B4/C80B8/C80B5

13-6

S3C80A4/C80A8/C80A5/C80B4/C80B8/C80B5 MECHANICAL DATA

14 MECHANICAL DATA

OVERVIEW

The S3C80A4/C80A8/C80A5/C80B4/C80B8/C80B5 microcontroller is currently available in a 24-pin SOP and
SDIP package.

0-8

#13#24

10.30 ± 0.30

(0.69)

24-SOP-375

#1 #12

15.74 MAX

15.34 ± 0.20

1.27

+ 0.10

0.38

- 0.05

7.50 ± 0.20

+ 0.10

0.15

2.30 ± 0.10

0.05 MIN

9.53

- 0.05

0.85 ± 0.20

2.50 MAX

0.10 MAX

NOTE: Dimensions are in millimeters.

Figure 14-1. 24-Pin SOP Package Mechanical Data

14-1

MECHANICAL DATA S3C80A4/C80A8/C80A5/C80B4/C80B8/C80B5

(1.70)

6.40 ± 0.20

#24

#1

24-SDIP-300

23.35 MAX

22.95 ± 0.20

0.46 ±

0.10

0.89 ±

0.10

#13

#12

1.778

7.62

3.25 ±

0.20

0.51 MIN

5.08 MAX

3.30 ± 0.30

0-15

+ 0.10

0.25

- 0.05

NOTE: Dimensions are in millimeters.

Figure 14-2. 24-Pin SDIP Package Mechanical Data

14-2