Datasheet S3C8095, S3P8095 Datasheet (Samsung)

S3C8095/P8095 PRODUCT OVERVIEW

1 PRODUCT OVERVIEW

S3C8-SERIES MICROCONTROLLERS

Samsung's S3C8 series of 8-bit single-chip CMOS microcontrollers offers a fast and efficient CPU, a wide range
of integrated peripherals, and various mask-programmable ROM sizes. Important CPU features include:

— Efficient register-oriented architecture
— Selectable CPU clock sources
— Idle and Stop power-down mode release by interrupt
— Built-in basic timer with watchdog function

A sophisticated interrupt structure recognizes up to eight interrupt levels. Each level can have one or more
interrupt sources and vectors. Fast interrupt processing (within a minimum six CPU clocks) can be assigned to
specific interrupt levels.

S3C8095/P8095 MICROCONTROLLER

The S3C8095/P8095 single-chip CMOS
microcontroller is fabricated using a highly advanced
CMOS process and is based on Samsung’s newest
CPU architecture.

The S3C8095 is the microcontroller which has 16­Kbytes mask-programmable ROM.

The S3P8095 is the microcontroller which has 16­Kbytes one-time-programmable EPROM.

Using a proven modular design approach, Samsung
engineers developed the S3C8095/P8095 by
integrating the following peripheral modules with the
powerful SAM87 core:

— Four programmable I/O ports, including three

8-bit ports and one 2-bit port, for a total of 26
pins.

— One 8-bit timer/counter and one 16-bit

timer/counter with selectable operating modes.

— One 8-bit counter with auto-reload function and

one-shot or repeat control.

The S3C8095 is a versatile general-purpose
microcontroller. It is currently available in a 32-pin
SOP and SDIP package.

— Twelve bit-programmable pins for external

interrupts.

— One 8-bit basic timer for oscillation stabilization

and watchdog functions (system reset).

Figure 1-1. S3C8095 Microcontroller

1-1

PRODUCT OVERVIEW S3C8095/P8095

FEATURES

CPU

• SAM87 CPU core

Memory

• 16K-byte internal program memory (ROM)

• 317-byte internal register file

Instruction Set

• 78 instructions

• IDLE and STOP instructions added for power­down modes

Instruction Execution Time

• 750 ns at 8-MHz f

(minimum)

OSC

Interrupts

• Six interrupt levels and 18 interrupt sources

• 15 vectors (14 sources have a dedicated vector
address and four sources share a single vector)

• Fast interrupt processing feature (for one
selected interrupt level)

Timers and Timer/Counters

• One programmable 8-bit basic timer (BT) for
oscillation stabilization control or watchdog timer
(software reset) function

• One 8-bit timer/counter (Timer 0) with three
operating modes; Interval, Capture and PWM

• One 16-bit timer/counter (Timer 1) with two
operating modes; Interval and Capture

Carrier Frequency Generator

• One 8-bit counter with auto-reload function and
one-shot or repeat control (Counter A)

Operating Temperature Range

• – 20°C to + 85°C

Operating Voltage Range

• 2.0 V to 5.5 V at 4 MHz f

• 2.4 V to 5.5 V at 8 MHz f

OSC
OSC

Package Type

I/O Ports

• Three 8-bit I/O ports (P0–P2) and one 2-bit port
(P3) for a total of 26 bit-programmable pins

• Twelve input pins for external interrupts

• 32-pin SOP

• 32-pin SDIP

1-2

S3C8095/P8095 PRODUCT OVERVIEW

BLOCK DIAGRAM

P0.0–P0.7

P1.0–P1.7

PORT 1

RESET

TEST

(INT0–INT4)

PORT 0

X

X

IN

OUT

MAIN

OSC

8-BIT

BASIC

TIMER

8-BIT

TIMER/

COUNTER

16-BIT

TIMER/

COUNTER

INTERNAL BUS

I/O PORT and INTERRUPT

CONTROL

SAM8 CPU

16-KB ROM

317-BYTES

REGISTER

FILE

PORT2

P3.0/T0PWM/

PORT 3

CARRIER

GENERATOR

(COUNTER A)

T0CAP/T1CAP

P3.1/REM/T0CK

P2.0–P2.3
(INT5–INT8)
P2.4–P2.7

Figure 1-2. Block Diagram

1-3

PRODUCT OVERVIEW S3C8095/P8095

PIN ASSIGNMENTS

V

X

X

OUT

TEST
P2.0 / INT5
P2.1 / INT6
P2.2 / INT7
P2.3 / INT8
P0.0 / INT0
P0.1 / INT1
P0.2 / INT2
P0.3 / INT3
P0.4 / INT4
P0.5 / INT4
P0.6 / INT4
P0.7 / INT4

SS

1

IN

2
3
4
5
6
7

S3C8095

8

32-SOP/SDIP

9

(Top View)

10
11
12
13
14
15
16

32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17

V

DD

RESET

P3.1 / REM / T0CK
P3.0 / T0PWM / T0CAP / T1CAP
P2.7
P2.6
P2.5
P2.4
P1.7
P1.6
P1.5
P1.4
P1.3
P1.2
P1.1
P1.0

Figure 1-3. Pin Assignment Diagram (32-Pin SOP/SDIP Package)

1-4

S3C8095/P8095 PRODUCT OVERVIEW

PIN DESCRIPTIONS

Table 1-1. Pin Descriptions

Pin

Names

Pin

Type

Pin

Description

P0.0–P0.7 I/O I/O port with bit-programmable pins.

Configurable to input or push-pull output
mode. Pull-up resistors are assignable by
software. Pins can be assigned individually
as external interrupt inputs with noise filters,
interrupt enable/ disable, and interrupt
pending control.

P1.0–P1.7 I/O I/O port with bit-programmable pins.

Configurable to Schmitt trigger input mode
or output mode. Pin circuits are either push­pull or n-channel open-drain type. Pull-up
resistors are assignable by software.

P2.0–P2.3
P2.4–P2.7

I/O General-purpose I/O port with bit-

programmable pins. Configurable to
Schmitt trigger input mode, push-pull output
mode, or n-channel open-drain output
mode. Pull-up resistors are assignable by
software. Lower nibble pins, P2.3–P2.0, can
be assigned as external interrupt inputs with
noise filters, interrupt enable/disable, and
interrupt pending control.

Circuit

Type

Pin No. Shared

Functions

1 9–16 INT0–INT4

3 17–24 –

2
3

5–8,

25–28

INT5–INT8

–

P3.0
P3.1

I/O 2-bit I/O port with bit-programmable pins.

Configurable to Schmitt trigger input mode,
push-pull output mode, or n-channel open­drain output mode. Pull-up resistors are
assignable by software. The two port 3 pins
have high current drive capability.

XIN, X

RESET

OUT

– System clock input and output pins – 2, 3 –

I System reset signal input pin with schmitt

trigger circuit.

TEST I Test signal input pin (for factory use only;

must be connected to VSS).

V

DD

V

SS

– Power supply input pin – 32 –
– Ground pin – 1 –

4 29

30

T0PWM/

T0CAP/
T1CAP/

REM/T0CK

5 31 –

– 4 –

1-5

PRODUCT OVERVIEW S3C8095/P8095

PIN CIRCUITS

V

DD

PULL-UP
RESISTOR
(Typical

PULL-UP

ENABLE

DATA

OUTPUT

DISABLE

V

DD

50 ΚΩ)

INPUT /
OUTPUT

INTERRUPT INPUT

IRQ6,7 (INT0-4)

NORMAL

INPUT

NOISE

FILTER

Figure 1-4. Pin Circuit Type 1 (Port 0)

V

SS

1-6

S3C8095/P8095 PRODUCT OVERVIEW

PIN CIRCUITS (Cont.)

V

DD

PULL-UP
RESISTOR

PULL-UP
ENABLE

DATA

OPEN-DRAIN

OUTPUT DISABLE

(Typical 50

V

DD

ΚΩ)

IN / OU T

NORMAL INPUT

EXTERNAL

INTERRUPT
IRQ5 (INT5-8)

Figure 1-5. Pin Circuit Type 2 (Ports 2.0–2.3)

V

SS

NOISE

FILTER

1-7

PRODUCT OVERVIEW S3C8095/P8095

PIN CIRCUITS (Cont.)

V

DD

PULL-UP
RESISTOR

PULL-UP

ENABLE

DATA

(Typical 50

V

DD

ΚΩ)

OPEN­DRAIN

NORMAL INPUT

Figure 1-6. Pin Circuit Type 3 (Ports 1 and P2.4–P2.7)

OUTPUT

DISABLE

IN / OUT

V

SS

1-8

S3C8095/P8095 PRODUCT OVERVIEW

PIN CIRCUITS (Cont.)

V

DD

PULL-UP
RESISTOR

Typical

PULL-UP

ENABLE

PORT 3

DATA

ALTERNATIVE

OUTPUT

SELECT

M
U
X

DATA

(

V

DD

50 ΚΩ)

OPEN­DRAIN

NORMAL INPUT

ALTERNATIVE

INPUT

OUTPUT

DISABLE

NOISE F ILTER

Figure 1-7. Pin Circuit Type 4 (Port 3)

RESET

V

SS

IN / OUT

Figure 1-8. Pin Circuit Type 5 (RRESETESET)

1-9

S3C8095/P8095 S3P8095 OTP

13 S3P8095 OTP

OVERVIEW

The S3P8095 single-chip CMOS microcontroller is the OTP (One Time Programmable) version of the S3C8095

microcontroller. It has an on-chip EPROM instead of masked ROM.
The S3P8095 is fully compatible with the S3C8095, both in function and in pin configuration. Because of its

simple programming requirements, the S3P8095 is ideal for use as an evaluation chip for the S3C8095.

MEM_

PGMPGM

REGREG

A8
A9
A0
A1
A2
A3
A4
A5
A6
A7

V

X

X

OUT

/TEST

MODE

/P2.0 / INT5
/P2.1 / INT6

/P2.2 / INT7
/P2.3 / INT8
/P0.0 / INT0
/P0.1 / INT1
/P0.2 / INT2
/P0.3 / INT3
/P0.4 / INT4
/P0.5 / INT4
/P0.6 / INT4
/P0.7 / INT4

V

SS

1

IN

2
3
4
5
6
7

S3P8095

8

32-SOP/SDIP

9

(Top View)

10
11
12
13
14
15
16

32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17

DD

RESET/

P3.1/REM/T0CK/
P3.0/

P2.7/
P2.6/
P2.5/
P2.4/
P1.7/
P1.6/
P1.5/
P1.4/
P1.3/
P1.2/
P1.1/
P1.0/

Figure 13-1. S3P8095 Pin Assignments

VPP

CECE

OEOE

A13
A12
A11
A10
D7
D6
D5
D4
D3
D2
D1
D0

13-1

S3P8095 OTP S3C8095/P8095

Table 13–1. Pin Descriptions used to read/write the EPROM

Pin Name Pin No. I/O Function

A0 - A13 7 - 16, 25 - 28 O Address lines to read/write EPROM

D0 - D7 17 - 24 I/O 8-bit data input/output lines to read/write EPROM

MODE 4 — Select EPROM mode.

CE
OE

PGM

MEM_REG

V

DD

V

PP

V

SS

X

IN

X

OUT

30 I
29 I Output enable

5 I EPROM Program enable

6 I Select Memory space of EPROM
32 – Supply voltage (normally 5 V)
31 – EPROM Program/Verify voltage (normally 12.5 V)

1 – GROUND

2 – System Clock input pin

3 – System Clock output pin

Chip enable (Connect to V

SS, when read/write EPROM)

CHARACTERISTICS OF EPROM OPERATION

When +12.5 V is supplied to V

and MODE pins of the S3P8095, the EPROM programming mode is entered.

PP

The operating mode (read, write) is selected according to the input signals to the pins listed in Table2 as below.

Table 13-2. Operating Mode Selection Criteria

V

5 V

DD

MODE

V

PP

V

PP

PGMPGM

MEM

OEOE

12.5 V 1 1 0 READ

Mode

0 1 1 PROGRAM
1 1 0 PROGRAM VERIFY

NOTE: "0" means Low level; "1" means High level.

13-2

S3C8095/P8095 S3P8095 OTP

A13 - A0

t

OED

D7 - D0

t

OEH

t

ACC

OEOE

MODE

(TA = 25 °C ± 5°C, V

DD

Parameter Symbol Min Typ Max Units

Address to Output Delay

OE to Address Delay
OE Pulse Width

Output hold from OE
whichever occurs first

t

OEW

Figure 13-2. OTP Read Timing

Table 13-3. OTP Read characteristics

= 5 V ± 5 %, VPP = 12.5 V ± 0.25V)

t

ACC

t

OED

t

OEW

t

OEH

12.5V

— — 75 ns

0 — —

75 — —

0 — —

13-3

S3P8095 OTP S3C8095/P8095

A13 - A0

D7 - D0

MODE

PGM

OEOE

PROGRAM

Data In Stable

t

DS

t

VS

t

PW

t

DH

t

OE

Figure 13-3. Program Memory Write Timing

PROGRAM VERIFY

Data Out Valid

t

OEW

t

OEH

Table 13-4. OTP Program/Program Verify Characteristics

(TA = 25 °C ± 5°C, V

= 5 V ± 5 %, VPP = 12.5 V ± 0.25V)

DD

Parameter Symbol Min Typ Max Units

VPP Setup Time t
Data Setup Time
Data Hold Time

PGM Pulse Width
Data Valid from OE
OE Pulse Width

Output Enable to Output Float

VS

t

DS

t

DH

t

PW

t

OE

t

OEW

t

OEH

— 2 — µs
— 2 —
— 2 —
— 300 500
75 — — ns
75 — —

0 — 130

Delay

13-4

S3C8095/P8095 S3P8095 OTP

START

Address = First Location

VDD = 5 V, VPP = 12.5 V

X = 0

Program One 1ms Pulse

FAIL

Device Failed

Verify Byte

FAIL

Increment X

YES

Last Address

VDD = VPP = 5V

Compare All byte

Device Passed

X = 10

NO

Verify 1 Byte

PASS

YES

PASS

FAIL

NO

Increment Address

Figure 13-4. OTP Programming Algorithm

13-5

S3C8095/P8095 ELECTRICAL DATA

14 ELECTRICAL DATA

OVERVIEW

In this section, S3C8095/P8095 electrical characteristics are presented in tables and graphs. The information is
arranged in the following order:

— Absolute maximum ratings
— D.C. electrical characteristics
— Data retention supply voltage in Stop mode
— Stop mode release timing when initiated by an external interrupt
— Stop mode release timing when initiated by a Reset
— I/O capacitance
— A.C. electrical characteristics
— Input timing for external interrupts (port 0, P2.3–P2.0)

— Input timing for RESET
— Oscillation characteristics
— Oscillation stabilization time

14-1

ELECTRICAL DATA S3C8095/P8095

Table 14-1. Absolute Maximum Ratings

(TA = 25 °C)

Parameter Symbol Conditions Rating Unit

Supply voltage
Input voltage
Output voltage
Output current

V

DD

V

IN

V

O

I

OH

All output pins
One I/O pin active – 18 mA

– – 0.3 to + 6.5 V
–

– 0.3 to VDD + 0.3
– 0.3 to V

DD

+ 0.3

V
V

High

All I/O pins active – 60

Output current

I

OL

One I/O pin active + 30 mA

Low

Total pin current for ports 0, 1, and 2 + 100
Total pin current for port 3 + 20

Operating

T

A

– – 20 to + 85

°

C

temperature
Storage

T

STG

– – 65 to + 150

°

C

temperature

Table 14-2. D.C. Electrical Characteristics

(T

= – 20 °C to + 85 °C, VDD = 2.0 V to 5.5 V)

A

Parameter Symbol Conditions Min Typ Max Unit

Operating Voltage

V

DD

f

OSC

= 8 MHz

2.4 — 5.5 V

(Instruction clock = 1.33
MHz)

f

OSC

= 4 MHz

2.0 — 5.5

(Instruction clock = 0.67
MHz)

Input High
voltage

Input Low voltage

Output High
voltage

V

V
V

V

V

V
V

OH1

IH1

IH2
IH3
IL1

IL2
IL3

All input pins except V
and V

IH3

IH2

RESET

X

IN

All input pins except V
and V

IL3

IL2

RESET

X

IN

VDD= 3.0 V IOH = – 7 mA
Port 3 only

0.8 V

DD

0.95 V

DD

V

– 0.3 V

DD

–

0 –

V

DD

– 2.0

– – V

V

DD

V

DD
DD

0.2 V

0.3 V

0.3

DD

DD

V

V

14-2

S3C8095/P8095 ELECTRICAL DATA

Table 14-2. D.C. Electrical Characteristics (Continued)

(T

= – 20 °C to + 85 °C, V

A

= 2.0 V to 5.5 V)

DD

Parameter Symbol Conditions Min Typ Max Unit

Output High
voltage

V

OH2

VDD = 3.0 V
IOH = – 200 µA

V

DD

– 1.0

– – V

All output pins except port 3

Output Low
voltage

V

OL1

V

= 3.0 V

DD

IOL = 1.5 mA, port 3 only

– 0.3 0.6

Input High
leakage current

Input Low
leakage current

Output High
leakage current

Output Low
leakage current

Pull-up resistors

Supply current

(See Note)

V

I

LIH1

I

LIH2

I

LIL1

I

LIL2

I

LOH

I

LOL

R

I

DD1

I

DD2

I

DD3

OL2

L1

IOL = 1 mA
Ports 0, 1 and 2

V

= VDD; all input pins

IN

except X
VIN = VDD, X
V

= 0 V; all input pins

IN

except XIN, X

IN

and X

IN

OUT

OUT

and X

, and

RESET

V

= 0 V, X

IN

V

OUT

= V

DD

IN

and X

All output pins
V

= 0 V

OUT

All output pins
V

= 0 V; T

IN

V

= 5.0 V ± 10 %

DD

= 25 °C

A

Ports 0–3
Operating mode;

V

= 5.0 V ± 10 %

DD

4-MHz crystal
Idle mode;

VDD = 5.0 V ± 10 %
4-MHz crystal

Stop mode;
V

= 5.0 V ± 10 %

DD

V

= 3.6 V

DD

OUT

OUT

0.4 1.0

– – 1 µA

20

– – – 1 µA

– 20

– – 1 µA

– – – 1 µA

30 50 100

KΩ

– 4.5 9 mA

1.6 3

0.3 3 µA

0.1 1

NOTE: Supply current does not include current drawn through internal pull-up resistors or external output current loads.

14-3

ELECTRICAL DATA S3C8095/P8095

Table 14-3. Data Retention Supply Voltage in Stop Mode

(TA = – 20 °C to + 85 °C)

Parameter Symbol Conditions Min Typ Max Unit

Data retention supply

V

DDDR

– 1.0 – 5.5 V

voltage
Data retention supply

current

V

DD

EXECUTION OF

EXT

INT

STOP INSTRUCTION

I

DDDR

DATA RETENTION MODE

V

DDDR

= 1.0 V

– – 1 µA

Stop mode

IDLE MODE

(Basic Timer active)

STOP MODE NORMAL

OPERATING
MODE

V

DDDR

0.8 V

0.2 V

DD

DD

V

DD

RESET

Note

t

WAIT

Figure 14-1. Stop Mode Release Timing When Initiated by an External Interrupt

RESET

OCCURS

STOP MODE NORMAL

DATA RETENTION MODE

V

DDDR

EXECUTION OF

STOP INSTRUCTION

: t

is the same as 4096 x 16 x 1/f

WAIT

OSC

t

WAIT

Figure 14-2. Stop Mode Release Timing When Initiated by a Reset

OSCILLATION

STABILIZATION

TIME

OPERATING
MODE

14-4

S3C8095/P8095 ELECTRICAL DATA

Table 14-4. Input/Output Capacitance

(T

= – 20 °C to + 85 °C, V

A

DD

= 0 V)

Parameter Symbol Conditions Min Typ Max Unit

C

C

OUT

IN

f = 1 MHz; unmeasured pins

are connected to V

SS

— — 10 pF

Input
capacitance

Output
capacitance

I/O capacitance

C

IO

Table 14-5. A.C. Electrical Characteristics

(T

= – 20 °C to + 85 °C)

A

Parameter Symbol Conditions Min Typ Max Unit

Interrupt input,

High, Low width

RESET input Low

width

t

INTH

t

INTL

t

RSL

,

P0.0–P0.7, P2.3–P2.0

V

= 5 V

DD

Input

V

= 5 V

DD

200 300 — ns

1000 — —

NOTE

t

INTL

0.2 V

DD

: The unit t

0.8 V

means one CPU clock period.

CPU

DD

t

INTH

Figure 14-3. Input Timing for External Interrupts (Port 0, P2.3–P2.0)

t

RSL

RESET

0.3 V

DD

Figure 14-4. Input Timing for RESETRESET

14-5

ELECTRICAL DATA S3C8095/P8095

S3C8095

Table 14-6. Oscillation Characteristics

(TA = – 20 °C + 85 °C)

Oscillator Clock Circuit Conditions Min Typ Max Unit

External

Clock

Open

Pin

C1

C2
C1

C2

XIN

XOUT

X

X

X

X

IN

OUT

IN

OUT

CPU clock oscillation
frequency

CPU clock oscillation
frequency

X

input frequency

IN

0.4 — 8 MHz

0.4 — 8 MHz

0.4 – 8 MHz

Crystal

Ceramic

External clock

Table 14-7. Recommended Oscillator Constants

(T

= – 20 °C + 85 °C, VDD = 4.5 V to 5.5 V)

A

Manufacturer

TDK

Product Name

FCR4.0MC5

(note)

FCR4.0M5 33 33 2.0 5.5 Leaded Type
CCR4.0MC3
FCR6.0MC5

(note)

(note)

FCR6.0M5 33 33 2.0 5.5 Leaded Type
CCR6.0MC3
FCR8.0MC5

(note)

(note)

FCR8.0M5 33 33 2.0 5.5 Leaded Type
CCR8.0MC5

NOTE: On-chip C: 30 pF ± 20 % built in.

(note)

Load Cap (pF) Oscillator Voltage

Remarks

Range (V)

C1 C2 MIN MAX

– – 2.0 5.5 On-chip C Leaded Type

– – 2.0 5.5 On-chip C SMD Type
– – 2.0 5.5 On-chip C Leaded Type

– – 2.0 5.5 On-chip C SMD Type
– – 2.0 5.5 On-chip C Leaded Type

– – 2.0 5.5 On-chip C SMD Type

14-6

S3C8095/P8095 ELECTRICAL DATA

Table 14-8. Oscillation Stabilization Time

(T

= – 20 °C + 85 °C, VDD = 4.5 V to 5.5 V)

A

Oscillator Test Condition Min Typ Max Unit

f

Main crystal

> 400 kHz

OSC

— — 20 ms

Main ceramic

Oscillation stabilization occurs when VDD is equal
to the minimum oscillator voltage range.

External clock

XIN input High and Low width (tXH, tXL)

(main system)
Oscillator

t

WAIT when released by a reset

stabilization
wait time

t

WAIT when released by an interrupt

NOTES:

1. f

2. The duration of the oscillation stabilization time (t

is the oscillator frequency.

OSC

in the basic timer control register, BTCON.

INSTRUCTION

CLOCK

1.33 MHz

1.00 MHz

670 kHz

C

B

A

— — 10 ms

25 — 500 ns

(1)

(2)

) when it is released by an interrupt is determined by the setting

WAIT

—

— — — ms

2

f

OSC

16

/

— ms

F

OSC
(Main oscillation
frequency)

8 MHz

6 MHz

4 MHz

500 kHz

250 kHz

8.32 kHz

400 kHz

1 2 3 4 5 6 7

SUPPLY VOLTAGE (V)

INSTRUCTION CLOCK = 1/6n x oscillator frequency (n = 1, 2, 8, 16)
A 2.0 V: 4 MHz,
B 2.2 V: 6 MHz,
C 2.4 V: 8 MHz

Figure 14-5. Operating Voltage Range

14-7

ELECTRICAL DATA S3C8095/P8095

0

-1

-2

-3
V

= 3V

DD

-4

I

OH

(mA)

-5

-6

-7

-8

-9

-10
0 4.5 5

V

V

DD

DD

= 4V

= 5V

1 1.5 2 2.5 3 3.5 40.5

VOH (V)

Figure 14-6. IOH vs. VOH (Port 0)

14-8

S3C8095/P8095 ELECTRICAL DATA

0

-1

-2

-3
V

= 3V

DD

-4

I

OH

(mA)

-5

-6

-7

-8

-9

-10
0 4.5 5

V

V

DD

DD

= 4V

= 5V

1 1.5 2 2.5 3 3.5 40.5

VOH (V)

Figure 14-7. IOH vs. VOH (Port 2)

14-9

ELECTRICAL DATA S3C8095/P8095

0

-4

-8

-12
V

= 3V

DD

-16

I

OH

-20

(mA)

-24

-28

-32

-36

-40
0 4.5 5

V

V

DD

DD

= 4V

= 5V

1 1.5 2 2.5 3 3.5 40.5

VOH (V)

Figure 14-8. IOH vs. VOH (Port 3)

14-10

S3C8095/P8095 ELECTRICAL DATA

20

18

16

V

= 5V

14

DD

I

OL

(mA)

12

10

8

6

4

2

0 2.7 3

0.6 0.9 1.2 1.5 1.8 2.1 2.40.3

V

V

DD

DD

= 4V

= 3V

VOL (V)

Figure 14-9. IOL vs. VOL (Port 0)

14-11

ELECTRICAL DATA S3C8095/P8095

20

18

16

V

= 5V

14

DD

I

OL

(mA)

12

10

8

6

4

2

0 2.7 3

0.6 0.9 1.2 1.5 1.8 2.1 2.40.3

V

V

DD

DD

= 4V

= 3V

VOL (V)

Figure 14-10. IOL vs. VOL (Port 2)

14-12

S3C8095/P8095 ELECTRICAL DATA

50

45

V

= 5V

DD

V

V

DD

DD

= 4V

= 3V

I

OL

(mA)

40

35

30

25

20
15

10

5

0 3.15 3.5

0.7 1.05 1.4 1.75 2.1 2.45 2.80.35

VOL (V)

Figure 14-11. IOL vs. VOL (Port 3)

14-13

S3C8095/P8095 MECHANICAL DATA

15 MECHANICAL DATA

OVERVIEW

The S3C8095 microcontroller is currently available in a 32-pin SOP package.

0~8°

#32 #17

32-SOP-450A

12.00 ± 0.3

#1 #16

19.90

(0.43) 0.40 ± 0.1

: Dimensions are in millimeters.

NOTE

Figure 15-1. 32-Pin SOP Package Mechanical Data

± 0.2

1.27

0.0MIN 2.00 ± 0.2

8.34 ± 0.2

+0.10

0.20

- 0.05

2.40MAX

0.10 MAX

11.43

0.78 ± 0.20

15-1

MECHANICAL DATA S3C8095/P8095

#32 #17

0 – 15 °

9.10 ± 0.20

(1.37)

32-SDIP-400

#1 #16

27.88 MAX

± 0.2

27.48

0.45 ± 0.10

1.00 ± 0.10

NOTE

: Dimensions are in millimeters.

1.778

10.16

0.51MIN 3.80 ± 0.2

5.08MAX

± 0.3

3.30

+0.1

– 0.05

0.25

15-2

Figure 15-2. 32-Pin SDIP Package Mechanical Data