Datasheet RFD15P06, RFP15P06 Datasheet (Intersil)

RFD15P06, RFD15P06SM, RFP15P06

Data Sheet July 1999

15A, 60V, 0.150 Ohm, P-Channel Power
MOSFETs

These P-Channel power MOSFETs are manufacturedusing
the MegaFET process. This process which uses feature
sizes approaching those of LSI integrated circuits, gives
optimum utilization of silicon, resulting in outstanding
performance. They were designed for use in applications
such as switching regulators, switching converters, motor
drivers, and relay drivers. Thesetransistorscan be operated
directly from integrated circuits.

Formerly developmental type TA09833.

Ordering Information

PART NUMBER PACKAGE BRAND

RFD15P06 TO-251AA F15P06
RFD15P06SM TO-252AA F15P06
RFP15P06 TO-220AB RFP15P06

NOTE: Whenordering, use theentire part number. Add the suffix 9A to
obtain the TO-252AAvariantinthetapeandreel,i.e.,RFD15P06SM9A.

File Number

Features

• 15A, 60V

DS(ON)

= 0.150Ω

®

Model

•r

• Temperature Compensating PSPICE

• Peak Current vs Pulse Width Curve

• UIS Rating Curve

• Related Literature

- TB334 “Guidelines for Soldering Surface Mount
Components to PC Boards”

Symbol

D

G

S

3988.3

Packaging

DRAIN (FLANGE)

JEDEC TO-220AB JEDEC TO-251AA

SOURCE

DRAIN

GATE

JEDEC TO-252AA

DRAIN (FLANGE)

GATE

SOURCE

DRAIN (FLANGE)

SOURCE

DRAIN

GATE

4-103

CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.

PSPICE® is a registered trademark of MicroSim Corporation.

http://www.intersil.com or 407-727-9207

| Copyright © Intersil Corporation 1999

RFD15P06, RFD15P06SM, RFP15P06

Absolute Maximum Ratings T

= 25oC Unless Otherwise Specified

C

RFD15P06, RFD15P06SM, RFP15P06 UNITS

Drain to Source Voltage (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V

Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . V

Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

Pulsed Drain Current (Figure 5) (Note 3). . . . . . . . . . . . . . . . . . . . . . . . . I

Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V

Pulsed Avalanche Rating (Figure 6) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .E

Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .P

DSS

DGR

DM

GS
AS

D

Refer to Peak Current Curve

D

Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . .TJ, T

STG

Maximum Temperature for Soldering

Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . T

Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . T

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operationofthe
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

L

pkg

-60 V

-60 V
15

±20 V

Refer to UIS Curve

80

0.533

-55 to 175

300
260

A

W

W/oC

o

C

o

C

o

C

NOTE:

1. TJ = 25oC to 150oC.

Electrical Specifications T

= 25oC, Unless Otherwise Specified

C

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Drain to Source Breakdown Voltage BV
Gate to Source Threshold Voltage V

GS(TH)VGS

Zero Gate Voltage Drain Current I

Gate to Source Leakage Current I
Drain to Source On Resistance (Note 2) r

DS(ON)ID

Turn-On Time t
Turn-On Delay Time t

d(ON)

Rise Time t
Turn-Off Delay Time t

d(OFF)

Fall Time t
Turn-Off Time t
Total Gate Charge Q

g(TOT)VGS

Gate Charge at -10V Q
Threshold Gate Charge Q
Input Capacitance C
Output Capacitance C
Reverse Transfer Capacitance C
Thermal Resistance Junction to Case R
Thermal Resistance Junction to Ambient R

DSSID

DSS

GSS

ON

r

f

OFF

g(-10)VGS
g(TH)

ISS
OSS
RSS

θJC

θJA

= 250µA, VGS = 0V -60 - - V

= VDS, ID = 250µA -2.0 - -4.0 V
VDS = Rated BV
VDS = 0.8 x Rated BV

, VGS = 0V - - -1 µA

DSS

, TC = 150oC - - -25 µA

DSS

VGS = ±20V - - ±100 nA

≈ 15A, V

VDD = -30V, ID = 7.5A
RL = 4.0Ω, VGS = -10V
RG = 12.5Ω
(Figure 13)

= -10V, (Figure 9) - - 0.150 W

GS

- - 60 ns

-16- ns

-30- ns

-50- ns

-20- ns

- - 100 ns
= 0V to -20V VDD = -48V, ID = 15A,
= 0V to -10V - - 75 nC

VGS = 0V to -2V - - 3.5 nC

RL = 3.20Ω
I

= 0.65mA

G(REF)

VDS = -25V, VGS = 0V
f = 1MHz
(Figure 12)

- - 150 nC

- 1150 - pF

- 300 - pF

-56- pF

TO-220AB, TO-251AA, TO-252AA - - 1.875oC/W
TO-251AA, TO-252AA - - 100
TO-220AB - - 62

o

C/W

o

C/W

Source to Drain Diode Specifications

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Source to Drain Diode Voltage (Notte 2) V
Reverse Recovery Time t

SD

rr

NOTES:

2. Pulsed: pulse duration ≤ 300ms Max, duty cycle ≤ 2%.

3. Repetitive rating: pulse width limited by maximum junction temperature. See Transient Thermal Impedance curve (Figure 3).

4-104

ISD = -15A - - -1.5 V
ISD = -15A, dISD/dt = 100A/µs - - 125 ns

RFD15P06, RFD15P06SM, RFP15P06

Typical Performance Curves

Unless Otherwise Specified

1.2

1.0

0.8

0.6

0.4

0.2

POWER DISSIPATION MULTIPLIER

0

0 25 50 75 100 175

125

TC, CASE TEMPERATURE (oC)

FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE

TEMPERATURE

2

1

0.5

150

-16

-12

-8

, DRAIN CURRENT (A)

-4

D

I

0

25 50 75 100 125 150

TC, CASE TEMPERATURE (oC)

FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs

CASE TEMPERATURE

175

0.2

0.1

THERMAL IMPEDANCE

0.1

0.05

0.02

0.01

NORMALIZED

θJC,

Z

SINGLE PULSE

0.01

-5

10

-4

10

-3

10

FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE

-100

-10

, DRAIN CURRENT (A)

D

I

OPERATION IN THIS
AREA MAY BE
LIMITED BY r

-1

-1 -10 -100

DS(ON)

V

, DRAIN TO SOURCE VOLTAGE (V)

DS

= MAX RATED

T

J

TC = 25oC

-2

10

t, RECTANGULAR PULSE DURATION (s)

-200
VGS = -20V

-100

100µs

1ms

, PEAK CURRENT (A)

10ms

100ms

DC

VGS = -10V

DM

I

TRANSCONDUCTANCE
MAY LIMIT CURRENT
IN THIS REGION

-10

-5

10

P

DM

t

1

t

NOTES:
DUTY FACTOR: D = t
PEAK TJ = PDM x Z

-1

10

0

10

FOR TEMPERATURES ABOVE 25

1/t2

θ JC

x R

2

θ JC

+ T

C

1

10

o

C
DERATE PEAK CURRENT
CAPABILITY AS FOLLOWS:

175 TC–



II

=

----------------------- -



25

150



TC = 25oC

-4

10

-3

10

-2

10

-1

10

0

10

1

10

t, PULSE WIDTH (s)

FIGURE 4. FORWARD BIAS SAFE OPERATING AREA FIGURE 5. PEAK CURRENT CAPABILITY

4-105

RFD15P06, RFD15P06SM, RFP15P06

Typical Performance Curves

-50

STARTING TJ = 150oC

-10

If R = 0

, AVALANCHE CURRENT (A)

tAV = (L) (IAS) / (1.3RATED BV

AS

I

If R ≠ 0
tAV = (L/R) ln [(IAS*R) / (1.3 RATED BV

-1

0.1 1 10 100
tAV, TIME IN AVALANCHE (ms)

DSS

Unless Otherwise Specified (Continued)

STARTING TJ = 25oC

- VDD)

- VDD) + 1]

DSS

NOTE: Refer to Intersil Application Notes AN9321 and AN9322.

FIGURE 6. UNCLAMPED INDUCTIVE SWITCHING

-40

PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX

= -15V

V

DD

-32

-55oC

25oC

-40

PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX

= 25oC

T

C

-30

-20

, DRAIN CURRENT (A)

-10

D

I

0

0 -1.5 -3.0 -4.5 -6.0 -7.5

VGS = -20V

VDS, DRAIN TO SOURCE VOLTAGE (V)

VGS = -10V

VGS = -4.5V

FIGURE 7. SATURATION CHARACTERISTICS

2.5

PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX

VGS= -10V, ID = 15A

2.0

VGS = -8V

VGS = -7V

VGS = -6V

VGS = -5V

-24

-16

-8

, DRAIN TO SOURCE CURRENT (A)

DS(ON)

I

0

0 -2 -4 -6 -8 -10

, GATE TO SOURCE VOLTAGE (V)

V

GS

175oC

1.5

1.0

ON RESISTANCE

0.5

NORMALIZED DRAIN TO SOURCE

0

-80 -40 0 40 80 120 160
, JUNCTION TEMPERATURE (oC)

T

J

FIGURE 8. TRANSFER CHARACTERISTICS FIGURE 9. NORMALIZED DRAIN TO SOURCE ON

RESISTANCE vs JUNCTION TEMPERATURE

2.0
VGS = VDS, ID = 250µA

1.5

1.0

NORMALIZED GATE

0.5

THRESHOLD VOLTAGE

0

-80 -40 0 40 80 160120
TJ, JUNCTION TEMPERATURE (oC)

200

2.0
ID = 250µA

1.5

1.0

0.5

BREAKDOWN VOLTAGE

NORMALIZED DRAIN TO SOURCE

0

-80 -40 0 40 80 120 160
TJ, JUNCTION TEMPERATURE (oC)

200

200

FIGURE 10. NORMALIZED GATETHRESHOLD VOLTAGE vs

JUNCTION TEMPERATURE

4-106

FIGURE 11. NORMALIZED DRAIN TO SOURCE BREAKDOWN

VOLTAGE vs JUNCTION TEMPERATURE

RFD15P06, RFD15P06SM, RFP15P06

Typical Performance Curves

Unless Otherwise Specified (Continued)

1400

C

C

ISS

OSS

VGS = 0V, f = 1MHz
C

= CGS + C
C
C

C

ISS
RSS
OSS

RSS

= C

≈ C

GD
DS

GD

+ C

GS

1200

1000

800

600

400

C, CAPACITANCE (pF)

200

0

0 -5 -10 -15 -20 -25

VDS, DRAIN TO SOURCE VOLTAGE (V)

FIGURE 12. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE

Test Circuits and Waveforms

V

DS

L

-60

-45

VDD = BV

DSS

VDD = BV

DSS

-10

-7.5

RL = 3.33Ω
I

= 0.65mA

G(REF)

V

= -10V

0.75 BV

0.50 BV

0.25 BV

GS

DSS
DSS
DSS

0.75 BV

0.50 BV

0.25 BV

DSS
DSS
DSS

-5

-2.5

-30

-15

, DRAIN TO SOURCE VOLTAGE (V)

DS

V

0

20

I

G(REF)

I

G(ACT)

t, TIME (µs)

80

I

G(REF)

I

G(ACT)

0

NOTE: Refer to Intersil Application Notes AN7254 and AN7260.

FIGURE 13. NORMALIZED SWITCHING WAVEFORMS FOR

CONSTANT GATE CURRENT

t

AV

0

, GATE TO SOURCE VOLTAGE (V)

GS

V

VARY t

TO OBTAIN

P

REQUIRED PEAK I

0V
V

GS

t

P

AS

R

G

I

AS

FIGURE 14. UNCLAMPED ENERGY TEST CIRCUIT

V

DS

V

GS

V

GS

R

GS

DUT

DUT

0.01Ω

R

-

V

DD

+

V

DD

FIGURE 15. UNCLAMPED ENERGY WAVEFORMS

t

d(ON)

L

-

V

DD

+

0

V

DS

V

GS

0

10%

t

ON

50%

I

AS

t

r

10%

90%

PULSE WIDTH

V

t

d(OFF)

DS

t

OFF

t

f

t

P

BV

DSS

10%

90%

50%

90%

FIGURE 16. SWITCHING TIME TEST CIRCUIT FIGURE 17. RESISTIVE SWITCHING WAVEFORMS

4-107

RFD15P06, RFD15P06SM, RFP15P06

Test Circuits and Waveforms

V

DS

V

GS

I

g(REF)

FIGURE 18. GATE CHARGE TEST CIRCUIT FIGURE 19. GATE CHARGE WAVEFORMS

(Continued)

R

L

DUT

V

Q

GS

g(TH)

Q

g(-10)

Q

g(TOT)

0

VGS= -2V

-

V

DD

+

V

0

I

g(REF)

-V

DD

DS

VGS= -10V

VGS= -20V

4-108

RFD15P06, RFD15P06SM, RFP15P06

PSPICE Electrical Model

.SUBCKT RFP15P06 2 1 3 REV 9/06/94

CA 12 8 1.6e-9
CB 15 14 1.47e-9
CIN 6 8 1.09e-9

DBODY 5 7 DBDMOD
DBREAK 7 11 DBKMOD
DPLCAP 10 6 DPLCAPMOD

EBREAK 5 11 17 18 -73.0
EDS 14 8 5 8 1
EGS 13 8 6 8 1
ESG 5 10 8 6 1
EVTO 20 6 8 18 1

IT 8 17 1

1

LDRAIN 2 5 1e-9
LGATE 1 9 6.73e-9
LSOURCE 3 7 6.69e-9

MOS1 16 6 8 8 MOSMOD M = 0.99
MOS2 16 21 8 8 MOSMOD M = 0.01

RBREAK 17 18 RBKMOD 1
RDRAIN 50 16 RDSMOD 63.6e-3
RGATE 9 20 7.37
RIN 6 8 1e9
RSCL1 5 51 RSCLMOD 1e-6
RSCL2 5 50 1e3
RSOURCE 8 7 RDSMOD 46.5e-3
RVTO 18 19 RVTOMOD 1

S1A 6 12 13 8 S1AMOD
S1B 13 12 13 8 S1BMOD
S2A 6 15 14 13 S2AMOD
S2B 13 15 14 13 S2BMOD

10

-

6

ESG

8

+

RGATEGATE LGATE

EVTO

+

-

18

8

209

RIN CIN

S1A S2A

12 15

13

8

13

CA

+

-

DPLCAP

RSCL2

14
13

S2BS1B

6
8

-

VTO

EDSEGS

6

CB

+

-

LSOURCE

7

RBREAK

IT

LDRAIN

DBODY

1817

19

DRAIN

SOURCE

RVTO

-

VBAT

+

2

3

5

RSCL1

5

ESCL

51

17
18

11

8

EBREAK

MOS2

DBREAK

RSOURCE

RDRAIN
16
+

21

MOS1

14

+

5
8

-

VBAT 8 19 DC 1
VTO 21 6 -0.65

ESCL 51 50 VALUE = {(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)*1e6/35,4))}

.MODEL DBDMOD D (IS = 1.27e-13 RS = 1.62e-2 TRS1 = 1.35e-3 TRS2 = -4.33e-6 CJO = 1.25e-9 TT = 7.97e-8)
.MODEL DBKMOD D (RS = 2.54e-1 TRS1 = 4.54e-3 TRS2 = -1.12e-5)
.MODEL DPLCAPMOD D (CJO = 285e-12 IS = 1e-30 N = 10)
.MODEL MOSMOD PMOS (VTO = -3.78 KP = 6.97 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u)
.MODEL RBKMOD RES (TC1 = 9.15e-4 TC2 = -4.0e-7)
.MODEL RDSMOD RES (TC1 = 5.47e-3 TC2 = 1.37e-5)
.MODEL RSCLMOD RES (TC1 = 1.9e-3 TC2 = -7.5e-6)
.MODEL RVTOMOD RES (TC1 = -3.71e-3 TC2 = -2.41e-6)
.MODEL S1AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = 3.65 VOFF = 1.65)
.MODEL S1BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = 1.65 VOFF = 3.65)
.MODEL S2AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = 0.60 VOFF = -4.40)
.MODEL S2BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -4.40 VOFF = 0.60)

.ENDS

NOTE: For further discussion of the PSPICE model, consult A New PSPICE Sub-Circuit for the Power MOSFET Featuring Global
Temperature Options; written by William J. Hepp and C. Frank Wheatley.

4-109

RFD15P06, RFD15P06SM, RFP15P06

All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.

Intersil semiconductor products are sold by description only.Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with­out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
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4-110

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