Datasheet RFG60P06E Datasheet (Intersil)

Page 1

RFG60P06E

Data Sheet July 1999

60A, 60V, 0.030 Ohm, ESD Rated, P-Channel Power MOSFET

The RFG60P06E P-Channel power MOSFET is manufactured using the MegaFET process. This process, which uses feature sizes approaching those of LSI circuits gives optimum utilization of silicon, resulting in outstanding performance. They were designed for use in applications such as switching regulators, switching converters, motor drivers and relay drivers. These transistors can be operated directly from integrated circuits.

The RFG60P06E incorporates ESD protection and is designed to withstand 2kV (Human Body Model) of ESD.

Formerly developmental type TA09836.

Ordering Information

PART NUMBER PACKAGE BRAND

RFG60P06E TO-247 RFG60P06E

NOTE: When ordering use the entire part numberr RFG60P06E.

File Number

Features

• 60A, 60V

DS(ON)

= 0.030Ω

•r

• Temperature Compensating PSPICE

• 2kV ESD Rated

• Peak Current vs Pulse Width Curve

• UIS Rating Curve

C Operating Temperature

• 175

• Related Literature

Symbol

Model

3989.3

Packaging

DRAIN

(BOTTOM

SIDE METAL)

JEDEC STYLE TO-247

SOURCE

DRAIN

GATE

4-154

CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.

PSPICE® is a registered trademark of MicroSim Corporation.

http://www.intersil.com or 407-727-9207

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RFG60P06E

Absolute Maximum Ratings T

= 25oC

RFG60P06E UNITS

Drain to Source Voltage (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V

Drain to Gate Voltage (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

DSS

DGR

Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V

Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I

Pulsed Drain Current (Note 3, Figure 5). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

Single Pulse Avalanche Rating (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E

Electrostatic Discharge Rating. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E

Refer to Peak Current Curve

-60 V

±20 V

Refer to UIS Curve

2KV

MIL-STD-883, Category B(2)

Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P

Derate Above 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, T

STG

Maximum Temperature for Soldering

Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . T

Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . .T

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operationofthe device at these or any other conditions above those indicated in the operational sections of this speciﬁcation is not implied.

pkg

215

1.43

-55 to 175

300 260

W/oC

NOTE:

1. TJ= 25oC to 150oC.

Electrical Speciﬁcations T

= 25oC, Unless Otherwise Speciﬁed

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Drain to Source Breakdown Voltage BV Gate To Threshold Voltage V

GS(TH)

Zero Gate Voltage Drain Current I

Gate to Source Leakage Current I Drain to Source On Resistance r

DS(ON)ID

Turn-On Time t Turn-On Delay Time t

d(ON)

Rise Time t Turn-Off Delay Time t

d(OFF)

Fall Time t Turn-Off Time t Total Gate Charge Q

g(TOT)

Gate Charge at -10V Q Threshold Gate Charge Q Input Capacitance C Output Capacitance C Reverse Transfer Capacitance C Thermal Resistance Junction to Case R Thermal Resistance Junction to Ambient R

DSS

GSS

OFF

g(-10) g(TH)

ISS OSS RSS

θJC

θJA

ID = 250µA, VGS = 0V -60 - - V VGS = VDS, ID = 250µA -2--4V VDS = -60V,

VGS = 0V

TC = 25oC---1µA

= 150oC - - -50 µA

VGS = ±20V - - 100 nA

= 60A, VGS = -10V - - 0.030 W

VDD = -30V, ID = 30A, RL = 1.0Ω, VGS = -10V, RGS = 2.5Ω

- - 125 ns

-20- ns

-60- ns

-65- ns

-20- ns

- - 125 ns VGS = 0 to -20V VDD = -48V, VGS = 0 to -10V - - 225 nC

ID = 60A, RL = 0.8Ω

- - 450 nC

VGS = 0 to -2V - - 15 nC VDS = -25V, VGS = 0V,

f = 1MHz

- 7200 - pF

- 1700 - pF

- 325 - pF

- - 0.70

C/W

--80oC/W

Source to Drain Diode Speciﬁcations

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Source to Drain Diode Voltage V Diode Reverse Recovery Time t

NOTES:

2. Pulse test: pulse width ≤ 300µs maximum, duty cycle ≤ 2%.

3. Repetitive rating: pulse width limited by maximum junction temperature. See Transient Thermal Impedance curve (Figure 3).

4-155

ISD = 45A - - 1.5 V ISD = 45A, dISD/dt = 100A/µs - - 125 ns

Page 3

RFG60P06E

Typical Performance Curves

Unless Otherwise Speciﬁed

1.2

1.0

0.8

0.6

0.4

0.2

POWER DISSIPATION MULTIPLIER

0 25 50 75 100 125 150 175

TC, CASE TEMPERATURE (oC)

FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE

TEMPERATURE

0.5

-70

-60

-50

-40

-30

-20

, DRAIN CURRENT (A)

-10

25 50 75 100 125 150 175

TC, CASE TEMPERATURE (oC)

FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs

CASE TEMPERATURE

0.2

0.1

NORMALIZED

θJC,

THERMAL IMPEDANCE

0.05

0.02

0.01

SINGLE PULSE

0.01

-5

-4

FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE

-500

-100

-10

, DRAIN CURRENT (A) I

OPERATION IN THIS AREA MAY BE

LIMITED BY r TC = 25oC

-1

-1 -10 -60

DS(ON)

MAX = -60V

DSS

, DRAIN TO SOURCE VOLTAGE (V)

-3

-2

t, RECTANGULAR PULSE DURATION (s)

-10

100µs

1ms

10ms

100ms

, PEAK CURRENT (A)

-100

TRANSCONDUCTANCE

MAY LIMIT CURRENT IN THIS REGION

-50

-5

-1

VGS = -10V

-4

NOTES: DUTY FACTOR: D = t PEAK TJ = PDM x Z

1/t2

x R

θJC

FOR TEMPERATURES ABOVE 25oC DERATE PEAK CURRENT CAPABILITY AS FOLLOWS:

175 TC–



----------------------- -



150



-3

-2

-1

t, PULSE WIDTH (ms)

+ T

TC = 25oC

FIGURE 4. FORWARD BIAS SAFE OPERATING AREA FIGURE 5. PEAK CURRENT CAPABILITY

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Page 4

RFG60P06E

Typical Performance Curves

-200

-100

STARTING TJ = 150oC

If R = 0

= (L) (IAS) / (1.3RATED BV

, AVALANCHE CURRENT (A)

If R ≠ 0

= (L/R) ln [(IAS*R) / (1.3 RATED BV

-10

0.01 0.1 1 10 t

, TIME IN AVALANCHE (ms)

DSS

Unless Otherwise Speciﬁed (Continued)

STARTING TJ = 25oC

- VDD)

- VDD) + 1]

DSS

-120

-90

-60

, DRAIN CURRENT (A)

-30

VGS = -20V

VGS = -10V

0-2-4-6-8

VDS, DRAIN TO SOURCE VOLTAGE (V)

VGS = -8V

PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX TC = 25oC

VGS = -4.5V

FIGURE 6. UNCLAMPED INDUCTIVE SWITCHING FIGURE 7. SATURATION CHARACTERISTICS

-120

-90

= -15V

PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX

-55oC

175oC

25oC

2.0

PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX VGS= -10V, ID = -60A

1.5

VGS = -7V

VGS = -6V

VGS = -5V

-60

-30

, ON STATE DRAIN CURRENT (A)

D(ON)

-2 -4 -6 -8 -10 V

, GATE TO SOURCE VOLTAGE (V)

FIGURE 8. TRANSFER CHARACTERISTICS FIGURE 9. NORMALIZED DRAIN TO SOURCE ON

2.0 VGS = VDS, ID = - 250µA

1.5

1.0

NORMALIZED GATE

0.5

THRESHOLD VOLTAGE

-80 -40 0 40 80 160120 200 TJ, JUNCTION TEMPERATURE (oC)

1.0

0.5

NORMALIZED ON RESISTANCE

-80 -40 0 40 80 120 160 200 , JUNCTION TEMPERATURE (oC)

RESISTANCE vs JUNCTION TEMPERATURE

2.0 ID = -250µA

1.5

1.0

0.5

BREAKDOWN VOLTAGE

NORMALIZED DRAIN TO SOURCE

-80 -40 0 40 80 120 160 200 TJ, JUNCTION TEMPERATURE (oC)

FIGURE 10. NORMALIZED GATE THRESHOLD VOLTAGE vs

JUNCTION TEMPERATURE

4-157

FIGURE 11. NORMALIZED DRAIN TO SOURCE BREAKDOWN

VOLTAGE vs JUNCTION TEMPERATURE

Page 5

RFG60P06E

Typical Performance Curves

8000

VGS = 0V, f = 1MHz

6000

4000

2000

C, CAPACITANCE (pF)

-5 -10 -15 -20 -25

VDS, DRAIN TO SOURCE VOLTAGE(V)

Unless Otherwise Speciﬁed (Continued)

ISS

VGS = 0V, f = 1MHz C

= CGS + C C C

ISS RSS OSS

= C

≈ C

+ C

OSS

RSS

-60

-45

-30

-15

, DRAIN TO SOURCE VOLTAGE (V)

VDD = BV

DSS

VDD = BV

DSS

RL = 1.0Ω

= -4mA

G(REF)

= -10V

DSS DSS DSS

0.75 BV

0.50 BV

0.25 BV

DSS DSS DSS

G(REF)

G(ACT)

0.75 BV

0.50 BV

0.25 BV

G(REF)

G(ACT)

t, TIME (µs)

FIGURE 12. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE NOTE: Refer to Intersil Application Notes AN7254 and AN7260.

FIGURE 13. NORMALIZED SWITCHING WAVEFORMS FOR

CONSTANT GATE CURRENT

Test Circuits and Waveforms

-10

-7.5

-5.0

-2.5

, GATE TO SOURCE VOLTAGE (V)

VARY t

TO OBTAIN

REQUIRED PEAK I

0V V

DUT

0.01Ω

DSS

FIGURE 14. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 15. UNCLAMPED ENERGY WAVEFORMS

d(ON)

10%

90%

10%

DUT

50%

PULSE WIDTH

d(OFF)

90%

OFF

50%

90%

10%

FIGURE 16. SWITCHING TIME TEST CIRCUIT FIGURE 17. RESISTIVE SWITCHING WAVEFORMS

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Page 6

RFG60P06E

Test Circuits and Waveforms

g(REF)

FIGURE 18. GATE CHARGE TEST CIRCUIT

(Continued)

DUT

g(TH)

g(-10)

g(TOT)

VGS= -2V

G(REF)

-V

VGS= -10V

VGS= -20V

FIGURE 19. GATE CHARGE WAVEFORMS

4-159

Page 7

PSPICE Electrical Model

.SUBCKT RFG60P06E 2 1 3; REV 9/20/94

CA 12 8 1.01e-8 CB 15 14 1.05e-8 CIN 6 8 6.9e-9

DBODY 5 7 DBDMOD DBREAK 7 11 DBKMOD DPLCAP 10 6 DPLCAPMOD

EBREAK 5 11 17 18 -76.35 EDS 14 8 5 8 1 EGS 13 8 6 8 1 ESG 5 10 8 6 1 EVTO 20 6 8 18 1

IT 8 17 1

LDRAIN 2 5 1e-9 LGATE 1 9 7.9e-9 LSOURCE 3 7 4.18e-9

MOS1 16 6 8 8 MOSMOD M=0.99 MOS2 16 21 8 8 MOSMOD M=0.01

RBREAK 17 18 RBKMOD 1 RDRAIN 5 16 RDSMOD 12.83e-3 RGATE 9 20 1.5 RIN 6 8 1e9 RSOURCE 8 7 RDSMOD 3.25e-3 RVTO 18 19 RVTOMOD 1

GATE

LGATE

RFG60P06E

DPLCAP

RGATE

EVTO

2091

S1A S2A

12 15

ESG

VTO

RIN CIN

14 13

S2BS1B

CBCA

EDSEGS

RDRAIN

EBREAK

MOS2

DBREAK

RSOURCE

16 +

MOS1

5 8

+ 17 18

RBREAK

DRAIN

LDRAIN

DBODY

LSOURCE

SOURCE

1817

RVTO

VBAT

S1A 6 12 13 8 S1AMOD S1B 13 12 13 8 S1BMOD S2A 6 15 14 13 S2AMOD S2B 13 15 14 13 S2BMOD

VBAT 8 19 DC 1 VTO 21 6 -0.83

.MODEL DBDMOD D (IS=1.24e-12 RS=4.72e-3 TRS1=1.43e-3 TRS2=-4.91e-7 CJO=6.98e-9 TT=1.5e-7) .MODEL DBKMOD D (RS=1.11e-1 TRS1=1.34e-3 TRS2=4.46e-12) .MODEL DPLCAPMOD D (CJO=15e-10 IS=1e-30 N=10) .MODEL MOSMOD PMOS (VTO=-3.71 KP=31.5 IS=1e-30 N=10 TOX=1 L=1u W=1u) .MODEL RBKMOD RES (TC1=9.42e-4 TC2=0) .MODEL RDSMOD RES (TC1=5.85e-3 TC2=7.69e-6) .MODEL RVTOMOD RES (TC1=-3.39e-3 TC2=1.07e-6) .MODEL S1AMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=4.6 VOFF=2.6) .MODEL S1BMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=2.6 VOFF=4.6) .MODEL S2AMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=1.16 VOFF=-3.84) .MODEL S2BMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-3.84 VOFF=1.16)

.ENDS NOTE: For further discussion of the PSPICE model, consult A New PSPICE Sub-Circuit for the Power MOSFET Featuring Global

Temperature Options; written by William J. Hepp and C. Frank Wheatley.

All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certiﬁcation.

Intersil semiconductor products are sold by description only .Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.

For information regarding Intersil Corporation and its products, see web site http://www.intersil.com

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