Page 1
NDS9410A
Single N-Channel Enhancement Mode Field Effect Transistor
NDS9410A
April 2000
General Description
This N-Channel Logic Level MOSFET is produced
using Fairchild Semiconductor’s advanced
PowerTrench process that has been especially tailored
to minimize the on-state resistance and yet maintain
superior switching performance.
These devices are particularly suited for low voltage
applications such as notebook computer power
management and other battery powered circuits where
fast switching, low in-line power loss and resistance to
Features
7.3 A, 30 V. R
•
High performance trench technology for extremely
•
low R
DS(ON)
High power and current handling capability in a
•
widely used surface mount package.
= 28 mΩ @ VGS = 10 V
DS(ON)
R
= 42 mΩ @ VGS = 4.5 V
DS(ON)
transients are needed.
D
D
D
D
G
S
SO-8
S
S
Absolute Maximum Ratings
TA=25oC unless otherwise noted
5
6
7
8
4
3
2
1
Symbol Parameter Ratings Units
V
DSS
V
GSS
I
D
P
D
TJ, T
STG
Drain-Source Voltage 30 V
Gate-Source Voltage
Drain Current – Continuous
(Note 1a)
20
±
7.3 A
– Pulsed 20
Power Dissipation for Single Operation
(Note 1a)
(Note 1b)
(Note 1c)
2.5
1.2
1.0
Operating and Storage Junction Temperature Range -55 to +150
V
W
C
°
Thermal Characteristics
R
JA
θ
R
JC
θ
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Case
(Note 1a)
(Note 1)
50
25
Package Marking and Ordering Information
Device Marking Device Reel Size Tape width Quantity
NDS9410A NDS9410A 13’’ 12mm 2500 units
2000 Fairchild Semiconductor Corporation
C/W
°
C/W
°
NDS9410A Rev B(W)
Page 2
NDS9410A
Electrical Characteristics
TA = 25°C unless otherwise noted
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BV
DSS
BV
∆
T
∆
I
DSS
I
GSSF
I
GSSR
On Characteristics
V
GS(th)
GS(th)
V
∆
T
∆
R
DS(on)
I
D(on)
g
FS
Drain–Source Breakdown Voltage
DSS
Breakdown Voltage Temperature
Coefficient
J
V
= 0 V, ID = 250 µA
GS
I
= 250 µA, Referenced to 25°C
D
30 V
28
Zero Gate Voltage Drain Current VDS = 24 V, VGS = 0 V 2
Gate–Body Leakage, Forward VGS = 20 V, VDS = 0 V 100 nA
Gate–Body Leakage, Reverse VGS = –20 V VDS = 0 V –100 nA
(Note 2)
Gate Threshold Voltage
Gate Threshold Voltage
Temperature Coefficient
J
Static Drain–Source
On–Resistance
V
= VGS, ID = 250 µA
DS
I
= 250 µA, Referenced to 25°C
D
VGS = 10 V, ID = 7.3 A
= 10 V, ID = 7.3 A, TJ=125°C
V
GS
= 4.5 V, ID = 6.3 A
V
GS
= 4.5 V, ID = 6.3 A, TJ=125°C
V
GS
11.63 V
-4.3
19
30
25
42
On–State Drain Current VGS = 10 V, VDS = 5 V 20 A
Forward Transconductance VDS = 15 V, ID = 7.3 A 22 S
mV/°C
mV/°C
28
45
42
75
Dynamic Characteristics
C
iss
C
oss
C
rss
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Q
g
Q
gs
Q
gd
Input Capacitance 830 pF
Output Capacitance 185 pF
Reverse Transfer Capacitance
(Note 2)
Turn–On Delay Time 6 12 ns
Turn–On Rise Time 10 20 ns
= 15 V, V
V
DS
f = 1.0 MHz
V
= 25 V, ID = 1 A,
DD
= 10 V, R
V
GS
GS
GEN
= 0 V,
= 6
80 pF
Ω
Turn–Off Delay Time 18 32 ns
Turn–Off Fall Time
V
= 15 V, ID = 2 A,
Total Gate Charge 14 22 nC
Gate–Source Charge 2.7 nC
V
DS
= 10 V
GS
Gate–Drain Charge
510ns
3.0 nC
Drain–Source Diode Characteristics and Maximum Ratings
I
S
V
SD
Notes:
R
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
1.
JA
θ
the drain pins. R
Maximum Continuous Drain–Source Diode Forward Current 2.2 A
Drain–Source Diode Forward
Voltage
is guaranteed by design while R
JC
θ
V
= 0 V, IS = 2.2 A
GS
is determined by the user's board design.
CA
θ
(Note 2)
0.78 1.1 V
A
µ
m
Ω
a) 50°/W when
mounted on a 1in
pad of 2 oz copper
Scale 1 : 1 on letter size paper
Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
2.
2
b) 105°/W when
mounted on a .04 in
pad of 2 oz copper
2
c) 125°/W when mounted on a
minimum pad.
NDS9410A Rev B(W)
Page 3
Typical Characteristics
NDS9410A
30
VGS = 10V
25
6.0V
5.0V
20
4.5V
15
10
5
0
00.511.522.5
4.0V
3.5V
3.0V
2.5V
V
, DRAIN-SOURCE VOLTAGE (V)
DS
2.5
VGS = 3.0V
2
3.5V
1.5
1
0.5
0 5 10 15 20 25 30
4.0V
4.5V
, DRAIN CURRENT (A)
I
D
5.0V
6.0V
10V
Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
1.8
ID = 7.3A
1.6
VGS = 10V
1.4
1.2
1
0.8
0.6
0.4
-50 -25 0 25 50 75 100 125 150
T
, JUNCTION TEMPERATURE (oC)
J
0.1
0.08
0.06
0.04
TA = 25oC
0.02
0
246810
TA = 125oC
, GATE TO SOURCE VOLTAGE (V)
V
GS
ID = 7.3 A
Figure 3. On-Resistance Variation with
Temperature.
30
VDS = 5V
25
20
15
10
5
0
0.5 1.5 2.5 3.5 4.5
V
, GATE TO SOURCE VOLTAGE (V)
GS
TA = -55oC
o
o
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
100
VGS = 0V
10
1
0.1
0.01
0.001
0.0001
0 0.2 0.4 0.6 0.8 1 1.2 1.4
TA = 125oC
o
25
-55oC
V
, BODY DIODE FORWARD VOLTAGE (V)
SD
Figure 5. Transfer Characteristics. Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature.
NDS9410A Rev B(W)
Page 4
Typical Characteristics
µ
NDS9410A
10
ID = 7.3A VDS = 5V
8
6
4
2
0
03691215
, GATE CHARGE (nC)
Q
g
10V
15V
1500
1200
C
900
600
300
0
0 5 10 15 20 25 30
ISS
C
OSS
C
RSS
, DRAIN TO SOURCE VOLTAGE (V)
V
DS
Figure 7. Gate Charge Characteristics. Figure 8. Capacitance Characteristics.
100
R
LIMIT
DS(ON)
10
1
0.1
VGS = 10V
SINGLE PULSE
0.01
0.001
= 125oC/W
R
θ
JA
= 25oC
T
A
0.1 1 10 100
, DRAIN-SOURCE VOLTAGE (V)
V
DS
10s
DC
1ms
10ms
1s
50
SINGLE PULSE
= 125oC/W
R
θ
40
30
20
10
0
0.001 0.01 0.1 1 10 100
, TIME (SEC)
t
1
JA
T
= 25oC
A
f = 1MHz
V
= 0 V
GS
Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum
Power Dissipation.
1
0.1
0.01
D = 0.5
0.2
0.1
0.05
0.02
0.01
SINGLE PULSE
R
(t) = r(t) + R
θ
JA
R
= 125 °C/W
θ
JA
t
1
t
T
- TA = P * R
J
2
Duty Cycle, D = t
0.001
0.0001 0.001 0.01 0.1 1 10 100 1000
, TIME (sec)
t
1
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1c.
Transient thermal response will change depending on the circuit board design.
NDS9410A Rev B(W)
θ
JA
(t)
θ
JA
/ t
1
2
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SO-8 Tape and Reel Data and Package Dimensions
SOIC(8lds) Packaging
Configuration: Figure 1.0
ELECTROSTATIC
SENSITIVE DEVICES
DO NOT SHIP OR STORE NEAR STRONG ELECTROSTATIC
ELECTROMAGNETIC, MAGNETIC OR RADIOACTIVE FIELDS
TNR DATE
PT NUMBER
PEEL STRENGTH MIN ______________gms
Customized
Label
Packaging Option
Packaging type
Qty per Reel/Tube/Bag
Reel Size
Box Dimension (mm)
Max qty per Box
Weight per unit (gm)
Weight per Reel (kg)
Note/Comments
MAX _____________ gms
ESD Label
SOIC (8lds) Packaging Information
Standard
(no flow code)
2,500 95 4,000
13" Dia
343x64x343 530x130x83 343x64x343
5,000 30,000 8,000
0.0774 0.0774 0.0774 0.0774
0.6060 - 0.9696 0.1182
TNR
L86Z F011
Rail/Tube-TNR
13" Dia
Embossed Car rier Tape
Antistatic Cover Tape
Static Dissipative
F63TNR
Label
D84Z
TNR
500
7" Dia
184x18 7x47
1,000
F
NDS
9959
9959
852
SOIC-8 Unit Orientation
343mm x 342mm x 64mm
Stand a r d In t e rm ed iate bo x
Packaging Description:
SOIC-8 parts are shipped in tape. The carrier tape is
made from a dissipative (carbon filled) polycarbonate
resin. The cover tape is a multilayer film (Heat Activated
Adhesive in nature) primarily composed of polyester film,
adhesive layer, sealant, and anti-static sprayed agent.
These reeled parts in standard option are shipped with
2,500 uni t s pe r 13" o r 33 0c m d ia met er reel . Th e reel s ar e
dark blue in color and is made of polystyrene plastic (antistatic coated). Other option comes in 500 units per 7" or
177cm di ameter reel. This and some o ther options are
further described in the Packaging Information table.
These full reels are individually barcode labeled and
placed inside a standard intermediate box (illustrated in
figure 1.0) made of recyclable corrugated brown paper.
One box contains two reels maximum. And these boxes
are placed inside a barcode labeled shipping box which
comes in di ff ere nt siz es depe nd in g on th e num be r of pa rts
shippe d.
F
NDS
9959
F
NDS
9959
F
NDS
852
852
852
F
NDS
9959
852
Pin 1
F63TNR Label sample
LOT: CBVK741B019
FSID: FDS99 53A
D/C1: D9842 QTY1: SPEC REV:
D/C2: QTY2: CPN:
QTY: 2500
SPEC:
N/F: F (F63TNR)3
SOIC(8lds) Tape Leader and Trailer
Configuration: Figure 2.0
Carrier Tape
Cover Tape
Trailer Tape
640mm minimum or
80 empty pockets
F63TNLab el
ESD Label
Components
ESD Label
F63TNLabel
Leader Tape
1680mm minimum or
210 empty pockets
July 1999, Rev. B
Page 6
SO-8 Tape and Reel Data and Package Dimensions, continued
SOIC(8lds) Embossed Carrier Tape
Configuration: Figure 3.0
T
K0
Wc
B0
P0
D0
E1
F
W
E2
Tc
A0
D1
P1
User Direction of Feed
Dimensions are in millimeter
Pkg type
SOIC
(12mm)
Notes: A0, B0, and K0 dimensions are determined with respect to the EIA/Jedec RS-481
SOIC(8lds) Reel Configuration: Figure 4.0
A0 B0 W D0 D1 E1 E2 F P1 P0 K0 T Wc Tc
(8lds)
6.50
5.30
12.0
1.55
1.60
1.75
10.25
+/-0.10
+/-0.10
+/-0.3
+/-0.05
+/-0.10
+/-0.10
rotational and lateral movement requirements (see sketches A, B, and C).
B0
20 deg maximum component rotation
Sketch A (Side or Front Sectional View)
Component Rotation
5.50
min
+/-0.05
20 deg maximum
A0
Sketch B (Top View)
Component Rotation
W1 Measured at Hub
8.0
+/-0.1
Typical
component
cavity
center line
Typical
component
center line
Dim A
Max
4.0
+/-0.1
0.450
2.1
+/-0.10
0.5mm
maximum
Sketch C (Top View)
Component lateral movement
+/-
0.150
9.2
+/-0.3
0.5mm
maximum
0.06
+/-0.02
Dim A
max
Tape Size
12mm 7" Dia
12mm 13" D ia
1998 Fairchild Semiconductor Corporation
Reel
Option
Dim N
Diameter Option
7"
See detail AA
B Min
Dim C
13" Diameter Option
See detail AA
W2 max Measured at Hub
Dim D
W3
min
DETAIL AA
Dimensions are in inches and millimeters
Dim A Dim B Dim C Dim D Dim N Dim W1 Dim W2 Dim W3 (LSL-USL)
7.00
0.059
177.8
13.00
330
1.5
0.059
1.5
512 +0.020/ -0.008
13 +0.5/-0.2
512 +0.020/ -0.008
13 +0.5/-0.2
0.795
2.165550.488 +0.078/-0.000
20.2
0.795
7.00
20.2
178
12.4 +2/0
0.488 +0.078/-0.000
12.4 +2/0
0.724
18.4
0.724
18.4
0.469 – 0.606
11.9 – 15.4
0.469 – 0.606
11.9 – 15.4
July 1999, Rev. B
Page 7
SO-8 Tape and Reel Data and Package Dimensions, continued
SOIC-8 (FS PKG Code S1)
1 : 1
Scale 1:1 on letter size paper
Dimensions s hown below are in:
inches [millimeters]
Part Weight per unit (gram): 0.0774
9
September 1998, Rev. A
Page 8
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx™
Bottomless™
CoolFET™
CROSSVOLT™
2
E
CMOS
TM
FACT™
FACT Quiet Series™
FAST
FASTr™
GTO™
HiSeC™
ISOPLANAR™
MICROWIRE™
POP™
PowerTrench
QFET™
QS™
Quiet Series™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
SyncFET™
TinyLogic™
UHC™
VCX™
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
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FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
PRODUCT STA TUS DEFINITIONS
Definition of Terms
Datasheet Identification Product Status Definition
Advance Information
Preliminary
No Identification Needed
Obsolete
Formative or
In Design
First Production
Full Production
Not In Production
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. E
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