Page 1
NDS9952A
Dual N & P-Channel Enhancement Mode Field Effect Transistor
General Description Features
February 1996
These dual N- and P-channel enhancement mode power
field effect transistors are produced using Fairchild's
proprietary, high cell density, DMOS technology. This
very high density process is especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulses in the
avalanche and commutation modes. These devices are
particularly suited for low voltage applications such as
notebook computer power management and other
N-Channel 3.7A, 30V, R
P-Channel -2.9A, -30V, R
High density cell design or extremely low R
=0.08Ω @ V
DS(ON)
=0.13Ω @ V
DS(ON)
=10V.
GS
=-10V.
GS
.
DS(ON)
High power and current handling capability in a widely used
surface mount package.
Dual (N & P-Channel) MOSFET in surface mount package.
battery powered circuits where fast switching, low in-line
power loss, and resistance to transients are needed.
________________________________________________________________________________
5
6
7
8
4
3
2
1
Absolute Maximum Ratings T
= 25°C unless otherwise noted
A
Symbol Parameter N-Channel P-Channel Units
V
DSS
V
GSS
I
D
Drain-Source Voltage 30 -30 V
Gate-Source Voltage ± 20 ± 20 V
Drain Current - Continuous (Note 1a) ± 3.7 ± 2.9 A
- Pulsed ± 15 ± 10
P
D
Power Dissipation for Dual Operation 2 W
Power Dissipation for Single Operation (Note 1a) 1.6
(Note 1b) 1
(Note 1c) 0.9
TJ,T
Operating and Storage Temperature Range -55 to 150 °C
STG
THERMAL CHARACTERISTICS
R
θ
R
θ
© 1997 Fairchild Semiconductor Corporation
Thermal Resistance, Junction-to-Ambient (Note 1a) 78 °C/W
JA
Thermal Resistance, Junction-to-Case (Note 1) 40 °C/W
JC
NDS9952A.SAM
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Electrical Characteristics (T
= 25°C unless otherwise noted)
A
Symbol Parameter Conditions Type Min Typ Max Units
OFF CHARACTERISTICS
BV
I
DSS
DSS
Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 µA N-Ch 30 V
VGS = 0 V, ID = -250 µA
Zero Gate Voltage Drain Current VDS = 24 V, V
= 0 V N-Ch 2 µA
GS
P-Ch -30 V
TJ = 55°C 25 µA
P-Ch -2 µA
TJ = 55°C
-25 µA
All -100 nA
I
GSSF
I
GSSR
VDS = -24 V, V
GS
= 0 V
Gate - Body Leakage, Forward VGS = 20 V, VDS = 0 V All 100 nA
Gate - Body Leakage, Reverse
VGS = -20 V, VDS= 0 V
ON CHARACTERISTICS (Note 2)
V
GS(th)
Gate Threshold Voltage VDS = VGS, ID = 250 µA N-Ch 1 1.7 2.8 V
TJ = 125°C 0.7 1.2 2.2
P-Ch -1 -1.6 -2.8
-0.85 -1.25 -2.5
N-Ch 0.06 0.08
0.08 0.13
0.08 0.11
R
DS(ON)
Static Drain-Source On-Resistance
VDS = VGS, ID = -250 µA
TJ = 125°C
VGS = 10 V, ID = 1.0 A
TJ = 125°C
VGS = 4.5 V, ID = 0.5 A
TJ = 125°C 0.11 0.18
VGS = -10 V, ID = -1.0 A
TJ = 125°C
P-Ch 0.11 0.13
0.15 0.21
VGS = -4.5 V, ID = -0.5 A 0.17 0.2
TJ = 125°C 0.24 0.32
I
D(on)
On-State Drain Current
VGS = 10 V, VDS = 5 V
N-Ch 15 A
VGS = -10 V, VDS = -5 V P-Ch -10
g
FS
Forward Transconductance
VDS = 15 V, ID = 3.7 A
N-Ch 6 S
VDS = -15 V, ID = -2.9 A P-Ch 4
DYNAMIC CHARACTERISTICS
C
iss
Input Capacitance N-Channel
VDS = 10 V, VGS = 0 V,
f = 1.0 MHz
C
oss
C
rss
Output Capacitance N-Ch 225 pF
P-Channel
Reverse Transfer Capacitance N-Ch 85 pF
VDS = -10 V, VGS = 0 V,
f = 1.0 MHz
N-Ch 320 pF
P-Ch 350
P-Ch 260
P-Ch 100
Ω
NDS9952A.SAM
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Electrical Characteristics (T
= 25°C unless otherwise noted)
A
Symbol Parameter Conditions Type Min Typ Max Units
SWITCHING CHARACTERISTICS (Note 2)
t
t
t
t
D(on)
r
D(off)
f
Turn - On Delay Time N-Channel
VDD = 10 V, ID = 1 A,
V
= 10 V, R
Turn - On Rise Time N-Ch 13 20 ns
GEN
GEN
= 6 Ω
P-Channel
Turn - Off Delay Time N-Ch 21 50 ns
VDD = -10 V, ID = -1 A,
V
= -10 V, R
GEN
GEN
= 6 Ω
N-Ch 10 15 ns
P-Ch 9 40
P-Ch 21 40
P-Ch 21 90
Turn - Off Fall Time N-Ch 5 50 ns
P-Ch 8 50
Q
g
Q
gs
Q
gd
Total Gate Charge N-Channel
VDS = 10 V,
ID = 3.7 A, VGS = 10 V
N-Ch 9.5 27 nC
P-Ch 10 25
Gate-Source Charge N-Ch 1.5 nC
P-Channel
Gate-Drain Charge N-Ch 3.3 nC
VDS = -10 V,
ID = -2.9 A, VGS = -10 V
P-Ch 1.6
P-Ch 3.4
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
I
S
Maximum Continuous Drain-Source Diode Forward Current N-Ch 1.2 A
P-Ch -1.2
V
SD
t
rr
Notes:
1. R
P
design while R
D
Typical R
Drain-Source Diode Forward
Voltage
VGS = 0 V, IS = 1.25 A
VGS = 0 V, IS = -1.25 A
(Note 2) N-Ch 0.8 1.3 V
(Note 2)
P-Ch -0.8 -1.3
Reverse Recovery Time VGS = 0 V, IF = 1.25 A, dIF/dt = 100 A/µs N-Ch 75 ns
VGS = 0 V, IF = -1.25 A, dIF/dt = 100 A/µs
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R
JA
θ
(t)
is determined by the user's board design.
CA
θ
T
=
R
θ
a. 78oC/W when mounted on a 0.5 in2 pad of 2oz cpper.
b. 125oC/W when mounted on a 0.02 in2 pad of 2oz cpper.
c. 135oC/W when mounted on a 0.003 in2 pad of 2oz cpper.
T
J−TA
=
(t)
R
θJ A
θJ C+RθCA
for single device operation using the board layouts shown below on 4.5"x5" FR-4 PCB in a still air environment:
JA
1a
J−TA
2
= I
(t) × R
DS(ON ) T
D
(t)
J
1b
P-Ch 100
1c
is guaranteed by
JC
θ
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%.
NDS9952A.SAM
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Typical Electrical Characteristics: N-Channel
20
15
10
5
D
I , DRAIN-SOURCE CURRENT (A)
0
0 1 2 3
V =10V
GS
8.0
6.0
V , DRAIN-SOURCE VOLTAGE (V)
DS
5.0
4.5
4.0
3.5
3.0
3
V = 3.5V
2.5
GS
4.0
2
1.5
DS(on)
R , NORMALIZED
1
DRAIN-SOURCE ON-RESISTANCE
0.5
0 3 6 9 12 15
I , DRAIN CURRENT (A)
D
4.5
Figure 1. N-Channel On-Region Characteristics. Figure 2. N-Channel On-Resistance Variation with
Gate Voltage and Drain Current.
1.6
I = 3.7A
1.4
1.2
DS(ON)
R , NORMALIZED
0.8
DRAIN-SOURCE ON-RESISTANCE
0.6
D
V = 10V
GS
1
-50 -25 0 25 50 75 100 125 150
T , JUNCTION TEMPERATURE (°C)
J
2
V = 10 V
GS
1.5
1
DS(on)
R , NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
0.5
0 3 6 9 12 15
I , DRAIN CURRENT (A)
D
T = 125°C
J
5.0
25°C
-55°C
6.0
8.0
10
Figure 3. N-Channel On-Resistance Variation with
Temperature.
10
V = 10V
DS
8
6
4
D
I , DRAIN CURRENT (A)
2
0
1 2 3 4 5
V , GATE TO SOURCE VOLTAGE (V)
GS
T = -55°C
J
125°C
Figure 5. N-Channel Transfer
Characteristics.
25°C
Figure 4. N-Channel On-Resistance Variation with
Drain Current and Temperature.
1.2
V = V
1.1
1
0.9
th
V , NORMALIZED
0.8
0.7
GATE-SOURCE THRESHOLD VOLTAGE
0.6
-50 -25 0 25 50 75 100 125 150
T , JUNCTION TEMPERATURE (°C)
J
DS GS
I = 250µA
D
Figure 6. N-Channel Gate Threshold Variation
with Temperature.
NDS9952A.SAM
Page 5
T , JUNCTION TEMPERATURE (°C)
Typical Electrical Characteristics: N-Channel (continued)
1.12
I = 250µA
D
1.08
1.04
1
DSS
BV , NORMALIZED
0.96
DRAIN-SOURCE BREAKDOWN VOLTAGE
0.92
-50 -25 0 25 50 75 100 125 150
J
Figure 7. N-Channel Breakdown Voltage Variation
with Temperature.
1000
800
500
300
200
CAPACITANCE (pF)
100
50
f = 1 MHz
V = 0V
GS
0.1 0.2 0.5 1 2 5 10 30
V , DRAIN TO SOURCE VOLTAGE (V)
DS
Figure 9. N-Channel Capacitance Characteristics.
10
V = 0V
GS
5
1
T = 125°C
0.5
0.1
0.01
S
I , REVERSE DRAIN CURRENT (A)
0.001
J
0.2 0.4 0.6 0.8 1 1.2 1.4
V , BODY DIODE FORWARD VOLTAGE (V)
SD
25°C
-55°C
Figure 8. N-Channel Body Diode Forward Voltage
Variation with Current and Temperature.
10
I = 3.7A
D
8
C
iss
C
oss
C
rss
6
4
2
GS
V , GATE-SOURCE VOLTAGE (V)
0
0 2 4 6 8 10 12
Q , GATE CHARGE (nC)
g
V = 10V
DS
20V
15V
Figure 10. N-Channel Gate Charge Characteristics.
10
V =10V
DS
8
6
4
2
FS
g , TRANSCONDUCTANCE (SIEMENS)
0
0 2 4 6 8 10
I , DRAIN CURRENT (A)
D
T = -55°C
Figure 11. N-Channel Transconductance Variation
with Drain Current and Temperature.
J
25°C
125°C
NDS9952A.SAM
Page 6
Typical Electrical Characteristics: P-Channel (continued)
-20
-15
-10
-5
D
I , DRAIN-SOURCE CURRENT (A)
0
V = -10V
GS
V , DRAIN-SOURCE VOLTAGE (V)
DS
-8.0
-7.0
-6.0
-5.5
-5.0
-4.5
-4.0
-3.5
-3.0
-5-4-3-2-10
3
V = -3.5V
GS
2.5
2
1.5
DS(on)
R , NORMALIZED
1
DRAIN-SOURCE ON-RESISTANCE
0.5
-4.0
-4.5
I , DRAIN CURRENT (A)
D
-5.0
-5.5
Figure 12. P-Channel On-Region Characteristics. Figure 13. P-Channel On-Resistance Variation with
Gate Voltage and Drain Current.
1.6
I = -2.9A
1.4
1.2
DS(ON)
R , NORMALIZED
0.8
DRAIN-SOURCE ON-RESISTANCE
0.6
D
V = -10V
GS
1
-50 -25 0 25 50 75 100 125 150
T , JUNCTION TEMPERATURE (°C)
J
2
V = -10V
GS
1.5
1
DS(on)
R , NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
0.5
T = 125°C
J
I , DRAIN CURRENT (A)
D
25°C
-6.0
-7.0
-8.0
-10
-55°C
-15-12-9-6-30
-15-12-9-6-30
Figure 14. P-Channel On-Resistance Variation with
Temperature.
-10
V = -10V
DS
-8
-6
-4
D
I , DRAIN CURRENT (A)
-2
0
V , GATE TO SOURCE VOLTAGE (V)
GS
T = -55°C
J
25°C
125°C
-6-5-4-3-2-1
Figure 15. P-Channel On-Resistance Variation with
Drain Current and Temperature.
1.2
1.1
1
0.9
th
V , NORMALIZED
0.8
GATE-SOURCE THRESHOLD VOLTAGE
0.7
-50 -25 0 25 50 75 100 125 150
T , JUNCTION TEMPERATURE (°C)
J
Figure 16. P-Channel Transfer Characteristics. Figure 17. P-Channel Gate Threshold Variation
with Temperature.
V = V
GS
DS
I = -250µA
D
NDS9952A.SAM
Page 7
Typical Electrical Characteristics: P-Channel (continued)
1.1
I = -250µA
D
1.08
1.06
1.04
1.02
DSS
1
BV , NORMALIZED
0.98
0.96
DRAIN-SOURCE BREAKDOWN VOLTAGE
0.94
-50 -25 0 25 50 75 100 125 150
T , JUNCTION TEMPERATURE (°C)
J
Figure 18. P-Channel Breakdown Voltage
Variation with Temperature.
1000
800
500
300
200
CAPACITANCE (pF)
100
f = 1 MHz
V = 0V
GS
50
0.1 0.2 0.5 1 2 5 10 30
-V , DRAIN TO SOURCE VOLTAGE (V)
DS
Figure 20. P-Channel Capacitance Characteristics.
10
V = 0V
5
GS
1
T = 125°C
0.5
0.1
0.01
S
-I , REVERSE DRAIN CURRENT (A)
0.001
J
25°C
-55°C
0.2 0.4 0.6 0.8 1 1.2 1.4
-V , BODY DIODE FORWARD VOLTAGE (V)
SD
Figure 19. P-Channel Body Diode Forward
Voltage Variation with Current and
Temperature.
10
I = -2.9A
D
8
C
iss
C
oss
C
rss
6
4
2
GS
-V , GATE-SOURCE VOLTAGE (V)
0
0 2 4 6 8 10 12
Q , GATE CHARGE (nC)
g
V = -10V
DS
-20V
-15V
Figure 21. P-Channel Gate Charge Characteristics.
6
V = -15V
DS
5
4
T = -55°C
J
25°C
125°C
3
2
1
FS
g , TRANSCONDUCTANCE (SIEMENS)
0
I , DRAIN CURRENT (A)
D
Figure 22. P-Channel Transconductance Variation
with Drain Current and Temperature.
-10-8-6-4-20
NDS9952A.SAM
Page 8
Typical Thermal Characteristics: N & P-Channel
2.5
2
1.5
1b
1
1c
0.5
STEADY-STATE POWER DISSIPATION (W)
0 0.2 0.4 0.6 0.8 1
2oz COPPER MOUNTING PAD AREA (in )
Total Power for Dual Operation
1a
Power for Single Operation
4.5"x5" FR-4 Board
T = 25 C
A
Still Air
o
2
Figure 23. SO-8 Dual Package Maximum
Steady-State Power Dissipation versus
Copper Mounting Pad Area.
5
4
3
1b
2
1c
D
I , STEADY-STATE DRAIN CURRENT (A)
1
0 0.1 0.2 0.3 0.4 0.5
2oz COPPER MOUNTING PAD AREA (in )
4.5"x5" FR-4 Board
o
T = 25 C
A
Still Air
V = -10V
GS
2
5
4
3
1b
1c
2
D
I , STEADY-STATE DRAIN CURRENT (A)
1
0 0.1 0.2 0.3 0.4 0.5
2oz COPPER MOUNTING PAD AREA (in )
4.5"x5" FR-4 Board
o
T = 25 C
A
Still Air
V = 10V
GS
2
1a
Figure 24. N-Ch Maximum Steady- State
Drain Current versus Copper Mounting
Pad Area.
30
10
3
RDS(ON) LIMIT
1
1a
0.3
0.1
D
I , DRAIN CURRENT (A)
0.03
0.01
V = 10V
GS
SINGLE PULSE
R = See Note 1c
JA
θ
T = 25°C
A
0.1 0.2 0.5 1 2 5 10 30 50
V , DRAIN-SOURCE VOLTAGE (V)
DS
DC
100us
1ms
10ms
100ms
1s
10s
Figure 25. P-Ch Maximum Steady- State
Drain Current versus Copper Mounting
Pad Area.
30
10
10s
DC
10ms
100ms
1s
3
RDS(ON) LIMIT
1
0.3
V = -10V
0.1
D
-I , DRAIN CURRENT (A)
0.03
0.01
0.1 0.2 0.5 1 2 5 10 30 50
GS
SINGLE PULSE
R = See Note 1c
JA
θ
T = 25°C
A
- V , DRAIN-SOURCE VOLTAGE (V)
DS
Figure 27. P-Channel Maximum Safe Operating
Area.
Figure 26. N-Channel Maximum Safe Operating
Area.
100us
1ms
NDS9952A.SAM
Page 9
Typical Thermal Characteristics: N & P-Channel
1
0.5
0.2
0.1
0.05
0.02
0.01
0.005
r(t), NORMALIZED EFFECTIVE
0.002
TRANSIENT THERMAL RESISTANCE
0.001
0.0001 0.001 0.01 0.1 1 10 100 300
D = 0.5
0.2
0.1
0.05
0.02
0.01
Single Pulse
t , TIME (sec)
1
Figure 28. Transient Thermal Response Curve.
Note: Thermal characterization performed using the conditions described in note 1c. Transient thermal response will change
depending on the circuit board design.
R (t) = r(t) * R
JA
θ
R = See Note 1c
JA
θ
P(pk)
t
1
t
2
T - T = P * R (t)
J
A
Duty Cycle, D = t / t
JA
θ
JA
θ
2
1
V
DD
t
d(on)
V
IN
V
GS
R
GEN
G
R
L
D
V
OUT
V
OUT
DUT
V
IN
S
t t
on off
r
90%
10%
50%
10%
t
d(off)
90%
10%
90%
50%
PULSE WIDTH
Figure 29. N or P-Channel Switching Test Circuit. Figure 30. N or P-Channel Switching Waveforms.
tt
f
NDS9952A.SAM
Page 10
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx™
Bottomless™
CoolFET™
CROSSVOLT™
2
E
CMOS
TM
FACT™
FACT Quiet Series™
FAST
FASTr™
GTO™
HiSeC™
ISOPLANAR™
MICROWIRE™
POP™
PowerTrench
QFET™
QS™
Quiet Series™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
SyncFET™
TinyLogic™
UHC™
VCX™
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
PRODUCT STA TUS DEFINITIONS
Definition of Terms
Datasheet Identification Product Status Definition
Advance Information
Preliminary
No Identification Needed
Obsolete
Formative or
In Design
First Production
Full Production
Not In Production
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. E
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