Page 1
NDS356P
P-Channel Logic Level Enhancement Mode Field Effect Transistor
General Description Features
March 1996
These P-Channel logic level enhancement mode power
field effect transistors are produced using Fairchild's
proprietary, high cell density, DMOS technology. This
very high density process is especially tailored to
minimize on-state resistance. These devices are
particularly suited for low voltage applications such as
notebook computer power management, portable
electronics, and other battery powered circuits where
fast high-side switching, and low in-line power loss are
needed in a very small outline surface mount package.
-1.1 A, -20V. R
= 0.3Ω @ VGS = -4.5V.
DS(ON)
Proprietary package design using copper lead frame for
superior thermal and electrical capabilities.
High density cell design for extremely low R
DS(ON)
.
Exceptional on-resistance and maximum DC current
capability.
Compact industry standard SOT-23 surface mount
package.
_______________________________________________________________________________
D
G
S
Absolute Maximum Ratings T
= 25°C unless otherwise noted
A
Symbol Parameter NDS356P Units
V
DSS
V
GSS
I
D
Drain-Source Voltage -20 V
Gate-Source Voltage - Continuous ± 12 V
Maximum Drain Current - Continuous (Note 1a) ±1.1 A
- Pulsed ±10
P
D
TJ,T
Maximum Power Dissipation (Note 1a) 0.5 W
(Note 1b)
Operating and Storage Temperature Range -55 to 150 °C
STG
0.46
THERMAL CHARACTERISTICS
R
JA
θ
R
JC
θ
© 1997 Fairchild Semiconductor Corporation
Thermal Resistance, Junction-to-Ambient
(Note 1a)
Thermal Resistance, Junction-to-Case (Note 1) 75 °C/W
250 °C/W
NDS356P Rev. E1
Page 2
Electrical Characteristics (T
= 25°C unless otherwise noted)
A
Symbol Parameter Conditions Min Typ Max Units
OFF CHARACTERISTICS
BV
I
DSS
I
GSSF
I
GSSR
DSS
Drain-Source Breakdown Voltage VGS = 0 V, ID = -250 µA -20 V
Zero Gate Voltage Drain Current
VDS = -16 V, V
GS
= 0 V
TJ =125°C
-5 µA
-20 µA
Gate - Body Leakage, Forward VGS = 12 V, VDS = 0 V 100 nA
Gate - Body Leakage, Reverse
VGS = -12 V, VDS = 0 V
-100 nA
ON CHARACTERISTICS (Note 2)
V
R
I
D(ON)
g
GS(th)
DS(ON)
FS
Gate Threshold Voltage VDS = VGS, ID = -250 µA -0.8 -1.6 -2.5 V
-0.5 -1.3 -2.2
0.3
0.4
0.21
-3 A
1.8 S
Static Drain-Source On-Resistance
On-State Drain Current
Forward Transconductance
TJ =125°C
VGS = -4.5 V, ID = -1.1 A
TJ =125°C
VGS = -10 V, ID = -1.3 A
VGS = -4.5 V, VDS = -5 V
VDS = -5 V, ID = -1.1 A
Ω
DYNAMIC CHARACTERISTICS
C
iss
C
oss
C
rss
Input Capacitance
Output Capacitance 255 pF
VDS = -10 V, VGS = 0 V,
f = 1.0 MHz
Reverse Transfer Capacitance 60 pF
180 pF
SWITCHING CHARACTERISTICS (Note 2)
t
t
t
t
Q
Q
Q
d(on)
r
d(off)
f
g
gs
gd
Turn - On Delay Time VDD = -10 V, ID = -1 A,
Turn - On Rise Time 17 30 ns
VGS = -10 V, R
GEN
= 50 Ω
7 15 ns
Turn - Off Delay Time 56 90 ns
Turn - Off Fall Time 41 80 ns
Total Gate Charge VDS = -10 V, ID = -1.1 A,
Gate-Source Charge 1.5 nC
VGS = -5 V
3.5 5 nC
Gate-Drain Charge 2 nC
NDS356P Rev. E1
Page 3
Electrical Characteristics (T
= 25°C unless otherwise noted)
A
Symbol Parameter Conditions Min Typ Max Units
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
I
S
I
SM
V
SD
Notes:
1. R
design while R
P
D
Typical R
a. 250
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%.
Maximum Continuous Drain-Source Diode Forward Current -0.6 A
Maximum Pulsed Drain-Source Diode Forward Current -4 A
Drain-Source Diode Forward Voltage VGS = 0 V, IS = -1.1 A (Note 2) -0.85 -1.2 V
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R
JA
θ
(t)
is determined by the user's board design.
CA
θ
T
=
R
θ
o
C/W when mounted on a 0.02 in2 pad of 2oz cpper.
b. 270oC/W when mounted on a 0.001 in2 pad of 2oz cpper.
Scale 1 : 1 on letter size paper
T
J−TA
=
(t )
R
θJ A
θ
J C
using the board layouts shown below on 4.5"x5" FR-4 PCB in a still air environment:
JA
1a
J−TA
+R
2
= I
(t ) × R
DS(ON ) T
D
(t )
θ
CA
J
1b
is guaranteed by
JC
θ
NDS356P Rev. E1
Page 4
Typical Electrical Characteristics
I , DRAIN CURRENT (A)
DRAIN-SOURCE ON-RESISTANCE
V , GATE TO SOURCE VOLTAGE (V)
I , DRAIN CURRENT (A)
-5
V = -10V
GS
-4
-3
-2
-6.0
-5.0
-4.5
-4.0
-3.5
-1
D
I , DRAIN-SOURCE CURRENT (A)
0
V , DRAIN-SOURCE VOLTAGE (V)
DS
-3.0
Figure 1. On-Region Characteristics Figure 2. On-Resistance Variation
1.3
I = -1.1 A
D
1.2
V = -4.5 V
GS
1.1
1
DS(ON)
R , NORMALIZED
0.9
DRAIN-SOURCE ON-RESISTANCE
0.8
-50 -25 0 25 50 75 100 125 150
T , JUNCTION TEMPERATURE (°C)
J
2
V = -3.5 V
GS
1.75
-4.0
1.5
1.25
1
DS(on)
R , NORMALIZED
0.75
DRAIN-SOURCE ON-RESISTANCE
-3 -2.5 -2 -1.5 -1 -0.5 0
0.5
I , DRAIN CURRENT (A)
D
-4.5
-5.0
-6.0
-10
-5 -4 -3 -2 -1 0
with Drain Current and Gate Voltage
3.5
V = 4.5V
GS
3
2.5
2
1.5
DS(on)
R , NORMALIZED
1
0.5
T = 125°C
J
D
25°C
-55°C
-6 -5 -4 -3 -2 -1 0
Figure 3. On-Resistance Variation
with Temperature
D
-10
-8
-6
-4
-2
0
V = 10V
DS
GS
T = -55°C
J
Figure 5. Transfer Characteristics
25
125
Figure 4. On-Resistance Variation
with Drain Current and Temperature
1.15
1.1
1.05
1
0.95
th
V , NORMALIZED
0.9
0.85
GATE-SOURCE THRESHOLD VOLTAGE (V)
-8 -6 -4 -2 0
0.8
-50 -25 0 25 50 75 100 125 150
T , JUNCTION TEMPERATURE (°C)
J
V = V
DS GS
I = -250µA
D
Figure 6. Gate Threshold Variation
with Temperature
NDS356P Rev. E1
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Typical Electrical Characteristics (continued)
1.08
I = -250µA
D
1.06
1.04
1.02
DSS
1
BV , NORMALIZED
0.98
0.96
DRAIN-SOURCE BREAKDOWN VOLTAGE (V)
-50 -25 0 25 50 75 100 125 150
T , JUNCTION TEMPERATURE (°C)
J
Figure 7. Breakdown Voltage Variation with
Temperature
700
500
300
200
100
CAPACITANCE (pF)
f = 1 MHz
50
V = 0 V
GS
30
0.1 0.2 0.5 1 2 5 10 20
-V , DRAIN TO SOURCE VOLTAGE (V)
DS
C
C
C
iss
oss
rss
10
V = 0V
GS
2
T = 125°C
J
1
0.5
0.2
0.1
0.01
S
-I , REVERSE DRAIN CURRENT (A)
0.001
25°C
-55°C
V , BODY DIODE FORWARD VOLTAGE (V)
SD
-1.8 -1.5 -1.2 -0.9 -0.6 -0.3
Figure 8. Body Diode Forward Voltage Variation with
Source Current and Temperature
-10
I = -1.1 A
D
-8
-6
-4
-2
GS
V , GATE-SOURCE VOLTAGE (V)
0
0 1 2 3 4 5 6 7
V = -5 V
DS
Q , GATE CHARGE (nC)
g
-10
Figure 9. Capacitance Characteristics
V
DD
V
IN
D
V
GS
R
GEN
G
S
Figure 11. Switching Test Circuit
Figure 10. Gate Charge Characteristics
t t
on off
t
R
d(on)
L
V
OUT
V
OUT
r
90%
10%
t
d(off)
90%
10%
t t
f
DUT
90%
V
IN
50%
50%
10%
PULSE WIDTH
INVERTED
Figure 12. Switching Waveforms
NDS356P Rev. E1
Page 6
I , DRAIN CURRENT (A)
g , TRANSCONDUCTANCE (SIEMENS)
Typical Electrical Characteristics (continued)
r(t), NORMALIZED EFFECTIVE
5
T = -55°C
4
3
J
25°C
125°C
2
1
V = -5V
FS
DS
0
D
Figure 13. Transconductance Variation with
-10 -8 -6 -4 -2 0
20
10
5
1
0.2
0.1
0.05
D
- I , DRAIN-SOURCE CURRENT (A)
0.02
0.01
0.1 0.2 0.5 1 2 5 10 20 30
RDS(ON) LIMIT
V = -10V
GS
SINGLE PULSE
T = 25°C
A
- V , DRAIN-SOURCE VOLTAGE (V)
DS
DC
100ms
1s
10s
1ms
10ms
Figure 14. Maximum Safe Operating Area
100us
Drain Current and Temperature
1
D = 0.5
0.5
0.2
0.2
0.1
0.1
0.05
0.05
0.02
0.02
0.01
0.01
0.005
0.002
TRANSIENT THERMAL RESISTANCE
0.001
0.0001 0.001 0.01 0.1 1 10 100 300
Single Pulse
t , TIME (sec)
1
R (t) = r(t) * R
JA
θ
R = 250 °C/W
JA
θ
P(pk)
t
1
t
2
T - T = P * R (t)
J
Duty Cycle, D = t /t
θ
A
JA
θ
1 2
JA
Figure 15. Transient Thermal Response Curve
Note : Characterization performed using the conditions described in note 1c. Transient thermal response will
change depending on the circuit board design.
NDS356P Rev. E1