Datasheet NDS336P Datasheet (Fairchild Semiconductor)

NDS336P
P-Channel Logic Level Enhancement Mode Field Effect Transistor

General Description Features

June 1997

SuperSOTTM-3 P-Channel logic level enhancement mode power
field effect transistors are produced using Fairchild's
proprietary, high cell density, DMOS technology. This very high
density process is especially tailored to minimize on-state
resistance. These devices are particularly suited for low voltage
applications such as notebook computer power management,
portable electronics, and other battery powered circuits where
fast high-side switching, and low in-line power loss are needed
in a very small outline surface mount package.

-1.2 A, -20 V, R
R

Very low level gate drive requirements allowing direct
operation in 3V circuits. V

Proprietary package design using copper lead frame for
superior thermal and electrical capabilities.

High density cell design for extremely low R
Exceptional on-resistance and maximum DC current

capability.
Compact industry standard SOT-23 surface Mount

package.

= 0.27 Ω @ VGS= -2.7 V

DS(ON)

= 0.2 Ω @ V

DS(ON)

GS(th)

GS

< 1.0V.

= -4.5 V.

DS(ON)

.

________________________________________________________________________________

D

G

S

Absolute Maximum Ratings T

= 25°C unless otherwise noted

A

Symbol Parameter NDS336P Units

V

DSS

V

GSS

I

D

Drain-Source Voltage -20 V
Gate-Source Voltage - Continuous ±8 V
Maximum Drain Current - Continuous (Note 1a) -1.2 A

- Pulsed -10

P

D

TJ,T

Maximum Power Dissipation (Note 1a) 0.5 W

(Note 1b)

Operating and Storage Temperature Range -55 to 150 °C

STG

0.46

THERMAL CHARACTERISTICS

R

θJA

R

θJC

© 1997 Fairchild Semiconductor Corporation

Thermal Resistance, Junction-to-Ambient (Note 1a) 250 °C/W
Thermal Resistance, Junction-to-Case (Note 1) 75 °C/W

NDS336P Rev. E

Electrical Characteristics (T

= 25°C unless otherwise noted)

A

Symbol Parameter Conditions Min Typ Max Units
OFF CHARACTERISTICS

BV
I

DSS

I

GSS

I

GSS

DSS

Drain-Source Breakdown Voltage VGS = 0 V, ID = -250 µA -20 V
Zero Gate Voltage Drain Current

VDS = -16 V, V

GS

= 0 V

TJ =55°C

-1 µA

-10 µA
Gate - Body Leakage Current VGS = 8 V, VDS = 0 V 100 nA
Gate - Body Leakage Current

VGS = -8 V, VDS = 0 V

-100 nA

ON CHARACTERISTICS (Note 2)

V

R

I
g

GS(th)

DS(ON)

D(ON)

FS

Gate Threshold Voltage VDS = VGS, ID = -250 µA -0.5 -0.78 -1 V

TJ =125°C

-0.3 -0.58 -0.8

Static Drain-Source On-Resistance VGS = -2.7 V, ID = -1.2 A 0.22 0.27

0.34 0.49

0.16 0.2

-2 A

-3 S

On-State Drain Current
Forward Transconductance

VGS = -4.5 V, ID = -1.3 A
VGS = -2.7 V, VDS = -5 V
VDS = -5 V, I

= -1.2 A

D

TJ =125°C

Ω

DYNAMIC CHARACTERISTICS

C

iss

C

oss

C

rss

Input Capacitance
Output Capacitance 170 pF

VDS = -10 V, VGS = 0 V,
f = 1.0 MHz

Reverse Transfer Capacitance 60 pF

360 pF

SWITCHING CHARACTERISTICS (Note 2)

t
t
t
t
Q
Q
Q

D(on)

r

D(off)

f

g

gs

gd

Turn - On Delay Time VDD = -5 V, ID = -1 A,
Turn - On Rise Time 29 50 ns

VGS = -4.5 V, R

GEN

= 6 Ω

8 15 ns

Turn - Off Delay Time 33 60 ns
Turn - Off Fall Time 23 45 ns
Total Gate Charge VDS = -10 V, ID = -1.2 A,
Gate-Source Charge 0.7 nC

VGS = -4.5 V

5.7 8.5 nC

Gate-Drain Charge 1.8 nC

NDS336P Rev. E

Electrical Characteristics (T

TJ−

T

TJ−

T

= 25°C unless otherwise noted)

A

Symbol Parameter Conditions Min Typ Max Units
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS

I

S

I

SM

V

SD

Notes:

1. R

Typical R

design while R

P

Maximum Continuous Source Current -0.42 A
Maximum Pulsed Drain-Source Diode Forward Current -10 A
Drain-Source Diode Forward Voltage VGS = 0 V, IS = -0.42 (Note 2) -0.65 -1.2 V

is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solde mounting surface of the drain pins. R

JA

θ

D

is determined by the user's board design.

CA

θ

A

(t)

=

(t)

R

θ

JA

using the board layouts shown below on 4.5"x5" FR-4 PCB in a still air environment:

JA

θ

a. 250oC/W when mounted on a 0.02 in2 pad of 2oz copper.
b. 270oC/W when mounted on a 0.001 in2 pad of 2oz copper.

A

2

=

R

+R

θ

JC

(t)

= I

× R

DS(ON)@T

D

(t)

θ

CA

J

is guaranteed by

JC

θ

1a 1b

2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%.

Scale 1 : 1 on letter size paper

NDS336P Rev. E

Typical Electrical Characteristics

-10

V = -4.5V

GS

-8

-6

-4

-2

D

I , DRAIN-SOURCE CURRENT (A)

0

-4.0

V , DRAIN-SOURCE VOLTAGE (V)

DS

-3.5

-3.0

-2.7

-2.5

-2.0

-5-4-3-2-10

2

1.8

V =-2.0V

GS

1.6

1.4

1.2

1

DS(on)

R , NORMALIZED

0.8

DRAIN-SOURCE ON-RESISTANCE

0.6

-2.5

-2.7

I , DRAIN CURRENT (A)

D

Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation

with Drain Current and Gate Voltage.

1.6

I = -1.2A

D

1.4

V = -2.7V

GS

1.2

1

DS(ON)

R , NORMALIZED

0.8

DRAIN-SOURCE ON-RESISTANCE

0.6

-50 -25 0 25 50 75 100 125 150
T , JUNCTION TEMPERATURE (°C)

J

Figure 3. On-Resistance Variation

with Temperature.

2

V = -2.7V

GS

1.8

1.6

T = 125°C

J

1.4

1.2

1

DS(on)

R , NORMALIZED

0.8

DRAIN-SOURCE ON-RESISTANCE

0.6

Figure 4. On-Resistance Variation

with Drain Current and Temperature.

25°C

I , DRAIN CURRENT (A)

D

-3.0

-55°C

-3.5

-4.0

-4.5

-10-8-6-4-20

-10-8-6-4-20

-5

V = -5V

DS

-4

-3

-2

D

I , DRAIN CURRENT (A)

-1

0

V , GATE TO SOURCE VOLTAGE (V)

GS

Figure 5. Transfer Characteristics.

T = -55°C

J

-25°C

-125°C

1.2

1.1

1

0.9

0.8

GS(th)

V , NORMALIZED

0.7

GATE-SOURCE THRESHOLD VOLTAGE

-3-2.5-2-1.5-1-0.5

0.6

-50 -25 0 25 50 75 100 125 150
T , JUNCTION TEMPERATURE (°C)

J

V = V

DS

GS

I = -250µA

D

Figure 6. Gate Threshold Variation

with Temperature.

NDS336P Rev. D

Typical Electrical Characteristics (continued)

1.06

I = - 250µA

D

1.04

1.02

1

DSS

BV , NORMALIZED

0.98

DRAIN-SOURCE BREAKDOWN VOLTAGE

0.96

-50 -25 0 25 50 75 100 125 150
T , JUNCTION TEMPERATURE (°C)

J

Figure 7. Breakdown Voltage Variation with

Temperature.

800

500

300

200

100

CAPACITANCE (pF)

f = 1 MHz

60

V = 0V

GS

40

0.1 0.2 0.5 1 2 5 10 20

-V , DRAIN TO SOURCE VOLTAGE (V)

DS

C

C

C

iss

oss

rss

5

V = 0V

GS

1

T = 125°C

0.1

0.01

0.001

S

-I , REVERSE DRAIN CURRENT (A)

0.0001

0.2 0.4 0.6 0.8 1 1.2

J

25°C

-55°C

-V , BODY DIODE FORWARD VOLTAGE (V)

SD

Figure 8. Body Diode Forward Voltage Variation

with Source Current and
Temperature.

5

I = -1.2A

D

4

3

2

1

GS

-V , GATE-SOURCE VOLTAGE (V)
0

0 2 4 6 8

Q , GATE CHARGE (nC)

g

V = -5V

DS

-15V

-10V

Figure 9. Capacitance Characteristics.

V

V

IN

D

V

GS

R

GEN

G

S

Figure 11. Switching Test Circuit.

DD

Figure 10. Gate Charge Characteristics.

t t

on off

t

R

d(on)

L

V

OUT

V

OUT

r

90%

10%

DUT

t

d(off)

90%

10%

tt

f

90%

V

IN

50%

50%

10%

PULSE WIDTH

INVERTED

Figure 12. Switching Waveforms.

NDS336P Rev. D

Typical Electrical Characteristics (continued)

8

V = -5V

DS

6

4

2

FS

g , TRANSCONDUCTANCE (SIEMENS)

0

I , DRAIN CURRENT (A)

D

T = -55°C

J

-25°C

-125°C

Figure 13. Transconductance Variation with

Drain Current and Temperature.

1

0.8

0.6

1a

1b

0.4

0.2

0

STEADY-STATE POWER DISSIPATION (W)

0 0.1 0.2 0.3 0.4

2oz COPPER MOUNTING PAD AREA (in )

4.5"x5" FR-4 Board

o

T = 25 C

A

Still Air

2

20
10

5
2

RDS(ON) LIMIT

1

0.5

V = -2.7V

0.1

D

0.05

-I , DRAIN CURRENT (A)

-10-8-6-4-20

0.01

GS

SINGLE PULSE

R = See Note 1b

JA

θ

T = 25°C

A

0.1 0.2 0.5 1 2 5 10 20 30

-V , DRAIN-SOURCE VOLTAGE (V)

DS

DC

1s

100us

1ms

10ms

100ms

Figure 14. Maximum Safe Operating Area.

1.6

1.4

1a

1.2

1b

1

D

-I , STEADY-STATE DRAIN CURRENT (A)

0.8
0 0.1 0.2 0.3 0.4

2oz COPPER MOUNTING PAD AREA (in )

4.5"x5" FR-4 Board

o

T = 25 C

A

Still Air
V = -2.7V

GS

2

Figure 15. SuperSOT

TM _

3 Maximum

Steady-State Power Dissipation versus

Figure 16. Maximum Steady-State Drain

Current versus Copper Mounting Pad Area.

Copper Mounting Pad Area.

1

D = 0.5

0.5

R (t) = r(t) * R

JA

0.2

0.2

0.1

0.1

0.05

0.05

0.02

0.02

0.01

0.01

0.005

r(t), NORMALIZED EFFECTIVE

0.002

TRANSIENT THERMAL RESISTANCE

0.001

0.0001 0.001 0.01 0.1 1 10 100 300

Single Pulse

t , TIME (sec)

1

θ

R = See Note 1b

θJA

P(pk)

t

1

t

2

T - T = P * R (t)

J

A

Duty Cycle, D = t /t

Figure 17. Transient Thermal Response Curve.

Note : Characterization performed using the conditions described in note 1b. Transient thermal response will

change depending on the circuit board design.

JA

θ

θ

JA

1

2

NDS336P Rev. D