Datasheet MSC2313258D-70BS2, MSC2313258D-70DS2, MSC2313258D-60BS2, MSC2313258D-60DS2 Datasheet (OKI)

Semiconductor

MSC2313258D-xxBS2/DS2

1,048,576-word x 32-b i t DYNAMIC RAM MODULE : FAST PAGE MODE TYPE WITH EDO

This vers i on: Feb. 23. 199

9

DESCRIPTION

The MSC2313258D-xxBS2/DS2 is a fully decoded, 1,048,576-word x 32-bit CMOS dynamic random access
memor y modul e com posed of two 16Mb DRAM s in SO J packages m ounted with four decoupli ng capaci tors on a
72-pin glass epoxy single-inline package. This module supports any application where high density and large
capacity of storage memory are required.

FEATURES

· 1,048,576-word x 32- bit organization

· 72-pin socket insertable module
MSC2313258D-xxBS2 : Gold tab
MSC2313258D-xxDS2 : Solder t ab

· Singl e +5V supply ± 10% tolerance

· Input : TTL compatible

· Output : TTL compatible, 3-state

· Refresh : 1024cycles/16ms

· /CAS before /RAS refresh, hidden refr esh, /RAS only refresh capability

· Fast page mode c apability

PRODUCT FAMILY

Access Time (Max. ) Power Dissipation

Family

t

RAC

t

AA

t

CAC

Cycle

Time

(Min.)

Operating(Max.) Standby(Max.)

MSC2313258D-60BS2/DS2 60ns 30ns 15ns 104ns 1375mW
MSC2313258D-70BS2/DS2 70ns 35ns 20ns 124ns 1265mW

11mW

Semiconductor MSC2313258D

MODULE OUTLINE

1 72

R1.57

6.35

1.04Typ.1.27±0.1

95.25

2.03Typ.

6.35Typ.

Typ.

6.35

Typ.

10.16

(

3.18

19.0±0.2

101.19Typ.

107.95±0.2

*1

3.38Typ.

6.0Min.

5.28Max.

+0.1

-0.08

1.27

(Unit : mm )

MSC2313258D-xxBS2/DS2

*1 The common size difference of the board width 12.5mm of its height is specified as ±0.2.

The value above 12.5mm is specified as ±0.5.

Semiconductor MSC2313258D

PIN C ONFIGURATION

Pin No. Pin Name Pin No. Pin Nam e Pin No. Pin Nam e Pin No. Pin Nam e

1VSS19 NC 37 NC 55 DQ11
2 DQ0 20 DQ4 38 NC 56 DQ27
3 DQ16 21 DQ20 39 V

SS

57 DQ12
4 DQ1 22 DQ5 40 /CAS0 58 DQ28
5 DQ17 23 DQ21 41 /CAS2 59 V

CC

6 DQ2 24 DQ6 42 /CAS3 60 DQ29
7 DQ18 25 DQ22 43 /CAS1 61 DQ13
8 DQ3 26 DQ7 44 /RAS0 62 DQ30
9 DQ19 27 DQ23 45 NC 63 DQ14

10 V

CC

28 A7 46 NC 64 DQ31
11 NC 2 9 NC 4 7 /WE 65 DQ15
12 A0 30 V

CC

48 NC 66 NC
13 A1 31 A8 49 DQ 8 67 PD1
14 A2 32 A9 50 DQ24 68 PD2
15 A3 33 NC 51 DQ9 69 PD3
16 A4 34 /RAS2 52 DQ25 70 PD4
17 A5 35 NC 53 DQ10 71 NC
18 A6 36 NC 54 DQ26 72 V

SS

Presence Detect Pins

Pin No. Pin Name

MSC2313258D

-60BS2/DS2

MSC2313258D

-70BS2/DS2

67 PD1 V

SS

V

SS

68 PD2 V

SS

V

SS

69 PD3 NC V

SS

70 PD4 NC NC

Semiconductor MSC2313258D

BLOCK DIAGRAM

/WE

/CAS1

/CAS0

A0-A9

/CAS3

/CAS2

DQ0A0-A9 DQ1

DQ3

DQ2
DQ4

DQ5

/RAS

/LCAS

/UCAS

DQ6

DQ1
DQ2
DQ3

V

CC

V

SS

C1-C4

DQ8

V

SS

/WE

/OE

V

CC

DQ4
DQ5
DQ6
DQ7

DQ7

DQ8DQ9

DQ11

DQ10
DQ12

DQ13
DQ14

DQ9
DQ10
DQ11

DQ16

DQ12
DQ13
DQ14
DQ15

DQ15

/RAS0

/RAS2

DQ16A0-A9 DQ1

DQ3

DQ2
DQ4

DQ5

/RAS

/LCAS

/UCAS

DQ6

DQ17
DQ18
DQ19

DQ8

V

SS

/WE

/OE

V

CC

DQ20
DQ21
DQ22
DQ23

DQ7

DQ24DQ9

DQ11

DQ10
DQ12

DQ13
DQ14

DQ25
DQ26
DQ27

DQ16

DQ28
DQ29
DQ30
DQ31

DQ15

Semiconductor MSC2313258D

ELECTRICAL CHARACTERISTICS

Absolute Maximum Ratings

( Ta = 25°C )

Paramet er Symbol Rating Unit

Voltage on Any Pin Relative to V

SS

VIN, V

OUT

-1.0 to +7.0 V

Voltage on VCC Supply Relative to V

SS

V

CC

-1.0 to +7.0 V

Short Circuit Output Cur r ent I

OS

50 mA

Power Dissipation P

D

2W

Operating Temperature T

OPR

0 to +70 °C

Storage Temperature T

STG

-40 to +125 °C

Recommended Operating Conditions

( Ta = 0°C to +70°C )

Parameter Symbol Min. Typ. Max. Unit

V

CC

4.5 5.0 5.5 V

Power Supply Voltage

V

SS

000V

Input High Voltage V

IH

2.4 - 6.5 V

Input Low Voltage V

IL

-1.0 - 0.8 V

Capacitance

( VCC = 5V ± 10%, Ta = 25°C, f = 1 MHz )

Parameter Symbol Typ. Max. Unit

Input Capacitance (A0 - A9) C

IN1

-21pF

Input Capacitance (/WE) C

IN2

-20pF

Input Capacitance (/RAS0, /RAS2) C

IN3

-13pF

Input Capacitance (/CAS0- /CAS3) C

IN4

-13pF

I/O Capacitance (DQ0 - DQ31) C

DQ

-18pF

Note: Capacitance measured with Boonton Meter.

Semiconductor MSC2313258D

DC Characteristics

(VCC = 5V ± 10%, Ta = 0°C to +70°C )

MSC2313258D

-60BS2/DS2

MSC2313258D

-70BS2/DS2

Parameter

Symbo

l

Condition

Min. Max. Min. Max.

Unit Note

Input Leakage Current I

LI

0V ≤ VIN ≤ 6.5V:
All other pins not
under test = 0V

-20 20 -20 20 µA

Output Leakage Current I

LO

Data out is disabl e
0V ≤ V

OUT

≤ 5.5V

-10 10 -10 10 µA

Output High Voltage V

OH

IOH = -5.0mA 2.4 V

CC

2.4 V

CC

V

Output Low Voltage V

OL

IOL = 4.2mA 0 0.4 0 0.4 V

Average Power Supply Current
(Operating)

I

CC1

/RAS cycling,
/CAS cycling,
t

RC

= min.

- 250 - 230 mA 1, 2

TTL-4-4mA1

Power supply current
(Standby)

I

CC2

/RAS = V

IH

/CAS = V

IH

MOS - 2 - 2 mA 1

Average Power Supply Current
(/RAS only refresh)

I

CC3

/RAS cycling,
/CAS = V

IH

,

t

RC

= min.

- 250 - 230 mA 1, 2

Average Power Supply Current
(/CAS before /RAS refresh)

I

CC6

tRC = min. - 250 - 230 mA 1, 2

Average Power Supply Current
(Fast Page Mode)

I

CC7

/RAS = VIL,
/CAS cycling,
t

PC

= min.

- 250 - 230 mA 1, 3

Notes: 1. ICC is dependent on output loading and cycles rates. Specified values are obtained with the output open.

2. Address can be changed once or less while / RA S = V

IL

.

3. Address can be changed once or less while / CA S = V

IH

.

Semiconductor MSC2313258D

AC Characteristics (1/2)

(VCC = 5V ± 10%, Ta = 0°C to +70°C ) Note: 1, 2, 3

MSC2313258D

-60BS2/DS2

MSC2313258D

-70BS2/DS2

Parameter Symbol

Min. Max. Min. Max.

Unit Note

Random Read or Writ e Cycle Time t

RC

104 - 124 - ns

Fast Page Mode Cycle Time t

HPC

25 - 30 - ns

Access Time from /RAS t

RAC

- 60 - 70 ns 4, 5, 6

Access Time from /CAS t

CAC

- 15 - 20 ns 4, 5

Access Time from Column Address t

AA

- 30 - 35 ns 4, 6

Access Time from /CAS Precharge t

CPA

- 35 - 40 ns 4

Output Low Impedance Time from / CAS t

CLZ

0-0-ns4

Data Output Hold After /CAS Low t

DOH

5-5-ns

/CAS to Data Output Buffer Turn-off Delay Time t

CEZ

0 15 0 20 ns 7, 8

/RAS to Data Output Buffer Turn-off Delay Time t

REZ

0 15 0 20 ns 7, 8

/WE to Data Output Buffer Turn-off Delay Time t

WEZ

0 15 0 20 ns 7

Transition Time t

T

1 50 1 50 ns 3

Refresh Period t

REF

-16-16ms

/RAS Precharge Tim e t

RP

40 - 50 - ns

/RAS Pulse Width t

RAS

60 10K 70 10K ns

/RAS Pulse Width ( Fast Page Mode with EDO) t

RASP

60 100K 70 100K ns

/RAS Hold Time t

RSH

10 - 13 - ns

/CAS Precharge Time (Fast Page Mode with EDO) t

CP

10 - 10 - ns

/CAS Pulse Width t

CAS

10 10K 13 10K ns

/CAS Hold Time t

CSH

40 - 45 - ns

/CAS to /RAS Pr echarge Time t

CRP

5-5-ns

/RAS Hold Time from /CAS Precharge t

RHCP

35 - 40 - ns

/RAS to /CAS Delay Time t

RCD

14 45 14 50 ns 5

/RAS to Column Address Delay Time t

RAD

12 30 12 35 ns 6

Row Address Set-up Time t

ASR

0-0-ns

Row Address Hol d Time t

RAH

10 - 10 - ns

Column Address Set-up Time t

ASC

0-0-ns

Column Address Hold Ti me t

CAH

10 - 13 - ns

Column Address to /RAS Lead Time t

RAL

30 - 35 - ns

Read Command Set-up Time t

RCS

0-0-ns

Read Command Hold Time t

RCH

0-0-ns9

Read Command Hold Time referenced to /RAS t

RRH

0-0-ns9

Semiconductor MSC2313258D

AC Characteristics (2/2)

(VCC = 5V ± 10%, Ta = 0°C to +70°C ) Note: 1, 2, 3

MSC2313258D

-60BS2/DS2

MSC2313258D

-70BS2/DS2

Parameter Symbol

Min. Max. Min. Max.

Unit Note

Writ e Command Set-up Time t

WCS

0-0-ns

Writ e Command Hold Time t

WCH

10 - 13 - ns

Writ e Command Pulse Widt h t

WP

10 - 10 - ns

/WE Pul se Width (DQ Disabl e) t

WPE

10 - 10 - ns

Writ e Command to /RAS Lead Time t

RWL

10 - 13 - ns

Writ e Command to /CAS Lead Time t

CWL

10 - 13 - ns

Data-in Set-up Time t

DS

0-0-ns

Data-i n Ho ld Time t

DH

10 - 13 - ns

/CAS Active Delay Time from /RAS Precharge t

RPC

5-5-ns

/RAS to /CAS Set-up Time
(/CAS before /RAS)

t

CSR

5-5-ns

/RAS to /CAS Hold Time
(/CAS before /RAS)

t

CHR

10 - 10 - ns

Semiconductor MSC2313258D

Notes: 1. A start-up delay of 200µs is required after power-up, followed by a minimum of eight initial ization cycles

(/RAS only r efresh or /CAS before /RAS ref r esh) before proper device operation is achiev ed.

2. The AC characteristic s assumes t

T

= 2ns.

3. V

IH

(Min.) and VIL(Max.) are ref erence lev els f or m easuring input tim ing signals. Transiti on ti me (tT) are

measured between V

IH

and VIL.

4. This parameter is m easured wit h a load circuit equivalent to 2TTL loads and 100pF.

5. Operation within the t

RCD

(Max.) limi t ensures that t

RAC

(Max.) can be met.

t

RCD

(Max.) is specified as a reference point only. If t

RCD

is greater than the specified t

RCD

(Max.) limit, then

the access tim e is controlled by t

CAC

.

6. Operation within the t

RAD

(Max.) limi t ensures that t

RAC

(Max.) can be met.

t

RAD

(Max.) is specified as a reference point only. If t

RAD

is greater than the specified t

RAD

(Max.) limit, then

the access tim e is controlled by t

AA

.

7. t

CEZ

(Max.), t

REZ

(Max.) and t

WEZ

(Max.) define the time at which the output achieves the open circuit

conditi on and ar e not referenced to output voltage levels.

8. t

CEZ

and t

REZ

must be satisfied for open circuit condition.

9. t

RCH

or t

RRH

must be satisfi ed for a read cycle.