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Cascadable Silicon Bipolar
MMIC␣ Amplifier
Technical Data
MSA-0200
Features
• Cascadable 50 Ω Gain Block
• 3 dB Bandwidth:
DC to 2.8 GHz
• 12.0 dB Typical Gain at
1.0␣ GHz
• Unconditionally Stable
(k>1)
Description
The MSA-0200 is a high performance silicon bipolar Monolithic
Microwave Integrated Circuit
(MMIC) chip. This MMIC is
designed for use as a general
purpose 50 Ω gain block. Typical
applications include narrow and
broad band IF and RF amplifiers
in commercial, industrial and
military applications.
The MSA-series is fabricated using
HP’s 10 GHz fT, 25␣ GHz f
MAX
,
silicon bipolar MMIC process
which uses nitride self-alignment,
ion implantation, and gold metallization to achieve excellent
performance, uniformity and
reliability. The use of an external
bias resistor for temperature and
current stability also allows bias
flexibility.
The recommended assembly
procedure is gold-eutectic die
attach at 400°C and either wedge
or ball bonding using 0.7 mil gold
[1]
wire.
See APPLICATIONS
section, “Chip Use”.
Chip Outline
Note:
1. This chip contains additional biasing
options. The performance specified
applies only to the bias option whose
bond pads are indicated on the chip
outline. Refer to the APPLICATIONS
section “Silicon MMIC Chip Use” for
additional information.
[1]
Typical Biasing Configuration
R
bias
RFC (Optional)
C
block
IN OUT
MSA
C
block
= 5 V
V
d
5965-9695E
V
> 7 V
CC
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Absolute Maximum Ratings
Parameter Absolute Maximum
Device Current 60 mA
(TMS)
[2,3]
= 25°C.
325 mW
> 189°C.
MS
than do alternate methods. See MEASURE-
jc
Power Dissipation
RF Input Power +13 dBm
Junction Temperature 200°C
Storage Temperature –65 to 200° C
Notes:
1. Permanent damage may occur if any of these limits are exceeded.
2. T
Mounting Surface
3. Derate at 28.6 mW/° C for T
4. The small spot size of this technique results in a higher, though more
accurate determination of θ
MENTS section “Thermal Resistance” for more information.
[1]
Thermal Resistance
θjc = 35°C/W
[2,4]
:
MSA-0200 Electrical Specifications
Symbol Parameters and Test Conditions
G
P
∆G
f
3 dB
VSWR
Power Gain (|S21|2) f = 0.1 GHz dB 12.5
Gain Flatness f = 0.1 to 1.8 GHz dB ±0.6
P
3 dB Bandwidth GHz 2.8
Input VSWR f = 0.1 to 3.0 GHz 1.4:1
Output VSWR f = 0.1 to 3.0 GHz 1.4:1
[1]
, T
= 25° C
A
[2]
: Id = 25 mA, Z
= 50 Ω Units Min. Typ. Max.
O
NF 50 Ω Noise Figure f = 1.0 GHz dB 6.5
P
IP
t
V
1 dB
3
D
d
Output Power at 1 dB Gain Compression f = 1.0 GHz dBm 4.5
Third Order Intercept Point f = 1.0 GHz dBm 17.0
Group Delay f = 1.0 GHz psec 125
Device Voltage V 4.5 5.0 5.5
dV/dT Device Voltage Temperature Coefficient mV/°C –8.0
Notes:
1. The recommended operating current range for this device is 18 to 40 mA. Typical performance as a function of current
is on the following page.
2.
RF performance of the chip is determined by packaging and testing 10 devices per wafer in a dual ground configuration.
Part Number Ordering Information
Part Number Devices Per Tray
MSA-0200-GP4 100
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MSA-0200 Typical Scattering Parameters
G
p
(dB)
0.1 0.3 0.5 1.0 3.0 6.0
FREQUENCY (GHz)
Figure 1. Typical Power Gain vs.
Frequency, TA = 25°C, Id = 25 mA.
Id (mA)
Figure 2. Power Gain vs. Current.
4
6
8
10
12
14
0
2
4
6
8
10
12
14
G
p
(dB)
15 25 30 403520
Gain Flat to DC
2
3
4
5
6
7
8
11
12
13
7
–55 –25 +25 +85 +125
8
6
5
4
3
2
P
1 dB
(dBm)
NF (dB)
G
p
(dB)
TEMPERATURE (°C)
Figure 3. Output Power at 1 dB Gain
Compression, NF and Power Gain vs.
Mounting Surface Temperature,
f = 1.0 GHz, Id = 25 mA.
NF
G
P
P
1 dB
6.0
5.5
6.5
7.0
7.5
NF (dB)
FREQUENCY (GHz)
Figure 5. Noise Figure vs. Frequency.
0.1 0.2 0.3 0.5 2.01.0 4.0 0.1 0.2 0.3 0.5 2.01.0 4.0
FREQUENCY (GHz)
Figure 4. Output Power at 1 dB Gain
Compression vs. Frequency.
0
2
4
6
8
10
12
P
1 dB
(dBm)
Id = 40 mA
Id = 18 mA
Id = 25 mA
Id = 18 mA
Id = 25 mA
Id = 50 mA
0.1 GHz
0.5 GHz
1.0 GHz
2.0 GHz
Freq.
S
11
S
21
[1]
(Z
= 50 Ω, TA = 25° C, I
O
S
12
= 25 mA)
d
S
22
GHz Mag Ang dB Mag Ang dB Mag Ang Mag Ang
0.1 .11 179 12.6 4.27 177 –18.4 .120 1 .11 –7
0.2 .11 174 12.6 4.26 172 –18.6 .117 4 .11 –12
0.4 .10 170 12.5 4.24 165 –18.4 .120 5 .12 –25
0.6 .09 166 12.5 4.22 158 –18.2 .123 7 .13 –38
0.8 .08 162 12.4 4.17 152 –18.2 .123 10 .13 –47
1.0 .06 161 12.3 4.13 144 –18.0 .126 13 .14 –55
1.5 .02 –170 12.0 3.99 126 –17.3 .137 17 .15 –72
2.0 .05 –105 11.5 3.74 109 –16.4 .152 20 .15 –89
2.5 .10 –103 10.8 3.46 97 –15.8 .163 25 .13 –91
3.0 .17 –124 9.8 3.10 83 –15.3 .172 26 .11 –100
3.5 .22 –137 8.7 2.71 68 –14.7 .184 22 .13 –94
4.0 .26 –144 7.4 2.35 55 –14.3 .192 22 .16 –85
5.0 .29 –165 5.1 1.80 35 –13.8 .203 17 .22 –76
6.0 .33 –162 3.3 1.46 20 –13.5 .211 14 .23 –82
Note:
1. S-parameters are de-embedded from 70 mil package measured data using the package model found in the DEVICE
MODELS section.
Typical Performance, T
= 25° C
A
(unless otherwise noted)
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MSA-0200 Chip Dimensions
NOT APPLICABLE
INPUT
GROUND
394 µm
15.5 mil
Unless otherwise specified, tolerances are
±13 µm/±0.5 mils. Chip thickness is 114 µm/4.5 mil.
Bond pads are 41 µm/1.6 mil typical on each side.
Note 1: Output contact is made by die attaching the
backside of the die.
394 µm
15.5 mil
OPTIONAL
OUTPUT
[1]
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