Datasheet MICRF218 Datasheet (Micrel)

Page 1
General Description
MICRF218
3.3V, QwikRadio® 300 MHz to 450 MHz Receiver
Features
Micrel’s MICRF218 is the world’s first integrated ASK / OOK receiver with selectable dual IF bandwidths for 300~450 MHz operation. The receiver architecture is super-heterodyne. The MICRF218 has fully integrated IF section with image rejection to bring performance, simplicity and ease of implementation to the receiver portion of RF actuation.
The MICRF218 is a true RF in, data out receiver. IF filter and image rej ection functions are built-in. D ual IF bandwidths enable the MICRF218 to capture signals from either high performance or low cost transmitters. In addition, all post-det ec tio n data filtering is provi ded o n the MICRF218. The user has a choice of four filter bandwidths that may be selected externally in binary steps, from 1.25 kHz to 10 k Hz. The user only needs to program the device with a set of easily determined values, based upon d ata rate, code modulation form at, and desired duty-c ycle operation . The MICRF 218 h as a shutdown control for duty-cycle operation to reduce average current consumption. It has analog RSSI output, indicating the strength of incoming signal.
The device is unique for its ability to “escape” from a jamming source and move to an alternate frequency. Dual IF bandwidths function plus fast response time provide easy implementation of dual frequency operations. It can ac commodate two ref erence crystals with the use of an external switch. Once the system detects a strong jamm ing signal on one frequency, the MICRF218 can switch to another frequency via a switching crystal. This is the ideal receiver for “Jam Avoidance”.
Complete receiver on a chip
300 MHz to 450 MHz frequency range
Selectable IF frequency and bandwidth
-108 dBm sensitivity, 550kHz IF BW, 1.0 Kbps BER
10 E-2 @ 433.92MHz
-106 dBm sensitivity, 1500kHz IF BW, 1.0 Kbps BER 10 E-2 @ 433.92MHz
Built-in Image Rejection Mixer
Low Power, 4 mA @ 315 MHz, continuous on
Data Rates to 10 kbps (Manchester Encoded) @
433.92 MHz
Duty Cycling Capable > 100:1 (shut down m ode)
Analog RSSI Output
No IF filter required
Excellent selectivity and noise rejection
Low external part count
Ordering Information
Part Number Temperature Range Package
MICRF218AYQS –40° to +85°C 16-Pin QSOP
QwikRadio is a registered trademark of Micrel, Inc. MLF and MicroLeadFrame are trademarks of Amkor Technology, Inc.
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Micrel MICRF218
Application Example
ANT PCB Pattern
L1 39nH
Pin Configuration
Pin Description
C2
1.5pF 50V
C1
6.8pF
L2 68nH
IF_BWCONTROL
315MHz/315.802, 900Hz Baud Rate Example
1
RO1
2
GNDRF
3
ANT
4
GNDRF
5
+3V
C3
0.1µF 16V
1
RO1
GNDRF
GNDRF
2 3
ANT
4 5
Vdd
6
IF_BW
7
SEL0
8 9
SHDN GND
VDD
6
IF_BW
7
SEL0
89
SHDN GND
MICRF218AYQS
Y1
9.8131MHz
U1 MICRF218AYQS
RO2
NC
RSSI
CAGC
CTH
SEL1
DO
16
RO2
15
NC
14
RSSI
13
CAGC
12
CTH
11
SEL1
10
DO
16 15 14 13 12 11 10
DO
RSSI
C4
0.1µF 16V
C5
4.7µF
6.3V
16-Pin QSOP
1 RO1
Pin
Name
Pin Function
Reference resonator input connection to Colpitts oscillator stage. May also be driven by external reference signal of 1.5V p-p amplitude maximum.
2 GNDRF Negative supply connection associated with ANT RF input. 3 ANT
RF signal input from antenna. Internally AC-Coupled. It is recommended that a matching network
with an inductor to RF ground is used to improve ESD protection. 4 GNDRF Negative supply connection associated with ANT RF input. 5 VDD Positive supply connection for all chip functi on s.
6 IF_BW
IF bandwidth control logic input. Use VDD for Wide IF Bandwidth or VSS for Narrow IF Bandwidth.
This pin must not be left floating, must be tied to VDD or VSS.
Logic control input with active internal pull-up. Used in conjunction with SEL1 to control the 7 SEL0
demodulator low pass filter bandwidth. (See filter table for SEL0 and SEL1 in application
subsection) 8 SHDN Shutdown logic control input. Active internal pull-up and must be pulled low for Normal Operation. 9 GND Negative supply connection for all chip functions except RF input.
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16-Pin QSOP
10 DO Demodulated data output.
11 SEL1
12 CTH
13 CAGC AGC filter capacitor. A capacitor, normally greater than 0.47uF, is connected from this pin to GND 14 RSSI 15 NC Not Connected 16 RO2
Pin
Name
Pin Function
Logic control input with active internal pull-up. Used in conjunction with SEL0 to control the
demodulator low pass filter bandwidth. (See filter table for SEL0 and SEL1 in application
subsection)
Demodulation threshold voltage integration capacitor. Capacitor to GND sets the settling time for
the demodulation data slicing level. Values above 1nF are recommended and should be optimized
for data rate and data profile.
Received signal strength indication output. Output is from a buffer with 200 ohms typical output
impedance.
Reference resonator connection. 7pF in parallel with low resistance MOS switch to GND during
normal operation. Driven by startup excitation circuit during the internal startup control sequence.
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Absolute Maximum Ratings
Supply Voltage (VDD) ................................................+5V
Input Voltage.............................................................+5V
Junction Temperature..........................................+150°C
Lead Temperature (soldering, 10sec.) ..................260°C
Storage Temperature (T
Maximum Receiver Input Power........................ +10dBm
ESD Rating(3) ..........................................................3KV
) ....................-65ºC to +150°C
S
(1)
Operating Ratings
Supply voltage (VDD) ............................+3.0V to +3.6V
Ambient Temperature (T Input Voltage (V
Maximum Input RF Power ..............................–20dBm
Operating Frequency ..........................300 to 450 MHz
).......................................3.6V (Max)
IN
Electrical Characteristics
(4)
Specifications apply for VDD = 3.0V, VSS = 0V, CAGC = 4.7uF, CTH = 0.1uF, Bold values indicate –40°C - TA +85°C.
Symbol Parameter Condition Min Typ Max Units
Continuous Operation, fRX = 315 MHz 4.0 mA 20:1 Duty Cycle, fRX = 315 MHz 0.2 mA
IDD
Ishut Shut down Current
MICRF218 Operating Supply Current
Continuous Operation, fRX = 433.92 MHz 5.5 mA 20:1 Duty Cycle, f
= 433.92 MHz 0.3 mA
RX
RF/IF Section
Image Rejection 20 dB
st
IF Center
1 Frequency
fRX = 315 MHz, Narrow IF 0.98 MHz f
= 433.92 MHz, Narrow IF 1.4 MHz
RX
(2)
)..................–40°C to +85°C
A
1 µA
st
IF Center
1 Frequency
Receiver Sensitivity @ 1kbps
Receiver Sensitivity @ 1kbps
IF Bandwidth
Antenna Input Impedance
Receive Modulation Duty Cycle
fRX = 315 MHz, Wide IF 1.8 MHz f
= 433.92 MHz, Wide IF 2.4 MHz
RX
fRX = 315 MHz, Narrow IF (50 ohms) -108 dBm f
= 433.92 MHz, Narrow IF (50 ohms) -108 dBm
RX
fRX = 315 MHz, Wide IF (50 ohms) -106 dBm f
= 433.92 MHz, Wide IF (50 ohms) -106 dBm
RX
fRX = 315 MHz, Narrow IF 400 kHz fRX = 433.92 MHz, Narrow IF 550 kHz fRX = 315 MHz, Wide IF 1000 kHz f
= 433.92 MHz, Wide IF 1500 kHz
RX
fRX = 315 MHz 16-j211
= 433.92 MHz 9.54-j152
f
RX
Note 6 20 80 %
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Symbol Parameter Condition Min Typ Max Units
Reference Oscillator
Frequency
Input Impedance 300 k Input Range 0.2 1.5 Vp-p Source Current V(REFOSC) = 0V 3.5 µA
Demodulator
CTH Leakage Current
CTH Leakage Current
AGC Attack / Decay Ratio
AGC pin leakage current
AGC Dynamic Range @ fRX = 433.92MHz
CTH Source Impedance
Demodulator Filter Bandwidth @ 315 MHz
CTH Source Impedance
Demodulator Filter Bandwidth @ 433.92 MHz
t
ATTACK
/ t
0.1
DECAY
TA = 25ºC ± 2 nA
= +85ºC ± 800 nA
T
A
RFIN @ -50dBm 1.13 V RFIN @ -110dBm 1.70 V
fRX = 315 MHz, Narrow IF, IF_BW = VSS Crystal Load Cap = 10pF fRX = 315 MHz, Wide IF, IF_BW = VDD Crystal Load Cap = 10pF fRX = 433.92 MHz Narrow IF, IF_BW = VSS Crystal Load Cap = 10pF fRX = 433.92 MHz Wide IF , IF_BW = VDD Crystal Load Cap = 10pF
f
= 9.8131MHz, 315MHz, Note 8 165 k
REFOSC
TA = 25ºC ± 2 TA = +85ºC ± 800
9.8131 MHz
9.78823 MHz
13.5178 MHz
13.48352 MHz
nA
SEL0=0, SEL1=0 1180 Hz SEL0=0, SEL1=1 2360 Hz SEL0=1, SEL1=0 4720 Hz SEL0=1, SEL1=1 9420 Hz
f
= MHz, 433.92MHz, note 8 120 k
REFOSC
TA = 25ºC ± 2 TA = +85ºC ± 800
nA
SEL0=0, SEL1=0 1625 Hz SEL0=0, SEL1=1 3250 Hz SEL0=1, SEL1=0 6500 Hz SEL0=1, SEL1=1 13000 Hz
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Symbol Parameter Condition Min Typ Max Units Digital / Control Functions
Input High Voltage Pins DO (As input), SHDN Input Low Voltage Pins DO (As input), SHDN
Source @ 0.8 Vdd
DO pin output current
Output rise and fall times
Sink @ 0.2 Vdd CI = 15 pF, pin DO, 10-90% 2 µsec
0.8VDD
V
0.2VDD
260 600
V
µA
RSSI
RSSI DC Output Voltage Range
RSSI response slope -90 dBm to -40 dBm 35
0.22 to 2
V
mV/
dBm
RSSI Output Current ±1.5 mA
/(T
ON
ON
RSSI Output Impedance
200 50% data duty cycle, input power to
Antenna = -20 dBm
+ t
) = 50%; without preamble, duty cycle is TON/(T
OFF
REFOSC
REFOSC
TAB
MHz = ( f
TAB
MHz = ( F
= T
OFF
), compute new parameter value as the ratio:
REFOSC
), compute new parameter value as the ratio:
TAB
– TON.)
BURST
MHz /F
/ f
REFOSC
) × ( parameter at F
TAB
MHz ) × ( parameter at F
0.3 Sec
+ T
+ T
ON
OFF
. For any reference oscillator frequency other than one of the tabulated
T
MHz )
TAB
TAB
) = 50msec/(200msec) = 25%. TON is the (Average number of
QUIET
MHz )
RSSI Response Time
Notes:
1. Exceeding the absolute maximum rating may damage the device.
2. The device is not guaranteed to function outside its operating rating.
3. Device are ESD sensitive. Use appropriate ESD precaution. Exceeding the absolute maximum rating may damage the device.
4. Sensitivity is defined as the average signal level measured at the input necessary to achieve 10-2 BER (bit error rat e). The input signal is defined as a return-to-zero (RZ) waveform with 50% average duty cycle (Manchester encoded) at a data rate of 1kBPS. Conductive measurement is performed using 50 ohm test circuit .
5. Spurious reverse isolation represents the spurious component that appear on the RF input pin (ANT) measured into 50 Ohms with an input RF matching network.
6. When data burst does not contain preamble, the duty cycle is then defined as total duty cycle, including any “quiet” time between data bursts. When data bursts contain preamble sufficient to charge the slice level on capacitor Cth, then duty cycle is the effective duty cycle of the burst alone. [For example, 100msec burst with 50% duty cycle, and 100msec “quiet” time between bursts. If burst includes preamble, duty cycle is T 1’s/burst) × bit time, and T
7. Parameter scales linearly with reference osci llator frequency f frequencies (called F
Parameter at f
8. Parameter scales inversely with reference oscillator frequency fT. For any reference oscillator frequency other than one of the tabulated frequencies (called F
Parameter at f
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Typical Characteristics
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LO Leakage in RF Port
Re-radiation from MICRF218 Antenna Port
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f
c
ANT
VDD
VSS
SEL0 SEL1
IF_ BW
SHDN
RF
Amp
f
SYNTHESIZER
Reference and Control
LO
Functional Description
UHF Downconverter
mixer
mixer
Wide / Narrow
RO1
Figure 1 Simplified Block Diagram
IF_BW
IMAGE REJECT FILTER
-f
CONTROL
REFERENCE
OSCILLATO R
Crystal
i
LOGIC
CAGC
AGC
IF
Amp
f
CONTROL
LOGIC
DO
RO2
Detector
Programmab l e
LowPassFilter
CONTROL
LOGIC
Slicing
Leve l
RSSI
OOK
Demodulator
SLICER
RSSI
DO
CTH
Receiver Operation
Figure 1 illustrates the basic structure of the MICRF218. It is composed of three sub-bloc ks; Im age Rejection UHF Down-converter with Switch-able Dual IF Bandwidths, the O OK Dem odulator, and Reference and Control Logics.
Outside the device, the MICRF218 req uires onl y three components to operate: two capacitors (CTH, and CAGC) and the ref erence frequenc y device, usua lly a quartz crystal.
Additional five components may be used to improve performance. These are: low cost linear regulator decoupling capacitor, two components for the matching network, and two components for the pre­selector band pass filter.
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LNA
The RF input signal is AC- coupled into th e gate circu it of the grounded source LN A input stage. The LNA is a Cascoded NMOS.
Mixers and Synthesizer
The LO ports of the Mixers are driven by quadrat ure local oscillator outputs from the synthesizer block. The local oscillator signal from the synthesizer is placed on the low side of the desired RF signal to allow suppression of the image f requency at t wice the IF frequency below the wanted signal. The local oscillator is set to 32 times the crystal reference frequency via a phase-loc ked loop synthesizer with a fully integrated loop filter .
Image Reject Filter and IF Band-Pass Filter
The IF ports of the mixer produce quadrature down converted IF signals . These IF signals are low-pass filtered to remove higher frequency products prior to the image reject filter where they are combined to reject the image frequencies. The IF signal then
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passes through a t hird order band pass filter. The IF Band-Pass filters are fully integrated inside the MICRF218. After filtering, four active gain controlled amplifier stages en hance the IF signa l to proper level for demodulation.
IF Bandwidth General Description
The MICRF218 has IF filt ers which m a y be conf igur ed for operation in a narrow band or wide band mode using the IF_BW pin. This pin must not be lef t f loa tin g ; it must be tied to VDD or VSS. With the use of a
13.4835MHz crystal and the IF_BW = VDD (wide mode) the IF frequency is set to 2.4MHz with a bandwidth of 1500k Hz. W ith the us e of a 13. 5178MH z crystal and the IF_BW = VSS (narrow mode) the IF frequency is set to 1.4MHz with a bandwidth of 550kHz at 433.92MHz.
The crystal frequency for Wide Bandwidth IF operation is given by:
+
+
Freq Operating
2.178 12
Freq Operating
1.198 12
)
)
REFOSC
The crystal frequency for Narrow Bandwidth IF operation is given by:
REFOSC
Note: The IF frequency, IF bandwidth, and IF separation between IF_BW modes using a single crystal will scale linearly and can be calculated as follows:
=
(32
=
(32
=
⎛ ⎜
*
⎜ ⎝
(MHz) Freq Operating
)433.92(MHz
(1)
MHz
(2)
MHz
er IF_Paramet er IF_Paramet MHz 433.92 @
⎞ ⎟
⎟ ⎠
(3)
Switched Crystal Application Operation
Appropriate choice of two crystal frequencies and IF_BW mode switching allows operation at two different frequencies; one with low bandwidth operation and the other with high bandwidth operation. Either the lower or higher reception frequency may use the wider IF band width by util izing
the appropriate equation (1) or (2) for each crystal frequency.
The following circuit, Figure 4, is an example of switched crystal oper ation. The IF Bandwidth Con trol and REF-OSC Control allow switching between two operating frequenc ies with either a narro w bandwidth or a wide bandwidth. In this case, the logic control switches between 390MHz in Wide Band Mode and 315MHz in Narrow Bandwidth Mode. The ad vantage of this circuit is when a RF interferer is at one frequency, the recei ver can go to another freque ncy to get clear reception.
Figure 5 shows PCB layout for MICRF218 with switched crystal o peration. Please con tact the Micrel RF Application Group for detailed document.
Dual Frequency Configuration Examples:
Scenario 1:
Frequency 1 - 315MHz Narrow Bandwidth
Frequency 2 - 433.92MHz Wide Bandwidth
A 9.81314MHz crystal switched in circuit during narrow IF mode, combined with a 13.48352MHz crystal, allows operation at 315MHz with 400kHz IF bandwidth, and at 433.92MHz with 1500kHz bandwidth.
Scenario 2:
Frequency 1 - 315MHz Wide Bandwidth
Frequency 2 - 433.92MHz Narrow Bandwidth
A 9.78823MHz cr ystal switched in circuit during Wide IF mode, combined with a 13.51783MHz crystal, allows operation at 315MHz with 1000kHz IF bandwidth, and 433.92MHz with 550kHz IF bandwidth.
Scenario 3:
Frequency 1 - 315MHz Narrow Bandwidth
Frequency 2 - 433.92MHz Narrow Bandwidth
A 9.8131MHz crystal switched in circuit, combined with a 13.51783MHz cr ystal during narrow IF mode, allows operation at 315MHz with 400kHz IF bandwidth, and at 433.92MHz with 550kHz bandwidth.
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L4
J2
RF IN
100nH
Notes:
1. 0V = Common
2. VDD Input = 3.0 to 3.3V
3. Ref-Osc Control: 0V = 315 MHz Operation, VDD = 390.1 MHz Operation
C2
2.2pF
C3
33pF
REF-OSC CNTR
IF BANDWIDTH CONTROL
VDD = WIDE BANDWIDTH 0V = NARROW BANDWID TH
L3
100nH
L2
3.9nH
L3
J3
COM
DO
COM
1 2 3 4 5 6 7
ZCB-0603
3.0 to 3.3V
3.0 to 3.3V SHDN
Figure 4. Dual Frequency QR218BP_SWREF, 315 MHz and 390 MHz
J4
1 2
CON2
+3V
C5
100nF
R3
NP
+3V
NP =Not Placed
J1
1
EXTERNAL REFERE NCE OSCILLATOR INPUT
2
C1 NP
REFOSC
U1 MICRF218AYQS
1
RO1
2
GNDRF
3
ANT
4
GNDRF
5
VDD
6
IF_BW
7
SEL0
89
SHDN GND
R5 100K
DATA OUT
RO2
NC
RSSI
CAGC
CTH
SEL1
C7
NP
DO
+3V
JPR1
0 OHMS
16 15 14 13 12 11 10
JPR2 NP
R4 0 OHMS
C4
0.047µF
R8 10k
C5
4.7µF
R10 100k
R1 NP
R2 NP
Y1
9.8131MHz
TSDF1220W
Q1
R6 10k
R7 100k
+3V
Y2
12.1287MHz
TSDF1220W
Q2
R11 100k
R9 10k
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Figure 5 Evaluation Board
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Single Crystal Operation for Dual Frequency Operation
When using a single cr ystal, the IF_BW function m ay be used to switch between two operating frequencies.
Bandwidth will scale d irectly with operating fr equency (equation 3). Higher opera t ing f r equency will have the wider IF bandwidth.
Given one operating frequency, the other frequency can be determined.:
+
=
* Freq1 Freq2 Bandwidth WideBandwidth Narrow
1.198)(384
2.178)-(384
+
=
OOK Demodulator
The following section discusses the Demodulator which is comprised of Detector, Programmable Low Pass Filter, Slicer, and AGC comparator.
Detector and Programmable Low-Pass Filter
The demodulation starts with the detector removing the carrier from the IF signal. Post detection, the signal becomes baseband information. The programmable low-pass filter further enhances the baseband information through the use of SEL0 and SEL1. There are four programmable low-pass filter BW settings for 433.92MHz operation, see Table 1. Low pass filter BW will vary with RF Operating Frequency. Filt er BW valu es can be eas ily calcu lated by direct scaling. See equation below for filter BW calculation:
It is very important to choose the filter setting that best fits the intended data rate to minimize data distortion.
Demod BW is set at 13000Hz @ 433.92MHz as default (assuming both SEL0 and SEL1 pins are floating). The l ow pass filter can be hardware set by external pins SEL0 and SEL1.
SEL0 SEL1 Demod BW (@ 434MHz)
0 0 1625Hz 1 0 3250Hz 0 1 6500Hz 1 1 13000Hz - default
Table 1. Demodulation BW Selection
* Freq1 Freq2 Bandwidth NarrowBandwidth Wide
* B BW @433.92MHzFreq Operating W=
433.92
2.178)(384
1.198)-(384
Freq) (Operating
(4)
(5)
(6)
Slicer and Slicing Level
The signal prior to slicer is still linear demodulated AM. Data slicer converts this signal into digital “1”s and “0”s by comparing with the threshold vol tage built up on the CTH capacitor. This threshold is determined by detecting the positive and negative peaks of the data signal a nd storing the mean value. Slicing threshold is at 50%. After the slicer , the signal is now digital OOK data.
During long periods of “0”s or no data period, threshold voltage on the CTH capacitor may be very low. Large random noise spik es during this time m ay cause erroneous “1”s at DO pin.
AGC Comparator
The AGC comparator monitors the signal amplitude from the output of the programmable low-pass filter. When the output signal is less than 750mV, the threshold 1.5µA current is sourced into the external CAGC capacitor. When the output signal is greater than 750mV, a 15µA current sink discharges the CAGC capacitor. The voltage developed on the CAGC capacitor acts to adjust the gain of the mixer and the IF amplif ier to com pensate f or RF input signal level variation.
Reference Control
There are two components in Reference and Control sub-block: 1) Reference Oscillator and 2) Control Logic through parallel In puts: SEL0 , SEL1, SHDN and IF_BW.
Reference Oscillator
Figure 6. Reference Oscillator Circuit
The reference oscillator in the MICRF218 (Figure 6) uses a basic Colpitts crystal oscillator configuration
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with MOS transconductor to provide negative resistance. All capacitors shown in Figure 6 are integrated inside the MICRF218. R01 and R02 are external pins of MICRF218. User only needs to connect reference oscillation crystal.
See equation (1) and (2) to calculate reference oscillator crystal frequency for either narrow or wide
bandwidth.
Crystal Parameters
To operate the MICRF218 with minimum offset, crystal frequencies should be specified with 10pF loading capacitance. Please contact Micrel RF Applications department for crystal parameters.
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Application Information
Figure 7. QR218HE1 Application Example, 433.92 MHz, Narrow Band
The MICRF218 can be fully tested by using one of many evaluation boards designed at Micrel for this device. As simple demonstrator, the QR218HE1 (Figure 7) off ers a good start for m ost applications. It has a helical PCB antenna with its matching network, a bandpass-filter front-end as a pre-selector filter, matching network and the minimum components required to make the devic e work , which are a crysta l, Cagc, and Cth capacitors.
The matching network of the he lical PC B antenna ( C9 and L3) can be rem oved and a whip ant enna (ANT2) or a RF connector (J2) can be us ed instead. Figure 7 shows the entire schem atic of it for 433.9 2MHz. Oth er frequencies can be used. Matching network values for other frequencies are listed in the tables below.
Capacitor C9 and inductor L3 are the passive elements for the he lical PCB matc hing network. Tight tolerance is recomm ended for these devices, like 2% for the inductor and 0.1pF for the capacitor. PCB variations ma y require d if f er ent c omponent values and optimization. Table 2 shows the matching elements for the device frequency range. For additional information look for Small PCB Antennas for Micrel RF
September 2007
Products application note.
Freq (MHz) C9 (pF) L3(nH)
315.0
390.0
418.0
433.92
1.2
1.2
1.2
1.5 30
75 43 36
Table 2. Matching Values for the Helical PCB Antenna
If whip antenna is used, remove C9 and place the whip antenna in the hole provided in the PCB. Also, RF signal can be injected there (add RF connector).
L1 and C8 form the pass-band-filter front-end. Its purpose is to atten uate undesired outs ide band noise which reduces the receiver performance. It is calculated by the parallel res onanc e equ ati on:
f
=
1
π
C8)*L1*(2
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Table 3 shows the most used frequency values.
Freq (MHz) C8 (pF) L1(nH)
315.0
390.0
418.0
433.92
6.8
6.8
6.0
5.6 24
39 24 24
Table 3. Band-Pass-Filter Front-End Values
There is no need for the b andpass-filter front-end for applications where it is proven that the outside band noise does not cause a pr oblem. The MICRF218 h as image reject mixers which improve significantly the selectivity and rejection of outside band noise.
Capacitor C3 and inductor L2 form the L-shape matching network. The capacitor provides additional attenuation for low fr equency outside band no ise, and the inductor provides addit iona l ESD pr otecti on for the antenna pin. Two m ethods can be used to find these values, which are m atched close to 50
. One method
is done by calcul ating the values using the equations below, and the other m ethod uses a Smith chart. T he latter is made easier by using software that plots the values of the components C8 and L1, like WinSmith by Noble Publishing.
To calculate the m atching values , one needs to know the input impedanc e of the device.
Table 4 shows the
input impedance of the MICRF218 and suggested matching values f or the most used frequenc i es . These suggested values m ay be different if the la yout is not exactly the same as the one made here.
Freq (MHz) C3 (pF) L2(nH) Z device (Ω)
315.0 1.5 68 16.3 -j210.8
390.0 1.2 47 8.26 – j163.9
418.0 1.2 43 11.1 – j161.9
433.92 1.1 39 9.54 – j152.3
Table 4. Matching values for the most used frequencies
For the frequency of 433.9 2MHz, the inp ut impedanc e is Z = 9.54 – j152.3 calculated by:
Equivalent parallel = B = 1/Z = 0.410 + j6.54 msiemens
Rp = 1 / Re (B); Xp = 1 / Im (B) Rp = 2.44k
Ω; Xp = 345.8Ω
. The matching c omponents are
Q = SQRT (Rp/50 + 1) Q = 7.06 Xm = Rp / Q Xm = 345.8
Resonance Method For L-shape Matching Network: Lc = Xp / (2×Pi×f); Lp = Xm / (2×Pi×f) L2 = (Lc×Lp) / (Lc + Lp); C3 = 1 / (2×Pi×f×Xm) L2 = 38.9nH C3 = 1.06pF Doing the same calculation example with the Smith
Chart, it would appear as follows, First, the input impedance of the device is plotted,
(Z = 9.54 – j152)
@ 433.92MHz.(Figure 8).
Figure 8. Device’s Input Impedance, Z = 9.54-j152
Second, the shunt inductor (39nH) and the series capacitor (1.1pF) f or the desired input impedance ar e plotted (Figure 9). O ne can see the matching leading to the center of the Smith Chart or close to 50
Ω.
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Crystal Y1 may be either SMT or leaded. It is the reference clock for all the device internal circuits. Crystal characteristics of 10pF load capacitance, 30ppm, ESR < 50
, -40ºC to +85ºC temperature
range are desired. Table 5 shows the crystal frequencies for WB or NB and one of Micrel’s approved crystal manufacturers (
REFOSC (MHz) Carrier (MHz) HIB Part Numb er
9.813135, NB 315 SA-9.813135-F-10-G-30-30-X
12.149596, NB 390.0 SA-12.149596-F-10-G-30-30-X
13.021874, NB 418.0 SA-13.021874-F-10-G-30-30-X
13.517827, NB 433.92 SA-13.517827-F-10-G-30-30-X
9.788232, WB 315 SA-9.788232-F- 10-G- 30-30-X
12.118764, WB 390.0 SA-12.118764-F-10-G-30-30-X
12.988829, WB 418.0 SA-12.988829-F-10-G-30-30-X
13.483523, WB 433.92 SA-13.483523-F-10-G-30-30-X
Figure 9. Plotting the Shunt Inductor and Series Capacitor
www.hib.com.br).
Table 5. Crystal Frequency and Vendor Part Number
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The oscillator of the MICRF218 is Colpitts in configuration. It is very sensitive to str ay capacitance loads. Thus, very good care must be taken when laying out the printed circuit board. Avoid long traces and ground plane on the top layer close to the REFOSC pins RO1 and RO2. W hen care is not taken in the layout, and crystals from other vendors are used, the oscillator m ay take longer times to start as well as the time to good d ata in the DO pin to show up. In some cases, if the stray capacitance is to o high (> 20pF), the oscillator may not start at all.
Refer to Equations 1 and 2 for crystal frequency calculations. The local oscillator is low side injection (32 × 13.51783MHz = 432.571MHz), that is, its frequency is below the RF carrier frequency and the image frequency is below the LO frequency. See Figure 10. The product of the inc oming RF signal a nd local oscillator sign al will yield the IF f requency, whic h will be demodulated by the detector of the device.
Figure 10. Low Side Injection Local Oscillator
Narrow and Wide Band Crystal Part Numbers, WB = IF Wide Band, NB = IF Narrow Band JP1 and JP2 are the bandwidth selection for the
demodulator bandwidth. To set it correctly, it is necessary to know the shortest pulse width of the encoded data sent in the transmitter. Similar to the example of the data profile in the Figure 11 below, PW2 is shorter than PW 1, so PW 2 should be used f or the demodulator ba ndwidth calculati on which is foun d by 0.65/shortest pulse widt h. After this value is found, the setting should be done according to
Table 6. For
example, if the pulse period is 100µsec, 50% duty cycle, the pulse width will be 50µsec (PW = (100µsec × 50%) / 100). So, a bandwidth of 13kHz would be necessary (0.65 / 50µsec). However, if this data stream had a pulse period with 20% duty cycle, then the bandwidth required would be 32.5kHz (0.65 / 20µsec), which exceeds the maximum bandwidth of the demodulator circuit. If one tries to exceed the maximum bandwidth, the pulse would appear stretched or wider.
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SEL0 JP1
Short Short 1625 400 1250 Open Short 3250 200 2500 Short Open 6500 100 5000 Open Open 13000 50 10000
SEL1 JP2
Demod. BW (hertz)
Shortest Pulse (µsec)
Maximum baud rate for 50% Duty Cycle (hertz)
Other frequencies will have different demodulator bandwidth limits , which are derived fr om the ref erenc e oscillator frequ ency. limits for the other two most used frequencies.
Table 6. JP1 and JP2 setting, 433.92 MHz
Table 7 and 8 below shows the
SEL0 JP1
Short Short 1565 416 1204 Open Short 3130 208 2408 Short Open 6261 104 4816 Open Open 12523 52 9633
SEL1 JP2
Demod. BW
(hertz)
Shortest Pulse (µsec)
Maximum baud rate for 50% Duty Cycle (hertz)
Table 7. JP1 and JP2 setting, 418.0 MHz
SEL0 JP1
Short Short 1460 445 1123 Open Short 2921 223 2246 Short Open 5842 111 4493 Open Open 11684 56 8987
SEL1 JP2
Demod. BW
(hertz)
Shortest Pulse (µsec)
Maximum baud rate for 50% Duty Cycle (Hertz)
Table 8. JP1 and JP2 setting, 390.0 MHz
SEL0 JP1
Short Short 1180 551 908 Open Short 2360 275 1815 Short Open 4720 138 3631 Open Open 9400 69 7230
SEL1 JP2
Demod. BW
(hertz)
Shortest Pulse (µsec)
Maximum baud rate for 50% Duty Cycle (Hertz)
Table 9. JP1 and JP2 setting, 315.0 MHz.
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Selection of CTH and CAGC Capacitors
Capacitors C6 and C4, Cth and Cagc respectively provide time-based reference for the data pattern received. These cap acitors are selected accordin g to data profile, pulse du ty cycle, dead time bet ween two received data pack ets, and if the data pattern has or does not have a preamble. See Figure 11 for an example of a data profile.
PW1
Preamble
Header
123456 78910
PW2= Narrowest pulsewidth t1 & t2 =data period
Figure 11. Example of a Data Profile
For best results, the capacitors should always be optimized for the da ta pattern used. As the baud rate increases, the capacitor values decrease. shows suggested values for Manchester Encoded data, 50% duty cycle.
SEL0 JP1
Short Short 1625 100nF 4.7µF Open Short 3250 47nF 2.2µF Short Open 6500 22nF 1µF Open Open 13000 10nF 0.47µF
SEL1 JP2
Demod. BW (hertz)
PW2
t1 t2
Cth (C6)
Table
Cagc (Cagc)
determine the signal to noise ratio of the RF link, crude range estimate f rom the transmitter source and AM demodulation, which requires a low Cagc capacitor value.
Shut Down Control
The shut down pin ( SHDN) is useful to save energ y. When its level close to Vdd (SHDN = 1), the de vice is not in operation. Its DC current consumption is less than 1µA (do not forget to r em ove R3). W hen toggling from high to lo w, there will be a tim e required for the device to come to stead y state mode, and a time for data to show up in the DO pin. This time will be dependent upon many things such as temperature, choice of crystal use d, and if the there is an external oscillator with faster startup time. Normally, with the crystal vendors suggested, the data will show up in the DO pin around 1msec time, and 2msec over the temperature range of the device. See Figures 12.
Table 10. Suggested Cth and Cagc Values.
Other components used include C5, which is a decoupling capacit or for the Vdd line; R4 reser ved for future use and not needed for the evaluation board; R3 for the shutdown pin (SHDN = 0, device is operation), which can be removed if that pin is connected to a microcontroller or an external switch, and R1 and R2 which form a voltage divider for the AGC pin. One ca n force a voltage i n this AGC pin to purposely decrease the device sensitivity. Special care is needed when doing this operation, as an external control of the AGC voltage m ay vary from lot to lot and may not work the same for several devices.
Figure 12. Time-to-Good Data After Shut Down Cycle,
Room Temperature
DO, RSSI and Shutdown Functions
Three other pins are worth y of c omm ent. T hey are the DO, RSSI, and shut down pins. The DO pin has a driving capabilit y of 0.6mA. This drive current is good enough for most of the log ic family ICs in the market today. The RSSI pin provides a transfer function of the RF signal intensity vs. voltage. It is very useful to
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PCB Considerations and Layout
Figures 14 to 17 show top, bottom and silkscreen layers of printed circuit board for the QR218HE1 board. Gerber files are provided and are downloadable from Micrel Website: www.micrel.com, to fabricate this board. Keep traces as short as possible. Long traces will alter the matching network, and the values suggested will not be valid . Suggested Matching Values may vary due to PCB variations. A PCB trace 100 mills (2.5mm) long has about 1.1nH inductance. Optimi zation should always be done with exhaustive range tests. Make individual ground connections to the ground plane with a via for each ground connection. Do not share vias with ground connections. Each ground connecti on = 1 via or more
vias. Ground plane m ust be soli d and pos sibly witho ut interruptions. Avoid ground plane on top next to the matching elements. It normally adds additional stray capacitance which c hanges the matching. D o not use phenolic material. Use only FR4 or better materials. Phenolic material is conductive above 200MHz. RF path should be as straight as pos sible avoiding loops and unnecessary turns. Separate ground and Vdd lines from other circuits (microcontroller, etc). Known sources of noise should be laid out as far as poss ible from the RF circuits. Avoi d thick traces , the higher the frequency, the thinn er the trace should be in order to minimize losses in the RF path.
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Figure 14. QR218HE1 Top Layer.
Figure15. QR218HE1 Bottom Layer, Mirror Image.
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Figure 16. QR218HE1 Top Silkscreen Layer.
Figure 17. QR218HE1 Dimensions.
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QR218HE1 Bill of Materials, 433.92 MHz
Item Part Number Manufacturer Description Qty.
ANT1 Helical PCB Antenna Pattern 1 ANT2 (np)50-ohm Ant 168mm 20 AWG, rigid wire 0
C9 MuRata 1.5pF , 0402/0603 1 C4 Murata / Vishay 4.7µF, 0805 1 C3 Murata/Vishay 1.1pF, 0402/0603
C6,C5 Murata / Vishay 0.1µF, 0402/0603 2
C8 Murata 5.6pF, 0402/0603 1
JP1,JP
2, JP3
JP4 (np) not placed 0
J2 (np) not placed 0 J3 CON6 1 L1 Coilcraft / Murata /
L2 Coilcraft / Murata /
L3 Coilcraft / Murata /
R1,R2,
R4 R3 Vishay 100k , 0402 1 Y1 HCM49
Y1A HC49/US
U1 MICRF218AYQS Micrel Semiconductor QSOP16 1
Notes:
1. On Semiconductor Tel: 800-344-3860
2. Micro Commercial Corp. Tel: 800-346-3371
3. Sumida Tel: 408-982-9660
4. Murata Tel: 949-916-4000
5. Vishay Tel: 402-644-4218
6. Micrel S emiconduc tor Tel: 408-944-0800
Vishay short, 0402, 0 resistor 2
24nH 5%, 0402/0603 1
ACT1
39nH 5%, 0402/0603 1
ACT1
30nH 2%, 0402/0603 1
ACT1
(np) 0402, not placed 0
www.hib.com.br www.hib.com.br
Table 11. QR218HE1 Bill of Materials, 433.92 MHz, Narrow Band.
(np)13.51783MHz Crystal 0
13.51783MHz Crystal 1
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Package Information
QSOP16 Package Type (AQS16)
MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA
TEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB http:/www.micrel.com
The information furnished by Micrel in this data sheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for
Micrel Products are not designed or authorized for use as components in life support appliances, devices or syst ems where malfu nction of a
product can reasonably be expected to result in personal injury. Life support devices or s yst ems are devices or systems that (a) are intended for
surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant
injury to the user. A Purchaser’s use or sale of Micrel Products for use in life support appliances, devices or systems is at Purchaser’s own risk
September 2007
its use. Micrel reserves the right to change circuitry and specifications at any time without not if ication to the customer.
and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale.
© 2007 Micrel, Incorporated.
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Revision History Date Edits by: Revision Number
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