The MIC4807 is an 80V, 8-channel, addressable low side
driver with latches and TTL/CMOS compatible logic inputs.
Each logic input is composed of a comparator with a 1.4V
bandgap-derived reference serving as the trip point. The
addresses (AIN, BIN, and CIN) and Data-in logic inputs have an
internal 50µA pull-up current source, while the Output Enable
(OE), Chip Select (CS), and Clear logic inputs have an
internal 75µA pull-down sink. If the logic lines to the MIC4807
are severed, these currents guarantee that the outputs will
turn OFF.
Individual latches in the MIC4807 are selected by a binary
address presented at inputs AIN, BIN, and CIN. Data-in is
directed to the addressed latch while CS is held low, allowing
an individual output to be pulse-width modulated. When CS
is set high again, the last Data-in is stored in the latch. If Datain = "1", the addressed output is turned on, and if Data-in = "0",
the addressed output is turned off.
Information presented to Data-in and the address inputs is
transferred to the latches while CS is pulled low. For
application, where several outputs must be (Continued)
Pin Diagram
Features
•4.5V to 16V Operation
•Eight 80V 100mA Outputs
•Off-state Leakage less than 10µA at 25°C
•Short-Circuit Proof
•Thermal Shutdown with Hysteresis
•DMOS Output Devices (RON ≤ 7Ω at 25°C)
Applications
•Lamp Drivers
•Solenoid Drivers
•Display Drivers
-Electroluminescent
-Vacuum Fluorescent
-Plasma
•Relay Drivers
•Print Head Drivers
•Heater Drivers
•Power Semiconductor Drivers
•Security Systems
•Environmental Controls
•Process Controllers
Ordering Information
VDD
OE
CS
Clear
1
2
3
4
MIC4807
5
6
7
8
HVOUT2
HVOUT3
Ground
HVOUT4
HVOUT5
Block Diagram
18
17
16
15
14
13
12
11
109
Addressing
HVOUT1
HVOUT0
Data-in
AIN
BIN
CIN
VDD
HVOUT7
HVOUT6
V
DD
A
IN
B
IN
{
C
IN
Data-in
Ground
12
15
14
13
16
PartOperatingPackage
7
NumberTemperature-Range
MIC4807BN-40°C to 85°C18-Pin Plastic DIP
Thermal
Shutdown
Address
Decoder
5
647
CS
Latches
Current
Limit
Driver
•
•
•
•
•
•
Driver
OEClear
17
18
10
11
1
2
8
9
HVOUT
HVOUT
HVOUT
HVOUT
HVOUT
HVOUT
HVOUT
HVOUT
0
1
2
3
4
5
6
7
October 19987-3
Page 2
MIC4807Micrel
General Description (Continued)
turned on simultaneously, Gray Code address sequencing
can be applied to Ain, Bin, Cin, while Data-in is held high and
CS is held low. Data-in will be transferred to each address in
turn, without the need to toggle CS. Similarly, a set of outputs
could be simultaneously turned off by setting Data-in low.
Gray Code ensures that no intermediate addresses are
inadvertently accessed. A typical Gray Code is 0, 1, 3, 2, 6,
7, 5, 4.
Each output drive circuit has a high-voltage, power DMOS
device configured as a transconductance loop. This loop
limits the output current to typically 200mA. While current
limiting keeps the output device within its allowable safeoperating area (SOA), the power dissipation may be excessive. Long-term survival is guaranteed by thermal shutdown.
When operated below current limit, the outputs appear as
small-valued resistors (typically 5.1Ω at 25°C) connected to
ground. The "ON" resistance (RON) has a strong, positive
temperature coefficient (approximately 7500 ppm/°C) which
promotes current sharing if two or more outputs are paral-
leled.
Absolute Maximum Ratings(Notes 1, 2 and 3)
Output Voltage (V
Supply Voltage (VDD)16.5V
Logic Input Voltage (VIN)–0.3V TO VDD + 0.3
Continuous Output Current (I
Power Dissipation (PD, Note 2)Internally Limited
Ambient Temperature (TA):–40°C to +85°C
Maximum Junction Temperature (T
Storage Temperature–65°C to +150°C
, OFF)100V
OUT
)Internally Limited
OUT
)150°C
JMAX
θJA - Plastic DIP130°C/W
Electrical Characteristics: (Note 6) MIC4807BN, T
= 25°C, VDD = 15V unless otherwise specified (see
A
Test Circuit).
SymbolParameterConditionsMinTypMaxUnits
V
DD
I
DD
(0)Logic Input Voltage4.5V ≤ VDD ≤ 16V0.8V
V
IN
VIN (1)2.0V
I
(0)Logic Input Current for AIN,V
IN
I
(1)Logic Input Current for CS,VIN = V
IN
I
OUT
R
ON
I
SC
V
OUT
V
OUT
Supply Voltage4.516V
Supply CurrentOE = L (Note 3)5.510mA
OE = H (Note 4)1.53mA
= 0V–150–70–25µA
B
, CIN, and Data-in
IN
OE, and Clear
Output Leakage CurrentOE = 0V, V
Output "ON" ResistanceOutput is ON, V
Short Circuit CurrentOutput is ON< V
Data and AddressV
Set-up Time(A, see Timing Diagram)
Data and Address(B)50ns
Hold Time
CS Pulse Width(C)500ns
Turn-on Delay(D)2.5ns
= 10V for all timing tests400ns
DD
7-4October 1998
Page 3
MIC4807Micrel
Electrical Characteristics: (Note 6) T
SymbolParameterConditionsMinTypMaxUnits
Turn-Off Delay(E)2.5µs
Output Disable(F)2µs
Response Time
Output Enable(G)2µs
Response Time
Clear Response Time(H)2.5µs
Clear Pulse Width(I)500ns
Electrical Characteristics: (Note 6) T
= 25°C, VDD = 15V unless otherwise specified (see Test Circuit).
A
= –55°C to +125°C, VDD = 15V unless otherwise specified (see Test
A
Circuit).
SymbolParameterConditionsMinTypMaxUnits
V
I
DD
DD
Supply Voltage4.516V
Supply CurrentOE = L (Note 3)15mA
OE = H (Note 4)4mA
(0)Logic Input Voltage4.5V ≤ VDD ≤ 16V0.8V
V
IN
V
(1)2.0V
IN
IIN (0)Logic Input Current for AIN,V
, CIN, and Data-in
B
IN
IIN (1)Logic Input Current for CS,VIN = V
OE, and Clear
I
OUT
R
ON
I
SC
V
OUT
V
OUT
Output Leakage CurrentOE = 0V, V
Output "ON" ResistanceOutput is ON, V
Short Circuit CurrentOutput is ON< V
Output Voltage (OFF)80V
Output Voltage (ON)I
Data and AddressVDD = 10V for all timing tests700ns
Set-up Time(A, see Timing Diagram)
Data and Address(B)50ns
Hold Time
= 0V–250–10µA
IN
DD
= 80V5.17µA
OUT
=0.7V,VDD=10V12Ω
OUT
= 50V100300mA
10V ≤ V
I
DD
= 50mA,VDD = 10V0.6V
OUT
= 100mA, VDD = 10V1.2V
OUT
OUT
≤ 15V (Note 5)
25400µA
7
CS Pulse Width(C)1000ns
Turn-on Delay(D)5µs
October 19987-5
Page 4
MIC4807Micrel
Electrical Characteristics: (Note 6) T
SymbolParameterConditionsMinTypMaxUnits
Turn-Off Delay(E)5µs
Output Disable(F)4µs
Response Time
Output Enable(G)4µs
Response Time
Clear Response Time(H)5µs
Clear Pulse Width(I)1000ns
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Electrical specifications do not
apply when operating the device beyond its specified operating ratings.
Note 2: The junction temperature is internally limited by a thermal shutdown circuit. The maximum power dissipation is a function of
T
, θJA, and TA. The maximum allowable power dissipation at any ambient temperature is PD = (T
JMAX
is exceeded, the die temperature will rise above 150°C, and the MIC4807 will go into thermal shutdown.
Note 3: All outputs are off when OUTPUT ENABLE is pulled low.
Note 4: All outputs are turned on during this test.
Note 5: Pulse testing is used to avoid thermal shutown.
Note 6: Minimum and Maximum limits are tested and 100% guaranteed over the temperature range specified. Typicals are measured
at 25°C and represent the most likely parametric norm.
= 25°C, VDD = 15V unless otherwise specified (see Test Circuit).
A
- TA) / θJA. If this dissipation
JMAX
Timing Diagram
CIN
BIN
AIN
Data-in
CS
Clear
OE
HVOUT0
HVOUT1
HVOUT
AB
D
2
Logic "1"
Logic "0"
C
H
G
F
OFF
ON
H
ED
HVOUT3
HVOUT4
7-6October 1998
Page 5
MIC4807Micrel
Test Circuit and AC Waveform Measurement Standards
V
OUT3
V
OUT2
V
1
2
3
VDD
VIN
4
MIC4807
5
VIN
IN
V
6
7
8
9
5V
0V
10V
OUT
V
18
17
16
15
14
13
12
11
10
VIN
RCRCRC
tDelay
RCRCRCRC
VDD=10V
RC
All reference times are taken
from the 50% transition point.
L = Low Logic LevelX = Don't Care
H = High Logic LevelP = Previous State
D = Data (High or Low)
Functional Mode
7
0
1
2
3
4
5
6
7
7-8October 1998
Page 7
MIC4807Micrel
Typical DC Output Characteristics for the “On” State:
(VDD = 10V and TA = 25°C unless other wise specified)
VDD = 10V
VDD = 15V
SHORT CIRCUIT CURRENT
400
EXPANDED VERSION OF SHORT
CIRCUIT CURRENT FOR LOW
OUTPUT VOLTAGE (V
400
OUT)
300
200
(mA)
OUT
I
100
120
100
80
60
(mA)
OUT
I
40
300
200
(mA)
OUT
I
100
0
806040200
(V)
V
OUT
FOR SEPARATE V
I
OUT
DD
0
012345
V
(V)
OUT
I
AT 3 TEMPERATURES
OUT
120
T = –55°CT = 25°C
100
80
(mA)
60
OUT
I
40
T = 125°C
7
20
0
0
0.51.0
V
(V)
OUT
SHORT CIRCUIT CURRENT LIMIT (I
200
100
(mA)
SC
I
0
0.05.0
(V)
V
DD
SC
10.0
20
0
0.05.010.0
V
(V)
OUT
)
ON RESISTANCE (R
ON
)
15.0
10.0
(Ω)
ON
R
5.0
0.0
0.05.0
V
DD
(V)
10.0
October 19987-9
Page 8
MIC4807Micrel
Pin Description
Pin No.Pin NameFunctional Description
5GroundElectrical ground to chip substrate.
12V
DD
1, 2, 8,HVOUT0 through HVOUT
7
Positive logic supply voltage (10V-15V).
These are the high voltage (HV) open outputs, each of which is capable of
9,10, 11,sinking 100mA when switched on, and standing off 80V when switched off.
17,18In addition, each output channel is equipped with an analog current limiter
to protect it from shorts to the positive high voltage supply. When an output
is shorted (up to 80V), a maximum of 225mA (200mA nominal) will flow
through it to ground.
13, 14, 15CIN, BIN, &A
IN
When these inputs are combined together they form the BCD address used
to select the desired output. Each input is TTL compatible with an internal
pull-up current source of 50mA.
6CSWhen CS is at logic "0" the device is actively addressed, and when CS is
at logic "1" the decoded address and input Data are inhibited, making
the part unaddressable. CS is TTL compatible with an internal pull-down
current sink of 75µA.
7ClearClear resets all the outputs to the off state when pulled to logic "0", and is
TTL compatible with an internal pull-down current sink of 75µA.
16Data-inData-in determines the state of the output being addressed. When Data-
in is at logic "0" the addressed output is turned off, and when Data-in is at
logic "1" the addressed output is turned on. Data-in is TTL compatible with
an internal pull-up current source of 50µA.
4OEOE allows the bank of eight outputs to be duty cycled together. When OE
is at logic "1" the outputs are enabled to follow their respective latches, and
when OE is at logic "0" all the outputs are turned off. OE is TTL Compatible
with a pull-down current sink of 75µA.
7-10October 1998
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