The IL34118 Voice Switched Speakerphone Circuit incorporates
the necessary amplifiers, attenuators, level detectors, and control
algorithm to form the heart of a high quality hands-free speakerphone
system. Included are a microphone amplifier with adjustable gain and
MUTE control, Transmit and Receive attenuators which operate in a
complementary manner, level detectors at both input and output of
both attenuat ors, and backgro und noise monito rs for b oth the t ransmit
and receive channels. A Dial Tone Detector prevents the dial tone
from being attenuated by the Receive background noise monitor
circuit. Also included are two line driver amplifiers which can be used
to form a hybrid network in conjunction with an external coupling
transformer. A high pass filter can be used to filter out 60 Hz noise in
the reseive channel, or for other filtering functions. A Chip Disable
pin permits powering down the entire circuit to conserve power on
long loops where loop current is at a minimum.
The IL34118 may be operated from a power supply, or it can be
powered from the telephone line, requiring typically 5.0 mA. The
IL34118 can be interfaced directly to Tip and Ring (through a
coupling transformer) for stand-alone operation, or it can be used in
conjunction with a handset speech network and or other features of a
featurephone.
TECHNICAL DATA
IL34118
ORDERING INFORMATION
IL34118N Plastic
IL34118DW SOIC
TA = -25° to 70° C for all packages
•
Improved Attenuator Gain Range: 52 dB Between Transmit and
Receive
•
Low Voltage Operation for Line-Powered Applications (3.0-
6.5 V)
•
4 Point Signal Sensing for Improved Sensitivity
•
Background Noise Monitors for Both Transmit and Receive
Paths
•
Microphone Amplifier Gain Set by External Resistors - Mute
Function Include d
•
Chip Disable for Active Standby Operation
•
On Board Filter Pinned-Out for User Deined Function
•
Dial Tone Detector to Inhibit Receive Idle Mode During Dial
Tone Presence
PIN ASSIGNMENT
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IL34118
SIMPLIFIED BLOCK DIAGRAM
FUNCTIONAL DESCRIPTION
INTRODUCTION
The fundamental difference between the operation
of a speakerphone and a handset is that of half-duplex
versus full-duplex. The handset is full duplex since
conversation can occur in both directions (transmit
and receive) simultaneousiy. A speakerphone has
higher gain levels in both paths, and attempting to
converse full duplex results in oscillatory problems
due to the loop that exists within the system. The loop
is formed by the receive and transmit paths, the
hybrid, and the acoustic coupling (speaker to
microphone). The only practical and economical
solution used to data is to design the speakerphone to
function in a half duplex mode - i.e., only one person
speaks at a time, while the other listens. To achieve
this requires a circuit which can detect who is talking,
switch on the appropriate path (transmit or receive),
and switch off (attenuate) the other path. In this way,
the loop gain is maintained less than unity. When the
talkers exchange function, the circuit must quickly
detect this, and switch the circuit appropriately.By
providing speech level detectors, the circuit operates
in a “hand-free” mode, eliminating the need for a
“push-to-talk” switch.
The handset, by the way, has the same loop as the
speakerphone. But since the gains are considerably
lower, and since the acoustic coupling from the
earpiece to the mouthpiece is almost non-existent (the
receiver is normally held against a person’s ear),
oscillations don’t occur.
The IL34118 provides the necessary level
detectors, attenuators, and switching control for a
properly operating speakerphone. The detection
sensitivity and timing are externally controllable.
Additionally, the IL34118 provides background noise
monitors which make the circuit insensitive to room
and line noise, hybrid amplifiers for interfacing to
Tip and Ring, the microphone amplifier, and other
associated functions.
ATTENUATORS
The transmit and receive attenuators are
complementary in function, i.e., when one is at
maximum gain (+6.0 dB), the other is at maximum
attenuation (-46 dB), and vice versa. They are never
both fully on or both fully off. The sum of their gains
remains constant (within a nominal error band of
±
0.1 dB) at a typical value of -40 dB. Their purpose
is to control the transmit and receive paths to provide
the half-duplex operation required in a speakerphone.
The attenuators are non-inverting, and have a -
3.0 dB (from max gain) freque ncy of ≈100 KHz. The
input impedance of each attenuator (TXI and RXI) is
nominally 10 kΩ (see Figure 1), and the input signal
should be limited to 350 mVrms (990 mVp-p) to
prevent distortion. That maximum
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IL34118
recommended input signal is independent of the
volume control setting. The diode clamp on the
inputs limits the input swing, and therefore the
maximum negative output swing. This is the reason
for V
RXOL
and V
specification being defined as
TXOL
they are in the Electrical Characteristics. The output
impedance is <10 Ω until the output current limit
(typically 2.5 mA) is reached.
Figure 1. Attenuator Input Stag e
The attenuators are controlled by the single output
of the Control Block, which is measurable at the C
pin (Pin 14). When the C
with respect to V
, the circuit is in the receive mode
B
(receive attenuator is at +6.0 dB). When the C
pin is at +240 millivolts
T
pin is
T
Figure 2. Level Detectors
at -240 millivolts with respect to V
, the circuit is in
B
the transmit mode (transmit attenuator is at +6.0 dB).
The circuit is in an idle mode when the C
equal to V
, causing the attenuators’ gains to be
B
halfway between their fully on and fully off positions
(-20 dB each). Monitoring the C
respect to V
) is the most direct method of
B
T
monitoring the circuit’s mode.
The inputs to the Control Block are seven: 2 from
the comparators operated by the level detectors, 2
from the background noise monitors, the volume
control, the dial-tone detector, and the AGC circuit.
These seven inputs are described below.
LEVEL DETECTORS
There are four level detectors - two on the receive
side and two on the transmit side. Refer to Figure 2 -
T
the terms in parentheses form one system, and the
other terms form the second system
voltage is
T
voltage (with
Each level detector is a high gain amplifier with
back-to-back diodes in the feedback path, resulting in
non-linear gain, which permits operation over a wide
dynamic range of speech levels. The sensitivity of
each level detector is determined by the external
resistor and capacitor at each input (TLI1, TLI2,
RLI1, and RLI2). Each output charges an external
capacitor through a diode and limiting resistor, thus
providing a dc representation of the input ac signal
level. The o utputs have a guick rise t ime (de termined
by the capacitor and an internal 350 Ω resistor), and a
slow decay time set by an internal current source and
the capacitor. The capacitors on the four outputs
should have the same value (±10%) to prevent timing
problems.
Referring to Figure 8, on the receive side, one
level detector (RLI1) is at the receive input receiving
the same signal as at Tip and Ring, and
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IL34118
the other (RLI2) is at the output of the speaker
amplifier. On the transmit side, one level detector
(TLI2) is at the output of the microphone amplifier,
while the other (TLI1) is at the hybrid output.
Outputs RLO1 and TLO1 feed a comparator, the
output of which goes to the Attenuator Control Block.
Likewise, outputs RLO2 and TLO2 feed a second
comparator which also goes to the Attenuator Control
Block. The truth table for the effects of the level
detectors on the Control Block is given in the section
describing the Control Block.
BACKGROUND NOISE MONITORS
The purpose of the background noise monitors is
to distinguish speech (which consists of bursts) from
background no ise (a relativel y constant signal level).
There are two background noise monitors - one for
the receive path and one for the transmit path.
Refering to Figure 2, the receive background noise
monitor is operated on by the RLI1-RLO1 level
detector, while the transmit background noise
monitor is operated on by the TLI2-TLO2 level
detector. They monitor the background noise by
storing a dc voltage representative of the respective
noise levels in capacitors at CPR and CPT. The
voltages at these pins have slow rise times
(determined by the external RC), but fast decay times.
If the signal at RLI1 (or TLI2) changes slowly, the
voltage at CPR (or CPT) will remain more positive
than the voltage at the non-inverting input of the
monitor’s output comparator. When speech is
present, the voltage on the noninverting input of the
comparator will rise quicker than the voltage at the
inverting input (due to the burst characteristic of
speech), causing its output to change. This output is
sensed by the Attenuator Control Block.
The 36 mV offset at the comparator’s input keeps
the comparator from changing state unless the speech
level exceeds the background noise by ≈4.0 dB. The
time constant of the external RC (≈4.7 seconds)
determines the response time to background noise
variations
VOLUME CONTROL
The volume control input at VLC (Pin 13) is
sensed as a voltage with respect to V
control affects the attenuators only in the receive
mode. It has no effect in the idle or transmit modes.
When in the receive mode, the gain of the receive
attenuator will be +6.0 dB, and the gain of the
transmit attenuator will be -46 dB only when VLC is
equal to V
. As VLC is reduced below VB,
B
. The volume
B
the gain of the receive attenuator is reduced, and the
gain of the transmit attenuator is increased such that
their sum remains constant. Changing the voltage at
VLC changes the voltage at C
(see the Attenuator
T
Control Block section), which in turn controls the
attenuators.
The volume control setting does not affect the
maximum attenuator input signal at which notice able
distortion occurs.
The bias current at VLC is typically 60 nA out of
the pin, and does not vary significantly with the VLC
voltage or with V
CC
.
DIAL TONE DETECTOR
The dial tone detector is a comparator with one
side connected to the receive input (RXI) and the
other input connected to V
with a 15 mV offset (see
B
Figure 3). If the circuit is in the receive mode, and the
incoming signal is greater than 15 mV (10 mVrms),
the comparator’s output will change, disabling the
receive idle mode. Tthe receive attenuator will then
be at a setting determined solely by the volume
control.
The purpose of this circuit is to prevent the dial
tone (which would be considered as continuous
noise) from fading away as the circuit would have the
tendency to swich to the idle mode. By disabling the
receive idle mode, the dial tone remains at the
normally expected full level.
Figure 3. Dial Tone Detector
AGS
The AGS circuit affects the circuit only in the
receive mode, and only when the supply voltage
(V
) is less than 3.5 volts. As VCC falls below
CC
3.5 volts, the gain of the receive attenuator is
reduced. The transmit path attenuation changes such
that the sum of the transmit and receive gains remains
constant.
The purpose of this feature is to reduce the power
(and current) used by the speaker when a linepowered speakerphone is connected to a long line,
where the available power is limited. By reducing the
speaker power, the voltage sag at V
preventing possible erratic operation.
is controlled,
CC
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IL34118
ATTENUATOR CONTROL BLOCK
The Attenuator Control Block has the seven
inputs described above:
- Tthe output of the comparator operated by RLO2
and TLO2 (microphone/speaker side) - designated
C1.
- The output of the comparator operated by RLO1
and TLO1 (Tip/Ring) side) - designated C2.
- The output of the transmit background noise
monitor - designated C3.
- The output of the receive background noise
monitor - designated C4.
- The volume control.
- The dial tone detector.
- The AGC circuit.
The single output of the Control Block controls
the two attenuators. The effect of C1-C4 is as
follows:
fully on (+6.0 dB), and the receive attenuator is
at max. attenuation (-46 dB).
2) “Receive” means both attenuators are controlled
by the volume control. At max. volume, the
receive attenuator is fully on (6.0 dB), and the
transmit attenuator is at max. attenuation (46 dB).
3) “Fast Idle” means both transmit and receive
speech are present in approximately equal
levels. The attenuators are quickly switched
(30 ms) to idle until one speech level dominates
the other.
4) “Slow Idle” means speech has ceassed in both
transmit and receive path. The attenuators are
then slowly switched (1 second) to the idle
mode.
5) Switching to the full transmit or receive modes
from any other mode is at the fast rate (30 ms).
A summary of the truth table is as follows:
1) The circuit will switch to transmit if: a) both
transmit level detectors sense higher signal levels
relative to the respective receive level detectors
(TLI1 versus RLI1, TLI2 versus RLI2), and b) the
transmit background noise monitor indicates the
presence of speech.
2) The circuit will switch to receive if: a) both
receive level detectors sense higher signal levels
relative to the respective transmit level detectors, and
b) the receive background noise monitor indicates the
presence of speech.
3) The circuit will switch to the fast idle mode if
the level detectors disagree on the relative strengths
of the signal levels, and at least one of the
background noise monitors indicates speech. For
example, refferring to the Expanded Logic Diagram
(Figure 8), if there is sufficient signal at the
microphone amp output (TLI2) to override the
speaker signal (RLI2), and there is sufficient signal at
the receive input (RLI1) to override the signal at the
hybrid output (TLI1), and either or both background
monitors indicate speech, then the circuit will be in
the fast idle mode. Two conditions which can cause
the fast idle mode to occur are a) when both talkers
are attempting to gain control of the system by talking
at the same time, and b) when one talker is in a very
noisy environment, forcing the other talker to
continually override that noise level. In general, the
fast idle mode will occur infrequently.
4) The circuit will switch to the slow idle mode
when a) both talkers are quiet (no speech present), or
b) when one talker’s speech level is continuously
overriden by noise at the other speaker’s location.
The time required to switch the circuit between
transmit, receive, fast idle and slow idle is determined
in part by the components at the C
schematic of the C
circuitry is shown in Figure 4 and
T
pin (Pin 14). A
T
operates as follows:
is typically 120 kΩ, and CT typically 5.0 µF.
- R
T
- To switch to the receive mode, I
is turned on (I
1
is off), charging the external capacitor to
+240 mV above V
. (An internal clamp prevents
B
further charging of the capacitor.)
- To switch to the transmit mode, I
is turned on (I
2
is off) bringing down the voltage on the capacitor
to -240 mV with respect to V
.
B
- To switch to idle quickly (fast idle), the current
sources are turned off, and the internal 2.0 k
resistor is switched in, discharging the capacitor
with a time constant = 2.0 KΩ x CT.
to V
B
- To switch to idle slowly (slow idle), the current
sources are turned off, the switch at the 2.0 k
resistor is open, and the capacitor discharges to
through the external resistor RT with a time
V
B
constant = R
x CT.
T
2
1
Ω
Ω
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IL34118
Figure 4. CT Attenuator Control Block Circuit
MICROPHONE AMPLIFIER
The microphone amplifier (Pin 10, 11) has the
noninverting input internally co nnected to V
the inverting input and the output are pinned out.
Unlike most op-amps, the amplifier has an all-NPN
output stage, which maximizes phase margin and
gain-bandwidth. This feature ensures stability at gains
less than unity, as well as with a wide range of
reactive loads. The open loop gain is typically 80 dB
(f<100 Hz), and the gain-bandwidth is typically
1.0 MHz. The maximum p-p output swing is typically
1.0 volt less than V
with an output impedance of
CC
<10 Ω until curent limiting is reached (typically
1.5 mA). Input bias current at MCI is typically 40 nA
out of the pin.
Figure 5. Microphone Amplifier and MUTE
, while
B
HYBRID AMPLIFIERS
The two hybrid amplifiers (at HTO+, HTO-, and
HTI), in conjunction with an external transformer,
provide the two-to-four wire converter for interfacing
to the telephone line. The gain of the first amplifier
(HTI to HTO-) is set by external resistors (gain = R
in Figure 8), and its output drives the second
HF/RHI
amplifier, the gain of which is internally set at -1.0.
Unlike most op-amps, the amplifiers have an all-NPN
output stage, which maximizes phase margin and
gain-bandwidth. This feature ensures stability at gains
less than unity, as well as with a wide range of
reactive loads. The open loop gain of the first
amplifier is typically 80 dB, and the gain bandwidth
of each amplifier is ≈1.0 MHz. The maximum p-p
output swing of each amplifier is typically 1.2 volts
less than V
with an output impedance of <10
CC
until current limiting is reached (typically 8.0 mA).
The output current capability is guaranteed to be a
minimum of 5.0 mA. The bias current at HTI is
typically 30 nA out of the pin.
The connections to the coupling transformer are
shown in the Expanded Logic Diagram (Figure 8).
The block labeled Zbal is the balancing network
necessary to match the line impe dance.
FILTER
The operation of the filter circuit is determined by
the external components. The circuit within the
IL34118, from pins FI to FO is a buffer with a high
input impedance (>1.0 MΩ), and a low output
impedance (<50 Ω). The configuration of the external
components determines whether the circuit is a highpass filter (as shown in Figure 8 ), a low-pass filter, or
a band-pass filter.
Figure 6. High Pass Filter
Ω
The muting function (Pin 12), when activated,
will reduce the gain of the amplifier to = -39 dB (will
RMI = 5.1 KΩ) by shorting the output to the
inverting input (see Figure 5). The mute input has a
threshold of 1.5 volt, and the voltage at this pin must
be kept withing the r ange of ground and V
. If the
CC
mute function is not used, the pin should be
grounded.
6
As a high pass filter, with the comp onents shown in
Figure 6 the filter will keep out 60 Hz (and 120 Hz)
hum which can be picked up by the external
telephone lines.
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IL34118
As a low pass filter (Figure 7), it can be used to
roll off the high and frequencies in the receive circuit,
which aids protecting against acoustic feedback
problems. With an appropriate choice of an input
coupling capacitor to the low pass filter, a band pass
filter is formed.
Figure 7. Low Pass Filter
POWER SUPPLY, VB, AND CHIP
DISABLE
The power supply voltage at VCC (Pin 4) is to be
between 3.5 and 6.5 volts for normal operation, with
reduced operation possible down to 2.8 volts.
The output vo ltage at V
(Pin 15) is ≈(VCC - 0.7)/2,
B
and provides the ac ground for the system. The output
impedance at V
the external capacitor at V
is ≈400 Ω, and in conjunction with
B
, forms a low pass filter
B
for power supply rejection.
Since V
biases the microphone and hybrid
B
amplifiers, the amount of supply rejection at their
outputs is directly related to the rejection at V
B
, as
well as their respective gains.
The Chip Disable (Pin 3) permits powering down
the IC to conserve power and/or for muting purposes.
With CD≤0.8 volts, normal operation is in effect.
With CD≥2.0 volts and ≤V
, the IC is powered
CC
down. In the powered down mode, the microphone
and the hybrid amplifiers are disabled, and their
outputs go to a high impedance state. Additionally,
the bias is removed from the filter (Pins 1, 2), the
attenuators (Pins 8, 9, 21, 22), or from Pins 13, 14,
and 15 (the attenuators are disabled, however, and
will not pass a signal). The input imp edance at CD is
typically 90 kΩ, has a threshold of ≈1.5 volts, and the
voltage at this pin must be kept within the range of
ground and V
. If CD is not used, the pin should be
CC
grounded.
PIN DESCRIPTION
Pin NoDesignationDescription
1FO
2FI
Filter output. Output impedance is less than 50Ω.
Filter input. Input impedance is greater than 1.0 MΩ.
3CDChip Disab le. A logic low (<0.8 V) sets no rmal operation. A logic high ( >2.0 V)
disables the IC to conserve power. Input impedance is nominally 90 KΩ.
4V
CC
A supply voltage of +2.8 to +6.5 Volts is required, at ≈5.0 mA. As VCC falls from
3.5 to 2.8 Volts, an AGC circuit reduces the receive attenuator gain by ≈25 dB
(when in the receive mode).
5HTO+Output of the second hybrid amplifier. The gain is internally set at -1.0 to provide a
differential output, in conjunction with HTO-, to the hybrid transformer.
6HTO-Output of the first hybrid amplifier. The gain of the amp is set by external resistors.
7HTI
Input and summing node for the first hybrid amplifier. DC level is ≈V
B.
8TXOOutput of the transmit attenuator. DC level is approximately VB.
9TXIInput to the transmit attenuator. Max. signal level is 350 mVrms. Input impedance
is ≈10 KΩ.
10MCOOutput of the microphone amplifier. The gain of the amplifier is set by external
resistors.
11MCI
Input and summing node of the microphone amplifier. DC level is ≈V
.
B
(continued)
PIN DESCRIPTION
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IL34118
Pin NoDesignationDescription
12MUTMute input. A logic low (<0.8 V) sets normal operation. A logic high (>2.0 V)
mutes the microphone amplifier without affecting the rest of the circuit. Input
impedance is nominally 90Ω.
13VLCVolume control input. When VLC = VB, the receive attenuator is at maximum gain
when in the receive mode. When VLC = 0.3 V
Does not affect the transmit mode.
14C
15V
T
B
An RC this pin sets the response time for the circuit to switch modes.
An output voltage ≈VCC/2. This voltage is a system ac ground, and biases the
volume control. A filter cap is required.
16CPTAn RC at this pin sets the time constant for the transmit background monitor.
17TLI2Input to the transmit level detector on the mike speaker side.
18TLO2Output of the transmit level detector on the mike/speaker side, and input to the
transmit background monitor.
19RLO2Output of the receive level detector on the mike/speaker side.
20RLI2Input to the receive level detector on the mike/speaker side.
21RXIInput to the receive attenuator and dial tone detector. Max input level is 350 mV
RMS. Input impedance is ≈10 KΩ.
22RXOOutput of the receive attenuator. DC level is approximately VB.
23TLI1Input to the transmit level detector on the line side.
24TLO1Output of the transmit level d etector on the line side.
25RLO1Output of the receive level detector on the line side, and input to the receive
background monitor.
26RLI1Input the receive level detector on the line side.
27CPRAn RC at this pin sets the time constant for the receive background monitor.
28GNDGround pin for the entire IC.
, the receive gain is down 35 dB.
B
MAXIMUM RATINGS
*
SymbolParameterValueUnit
V
CC
V
V
V
Supply Voltage (Pin 14)-1.0 to +7.0V
Input Voltage at CD(Pin 3), MUT (Pin 12)-1.0 toVCC +1.0 VV
IN
Input Voltage at VLC (Pin 13)-1.0 toVCC +0.5 VV
IN
Input Voltage at TXI(Pin 9), RXI (Pin 21), FI (Pin 2)-0.5 toVCC +0.5 VV
IN
TstgStorage Temperature Range-65 to +150
*
Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
8
°
C
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IL34118
RECOMMENDED OPERATING CONDITIONS
SymbolParameterMinMaxUnit
V
CC
V
IN
I
VB
V
IN
V
IN
GMicrophone Amplifier, Hybrid Amp lifier Gain040dB
I
L
T
A
This device c ontains p rote ction ci rcuitr y to guard a gainst damage d ue to high st atic voltages or electr ic
fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated
voltages to this high-impedance circuit. For proper operation, V
GND≤(V
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or V
Unused outputs must be left open.
Supply Voltage (Pin 4)3.56.5V
Input Voltage at CD (Pin 3), MUT (Pin12)0V
VB Current (Pin 15)500
Input Voltage at VLC (Pin 13)0.3 x V
B
V
Attenuator Input Signal Voltage (Pins 9, 21)0350mVrms