Datasheet FSTU3384WMX, FSTU3384WM, FSTU3384QSCX, FSTU3384QSC, FSTU3384MTCX Datasheet (Fairchild Semiconductor)
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© 1999 Fairchild Semiconductor Corporation DS500195 www.fairchildsemi.com
May 1999
Revised December 1999
FSTU3384 10-Bit Bus Switch with
FSTU3384
10-Bit Bus Switch with
−2V Undershoot Hardened Circuit (UHC) Protection
General Description
The Fairchild Switc h FSTU3384 provides 10 bits of highspeed CMOS TTL-compatible bus switches. The low on
resistance of the switch allows inp uts to be connected to
outputs without add ing propag ation del ay genera ting additional ground bounce nois e. Both the A Ports and the B
Ports are “undersh oot hardened ” with UHC pr otection to
support an extended input range to 2.0V belo w ground.
Fairchild’s integrated Undershoot Hardened Circuit, UHC
senses undershoot at the I/Os, and responds by preventing
voltage differentials from developing and turning on the
switch. The device is orga nized as two 5 -bit switches wi th
separate bus enable (OE
) signals. When OE is LOW, the
switch is ON and Port A is connected to Port B. When OE
is HIGH, the switch is OPEN and a high-impedance state
exists between the two ports.
Features
■ 4Ω switch connection between two ports
■ Undershoot Hardened to -2.0V.
■ Minimal propagation delay through the switch
■ Low l
CC
.
■ Zero ground bounce in flow-through mode
■ Control inputs compatible with TTL level
■ See Applications Note AN-5008 for details.
Ordering Code:
Devices also availab le in Tape and Reel. Specify by appending the s uffix let te r “X” to the ordering code.
Logic Diagram
Pin Descriptions
Connection Diagram
Truth T able
UHC is a trademark of Fairchild Semiconductor Corporation.
Order Number Package Number Package Description
FSTU3384WM M24B 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MO-153 4.4mm Wide
FSTU3384QSC MQA24 24-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150” Wide
FSTU3384MTC MTC24 24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Pin Names Description
OE
A, OEB Bus Switch Enable
A
0–A9
Bus A
B
0–B9
Bus B
OEAOEB
B
0–B4
B5–B
9
Function
LLA
0–A4
A5–A
9
Connect
LHA
0–A4
HIGH-Z State Connect
H L HIGH-Z State A
5–A9
Connect
H H HIGH-Z State HIGH-Z State Disconnect
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FSTU3384
Absolute Maximum Ratings(Note 1) Recommended Operating
Conditions
(Note 3)
Note 1: The “Absolute Maximum Ratings” are those values beyon d which
the safety of the dev ice cannot be guaranteed. T he device sh ould not be
operated at these limits. The paramet ric values defined in the “Electrical
Characteristics” table are not guaranteed at the absolute maximum ratings.
The “Recomme nded O peratin g Cond itions ” table will defin e the condition s
for actual device operation.
Note 2: The input and output ne gative vo ltage ra tings may be excee ded if
the input and output diode current ratings are observed.
Note 3: Unused control in puts mus t be held HI GH o r LOW. Th ey ma y no t
float.
DC Electrical Characteristics
Note 4: Measured by voltage drop between A and B pin at indicated current through the switch. On resistance is determined by the lower of the voltages on
the two (A or B) pins.
Note 5: All typical values are at V
CC
= 5.0V, TA = 25°C.
Supply Voltage (VCC) −0.5V to +7.0V
DC Switch Voltage (V
S
) −2.0V to +7.0V
DC Input Voltage (V
IN
) (Note 2) −0.5V to +7.0V
DC Input Diode Current (I
IK
) VIN<0V −50 mA
DC Output (I
OUT
) Sink Current 128 mA
DC V
CC
/GND Current (ICC/I
GND
) +/− 100mA
Storage Temperature R ange (T
STG
) −65°C to +150°C
Power Supply Operating (V
CC
) 4.0V to 5.5V
Input Voltage (V
IN
)0V to 5.5V
Output Voltage (V
OUT
)0V to 5.5V
Input Rise and Fall Time (t
r
, tf)
Switch Control Input 0nS/V to 5nS/V
Switch I/O 0nS/V to DC
Free Air Operating Temperature (T
A
) −40°C to +85°C
Symbol Parameter
V
CC
(V)
T
A
= −40°C to +85°C
Units Condition
Min
Typ
(Note 5)
Max
V
IK
Clamp Diode Voltage 4.5 −1.2 V I
IN
= − 18 mA
V
IH
HIGH Level Input Voltage 4.0-5.5 2.0 V
V
IL
LOW Level Input Voltage 4.0-5.5 0.8 V
I
I
Input Leakage Current 5.5 ±1.0 µA0 ≤ VIN ≤ 5.5V
I
OZ
OFF-STATE Leakage Current 5.5 ±1.0 µA0 ≤ A, B ≤ VCC, VIN = V
IH
R
ON
Switch On Resistance 4.5 4 7 Ω VS = 0V, IIN = 64 mA
(Note 4) 4.5 4 7 Ω V
S
= 0V, IIN = 30 mA
4.5 8 15 Ω V
S
= 2.4V, IIN = 15 mA
4.0 11 20 Ω VS = 2.4V, IIN = 15 mA
I
CC
Quiescent Supply Current 5.5 3 µAVS = VCC or GND, I
OUT
= 0
∆ I
CC
Increase in ICC per Input 5.5 2.5 mA OE input at 3.4V
Other inputs at VCC or GND
I
BIAS
Bias Pin Leakage Current 5.5 ±1.0 µAOE = 0V, B = 0V, BiasV = 5.5V
I
OZU
Switch Undershoot Current 5.5 100 µAIIN= − 20 mA, OE = 5.5V, V
OUT
≥ V
IH
V
IKU
Voltage Undershoot 5.5 −2.0 V 0.0 mA ≥ IIN ≥ − 50 mA, OE = 5.5V
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FSTU3384
AC Electrical Characteristics
Note 6: This parameter is guaran teed by d esig n but n ot tes ted . The bu s sw itch c ont ribut es n o pro pag atio n dela y ot her than the RC delay of the typical On
resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage the source (zero output impedance).
Capacitance (Note 7)
Note 7: Capacitance is characterized but not tested.
AC Loading and Waveforms
Note: Input driven by 50 Ω source terminated in 50 Ω, RU = RD = 500 Ω
Note: C
L
includes load and stray capacitance, CL= 50 pF
Note: Input PRR = 1.0 MHz, t
W
= 500 nS
FIGURE 1. AC Test Circuit
FIGURE 2. AC Waveforms
Symbol Parameter
T
A
= −40°C to +85°C
C
L
= 50 pF, RU = RD = 500Ω
Units Conditions Figure No.
V
CC
= 4.5 − 5.5V VCC = 4.0V
Min Max Min Max
t
PHL
, t
PLH
Prop Delay Bus to Bus (Note 6) 0.25 0.25 ns VI = OPEN Figure 1,
Figure 2
t
PZH
, t
PZL
Output Enable Time
1.0 5.7 6.2 ns
VI = 7V for t
PZL
Figure 1,
Figure 2
OEA, OEB to An, B
n
VI = OPEN for t
PZH
t
PHZ
, t
PLZ
Output Disable Time
1.5 5.2 5.5 ns
VI = 7V for t
PLZ
Figure 1,
Figure 2
OEA, OEB to An, B
n
VI = OPEN for t
PHZ
Symbol Parameter Typ Max Units Conditions
C
IN
Control Input Capacitance 3 pF VCC = 5.0V
C
I/O
(OFF) Input/Output Capacitance 5 pF VCC, OE = 5.0V
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FSTU3384
Physical Dimensions inches (millimeters) unless otherwise noted
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MO-153 4.4mm Wide
Package Number M24B
24-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150” Wide
Package Number MQA24
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FSTU3384 10-Bit Bus Switch with
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
24-Lead Thin Shrink Sm all Ou tline Pa ck age (TS SO P), JE DE C MO-153, 4.4mm Wide
Package Number MTC24
Technology Description
The Fairchild Switch family derives from and embodies Fairchild’s proven switch t echnology used for several years in it s
74LVX3L384 (FST3384) bus switch product.
Fairchild does not assume any responsibility for use of any circuitry described , no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are dev ic es or syste ms
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provide d in the labe l ing, can be re asonably expected to result in a significant injury to the
user.
2. A critical compo nent in any com ponen t of a life s upp ort
device or system whose failure to perform can be reasonably expected to cause the failure of the l ife support
device or system, or to affect its safety or effectiveness.
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