Datasheet FSPYE234R, FSPYE234F Datasheet (Intersil Corporation)

TM

FSPYE234R, FSPYE234F

Data Sheet June 2000

Radiation Hardened, SEGR Resistant
N-Channel Power MOSFETs

Intersil Star*Power Rad Hard
MOSFETs have been specifically
developed for high performance
applications in a commercial or

military space environment.
Star*Power MOSFETs offer the system designer both
extremely low r
development of low loss Power Subsystems. Star*Power
FETs combine this electrical capability with total dose
radiation hardness up to 300K RADs while maintaining the
guaranteed performance for Single Event Effects (SEE)
which the Intersil FS families have always featured.

The Intersil portfolio of Star*PowerFETsincludesafamily of
devices in various voltage, current and package styles. The
Star*Power family consists of Star*Power and Star*Power
Gold products.Star*Power FETsareoptimized for total dose
and r

performance while exhibiting SEE capability at

DS(ON)

full rated voltage up to an LET of 37. Star*Power Gold FETs
have been optimized for SEE and Gate Charge providing
SEE performance to 80% of the rated voltage for an LET of
82 with extremely low gate charge characteristics.

This MOSFET is an enhancement-mode silicon-gate power
field effect transistor of the vertical DMOS (VDMOS)
structure. It is specifically designed and processed to be
radiation tolerant. The MOSFET is well suited for
applications exposed to radiation environments such as
switching regulation, switching converters, power
distribution, motor drives and relay drivers as well as other
power control and conditioning applications. As with
conventional MOSFETs these Radiation Hardened
MOSFETs offer ease of voltage control, fast switching
speeds and ability to parallel switching devices.

Reliability screening is available as either TXV or Space
equivalent of MIL-S-19500.

and Gate Charge allowing the

DS(ON)

File Number 4873

Features

• 9A, 250V, r

• UIS Rated

• Total Dose

- Meets Pre-RAD Specifications to 100K RAD (Si)

- Rated to 300K RAD (Si)

• Single Event

- Safe Operating Area Curve for Single Event Effects

- SEE Immunity for LET of 36MeV/mg/cm
V

up to 100% of Rated Breakdown and

DS

V

of 10V Off-Bias

GS

• Dose Rate

- Typically Survives 3E9 RAD (Si)/s at 80% BV

- Typically Survives 2E12 if Current Limited to I

• Photo Current

- 4.0nA Per-RAD (Si)/s Typically

• Neutron

- Maintain Pre-RAD Specifications
for 1E13 Neutrons/cm

- Usable to 1E14 Neutrons/cm

DS(ON)

= 0.215Ω

2

2

with

2

Symbol

D

G

S

Packaging

SMD.5

DSS

AS

Formerly available as type TA45216W.

Ordering Information

RAD LEVEL SCREENING LEVEL PART NUMBER/BRAND

10K Engineering samples FSPYE234D1
100K TXV FSPYE234R3
100K Space FSPYE234R4
300K TXV FSPYE234F3
300K Space FSPYE234F4

1

1-888-INTERSIL or 321-724-7143 | Intersil and Design is a trademark of Intersil Corporation. | Copyright © Intersil Corporation 2000

CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.

FSPYE234R, FSPYE234F

Absolute Maximum Ratings T

= 25oC, Unless Otherwise Specified

C

FSPYE234R, FSPYE234F UNITS

Drain to Source Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V

Drain to Gate Voltage (RGS = 20kΩ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

DS

DGR

250 V
250 V

Continuous Drain Current

TC = 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I

Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V

D
D

DM

GS

9A
6A

32 A

±30 V

Maximum Power Dissipation

TC = 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .P

TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .P

T
T

42 W
17 W

Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.33 W/oC

Single Pulsed Avalanche Current, L = 100µH (See Test Figure). . . . . . . . . . . . . . . . . . . . . . . . . I

Continuous Source Current (Body Diode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

Pulsed Source Current (Body Diode). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .TJ, T

STG

Lead Temperature (During Soldering) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T

AS

S

SM

L

30 A

9A

32 A

-55 to 150
300

o

C

o

C

(Distance >0.063in (1.6mm) from Case, 10s Max)

Weight (Typical) 1.0 (Typical) g

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

Electrical Specifications TC = 25oC, Unless Otherwise Specified

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Drain to Source Breakdown Voltage BV
Gate Threshold Voltage V

DSSID

GS(TH)VGS

= 1mA, VGS = 0V 250 - - V

= VDS,

ID = 1mA

TC = -55oC - - 5.5 V
TC = 25oC 2.0 - 4.5 V
TC = 125oC 1.0 - - V

Zero Gate Voltage Drain Current I

Gate to Source Leakage Current I

DSS

GSS

VDS = 200V,
VGS = 0V

TC = 25oC--25µA
TC = 125oC - - 250 µA

VGS = ±30V TC = 25oC - - 100 nA

TC = 125oC - - 200 nA
Drain to Source On-State Voltage V
Drain to Source On Resistance r

Turn-On Delay Time t

DS(ON)VGS

DS(ON)12ID

d(ON)

Rise Time t
Turn-Off Delay Time t

d(OFF)

Fall Time t
Total Gate Charge Q
Gate Charge Source Q
Gate Charge Drain Q
Gate Charge at 20V Q
Threshold Gate Charge Q
Plateau Voltage V

(PLATEAU)ID

Input Capacitance C
Output Capacitance C
Reverse Transfer Capacitance C
Thermal Resistance Junction to Case R

r

f

g(12)

gs

gd

g(20)

g(TH)

ISS
OSS
RSS

JC

θ

= 12V, ID = 9A - - 1.98 V

= 6A,

VGS = 12V
VDD = 125V, ID = 9A,

RL = 13.9Ω, VGS = 12V,
RGS = 7.5Ω

TC = 25oC - 0.185 0.215 Ω
TC = 125oC - - 0.413 Ω

- - 20 ns

- - 25 ns

- - 30 ns

- - 15 ns

VGS = 0V to 12V VDD = 125V,

ID = 9A

-3033nC

-1012nC

- 8 10 nC
VGS = 0V to 20V - 45 - nC
VGS = 0V to 2V - 3 - nC

= 9A, VDS = 15V - 6.5 - V

VDS = 25V, VGS = 0V,
f = 1MHz

- 1400 - pF

- 200 - pF

-8-pF

- - 3.0

o

C/W

2

Source to Drain Diode Specifications

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Forward Voltage V
Reverse Recovery Time t
Reverse Recovery Charge Q

SD

rr

RR

FSPYE234R, FSPYE234F

ISD = 9A - - 1.2 V
ISD = 9A, dISD/dt = 100A/µs - - 310 ns

- 1.9 - µC

Electrical Specifications up to 300K RAD T

= 25oC, Unless Otherwise Specified

C

MIN MAX MIN MAX

PARAMETER SYMBOL TEST CONDITIONS

Drain to Source Breakdown Volts (Note 3) BV
Gate to Source Threshold Volts (Note 3) V
Gate to Body Leakage (Notes 2, 3) I
Zero Gate Leakage (Note 3) I
Drain to Source On-State Volts (Notes 1, 3) V
Drain to Source On Resistance (Notes 1, 3) r

DS(ON)12VGS

GS(TH)VGS

GSS
DSS

DS(ON)VGS

VGS = 0, ID = 1mA 250 - - - V

DSS

= VDS, ID = 1mA 2.0 4.5 1.5 4.5 V
VGS = ±30V, VDS = 0V - 100 100 nA
VGS = 0, VDS = 200V - 25 50 µA

= 12V, ID = 9A - 1.98 - 2.97 V

= 12V, ID = 6A - 0.215 - 0.270 Ω

NOTES:

1. Pulse test, 300µs Max.

2. Absolute value.

3. Insitu Gamma bias must be sampled for both VGS = 12V, VDS = 0V and VGS = 0V, VDS = 80% BV

DSS

.

Single Event Effects (SEB, SEGR) Note 4

ENVIRONMENT (NOTE 5)

TEST SYMBOL

TYPICAL LET

(MeV/mg/cm)

TYPICAL

RANGE (µ)

Single Event Effects Safe Operating Area SEESOA Br 37 36 -10 250

Br 37 36 -15 200

I 60 32 -2 200

I 60 32 -8 150
Au 82 28 0 150
Au 82 28 -5 100

NOTES:

4. Testing conducted at Brookhaven National Labs.

5. Fluence = 1E5 ions/cm2 (typical), T = 25oC.

6. Does not exhibit Single Event Burnout (SEB) or Single Event Gate Rupture (SEGR).

APPLIED

VGS BIAS

(V)

(NOTE 6)

MAXIMUM

VDSBIAS (V)ION SPECIES

UNITS100K RAD 300K RAD

Performance Curves Unless Otherwise Specified

LET = 37MeV/mg/cm
LET = 60MeV/mg/cm2, RANGE = 32µ
LET = 82MeV/mg/cm

FLUENCE = 1E5 IONS/cm2 (TYPICAL)

280

240

200

(V)

160

DS

V

120

80

40

0

0 -20

-4 -8 -12

FIGURE 1. SINGLE EVENT EFFECTS SAFE OPERATING AREA FIGURE 2. TYPICAL SEE SIGNATURE CURVE

3

2

, RANGE = 36µ

2

, RANGE = 28µ

TEMP = 25oC

V

(V)

GS

-16

(V)

DS

V

280

240

200

160

120

80

40

0

LET = 37 BROMINE

LET = 82 GOLD

LET = 60 IODINE

VGS (V)

-300 -5 -10 -15 -20 -25

FSPYE234R, FSPYE234F

Performance Curves Unless Otherwise Specified (Continued)

1E-3

1E-4

1E-5

1E-6

LIMITING INDUCTANCE (HENRY)

ILM = 10A

30A

100A

300A

10

8

6

, DRAIN (A)

4

D

I

2

1E-7

30

DRAIN SUPPLY (V)

30010010

FIGURE 3. TYPICAL DRAIN INDUCTANCEREQUIRED TO

LIMIT GAMMA DOT CURRENT TO I

100

10

1

, DRAIN CURRENT (A)

D

I

0.1

OPERATION IN THIS
AREA MAY BE
LIMITED BY r

1

V

DS

DS(ON)

10 100 1000

, DRAIN TO SOURCE VOLTAGE (V)

AS

TC = 25oC

100µs

1ms

10ms

1000

0

TC, CASE TEMPERATURE (oC)

500-50

100

FIGURE 4. MAXIMUM CONTINUOUS DRAIN CURRENT vs

TEMPERATURE

12V

V

Q

GS

G

Q

Q

CHARGE

G

GD

FIGURE 5. FORWARD BIAS SAFE OPERATING AREA FIGURE 6. BASIC GATE CHARGE WAVEFORM

150

2.5

2.0

DS(ON)

1.5

1.0

NORMALIZED r

0.5

0.0

FIGURE 7. TYPICALNORMALIZED r

PULSE DURATION = 250ms, VGS = 12V, ID = 6A

-80 -40 0 40 80 120 160
, JUNCTION TEMPERATURE (oC)

T

J

DS(ON)

vs JUNCTION

TEMPERA TURE

4

40

DESCENDING ORDER

V

= 14V

GS

V

= 12V

GS

30

V

= 10V

GS

VGS = 8V

20

10

, DRAIN TO SOURCE CURRENT (A)

D

0

I

V

, DRAIN TO SOURCE VOLTAGE (V)

DS

VGS = 6 V

FIGURE 8. TYPICAL OUTPUT CHARACTERISTICS

1086420

FSPYE234R, FSPYE234F

Performance Curves Unless Otherwise Specified (Continued)

)

10

θJC

1

0.5

0.2

0.1

0.1

0.05

0.02

0.01

0.01

NORMALIZED THERMAL RESPONSE (Z

0.001

-5

10

SINGLE PULSE

-4

10

-3

10

10

t, RECTANGULAR PULSE DURATION (s)

FIGURE 9. NORMALIZED MAXIMUM TRANSIENT THERMAL RESPONSE

100

P

+ T

DM

t

1

t

C

0

10

2

1

10

NOTES:
DUTY FACTOR: D = t

PEAK TJ = PDM x Z

-2

-1

10

1/t2

θJC

, AVALANCHE CURRENT (A)

AS

I

0.1

Test Circuits and Waveforms

ELECTRONIC SWITCH OPENS

WHEN I

V

DS

L

VARY t

TO OBTAIN

P

REQUIRED PEAK I

VGS≤ 20V

t

0V

P

CURRENT

TRANSFORMER

AS

50Ω

+

I

AS

-

DUT

50Ω

10

STARTING TJ = 25oC

STARTING TJ = 150oC

1

IF R = 0

tAV = (L) (IAS) / (1.3 RATED BV

IF R ≠ 0

= (L/R) ln [(IAS*R) / (1.3 RATED BV

t

AV

0.01

0.1 1

, TIME IN AVALANCHE (ms)

t

AV

DSS

- VDD)

DSS

- VDD) + 1]

FIGURE 10. UNCLAMPED INDUCTIVE SWITCHING

IS REACHED

AS

+

V

DD

-

50V-150V

10

BV

DSS

t

P

I

AS

t

AV

V

DS

V

DD

FIGURE 11. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 12. UNCLAMPED ENERGY WAVEFORMS

5

FSPYE234R, FSPYE234F

Test Circuits and Waveforms (Continued)

t

t

d(ON)

90%

ON

10%

t

r

PULSE WIDTH

0V

V

DD

R

L

V

DS

= 12V

V

GS

DUT

R

GS

V

DS

V

GS

10%

FIGURE 13. RESISTIVE SWITCHING TEST CIRCUIT FIGURE 14. RESISTIVE SWITCHING WAVEFORMS

t

d(OFF)

90%

t

OFF

50%50%

t

f

10%

Screening Information

Screening is performed in accordance with the latest revision in effect of MIL-S-19500, (Screening Information Table).

Delta Tests and Limits (JANTXV Equivalent, JANS Equivalent) T

PARAMETER SYMBOL TEST CONDITIONS MAX UNITS

Gate to Source Leakage Current I
Zero Gate Voltage Drain Current I
Drain to Source On Resistance r
Gate Threshold Voltage V

GSS
DSS

DS(ON)

GS(TH)

VGS = ±30V ±20 (Note 7) nA
VDS = 80% Rated Value ±25 (Note 7) µA
TC = 25oC at Rated I
ID = 1.0mA ±20% (Note 8) V

NOTES:

7. Or 100% of Initial Reading (whichever is greater).

8. Of Initial Reading.

Screening Information

TEST JANTXV EQUIVALENT JANS EQUIVALENT

Unclamped Inductive Switching V

GS(PEAK)

= 20V, L = 0.1mH; Limit = 30A V
Thermal Response tH = 10ms; VH = 25V; IH = 1A; LIMIT = 74mV tH = 10ms; VH = 25V; IH = 1A; LIMIT = 74mV
Gate Stress VGS = 45V, t = 250µsV
Pind Optional Required
Pre Burn-In Tests (Note 9) MIL-S-19500 Group A,

Subgroup 2 (All Static Tests at 25oC)

Steady State Gate
Bias (Gate Stress)

MIL-STD-750, Method 1042, Condition B
VGS = 80% of Rated Value,
TA = 150oC, Time = 48 hours

Interim Electrical Tests (Note 9) All Delta Parameters Listed in the Delta Tests

and Limits Table

Steady State Reverse
Bias (Drain Stress)

MIL-STD-750, Method 1042, Condition A
VDS = 80% of Rated Value,

TA = 150oC, Time = 160 hours
PDA 10% 5%
Final Electrical Tests (Note 9) MIL-S-19500, Group A, Subgroup 2 MIL-S-19500, Group A,

NOTE:

9. Test limits are identical pre and post burn-in.

Additional Tests

PARAMETER SYMBOL TEST CONDITIONS MAX UNITS

Safe Operating Area SOA VDS = 200V, t = 10ms 0.30 A
Thermal Impedance ∆V

SD

tH = 100ms; VH = 25V; IH = 1A 165 mV

= 25oC, Unless Otherwise Specified

C

D

±20% (Note 8) Ω

GS(PEAK)

GS

= 20V, L = 0.1mH; Limit = 30A

= 45V, t = 250µs

MIL-S-19500 Group A,
Subgroup 2 (All Static Tests at 25oC)

MIL-STD-750, Method 1042, Condition B
VGS = 80% of Rated Value,
TA = 150oC, Time = 48 hours

All Delta Parameters Listed in the Delta Tests
and Limits Table

MIL-STD-750, Method 1042, Condition A
VDS = 80% of Rated Value,
TA = 150oC, Time = 240 hours

Subgroups 2 and 3

90%

6

FSPYE234R, FSPYE234F

Rad Hard Data Packages - Intersil Power Transistors

TXV Equivalent

1. RAD HARD TXV EQUIVALENT - STANDARD DATA
PACKAGE

A. Certificate of Compliance
B. Assembly Flow Chart
C. Preconditioning - Attributes Data Sheet
D. Group A - Attributes Data Sheet
E. Group B - Attributes Data Sheet

F. Group C - Attributes Data Sheet

G. Group D - Attributes Data Sheet

2. RAD HARD TXV EQUIVALENT - OPTIONAL DATA
PACKAGE

A. Certificate of Compliance
B. Assembly Flow Chart
C. Preconditioning - Attributes Data Sheet

- Pre and Post Burn-In Read and Record
Data

D. Group A - Attributes Data Sheet
E. Group B - Attributes Data Sheet

- Pre and Post Read and Record Data for
Intermittent Operating Life (Subgroup B3)

- Bond Strength Data (Subgroup B3)

- Pre and Post High T emper atureOperating
Life Read and Record Data (Subgroup B6)

F. Group C - Attributes Data Sheet

- Pre and Post Read and Record Data for
Intermittent Operating Life (Subgroup C6)

- Bond Strength Data (Subgroup C6)

G. Group D - Attributes Data Sheet

- Pre and Post RAD Read and Record Data

Class S - Equivalents

1. RAD HARD “S” EQUIVALENT - STANDARD DATA
PACKAGE

A. Certificate of Compliance

B. Serialization Records
C. Assembly Flow Chart
D. SEM Photos and Report

E. Preconditioning - Attributes Data Sheet

- HTRB - Hi Temp Gate Stress Post
Reverse Bias Data and Delta Data

- HTRB - Hi Temp Drain Stress Post
Reverse Bias Delta Data

F. Group A - Attributes Data Sheet
G. Group B - Attributes Data Sheet
H. Group C - Attributes Data Sheet

I. Group D - Attributes Data Sheet

2. RAD HARD MAX. “S” EQUIVALENT - OPTIONAL
DATA PACKAGE

A. Certificate of Compliance

B. Serialization Records
C. Assembly Flow Chart
D. SEM Photos and Report

E. Preconditioning - Attributes Data Sheet

- HTRB - Hi Temp Gate Stress Post
Reverse Bias Data and Delta Data

- HTRB - Hi Temp Drain Stress Post
Reverse Bias Delta Data

- X-Ray and X-Ray Report

F. Group A - Attributes Data Sheet

- Subgroups A2, A3, A4, A5 and A7 Data

G. Group B - Attributes Data Sheet

- Subgroups B1, B3, B4, B5 and B6 Data

H. Group C - Attributes Data Sheet

- Subgroups C1, C2, C3 and C6 Data

I. Group D - Attributes Data Sheet

- Pre and Post Radiation Data

7

SMD.5

3 PAD CERAMIC LEADLESS CHIP CARRIER

FSPYE234R, FSPYE234F

E

SYMBOL

NOTESMIN MAX MIN MAX

A 0.112 0.124 2.84 3.15 3

b 0.090 0.100 2.28 2.54 -

D 0.291 0.301 7.39 7.64 -

INCHES MILLIMETERS

D

D

1

D

2

0.281 0.291 7.13 7.39 -

0.070 0.080 1.78 2.03 -

E 0.395 0.405 10.03 10.28 -

E

1

E

2

0.220 0.230 5.58 5.84 -

0.115 0.125 2.92 3.17 -

NOTES:

1. No current JEDEC outline for this package.

A

2. Controlling dimension: Inch.

3. Measurement prior to pre-solder coating the mounting pads.

4. Revision 4dated 5-00.

E

1

D

1

3

E

2

2

D

2

1

1 - GATE
2 - SOURCE
3 - DRAIN

b

All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.

Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with­out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However ,no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.

For information regarding Intersil Corporation and its products, see web site www.intersil.com

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8