These N-Channel logic level enhancement mode power field
effect transistors are produced using Fairchild's proprietary,
high cell density, DMOS technology. This very high density
process is especially tailored to minimize on-state resistance.
These devices are particularly suited for low voltage
applications such as DC/DC converters and high efficiency
switching circuits where fast switching, low in-line power
loss, and resistance to transients are needed.
100 A, 30 V. R
R
Critical DC electrical parameters specified at elevated
temperature.
Rugged internal source-drain diode can eliminate the need
for an external Zener diode transient suppressor.
Total Gate ChargeV
Gate-Source Charge12nC
Gate-Drain Charge18nC
= 12 V
DS
ID = 50 A, VGS= 4.5 V
1020nS
3550nC
DRAIN-SOURCE DIODE CHARACTERISTICS
I
S
ISM
V
SD
Notes
1. Calculated continuous current based on maximum allowable junction temperature. Actual maximum continuous current limited by package constraints to 75A.
Maximum Continuos Drain-Source Diode Forward Current (Note 1)100A
Maximum Pulsed Drain-Source Diode Forward Current (Note 2)300A
Drain-Source Diode Forward Voltage
VGS = 0 V, IS = 50 A (Note 2)
TJ = 125°C
11.3V
0.851.1
FDP7030L Rev.D1
Page 3
Typical Electrical Characteristics
100
V = 10V
GS
8.0
80
6.0
60
40
20
D
I , DRAIN-SOURCE CURRENT (A)
0
00.511.522.5
5.0
4.5
V , DRAIN-SOURCE VOLTAGE (V)
DS
Figure 1. On-Region Characteristics.
1.6
I = 50A
D
V = 10V
GS
1.4
1.2
1
DS(ON)
R , NORMALIZED
0.8
DRAIN-SOURCE ON-RESISTANCE
0.6
-50-250255075100 125 150 175
T , JUNCTION TEMPERATURE (°C)
J
4.0
3.5
3.0
3
V =3.5V
2.5
2
GS
4.0
4.5
1.5
DS(ON)
1
R , NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
0.5
020406080100
I , DRAIN CURRENT (A)
D
5.0
6.0
Figure 2. On-Resistance Variation with
Drain Current and Gate
Voltage.
0.025
0.02
0.015
125°C
0.01
0.005
DS(ON)
R , ON-RESISTANCE (OHM)
0
246810
25°C
V , GATE TO SOURCE VOLTAGE (V)
GS
8.0
10.0
I =50A
D
Figure 3. On-Resistance Variation
with Temperature.
60
V = 10V
DS
50
40
30
20
D
I , DRAIN CURRENT (A)
10
0
11.522.533.544.55
T = -55°C
A
25
125°C
V , GATE TO SOURCE VOLTAGE (V)
GS
Figure 5. Transfer Characteristics.
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
60
V =0V
GS
10
T = 125°C
1
0.1
0.01
0.001
S
I , REVERSE DRAIN CURRENT (A)
0.0001
00.20.40.60.811.21.4
A
25°C
-55°C
V , BODY DIODE FORWARD VOLTAGE (V)
SD
Figure 6. Body Diode Forward Voltage
Variation with Source Current
and Temperature.
FDP7030L Rev.D1
Page 4
Typical Electrical Characteristics (continued)
10
I = 50A
D
8
6
4
2
GS
V , GATE-SOURCE VOLTAGE (V)
0
020406080
Q , GATE CHARGE (nC)
g
V= 6.0V
DS
12V
24V
Figure 7. Gate Charge Characteristics.
500
300
100
50
20
10
D
I , DRAIN CURRENT (A)
DS(ON)
R Limit
V = 10V
GS
SINGLE PULSE
5
2
1
0.10.5151030 50
o
R = 1.2 C/W
JC
θ
T = 25 °C
C
V , DRAIN-SOURCE VOLTAGE (V))
DS
100ms
DC
100µs
1ms
10ms
10µs
5000
3000
C
C
iss
oss
2000
1000
500
CAPACITANCE (pF)
C
rss
f = 1 MHz
V = 0V
GS
200
125102030
V , DRAIN TO SOURCE VOLTAGE (V)
DS
Figure 8. Capacitance Characteristics.
8000
SINGLE PULSE
R =1.2° C/W
JC
6000
4000
POWER (W)
2000
0
0.010.11101001000
SINGLE PULSE TIME (ms)
θ
T = 25°C
C
Figure 9. Maximum Safe Operating Area.
Figure 10. Single Pulse Maximum Power
Dissipation.
1
0.5
0.3
0.2
0.1
0.05
0.03
0.02
r(t), NORMALIZED EFFECTIVE
TRANSIENT THERMAL RESISTANCE
0.01
0.010.050.10.51510501005001000
D = 0.5
0.2
0.1
0.05
0.02
0.01
Single Pulse
t ,TIME (ms)
1
R (t) = r(t) * R
JC
θ
R = 1.2 °C/W
JC
θ
P(pk)
t
1
t
2
T - T = P * R (t)
J
C
Duty Cycle, D = t /t
Figure 11. Transient Thermal Response Curve.
JC
θ
JC
θ
1 2
FDP7030L Rev.D1
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