This product has been designed to meet the extreme test conditions and environment demanded by the automotive industry. For
All Fairchild Semiconductor products are manufactured, assembled and tested under ISO9000 and QS9000 quality systems
a copy of the requirements, see AEC Q101 at: http://www.aecouncil.com/
certification.
®
MOSFET
FDB5800 Rev. A
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Page 4
FDB5800 N-Channel Logic Level PowerTrench
Typical Characteristics T
1.2
1.0
0.8
0.6
0.4
0.2
POWER DISSIPATION MULTIPLIER
0
0255075100175
TC, CASE TEMPERATURE (oC)
Figure 1.
Normalized Power Dissipation vs Case
= 25°C unless otherwise noted
C
125
Temperature
2
DUTY CYCLE - DESCENDING ORDER
0.5
1
0.2
0.1
0.05
0.02
0.01
0.1
, NORMALIZED
θJC
Z
THERMAL IMPEDANCE
0.01
-5
10
SINGLE PULSE
-4
10
10
140
120
100
80
60
40
, DRAIN CURRENT (A)
D
I
R
20
150
-3
t, RECTANGULAR PULSE DURATION (s)
0
Figure 2.
-2
10
Maximum Continuous Drain Current vs
CURRENT LIMITED
BY PACKAGE
VGS = 5V
= 0.62°C/W
JC
θ
5025125
TC, CASE TEMPERATURE (°C)
10015075
Case Temperature
NOTES:
DUTY FACTOR: D = t1/t
PEAK TJ = PDM x R
-1
10
P
DM
θJC
0
10
VGS =10V
2
+ T
C
®
MOSFET
t
1
t
2
1
10
1000
, PEAK CURRENT (A)
DM
I
100
50
FDB5800 Rev. A
10
VGS = 5V
-5
Figure 3.
TRANSCONDUCTANCE
MAY LIMIT CURRENT
IN THIS REGION
-4
10
Normalized Maximum Transient Thermal Impedance
TC = 25oC
FOR TEMPERATURES
ABOVE 25
CURRENT AS FOLLOWS:
I = I
-3
10
Figure 4.
Peak Current Capability
-2
10
t, PULSE WIDTH (s)
-1
10
o
C DERATE PEAK
175 - T
25
0
10
C
150
1
10
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Page 5
FDB5800 N-Channel Logic Level PowerTrench
Typical Characteristics T
1000
100
10
OPERATION IN THIS
AREA MAY BE LIMITED
BY r
, DRAIN TCURRENT (A)
D
I
Figure 5.
160
140
120
100
, DRAIN TCURRENT (A)
D
I
DS(ON)
1
SINGLE PULSE
T
= MAX RATED
J
= 25oC
T
C
0.1
1
, DRAIN TO SOURCE VOLTAGE (V)
V
DS
10
Forward Bias Safe Operating Area
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
VDS = 6V
80
60
40
20
0
025
134
VGS, GATE TO SOURCE VOLTAGE (V)
TA = 125oC
= 25°C unless otherwise noted
C
10µs
100µs
1ms
10ms
100ms
DC
100
, AVALANCHE CURRENT (A)
AS
I
NOTE: Refer to Fairchild Application Notes AN7514 and AN7515
, DRAIN TCURRENT (A)
D
TA = 25oC
TA = -55oC
I
500
100
10
Figure 6.
If R = 0
tAV = (L)(IAS)/(1.3*RATED BV
≠
If R
t
= (L/R)ln[(IAS*R)/(1.3*RATED BV
AV
STARTING TJ = 150oC
1
0.01
0.1
tAV, TIME IN AVALANCHE (ms)
Unclamped Inductive Switching
- VDD)
0
1
DSS
- VDD) +1]
DSS
STARTING TJ = 25oC
10
100
1000
Capability
160
140
120
100
80
60
40
20
0
01.02.0
10V
5.0V
0.51.5
VDS, DRAIN TO SOURCE VOLTAGE (V)
4.5V
4.0V
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
®
MOSFET
3.5V
3.0V
Figure 7.
0.016
0.014
0.012
0.010
0.008
, ON-RESISTANCE(OHM)
0.006
DS(ON)
0.004
R
0.002
2
Figure 9.
FDB5800 Rev. A
Transfer CharacteristicsFigure 8. Saturation Characteristics
ID = 20A
= 25oC
T
A
48
VGS, GATE TO SOURCE VOLTAGE (V)
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
T
= 175oC
A
610
On-Resistance Variation vs Gate-to-
Source Voltage
2.2
2.0
1.8
1.6
1.4
NORMALIZED
1.2
1.0
DRAIN TO SOURCE ON-RESISTANCE
0.8
0.6
- 8040160
Figure 10.
ID = 80A
= 10V
V
GS
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
0- 4080120
TJ, AMBIENT TEMPERATURE (oC)
Normalized Drain to Source On
Resistance vs Junction Temperature
200
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Page 6
FDB5800 N-Channel Logic Level PowerTrench
Typical Characteristics T
1.4
VGS = V
1.2
1.0
0.8
NORMALIZED GATE
0.6
THRESHOLD VOLTAGE
0.4
0.2
- 8040160
Figure 11.
Normalized Gate Threshold Voltage vs
0- 4080120200
TJ, AMBIENT TEMPERATURE (oC)
Junction Temperature
20000
10000
1000
CAPACITANCE (pF)
f = 1MHz
= 0V
V
GS
100
0.1100
VDS, DRAIN TO SOURCE VOLTAGE (V)
ID = 250µA
C
RSS
1
= 25°C unless otherwise noted
C
DS
NORMALIZED DRAIN TO SOURCE
Breakdown Voltage vs Junction Temperature
C
ISS
C
OSS
, GATE- SOURCE VOLTAGE
GS
V
10
1.2
ID = 250µA
1.1
1.0
BREAKDOWN VOLTAGE
0.9
- 8040160
Figure 12.
10
8
6
4
2
0
0- 4080120200
TJ, AMBIENT TEMPERATURE (oC)
Normalized Drain to Source
VDD =30V
WAVEFORMS IN
ASCENDING ORDER:
ID = 80A
ID = 1A
20060100
4080
Qg, GATE CHARGE (nC)
®
MOSFET
Figure 13.
FDB5800 Rev. A
Capacitance vs Drain to Source
Voltage
Figure 14.
Gate Charge Waveforms for Constant
Gate Current
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Page 7
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systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
PRODUCT STA TUS DEFINITIONS
Definition of Terms
Datasheet IdentificationProduct StatusDefinition
Advance Information
Preliminary
No Identification Needed
Formative or
In Design
First Production
Full Production
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. I16
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