Datasheet DM81LS97AN, DM81LS95AWM, DM81LS95AN Datasheet (Fairchild Semiconductor)

DM81LS95A • DM81LS96A • DM81LS97A
3-STATE Octal Buffer

DM81LS95A • DM81LS96A • DM81LS97A 3-STATE Octal Buffer

September 1991
Revised May 1999

General Description

These devices provide eight, two-input buffers in each
package. All employ low-po wer-Schottky TTL technology.
One of the two in puts to each buffer is used as a control
line to gate the output into the high-im pedan ce state, whi le
the other input passes the data through the buffer. The
DM81LS95A and DM81LS97A present true data at the out­puts, while the DM81LS96A is inverting. On the
DM81LS95A and DM81LS96A versions, all eigh t 3-STATE
enable lines are common, w ith access through a 2-input
NOR gate. On the DM81LS97A vers ion, four buffers are
enabled from one commo n line, and the other four buffers
are enabled form anoth er common line. In all cases the
outputs are placed in the 3-STATE condition by applying a
high logic level to the enable pins.

Features

■ Typical power dissipation
DM81LS95A, DM81LS97A 80 mW
DM81LS96A 65 mW

■ Typical propagation delay
DM81LS95A, DM81LS97A 15 ns
DM81LS96A 10 ns

■ Low power-Schottky, 3-STAT E technology

Ordering Code:

Order Number Package Number Package Description

DM81LS95AWM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
DM81LS95AN N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
DM81LS96AWM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
DM81LS96AN N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
DM81LS97AN N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

Devices also availab le in Tape and Reel. Specify by appending th e s uffix let t er “X” to the ordering cod e.

Connection Diagram Pin Descriptions

DM81LS95A and DM92 LS96A

Pin Names Descriptions

A1–A8 Inputs
Y1–Y8 Outputs

1–G2

G

Note 1: Both G1 and G2 must be LOW for outpu ts t o be enabled.

Pin Names Descriptions

A1–A8 Inputs
Y1–Y8 Outputs

1

G

2

G

Active LOW Output Enables (Note 1)

DM81LS97A

Active LOW Output Enable (Y1–Y4)
Active LOW Output Enable (Y5–Y8)

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Logic Symbols

DM81LS95A

Truth Tables

1G2A Y

G

H X X Hi-Z
X H X Hi-Z
LLHH
LLLL

DM81LS95A

Inputs Output

DM81LS95A • DM81LS96A • DM81LS97A

DM81LS96A

DM81LS97A

DM81LS96A

Inputs Output

1G2A Y

G

H X X Hi-Z
X H X Hi-Z
LLH L
LLL H

DM81LS97A

Inputs Output

1 A1–A4 Y1–Y4

G

H X Hi-Z
LHH
LLL

2 A5–A6 Y5–Y8

G

H X Hi-Z
LHH
LLL

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Absolute Maximum Ratings(Note 2)

Supply Voltage 7V
Input Voltage 7V
Operating Free Air Temperature Range 0°C to +70°C
Storage Temperature Range −65°C to +150°C

Note 2: The Absolute Maximum Ratings are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The Recommende d Operating Con ditions table will def ine the conditions
for actual device operation.

Recommended Operating Conditions

Symbol Parameter Min Nom Max Units

V

CC

V

IH

V

IL

I

OH

I

OL

T

A

Supply Voltage 4.75 5 5.25 V
HIGH Level Input Voltage 2 V
LOW Level In put Voltage 0.8 V
HIGH Level Output Current −5.2 mA
LOW Level Ou tput Current 24 mA
Free Air Operating Temperature 0 70 °C

DM81LS95A • DM81LS96A • DM81LS97A

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DC Electrical Characteristics DM81LS95A and DM81LS97A

over recommended operating free air temperature range (unless otherwise noted)

Symbol Parameter Conditions Min

V

I

V

OH

V

OL

I

I

I

IH

I

IL

I

OZH

I

OZL

DM81LS95A • DM81LS96A • DM81LS97A

I

OS

I

CC

Note 3: All typicals are at VCC = 5V, TA = 25°C.
Note 4: Both G

Note 5: Both G
Note 6: Not more than one output should be shorted at a time, and the duration should not exceed one second.

Input Clamp Voltage VCC = Min, II = −18 mA −1.5 V
HIGH Level Output Voltage VCC = Min, IOH = Max

VIL = Max, VIH = Min

LOW Level Output Voltage VCC = Min, IOL = Max

IOL = 12 mA, VCC = Min 0.4
Input Current @ Max VCC = Max, VI = 7V
Input Voltage
HIGH Level Input Current VCC = Max, VI = 2.7V 20 µA
LOW Level Input Current VCC = Max VI = 0.5V A (Note 4) −20

VI = 0.4V A (Note 5) −50

G −50

Off-State Output Current VCC = Max, VO = 2.4V

Voltage Applied
Off-State Output Current VCC = Max, VO = 0.4V

Voltage Applied
Short Circuit VCC = Max
Output Current (Note 6)
Supply Current VCC = Max (Note 4) 16 26 mA

inputs are at 2V.
inputs are at 0.4V.

Typ

(Note 3)

Max Units

2.7 V

0.5

0.1 mA

µA

20 µAwith HIGH Level Output VIH = Min, VIL = Max

−20 µAwith LOW Level Output VIH = Min, VIL = Max

−20 −100 mA

VIOL = Max, VIH = Min

AC Electrical Characteristics DM81LS95A and DM81LS97A

VCC = 5V, TA = 25°C

Symbol Parameter

t

PLH

Propagation Delay Time
LOW-to-HIGH Level Output

t

PHL

Propagation Delay Time
HIGH-to-LOW Level Output

t

PZH

Output Enable Time
to HIGH Level Output

t

PZL

Output Enable Time
to LOW Level Output

t

PHZ

Output Disable Time
from HIGH Level Output (Note 7)

t

PLZ

Output Disable Time
from LOW Level Output (Note 7)

Note 7: CL = 5 pF .

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Min Max Min Max

RL = 667 Ω

UnitsCL = 50 pF CL = 150 pF

16 25 ns

28 40 ns

25 30 ns

30 42 ns

20 ns

27 ns

DC Electrical Characteristics DM81LS96A

over recommended operating free air temperature range (unless otherwise noted)

Symbol Parameter Conditions Min

V

I

V

OH

V

OL

I

I

I

IH

I

IL

I

OZH

I

OZL

I

OS

I

CC

Note 8: All typicals are at VCC = 5V, TA = 25°C.
Note 9: Both G
Note 10: Both G
Note 11: Not more than one output should be shorted at a t im e, and the duration shou ld not exceed one second.

Input Clamp Voltage VCC = Min, II = −18 mA −1.5 V
HIGH Level Output Voltage VCC = Min, IOH = Max

VIL = Max, VIH = Min

LOW Level Output Voltage VCC = Min, IOL = Max

IOL = 12 mA, VCC = Min 0.4
Input Current @ Max VCC = Max, VI = 7V
Input Voltage
HIGH Level Input Current VCC = Max, VI = 2.7V 20 µA
LOW Level Input Current VCC = Max VI = 0.5V A (Note 9) −20

VI = 0.4V A (Note 10) −50

G

Off-State Output Current VCC = Max, VO = 2.4V

Voltage Applied
Off-State Output Current VCC = Max, VO = 0.4V

Voltage Applied
Short Circuit VCC = Max
Output Current (Note 11)
Supply Current VCC = Max (Note 10) 13 21 mA

inputs are at 2V.

inputs are at 0.4V.

Typ

(Note 8)

Max Units

2.7 V

0.5

0.1 mA

µA

−50

20 µAwith HIGH Level Output VIH = Min, VIL = Max

−20 µAwith LOW Level Output VIH = Min, VIL = Max

−20 −100 mA

DM81LS95A • DM81LS96A • DM81LS97A

VIOL = Max, VIH = Min

AC Electrical Characteristics DM81LS96A

VCC = 5V, TA = 25°C

Symbol Parameter

t

PLH

t

PHL

t

PZH

t

PZL

t

PHZ

t

PLZ

Note 12: CL = 5 pF.

Propagation Delay Time
LOW-to-HIGH Level Output
Propagation Delay Time
HIGH-to-LOW Level Output
Output Enable Time
to HIGH Level Output
Output Enable Time
to LOW Level Output
Output Disable Time
from HIGH Level Output (Note 12)
Output Disable Time
from LOW Level Output (Note 12)

RL = 667 Ω

UnitsCL = 50 pF CL = 150 pF

Min Max Min Max

10 16 ns

17 30 ns

15 30 ns

35 45 ns

20 ns

27 ns

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Physical Dimensions inches (millimeters) unless otherwise noted

DM81LS95A • DM81LS96A • DM81LS97A

20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide

Package Number M20B

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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

DM81LS95A • DM81LS96A • DM81LS97A 3-STATE Octal Buffer

20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent license s are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:

1. Life support de vices o r syst ems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provide d in the labe l ing, can be re a­sonably expected to result in a significant injury to the
user.

Package Number N20A

2. A critica l compo nent in any componen t of a life s uppor t
device or system whose failu re to perform can b e rea­sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.

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