CTLST CAT28C16AKI-20T, CAT28C16AKA-20T, CAT28C16AK-20T, CAT28C16AJI-20T, CAT28C16AJA-20T Datasheet

CAT28C16A

16K-Bit CMOS PARALLEL E2PROM

FEATURES

■ Fast Read Access Times: 200 ns

■ Low Power CMOS Dissipation:

–Active: 25 mA Max.
–Standby: 100 µA Max.

■ Simple Write Operation:

–On-Chip Address and Data Latches
–Self-Timed Write Cycle with Auto-Clear

■ Fast Write Cycle Time: 10ms Max

DESCRIPTION

The CAT28C16A is a fast, low power, 5V-only CMOS
Parallel E2PROM organized as 2K x 8-bits. It requires a
simple interface for in-system programming. On-chip
address and data latches, self-timed write cycle with
auto-clear and VCC power up/down write protection
eliminate additional timing and protection hardware.
DATA Polling signals the start and end of the self-timed
write cycle. Additionally, the CAT28C16A features hard­ware write protection.

■ End of Write Detection:

■ Hardware Write Protection

■ CMOS and TTL Compatible I/O

■ 10,000 Program/Erase Cycles

■ 10 Year Data Retention

■ Commercial, Industrial and Automotive

DATADATA

DATA Polling

DATADATA

Temperature Ranges

The CAT28C16A is manufactured using Catalyst’s ad­vanced CMOS floating gate technology. It is designed to
endure 10,000 program/erase cycles and has a data
retention of 10 years. The device is available in JEDEC
approved 24-pin DIP and SOIC or 32-pin PLCC pack­ages.

BLOCK DIAGRAM

A4–A

10

V

CC

CE
OE

WE

A0–A

3

© 1998 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice

ADDR. BUFFER

& LATCHES

INADVERTENT

WRITE

PROTECTION

CONTROL

LOGIC

TIMER

ADDR. BUFFER

& LATCHES

DECODER

HIGH VOLTAGE

GENERATOR

DATA POLLING

COLUMN

DECODER

1

ROW

2,048 x 8
E2PROM

ARRAY

I/O BUFFERS

I/O0–I/O

7

Doc. No. 25033-00 2/98

5089 FHD F02

CAT28C16A

PIN CONFIGURATION

DIP Package (P)

PLCC Package (N)SOIC Package (J,K)

A
A
A
A
A
A
A
A

7

I/O

6

I/O

5

I/O

4

V

SS

3

I/O
I/O
I/O

V

A
A
A
A
A
A
A
A

SS

1

24
23
22
21
20
19
18
17
16
15
14
13

V
A
A
WE
OE
A
CE
I/O
I/O
I/O
I/O
I/O

CC
8
9

10

7

2

6

3

5

4

4

5

3

6

2

7

1

8

0

9

0

10

1

11

2

12

PIN FUNCTIONS

Pin Name Function

A0–A

10

I/O0–I/O

7

CE Chip Enable
OE Output Enable
WE Write Enable

Address Inputs
Data Inputs/Outputs

24
23
22
21
20
19
18
17
16
15
14
13

V
A
A
WE
OE
A
CE
I/O
I/O
I/O
I/O
I/O

CC
8
9

10

A7NCNCNC

4321323130

5

A

6

6

A

5

7

A

4

8

A

3

9

A

I/O

A
A

NC

2
1
0

0

7
6
5
4
3

TOP VIEW
10
11
12
13

14 15 16 17 18 19 20

2

I/O1I/O

V

SS

VCCWE

NC

I/O3I/O4I/O

NC

29
28
27
26
25
24
23
22
21

5

5089 FHD F01

A
A
NC
NC
OE
A
CE
I/O
I/O

8
9

10

7
6

1

7

2

6

3

5

4

4

5

3

6

2

7

1

8

0

9

0

10

1

11

2

12

V

CC

V

SS

5V Supply
Ground

NC No Connect

MODE SELECTION

Mode CE WE OE I/O Power

Read L H L D
Byte Write (WE Controlled) L H D
Byte Write (CE Controlled) L H D

OUT
IN
IN

ACTIVE
ACTIVE

ACTIVE
Standby, and Write Inhibit H X X High-Z STANDBY
Read and Write Inhibit X H H High-Z ACTIVE

CAPACITANCE TA = 25°C, f = 1.0 MHz, VCC = 5V

Symbol Test Max. Units Conditions

(1)

C

I/O

(1)

C

IN

Note:
(1) This parameter is tested initially and after a design or process change that affects the parameter.

Input/Output Capacitance 10 pF V

I/O

= 0V

Input Capacitance 6 pF VIN = 0V

Doc. No. 25033-00 2/98

2

CAT28C16A

ABSOLUTE MAXIMUM RATINGS*

Temperature Under Bias ................. –55°C to +125°C

Storage Temperature....................... –65°C to +150°C

Voltage on Any Pin with

Respect to Ground

VCC with Respect to Ground ............... –2.0V to +7.0V

Package Power Dissipation

Capability (Ta = 25°C)................................... 1.0W

(2)

........... –2.0V to +VCC + 2.0V

*COMMENT

Stresses above those listed under “Absolute Maximum
Ratings” may cause permanent damage to the device.
These are stress ratings only, and functional operation
of the device at these or any other conditions outside of
those listed in the operational sections of this specifica­tion is not implied. Exposure to any absolute maximum
rating for extended periods may affect device perfor­mance and reliability.

Lead Soldering Temperature (10 secs) ............ 300°C

Output Short Circuit Current

(3)

........................ 100 mA

RELIABILITY CHARACTERISTICS

Symbol Parameter Min. Max. Units Test Method

(1)

N
T
V
I

LTH

END
DR
ZAP

(1)

(1)

(1)(4)

Endurance 10,000 Cycles/Byte MIL-STD-883, Test Method 1033
Data Retention 10 Years MIL-STD-883, Test Method 1008
ESD Susceptibility 2000 Volts MIL-STD-883, Test Method 3015
Latch-Up 100 mA JEDEC Standard 17

D.C. OPERATING CHARACTERISTICS

VCC = 5V ±10%, unless otherwise specified.

Limits

Symbol Parameter Min. Typ. Max. Units Test Conditions

I

CC

VCC Current (Operating, TTL) 35 mA CE = OE = VIL,

f = 1/tRC min, All I/O’s Open

(5)

I

CCC

VCC Current (Operating, CMOS) 25 mA CE = OE = V

ILC

,

f = 1/tRC min, All I/O’s Open

I

SB

I

SBC

(6)

VCC Current (Standby, TTL) 1 mA CE = VIH, All I/O’s Open
VCC Current (Standby, CMOS) 100 µA CE = V

IHC

,

All I/O’s Open

I

LI

I

LO

(6)

V

IH

(5)

V

IL

V

OH

V

OL

V

WI

Note:
(1) This parameter is tested initially and after a design or process change that affects the parameter.
(2) The minimum DC input voltage is –0.5V. During transitions, inputs may undershoot to –2.0V for periods of less than 20 ns. Maximum DC

voltage on output pins is VCC +0.5V, which may overshoot to VCC +2.0V for periods of less than 20 ns.
(3) Output shorted for no more than one second. No more than one output shorted at a time.
(4) Latch-up protection is provided for stresses up to 100mA on address and data pins from –1V to VCC +1V.
(5) V
(6) V

= –0.3V to +0.3V.

ILC

= VCC –0.3V to VCC +0.3V.

IHC

Input Leakage Current –10 10 µAVIN = GND to V
Output Leakage Current –10 10 µAV

= GND to VCC,

OUT

CE = V

IH

High Level Input Voltage 2 VCC +0.3 V
Low Level Input Voltage –0.3 0.8 V
High Level Output Voltage 2.4 V IOH = –400µA
Low Level Output Voltage 0.4 V IOL = 2.1mA
Write Inhibit Voltage 3.0 V

3

CC

Doc. No. 25033-00 2/98