COMPAL LA-6052P Schematics

A
1 1
B
C
D
E
Compal confidential
2 2
Hamburg 10ADG
NALAE LA-6052P Schematics Document
Mobile AMD S1G4/ RS880M / SB820M
3 3
2009-11-27 Rev. 0.2
4 4
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2008-09-25 2009-09-25
2008-09-25 2009-09-25
2008-09-25 2009-09-25
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
D
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
401851
401851
401851
153Wednesday, January 20, 2010
153Wednesday, January 20, 2010
153Wednesday, January 20, 2010
E
A
A
A
of
of
of
A
B
C
D
E
Compal Confidential
Model Name : NALAE File Name : LA-6052P
1 1
CRT
page 17
LCD Conn.
page 18
HDMI Conn.
page 19
2 2
Thermal Sensor Fan Control
ADM1032ARMZ
page 7
page 5
Madison & Park
Page 35,36,37,38,39 40,41,42,43
AMD S1G4 CPU
uFCPGA-638 Package
page 5,6,7,8
Hyper Transport Link 2.6GHz
16X16
AMD
RS880M
page 11,12,13,14,15
A-Link Express II
Memory BUS(DDRIII)
Dual Channel
1.5V DDRIII 1066/1333MHZ
PCIe 4x
1.5V 2.5GHz(250MB/s)
200pin DDRIII-SO-DIMM X2
BANK 0, 1, 2, 3
PCIeMini Card WLAN
USB Port 8
RTL 8105E 10/100
PCIe Port 2
page 28
PCIe port 3
page 26
page 9,10
RJ45
page 26
4X PCI-E
SATA port 0
5V 1.5GHz(150MB/s)
AMD
page 28
page 28
Card Reader
USB port 5
page 27
Int. Camera
USB port 9
page 18
USB
5V 480MHz
SB820M
page 20,21,22,23,24
SATA port 1
5V 1.5GHz(150MB/s)
SATA port 3
5V 1.5GHz(150MB/s)
USB port 2
5V 480MHz
USB/B
USB port 0,1
BT conn
USB port 6
3 3
SATA HDD
page 25
SATA ODD
page 25
eSATA
page 25
Clock Generator
3.3V 24.576MHz/48Mhz
SLG8SP626
RTC CKT.
Power On/Off CKT.
DC/DC Interface CKT.
Power Circuit DC/DC
4 4
page 16
page 20
page 33
page 34
page 44,45,46.47 48,49,50,51
ODD/B
page 25
Power/B
page 33
Audio & USB/B
page 33
LED/B
page 33
Touch Pad/B
page 33
Debug Port
page 32
Int.KBD
page 32
LPC BUS
3.3V 33 MHz
ENE KB926 D3
page 31
HD Audio
SPI ROM
page 32
Int.
MIC CONN
page 18
HDA Codec
ALC259Q
MDC 1.5 Conn
page 32 page 29
MIC CONN
page 30
HP CONN
page 30
SPK CONN
page 30
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2008-09-25 2009-09-25
2008-09-25 2009-09-25
2008-09-25 2009-09-25
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
D
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
401851
401851
401851
253Wednesday, January 20, 2010
253Wednesday, January 20, 2010
253Wednesday, January 20, 2010
E
A
A
A
of
of
of
5
4
3
2
1
DESIGN CURRENT 0.1A
B+
RT8205EGQW
Ipeak = 5A, Imax = 3.5A, Iocp_min = 7.7A
Ipeak = 5A, Imax = 3.5A, Iocp_min = 7.9A
D D
N-CHANNEL
SI4800
SUSP
SUSP#
MP2121DQ
WOL_EN#
P-CHANNEL
AO3413
N-CHANNEL
SI4800
C C
NALAE Hamburg AMD DIS
POK
RT8209BGQW
Ipeak = 12A, Imax = 8.4A, Iocp_min = 18.7A
VLDT_EN#
N-CHANNEL
SUSP
P-CHANNEL
AO3413
P-CHANNEL
AO3413
APL5508
VGA_ENVDD
BT_PWR#
DESIGN CURRENT 0.1A
DESIGN CURRENT 5A
DESIGN CURRENT 5A
DESIGN CURRENT 2A
DESIGN CURRENT 2.5A
DESIGN CURRENT 330mA
DESIGN CURRENT 1.5A
DESIGN CURRENT 1A
DESIGN CURRENT 180mA
DESIGN CURRENT 300mA
DESIGN CURRENT 12A
DESIGN CURRENT 3.5A
IRF8113
N-CHANNEL
VLDT_EN#
DESIGN CURRENT 6A
IRF8113
VR_ON
Ipeak = 36A, Imax = 25.2A, Iocp_min = 54A
ISL6265A
B B
SYSON
RT8209BGQW
SUSP#
A A
APW7138NITRL
Ipeak = 11A, Imax = 7.7A, Iocp_min = 19.16A
SUSP
N-CHANNEL
IRF8113
VR_ON#
APL5331KAC
APL5331KAC
SUSP
SUSP#
APL5930KAI
Ipeak = 20A, Imax = 14A, Iocp_min = 20.14A
DESIGN CURRENT 36A
DESIGN CURRENT 4A
DESIGN CURRENT 11A
DESIGN CURRENT 5A
DESIGN CURRENT 1A
DESIGN CURRENT 1.5A
DESIGN CURRENT 2.5A
DESIGN CURRENT 20A
+CPU_CORE_0
+3VL
+5VL +3VALW +5VALW
+5VS
+1.8VS
+3V_LAN
+3VS
+LCD_VDD
+BT_VCC
+2.5VS
+1.1VALW
+1.1VS
+NB_CORE
+VDDNB
+1.5V
+1.5VS
+0.75VS
+1.05VS
+1.0VS
+VGA_CORE
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2008-09-25 2009-09-25
2008-09-25 2009-09-25
2008-09-25 2009-09-25
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
401851
401851
401851
353Wednesday, January 20, 2010
353Wednesday, January 20, 2010
353Wednesday, January 20, 2010
1
A
A
A
of
of
of
A
Voltage Rails
O : ON X : OFF
B
Symbol Note :
: Digital Ground
C
Platform Danube
S1G4 SB820M
D
NB
RS880M
VGA NA
E
CommentCPU SB
: Analog Ground
+5VS
1 1
2 2
S5 S4/ Battery only
S5 S4/AC & Battery don't exist
State
S0
S1
S3
S5 S4/AC
power plane
B+
+3VL +5VL
+RTCVCC
O O O O O
X
+5VALW +3VALW +1.1VALW
O O O O
X XX X
+3VS +2.5VS +1.8VS +1.5VS +1.1VS +1.05VS
+1.5V
+0.75VS +VGA_CORE +VDDNB +CPU_CORE
+NB_CORE
OO OO
O
X XX X
X
@ : just reserve , no build
Function
Description (Y)
Explain
BTO
GPU
Manhattan
M9X
BTO (Build-To-Order) Option Table
BLUE TOOTH
( B )
BT@
HDMI
H@
RS880M SB820MS1G4
MADISON
RS880M SB820MS1G4 RS880M SB820MS1G4
SB820MRS880MS1G4 PARK M96 M92
CommentCPU SBNB VGA
MANHA@+MADISON@ or PARK@+ +4PCS or 8PCS
M9X@+M92@ +4PCS or 8PCS
SMBUS Control Table
I2C / SMBUS ADDRESSING
DEVICE
DDR SO-DIMM 0
3 3
DDR SO-DIMM 1 CLOCK GENERATOR (EXT.)
HEX
A0
D2
EC SM Bus1 address
Device Address Smart Battery HDMI-CEC EC KB926D4
HEX 16H 34H
0001 011X b 0011 010X b
ADDRESS
1 0 1 0 0 0 0 X 1 0 1 0 0 0 1 XA2 1 1 0 1 0 0 1 0
EC SM Bus2 address
Device ADI1032-1 CPU ADI1032-2 VGA EC KB926D3
HEX 98H 9AH
Address
1001 100X b 1001 101X b
EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2 I2C_CLK I2C_DATA DDC_CLK0 DDC_DATA0
SCL0 SDA0 SCL1 SDA1
SOURCE
KB926
KB926
RS880M
RS880M
SB820
SB820
BATT
V
CPU THERMAL SENSOR
V
SODIMM
I / II
CLK GEN
VV
WLAN
V
LCD DDC ROM
V
HDMI DDC ROM
V
4 4
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2008-09-25 2009-09-25
2008-09-25 2009-09-25
2008-09-25 2009-09-25
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
D
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
401851
401851
401851
453Wednesday, January 20, 2010
453Wednesday, January 20, 2010
453Wednesday, January 20, 2010
E
A
A
A
of
of
of
A
+1.1VS
250 mil
1
C1
C1 10U_0805_10V4Z
10U_0805_10V4Z
1 1
2
1
C2
C2 10U_0805_10V4Z
10U_0805_10V4Z
2
Near CPU SocketVLDT CAP.
1
C3
C3
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
1
C4
C4
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
B
1
C5
C5 180P_0402_50V8J
180P_0402_50V8J
2
1
C6
C6 180P_0402_50V8J
180P_0402_50V8J
2
C
D
E
VLDT_B0 VLDT_B1 VLDT_B2 VLDT_B3
H_CADOP[0..15] H_CADON[0..15]
+1.1VS
+VLDT_B
AE2 AE3 AE4 AE5
AD1 AC1 AC2 AC3 AB1 AA1 AA2 AA3 W2 W3 V1 U1 U2 U3 T1 R1 AD4 AD3 AD5 AC5 AB4 AB3 AB5 AA5 Y5 W5 V4 V3 V5 U5 T4 T3
Y1 W1 Y4 Y3
R2 R3 T5 R5
1 2
H_CADOP0 H_CADON0 H_CADOP1 H_CADON1 H_CADOP2 H_CADON2 H_CADOP3 H_CADON3 H_CADOP4 H_CADON4 H_CADOP5 H_CADON5 H_CADOP6 H_CADON6 H_CADOP7 H_CADON7 H_CADOP8 H_CADON8 H_CADOP9 H_CADON9 H_CADOP10 H_CADON10 H_CADOP11 H_CADON11 H_CADOP12 H_CADON12 H_CADOP13 H_CADON13 H_CADOP14 H_CADON14 H_CADOP15 H_CADON15
H_CADOP[0..15] <11> H_CADON[0..15] <11>H_CADIN[0..15]<11>
C7
C7 10U_0805_10V4Z
10U_0805_10V4Z
< To NB >< From NB >
H_CLKOP0 <11> H_CLKON0 <11> H_CLKOP1 <11> H_CLKON1 <11>
H_CTLOP0 <11> H_CTLON0 <11> H_CTLOP1 <11> H_CTLON1 <11>
< VLDT_A & VLDT_B : HyperTransport I/O ring power >
J2
2
JUMP_43X118@J2JUMP_43X118@
112
+1.5V_CPU+1.5V
H_CADIP[0..15]<11>
2 2
H_CLKIP0<11> H_CLKIN0<11> H_CLKIP1<11> H_CLKIN1<11>
H_CTLIP0<11>
3 3
H_CTLIN0<11> H_CTLIP1<11> H_CTLIN1<11>
H_CADIP[0..15] H_CADIN[0..15]
VLDT=500mA
H_CADIP0 H_CADIN0 H_CADIP1 H_CADIN1 H_CADIP2 H_CADIN2 H_CADIP3 H_CADIN3 H_CADIP4 H_CADIN4 H_CADIP5 H_CADIN5 H_CADIP6 H_CADIN6 H_CADIP7 H_CADIN7 H_CADIP8 H_CADIN8 H_CADIP9 H_CADIN9 H_CADIP10 H_CADIN10 H_CADIP11 H_CADIN11 H_CADIP12 H_CADIN12 H_CADIP13 H_CADIN13 H_CADIP14 H_CADIN14 H_CADIP15 H_CADIN15
+1.1VS
JCPUA
JCPUA
D1
VLDT_A0
D2
VLDT_A1
D3
VLDT_A2
D4
VLDT_A3
E3
L0_CADIN_H0
E2
L0_CADIN_L0
E1
L0_CADIN_H1
F1
L0_CADIN_L1
G3
L0_CADIN_H2
G2
L0_CADIN_L2
G1
L0_CADIN_H3
H1
L0_CADIN_L3
J1
L0_CADIN_H4
K1
L0_CADIN_L4
L3
L0_CADIN_H5
L2
L0_CADIN_L5
L1
L0_CADIN_H6
M1
L0_CADIN_L6
N3
L0_CADIN_H7
N2
L0_CADIN_L7
E5
L0_CADIN_H8
F5
L0_CADIN_L8
F3
L0_CADIN_H9
F4
L0_CADIN_L9
G5
L0_CADIN_H10
H5
L0_CADIN_L10
H3
L0_CADIN_H11
H4
L0_CADIN_L11
K3
L0_CADIN_H12
K4
L0_CADIN_L12
L5
L0_CADIN_H13
M5
L0_CADIN_L13
M3
L0_CADIN_H14
M4
L0_CADIN_L14
N5
L0_CADIN_H15
P5
L0_CADIN_L15
J3
L0_CLKIN_H0
J2
L0_CLKIN_L0
J5
L0_CLKIN_H1
K5
L0_CLKIN_L1
N1
L0_CTLIN_H0
P1
L0_CTLIN_L0
P3
L0_CTLIN_H1
P4
L0_CTLIN_L1
FOX_PZ6382A-284S-41F_Champlian
FOX_PZ6382A-284S-41F_Champlian
HT LINK
HT LINK
L0_CADOUT_H0
L0_CADOUT_L0
L0_CADOUT_H1
L0_CADOUT_L1
L0_CADOUT_H2
L0_CADOUT_L2
L0_CADOUT_H3
L0_CADOUT_L3
L0_CADOUT_H4
L0_CADOUT_L4
L0_CADOUT_H5
L0_CADOUT_L5
L0_CADOUT_H6
L0_CADOUT_L6
L0_CADOUT_H7
L0_CADOUT_L7
L0_CADOUT_H8
L0_CADOUT_L8
L0_CADOUT_H9
L0_CADOUT_L9
L0_CADOUT_H10
L0_CADOUT_L10
L0_CADOUT_H11
L0_CADOUT_L11
L0_CADOUT_H12
L0_CADOUT_L12
L0_CADOUT_H13
L0_CADOUT_L13
L0_CADOUT_H14
L0_CADOUT_L14
L0_CADOUT_H15
L0_CADOUT_L15
L0_CLKOUT_H0 L0_CLKOUT_L0 L0_CLKOUT_H1 L0_CLKOUT_L1
L0_CTLOUT_H0
L0_CTLOUT_L0
L0_CTLOUT_H1
L0_CTLOUT_L1
< FAN Control Circuit : Vout = 1.6 x Vset >
+5VS
1A
GND GND GND GND
C1119
C1119
8 7 6 5
2
1
B
2
C1121
C1121
@
@
1000P_0402_25V8J
1000P_0402_25V8J
1
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
+FAN1
JFAN
JFAN
1
1
2
2
3
3
4
GND
5
GND
ACES_85204-0300N@
ACES_85204-0300N@
2008-09-25 2009-09-25
2008-09-25 2009-09-25
2008-09-25 2009-09-25
+3VS
12
R795
R795 10K_0402_5%
10K_0402_5%
2
C1122
C1122
@
@
0.01U_0402_25V7K
0.01U_0402_25V7K
1
Deciphered Date
Deciphered Date
Deciphered Date
FAN_SPEED1 <31>
D
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
401851
401851
401851
553Wednesday, January 20, 2010
553Wednesday, January 20, 2010
553Wednesday, January 20, 2010
E
of
of
of
A
A
A
+FAN1
1
C1120
C1120 10U_0805_10V4Z
10U_0805_10V4Z
2
4 4
EN_DFAN1<31>
A
10U_0805_10V4Z
10U_0805_10V4Z
U31
U31
1
EN
2
VIN
3
VOUT
4
VSET
APL5607KI-TRG_SO8
APL5607KI-TRG_SO8
A
< DDR2 VREF is 0.5 ratio >
+1.5V_CPU
R1
R1 1K_0402_1%
1K_0402_1%
1 2
R2
R2
1 1
1K_0402_1%
1K_0402_1%
1 2
2 2
+1.5V_CPU
< To SO_DIMMA >
< To SO_DIMMA >
< To SO_DIMMA >
< To SO_DIMMA >
< To SO_DIMMA >
3 3
< To SO_DIMMA >
< To SO_DIMMA >
+MCH_REF
1
C9
C9
0.1U_0402_16V7K
0.1U_0402_16V7K
2
Place them close to CPU within 1"
DDR_A_ODT0<9> DDR_A_ODT1<9>
DDR_CS0_DIMMA#<9> DDR_CS1_DIMMA#<9> DDR_CS0_DIMMB# <10>
DDR_CKE0_DIMMA<9> DDR_CKE1_DIMMA<9>
DDR_A_CLK0<9> DDR_A_CLK#0<9>
DDR_A_CLK1<9> DDR_A_CLK#1<9> DDR_A_MA[15..0]<9>
DDR_A_BS#0<9> DDR_A_BS#1<9> DDR_A_BS#2<9>
DDR_A_RAS#<9> DDR_A_CAS#<9> DDR_A_WE#<9>
1
C8
C8 1000P_0402_25V8J
1000P_0402_25V8J
2
R4 39.2_0402_1%R4 39.2_0402_1%
1 2
R5 39.2_0402_1%R5 39.2_0402_1%
1 2
MEM_MA_RST#<9>
JCPUB
JCPUB
D10
VDDR1
MEM:CMD/CTRL/CLK
MEM:CMD/CTRL/CLK
C10
VDDR2
B10
VDDR3
AD10
MEM_P MEM_N VTT_SENSE
MEM_MA_RST#
DDR_A_ODT0 DDR_A_ODT1
DDR_CS0_DIMMA# DDR_CS1_DIMMA# DDR_CS0_DIMMB#
DDR_CKE0_DIMMA DDR_CKE1_DIMMA
DDR_A_CLK0 DDR_A_CLK#0
DDR_A_CLK1 DDR_A_CLK#1
DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_MA14 DDR_A_MA15
DDR_A_BS#0 DDR_A_BS#1 DDR_A_BS#2
DDR_A_RAS# DDR_A_CAS# DDR_A_WE#
VDDR4
AF10
MEMZP
AE10
MEMZN
H16
MA_RESET_L
T19
MA0_ODT0
V22
MA0_ODT1
U21
MA1_ODT0
V19
MA1_ODT1
T20
MA0_CS_L0
U19
MA0_CS_L1
U20
MA1_CS_L0
V20
MA1_CS_L1
J22
MA_CKE0
J20
MA_CKE1
N19
MA_CLK_H5
N20
MA_CLK_L5
E16
MA_CLK_H1
F16
MA_CLK_L1
Y16
MA_CLK_H7
AA16
MA_CLK_L7
P19
MA_CLK_H4
P20
MA_CLK_L4
N21
MA_ADD0
M20
MA_ADD1
N22
MA_ADD2
M19
MA_ADD3
M22
MA_ADD4
L20
MA_ADD5
M24
MA_ADD6
L21
MA_ADD7
L19
MA_ADD8
K22
MA_ADD9
R21
MA_ADD10
L22
MA_ADD11
K20
MA_ADD12
V24
MA_ADD13
K24
MA_ADD14
K19
MA_ADD15
R20
MA_BANK0
R23
MA_BANK1
J21
MA_BANK2
R19
MA_RAS_L
T22
MA_CAS_L
T24
MA_WE_L
FOX_PZ6382A-284S-41F_Champlian
FOX_PZ6382A-284S-41F_Champlian
B
VDDR5 VDDR6 VDDR7 VDDR8 VDDR9
VDDR_SENSE
MEMVREF
MB_RESET_L
MB0_ODT0 MB0_ODT1 MB1_ODT0
MB0_CS_L0 MB0_CS_L1 MB1_CS_L0
MB_CKE0 MB_CKE1
MB_CLK_H5 MB_CLK_L5 MB_CLK_H1 MB_CLK_L1 MB_CLK_H7 MB_CLK_L7 MB_CLK_H4 MB_CLK_L4
MB_ADD0 MB_ADD1 MB_ADD2 MB_ADD3 MB_ADD4 MB_ADD5 MB_ADD6 MB_ADD7 MB_ADD8
MB_ADD9 MB_ADD10 MB_ADD11 MB_ADD12 MB_ADD13 MB_ADD14 MB_ADD15
MB_BANK0 MB_BANK1 MB_BANK2
MB_RAS_L MB_CAS_L
MB_WE_L
+1.05VS+1.05VS
W10 AC10 AB10
< VTT regulator voltage >
AA10 A10
Y10
+MCH_REF
W17
MEM_MB_RST#
B18
DDR_B_ODT0
W26
DDR_B_ODT1
W23 Y26
V26
DDR_CS1_DIMMB#
W25 U22
DDR_CKE0_DIMMB
J25
DDR_CKE1_DIMMB
H26
DDR_B_CLK0
P22
DDR_B_CLK#0
R22 A17 A18 AF18 AF17
DDR_B_CLK1
R26
DDR_B_CLK#1
R25
DDR_B_MA0
P24
DDR_B_MA1
N24
DDR_B_MA2
P26
DDR_B_MA3
N23
DDR_B_MA4
N26
DDR_B_MA5
L23
DDR_B_MA6
N25
DDR_B_MA7
L24
DDR_B_MA8
M26
DDR_B_MA9
K26
DDR_B_MA10
T26
DDR_B_MA11
L26
DDR_B_MA12
L25
DDR_B_MA13
W24
DDR_B_MA14
J23
DDR_B_MA15
J24
DDR_B_BS#0
R24
DDR_B_BS#1
U26
DDR_B_BS#2
J26
DDR_B_RAS#
U25
DDR_B_CAS#
U24
DDR_B_WE#
U23
T1PAD T1PAD
MEM_MB_RST# <10>
DDR_B_ODT0 <10> DDR_B_ODT1 <10>
DDR_CS1_DIMMB# <10>
DDR_CKE0_DIMMB <10> DDR_CKE1_DIMMB <10>
DDR_B_CLK0 <10> DDR_B_CLK#0 <10>
DDR_B_CLK1 <10> DDR_B_CLK#1 <10>
DDR_B_MA[15..0] <10>
DDR_B_BS#0 <10> DDR_B_BS#1 <10> DDR_B_BS#2 <10>
DDR_B_RAS# <10> DDR_B_CAS# <10> DDR_B_WE# <10>
C
< To SO_DIMMB >
< To SO_DIMMB >
< To SO_DIMMB >
< To SO_DIMMB >
< To SO_DIMMB >
< To SO_DIMMB >
< To SO_DIMMB >
D
E
< Processor DDR3 Memory Interface >
JCPUC
DDR_B_D[63..0]<10>
< From/To SO_DIMMB >
DDR_B_DM[7..0]<10> DDR_A_DM[7..0] <9>
< To SO_DIMMB > < To SO_DIMMA >
DDR_B_DQS0<10> DDR_B_DQS#0<10> DDR_B_DQS1<10> DDR_B_DQS#1<10> DDR_B_DQS2<10> DDR_B_DQS#2<10> DDR_B_DQS3<10> DDR_B_DQS#3<10> DDR_B_DQS4<10> DDR_B_DQS#4<10> DDR_B_DQS5<10> DDR_B_DQS#5<10> DDR_B_DQS6<10> DDR_B_DQS#6<10> DDR_B_DQS7<10> DDR_B_DQS#7<10>
< From/To SO_DIMMB > < From/To SO_DIMMA >
DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63
DDR_B_DM0 DDR_B_DM1 DDR_B_DM2 DDR_B_DM3 DDR_B_DM4 DDR_B_DM5 DDR_B_DM6 DDR_B_DM7
DDR_B_DQS0 DDR_B_DQS#0 DDR_B_DQS1 DDR_B_DQS#1 DDR_B_DQS2 DDR_B_DQS#2 DDR_B_DQS3 DDR_B_DQS#3 DDR_B_DQS4 DDR_B_DQS#4 DDR_B_DQS5 DDR_B_DQS#5 DDR_B_DQS6 DDR_B_DQS#6 DDR_B_DQS7 DDR_B_DQS#7
JCPUC
MEM:DATA
MB_DATA0 MB_DATA1 MB_DATA2 MB_DATA3 MB_DATA4 MB_DATA5 MB_DATA6 MB_DATA7 MB_DATA8 MB_DATA9 MB_DATA10 MB_DATA11 MB_DATA12 MB_DATA13 MB_DATA14 MB_DATA15 MB_DATA16 MB_DATA17 MB_DATA18 MB_DATA19 MB_DATA20 MB_DATA21 MB_DATA22 MB_DATA23 MB_DATA24 MB_DATA25 MB_DATA26 MB_DATA27 MB_DATA28 MB_DATA29 MB_DATA30 MB_DATA31 MB_DATA32 MB_DATA33 MB_DATA34 MB_DATA35 MB_DATA36 MB_DATA37 MB_DATA38 MB_DATA39 MB_DATA40 MB_DATA41 MB_DATA42 MB_DATA43 MB_DATA44 MB_DATA45 MB_DATA46 MB_DATA47 MB_DATA48 MB_DATA49 MB_DATA50 MB_DATA51 MB_DATA52 MB_DATA53 MB_DATA54 MB_DATA55 MB_DATA56 MB_DATA57 MB_DATA58 MB_DATA59 MB_DATA60 MB_DATA61 MB_DATA62 MB_DATA63
MB_DM0 MB_DM1 MB_DM2 MB_DM3 MB_DM4 MB_DM5 MB_DM6 MB_DM7
MB_DQS_H0 MB_DQS_L0 MB_DQS_H1 MB_DQS_L1 MB_DQS_H2 MB_DQS_L2 MB_DQS_H3 MB_DQS_L3 MB_DQS_H4 MB_DQS_L4 MB_DQS_H5 MB_DQS_L5 MB_DQS_H6 MB_DQS_L6 MB_DQS_H7 MB_DQS_L7
MEM:DATA C11 A11 A14 B14 G11 E11 D12 A13 A15 A16 A19 A20 C14 D14 C18 D18 D20 A21 D24 C25 B20 C20 B24 C24 E23 E24 G25 G26 C26 D26 G23 G24
AA24 AA23 AD24 AE24 AA26 AA25 AD26 AE25 AC22 AD22 AE20 AF20 AF24 AF23 AC20 AD20 AD18 AE18 AC14 AD14 AF19 AC18 AF16 AF15 AF13 AC12 AB11
Y11
AE14 AF14 AF11 AD11
A12 B16 A22 E25
AB26 AE22 AC16 AD12
C12 B12 D16 C16 A24 A23 F26 E26
AC25 AC26 AF21 AF22 AE16 AD16 AF12 AE12
FOX_PZ6382A-284S-41F_Champlian
FOX_PZ6382A-284S-41F_Champlian
MA_DATA0 MA_DATA1 MA_DATA2 MA_DATA3 MA_DATA4 MA_DATA5 MA_DATA6 MA_DATA7 MA_DATA8
MA_DATA9 MA_DATA10 MA_DATA11 MA_DATA12 MA_DATA13 MA_DATA14 MA_DATA15 MA_DATA16 MA_DATA17 MA_DATA18 MA_DATA19 MA_DATA20 MA_DATA21 MA_DATA22 MA_DATA23 MA_DATA24 MA_DATA25 MA_DATA26 MA_DATA27 MA_DATA28 MA_DATA29 MA_DATA30 MA_DATA31 MA_DATA32 MA_DATA33 MA_DATA34 MA_DATA35 MA_DATA36 MA_DATA37 MA_DATA38 MA_DATA39 MA_DATA40 MA_DATA41 MA_DATA42 MA_DATA43 MA_DATA44 MA_DATA45 MA_DATA46 MA_DATA47 MA_DATA48 MA_DATA49 MA_DATA50 MA_DATA51 MA_DATA52 MA_DATA53 MA_DATA54 MA_DATA55 MA_DATA56 MA_DATA57 MA_DATA58 MA_DATA59 MA_DATA60 MA_DATA61 MA_DATA62 MA_DATA63
MA_DM0 MA_DM1 MA_DM2 MA_DM3 MA_DM4 MA_DM5 MA_DM6 MA_DM7
MA_DQS_H0
MA_DQS_L0
MA_DQS_H1
MA_DQS_L1
MA_DQS_H2
MA_DQS_L2
MA_DQS_H3
MA_DQS_L3
MA_DQS_H4
MA_DQS_L4
MA_DQS_H5
MA_DQS_L5
MA_DQS_H6
MA_DQS_L6
MA_DQS_H7
MA_DQS_L7
G12 F12 H14 G14 H11 H12 C13 E13 H15 E15 E17 H17 E14 F14 C17 G17 G18 C19 D22 E20 E18 F18 B22 C23 F20 F22 H24 J19 E21 E22 H20 H22 Y24 AB24 AB22 AA21 W22 W21 Y22 AA22 Y20 AA20 AA18 AB18 AB21 AD21 AD19 Y18 AD17 W16 W14 Y14 Y17 AB17 AB15 AD15 AB13 AD13 Y12 W11 AB14 AA14 AB12 AA12
E12 C15 E19 F24 AC24 Y19 AB16 Y13
G13 H13 G16 G15 C22 C21 G22 G21 AD23 AC23 AB19 AB20 Y15 W15 W12 W13
DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9
DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63
DDR_A_DM0 DDR_A_DM1 DDR_A_DM2 DDR_A_DM3 DDR_A_DM4 DDR_A_DM5 DDR_A_DM6 DDR_A_DM7
DDR_A_DQS0 DDR_A_DQS#0 DDR_A_DQS1 DDR_A_DQS#1 DDR_A_DQS2 DDR_A_DQS#2 DDR_A_DQS3 DDR_A_DQS#3 DDR_A_DQS4 DDR_A_DQS#4 DDR_A_DQS5 DDR_A_DQS#5 DDR_A_DQS6 DDR_A_DQS#6 DDR_A_DQS7 DDR_A_DQS#7
DDR_A_D[63..0] <9>
< From/To SO_DIMMA >
DDR_A_DQS0 <9> DDR_A_DQS#0 <9> DDR_A_DQS1 <9> DDR_A_DQS#1 <9> DDR_A_DQS2 <9> DDR_A_DQS#2 <9> DDR_A_DQS3 <9> DDR_A_DQS#3 <9> DDR_A_DQS4 <9> DDR_A_DQS#4 <9> DDR_A_DQS5 <9> DDR_A_DQS#5 <9> DDR_A_DQS6 <9> DDR_A_DQS#6 <9> DDR_A_DQS7 <9> DDR_A_DQS#7 <9>
4 4
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2008-09-25 2009-09-25
2008-09-25 2009-09-25
2008-09-25 2009-09-25
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
D
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
401851
401851
401851
653Wednesday, January 20, 2010
653Wednesday, January 20, 2010
653Wednesday, January 20, 2010
E
A
A
A
of
of
of
A
< Filtered PLL Supply Voltage >
12
R10
R10 169_0402_1%
169_0402_1%
+2.5VDDA+2.5VS
+2.5VDDA
1
C14
C14
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
CPU_CLKIN_SC_P
CPU_CLKIN_SC_N
R40 300_0402_5%R40 300_0402_5%
+1.5V_CPU
+1.5V_CPU
1 2 R39 220_0402_5%R39 220_0402_5%
R38 220_0402_5%R38 220_0402_5% R37 220_0402_5%R37 220_0402_5% R36 220_0402_5%R36 220_0402_5%
L1 FBM_L11_201209_300L_0805L1 FBM_L11_201209_300L_0805
1 2
1
+
+
C11
C11
@
@
150U_B2_6.3VM_R45M
150U_B2_6.3VM_R45M
2
1 1
< 200-MHz PLL Reference Clock >
CLK_CPU_BCLK<16>
CLK_CPU_BCLK#<16>
2 2
+1.5V_CPU
R22 510_0402_5%R22 510_0402_5%
R28 1K_0402_5%R28 1K_0402_5% R27 510_0402_5%R27 510_0402_5% R29 1K_0402_5%R29 1K_0402_5% R30 1K_0402_5%R30 1K_0402_5% R31 1K_0402_5%R31 1K_0402_5% R32 1K_0402_5%R32 1K_0402_5% R33 1K_0402_5%R33 1K_0402_5% R34 1K_0402_5%R34 1K_0402_5% R265 1K_0402_5%R265 1K_0402_5% R35 1K_0402_5%R35 1K_0402_5%
3 3
LDT_RST#<20>
H_PWRGD<20,50>
4 4
LDT_STOP#<12,20>
1
C12
C12
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
C16
C16 3900P_0402_50V7K
3900P_0402_50V7K
1 2
C15
C15 3900P_0402_50V7K
3900P_0402_50V7K
1 2
Address:100_1100 Place close to CPU wihtin 1.5"
12 12
1 2
12 12 12 12 12 12 12 12
+1.5VS
R17
R17 300_0402_5%
300_0402_5%
1 2
LDT_RST#
1
C17
C17
@
@
0.01U_0402_25V7K
0.01U_0402_25V7K
2
+1.5VS
R21
R21 300_0402_5%
300_0402_5%
1 2
H_PWRGD
1
C19
C19
@
@
0.1U_0402_16V7K
0.1U_0402_16V7K
2
+1.5VS
R18
R18 300_0402_5%
300_0402_5%
1 2
LDT_STOP#
1
C18
C18
@
@
0.01U_0402_25V7K
0.01U_0402_25V7K
2
A
VDDA=300mA
1
C13
C13 3300P_0402_50V7-K
3300P_0402_50V7-K
2
CPU_TEST25H
CPU_TEST27
CPU_TEST25L
CPU_TEST12 CPU_TEST18 CPU_TEST19 CPU_TEST20 CPU_TEST21 CPU_TEST22 CPU_TEST23 CPU_TEST24
1 2 1 2 1 2 1 2
B
B
+1.5V_CPU +1.5V_CPU
+1.1VS
1 2
R12 1K_0402_5%R12 1K_0402_5%
1 2
R14 1K_0402_5%R14 1K_0402_5% R15 44.2_0402_1%R15 44.2_0402_1%
1 2
R16 44.2_0402_1%R16 44.2_0402_1%
1 2
CPU_VDD0_RUN_FB_H<50> CPU_VDD0_RUN_FB_L<50>
CPU_VDD1_RUN_FB_H<50> CPU_VDD1_RUN_FB_L<50>
CPU_DBREQ# CPU_DBRDY CPU_TCK CPU_TMS CPU_TDI CPU_TRST# CPU_TDO
+1.5V_CPU
+2.5VDDA
CPU_CLKIN_SC_P CPU_CLKIN_SC_N
LDT_RST# H_PWRGD LDT_STOP#
CPU_VDD0_RUN_FB_H CPU_VDD0_RUN_FB_L
CPU_VDD1_RUN_FB_H CPU_VDD1_RUN_FB_L
1 2
CPU_DBRDY CPU_TMS CPU_TCK CPU_TRST# CPU_TDI
CPU_TEST23 CPU_TEST18
CPU_TEST19 CPU_TEST25H
CPU_TEST25L CPU_TEST21
CPU_TEST20 CPU_TEST24 CPU_TEST22 CPU_TEST12 CPU_TEST27
R24
R24 0_0402_5%
0_0402_5%
T2 PADT2 PAD
CPU_SIC CPU_SID
CPU_HTREF0 CPU_HTREF1
< HDT Connector >
JP2
JP2
2
1
4
3
6
5
8
7
10
9
12
11
14
13
16
15
18
17
20
19
22
21
2423 26
SAMTEC_ASP-68200-07
@ SAMTEC_ASP-68200-07
@
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
JCPUD
JCPUD
F8
VDDA1
F9
VDDA2
A9
CLKIN_H
A8
CLKIN_L
B7
RESET_L
A7
PWROK
F10
LDTSTOP_L
C6
LDTREQ_L
AF4
SIC
AF5
SID
AE6
ALERT_L
R6
HT_REF0
P6
HT_REF1
F6
VDD0_FB_H
E6
VDD0_FB_L
Y6
VDD1_FB_H
AB6
VDD1_FB_L
G10
DBRDY
AA9
TMS
AC9
TCK
AD9
TRST_L
AF9
TDI
AD7
TEST23
H10
TEST18
G9
TEST19
E9
TEST25_H
E8
TEST25_L
AB8
TEST21
AF7
TEST20
AE7
TEST24
AE8
TEST22
AC8
TEST12
AF8
TEST27
C2
TEST9
AA6
TEST6
A3
RSVD1
A5
RSVD2
B3
RSVD3
B5
RSVD4
C1
RSVD5
FOX_PZ6382A-284S-41F_Champlian
FOX_PZ6382A-284S-41F_Champlian
LDT_RST#
2008-09-25 2009-09-25
2008-09-25 2009-09-25
2008-09-25 2009-09-25
C
VSS
RSVD11
SVC SVD
THERMTRIP_L
PROCHOT_L
MEMHOT_L
THERMDC THERMDA
VDDIO_FB_H VDDIO_FB_L
VDDNB_FB_H VDDNB_FB_L
DBREQ_L
TDO
TEST28_H
TEST28_L
TEST17 TEST16 TEST15 TEST14
TEST7
TEST10
TEST8
TEST29_H
TEST29_L
RSVD10
RSVD9 RSVD8 RSVD7 RSVD6
M11 W18
CPU_SVC
A6
CPU_SVD
A4
< Serial VID Interface clock & data >
CPU_THERMTRIP#_R
AF6
CPU_PROCHOT#
AC7 AA8
W7 W8
W9 Y9
H6 G6
E10 AE9
J7 H8
D7 E7 F7 C7
C3 K8
C4
C9 C8
H18 H19 AA7 D5 C5
T3PAD T3PAD
THERMDC_CPU THERMDA_CPU
route as differential as short as possible testpoint under package
CPU_VDDNB_RUN_FB_H CPU_VDDNB_RUN_FB_L
CPU_DBREQ#
CPU_TDO
CPU_TEST17 CPU_TEST16 CPU_TEST15 CPU_TEST14
CPU_TEST29_H_FBCLKOUT_P CPU_TEST29_L_FBCLKOUT_N
C20
C20
0.1U_0402_16V7K
0.1U_0402_16V7K
Deciphered Date
Deciphered Date
Deciphered Date
+3VS
T4PAD T4PAD T5PAD T5PAD T6PAD T6PAD T7PAD T7PAD
1
2
+1.5V_CPU
D
CPU_SVC <50> CPU_SVD <50>
+1.5V_CPU
CPU_VDDNB_RUN_FB_H <50> CPU_VDDNB_RUN_FB_L <50>
1 2
R7 1K_0402_5%R7 1K_0402_5%
1 2
CPU_THERMTRIP#_R
12
R25 80.6_0402_1%R25 80.6_0402_1%
THERMDA_CPU THERMDC_CPU
C21
C21
1 2
3300P_0402_50V7-K
3300P_0402_50V7-K
< noise filter cap >
D
E
CPU_SVC CPU_SVD
R11
R11
R6
R6 10K_0402_5%
10K_0402_5%
MMBT3904_NL_SOT23-3
MMBT3904_NL_SOT23-3
< Thermal Sensor >
300_0402_5%
300_0402_5%
1 2
CPU_PROCHOT#
B
B
2
Q1
Q1
E
E
3 1
C
C
U1
U1
1
VDD
2
D+
3
D­THERM#4GND
ADM1032ARM-1 ZREEL_MSOP8
ADM1032ARM-1 ZREEL_MSOP8
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
1 2
8
SCLK
7
SDATA
6
ALERT#
5
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
1 2 1 2
R13
@R13
@
0_0402_5%
0_0402_5%
H_THERMTRIP# <21>
EC_SMB_CK2 EC_SMB_DA2
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
401851
401851
401851
E
R191K_0402_5% R191K_0402_5% R201K_0402_5% R201K_0402_5%
H_PROCHOT# <20>
EC_SMB_CK2 <31,43> EC_SMB_DA2 <31,43>
of
of
of
753Wednesday, January 20, 2010
753Wednesday, January 20, 2010
753Wednesday, January 20, 2010
+1.5V_CPU
A
A
A
A
VDD decoupling : +CPU_CORE
+CPU_CORE
1
2
C89
C89
330U_X_2VM_R6M
330U_X_2VM_R6M
1
C45
C45 22U_0805_6.3V6M
22U_0805_6.3V6M
2
1
C51
C51
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
1
C67
C67 180P_0402_50V8J
180P_0402_50V8J
2
1
C72
C72
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
1
C58
C58
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
1
C77
C77
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
1
C43
C43 22U_0805_6.3V6M
22U_0805_6.3V6M
2
1
+
+
C25
C25 330U_X_2VM_R6M
330U_X_2VM_R6M
2
1
+
C24
@+C24
@
2
A
1
+
+
C26
C26 330U_X_2VM_R6M
330U_X_2VM_R6M
2
1 1
1
+
+
+
+
@
@ C23
C23
2
330U_2.5V_M
330U_2.5V_M
Near CPU Socket
330U_X_2VM_R6M
330U_X_2VM_R6M
VDDIO decoupling : DDR SDRAM I/O ring power
+1.5V_CPU
1
C44
C44 22U_0805_6.3V6M
22U_0805_6.3V6M
2
Under CPU Socket
+1.5V_CPU
2 2
1
C54
C54
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
Between CPU Socket and DIMM
+1.5V_CPU
1
C64
C64
0.01U_0402_25V7K
0.01U_0402_25V7K
2
Between CPU Socket and DIMM
+1.5V_CPU
180PF Qt'y follow the distance between CPU socket and DIMM0. <2.5inch>
1
C66
C66 180P_0402_50V8J
180P_0402_50V8J
2
Between CPU Socket and DIMM
+1.5V_CPU
3 3
1
C71
C71
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
Between CPU Socket and DIMM
+1.05VS
VDDR decoupling.
1
C57
C57
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
Near CPU Socket Right side
+1.05VS
1
C76
C76
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
Near CPU Socket Left side
4 4
+VDDNB decoupling : Northbridge power
+VDDNB
1
C42
C42 22U_0805_6.3V6M
22U_0805_6.3V6M
2
+CPU_CORE +CPU_CORE
1
C35
C35 22U_0805_6.3V6M
22U_0805_6.3V6M
2
1
C34
C34 22U_0805_6.3V6M
22U_0805_6.3V6M
2
Under CPU Socket
+CPU_CORE +CPU_CORE+CPU_CORE
1
+
+
2
330U_2.5V_M
330U_2.5V_M
1
2
1
2
1
C30
C30
C90
C90
22U_0805_6.3V6M
22U_0805_6.3V6M
2
Under CPU Socket
1
C46
C46
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
1
C52
C52
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
1
C65
C65
0.01U_0402_25V7K
0.01U_0402_25V7K
2
1
C68
C68 180P_0402_50V8J
180P_0402_50V8J
2
1
C73
C73
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
C59
C59
0.22U_0603_16V4Z
0.22U_0603_16V4Z
C78
C78
0.22U_0603_16V4Z
0.22U_0603_16V4Z
1
C49
C49 22U_0805_6.3V6M
22U_0805_6.3V6M
2
1
2
1
C47
C47
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
1
C53
C53
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
1
C69
C69 180P_0402_50V8J
180P_0402_50V8J
2
1
C74
C74
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
1
C60
C60
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
1
C79
C79
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
C31
C31 22U_0805_6.3V6M
22U_0805_6.3V6M
1
C48
C48 180P_0402_50V8J
180P_0402_50V8J
2
390U_2.5V_M_R10
390U_2.5V_M_R10
@
@
1
C61
C61 1000P_0402_25V8J
1000P_0402_25V8J
2
1
C80
C80 1000P_0402_25V8J
1000P_0402_25V8J
2
B
1
C28
C28 22U_0805_6.3V6M
22U_0805_6.3V6M
2
1
C32
C32 22U_0805_6.3V6M
22U_0805_6.3V6M
2
1
C50
C50 180P_0402_50V8J
180P_0402_50V8J
2
C56 Co-layout with C75
+1.5V_CPU
1
+
+
C56
C56
2
1
+
+
C75
C75
2
330U_D2E_2.5VM_R6M
330U_D2E_2.5VM_R6M
1
C62
C62 1000P_0402_25V8J
1000P_0402_25V8J
2
1
C81
C81 1000P_0402_25V8J
1000P_0402_25V8J
2
B
1
C29
C29 22U_0805_6.3V6M
22U_0805_6.3V6M
2
1
C33
C33 22U_0805_6.3V6M
22U_0805_6.3V6M
2
1
C63
C63 180P_0402_50V8J
180P_0402_50V8J
2
1
C82
C82 180P_0402_50V8J
180P_0402_50V8J
2
1
C36
C36
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
Under CPU SocketNear CPU Socket
1
C39
C39
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
Under CPU Socket
1
C70
C70 180P_0402_50V8J
180P_0402_50V8J
2
1
C83
C83 180P_0402_50V8J
180P_0402_50V8J
2
C
1
C37
C37
0.01U_0402_25V7K
0.01U_0402_25V7K
2
1
C40
C40
0.01U_0402_25V7K
0.01U_0402_25V7K
2
1
C38
C38 180P_0402_50V8J
180P_0402_50V8J
2
1
C41
C41 180P_0402_50V8J
180P_0402_50V8J
2
C1124 Co-layout with C1125
+1.05VS
1
+
+
C1124
C1124
390U_2.5V_M_R10
390U_2.5V_M_R10
2
+1.05VS
330U_D2E_2.5VM
330U_D2E_2.5VM
@
@
1
C1125
C1125
+
+
2
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2008-09-25 2009-09-25
2008-09-25 2009-09-25
2008-09-25 2009-09-25
Deciphered Date
Deciphered Date
Deciphered Date
+CPU_CORE
+VDDNB
+1.5V_CPU
D
JCPUE
JCPUE
G4
VDD0_1
H2
VDD0_2
J9
VDD0_3
J11
VDD0_4
J13
VDD0_5
J15
VDD0_6
K6
VDD0_7
K10
VDD0_8
K12
VDD0_9
K14
VDD0_10
L4
VDD0_11
L7
VDD0_12
L9
VDD0_13
L11
VDD0_14
L13
VDD0_15
L15
VDD0_16
M2
VDD0_17
M6
VDD0_18
M8
VDD0_19
M10
VDD0_20
N7
VDD0_21
N9
VDD0_22
N11
VDD0_23
K16
VDDNB_1
M16
VDDNB_2
P16
VDDNB_3
T16
VDDNB_4
V16
VDDNB_5
H25
VDDIO1
J17
VDDIO2
K18
VDDIO3
K21
VDDIO4
K23
VDDIO5
K25
VDDIO6
L17
VDDIO7
M18
VDDIO8
M21
VDDIO9
M23
VDDIO10
M25
VDDIO11
N17
VDDIO12
FOX_PZ6382A-284S-41F_Champlian
FOX_PZ6382A-284S-41F_Champlian
JCPUF
JCPUF
AA4
VSS1
AA11
VSS2
AA13
VSS3
AA15
VSS4
AA17
VSS5
AA19
VSS6
AB2
VSS7
AB7
VSS8
AB9
VSS9
AB23
VSS10
AB25
VSS11
AC11
VSS12
AC13
VSS13
AC15
VSS14
AC17
VSS15
AC19
VSS16
AC21
VSS17
AD6
VSS18
AD8
VSS19
AD25
VSS20
AE11
VSS21
AE13
VSS22
AE15
VSS23
AE17
VSS24
AE19
VSS25
AE21
VSS26
AE23
VSS27
B4
VSS28
B6
VSS29
B8
VSS30
B9
VSS31
B11
VSS32
B13
VSS33
B15
VSS34
B17
VSS35
B19
VSS36
B21
VSS37
B23
VSS38
B25
VSS39
D6
VSS40
D8
VSS41
D9
VSS42
D11
VSS43
D13
VSS44
D15
VSS45
D17
VSS46
D19
VSS47
D21
VSS48
D23
VSS49
D25
VSS50
E4
VSS51
F2
VSS52
F11
VSS53
F13
VSS54
F15
VSS55
F17
VSS56
F19
VSS57
F21
VSS58
F23
VSS59
F25
VSS60
H7
VSS61
H9
VSS62
H21
VSS63
H23
VSS64
J4
VSS65
FOX_PZ6382A-284S-41F_Champlian
FOX_PZ6382A-284S-41F_Champlian
D
401851
401851
401851
E
853Wednesday, January 20, 2010
853Wednesday, January 20, 2010
853Wednesday, January 20, 2010
E
+CPU_CORE
P8
VDD1_1
P10
VDD1_2
R4
VDD1_3
R7
VDD1_4
R9
VDD1_5
R11
VDD1_6
T2
VDD1_7
T6
VDD1_8
T8
VDD1_9
T10
VDD1_10
T12
VDD1_11
T14
VDD1_12
U7
VDD1_13
U9
VDD1_14
U11
VDD1_15
U13
VDD1_16
U15
VDD1_17
V6
VDD1_18
V8
VDD1_19
V10
VDD1_20
V12
VDD1_21
V14
VDD1_22
W4
VDD1_23
Y2
VDD1_24
AC4
VDD1_25 VDD1_26
VDDIO27 VDDIO26 VDDIO25 VDDIO24 VDDIO23 VDDIO22 VDDIO21 VDDIO20 VDDIO19 VDDIO18 VDDIO17 VDDIO16 VDDIO15 VDDIO14 VDDIO13
VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98
VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
+1.5V_CPU
AD2 Y25
V25 V23 V21 V18 U17 T25 T23 T21 T18 R17 P25 P23 P21 P18
J6 J8 J10 J12 J14 J16 J18 K2 K7 K9 K11 K13 K15 K17 L6 L8 L10 L12 L14 L16 L18 M7 M9 AC6 M17 N4 N8 N10 N16 N18 P2 P7 P9 P11 P17 R8 R10 R16 R18 T7 T9 T11 T13 T15 T17 U4 U6 U8 U10 U12 U14 U16 U18 V2 V7 V9 V11 V13 V15 V17 W6 Y21 Y23 N6
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Compal Electronics, Inc.
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
A
A
A
of
of
of
A
+1.5V_RAM +1.5V_RAM
JDDRL
+VREF_DQ
1 1
2 2
3 3
4 4
4.7U_0805_10V4Z
4.7U_0805_10V4Z
1
2
C84
C84
DDR_CKE0_DIMMA<6>
DDR_CS1_DIMMA#<6>
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1000P_0402_25V8J
1000P_0402_25V8J
0.01U_0402_25V7K
0.01U_0402_25V7K
2
C85
C85
1
DDR_A_DQS#1<6> DDR_A_DQS1<6>
DDR_A_DQS#2<6> DDR_A_DQS2<6>
DDR_A_BS#2<6>
DDR_A_CLK0<6> DDR_A_CLK#0<6>
DDR_A_BS#0<6>
DDR_A_WE#<6>
DDR_A_CAS#<6> DDR_A_ODT0 <6>
DDR_A_DQS#4<6> DDR_A_DQS4<6>
DDR_A_DQS#6<6> DDR_A_DQS6<6>
+3VS
C91
C91
DDR_A_D0 DDR_A_D1
1
DDR_A_DM0
C10
C10
DDR_A_D2
2
DDR_A_D3 DDR_A_D8
DDR_A_D9 DDR_A_DQS#1
DDR_A_DQS1 DDR_A_D10
DDR_A_D11 DDR_A_D16
DDR_A_D17 DDR_A_DQS#2
DDR_A_DQS2 DDR_A_D18
DDR_A_D19 DDR_A_D24
DDR_A_D25 DDR_A_DM3 DDR_A_D26
DDR_A_D27
DDR_CKE0_DIMMA
DDR_A_BS#2 DDR_A_MA12
DDR_A_MA9 DDR_A_MA8
DDR_A_MA5 DDR_A_MA3
DDR_A_MA1 DDR_A_CLK0
DDR_A_CLK#0 DDR_A_MA10
DDR_A_BS#0 DDR_A_WE#
DDR_A_CAS# DDR_A_ODT0 DDR_A_MA13
DDR_CS1_DIMMA#
DDR_A_D32 DDR_A_D33
DDR_A_DQS#4 DDR_A_DQS4
DDR_A_D34 DDR_A_D35
DDR_A_D40 DDR_A_D41
DDR_A_DM5 DDR_A_D42
DDR_A_D43 DDR_A_D48
DDR_A_D49 DDR_A_DQS#6
DDR_A_DQS6 DDR_A_D50
DDR_A_D51 DDR_A_D56
DDR_A_D57 DDR_A_DM7 DDR_A_D58
DDR_A_D59
+0.75VS
1
2
JDDRL
VREF_DQ1VSS1
3
VSS2
5
DQ0
7
DQ1
9
VSS4
11
DM0
13
VSS5
15
DQ2
17
DQ3
19
VSS7
21
DQ8
23
DQ9
25
VSS9
27
DQS#1 DQS129RESET# VSS1131VSS12
33
DQ10
35
DQ11 VSS1337VSS14
39
DQ16
41
DQ17 VSS1543VSS16
45
DQS#2
47
DQS2
49
VSS18
51
DQ18
53
DQ19
55
VSS20
57
DQ24
59
DQ25 VSS2261DQS#3
63
DM3 VSS2365VSS24
67
DQ26
69
DQ27 VSS2571VSS26
73
CKE0
75
VDD1
77
NC1
79
BA2
81
VDD3
83
A12/BC#
85
A9
87
VDD5
89
A8
91
A5
93
VDD7
95
A3
97
A1
99
VDD9
101
CK0
103
CK0#
105
VDD11
107
A10/AP
109
BA0
111
VDD13
113
WE#
115
CAS#
117
VDD15
119
A13
121
S1#
123
VDD17
125
NCTEST
127
VSS27
129
DQ32
131
DQ33
133
VSS29
135
DQS#4
137
DQS4
139
VSS32
141
DQ34
143
DQ35
145
VSS34
147
DQ40
149
DQ41
151
VSS36
153
DM5
155
VSS37
157
DQ42
159
DQ43
161
VSS39
163
DQ48
165
DQ49
167
VSS41
169
DQS#6
171
DQS6
173
VSS44
175
DQ50
177
DQ51
179
VSS46
181
DQ56
183
DQ57
185
VSS48
187
DM7
189
VSS49
191
DQ58
193
DQ59
195
VSS51
197
SA0
199
VDDSPD
201
SA1
203
VTT1
205
G1
TYCO_2-2013289-1
TYCO_2-2013289-1
DQ4 DQ5
VSS3
DQS#0
DQS0
VSS6
DQ6 DQ7
VSS8 DQ12 DQ13
VSS10
DM1
DQ14 DQ15
DQ20 DQ21
DM2
VSS17
DQ22 DQ23
VSS19
DQ28 DQ29
VSS21
DQS3 DQ30
DQ31
CKE1 VDD2
VDD4
VDD6
VDD8
VDD10
CK1
CK1#
VDD12
BA1
RAS#
VDD14
ODT0
VDD16
ODT1
NC2
VDD18
VREF_CA
VSS28
DQ36 DQ37
VSS30
DM4
VSS31
DQ38 DQ39
VSS33
DQ44 DQ45
VSS35
DQS#5
DQS5
VSS38
DQ46 DQ47
VSS40
DQ52 DQ53
VSS42
DM6
VSS43
DQ54 DQ55
VSS45
DQ60 DQ61
VSS47
DQS#7
DQS7
VSS50
DQ62 DQ63
VSS52
EVENT#
SDA
SCL
VTT2
B
2
DDR_A_D4
4
DDR_A_D5
6 8
DDR_A_DQS#0
10
DDR_A_DQS0
12 14
DDR_A_D6
16
DDR_A_D7
18 20
DDR_A_D12
22
DDR_A_D13
24 26
DDR_A_DM1
28
MEM_MA_RST#
30 32
DDR_A_D14
34
DDR_A_D15
36 38
DDR_A_D20
40
DDR_A_D21
42 44
DDR_A_DM2
46 48
DDR_A_D22
50
DDR_A_D23
52 54
DDR_A_D28
56
DDR_A_D29
58 60
DDR_A_DQS#3
62
DDR_A_DQS3
64 66
DDR_A_D30
68
DDR_A_D31
70 72
DDR_CKE1_DIMMA
74 76
DDR_A_MA15
78
A15 A14
A11
A7 A6
A4 A2
A0
S0#
G2
DDR_A_MA14
80 82
DDR_A_MA11
84
DDR_A_MA7
86 88
DDR_A_MA6
90
DDR_A_MA4
92 94
DDR_A_MA2
96
DDR_A_MA0
98 100
DDR_A_CLK1
102
DDR_A_CLK#1
104 106
DDR_A_BS#1
108
DDR_A_RAS#
110 112
DDR_CS0_DIMMA#
114 116 118
DDR_A_ODT1
120 122 124 126 128
DDR_A_D36
130
DDR_A_D37
132 134
DDR_A_DM4
136 138
DDR_A_D38
140
DDR_A_D39
142 144
DDR_A_D44
146
DDR_A_D45
148 150
DDR_A_DQS#5
152
DDR_A_DQS5
154 156
DDR_A_D46
158
DDR_A_D47
160 162
DDR_A_D52
164
DDR_A_D53
166 168
DDR_A_DM6
170 172
DDR_A_D54
174
DDR_A_D55
176 178
DDR_A_D60
180
DDR_A_D61
182 184
DDR_A_DQS#7
186
DDR_A_DQS7
188 190
DDR_A_D62
192
DDR_A_D63
194 196 198 200 202 204
206
+0.75VS
DDR_A_DQS#0 <6> DDR_A_DQS0 <6>
MEM_MA_RST# <6>
DDR_A_DQS#3 <6> DDR_A_DQS3 <6>
DDR_CKE1_DIMMA <6>
DDR_A_CLK1 <6> DDR_A_CLK#1 <6>
DDR_A_BS#1 <6> DDR_A_RAS# <6>
DDR_CS0_DIMMA# <6>
DDR_A_ODT1 <6>
1
C680
C680
2
4.7U_0805_10V4Z
4.7U_0805_10V4Z
1000P_0402_25V8J
1000P_0402_25V8J
DDR_A_DQS#5 <6> DDR_A_DQS5 <6>
DDR_A_DQS#7 <6> DDR_A_DQS7 <6>
SMB_CK_DAT0 <10,16,21> SMB_CK_CLK0 <10,16,21>
1
C235
C235
2
2
1
0.01U_0402_25V7K
0.01U_0402_25V7K
C
DDR_A_D[0..63] DDR_A_DM[0..7]
DDR_A_MA[0..15]
C351
C351
+VREF_CA
0.1U_0402_16V4Z
0.1U_0402_16V4Z
D
DDR_A_D[0..63] <6>
DDR_A_DM[0..7] <6>
DDR_A_MA[0..15] <6>
+1.5V_RAM
R48
R48 1K_0402_1%
1K_0402_1%
+VREF_DQ +VREF_CA
1 2
R49
R49 1K_0402_1%
1K_0402_1%
1 2
< Close to JDDRH & JDDRL >
+1.5V_RAM
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
C87
C87
1
+0.75VS
2
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C665
C665
2
C88
C88
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
C664
C664
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z 2
C640
C640
1
1
C961
C961
2
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
C641
C641
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
C642
C642
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z 2
C643
C643
1
2
C644
C644
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
J3
2
JUMP_43X118@J3JUMP_43X118@
0.1U_0402_16V4Z
0.1U_0402_16V4Z 2
C645
C645
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
112
2
1
+1.5V_RAM+1.5V
+1.5V_RAM
C646
C646
1 2
1 2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
E
R310
R310 1K_0402_1%
1K_0402_1%
R315
R315 1K_0402_1%
1K_0402_1%
2
C647
C647
1
Place near DIMM1
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
DIMM_A STD H:5.2 mm
<Address: 00>
A
B
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2008-09-25 2009-09-25
2008-09-25 2009-09-25
2008-09-25 2009-09-25
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
D
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
401851
401851
401851
953Wednesday, January 20, 2010
953Wednesday, January 20, 2010
953Wednesday, January 20, 2010
E
A
A
A
of
of
of
A
B
C
D
E
DQ4 DQ5
VSS3
VSS6
DQ6 DQ7
VSS8
DM1
DM2
CK1
CK1#
BA1
NC2
DM4
DM6
SDA SCL
VTT2
+1.5V_RAM+1.5V_RAM
2
DDR_B_D4
4
DDR_B_D5
6 8
DDR_B_DQS#0
10
DDR_B_DQS0
12 14
DDR_B_D6
16
DDR_B_D7
18 20
DDR_B_D12
22
DDR_B_D13
24 26
DDR_B_DM1
28
MEM_MB_RST#
30 32
DDR_B_D14
34
DDR_B_D15
36 38
DDR_B_D20
40
DDR_B_D21
42 44
DDR_B_DM2
46 48
DDR_B_D22
50
DDR_B_D23
52 54
DDR_B_D28
56
DDR_B_D29
58 60
DDR_B_DQS#3
62
DDR_B_DQS3
64 66
DDR_B_D30
68
DDR_B_D31
70 72
DDR_CKE1_DIMMB
74 76
DDR_B_MA15
78
A15 A14
A11
A7 A6
A4 A2
A0
S0#
G2
DDR_B_MA14
80 82
DDR_B_MA11
84
DDR_B_MA7
86 88
DDR_B_MA6
90
DDR_B_MA4
92 94
DDR_B_MA2
96
DDR_B_MA0
98 100
DDR_B_CLK1
102
DDR_B_CLK#1
104 106
DDR_B_BS#1
108
DDR_B_RAS#
110 112
DDR_CS0_DIMMB#
114
DDR_B_ODT0DDR_B_CAS#
116 118
DDR_B_ODT1
120 122 124 126 128
DDR_B_D36
130
DDR_B_D37
132 134
DDR_B_DM4
136 138
DDR_B_D38
140
DDR_B_D39
142 144
DDR_B_D44
146
DDR_B_D45
148 150
DDR_B_DQS#5
152
DDR_B_DQS5
154 156
DDR_B_D46
158
DDR_B_D47
160 162
DDR_B_D52
164
DDR_B_D53
166 168
DDR_B_DM6
170 172
DDR_B_D54
174
DDR_B_D55
176 178
DDR_B_D60
180
DDR_B_D61
182 184
DDR_B_DQS#7
186
DDR_B_DQS7
188 190
DDR_B_D62
192
DDR_B_D63
194 196 198 200 202 204
206
+0.75VS
DDR_B_DQS#0 <6> DDR_B_DQS0 <6>
MEM_MB_RST# <6>
DDR_B_DQS#3 <6> DDR_B_DQS3 <6>
DDR_CKE1_DIMMB <6>
DDR_B_CLK1 <6> DDR_B_CLK#1 <6>
DDR_B_BS#1 <6> DDR_B_RAS# <6>
DDR_CS0_DIMMB# <6> DDR_B_ODT0 <6>
DDR_B_ODT1 <6>
1000P_0402_25V8J
1000P_0402_25V8J
1
C683
C683
2
DDR_B_DQS#5 <6> DDR_B_DQS5 <6>
DDR_B_DQS#7 <6> DDR_B_DQS7 <6>
SMB_CK_DAT0 <9,16,21> SMB_CK_CLK0 <9,16,21>
DDR_B_D[0..63]
DDR_B_DM[0..7]
DDR_B_MA[0..15]
C353
C353
+VREF_CA
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
4.7U_0805_10V4Z
4.7U_0805_10V4Z
1
2
C352
C352
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
+1.5V_RAM
2
C666
C666
1
+0.75VS
2
1
DDR_B_D[0..63] <6>
DDR_B_DM[0..7] <6>
DDR_B_MA[0..15] <6>
0.1U_0402_16V4Z
0.1U_0402_16V4Z 2
C667
C667
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z 2
C676
C676
C675
C675
1
2
C668
C668
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C925
C925
2
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
0.1U_0402_16V4Z
0.1U_0402_16V4Z 2
C669
C669
1
2
C670
C670
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+1.5V_RAM
1
@
@
+
+
C86
C86
330U_X_2VM_R6M
330U_X_2VM_R6M
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z 2
C671
C671
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C128 Co-layout with C86
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
C672
C672
1
+1.5V_RAM
1
+
+
2
2
C673
C673
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C128
C128
390U_2.5V_M_R10
390U_2.5V_M_R10
2
C674
C674
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z 2
C677
C677
1
Place near DIMM2
JDDRH
+VREF_DQ
4.7U_0805_10V4Z
4.7U_0805_10V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1000P_0402_25V8J
1000P_0402_25V8J
1
1
C92
C92
1 1
2 2
3 3
4 4
2
1
C93
C93
C682
C682
2
2
DDR_B_DQS#1<6> DDR_B_DQS1<6>
DDR_B_DQS#2<6> DDR_B_DQS2<6>
DDR_CKE0_DIMMB<6>
DDR_B_BS#2<6>
DDR_B_CLK0<6> DDR_B_CLK#0<6>
DDR_B_BS#0<6>
DDR_B_WE#<6>
DDR_B_CAS#<6>
DDR_CS1_DIMMB#<6>
DDR_B_DQS#4<6> DDR_B_DQS4<6>
DDR_B_DQS#6<6> DDR_B_DQS6<6>
+3VS
+0.75VS
DDR_B_D0 DDR_B_D1
DDR_B_DM0 DDR_B_D2
DDR_B_D3 DDR_B_D8
DDR_B_D9 DDR_B_DQS#1
DDR_B_DQS1 DDR_B_D10
DDR_B_D11 DDR_B_D16
DDR_B_D17 DDR_B_DQS#2
DDR_B_DQS2 DDR_B_D18
DDR_B_D19 DDR_B_D24
DDR_B_D25 DDR_B_DM3 DDR_B_D26
DDR_B_D27
DDR_CKE0_DIMMB
DDR_B_BS#2 DDR_B_MA12
DDR_B_MA9 DDR_B_MA8
DDR_B_MA5 DDR_B_MA3
DDR_B_MA1 DDR_B_CLK0
DDR_B_CLK#0 DDR_B_MA10
DDR_B_BS#0 DDR_B_WE#
DDR_B_MA13 DDR_CS1_DIMMB#
DDR_B_D32 DDR_B_D33
DDR_B_DQS#4 DDR_B_DQS4
DDR_B_D34 DDR_B_D35
DDR_B_D40 DDR_B_D41
DDR_B_DM5 DDR_B_D42
DDR_B_D43 DDR_B_D48
DDR_B_D49 DDR_B_DQS#6
DDR_B_DQS6 DDR_B_D50
DDR_B_D51 DDR_B_D56
DDR_B_D57 DDR_B_DM7 DDR_B_D58
DDR_B_D59
JDDRH
VREF_DQ1VSS1
3
VSS2
5
DQ0
7
DQ1
9
VSS4
11
DM0
13
VSS5
15
DQ2
17
DQ3
19
VSS7
21
DQ8
23
DQ9
25
VSS9
27
DQS#1 DQS129RESET#
31
VSS11
33
DQ10
35
DQ11
37
VSS13
39
DQ16
41
DQ17
43
VSS15
45
DQS#2
47
DQS2
49
VSS18
51
DQ18
53
DQ19
55
VSS20
57
DQ24
59
DQ25 VSS2261DQS#3
63
DM3
65
VSS23
67
DQ26
69
DQ27
71
VSS25
73
CKE0
75
VDD1
77
NC1
79
BA2
81
VDD3
83
A12/BC#
85
A9
87
VDD5
89
A8
91
A5
93
VDD7
95
A3
97
A1
99
VDD9
101
CK0
103
CK0#
105
VDD11
107
A10/AP
109
BA0
111
VDD13
113
WE#
115
CAS#
117
VDD15
119
A13
121
S1#
123
VDD17
125
NCTEST
127
VSS27
129
DQ32
131
DQ33
133
VSS29
135
DQS#4
137
DQS4
139
VSS32
141
DQ34
143
DQ35
145
VSS34
147
DQ40
149
DQ41
151
VSS36
153
DM5
155
VSS37
157
DQ42
159
DQ43
161
VSS39
163
DQ48
165
DQ49
167
VSS41
169
DQS#6
171
DQS6
173
VSS44
175
DQ50
177
DQ51
179
VSS46
181
DQ56
183
DQ57
185
VSS48
187
DM7
189
VSS49
191
DQ58
193
DQ59
195
VSS51
197
SA0
199
VDDSPD
201
SA1
203
VTT1
205
G1
LOTES_AAA-DDR-111-K01
LOTES_AAA-DDR-111-K01
DQS#0
DQS0
DQ12 DQ13
VSS10
VSS12
DQ14 DQ15
VSS14
DQ20 DQ21
VSS16 VSS17
DQ22 DQ23
VSS19
DQ28 DQ29
VSS21
DQS3
VSS24
DQ30 DQ31
VSS26
CKE1 VDD2
VDD4
VDD6
VDD8
VDD10
VDD12
RAS#
VDD14
ODT0
VDD16
ODT1
VDD18
VREF_CA
VSS28
DQ36 DQ37
VSS30 VSS31
DQ38 DQ39
VSS33
DQ44 DQ45
VSS35
DQS#5
DQS5
VSS38
DQ46 DQ47
VSS40
DQ52 DQ53
VSS42 VSS43
DQ54 DQ55
VSS45
DQ60 DQ61
VSS47
DQS#7
DQS7
VSS50
DQ62 DQ63
VSS52
EVENT#
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
DIMM_B STD H:9.2 mm
<Address: 01>
A
B
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2008-09-25 2009-09-25
2008-09-25 2009-09-25
2008-09-25 2009-09-25
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
D
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
401851
401851
401851
10 53Wednesday, January 20, 2010
10 53Wednesday, January 20, 2010
10 53Wednesday, January 20, 2010
E
A
A
A
of
of
of
A
PCIE_GTX_C_MRX_P[0..15]<35> PCIE_GTX_C_MRX_N[0..15]<35>
1 1
2 2
PCIE_GTX_C_MRX_P[0..15] PCIE_GTX_C_MRX_N[0..15]
< To WLAN > < To LAN >
PCIE_PTX_C_IRX_P2<28> PCIE_PTX_C_IRX_N2<28> PCIE_PTX_C_IRX_P3<26> PCIE_PTX_C_IRX_N3<26>
< From SB820 : x4 PCIE A-link >
H_CADON[0..15]
3 3
4 4
H_CADOP[0..15] <5> H_CADON[0..15] <5>
< From S1G4 CPU : x16 HT> < To S1G4 CPU : x16 HT>
0718 Place within 1" layout 1:2
SB_RX0P<20> SB_RX0N<20> SB_RX1P<20> SB_RX1N<20> SB_RX2P<20> SB_RX2N<20> SB_RX3P<20> SB_RX3N<20>
H_CLKOP0<5>
H_CLKON0<5>
H_CLKOP1<5>
H_CLKON1<5>
H_CTLOP0<5> H_CTLON0<5>
H_CTLON1<5>
1 2
PCIE_GTX_C_MRX_N0 PCIE_GTX_C_MRX_P0 PCIE_GTX_C_MRX_P1 PCIE_GTX_C_MRX_N1 PCIE_GTX_C_MRX_N2 PCIE_GTX_C_MRX_P2 PCIE_GTX_C_MRX_N3 PCIE_GTX_C_MRX_P3 PCIE_GTX_C_MRX_N4 PCIE_GTX_C_MRX_P4 PCIE_GTX_C_MRX_N5 PCIE_GTX_C_MRX_P5 PCIE_GTX_C_MRX_P6 PCIE_GTX_C_MRX_N6 PCIE_GTX_C_MRX_N7 PCIE_GTX_C_MRX_P7 PCIE_GTX_C_MRX_N8 PCIE_GTX_C_MRX_P8 PCIE_GTX_C_MRX_N9 PCIE_GTX_C_MRX_P9 PCIE_GTX_C_MRX_N10 PCIE_GTX_C_MRX_P10 PCIE_GTX_C_MRX_N11 PCIE_GTX_C_MRX_P11 PCIE_GTX_C_MRX_N12 PCIE_GTX_C_MRX_P12 PCIE_GTX_C_MRX_N13 PCIE_GTX_C_MRX_P13 PCIE_GTX_C_MRX_N14 PCIE_GTX_C_MRX_P14 PCIE_GTX_C_MRX_N15 PCIE_GTX_C_MRX_P15
H_CADOP0 H_CADON0 H_CADOP1 H_CADON1 H_CADOP2 H_CADON2 H_CADOP3 H_CADON3 H_CADOP4 H_CADON4 H_CADOP5 H_CADON5 H_CADOP6 H_CADON6 H_CADOP7 H_CADON7
H_CADOP8 H_CADON8 H_CADOP9 H_CADON9 H_CADOP10 H_CADON10 H_CADOP11 H_CADON11 H_CADOP12 H_CADON12 H_CADOP13 H_CADON13 H_CADOP14 H_CADON14 H_CADOP15 H_CADON15
R60301_0402_1% R60301_0402_1%
B
H_CTLOP0 H_CTLON0 H_CTLOP1 H_CTLON1
HT_RXCALP HT_RXCALN
AC24 AC25 AB25 AB24 AA24 AA25
W21 W20
AB23 AA22
M22 M23
D4 C4 A3 B3 C2 C1 E5 F5 G5 G6 H5 H6
M8
P7
M7
P5
M5
R8 P8 R6 R5 P4 P3 T4 T3
AE3 AD4 AE2 AD3 AD1 AD2
V5
W6
U5 U6 U8 U7
AA8
Y8
AA7
Y7 AA5 AA6
W5
Y5
Y25 Y24 V22 V23 V25 V24 U24 U25 T25 T24 P22 P23 P25 P24 N24 N25
Y22 Y23
V21 V20 U20 U21 U19 U18
T22 T23
R21 R20
C23 A24
U3B
U3B
GFX_RX0P GFX_RX0N GFX_RX1P GFX_RX1N GFX_RX2P GFX_RX2N GFX_RX3P GFX_RX3N GFX_RX4P GFX_RX4N GFX_RX5P GFX_RX5N
J6
GFX_RX6P
J5
GFX_RX6N
J7
GFX_RX7P
J8
GFX_RX7N
L5
GFX_RX8P
L6
GFX_RX8N GFX_RX9P
L8
GFX_RX9N GFX_RX10P GFX_RX10N GFX_RX11P GFX_RX11N GFX_RX12P GFX_RX12N GFX_RX13P GFX_RX13N GFX_RX14P GFX_RX14N GFX_RX15P GFX_RX15N
GPP_RX0P GPP_RX0N GPP_RX1P GPP_RX1N GPP_RX2P GPP_RX2N GPP_RX3P GPP_RX3N GPP_RX4P GPP_RX4N GPP_RX5P GPP_RX5N
SB_RX0P SB_RX0N SB_RX1P SB_RX1N SB_RX2P SB_RX2N SB_RX3P SB_RX3N
U3A
U3A
HT_RXCAD0P HT_RXCAD0N HT_RXCAD1P HT_RXCAD1N HT_RXCAD2P HT_RXCAD2N HT_RXCAD3P HT_RXCAD3N HT_RXCAD4P HT_RXCAD4N HT_RXCAD5P HT_RXCAD5N HT_RXCAD6P HT_RXCAD6N HT_RXCAD7P HT_RXCAD7N
HT_RXCAD8P HT_RXCAD8N HT_RXCAD9P HT_RXCAD9N HT_RXCAD10P HT_RXCAD10N HT_RXCAD11P HT_RXCAD11N HT_RXCAD12P HT_RXCAD12N HT_RXCAD13P HT_RXCAD13N HT_RXCAD14P HT_RXCAD14N HT_RXCAD15P HT_RXCAD15N
HT_RXCLK0P HT_RXCLK0N HT_RXCLK1P HT_RXCLK1N
HT_RXCTL0P HT_RXCTL0N HT_RXCTL1P HT_RXCTL1N
HT_RXCALP HT_RXCALN
C
PCIE_MTX_GRX_P0
A5
PART 2 OF 6
PART 2 OF 6
PCIE I/F GPP
PCIE I/F GPP
PCIE I/F SB
PCIE I/F SB
PCE_CALRP(PCE_BCALRP) PCE_CALRN(PCE_BCALRN)
RS780M_FCBGA528880MR1@
RS780M_FCBGA528880MR1@
PART 1 OF 6
PART 1 OF 6
RS780M_FCBGA528880MR1@
RS780M_FCBGA528880MR1@
GFX_TX0P GFX_TX0N GFX_TX1P GFX_TX1N GFX_TX2P GFX_TX2N GFX_TX3P GFX_TX3N GFX_TX4P GFX_TX4N GFX_TX5P GFX_TX5N GFX_TX6P GFX_TX6N GFX_TX7P GFX_TX7N GFX_TX8P GFX_TX8N GFX_TX9P GFX_TX9N
GFX_TX10P
GFX_TX10N
GFX_TX11P
GFX_TX11N
GFX_TX12P
GFX_TX12N
GFX_TX13P
GFX_TX13N
GFX_TX14P
GFX_TX14N
GFX_TX15P
GFX_TX15N
PCIE I/F GFX
PCIE I/F GFX
GPP_TX0P GPP_TX0N GPP_TX1P GPP_TX1N GPP_TX2P GPP_TX2N GPP_TX3P GPP_TX3N GPP_TX4P GPP_TX4N GPP_TX5P GPP_TX5N
SB_TX0P SB_TX0N SB_TX1P SB_TX1N SB_TX2P SB_TX2N SB_TX3P SB_TX3N
HT_TXCAD0P HT_TXCAD0N HT_TXCAD1P HT_TXCAD1N HT_TXCAD2P HT_TXCAD2N HT_TXCAD3P HT_TXCAD3N HT_TXCAD4P HT_TXCAD4N HT_TXCAD5P HT_TXCAD5N HT_TXCAD6P HT_TXCAD6N HT_TXCAD7P HT_TXCAD7N
HT_TXCAD8P HT_TXCAD8N HT_TXCAD9P
HT_TXCAD9N HT_TXCAD10P HT_TXCAD10N HT_TXCAD11P HT_TXCAD11N HT_TXCAD12P HT_TXCAD12N HT_TXCAD13P HT_TXCAD13N HT_TXCAD14P HT_TXCAD14N HT_TXCAD15P HT_TXCAD15N
HT_TXCLK0P
HT_TXCLK0N
HT_TXCLK1P
HT_TXCLK1N
HYPER TRANSPORT CPU I/F
HYPER TRANSPORT CPU I/F
HT_TXCTL0P
HT_TXCTL0N
HT_TXCTL1P
HT_TXCTL1N
HT_TXCALP HT_TXCALN
PCIE_MTX_GRX_N0
B5
PCIE_MTX_GRX_P1
A4
PCIE_MTX_GRX_N1
B4
PCIE_MTX_GRX_P2
C3
PCIE_MTX_GRX_N2
B2
PCIE_MTX_GRX_P3
D1 D2
PCIE_MTX_GRX_P4
E2
PCIE_MTX_GRX_N4
E1
PCIE_MTX_GRX_P5
F4 F3
PCIE_MTX_GRX_P6
F1
PCIE_MTX_GRX_N6
F2
PCIE_MTX_GRX_P7
H4
PCIE_MTX_GRX_N7
H3
PCIE_MTX_GRX_P8
H1 H2
PCIE_MTX_GRX_P9
J2
PCIE_MTX_GRX_N9
J1 K4
PCIE_MTX_GRX_N10
K3
PCIE_MTX_GRX_P11
K1
PCIE_MTX_GRX_N11
K2
PCIE_MTX_GRX_P12
M4
PCIE_MTX_GRX_N12
M3
PCIE_MTX_GRX_P13
M1 M2
PCIE_MTX_GRX_P14
N2
PCIE_MTX_GRX_N14
N1
PCIE_MTX_GRX_P15
P1 P2
AC1 AC2 AB4 AB3
PCIE_ITX_PRX_P2
AA2
PCIE_ITX_PRX_N2
AA1
PCIE_ITX_PRX_P3
Y1
PCIE_ITX_PRX_N3
Y2 Y4 Y3 V1 V2
SB_TX0P_C
AD7
SB_TX0N_C
AE7
SB_TX1P_C
AE6
SB_TX1N_C
AD6
SB_TX2P_C
AB6
SB_TX2N_C
AC6
SB_TX3P_C
AD5
SB_TX3N_C
AE5
PCIE_CALRP
AC8
PCIE_CALRN
AB8
H_CADIP0
D24
H_CADIN0
D25
H_CADIP1
E24
H_CADIN1
E25
H_CADIP2
F24
H_CADIN2
F25
H_CADIP3
F23
H_CADIN3
F22
H_CADIP4
H23
H_CADIN4
H22
H_CADIP5
J25
H_CADIN5
J24
H_CADIP6
K24
H_CADIN6
K25
H_CADIP7
K23
H_CADIN7
K22
H_CADIP8
F21
H_CADIN8
G21
H_CADIP9
G20
H_CADIN9
H21
H_CADIP10
J20
H_CADIN10
J21
H_CADIP11
J18
H_CADIN11
K17
H_CADIP12
L19
H_CADIN12
J19
H_CADIP13
M19
H_CADIN13
L18
H_CADIP14
M21
H_CADIN14
P21
H_CADIP15
P18
H_CADIN15
M18 H24
H25 L21 L20
H_CTLIP0
M24
H_CTLIN0
M25
H_CTLIP1
P19
H_CTLIN1
R18
HT_TXCALP
B24
HT_TXCALN
B25
0718 Place within 1" layout 1:2
C95 0.1U_0402_16V7KC95 0.1U_0402_16V7K
1 2
C96 0.1U_0402_16V7KC96 0.1U_0402_16V7K
1 2
C97 0.1U_0402_16V7KC97 0.1U_0402_16V7K
1 2
C98 0.1U_0402_16V7KC98 0.1U_0402_16V7K
1 2
C99 0.1U_0402_16V7KC99 0.1U_0402_16V7K
1 2
C100 0.1U_0402_16V7KC100 0.1U_0402_16V7K
1 2
C101 0.1U_0402_16V7KC101 0.1U_0402_16V7K
1 2
C102 0.1U_0402_16V7KC102 0.1U_0402_16V7K
1 2
C103 0.1U_0402_16V7KC103 0.1U_0402_16V7K
1 2
C104 0.1U_0402_16V7KC104 0.1U_0402_16V7K
1 2
C105 0.1U_0402_16V7KC105 0.1U_0402_16V7K
1 2
C106 0.1U_0402_16V7KC106 0.1U_0402_16V7K
1 2
C107 0.1U_0402_16V7KC107 0.1U_0402_16V7K
1 2
C108 0.1U_0402_16V7KC108 0.1U_0402_16V7K
1 2
C109 0.1U_0402_16V7KC109 0.1U_0402_16V7K
1 2
C110 0.1U_0402_16V7KC110 0.1U_0402_16V7K
1 2
C111 0.1U_0402_16V7KC111 0.1U_0402_16V7K
1 2
C112 0.1U_0402_16V7KC112 0.1U_0402_16V7K
1 2
C113 0.1U_0402_16V7KC113 0.1U_0402_16V7K
1 2
C114 0.1U_0402_16V7KC114 0.1U_0402_16V7K
1 2
C115 0.1U_0402_16V7KC115 0.1U_0402_16V7K
1 2
C116 0.1U_0402_16V7KC116 0.1U_0402_16V7K
1 2
C117 0.1U_0402_16V7KC117 0.1U_0402_16V7K
1 2
C118 0.1U_0402_16V7KC118 0.1U_0402_16V7K
1 2
C119 0.1U_0402_16V7KC119 0.1U_0402_16V7K
1 2
C120 0.1U_0402_16V7KC120 0.1U_0402_16V7K
1 2
C121 0.1U_0402_16V7KC121 0.1U_0402_16V7K
1 2
C122 0.1U_0402_16V7KC122 0.1U_0402_16V7K
1 2
C123 0.1U_0402_16V7KC123 0.1U_0402_16V7K
1 2
C124 0.1U_0402_16V7KC124 0.1U_0402_16V7K
1 2
C125 0.1U_0402_16V7KC125 0.1U_0402_16V7K
1 2
C126 0.1U_0402_16V7KC126 0.1U_0402_16V7K
1 2
C129 0.1U_0402_16V7KC129 0.1U_0402_16V7K
1 2
C130 0.1U_0402_16V7KC130 0.1U_0402_16V7K
1 2
C131 0.1U_0402_16V7KC131 0.1U_0402_16V7K
1 2
C132 0.1U_0402_16V7KC132 0.1U_0402_16V7K
1 2
C133 0.1U_0402_16V7KC133 0.1U_0402_16V7K
1 2
C134 0.1U_0402_16V7KC134 0.1U_0402_16V7K
1 2
C135 0.1U_0402_16V7KC135 0.1U_0402_16V7K
1 2
C136 0.1U_0402_16V7KC136 0.1U_0402_16V7K
1 2
C137 0.1U_0402_16V7KC137 0.1U_0402_16V7K
1 2
C138 0.1U_0402_16V7KC138 0.1U_0402_16V7K
1 2
C139 0.1U_0402_16V7KC139 0.1U_0402_16V7K
1 2
C140 0.1U_0402_16V7KC140 0.1U_0402_16V7K
1 2
R59 1.27K_0402_1%R59 1.27K_0402_1%
1 2
R58 2K_0402_1%R58 2K_0402_1%
1 2
H_CADIP[0..15]H_CADOP[0..15] H_CADIN[0..15]
H_CLKIP0 <5> H_CLKIN0 <5> H_CLKIP1 <5> H_CLKIN1 <5>
H_CTLIP0 <5>
H_CTLIN0 <5>
H_CTLIP1 <5>H_CTLOP1<5>
H_CTLIN1 <5>
R61 301_0402_1%R61 301_0402_1%
1 2
D
PCIE_MTX_C_GRX_N0 PCIE_MTX_C_GRX_P0 PCIE_MTX_C_GRX_N1 PCIE_MTX_C_GRX_P1 PCIE_MTX_C_GRX_P2 PCIE_MTX_C_GRX_N2 PCIE_MTX_C_GRX_N3 PCIE_MTX_C_GRX_P3PCIE_MTX_GRX_N3 PCIE_MTX_C_GRX_P4 PCIE_MTX_C_GRX_N4 PCIE_MTX_C_GRX_P5 PCIE_MTX_C_GRX_N5PCIE_MTX_GRX_N5 PCIE_MTX_C_GRX_P6 PCIE_MTX_C_GRX_N6 PCIE_MTX_C_GRX_P7 PCIE_MTX_C_GRX_N7 PCIE_MTX_C_GRX_P8 PCIE_MTX_C_GRX_N8PCIE_MTX_GRX_N8 PCIE_MTX_C_GRX_P9 PCIE_MTX_C_GRX_N9 PCIE_MTX_C_GRX_P10PCIE_MTX_GRX_P10 PCIE_MTX_C_GRX_N10 PCIE_MTX_C_GRX_P11 PCIE_MTX_C_GRX_N11 PCIE_MTX_C_GRX_N12 PCIE_MTX_C_GRX_P12 PCIE_MTX_C_GRX_P13 PCIE_MTX_C_GRX_N13PCIE_MTX_GRX_N13 PCIE_MTX_C_GRX_N14 PCIE_MTX_C_GRX_P14 PCIE_MTX_C_GRX_P15 PCIE_MTX_C_GRX_N15PCIE_MTX_GRX_N15
PCIE_ITX_C_PRX_P2 <28> PCIE_ITX_C_PRX_N2 <28> PCIE_ITX_C_PRX_P3 <26> PCIE_ITX_C_PRX_N3 <26>
SB_TX0P <20> SB_TX0N <20> SB_TX1P <20> SB_TX1N <20> SB_TX2P <20> SB_TX2N <20> SB_TX3P <20> SB_TX3N <20>
+1.1VS
H_CADIP[0..15] <5> H_CADIN[0..15] <5>
< Transmitter Calibration Resistor to HT_TXCALN >
PCIE_MTX_C_GRX_P[0..15]
PCIE_MTX_C_GRX_N[0..15]
< To WLAN > < To LAN >
< To SB820 : x4 PCEI A-link>
< TX Impedance Calibration. Connect to GND > < RX Impedance Calibration. Connect to VDDPCIE >
E
PCIE_MTX_C_GRX_P[0..15] <35> PCIE_MTX_C_GRX_N[0..15] <35>
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2009-02-12 2009-02-12
2009-02-12 2009-02-12
2009-02-12 2009-02-12
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
D
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
401851
401851
401851
11 53Wednesday, January 20, 2010
11 53Wednesday, January 20, 2010
11 53Wednesday, January 20, 2010
E
A
A
A
of
of
of
+3VS
1 2
+1.8VS
1 1
+1.8VS
+1.1VS
1 2
+1.8VS
1 2
2 2
+1.8VS
+1.8VS
L4
L4 0_0603_5%
0_0603_5%
1 2
1 2
1 2
L3
L3 BLM18PG121SN1D_0603
BLM18PG121SN1D_0603
L2
L2 BLM18PG121SN1D_0603
BLM18PG121SN1D_0603
L5
L5 BLM18PG121SN1D_0603
BLM18PG121SN1D_0603
A
1
C142
C142
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
2
L6
L6 BLM18PG121SN1D_0603
BLM18PG121SN1D_0603
L7
L7 BLM18PG121SN1D_0603
BLM18PG121SN1D_0603
L9
L9 BLM18PG121SN1D_0603
BLM18PG121SN1D_0603
+AVDD1
1
C144
C144
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
2
+AVDD2
1
C145
C145
0.1U_0402_16V7K
0.1U_0402_16V7K
2
+AVDDQ
1
C148
C148
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
2
+NB_PLLVDD
1
C141
C141
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
2
+NB_HTPVDD
1
C146
C146
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
2
+VDDA18HTPLL
1
C150
C150
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
2
+VDDA18PCIEPLL
1
C154
C154
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
2
+1.1VS
1 2 12
R69
R69
4.7K_0402_5%
4.7K_0402_5%
R70
R70
4.7K_0402_5%
4.7K_0402_5%
UMA_CRT_HSYNC<15> UMA_CRT_VSYNC<15>
+VDDA18HTPLL
+VDDA18PCIEPLL
PLT_RST#<15,20,26,28,31,32,35> NB_PWRGD<21>
CPU_LDT_REQ#<20>
NB_OSC_14.318M<16>
NBGFX_CLK<16> NBGFX_CLK#<16>
CLK_SBLINK_BCLK<16> CLK_SBLINK_BCLK#<16>
+NB_PLLVDD
+NB_HTPVDD
CLK_NBHT<16> CLK_NBHT#<16>
Strap pin
AUX_CAL<15>
B
+AVDD1 +AVDD2 +AVDDQ
R65 715_0402_1%R65 715_0402_1%
1 2
R66 0_0402_5%R66 0_0402_5%
1 2
NB_LDTSTOP#
AVDD=100mA
UMA_CRT_HSYNC UMA_CRT_VSYNC
T8 PADT8 PAD
+NB_PLLVDD +NB_HTPVDD
NB_RESET# NB_PWRGD
U3C
U3C
F12
AVDD1(NC)
E12
AVDD2(NC)
F14
AVDDDI(NC)
G15
AVSSDI(NC)
H15
AVDDQ(NC)
H14
AVSSQ(NC)
E17
C_Pr(DFT_GPIO5)
F17
Y(DFT_GPIO2)
F15
COMP_Pb(DFT_GPIO4)
G18
RED(DFT_GPIO0)
G17
REDb(NC)
E18
GREEN(DFT_GPIO1)
F18
GREENb(NC)
E19
BLUE(DFT_GPIO3)
F19
BLUEb(NC)
A11
DAC_HSYNC(PWM_GPIO4)
B11
DAC_VSYNC(PWM_GPIO6)
F8
DAC_SCL(PCE_RCALRN)
E8
DAC_SDA(PCE_TCALRN)
G14
DAC_RSET(PWM_GPIO1)
A12
PLLVDD(NC)
D14
PLLVDD18(NC)
B12
PLLVSS(NC)
H17
VDDA18HTPLL
D7
VDDA18PCIEPLL1
E7
VDDA18PCIEPLL2
D8
SYSRESETb
A10
POWERGOOD
C10
LDTSTOPb
C12
ALLOW_LDTSTOP
C25
HT_REFCLKP
C24
HT_REFCLKN
E11
REFCLK_P/OSCIN(OSCIN)
F11
REFCLK_N(PWM_GPIO3)
T2
GFX_REFCLKP
T1
GFX_REFCLKN
U1
GPP_REFCLKP
U2
GPP_REFCLKN
V4
GPPSB_REFCLKP(SB_REFCLKP)
V3
GPPSB_REFCLKN(SB_REFCLKN)
B9
I2C_CLK
A9
I2C_DATA
B8
DDC_DATA0/AUX0N(NC)
A8
DDC_CLK0/AUX0P(NC)
B7
DDC_CLK1/AUX1P(NC)
A7
DDC_DATA1/AUX1N(NC)
B10
STRP_DATA
G11
RSVD
C8
AUX_CAL(NC)
C
PART 3 OF 6
PART 3 OF 6
RS780M_FCBGA528880MR1@
RS780M_FCBGA528880MR1@
< Dedicated power for the DAC which can affect display quality >
TXOUT_L0P(NC) TXOUT_L0N(NC) TXOUT_L1P(NC) TXOUT_L1N(NC) TXOUT_L2P(NC)
TXOUT_L2N(DBG_GPIO0)
TXOUT_L3P(NC)
TXOUT_L3N(DBG_GPIO2)
TXOUT_U0P(NC)
TXOUT_U1P(PCIE_RESET_GPIO3)
TXOUT_U1N(PCIE_RESET_GPIO2)
TXOUT_U3P(PCIE_RESET_GPIO5)
CRT/TVOUT
CRT/TVOUT
TXCLK_UN(PCIE_RESET_GPIO1)
PM
PM
CLOCKs PLL PWR
CLOCKs PLL PWR
MIS.
MIS.
TXOUT_U0N(NC)
TXOUT_U2P(NC)
TXOUT_U2N(NC) TXOUT_U3N(NC)
TXCLK_LP(DBG_GPIO1)
TXCLK_LN(DBG_GPIO3)
TXCLK_UP(PCIE_RESET_GPIO4)
VDDLTP18(NC) VSSLTP18(NC)
VDDLT18_1(NC) VDDLT18_2(NC) VDDLT33_1(NC)
LVTM
LVTM
VDDLT33_2(NC)
VSSLT1(VSS) VSSLT2(VSS) VSSLT3(VSS) VSSLT4(VSS) VSSLT5(VSS) VSSLT6(VSS) VSSLT7(VSS)
LVDS_DIGON(PCE_TCALRP)
LVDS_BLON(PCE_RCALRP)
LVDS_ENA_BL(PWM_GPIO2)
TMDS_HPD(NC)
SUS_STAT#(PWM_GPIO5)
THERMALDIODE_P THERMALDIODE_N
TESTMODE
HPD(NC)
A22 B22 A21 B21 B20 A20 A19
< LVDS dual channel : channel 1 >
B19 B18
A18 A17 B17 D20 D21 D18
< LVDS dual channel : channel 2 >
D19 B16
A16 D16 D17
+VDDLTP18
A13 B13
+VDDLT18
A15 B15 A14 B14
C14 D15 C16 C18 C20 E20 C22
E9 F7 G12
D9 D10
D12 AE8
AD8 D13
R84 1.8K_0402_5%R84 1.8K_0402_5%
D
1 2
+VDDLTP18
+VDDLT18
C156
C156
0.1U_0402_16V7K
0.1U_0402_16V7K
SUS_STAT# <15,21>
BLM18PG121SN1D_0603
BLM18PG121SN1D_0603
1
C153
C153
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
1
4.7U_0805_10V4Z
4.7U_0805_10V4Z 2
2
BLM18PG121SN1D_0603
BLM18PG121SN1D_0603
1
C157
C157
2
< Strap option pin or gate side-port memory IO >
E
L8
L8
L10
L10
+1.8VS
1 2
+1.8VS
1 2
5
U2
U2
P
4
Y
G
NC7SZ08P5X_NL_SC70-5
NC7SZ08P5X_NL_SC70-5
3
@
@
+1.8VS
R83
R83
2.2K_0402_5%
2.2K_0402_5%
1 2
NB_LDTSTOP#
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2009-02-12 2009-02-12
2009-02-12 2009-02-12
2009-02-12 2009-02-12
Deciphered Date
Deciphered Date
Deciphered Date
D
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
401851
401851
401851
12 53Wednesday, January 20, 2010
12 53Wednesday, January 20, 2010
12 53Wednesday, January 20, 2010
E
of
of
of
A
A
A
3 3
R68 300_0402_5%R68 300_0402_5%
+1.8VS
4 4
1 2
R366 1K_0402_1%R366 1K_0402_1%
1 2
A
NB_PWRGD
CPU_LDT_REQ#
+1.8VS
C149
C149
1 2
0.1U_0402_16V7K
0.1U_0402_16V7K
LDT_STOP#<7,20>
2
B
1
A
1 2
R101 0_0402_5%
R101 0_0402_5%
B
2
U3D
U3D
AB12 AE16
V11 AE15 AA12 AB16 AB14 AD14 AD13 AD15 AC16 AE13 AC14
Y14 AD16
AE17 AD17
W12
Y12 AD18 AB13 AB18
V14
V15
B B
W14
AE12 AD12
MEM_A0(NC) MEM_A1(NC) MEM_A2(NC) MEM_A3(NC) MEM_A4(NC) MEM_A5(NC) MEM_A6(NC) MEM_A7(NC) MEM_A8(NC) MEM_A9(NC) MEM_A10(NC) MEM_A11(NC) MEM_A12(NC) MEM_A13(NC)
MEM_BA0(NC) MEM_BA1(NC) MEM_BA2(NC)
MEM_RASb(NC) MEM_CASb(NC) MEM_WEb(NC) MEM_CSb(NC) MEM_CKE(NC) MEM_ODT(NC)
MEM_CKP(NC) MEM_CKN(NC)
MEM_COMPP(NC) MEM_COMPN(NC)
PAR 4 OF 6
PAR 4 OF 6
MEM_DQ0/DVO_VSYNC(NC) MEM_DQ1/DVO_HSYNC(NC)
MEM_DQ2/DVO_DE(NC) MEM_DQ3/DVO_D0(NC)
MEM_DQ4(NC) MEM_DQ5/DVO_D1(NC) MEM_DQ6/DVO_D2(NC) MEM_DQ7/DVO_D4(NC) MEM_DQ8/DVO_D3(NC) MEM_DQ9/DVO_D5(NC)
MEM_DQ10/DVO_D6(NC) MEM_DQ11/DVO_D7(NC)
MEM_DQ12(NC)
MEM_DQ13/DVO_D9(NC) MEM_DQ14/DVO_D10(NC) MEM_DQ15/DVO_D11(NC)
MEM_DQS0P/DVO_IDCKP(NC) MEM_DQS0N/DVO_IDCKN(NC)
MEM_DQS1P(NC) MEM_DQS1N(NC)
MEM_DM0(NC)
MEM_DM1/DVO_D8(NC)
SBD_MEM/DVO_I/F
SBD_MEM/DVO_I/F
RS780M_FCBGA528880MR1@
RS780M_FCBGA528880MR1@
IOPLLVDD18(NC)
IOPLLVDD(NC)
IOPLLVSS(NC)
MEM_VREF(NC)
AA18 AA20 AA19 Y19 V17 AA17 AA15 Y15 AC20 AD19 AE22 AC18 AB20 AD22 AC22 AD21
Y17 W18 AD20 AE21
W17 AE19
AE23 AE24
AD23 AE18
+1.8VS +1.1VS
1
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2009-02-12 2009-02-12
2009-02-12 2009-02-12
2009-02-12 2009-02-12
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
1
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
401851
401851
401851
13 53Wednesday, January 20, 2010
13 53Wednesday, January 20, 2010
13 53Wednesday, January 20, 2010
A
A
A
of
of
of
A
B
C
D
E
U3E
AE25 AD24 AC23 AB22 AA21
AE11 AD11
AD25
AC12 AA14
AB11 AB15 AB17 AB19 AE20 AB21
M16 R16
H18 G19
D22
W19 U17 R17 M17
M10
R10 AA9
AB9 AD9 AE9 U10
D23 G22
G24 G25 H19
M20 N22
R19 R22 R24 R25 H20 U22
W22 W24 W25
M14 N13
R11 R14
U14 U11 U15
W11 W15
J17 K16 L16
P16 T16
F20 E21
B23 A23
Y20 V18 T17 P17
J10 P10 K10
L10 W9
H9
T10
Y9
F9
G9
A25 E22
J22 L17 L22 L24 L25
P20
V19
Y21
L12
P12 P15
T12
V12
Y18
K11
U3E
VDDHT_1 VDDHT_2 VDDHT_3 VDDHT_4 VDDHT_5 VDDHT_6 VDDHT_7
VDDHTRX_1 VDDHTRX_2 VDDHTRX_3 VDDHTRX_4 VDDHTRX_5 VDDHTRX_6 VDDHTRX_7
VDDHTTX_1 VDDHTTX_2 VDDHTTX_3 VDDHTTX_4 VDDHTTX_5 VDDHTTX_6 VDDHTTX_7 VDDHTTX_8 VDDHTTX_9 VDDHTTX_10 VDDHTTX_11 VDDHTTX_12 VDDHTTX_13
VDDA18PCIE_1 VDDA18PCIE_2 VDDA18PCIE_3 VDDA18PCIE_4 VDDA18PCIE_5 VDDA18PCIE_6 VDDA18PCIE_7 VDDA18PCIE_8 VDDA18PCIE_9 VDDA18PCIE_10 VDDA18PCIE_11 VDDA18PCIE_12 VDDA18PCIE_13 VDDA18PCIE_14 VDDA18PCIE_15
VDD18_1 VDD18_2 VDD18_MEM1(NC) VDD18_MEM2(NC)
U3F
U3F
VSSAHT1 VSSAHT2 VSSAHT3 VSSAHT4 VSSAHT5 VSSAHT6 VSSAHT7 VSSAHT8 VSSAHT9 VSSAHT10 VSSAHT11 VSSAHT12 VSSAHT13 VSSAHT14 VSSAHT15 VSSAHT16 VSSAHT17 VSSAHT18 VSSAHT19 VSSAHT20 VSSAHT21 VSSAHT22 VSSAHT23 VSSAHT24 VSSAHT25 VSSAHT26 VSSAHT27
VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34
PART 5/6
PART 5/6
RS780M_FCBGA528880MR1@
RS780M_FCBGA528880MR1@
PART 6/6
PART 6/6
RS780M_FCBGA528880MR1@
RS780M_FCBGA528880MR1@
VDDPCIE_1 VDDPCIE_2 VDDPCIE_3 VDDPCIE_4 VDDPCIE_5 VDDPCIE_6 VDDPCIE_7 VDDPCIE_8
VDDPCIE_9 VDDPCIE_10 VDDPCIE_11 VDDPCIE_12 VDDPCIE_13 VDDPCIE_14 VDDPCIE_15 VDDPCIE_16 VDDPCIE_17
VDDC_1 VDDC_2 VDDC_3 VDDC_4 VDDC_5 VDDC_6 VDDC_7 VDDC_8
VDDC_9 VDDC_10 VDDC_11 VDDC_12
POWER
POWER
VDDC_13 VDDC_14 VDDC_15 VDDC_16 VDDC_17 VDDC_18 VDDC_19 VDDC_20 VDDC_21 VDDC_22
VDD_MEM1(NC) VDD_MEM2(NC) VDD_MEM3(NC) VDD_MEM4(NC) VDD_MEM5(NC) VDD_MEM6(NC)
VDD33_1(NC) VDD33_2(NC)
VSSAPCIE1 VSSAPCIE2 VSSAPCIE3 VSSAPCIE4 VSSAPCIE5 VSSAPCIE6 VSSAPCIE7 VSSAPCIE8
VSSAPCIE9 VSSAPCIE10 VSSAPCIE11 VSSAPCIE12 VSSAPCIE13 VSSAPCIE14 VSSAPCIE15 VSSAPCIE16 VSSAPCIE17 VSSAPCIE18 VSSAPCIE19 VSSAPCIE20 VSSAPCIE21 VSSAPCIE22 VSSAPCIE23 VSSAPCIE24 VSSAPCIE25 VSSAPCIE26 VSSAPCIE27 VSSAPCIE28 VSSAPCIE29 VSSAPCIE30
GROUND
GROUND
VSSAPCIE31 VSSAPCIE32 VSSAPCIE33 VSSAPCIE34 VSSAPCIE35 VSSAPCIE36 VSSAPCIE37 VSSAPCIE38 VSSAPCIE39 VSSAPCIE40
VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9
VSS10
2A
L11 0_0805_5%L11 0_0805_5%
+1.1VS
1 1
+1.1VS
+1.8VS
2 2
+1.8VS
1
2
3 3
4 4
12
1
C165
C165
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
2A < IO power for HyperTransport receive interface >
L13 0_0805_5%L13 0_0805_5%
12
C179
C179 10U_0805_10V4Z
10U_0805_10V4Z
2A < IO power for HyperTransport transmit interface >
L14 0_0805_5%L14 0_0805_5%
12
1
C1127
C1127
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
2A < 1.8V IO power for PCI-E graphics, SB, and GPP interfaces >
L15 0_0805_5%L15 0_0805_5%
12
1
C181
C181
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
C197
C197 1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
C166
C166
0.1U_0402_16V7K
0.1U_0402_16V7K
2
1
C164
C164
0.1U_0402_16V7K
0.1U_0402_16V7K
2
1
C175
C175
0.1U_0402_16V7K
0.1U_0402_16V7K
2
1
C1128
C1128
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
< Digital IO power for HyperTransport interface >
1
C167
C167
0.1U_0402_16V7K
0.1U_0402_16V7K
2
1
C169
C169
0.1U_0402_16V7K
0.1U_0402_16V7K
2
1
C176
C176
0.1U_0402_16V7K
0.1U_0402_16V7K
2
1
C185
C185
0.1U_0402_16V7K
0.1U_0402_16V7K
2
1
C168
C168
0.1U_0402_16V7K
0.1U_0402_16V7K
2
1
C170
C170
0.1U_0402_16V7K
0.1U_0402_16V7K
2
1
C177
C177
0.1U_0402_16V7K
0.1U_0402_16V7K
2
1
C190
C190
0.1U_0402_16V7K
0.1U_0402_16V7K
2
< 1.8V IO transform power >
1
C159
C159
0.1U_0402_16V7K
0.1U_0402_16V7K
2
1
C161
C161
0.1U_0402_16V7K
0.1U_0402_16V7K
2
1
C178
C178
0.1U_0402_16V7K
0.1U_0402_16V7K
2
1
C186
C186
0.1U_0402_16V7K
0.1U_0402_16V7K
2
1
C192
C192
0.1U_0402_16V7K
0.1U_0402_16V7K
2
+VDDHT
+VDDHTRX
+VDDHTTX
+VDDA18PCIE
< Main IO power for PCI-E graphics, SB, and GPP interfaces >
+VDDA11PCIE
A6 B6 C6
VDDA_12=2.5A
A2 B1 D3 D5 E4 G1 G2 G4 H7 J4 R7 L1 L2 L4 L7 M6 N4 P6 R1 R2 R4 V7 U4 V8 V6 W1 W2 W4 W7 W8 Y6 AA4 AB5 AB1 AB7 AC3 AC4 AE1 AE4 AB2
AE14 D11 G8 E14 E15 J15 J12 K14 M11 L15
D6 E6 F6 G7 H8 J9 K9 M9 L9 P9 R9 T9 V9 U9
K12 J14 U16 J11 K15 M12 L14 L11 M13 M15 N12 N14 P11 P13 P14 R12 R15 T11 T15 U12 T14 J16
AE10 AA11 Y11 AD10 AB10 AC10
H11 H12
< 3.3V IO power >
1
C198
C198
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
C1601U_0402_6.3V4Z C1601U_0402_6.3V4Z
C1731U_0402_6.3V4Z C1731U_0402_6.3V4Z
C1741U_0402_6.3V4Z C1741U_0402_6.3V4Z
1
1
2
2
C1870.1U_0402_16V7K C1870.1U_0402_16V7K
C1820.1U_0402_16V7K C1820.1U_0402_16V7K
C1910.1U_0402_16V7K C1910.1U_0402_16V7K
2
2
1
1
C1621U_0402_6.3V4Z C1621U_0402_6.3V4Z
1
1
2
2
C1930.1U_0402_16V7K C1930.1U_0402_16V7K
2
2
1
1
C1630.1U_0402_16V7K C1630.1U_0402_16V7K
C11260.1U_0402_16V7K C11260.1U_0402_16V7K
2
1
C1880.1U_0402_16V7K C1880.1U_0402_16V7K
C1940.1U_0402_16V7K C1940.1U_0402_16V7K
C1800.1U_0402_16V7K C1800.1U_0402_16V7K
2
2
1
1
1
C199
C199
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1 2
C17210U_0805_10V4Z C17210U_0805_10V4Z
C17110U_0805_10V4Z C17110U_0805_10V4Z
2
1
+NB_CORE
L44FBMA-L11-201209-221LMA30T_0805 L44FBMA-L11-201209-221LMA30T_0805
+1.1VS
VDD_CORE:GM=5A/PM=10A< Core power >
C1129 Co-layout with C189
C1830.1U_0402_16V7K C1830.1U_0402_16V7K
C1950.1U_0402_16V7K C1950.1U_0402_16V7K
2
2
1
1
+3VS
1
2
C18410U_0805_10V4Z C18410U_0805_10V4Z
2
1
1
1
C189330U_D2E_2.5VM
C189330U_D2E_2.5VM
C19610U_0805_10V4Z C19610U_0805_10V4Z
+
+
2
2
@
@
+NB_CORE
1
+
+
2
C1129
C1129 330U_2.5V_M
330U_2.5V_M
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2009-02-12 2009-02-12
2009-02-12 2009-02-12
2009-02-12 2009-02-12
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
D
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
401851
401851
401851
14 53Wednesday, January 20, 2010
14 53Wednesday, January 20, 2010
14 53Wednesday, January 20, 2010
E
A
A
A
of
of
of
A
B
C
D
E
< RS880 VSYNC mux at CRT_VSYNC pull High to 3K >
< VSYNC : STRAP_DEBUG_BUS_GPIO_ENABLEb >
Enables the Test Debug Bus using GPIO.
R92
R92 3K_0402_5%
3K_0402_5%
UMA_CRT_VSYNC<12>
1 1
12
R93
R93 3K_0402_5%@
3K_0402_5%@
12
< RS880 use register to control PCI-E configure >
< RS880 SUS_STAT# >
R85
R85 150_0402_1%
150_0402_1%
PLT_RST# <12,20,26,28,31,32,35>
D1
D1 CH751H-40PT_SOD323-2@
CH751H-40PT_SOD323-2@
1 2
AUX_CAL<12>
2 2
SUS_STAT#<12,21>
2 1
< RS880 use HSYNC to enable SIDE PORT (internal pull high) >
1 : Disable (RX881, RS880)
+3VS
0 : Enable (RX881, RS880)
PIN: RS880--> VSYNC#
< DFT_GPIO[4:2] : STRAP_PCIE_GPP_CFG[2:0] >
These pin straps are used to configure PCI-E GPP mode. 000 : 00001 001 : 00010 010 : 01011 011 : 00100 100 : 01010 101 : 01100 111 : 01011
< SUS_SATA# : LOAD_EEPROM_STRAPS >
Selects Loading of STRAPS from EPROM
1 : Bypass the loading of EEPROM straps and use Hardware Default Values 0 : I2C Master can load strap values from EEPROM if connected, or use default values if not connected
RS880:SUS_STAT#
< HSYNC : STRAP_DEBUG_BUS_PCIE_ENABLEb >
RX881: Enables the Test Debug Bus using PCIE bus
R94
R94 3K_0402_5%
3K_0402_5%
UMA_CRT_HSYNC<12>
12
+3VS
1 : Disable ( Can still be enabled using nbcfg register access ) 0 : Enable
RS880: Enables Side port memory ( RS780 use HSYNC#)
1. Disable (RS880) 0 : Enable (RS880)
3 3
4 4
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2009-02-12 2009-02-12
2009-02-12 2009-02-12
2009-02-12 2009-02-12
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
D
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
401851
401851
401851
15 53Wednesday, January 20, 2010
15 53Wednesday, January 20, 2010
15 53Wednesday, January 20, 2010
E
A
A
A
of
of
of
A
C530
C530
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+3VS_CLK
R240
R240
1 2
+VDDCLK_IO
1
C515
C515 22U_0805_6.3V6M
22U_0805_6.3V6M
2
1
C531
C531
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
SEL_SATA
1
C516
C516
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1
C532
C532
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
SMB_CK_CLK0<9,10,21> SMB_CK_DAT0<9,10,21>
27M_CLK<36> 27M_SSC<36>
SB LINK SB SRC
WLAN
1
C517
C517
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1
C535
C535
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
R248 0_0402_5%R248 0_0402_5%
1 2
R247 33_0402_5%@ R247 33_0402_5%@
1 2
CLK_SBLINK_BCLK#<12>
CLK_SBLINK_BCLK<12> CLK_SBSRC_BCLK# <20>
CLK_PCIE_MCARD2#<28>
CLK_PCIE_MCARD2<28>
+3VS_CLK
+1.1VS
R819 0_0805_5%R819 0_0805_5%
1 2
+3VS_CLK
1 1
2 2
3 3
1
2
8.2K_0402_5%@
8.2K_0402_5%@
B
1
C518
C518
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
Y2
Y2
14.318MHZ_16PF_7A14300083
14.318MHZ_16PF_7A14300083
22P_0402_50V8J
22P_0402_50V8J
C536
C536
1
2
Routing the trace at least 10mil
+3VS_CLK
+VDDCLK_IO
+3VS_CLK
+VDDCLK_IO
1
C519
C519
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
CLK_XTAL_OUT CLK_XTAL_IN
12
1
C537
C537 22P_0402_50V8J
22P_0402_50V8J
2
27MCLK 27MSSC
U10
U10
1
SCL
2
SDA
3
VDD_DOT
4
SRC_7#/27M
5
SRC_7/27M_SS
6
VSS_DOT
7
SRC_5#
8
SRC_5
9
SRC_4#
10
SRC_4
11
VSS_SRC
12
VDD_SRC_IO
13
SRC_3#
14
SRC_3
15
SRC_2#
16
SRC_2
17
VDD_SRC
18
VDD_SRC_IO
1 2
+3VS_CLK
CLK_XTAL_OUT
CLK_XTAL_IN
69
67
68
VDD_48
XTAL_IN
XTAL_OUT
66
VSS_REF
SEL_SATA
65
64
REF_1/SEL_SATA
REF_0/SEL_HTT66
27M_SEL
C
CLK_48M
CLK_48M_CRUSB
NB_OSC_14.318M_R
+3VS_CLK
+3VS_CLK
63
61
62
VDD_REF
REF_2/SEL_27
+3VS
R64 0_0805_5%R64 0_0805_5%
1
C520
C520
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
70
71
72
73
GND
VSS_48
48MHz_1
48MHz_0
VSS_SRC19SRC_1#20SRC_121SRC_0#22SRC_023CLKREQ_0#24ATIGCLK_2#25ATIGCLK_226VSS_ATIG27VDD_ATIG_IO28VDD_ATIG29ATIGCLK_1#30ATIGCLK_131ATIGCLK_0#32VSS_SB_SRC36SB_SRC_1
+3VS_CLK
58
60
59
VSS_HTT
VDD_HTT
HTT_0/66M_0
HTT_0#/66M_1
SB_SRC_1#34ATIGCLK_0
33
1
C522
C522 22U_0805_6.3V6M
22U_0805_6.3V6M
2
CLK_CPU_BCLK_R
CLK_CPU_BCLK_R#
56
55
57
PD#
CPU_K8_0
CPU_K8_0#
VDD_CPU
VDD_CPU_I/O
VSS_CPU CLKREQ_1# CLKREQ_2#
VDD_A VSS_A
VSS_SATA
SRC_6/SATA
SRC_6#/SATA#
VDD_SATA CLKREQ_3# CLKREQ_4#
SB_SRC_SLOW#
SB_SRC_0
SB_SRC_0#
VDD_SB_SRC
VDD_SB_SRC_IO
35
SLG8SP626VTR_QFN72_10x10
SLG8SP626VTR_QFN72_10x10
1
C523
C523
0.1U_0402_16V7K
0.1U_0402_16V7K
2
R820 33_0402_5%R820 33_0402_5%
1 2
R246 33_0402_5%R246 33_0402_5%
1 2
R244 158_0402_1%R244 158_0402_1%
1 2
R249 8.2K_0402_5%R249 8.2K_0402_5%
1 2
C238 1U_0402_6.3V4ZC238 1U_0402_6.3V4Z
1 2
54 53 52 51 50 49 48 47 46 45 44 43 42
R236 10K_0402_5%R236 10K_0402_5%
41 40 39 38 37
1
C524
C524
0.1U_0402_16V7K
0.1U_0402_16V7K
2
R821 0_0402_5%R821 0_0402_5%
1 2
R823 0_0402_5%R823 0_0402_5%
1 2
+3VS_CLK +VDDCLK_IO
CLKREQ_MCARD2#
+3VS_CLK
+3VS_CLK
1 2
+3VS_CLK +VDDCLK_IO
D
1
C525
C525
0.1U_0402_16V7K
0.1U_0402_16V7K
2
R243 90.9_0402_1%R243 90.9_0402_1%
1 2
R822
R822
@
@
261_0402_1%
261_0402_1%
1 2
CLKREQ_MCARD2# <28>
CLK_SBSRC_BCLK <20>
+3VS_CLK
1
C526
C526
0.1U_0402_16V7K
0.1U_0402_16V7K
2
CLK_48M_CR <27>
CLK_48M_USB <21>
NB_OSC_14.318M <12>
CLK_NBHT <12>
CLK_NBHT# <12>
+3VS_CLK
CLK_CPU_BCLK <7>
CLK_CPU_BCLK# <7>
CLKREQ_MCARD2# CLKREQ_LAN#
1
C527
C527
0.1U_0402_16V7K
0.1U_0402_16V7K
2
OSC_14M_NB
RS880M 1.1V 158R/90.9R
E
1
C528
C528
0.1U_0402_16V7K
0.1U_0402_16V7K
2
< To Card Reader > < To SB820 USB host > < To RS880M Clock block >
< To RS880M Clock block >
< To CPU >
1 2
R238 8.2K_0402_5%R238 8.2K_0402_5%
1 2
R239 8.2K_0402_5%R239 8.2K_0402_5%
1
C529
C529 1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
+3VS_CLK
R242
R242
8.2K_0402_5%
8.2K_0402_5%
SEL_SATA
4 4
1 2
configure as SATA output
1
configure as normal SRC(SRC_6) output
0
*
* default
Use voltage divider resistor R243 & R244 to pull low
NB_OSC_14.318M
configure as single-ended 66MHz output1
*0 configure as differential 100MHz output
* default
A
1 2
27M_SEL
R241
R241
8.2K_0402_5%
8.2K_0402_5%
27M_SEL
1* 0
* default
configure as 27M and 27M_SS output configure as SRC_7 output
B
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
+3VS_CLK
+VDDCLK_IO
CLKREQ_LAN#
C
NBGFX_CLK <12> NBGFX_CLK# <12>
CLK_PCIE_VGA <35>
CLK_PCIE_VGA# <35>
CLKREQ_LAN# <26> CLK_PCIE_LAN <26> CLK_PCIE_LAN# <26>
2008-09-25 2009-09-25
2008-09-25 2009-09-25
2008-09-25 2009-09-25
NB GFX
GLAN
Deciphered Date
Deciphered Date
Deciphered Date
D
NB CLOCK INPUT TABLE
NB CLOCKS HT_REFCLKP HT_REFCLKN REFCLK_P REFCLK_N GFX_REFCLK GPP_REFCLK GPPSB_REFCLK 100M DIFF 100M DIFF
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
RX881 RX881
100M DIFF 100M DIFF
14M SE (1.8V) 14M SE (1.1V) NC vref
100M DIFF 100M DIFF
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Compal Electronics, Inc.
100M DIFF 100M DIFF
100M DIFF(IN/OUT)*
NC or 100M DIFF OUTPUT
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
401851
401851
401851
E
A
A
A
of
of
of
16 53Wednesday, January 20, 2010
16 53Wednesday, January 20, 2010
16 53Wednesday, January 20, 2010
A
B
< CRT CONNECTOR >
C
+5VS
D
D7
D7
2 3
1
RB491D_SOT23-3
RB491D_SOT23-3
+R_CRT_VCC
F1
F1 1A_6VDC_MINISMDC110
1A_6VDC_MINISMDC110
21
E
+CRT_VCC
1
C237
C237
0.1U_0402_16V4Z@
0.1U_0402_16V4Z@
2
1
D19
D19
DAN217_SC59@
2
3
C242
C242 6P_0402_50V8K
6P_0402_50V8K
R817
R817 10K_0402_5%
10K_0402_5%
D_HSYNC
D_VSYNC
DAN217_SC59@
1 1
L22
L22 NBQ100505T-800Y-N_2P
NBQ100505T-800Y-N_2P L23
L23 NBQ100505T-800Y-N_2P
NBQ100505T-800Y-N_2P L24
L24 NBQ100505T-800Y-N_2P
NBQ100505T-800Y-N_2P
+CRT_VCC
1
5
P
4
OE#
A2Y
G
U5
U5 SN74AHCT1G125GW_SOT353-5
SN74AHCT1G125GW_SOT353-5
3
+CRT_VCC
1
5
P
4
OE#
A2Y
G
U6
U6 SN74AHCT1G125GW_SOT353-5
SN74AHCT1G125GW_SOT353-5
3
1
2
1 2
12
R100
R100 150_0402_1%
150_0402_1%
RED
GREEN
BLUE
1
C239
C239 6P_0402_50V8K
6P_0402_50V8K
2
R_HSYNC
R_VSYNC
1
C240
C240 6P_0402_50V8K
6P_0402_50V8K
2
C245 0.1U_0402_16V4ZC245 0.1U_0402_16V4Z
RED<36>
GREEN<36>
BLUE<36>
R98
R98 150_0402_1%
150_0402_1%
12
R99
R99 150_0402_1%
150_0402_1%
12
2 2
R_HSYNC<36,43>
R_VSYNC<36,43>
1 2
1 2
1 2
1 2
1
C241
C241 6P_0402_50V8K
6P_0402_50V8K
2
1
D20
D20
DAN217_SC59@
DAN217_SC59@
2
3
1
C243
C243 6P_0402_50V8K
6P_0402_50V8K
2
L25 10_0402_5%L25 10_0402_5%
1 2
L26 10_0402_5%L26 10_0402_5%
1 2
1
C244
C244 6P_0402_50V8K
6P_0402_50V8K
2
1
2
2
C247
C247 10P_0402_50V8J@
10P_0402_50V8J@
1
D21
D21
DAN217_SC59@
DAN217_SC59@
3
RED_L
GREEN_L
BLUE_L
+3VS
RED_L D_DDCDATA
GREEN_L HSYNC
+CRT_VCC
HSYNC
VSYNC
1
C248
C248 10P_0402_50V8J@
10P_0402_50V8J@
2
BLUE_L VSYNC
D_DDCCLK
< SYNC SIGNAL >
JCRT
JCRT
6
RGND
11
ID0
1
Red
7
GGND
12
SDA
2
Green
8
BGND
13
Hsync
3
Blue
9
+5V
14
Vsync
4
res
10
SGND
15
SCL
5
GND
16
GND
17
GND
SUYIN_070546FR015S263ZR@
SUYIN_070546FR015S263ZR@
12
R805
R805 2K_0402_1%
2K_0402_1%
1
C251
C251 470P_0402_50V8J@
470P_0402_50V8J@
2
Deciphered Date
Deciphered Date
Deciphered Date
+CRT_VCC
12
1
C252
C252 470P_0402_50V8J@
470P_0402_50V8J@
2
D
R806
R806 2K_0402_1%
2K_0402_1%
D_DDCDATA
< Display Data Channel >
D_DDCCLK
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
401851
401851
401851
E
A
A
A
of
of
of
17 53Wednesday, January 20, 2010
17 53Wednesday, January 20, 2010
17 53Wednesday, January 20, 2010
3 3
12
R824
R824
4.7K_0402_5%
4.7K_0402_5%
CRT_DATA<36>
CRT_CLK<36>
4 4
A
CRT_DATA
CRT_CLK
12
12
FOR EMI
C255
C255 33P_0402_50V8K@
33P_0402_50V8K@
C256
C256 33P_0402_50V8K@
33P_0402_50V8K@
B
+3VS
1 2
R825
R825
4.7K_0402_5%
4.7K_0402_5%
+3VS
5
Q32B
Q32B 2N7002KDW_SOT363-6
2N7002KDW_SOT363-6
3
4
+3VS
2
Q32A
Q32A 2N7002KDW_SOT363-6
2N7002KDW_SOT363-6
61
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2008-09-25 2009-09-25
2008-09-25 2009-09-25
2008-09-25 2009-09-25
A
LCD/PANEL BD. Conn.
B
C
D
E
+3VS
1
C264
C264
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
12
+3VS
G
G
2
1 3
R200
R200
10K_0402_5%
10K_0402_5%
W=60mils
S
S
Q4
Q4
D
D
AO3413_SOT23
AO3413_SOT23
Inrush current = 0A
12
+LCD_VDD
W=60mils
1
C262
C262
0.1U_0402_16V7K
0.1U_0402_16V7K
2
+3VS
LCD_EDID_CLK
LCD_EDID_DATA
R933_0402_5% R933_0402_5%
BKOFF# <31>
R1174.7K_0402_5% R1174.7K_0402_5%
12
R1184.7K_0402_5% R1184.7K_0402_5%
12
+LCD_VDD +3VS
5
L45
L45
12
R90
R90 100K_0402_5%
100K_0402_5%
1 2
3
Q33B
Q33B 2N7002KDW_SOT363-6
2N7002KDW_SOT363-6
4
INT_MIC_DATA
INT_MIC_CLK
12
B+
1
C151
C151 680P_0402_50V7K@
680P_0402_50V7K@
2
R91
R91 47K_0402_5%
47K_0402_5%
2
3
PACDN042Y3R_SOT23-3
PACDN042Y3R_SOT23-3
1
C152
@C152
@
680P_0402_50V7K
680P_0402_50V7K
BKOFF#_R
2
C259
C259
0.1U_0402_16V7K
0.1U_0402_16V7K
1
1
C260
C260
0.01U_0402_25V7K
0.01U_0402_25V7K
2
D12
D12
1
2
12
1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41
68P_0402_50V8J
68P_0402_50V8J
R807 150_0603_5%R807 150_0603_5%
61
Q33A
Q33A
2
1 2
INVT_PWM
+LCDVDD_R BKOFF#_R
+LCD_INV
1
C268
C268
2
ENVDD
R3
R3 10K_0402_5%
10K_0402_5%
LCD_TXCLK+ <36> LCD_TXCLK- <36>
LCD_TZCLK+ <36> LCD_TZCLK- <36>
LCD_EDID_CLK <36> LCD_EDID_DATA <36> INT_MIC_CLK <29>
INT_MIC_DATA <29>
Rated Current MAX:3000mA
FBMA-L11-201209-221LMA30T_0805
FBMA-L11-201209-221LMA30T_0805
1
C263
C263
0.1U_0402_25V6
0.1U_0402_25V6
2
1 1
2N7002KDW_SOT363-6
2N7002KDW_SOT363-6
VGA_ENVDD<36>
2 2
< LVDS Connector >
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+3VS_LVDS_CAM
0_0603_5%
0_0603_5%
R808
R808
+3VS
LCD_TXOUT0+<36> LCD_TXOUT0-<36> LCD_TXOUT1+<36> LCD_TXOUT1-<36> LCD_TXOUT2+<36> LCD_TXOUT2-<36>
LCD_TZOUT0+<36> LCD_TZOUT0-<36> LCD_TZOUT1+<36> LCD_TZOUT1-<36> LCD_TZOUT2+<36> LCD_TZOUT2-<36>
3 3
1 2
+LCD_INV
USB20_P9_L USB20_N9_L
W=20mils
1 2
C265
C265 JLVDS
JLVDS
2
2
4
4
6
6
8
8
10
10
12
11
12
14
13
14
16
15
16
18
17
18
20
19
20
22
21
22
24
23
24
26
25
26
28
27
28
30
29
30
32
31
32
34
33
34
36
35
36
38
37
38
40
39
40
42
GMD
GND
ACES_87242-4001-09
ACES_87242-4001-09 @
@
1 3 5 7 9
1.5A
L12
L20
L20
A
C27
@C27
@
10P_0402_50V8J
10P_0402_50V8J
4
4
1
1
WCM-2012-900T_0805
WCM-2012-900T_0805
@R23
@
12
3
2
R23
1 2
10_0402_5%
10_0402_5%
USB20_P9<21>
USB20_N9<21>
4 4
USB20_P9_L
3
USB20_N9_L
2
INT_MIC_CLK
EC_INVT_PWM<31>
VGA_INVT_PWM<36>
B
1 2
R96 0_0402_5%M9X@ R96 0_0402_5%M9X@
1 2
R97 0_0402_5%MANHA@R97 0_0402_5%MANHA@
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
INVT_PWMEC_INVT_PWM INVT_PWM
12
R319
R319 10K_0402_5%
10K_0402_5%
2008-09-25 2009-09-25
2008-09-25 2009-09-25
2008-09-25 2009-09-25
C
Deciphered Date
Deciphered Date
Deciphered Date
+LCDVDD_R
D
1
C266
C266
0.1U_0402_16V7K
0.1U_0402_16V7K
2
L12 0_0805_5%
0_0805_5%
12
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
1
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
+LCD_VDD
C267
C267
4.7U_0805_10V4Z
4.7U_0805_10V4Z
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
401851
401851
401851
18 53Wednesday, January 20, 2010
18 53Wednesday, January 20, 2010
18 53Wednesday, January 20, 2010
E
of
of
of
A
A
A
A
HDMI_TX0- HDMI_R_D0-
B
R121
R121 0_0402_5%@
1 2
0_0402_5%@
C
R125
HDMI_TX1- HDMI_R_D1-
1 2
R125 0_0402_5%@
0_0402_5%@
H@ D11
H@
D
D11
2 1
RB161M-20_SOD123-2
RB161M-20_SOD123-2
H@ F2
H@
2 1
F2
1.1A_6V_MINISMDC110F-2
1.1A_6V_MINISMDC110F-2
H@
H@
E
1
C22
C22
0.1U_0402_16V7K
0.1U_0402_16V7K
2
+HDMI_5V_OUT+5VS
C272 0.1U_0402_16V7KH@ C272 0.1U_0402_16V7KH@
HDMI_TXD0+<36> HDMI_TXD0-<36>
1 1
HDMI_TXD1+<36> HDMI_TXD1-<36>
HDMI_TXD2+<36> HDMI_TXD2-<36>
HDMI_CLK0+<36> HDMI_CLK0-<36>
1 2
C273 0.1U_0402_16V7KH@ C273 0.1U_0402_16V7KH@
1 2
C275 0.1U_0402_16V7KH@ C275 0.1U_0402_16V7KH@
1 2
C276 0.1U_0402_16V7KH@ C276 0.1U_0402_16V7KH@
1 2
C277 0.1U_0402_16V7KH@ C277 0.1U_0402_16V7KH@
1 2
C274 0.1U_0402_16V7KH@ C274 0.1U_0402_16V7KH@
1 2
C278 0.1U_0402_16V7KH@ C278 0.1U_0402_16V7KH@
1 2
C279 0.1U_0402_16V7KH@ C279 0.1U_0402_16V7KH@
1 2
HDMI_TX0+
HDMI_TX0-
HDMI_TX1+ HDMI_TX1-
HDMI_TX2+
HDMI_TX2-
HDMI_CLK+ HDMI_CLK-
HDMI_TX2+ HDMI_CLK+
L17
L17
1
1
4
4
L18
L18
1
1
4
4
OCE2012120YZF_0805H@
OCE2012120YZF_0805H@
1 2
1 2
OCE2012120YZF_0805H@
OCE2012120YZF_0805H@
1 2
2
2
3
3
R122
R122 0_0402_5%@
0_0402_5%@
R123
R123 0_0402_5%@
0_0402_5%@
2
2
3
3
R124
R124 0_0402_5%@
0_0402_5%@
HDMI_R_D0+HDMI_TX0+ HDMI_TX1+
1
4
1
4
L19
L19
1
4
OCE2012120YZF_0805H@
OCE2012120YZF_0805H@
1 2
1 2
L16
L16
1
4
OCE2012120YZF_0805H@
OCE2012120YZF_0805H@
1 2
2
2
3
3
R126
R126 0_0402_5%@
0_0402_5%@
R127
R127 0_0402_5%@
0_0402_5%@
2
2
3
3
R128
R128 0_0402_5%@
0_0402_5%@
HDMI_R_D1+
HDMI_R_CK-HDMI_CLK-HDMI_R_D2-HDMI_TX2-
HDMI_R_CK+HDMI_R_D2+
+HDMI_5V_OUT
HDMI_HPD
HDMI_SDATA HDMI_SCLK
HDMI_R_CK­HDMI_R_CK+
HDMI_R_D0­HDMI_R_D0+
HDMI_R_D1­HDMI_R_D1+
HDMI_R_D2­HDMI_R_D2+
< HDMI Connector >
JHDMI
JHDMI
19
HP_DET
18
+5V
17
DDC/CEC_GND
16
SDA
15
SCL
14
Reserved
13
CEC
12
CK­CK_shield CK+ D0­D0_shield D0+ D1­D1_shield D1+ D2­D2_shield D2+
SUYIN_100042MR019S153ZL@
SUYIN_100042MR019S153ZL@
GND GND GND GND
11 10
9 8 7 6 5 4 3 2 1
20 21 22 23
< Termination resistor >
2 2
+3VS
12
H@
H@
H@ R826
R826
4.7K_0402_5%
4.7K_0402_5%
HDMIDAT_VGA<36>
HDMICLK_VGA<36>
3 3
H@ R827
R827
4.7K_0402_5%
4.7K_0402_5%
1 2
2
3 1
SGD
SGD
H@
H@ Q25
Q25 BSH111_SOT23-3
BSH111_SOT23-3
+3VS
2
3 1
SGD
SGD
12
R53
R53
2.2K_0402_5%
2.2K_0402_5% H@
H@
H@
H@ Q26
Q26 BSH111_SOT23-3
BSH111_SOT23-3
+HDMI_5V_OUT
HDMI_SDATA
HDMI_SCLK
12
R54
R54
2.2K_0402_5%
2.2K_0402_5% H@
H@
< Close to Connector >
HDMI_R_CK+ HDMI_R_CK-
HDMI_R_D0­HDMI_R_D0+
HDMI_R_D1­HDMI_R_D1+
R102 499_0402_1%H@ R102 499_0402_1%H@ R103 499_0402_1%H@ R103 499_0402_1%H@
R104 499_0402_1%H@ R104 499_0402_1%H@ R106 499_0402_1%H@ R106 499_0402_1%H@
R108 499_0402_1%H@ R108 499_0402_1%H@ R109 499_0402_1%H@ R109 499_0402_1%H@
1 2 1 2
1 2 1 2
1 2 1 2
Q34A
HDMI_R_D2+
< Hot-plug detection & level shift >
2
C280
C280
H@
H@
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
4 4
+5VS
HDMI_HPD_R
1
5
P
OE#
A2Y
G
H@ U7
H@
3
SN74AHCT1G125GW_SOT353-5
SN74AHCT1G125GW_SOT353-5
A
4
U7
R120 1K_0402_5%R120 1K_0402_5%
1 2
+3VS
12
R113
R113
2.2K_0402_5%
2.2K_0402_5% H@
H@
R119
R119 100K_0402_5%
100K_0402_5%
1 2
H@
H@
R110
R110 100K_0402_5%
100K_0402_5%
1 2
H@
H@
HPD <36>
B
HDMI_HPD
2
C281
C281
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2008-09-25 2009-09-25
2008-09-25 2009-09-25
2008-09-25 2009-09-25
HDMI_R_D2-
Deciphered Date
Deciphered Date
Deciphered Date
R114 499_0402_1%H@ R114 499_0402_1%H@
1 2
R116 499_0402_1%H@ R116 499_0402_1%H@
1 2
D
6 1
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Q34A
2N7002KDW_SOT363-6
2N7002KDW_SOT363-6
2
+5VS
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
401851
401851
401851
19 53Wednesday, January 20, 2010
19 53Wednesday, January 20, 2010
19 53Wednesday, January 20, 2010
E
A
A
A
of
of
of
A
B
C
D
E
C572 150P_0402_50V8JC572 150P_0402_50V8J
1 2
A_RST#
C579 0.1U_0402_16V7KC579 0.1U_0402_16V7K
SB_RX0P<11> SB_RX0N<11> SB_RX1P<11> SB_RX1N<11> SB_RX2P<11> SB_RX2N<11> SB_RX3P<11>
+1.1VS_PCIE
+3VS
R329
R329
4.7K_0402_5%
4.7K_0402_5%
1 2
SB_RX3N<11> SB_TX0P<11>
SB_TX0N<11> SB_TX1P<11> SB_TX1N<11> SB_TX2P<11> SB_TX2N<11> SB_TX3P<11> SB_TX3N<11>
1 1
+3VALW
C581
C581
12
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2 2
A_RST#
@
@
12
R328 8.2K_0402_5%
R328 8.2K_0402_5%
H_PWRGD
2
B
1
A
+1.8VS
G
G
2
S
S
Q21
Q21
5
U21
U21
P
4
Y
G
NC7SZ08P5X_NL_SC70-5
NC7SZ08P5X_NL_SC70-5
3
13
D
D
FDV301N_NL_SOT23-3
FDV301N_NL_SOT23-3
1 2
C573 0.1U_0402_16V7KC573 0.1U_0402_16V7K
1 2
C574 0.1U_0402_16V7KC574 0.1U_0402_16V7K
1 2
C575 0.1U_0402_16V7KC575 0.1U_0402_16V7K
1 2
C576 0.1U_0402_16V7KC576 0.1U_0402_16V7K
1 2
C580 0.1U_0402_16V7KC580 0.1U_0402_16V7K
1 2
C577 0.1U_0402_16V7KC577 0.1U_0402_16V7K
1 2
C578 0.1U_0402_16V7KC578 0.1U_0402_16V7K
1 2
R326 590_0402_1%R326 590_0402_1% R327 2K_0402_1%R327 2K_0402_1%
PLT_RST# <12,15,26,28,31,32,35>
CLK_SBSRC_BCLK<16> CLK_SBSRC_BCLK#<16>
H_PWRGD_L <50>
R325 33_0402_5%R325 33_0402_5%
12 12
12
SB_RX0P_C SB_RX0N_C SB_RX1P_C SB_RX1N_C SB_RX2P_C SB_RX2N_C SB_RX3P_C SB_RX3N_C
level shift to ISL6265
ISL6265 PWROK input, TTL level: 0.8V~2.0V When this pin is high, the SVI interface is
active and I2C protocol is running. While this
3 3
pin is low, the SVC, SVD, and VFIXEN input states determine the pre-PWROK metal VID or VFIX mode voltage. This pin must be low prior to the ISL6265 PGOOD output going high
1 2
C648
C648 27P_0402_50V8J
27P_0402_50V8J
25MHZ_20PF_7A25000012
25MHZ_20PF_7A25000012
1 2
C639
C639 27P_0402_50V8J
27P_0402_50V8J
R332 20M_0402_5%@R332 20M_0402_5%@
1 2
C582
C582
4 4
1 2
18P_0402_50V8J
18P_0402_50V8J
R335
R335
20M_0603_5%
20M_0603_5%
C586
C586
1 2
18P_0402_50V8J
18P_0402_50V8J
A
12
32.768KHZ_12.5PF_Q13MC14610002
32.768KHZ_12.5PF_Q13MC14610002
Y5
Y5
1 2
Y3
Y3
4
OSC
NC
1
OSC
NC
12
R370
R370 1M_0402_5%
1M_0402_5%
3 2
25M_CLK_X1
25M_CLK_X2
SB_32KHI
Close to SB
SB_32KHO
25M_CLK_X1
25M_CLK_X2
B
U8A
U8A
P1
PCIE_RST#
L1
A_RST#
AD26
A_TX0P
AD27
A_TX0N
AC28
A_TX1P
AC29
A_TX1N
AB29
A_TX2P
AB28
A_TX2N
AB26
A_TX3P
AB27
A_TX3N
AE24
A_RX0P
AE23
A_RX0N
AD25
A_RX1P
AD24
A_RX1N
AC24
A_RX2P
AC25
A_RX2N
AB25
A_RX3P
AB24
A_RX3N
AD29
PCIE_CALRP
AD28
PCIE_CALRN
AA28
GPP_TX0P
AA29
GPP_TX0N
Y29
GPP_TX1P
Y28
GPP_TX1N
Y26
GPP_TX2P
Y27
GPP_TX2N
W28
GPP_TX3P
W29
GPP_TX3N
AA22
GPP_RX0P
Y21
GPP_RX0N
AA25
GPP_RX1P
AA24
GPP_RX1N
W23
GPP_RX2P
V24
GPP_RX2N
W24
GPP_RX3P
W25
GPP_RX3N
M23
PCIE_RCLKP/NB_LNK_CLKP
P23
PCIE_RCLKN/NB_LNK_CLKN
U29
NB_DISP_CLKP
U28
NB_DISP_CLKN
T26
NB_HT_CLKP
T27
NB_HT_CLKN
V21
CPU_HT_CLKP
T21
CPU_HT_CLKN
V23
SLT_GFX_CLKP
T23
SLT_GFX_CLKN
L29
GPP_CLK0P
L28
GPP_CLK0N
N29
GPP_CLK1P
N28
GPP_CLK1N
M29
GPP_CLK2P
M28
GPP_CLK2N
T25
GPP_CLK3P
V25
GPP_CLK3N
L24
GPP_CLK4P
L23
GPP_CLK4N
P25
GPP_CLK5P
M25
GPP_CLK5N
P29
GPP_CLK6P
P28
GPP_CLK6N
N26
GPP_CLK7P
N27
GPP_CLK7N
T29
GPP_CLK8P
T28
GPP_CLK8N
L25
14M_25M_48M_OSC
L26
25M_X1
L27
25M_X2
SB820M_FCBGA605
SB820M_FCBGA605
Part 1 of 5
Part 1 of 5
SB800
SB800
PCICLK1/GPO36 PCICLK2/GPO37 PCICLK3/GPO38
PCICLK4/14M_OSC/GPO39
PCI CLKS
PCI CLKS
AD10/GPIO10 AD11/GPIO11 AD12/GPIO12 AD13/GPIO13 AD14/GPIO14 AD15/GPIO15 AD16/GPIO16 AD17/GPIO17
PCI EXPRESS INTERFACES
PCI EXPRESS INTERFACES
LDRQ1#/CLK_REQ6#/GPIO49
CLOCK GENERATOR
CLOCK GENERATOR
ALLOW_LDTSTP/DMA_ACTIVE#
Security Classification
Security Classification
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
AD18/GPIO18 AD19/GPIO19 AD20/GPIO20 AD21/GPIO21 AD22/GPIO22 AD23/GPIO23 AD24/GPIO24 AD25/GPIO25 AD26/GPIO26 AD27/GPIO27 AD28/GPIO28 AD29/GPIO29 AD30/GPIO30 AD31/GPIO31
PCI INTERFACELPC
PCI INTERFACELPC
REQ1#/GPIO40 REQ2#/CLK_REQ8#/GPIO41 REQ3#/CLK_REQ5#/GPIO42
GNT1#/GPO44 GNT2#/GPO45
GNT3#/CLK_REQ7#/GPIO46
INTE#/GPIO32
INTF#/GPIO33 INTG#/GPIO34 INTH#/GPIO35
SERIRQ/GPIO48
CPU
CPU
INTRUDER_ALERT#
RTC
RTC
VDDBT_RTC_G
Issued Date
Issued Date
Issued Date
PCICLK0
PCIRST#
AD0/GPIO0 AD1/GPIO1 AD2/GPIO2 AD3/GPIO3 AD4/GPIO4 AD5/GPIO5 AD6/GPIO6 AD7/GPIO7 AD8/GPIO8 AD9/GPIO9
CBE0# CBE1# CBE2# CBE3#
FRAME#
DEVSEL#
IRDY#
TRDY#
PAR STOP# PERR# SERR# REQ0#
GNT0#
CLKRUN#
LOCK#
LPCCLK0 LPCCLK1
LAD0 LAD1 LAD2 LAD3
LFRAME#
LDRQ0#
PROCHOT#
LDT_PG LDT_STP# LDT_RST#
32K_X1 32K_X2
RTCCLK
C
W2 W1 W3 W4 Y1
V2
AA1 AA4 AA3 AB1 AA5 AB2 AB6 AB5 AA6 AC2 AC3 AC4 AC1 AD1 AD2 AC6 AE2 AE1 AF8 AE3 AF1 AG1 AF2
PCI_AD23
AE9
PCI_AD24
AD9
PCI_AD25
AC11
PCI_AD26
AF6
PCI_AD27
AF4
PCI_AD28
AF3
PCI_AD29
AH2 AG2 AH3 AA8 AD5 AD8 AA10 AE8 AB9 AJ3 AE7 AC5 AF5 AE6 AE4 AE11 AH5 AH4 AC12 AD12 AJ5 AH6 AB12 AB11 AD7
BT_PWR#
AJ6 AG6
BT_RST#
AG4 AJ4
H24 H25 J27 J26 H29 H28 G28 J25 AA18 AB19
G21 H21 K19 G22
R26 0_0402_5%R26 0_0402_5%
J24
1 2
SB_32KHI
C1
SB_32KHO
C2 D2
B2 B1
2008-09-25 2009-09-25
2008-09-25 2009-09-25
2008-09-25 2009-09-25
T11PAD T11PAD
C584
C584
1
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
PCI_CLK1 <24> PCI_CLK2 <24> PCI_CLK3 <24> PCI_CLK4 <24>
BT_PWR# <28>
BT_DET# <28>
BT_RST# <28>
LPC_AD0 <31,32> LPC_AD1 <31,32> LPC_AD2 <31,32> LPC_AD3 <31,32> LPC_FRAME# <31,32>
C585
C585
1
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
Deciphered Date
Deciphered Date
Deciphered Date
PCI_AD23 <24> PCI_AD24 <22,24> PCI_AD25 <24> PCI_AD26 <24> PCI_AD27 <24> PCI_AD28 <24> PCI_AD29 <24>
SERIRQ <31,32>
CPU_LDT_REQ# <12> H_PROCHOT# <7> H_PWRGD <7,50> LDT_STOP# <7,12> LDT_RST# <7>
1 2
R333 510_0402_5%R333 510_0402_5%
W=20mils
for Clear CMOS
CLK_PCI_EC <24,31>
2
2
1
1
D
CLK_PCI_SIO <24,32>
J1
JUMP_43X39@J1JUMP_43X39@
CLK_PCI_SIO
+RTCVCC
1
C583
C583
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
D8
D8
3
2
BAS40-04_SOT23-3
BAS40-04_SOT23-3
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
10_0402_5%
10_0402_5%
1
401851
401851
401851
R42
12
+RTCBATT
E
@R42
@
12
1 2
10P_0402_50V8J
10P_0402_50V8J
R331
R331 1K_0402_5%
1K_0402_5%
+CHGRTC
of
of
of
20 53Wednesday, January 20, 2010
20 53Wednesday, January 20, 2010
20 53Wednesday, January 20, 2010
C94
@C94
@
A
A
A
A
1 1
HDMI_DET
A
EC_RSMRST#
SMB_CK_CLK0 SMB_CK_DAT0
SUS_STAT#
R80 10_0402_5%
R80 10_0402_5%
HDA_BITCLK_MDC
GBE_MDIO
GBE_COL GBE_CRS GBE_RXERR
GBE_PHY_INTR
EC_LID_OUT#
SB_SIC SB_SID
H_THERMTRIP#
SMB_CK_CLK1 SMB_CK_DAT1
AZ_BITCLK_HD
@
@
12
HDA_BITCLK_MDC<32>
HDA_SDOUT_MDC<32>
HDA_SDIN1<32>
HDA_SYNC_MDC<32> HDA_RST#_MDC<32>
+3VALW
1 2
1 2
AZ_BITCLK_HD<29>
AZ_SDOUT_HD<29>
HDA_SDOUT<24>
AZ_SDIN0_HD<29>
AZ_SYNC_HD<29>
AZ_RST_HD#<29>
R95
R95
10K_0402_5%
10K_0402_5%
CIR_EN#
R115
CIR@R115
CIR@
1K_0402_1%
1K_0402_1%
1 2
R339 2.2K_0402_5%R339 2.2K_0402_5%
+3VS
R342 2.2K_0402_5%R342 2.2K_0402_5%
1 2
R343 2.2K_0402_5%R343 2.2K_0402_5%
1 2
R344 4.7K_0402_5%R344 4.7K_0402_5%
1 2
+3VS
R105
R105
H@
H@
10K_0402_5%
10K_0402_5%
1 2
2 2
R107
R107
@
@
10K_0402_5%
10K_0402_5%
1 2
C143 10P_0402_50V8J@ C143 10P_0402_50V8J@
12
C147 10P_0402_50V8J@ C147 10P_0402_50V8J@
12
3 3
+3VALW
1 2
R352 10K_0402_5%R352 10K_0402_5%
1 2
R353 10K_0402_5%R353 10K_0402_5%
1 2
R354 10K_0402_5%R354 10K_0402_5%
1 2
R356 10K_0402_5%R356 10K_0402_5%
1 2
R358 10K_0402_5%R358 10K_0402_5%
+3VALW
1 2
4 4
R357 100K_0402_5%R357 100K_0402_5%
1 2
R359 2.2K_0402_5%R359 2.2K_0402_5%
1 2
R360 2.2K_0402_5%R360 2.2K_0402_5%
1 2
R361 10K_0402_5%R361 10K_0402_5%
1 2
R362 2.2K_0402_5%R362 2.2K_0402_5%
1 2
R363 2.2K_0402_5%R363 2.2K_0402_5%
B
U8D
U8D
J2
PCI_PME#/GEVENT4#
K1
RI#/GEVENT22#
D3
SPI_CS3#/GBE_STAT1/GEVENT21#
PM_SLP_S3#<31> PM_SLP_S5#<31> PBTN_OUT#<31> SB_PWRGD<31>
SUS_STAT#<12,15>
GATEA20<31> KB_RST#<31> EC_SCI#<31> EC_SMI#<31>
EC_SWI#<26>
H_THERMTRIP#<7>
NB_PWRGD<12>
EC_RSMRST#<31>
PCH_SPKR<29> SMB_CK_CLK0<9,10,16> SMB_CK_DAT0<9,10,16> SMB_CK_CLK1<28> SMB_CK_DAT1<28>
EC_LID_OUT#<31>
USB_OC#2<25,31> USB_OC#0<30,31>
B
SUS_STAT#
HDMI_DET
SMB_CK_CLK0 SMB_CK_DAT0 SMB_CK_CLK1 SMB_CK_DAT1
EC_LID_OUT#
USB_OC#2 USB_OC#0
R345 33_0402_5%R345 33_0402_5%
1 2
R136 33_0402_5%R136 33_0402_5%
1 2
R346 33_0402_5%R346 33_0402_5%
1 2
R138 33_0402_5%R138 33_0402_5%
1 2
R347 33_0402_5%R347 33_0402_5%
1 2
R142 33_0402_5%R142 33_0402_5%
1 2
R348 33_0402_5%R348 33_0402_5%
1 2
R144 33_0402_5%R144 33_0402_5%
1 2
T14 PADT14 PAD T12 PADT12 PAD T13 PADT13 PAD
H_THERMTRIP# NB_PWRGD
EC_RSMRST#
GBE_PHY_INTR
CIR_EN#
GBE_COL GBE_CRS
GBE_MDIO
GBE_RXERR
F1
SLP_S3#
H1
SLP_S5#
F2
PWR_BTN#
H5
PWR_GOOD
G6
SUS_STAT#
B3
TEST0
C4
TEST1/TMS
F6
TEST2
AD21
GA20IN/GEVENT0#
AE21
KBRST#/GEVENT1#
K2
LPC_PME#/GEVENT3#
J29
LPC_SMI#/GEVENT23#
H2
GEVENT5#
J1
SYS_RESET#/GEVENT19#
H6
WAKE#/GEVENT8#
F3
IR_RX1/GEVENT20#
J6
THRMTRIP#/SMBALERT#/GEVENT2#
AC19
NB_PWRGD
G1
RSMRST#
AD19
CLK_REQ4#/SATA_IS0#/GPIO64
AA16
CLK_REQ3#/SATA_IS1#/GPIO63
AB21
SMARTVOLT1/SATA_IS2#/GPIO50
AC18
CLK_REQ0#/SATA_IS3#/GPIO60
AF20
SATA_IS4#/FANOUT3/GPIO55
AE19
SATA_IS5#/FANIN3/GPIO59
AF19
SPKR/GPIO66
AD22
SCL0/GPIO43
AE22
SDA0/GPIO47
F5
SCL1/GPIO227
F4
SDA1/GPIO228
AH21
CLK_REQ2#/FANIN4/GPIO62
AB18
CLK_REQ1#/FANOUT4/GPIO61
E1
IR_LED#/LLB#/GPIO184
AJ21
SMARTVOLT2/SHUTDOWN#/GPIO51
H4
DDR3_RST#/GEVENT7#
D5
GBE_LED0/GPIO183
D7
GBE_LED1/GEVENT9#
G5
GBE_LED2/GEVENT10#
K3
GBE_STAT0/GEVENT11#
AA20
CLK_REQG#/GPIO65/OSCIN
H3
BLINK/USB_OC7#/GEVENT18#
D1
USB_OC6#/IR_TX1/GEVENT6#
E4
USB_OC5#/IR_TX0/GEVENT17#
D4
USB_OC4#/IR_RX0/GEVENT16#
E8
USB_OC3#/AC_PRES/TDO/GEVENT15#
F7
USB_OC2#/TCK/GEVENT14#
E7
USB_OC1#/TDI/GEVENT13#
F8
USB_OC0#/TRST#/GEVENT12#
M3
AZ_BITCLK
N1
AZ_SDOUT
L2
AZ_SDIN0/GPIO167
M2
AZ_SDIN1/GPIO168
M1
AZ_SDIN2/GPIO169
M4
AZ_SDIN3/GPIO170
N2
AZ_SYNC
P2
AZ_RST#
T1
GBE_COL
T4
GBE_CRS
L6
GBE_MDCK
L5
GBE_MDIO
T9
GBE_RXCLK
U1
GBE_RXD3
U3
GBE_RXD2
T2
GBE_RXD1
U2
GBE_RXD0
T5
GBE_RXCTL/RXDV
V5
GBE_RXERR
P5
GBE_TXCLK
M5
GBE_TXD3
P9
GBE_TXD2
T7
GBE_TXD1
P7
GBE_TXD0
M7
GBE_TXCTL/TXEN
P4
GBE_PHY_PD
M9
GBE_PHY_RST#
V7
GBE_PHY_INTR
E23
PS2_DAT/SDA4/GPIO187
E24
PS2_CLK/SCL4/GPIO188
F21
SPI_CS2#/GBE_STAT2/GPIO166
G29
FC_RST#/GPO160
D27
PS2KB_DAT/GPIO189
F28
PS2KB_CLK/GPIO190
F29
PS2M_DAT/GPIO191
E27
PS2M_CLK/GPIO192
SB820M_FCBGA605
SB820M_FCBGA605
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
SB800
SB800
Part 4 of 5
Part 4 of 5
GBE LAN
GBE LAN
C
USB_FSD1N
USB_FSD0N
USB_HSD9P
USB_HSD9N
USB_HSD8P
USB_HSD8N
USB_HSD7P
USB_HSD7N
USB_HSD6P
USB_HSD6N
USB_HSD5P
USB_HSD5N
USB_HSD4P
USB_HSD4N
USB_HSD3P
USB_HSD3N
USB_HSD2P
USB_HSD2N
USB_HSD1P
USB_HSD1N
USB_HSD0P
USB_HSD0N
Deciphered Date
Deciphered Date
Deciphered Date
A10
USB_RCOMP
G19
J10 H11
H9 J8
B12 A12
F11 E11
E14 E12
J12 J14
USB20_P9
A13
USB20_N9
B13
USB20_P8
D13
USB20_N8
C13 G12
G14
USB20_P6
G16
USB20_N6
G18
USB20_P5
D16
USB20_N5
C16 B14
A14 E18
E16
USB20_P2
J16
USB20_N2
J18
USB20_P1
B17
USB20_N1
A17
USB20_P0
A16
USB20_N0
B16
D25 F23
SB_SIC
B26
SB_SID
E26 F25 E22 F22 E21
G24 G25 E28 E29 D29 D28 C29 C28
B28 A27 B27 D26 A26
Nile
C26 A24 B25 A25 D24
Danube
B24 C24 B23 A23 D22 C22 A22 B22
USBCLK/14M_25M_48M_OSC
ACPI / WAKE UP EVENTS
ACPI / WAKE UP EVENTS
GPIO
GPIO
USB OC
USB OC
EC_PWM0/EC_TIMER0/GPIO197 EC_PWM1/EC_TIMER1/GPIO198 EC_PWM2/EC_TIMER2/GPIO199 EC_PWM3/EC_TIMER3/GPIO200
HD AUDIO
HD AUDIO
EMBEDDED CTRL
EMBEDDED CTRL
2008-09-25 2009-09-25
2008-09-25 2009-09-25
2008-09-25 2009-09-25
USB_FSD1P/GPIO186
USB_FSD0P/GPIO185
USB 1.1 USB MISCEMBEDDED CTRL
USB 1.1 USB MISCEMBEDDED CTRL
USB 2.0
USB 2.0
SCL2/GPIO193 SDA2/GPIO194
SCL3_LV/GPIO195
SDA3_LV/GPIO196
KSI_0/GPIO201 KSI_1/GPIO202 KSI_2/GPIO203 KSI_3/GPIO204 KSI_4/GPIO205 KSI_5/GPIO206 KSI_6/GPIO207 KSI_7/GPIO208
KSO_0/GPIO209 KSO_1/GPIO210 KSO_2/GPIO211 KSO_3/GPIO212 KSO_4/GPIO213 KSO_5/GPIO214 KSO_6/GPIO215 KSO_7/GPIO216 KSO_8/GPIO217
KSO_9/GPIO218 KSO_10/GPIO219 KSO_11/GPIO220 KSO_12/GPIO221 KSO_13/GPIO222 KSO_14/GPIO223 KSO_15/GPIO224 KSO_16/GPIO225 KSO_17/GPIO226
USB_RCOMP
USB_HSD13P USB_HSD13N
USB_HSD12P USB_HSD12N
USB_HSD11P USB_HSD11N
USB_HSD10P USB_HSD10N
D
@
@
1 2
R337 100_0402_5%
R337 100_0402_5%
1 2
R33811.8K_0402_1% R33811.8K_0402_1%
USB20_P9 <18> USB20_N9 <18>
USB20_P8 <28> USB20_N8 <28>
USB20_P6 <28> USB20_N6 <28>
USB20_P5 <27> USB20_N5 <27>
USB20_P2 <25> USB20_N2 <25>
USB20_P1 <30> USB20_N1 <30>
USB20_P0 <30> USB20_N0 <30>
GPIO199 <24> GPIO200 <24>
GPIO201 GPIO202 GPIO203 GPIO204 GPIO205
GPIO201
GPIO202 GPIO203
High
High High
High High Low
Low
Low
Low
Low
GPIO204 GPIO205
Low Low
HighLow
High Low
High High
D
E
@
@
C587 100P_0402_25V8K
C587 100P_0402_25V8K
1 2
CLK_48M_USB <16>
OHCI4
EHCI13 / OHCI3
USB-9 Int Camera USB-8 WLAN
EHCI2 / OHCI2
USB-6 Bluetooth USB-4 Card Reader (3 IN 1)
EHCI1 / OHCI1
USB-2 USB/eSATA
<Wake Up support>
USB-1 Right side USB-0 Right side
R73
@R73
@ 10K_0402_5%
10K_0402_5%
STRAP PIN
GPIO201 GPIO202 GPIO203
1 2
R74
R74 1K_0402_1%
1K_0402_1%
1 2
1 2
1 2
Nile-M
Nile-S
Low
High
Danube Marseille
Danube Hamburg
Madison LP
1 2
None
Park XT
M92-XTX
Title
Title
Title
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
GPIO204 GPIO205
@
@
1 2
MADISON@
MADISON@
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
401851
401851
401851
E
R75
@R75
@ 10K_0402_5%
10K_0402_5%
R77
R77
1K_0402_1%
1K_0402_1%
R51
R51 10K_0402_5%
10K_0402_5%
R55
R55 10K_0402_5%
10K_0402_5%
+3VALW
21 53Wednesday, January 20, 2010
21 53Wednesday, January 20, 2010
21 53Wednesday, January 20, 2010
+3VALW
1 2
1 2
1 2
@
@
1 2
MANHA@
MANHA@
of
of
of
R78
R78 10K_0402_5%
10K_0402_5%
R79
@R79
@ 10K_0402_5%
10K_0402_5%
R56
R56 10K_0402_5%
10K_0402_5%
R57
R57 10K_0402_5%
10K_0402_5%
A
A
A
A
1 1
HDD
ODD
eSATA
2 2
1 2
C588
C588 27P_0402_50V8J
27P_0402_50V8J
@
@
25MHZ_20PF_7A25000012
25MHZ_20PF_7A25000012
1 2
C589
C589 27P_0402_50V8J
27P_0402_50V8J
@
@
3 3
4 4
A
Y4
Y4
1 2
@
@
1
C445
C445
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
SATA_X1
12
R368
R368 10M_0402_5%
10M_0402_5%
SATA_X2
@
@
+3VALW
CS# CLK DI DO
SATA_STX_DRX_P0<25> SATA_STX_DRX_N0<25>
SATA_RXN0_C<25> SATA_RXP0_C<25>
SATA_STX_DRX_P1<25> SATA_STX_DRX_N1<25>
SATA_RXN1_C<25> SATA_RXP1_C<25>
SATA_STX_DRX_P3<25> SATA_STX_DRX_N3<25>
SATA_RXN3_C<25> SATA_RXP3_C<25>
R364 1K_0402_1%R364 1K_0402_1%
+1.1VS_SATA
20mils
R86
R86 10_0402_5%
10_0402_5% @
@
1 2
1
C155
C155 10P_0402_50V8J
10P_0402_50V8J
2
@
@
R365 931_0402_1%R365 931_0402_1%
SATA_LED#<33>
R367 10K_0402_5%R367 10K_0402_5%
+3VS
U47
U47
8
VCC
3
W
7
HOLD
1
S
6
C
5
D
SST25LF080A_SO8-200mil
SST25LF080A_SO8-200mil
Socket: SP07000F500 & SP07000H900
1 2
VSS
Q
B
12 12
4
2
B
SATA_STX_DRX_P0 SATA_STX_DRX_N0
SATA_STX_DRX_P1 SATA_STX_DRX_N1
SATA_STX_DRX_P3 SATA_STX_DRX_N3
SATA_CALRP SATA_CALRN
DO DI CLK CS#
SATA_X1
SATA_X2
U8B
U8B
AH9
SATA_TX0P
AJ9
SATA_TX0N
AJ8
SATA_RX0N
AH8
SATA_RX0P
AH10
SATA_TX1P
AJ10
SATA_TX1N
AG10
SATA_RX1N
AF10
SATA_RX1P
AG12
SATA_TX2P
AF12
SATA_TX2N
AJ12
SATA_RX2N
AH12
SATA_RX2P
AH14
SATA_TX3P
AJ14
SATA_TX3N
AG14
SATA_RX3N
AF14
SATA_RX3P
AG17
SATA_TX4P
AF17
SATA_TX4N
AJ17
SATA_RX4N
AH17
SATA_RX4P
AJ18
SATA_TX5P
AH18
SATA_TX5N
AH19
SATA_RX5N
AJ19
SATA_RX5P
AB14
SATA_CALRP
AA14
SATA_CALRN
AD11
SATA_ACT#/GPIO67
AD16
SATA_X1
AC16
SATA_X2
J5
SPI_DI/GPIO164
E2
SPI_DO/GPIO163
K4
SPI_CLK/GPIO162
K9
SPI_CS1#/GPIO165
G2
ROM_RST#/GPIO161
SB820M_FCBGA605
SB820M_FCBGA605
C
SB800
SB800
Part 2 of 5
Part 2 of 5
SERIAL ATA
SERIAL ATA
HW MONITOR
HW MONITOR
SPI ROM
SPI ROM
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
FC_FBCLKOUT
FC_FBCLKIN
FC_OE#/GPIOD145
FC_AVD#/GPIOD146
FC_WE#/GPIOD148 FC_CE1#/GPIOD149 FC_CE2#/GPIOD150
FC_INT1/GPIOD144 FC_INT2/GPIOD147
FC_ADQ0/GPIOD128 FC_ADQ1/GPIOD129 FC_ADQ2/GPIOD130 FC_ADQ3/GPIOD131 FC_ADQ4/GPIOD132 FC_ADQ5/GPIOD133 FC_ADQ6/GPIOD134 FC_ADQ7/GPIOD135 FC_ADQ8/GPIOD136
FC_ADQ9/GPIOD137 FC_ADQ10/GPIOD138 FC_ADQ11/GPIOD139 FC_ADQ12/GPIOD140
FLASH
FLASH
FC_ADQ13/GPIOD141 FC_ADQ14/GPIOD142 FC_ADQ15/GPIOD143
FANOUT0/GPIO52 FANOUT1/GPIO53 FANOUT2/GPIO54
FANIN0/GPIO56 FANIN1/GPIO57 FANIN2/GPIO58
TEMPIN0/GPIO171 TEMPIN1/GPIO172 TEMPIN2/GPIO173
TEMPIN3/TALERT#/GPIO174
TEMP_COMM VIN0/GPIO175
VIN1/GPIO176 VIN2/GPIO177 VIN3/GPIO178 VIN4/GPIO179 VIN5/GPIO180
VIN6/GBE_STAT3/GPIO181
VIN7/GBE_LED3/GPIO182
2008-09-25 2009-09-25
2008-09-25 2009-09-25
2008-09-25 2009-09-25
C
FC_CLK
NC1 NC2
AH28 AG28 AF26
AF28 AG29 AG26 AF27 AE29 AF29 AH27
AJ27 AJ26 AH25 AH24 AG23 AH23 AJ22 AG21 AF21 AH22 AJ23 AF23 AJ24 AJ25 AG25 AH26
W5 W6 Y9
W7 V9 W8
B6 A6 A5 B5 C7
A3 B4 A4 C5 A7 B7 B8 A8
G27 Y2
R43 150K_0402_5%R43 150K_0402_5%
1 2
2 1
MEM_1V5 is for gating the glitch on PCI_AD24
PCI_AD24<20,24>
PCI_AD24 1 : VDDR=1.05V 0 : VDDR=0.9V
Deciphered Date
Deciphered Date
Deciphered Date
MEM_1V5
D
D22
D22 CH751H-40PT_SOD323-2
CH751H-40PT_SOD323-2
MEM_1V5
1 2
R422 0_0402_5%R422 0_0402_5%
D
+3VALW
C685
C685
12
0.1U_0402_16V4Z
0.1U_0402_16V4Z 2 1
ACIN <31,33,44>
+3VS
5
U23
U23
P
B
4
Y
A
G
NC7SZ08P5X_NL_SC70-5
NC7SZ08P5X_NL_SC70-5
3
@
@
1 2
R423 0_0402_5%
R423 0_0402_5%
E
Verify when PCBA back
@
@
1 2
R424 33_0402_5%
R424 33_0402_5%
2
C686
C686 150P_0402_50V8J
150P_0402_50V8J
1
VDDR_SW <49>
For VDDR Voltage Switch, AMD suggest
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
401851
401851
401851
22 53Wednesday, January 20, 2010
22 53Wednesday, January 20, 2010
22 53Wednesday, January 20, 2010
E
of
of
of
A
A
A
A
1 2
R371 0_0402_5%R371 0_0402_5%
+VDDPL_3V_PCIE
+1.1VS_PCIE
12
+VDDPL_3V_SATA
+1.1VS_SATA
12
L72
L72
12
12
131mA
567mA
+AVDD_USB
+1.1V_USB
+3VS
1 1
+1.1VS
2 2
+1.1VS
1 2 C591 22U_0805_6.3V6MC591 22U_0805_6.3V6M C592 0.1U_0402_16V4ZC592 0.1U_0402_16V4Z
1 2 C593 0.1U_0402_16V4ZC593 0.1U_0402_16V4Z
1 2 C599 0.1U_0402_16V4ZC599 0.1U_0402_16V4Z
1 2
L70
L70
FBMA-L11-201209-221LMA30T_0805
FBMA-L11-201209-221LMA30T_0805
C604 22U_0805_6.3V6MC604 22U_0805_6.3V6M
1 2
C605 1U_0402_6.3V4ZC605 1U_0402_6.3V4Z
1 2
C606 0.1U_0402_16V4ZC606 0.1U_0402_16V4Z
1 2
C607 0.1U_0402_16V4ZC607 0.1U_0402_16V4Z
1 2
L71
FBMA-L11-201209-221LMA30T_0805
FBMA-L11-201209-221LMA30T_0805
L71
C610 22U_0805_6.3V6MC610 22U_0805_6.3V6M
1 2
C611 1U_0402_6.3V4ZC611 1U_0402_6.3V4Z
1 2
C612 1U_0402_6.3V4ZC612 1U_0402_6.3V4Z
1 2
C613 0.1U_0402_16V4ZC613 0.1U_0402_16V4Z
1 2
C614 0.1U_0402_16V4ZC614 0.1U_0402_16V4Z
1 2
check 220ohm bead
+3VALW
FBMA-L11-201209-221LMA30T_0805
FBMA-L11-201209-221LMA30T_0805
C617 10U_0805_10V4ZC617 10U_0805_10V4Z
1 2
C618 10U_0805_10V4ZC618 10U_0805_10V4Z
1 2
C619 1U_0402_6.3V4ZC619 1U_0402_6.3V4Z
1 2
C620 1U_0402_6.3V4ZC620 1U_0402_6.3V4Z
1 2
C621 0.1U_0402_16V4ZC621 0.1U_0402_16V4Z
1 2
L74
3 3
+1.1VALW
L74
FBMA-L11-160808-221LMT 0603
FBMA-L11-160808-221LMT 0603
C625 2.2U_0603_6.3V4ZC625 2.2U_0603_6.3V4Z
12
C626 0.1U_0402_16V4ZC626 0.1U_0402_16V4Z
12
71mA
43mA
600mA
93mA
658mA
200mA
AH1
AC21
AC8
AA19
AF22 AE25 AF24 AC22
AE28
W22 W26
AD14
AJ20 AF18 AH20 AG19 AE18 AD18 AE16
V6 Y19 AE5
AA2 AB4
AA7 AA9 AF7
U26 V22 V26 V27 V28 V29
A18 A19 A20 B18 B19 B20 C18 C20 D18 D19 D20 E19
C11 D11
B
U8C
U8C
SB820M_FCBGA605
SB820M_FCBGA605
SB800
SB800
VDDIO_33_PCIGP_1 VDDIO_33_PCIGP_2 VDDIO_33_PCIGP_3 VDDIO_33_PCIGP_4 VDDIO_33_PCIGP_5 VDDIO_33_PCIGP_6 VDDIO_33_PCIGP_7 VDDIO_33_PCIGP_8 VDDIO_33_PCIGP_9 VDDIO_33_PCIGP_10 VDDIO_33_PCIGP_11 VDDIO_33_PCIGP_12
VDDIO_18_FC_1 VDDIO_18_FC_2 VDDIO_18_FC_3 VDDIO_18_FC_4
POWER
POWER
VDDPL_33_PCIE
VDDAN_11_PCIE_1 VDDAN_11_PCIE_2 VDDAN_11_PCIE_3 VDDAN_11_PCIE_4 VDDAN_11_PCIE_5 VDDAN_11_PCIE_6 VDDAN_11_PCIE_7 VDDAN_11_PCIE_8
VDDPL_33_SATA VDDAN_11_SATA_1
VDDAN_11_SATA_4 VDDAN_11_SATA_2 VDDAN_11_SATA_3 VDDAN_11_SATA_5 VDDAN_11_SATA_6 VDDAN_11_SATA_7
VDDAN_33_USB_S_1 VDDAN_33_USB_S_2 VDDAN_33_USB_S_3 VDDAN_33_USB_S_4 VDDAN_33_USB_S_5 VDDAN_33_USB_S_6 VDDAN_33_USB_S_7 VDDAN_33_USB_S_8 VDDAN_33_USB_S_9 VDDAN_33_USB_S_10 VDDAN_33_USB_S_11 VDDAN_33_USB_S_12
VDDAN_11_USB_S_1 VDDAN_11_USB_S_2
Part 3 of 5
Part 3 of 5
PCI/GPIO I/O
PCI/GPIO I/O
FLASH I/O
FLASH I/O
VDDCR_11_GBE_S_1 VDDCR_11_GBE_S_2
GBE LAN
GBE LAN
PCI EXPRESSSERIAL ATA
PCI EXPRESSSERIAL ATA
CORE S5
CORE S5
USB I/O
USB I/O
PLL CLKGEN I/O
PLL CLKGEN I/O
VDDCR_11_1 VDDCR_11_2 VDDCR_11_3 VDDCR_11_4 VDDCR_11_5 VDDCR_11_6 VDDCR_11_7
CORE S03.3V_S5 I/O
CORE S03.3V_S5 I/O
VDDCR_11_8 VDDCR_11_9
VDDAN_11_CLK_1 VDDAN_11_CLK_2 VDDAN_11_CLK_3 VDDAN_11_CLK_4 VDDAN_11_CLK_5 VDDAN_11_CLK_6 VDDAN_11_CLK_7 VDDAN_11_CLK_8
VDDRF_GBE_S
VDDIO_33_GBE_S
VDDIO_GBE_S_1 VDDIO_GBE_S_2
VDDIO_33_S_1 VDDIO_33_S_2 VDDIO_33_S_3 VDDIO_33_S_4 VDDIO_33_S_5 VDDIO_33_S_6 VDDIO_33_S_7 VDDIO_33_S_8
VDDCR_11_S_1 VDDCR_11_S_2
VDDIO_AZ_S
VDDCR_11_USB_S_1 VDDCR_11_USB_S_2
VDDPL_33_SYS VDDPL_11_SYS_S VDDPL_33_USB_S
VDDAN_33_HWM_S
VDDXL_33_S
N13 R15 N17 U13 U17 V12 V18 W12 W18
K28 K29 J28 K26 J21 J20 K21 J22
V1 M10
L7 L9
M6 P8
A21 D21 B21 K10 L10 J9 T6 T8
F26 G26
M8 A11
B11
M21 L22 F19 D6 L20
510mA
400mA
32mA
113mA TBD
197mA
47mA 62mA 17mA 5mA 197mA
+1.1VS_VDDC
+1.1VS_CKVDD
1 2
R372 0_0402_5%R372 0_0402_5%
1 2
R373 0_0402_5%R373 0_0402_5%
1 2
R374 0_0402_5%R374 0_0402_5%
1 2
R375 0_0402_5%R375 0_0402_5%
+VDDIO_AZ
+VDDPL_3V +VDDPL_11V +VDDPL_3V_USB +3V_HWM
Need to Check
C
1 2
R369 0_0805_5%R369 0_0805_5%
1 2
12 12 12 12
L69
L69
FBMA-L11-201209-221LMA30T_0805
FBMA-L11-201209-221LMA30T_0805
1 2
+3VALW
C6082.2U_0603_6.3V4Z C6082.2U_0603_6.3V4Z
1 2
C6092.2U_0603_6.3V4Z C6092.2U_0603_6.3V4Z
1 2
C615 1U_0402_6.3V4ZC615 1U_0402_6.3V4Z C616 1U_0402_6.3V4ZC616 1U_0402_6.3V4Z
Need to Check
+VDDCR_USB
L73 FBMA-L11-160808-221LMT 0603L73 FBMA-L11-160808-221LMT 0603 C622 10U_0805_10V4ZC622 10U_0805_10V4Z
C623 0.1U_0402_16V4ZC623 0.1U_0402_16V4Z C624 0.1U_0402_16V4ZC624 0.1U_0402_16V4Z
+VDDLX_3V
L75 FBMA-L11-160808-221LMT 0603L75 FBMA-L11-160808-221LMT 0603
C627 2.2U_0603_6.3V4ZC627 2.2U_0603_6.3V4Z
12 12 12 12
12 12
1 2
1 2
D
U8E
+1.1VS
C59010U_0805_10V4Z C59010U_0805_10V4Z
C5961U_0402_6.3V4Z C5961U_0402_6.3V4Z C5941U_0402_6.3V4Z C5941U_0402_6.3V4Z C5970.1U_0402_16V4Z C5970.1U_0402_16V4Z C5980.1U_0402_16V4Z C5980.1U_0402_16V4Z
12
+1.1VS
C59522U_0805_6.3V6M C59522U_0805_6.3V6M
C6001U_0402_6.3V4Z C6001U_0402_6.3V4Z C6011U_0402_6.3V4Z C6011U_0402_6.3V4Z C6020.1U_0402_16V4Z C6020.1U_0402_16V4Z C6030.1U_0402_16V4Z C6030.1U_0402_16V4Z
12 12
External Clock, connect to +1.1VS directly, no need thick trace
check can be removed?
+1.1VALW
+1.1VALW
12
+3VALW
12
Y14
VSSIO_SATA_1
Y16
VSSIO_SATA_2
AB16
VSSIO_SATA_3
AC14
VSSIO_SATA_4
AE12
VSSIO_SATA_5
AE14
VSSIO_SATA_6
AF9
VSSIO_SATA_7
AF11
VSSIO_SATA_8
AF13
VSSIO_SATA_9
AF16
VSSIO_SATA_10
AG8
VSSIO_SATA_11
AH7
VSSIO_SATA_12
AH11
VSSIO_SATA_13
AH13
VSSIO_SATA_14
AH16
VSSIO_SATA_15
AJ7
VSSIO_SATA_16
AJ11
VSSIO_SATA_17
AJ13
VSSIO_SATA_18
AJ16
VSSIO_SATA_19
A9
VSSIO_USB_1
B10
VSSIO_USB_2
K11
VSSIO_USB_3
B9
VSSIO_USB_4
D10
VSSIO_USB_5
D12
VSSIO_USB_6
D14
VSSIO_USB_7
D17
VSSIO_USB_8
E9
VSSIO_USB_9
F9
VSSIO_USB_10
F12
VSSIO_USB_11
F14
VSSIO_USB_12
F16
VSSIO_USB_13
C9
VSSIO_USB_14
G11
VSSIO_USB_15
F18
VSSIO_USB_16
D9
VSSIO_USB_17
H12
VSSIO_USB_18
H14
VSSIO_USB_19
H16
VSSIO_USB_20
H18
VSSIO_USB_21
J11
VSSIO_USB_22
J19
VSSIO_USB_23
K12
VSSIO_USB_24
K14
VSSIO_USB_25
K16
VSSIO_USB_26
K18
VSSIO_USB_27
H19
VSSIO_USB_28
Y4
EFUSE
D8
VSSAN_HWM
M19
VSSXL
P21
VSSIO_PCIECLK_1
P20
VSSIO_PCIECLK_2
M22
VSSIO_PCIECLK_3
M24
VSSIO_PCIECLK_4
M26
VSSIO_PCIECLK_5
P22
VSSIO_PCIECLK_6
P24
VSSIO_PCIECLK_7
P26
VSSIO_PCIECLK_8
T20
VSSIO_PCIECLK_9
T22
VSSIO_PCIECLK_10
T24
VSSIO_PCIECLK_11
V20
VSSIO_PCIECLK_12
J23
VSSIO_PCIECLK_13
SB820M_FCBGA605
SB820M_FCBGA605
U8E
SB800
SB800
GROUND
GROUND
VSSIO_PCIECLK_14 VSSIO_PCIECLK_15 VSSIO_PCIECLK_16 VSSIO_PCIECLK_17 VSSIO_PCIECLK_18 VSSIO_PCIECLK_19 VSSIO_PCIECLK_20 VSSIO_PCIECLK_21 VSSIO_PCIECLK_22 VSSIO_PCIECLK_23 VSSIO_PCIECLK_24 VSSIO_PCIECLK_25 VSSIO_PCIECLK_26 VSSIO_PCIECLK_27
Part 5 of 5
Part 5 of 5
VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8
VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50 VSS_51 VSS_52
VSSPL_SYS
E
AJ2 A28 A2 E5 D23 E25 E6 F24 N15 R13 R17 T10 P10 V11 U15 M18 V19 M11 L12 L18 J7 P3 V4 AD6 AD4 AB7 AC9 V8 W9 W10 AJ28 B29 U4 Y18 Y10 Y12 Y11 AA11 AA12 G4 J4 G8 G9 M12 AF25 H7 AH29 V10 P6 N4 L4 L8
M20
H23 H26 AA21 AA23 AB23 AD23 AA26 AC26 Y20 W21 W20 AE26 L21 K20
+VDDPL_3V_PCIE +3VS
1
C628
C628
0.1U_0402_16V4Z
0.1U_0402_16V4Z
4 4
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
+VDDPL_3V_SATA +3VS
1
C636
C636
2
L79
L79
C634
C634
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
L81
L81
C637
C637
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
A
12
12
FBMA-L11-160808-221LMT 0603
FBMA-L11-160808-221LMT 0603
1
2
FBMA-L11-160808-221LMT 0603
FBMA-L11-160808-221LMT 0603
1
2
1
2
+VDDIO_AZ
1
2
L80
L80
FBMA-L11-160808-221LMT 0603
FBMA-L11-160808-221LMT 0603
C635
C635
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
1 2
R376 0_0402_5%R376 0_0402_5%
1 2
R52 0_0402_5%
R52 0_0402_5%
@
@
C638
C638
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
+3VS+VDDPL_3V
12
+3VALW
For 3V AZ device
B
+VDDPL_11V +1.1VALW +VDDPL_3V_USB +3VALW +3V_HWM +3VALW
L76
+1.5VS
L76
FBMA-L11-160808-221LMT 0603
FBMA-L11-160808-221LMT 0603
1
C629
C629
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
2
12
1
C630
C630
0.1U_0402_16V4Z
0.1U_0402_16V4Z
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2
C
L77
L77
0_0603_5%
0_0603_5%
12
1
1
C631
C631
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
2
2008-09-25 2009-09-25
2008-09-25 2009-09-25
2008-09-25 2009-09-25
0.1U_0402_16V4Z
0.1U_0402_16V4Z
Deciphered Date
Deciphered Date
Deciphered Date
C632
C632
1
2
2
D
L78
L78
C633
C633
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
12
FBMA-L11-160808-221LMT 0603
FBMA-L11-160808-221LMT 0603
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
401851
401851
401851
23 53Wednesday, January 20, 2010
23 53Wednesday, January 20, 2010
23 53Wednesday, January 20, 2010
E
of
of
of
A
A
A
A
B
C
D
E
REQUIRED STRAPS
AZ_SDOUT
PULL
1 1
2 2
HIGH
PULL LOW
HDA_SDOUT<21>
PCI_CLK1<20> PCI_CLK2<20> PCI_CLK3<20> PCI_CLK4<20>
CLK_PCI_EC<20,31>
CLK_PCI_SIO<20,32> GPIO200<21> GPIO199<21>
LOW POWER MODE
Performance MODE
DEFAULT
R377
R377
@
@
R386
R386
PCI_CLK1
ALLOW PCIE GEN2
FORCE PCIE GEN1
DEFAULT
+VDDIO_AZ +3VS +3VS +3VS +3VS +3VALW +3VALW +3VALW +3VALW
12
10K_0402_5%
10K_0402_5%
12
10K_0402_5%
10K_0402_5%
R378
R378
10K_0402_5%
10K_0402_5%
@
@
R387
R387
10K_0402_5%
10K_0402_5%
12
12
Check Internal PU/PD
PCI_CLK2 PCI_CLK3
WATCHDOG TIMER ENABLE
WATCHDOG TIMER DISABLE
DEFAULT
R379
R379
10K_0402_5%
10K_0402_5%
@
@
R388
R388
10K_0402_5%
10K_0402_5%
USE DEBUG STRAP
IGNORE DEBUG STRAP
DEFAULT
R380
R380
10K_0402_5%
10K_0402_5%
@
@
R389
R389
10K_0402_5%
10K_0402_5%
12
12
12
12
PCI_CLK4
Inter CLK Gen Mode
Enable
Inter CLK Gen Mode
Disable
DEFAULT
12
R381
R381
10K_0402_5%
10K_0402_5%
@
@
12
R390
R390
10K_0402_5%
10K_0402_5%
EC ENABLE
EC DISABLE
DEFAULT
12
R382
R382
10K_0402_5%
10K_0402_5%
@
@
12
R391
R391
10K_0402_5%
10K_0402_5%
LCP_CLK1LPC_CLK0
CLOCKGEN ENABLE
CLOCKGEN DISABLE
DEFAULT
12
R383
R383
10K_0402_5%
10K_0402_5%
@
@
12
R392
R392
10K_0402_5%
10K_0402_5%
R384
R384
10K_0402_5%
10K_0402_5%
R393
R393
2.2K_0402_5%
2.2K_0402_5%
@
@
12
12
GPIO200
GPIO199
H,H = Reserved
H,L = SPI ROM (Default )
L,H = LPC ROM L,L = FWH ROM
12
R385
R385
2.2K_0402_5%
2.2K_0402_5%
@
@
12
R394
R394
2.2K_0402_5%
2.2K_0402_5%
+3VS+3VS
12
DEBUG STRAPS
SB800 HAS 15K INTERNAL PU FOR PCI_AD[27:23]
3 3
PULL HIGH
PULL LOW
PCI_AD27 PCI_AD26
DISABLE ILA
PLL
DEFAULT
BYPASS PCI PLL
AUTORUN
DEFAULT
ENABLE ILA AUTORUN
Check AD29,AD28 strap function
4 4
A
PCI_AD25 PCI_AD24
USE FC PLLUSE PCI
DEFAULT
BYPASS FC PLL
USE DEFAULT PCIE STRAPS
DEFAULT
USE EEPROM PCIE STRAPS
check default
B
PCI_AD23
DISABLE PCI MEM BOOT
DEFAULT
ENABLE PCI MEM BOOT
PCI_AD29<20> PCI_AD28<20> PCI_AD27<20> PCI_AD26<20> PCI_AD25<20> PCI_AD24<20,22> PCI_AD23<20>
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2008-09-25 2009-09-25
2008-09-25 2009-09-25
2008-09-25 2009-09-25
R395
R395
12
R396
R396
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
Deciphered Date
Deciphered Date
Deciphered Date
R397
R397
2.2K_0402_5%
2.2K_0402_5%
@
@
R398
R398
D
2.2K_0402_5%
2.2K_0402_5%
@
@
12
12
R399
R399
2.2K_0402_5%
2.2K_0402_5%
@
@
12
12
R400
R400
2.2K_0402_5%
2.2K_0402_5%
@
@
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
12
R401
R401
2.2K_0402_5%
2.2K_0402_5%
@
@
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
401851
401851
401851
24 53Wednesday, January 20, 2010
24 53Wednesday, January 20, 2010
24 53Wednesday, January 20, 2010
E
A
A
A
of
of
of
A
B
C
D
E
< SATA HDD Conn >
+5VS
1.2A Place closely JHDD SATA CONN.
1
C201
C201 10U_0805_10V4Z
10U_0805_10V4Z
2
1 1
24 23
2 2
JHDD
JHDD
GND GND
SUYIN_127072FR022G210ZR_RV@
SUYIN_127072FR022G210ZR_RV@
GND
GND
GND
GND GND GND
GND
Reserved
GND
1
2
V33 V33 V33
V12 V12 V12
C202
C202
0.1U_0402_16V7K
0.1U_0402_16V7K
1 2
A+
3
A-
4 5
B-
6
B+
7
8 9 10 11 12 13 14
V5
15
V5
16
V5
17 18 19 20 21 22
1
C203
C203
0.1U_0402_16V7K
0.1U_0402_16V7K
2
SATA_TXP0 SATA_TXN0
SATA_IRX_DTX_N0 SATA_IRX_DTX_P0
+3VS
+5VS
1
C204
C204
0.1U_0402_16V7K
0.1U_0402_16V7K
2
C209 0.01U_0402_25V7KC209 0.01U_0402_25V7K
1 2
C210 0.01U_0402_25V7KC210 0.01U_0402_25V7K
1 2
C211 0.01U_0402_25V7KC211 0.01U_0402_25V7K
1 2
C212 0.01U_0402_25V7KC212 0.01U_0402_25V7K
1 2
+3VS
1
C205
C205 @
@ 10U_0805_10V4Z
10U_0805_10V4Z
2
+3VS rail reserve for SSD
1
C206
C206
@
@
0.1U_0402_16V7K
0.1U_0402_16V7K
2
SATA_STX_DRX_P0 <22> SATA_STX_DRX_N0 <22>
SATA_RXN0_C <22> SATA_RXP0_C <22>
1
@
@
2
C207
C207
0.1U_0402_16V7K
0.1U_0402_16V7K
@
@
< SATA ODD Conn >
JODDB
JODDB
GND
1
C208
C208
0.1U_0402_16V7K
0.1U_0402_16V7K
2
GND
12 11 10
9 8 7 6 5 4 3 2 1
ACES_88058-120N
ACES_88058-120N
@
@
14 13 12 11 10 9 8 7 6 5 4 3 2 1
+5VS
SATA_IRX_DTX_P1 SATA_IRX_DTX_N1
SATA_TXN1 SATA_TXP1
C213 0.01U_0402_25V7KC213 0.01U_0402_25V7K
1 2
C214 0.01U_0402_25V7KC214 0.01U_0402_25V7K
1 2
C215 0.01U_0402_25V7KC215 0.01U_0402_25V7K
1 2
C216 0.01U_0402_25V7KC216 0.01U_0402_25V7K
1 2
SATA_RXP1_C <22>
SATA_RXN1_C <22>
SATA_STX_DRX_N1 <22> SATA_STX_DRX_P1 <22>
eSATA/USB Conn
2A
U11
3 3
USB_EN#<30,31>
+5VALW
U11
1
GND
VOUT
2
VOUT
VIN VIN3VOUT
4
EN
G547E2P11U_SO8
G547E2P11U_SO8
Reserve for EMI request
R196 0_0402_5%
R196 0_0402_5%
@
@
1 2
WCM-2012-900T_0805
WCM-2012-900T_0805
USB20_N2<21>
USB20_P2<21>
4 4
A
1
4
R198 0_0402_5%@ R198 0_0402_5%@
1
4
L33
L33
1 2
USB20_N2_R_S
2
2
USB20_P2_R_S
3
3
B
W=60mils
C373 4.7U_0805_10V4Z@C373 4.7U_0805_10V4Z@
8 7 6 5
FLG
1 2
USB_OC#2 <21,31>
SATA_STX_DRX_P3<22> SATA_STX_DRX_N3<22>
SATA_RXN3_C<22> SATA_RXP3_C<22>
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2008-09-25 2009-09-25
2008-09-25 2009-09-25
2008-09-25 2009-09-25
Deciphered Date
Deciphered Date
Deciphered Date
D14
D14
1
PJDLC05_SOT23-3
PJDLC05_SOT23-3
USB20_N2_R_S USB20_P2_R_S
C379 0.01U_0402_25V7KC379 0.01U_0402_25V7K
1 2
C380 0.01U_0402_25V7KC380 0.01U_0402_25V7K
1 2
C381 0.01U_0402_25V7KC381 0.01U_0402_25V7K
12
C382 0.01U_0402_25V7KC382 0.01U_0402_25V7K
12
D
+USB_VCCB+USB_VCCB
W=60mils
1
+
+
2 3
2
SATA_TXP3 SATA_TXN3
SATA_RXN3 SATA_RXP3
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
1
C377
C376
C376 220U_6.3V_M
220U_6.3V_M
10 11
12 13 14 15
C377
0.1U_0402_16V7K
0.1U_0402_16V7K
2
JESATA
JESATA
USB
USB
1
VBUS
2
D-
3
D+
4
GND
5
GND
6
A+
ESATA
ESATA
7
A-
8
GND
9
B­B+ GND
GND GND GND GND
TYCO_1759576-1@
TYCO_1759576-1@
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
1
C378
C378 1000P_0402_50V7K
1000P_0402_50V7K
2
401851
401851
401851
E
A
A
A
of
of
of
25 53Wednesday, January 20, 2010
25 53Wednesday, January 20, 2010
25 53Wednesday, January 20, 2010
5
CL1 0.1U_0402_16V7KCL1 0.1U_0402_16V7K
PCIE_PTX_C_IRX_P3<11> PCIE_PTX_C_IRX_N3<11>
D D
+3V_LAN
1 2
RL3 100K_0402_5%
RL3 100K_0402_5%
1K_0402_1%
1K_0402_1%
15K_0402_5%
C C
15K_0402_5%
EC_SWI#
@
@
+3VS
12
RL6
RL6
ISOLATEB
RL7
RL7
1 2
CL2 0.1U_0402_16V7KCL2 0.1U_0402_16V7K
1 2
PCIE_ITX_C_PRX_P3<11> PCIE_ITX_C_PRX_N3<11>
CLKREQ_LAN#<16>
PLT_RST#<12,15,20,28,31,32,35>
CLK_PCIE_LAN<16> CLK_PCIE_LAN#<16>
EC_SWI#<21>
+3V_LAN
+LAN_VDDREG
+3VALW TO +3V_LAN
+3VALW
RL25
RL25
100K_0402_5%
100K_0402_5%
WOL_EN#<31>
B B
CL12
CL12
0.1U_0402_16V7K
0.1U_0402_16V7K
1 2
1 2
RL16 47K_0402_5%RL16 47K_0402_5%
CL14
CL14
0.01U_0402_25V7K
0.01U_0402_25V7K
4.7U_0805_10V4Z
4.7U_0805_10V4Z
+3VALW
Vgs=-4.5V,Id=3A,Rds<97mohm
2
QL1
QL1
S
S
G
G
1
2
D
AO3413_SOT23
AO3413_SOT23
CL15
CL15
@
@
D
1 3
1
1
CL8 1U_0402_6.3V4ZCL8 1U_0402_6.3V4Z
2
2
1
2
+3V_LAN
4
PCIE_PRX_LANTX_P3 PCIE_PRX_LANTX_N3
RL19 0_0402_5%RL19 0_0402_5%
LAN_X1 LAN_X2
EC_SWI#
ISOLATEB
RL22 1K_0402_5%RL22 1K_0402_5%
1 2
ENSWREG
1 2
RL5 2.49K_0402_1%RL5 2.49K_0402_1%
+3V_LAN
RL4
RL4
0_0402_5%
0_0402_5%
RL23
RL23
0_0402_5%
0_0402_5%
@
@
22 23 17
18
16 25 19
20
43 44
28 26
14 15 38
33 34
35
46 24
49
ENSWREG
CL26
CL26
27P_0402_50V8J
27P_0402_50V8J
UL1
UL1
HSOP HSON HSIP
HSIN
CLKREQB PERSTB REFCLK_P
REFCLK_N
CKXTAL1 CKXTAL2
LANWAKEB ISOLATEB
NC/SMBCLK NC/SMBDATA GPO/SMBALERT
ENSWREG VDDREG
VDDREG
RSET GND
PGND
RTL8105E-GR QFN _6X6
RTL8105E-GR QFN _6X6
25MHZ_20PF_7A25000012
25MHZ_20PF_7A25000012
1
2
LED3/EEDO
LED1/EESK
EECS/SCL
NC/MDIP2 NC/MDIN2 NC/MDIP3 NC/MDIN3
+3V_AVDDXTAL
YL1
YL1
LAN_X2LAN_X1
12
27P_0402_50V8J
27P_0402_50V8J
EEDI/SDA
DVDD10 DVDD10 DVDD10
DVDD33 DVDD33
AVDD33 AVDD33 AVDD33 AVDD33
EVDD10 AVDD10
AVDD10 AVDD10 AVDD10
REGOUT
31
LAN_SK_LINK#
37
LAN_ACTIVITY#
40
LED0
MDIP0
MDIN0
MDIP1
MDIN1
RL2 10K_0402_5%RL2 10K_0402_5%
30
RL1 10K_0402_5%RL1 10K_0402_5%
32
LAN_MDI0+
1
LAN_MDI0-
2
LAN_MDI1+
4
LAN_MDI1-
5 7 8 10 11
13 29 41
27 39
12
+3V_AVDDXTAL
42 47 48
21 3
6 9 45
+LAN_REGOUT
36
RL8
RL8
0_0402_5%
0_0402_5%
RL9
RL9
0_0402_5%@
0_0402_5%@
1
CL11
CL11
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
CL11 close to pin42
1
CL27
CL27
2
3
12 12
+LAN_VDD10
+3V_LAN
+3V_LAN
+LAN_EVDD10 +LAN_VDD10
+3V_LAN
+LAN_VDD10
Reserved For 1.05V Crystal
LL1,CL13 will be changed to
2.2uH&4.7uF after EVT test
LL1
+LAN_REGOUT
Layout Note: LL1 must be within 200mil to Pin36, CL13,CL9 must be within 200mil to LL1 +LAN_REGOUT: Width =60mil
+LAN_VDD10
LL1
1 2
4.7UH_1008HC-472EJFS-A_5%_1008
4.7UH_1008HC-472EJFS-A_5%_1008
LL20_0603_5% LL20_0603_5%
1U_0402_6.3V4Z
1U_0402_6.3V4Z
Close to Pin 21
+3V_LAN
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
2
22U_0805_6.3V6M
22U_0805_6.3V6M
12
CL18
CL18
12
LL30_0603_5% LL30_0603_5%
CL28
CL28
LAN_ACTIVITY#
LAN_SK_LINK#
CL13
CL13
+LAN_EVDD10
1
2
1
2
2
1
1
2
2
CL17
CL17
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
+LAN_VDDREG
2
CL29
CL29
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
+LAN_VDD10
CL9
CL9
0.1U_0402_16V4Z
0.1U_0402_16V4Z
RL10
RL10
12
150_0402_5%
150_0402_5%
+3V_LAN
RL14
RL14
12
150_0402_5%
150_0402_5%
+3V_LAN
1
CL4,CL5,CL6,CL7 close to Pin 27,39,47,48
CL19,CL20,CL21,CL22 close to Pin 3,13,29,45
LAN Conn.
JLAN
12
12
JLAN
12
Amber LED-
11
Amber LED+
8
PR4-
7
PR4+
6
PR2-
5
PR3-
4
PR3+
3
PR2+
2
PR1-
1
PR1+
10
Green LED-
9
Green LED+
LIYO_101005-00803-3
LIYO_101005-00803-3 @
@
LAN_ACTIVITY#_R
RL17 150_0402_5%RL17 150_0402_5%
RJ45_MIDI1-
RJ45_MIDI1+
RJ45_MIDI0-
RJ45_MIDI0+
LAN_SK_LINK#_R
RL18 150_0402_5%RL18 150_0402_5%
1 2 1 2 1 2 1 2
1 2 1 2 1 2 1 2
CL40.1U_0402_16V4Z CL40.1U_0402_16V4Z CL50.1U_0402_16V4Z CL50.1U_0402_16V4Z CL60.1U_0402_16V4Z CL60.1U_0402_16V4Z CL70.1U_0402_16V4Z CL70.1U_0402_16V4Z
CL190.1U_0402_16V4Z CL190.1U_0402_16V4Z CL200.1U_0402_16V4Z CL200.1U_0402_16V4Z CL210.1U_0402_16V4Z CL210.1U_0402_16V4Z CL220.1U_0402_16V4Z CL220.1U_0402_16V4Z
SHLD4 SHLD3
SHLD2
SHLD1
+3V_LAN
+LAN_VDD10
16 15
14
13
RJ45_GND LANGND
UL3
LAN_MDI0+ LAN_MDI0- RJ45_MIDI0-
LAN_MDI1+ LAN_MDI1-
A A
5
Place these components colsed to LAN chip
1
CL34
CL34
0.1U_0402_25V4K
0.1U_0402_25V4K
2
4
UL3
1
TD+
2
TD-
3
CT
4
NC
5
NC
6
CT
7
RD+ RD-8RX-
LF-H1201P-2
LF-H1201P-2
TX+
15
TX-
14
CT
13
NC
12
NC
11
CT
RJ45_MIDI1+
10
RX+
RJ45_MIDI1-
9
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
CL42 1000P_0402_50V7KCL42 1000P_0402_50V7K
CL41 1000P_0402_50V7KCL41 1000P_0402_50V7K
3
12
12
2009-02-12 2009-02-12
2009-02-12 2009-02-12
2009-02-12 2009-02-12
1 2
RL15 75_0402_1%RL15 75_0402_1%
1 2
RL13 75_0402_1%RL13 75_0402_1%
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
RJ45_GND
RJ45_MIDI0+
16
2
1000P_1808_3KV7K
1000P_1808_3KV7K
1 2
CL36
CL36
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
1
CL37
CL37
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
401851
401851
401851
1
1
CL38
CL38
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
2
26 53Wednesday, January 20, 2010
26 53Wednesday, January 20, 2010
26 53Wednesday, January 20, 2010
A
A
A
of
of
of
5
D D
+3VS
C C
4
1 2
RC4 0_0603_5%RC4 0_0603_5%
CC1
@ CC1
@
1 2
RC1
RC1
6.19K_0402_1%
6.19K_0402_1%
1
CC3
CC3
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
100P_0402_50V8J
100P_0402_50V8J
12
+3VS_CR
CC4
CC4
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
3
UC1
UC1
1
USB20_N5<21> USB20_P5<21>
+VCC_3IN1
1 1U_0402_6.3V4Z
1U_0402_6.3V4Z 2
USB20_N5 USB20_P5 CLK_48M_CR
CC2
CC2
V1_8
SDWP_MSCLK MSCD# SD_DATA1 SD_DATA0 MS_DATA3_SD_DATA7 SDCD#
2 3
4 5 6
7 8
9 10 11 12
REFE DM
DP 3V3_IN
CARD_3V3 V18
XD_CD# SP1
SP2 SP3 SP4 SP5
EPAD
25
17
GPIO0
24
CLK_IN
23
XD_D7
22
SP14
21
SP13
20
SP12
19
SP11
18
SP10
16
SP9
15
SP8
14
SP7
13
SP6
RTS5138-GR_QFN24_4X4
RTS5138-GR_QFN24_4X4
CR_LED#
MSBS SD_DATA2_MS_DATA5 MS_DATA1_SD_DATA3
SDCMD MS_DATA0_SD_DATA5 MS_DATA2_SDCLK
2
CR_LED# <33> CLK_48M_CR <16>
1
< 48MHz >
< 3 in 1 Card Reader >
JREAD
JREAD
22
GND1
23
GND2
B B
@TAITW_R009-025-LR_NR
@TAITW_R009-025-LR_NR
SD-WP SD-DAT1 SD-DAT0
SD-GND MS-GND
MS-BS
SD-CLK MS-DAT1 MS-DAT0
SD-VCC
MS-DAT2
SD-GND
MS-INS
MS-DAT3
SD-CMD
MS-SCLK
MS-VCC
SD-DAT3
MS-GND
SD-DAT2
SD-CD
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21
SDWP_MSCLK SD_DATA1 SD_DATA0
MSBS MS_DATA2_SDCLK MS_DATA1_SD_DATA3 MS_DATA0_SD_DATA5
MSCD# MS_DATA3_SD_DATA7 SDCMD
SD_DATA2_MS_DATA5 SDCD#
1
CC5
CC5
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
+VCC_3IN1
1
CC6
CC6 1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
Issued Date
Issued Date
Issued Date
MS_DATA2_SDCLK
SDWP_MSCLK
3
2008-09-25 2009-09-25
2008-09-25 2009-09-25
2008-09-25 2009-09-25
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
401851
401851
401851
27 53Wednesday, January 20, 2010
27 53Wednesday, January 20, 2010
27 53Wednesday, January 20, 2010
1
of
of
of
A
A
A
CC7
@CC7
@
10P_0402_50V8J
10P_0402_50V8J
CC8
@CC8
@
10P_0402_50V8J
10P_0402_50V8J
A A
5
4
RC2
@RC2
@
12
1 2
10_0402_5%
10_0402_5%
RC3
@RC3
@
12
1 2
10_0402_5%
10_0402_5%
Security Classification
Security Classification
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
C
D
E
< BlueTooth Interface, USB port6 >
+3VS+3VS
2
C383
BT@
BT@
C383
@
@
0.1U_0402_16V7K
0.1U_0402_16V7K
1
1
C386
C386
@
@
0.01U_0402_25V7K
0.01U_0402_25V7K
2
1
C487
C487
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
USB20_P6 USB20_N6
S
S
G
G
2
Q27
Q27
D
D
AO3413_SOT23@
AO3413_SOT23@
1 3
Inrush current = 0A
BT@ R50
BT@
1 2
R50 0_0603_5%
0_0603_5%
+BT_VCC
ACES_87213-0600G@
ACES_87213-0600G@
1
1
2
2
3
3
4
4
5
5
6
6
JBT
JBT
7
G1
8
G2
R199
R199 100K_0402_5%
100K_0402_5%
1 1
BT_PWR#<20>
1 2
1 2
R201
@ R201
@
47K_0402_5%
47K_0402_5%
WLAN&BT Combo module circuits
BT on module
BT on module
Enable Disable
BT_CRTL
BT_PWR#
**If +3V_WLAN is +3VS, please remove D21.
2 2
SUSP#<31,34,46,49,51>
HI LO
LO HI
D2
D2
BT_PWR#
21
2
G
G
CH751H-40PT_SOD323-2
CH751H-40PT_SOD323-2
BT_CTRLSUSP#
13
D
D
Q8
Q8 2N7002_SOT23-3
2N7002_SOT23-3
S
S
< Bluetooth Connector >
+BT_VCC
R442 0_0402_5%BT@ R442 0_0402_5%BT@
BT_RST#<20>
1 2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C489
BT@
BT@
1
2
(MAX=200mA)
1
C488
C488
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
USB20_P6<21> USB20_N6<21>
BT_DET#<20>
BT@C489
BT@
< PCIe Mini Card for WLAN >
1 3 5 7
9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51
53
JWLAN
JWLAN
1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51
GND1
FOX_AS0B226-S40N-7F@
FOX_AS0B226-S40N-7F@
B
+3VS
1
CM4
CM4
0.01U_0402_25V7K
0.01U_0402_25V7K
2
+1.5VS
2
2
4
4
6
6
8
8
10
10
12
12
14
14
16
16
18
18
20
20
22
22
24
24
26
26
28
28
30
30
32
32
34
34
36
36
38
38
40
40
42
42
44
44
46
46
48
48
50
50
52
52
54
GND2
+3VS
PLT_RST#
SMB_CK_CLK1 SMB_CK_DAT1
USB20_N8 USB20_P8
1
CM5
CM5
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1
CM6
CM6
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
WL_OFF# <31>
PLT_RST# <12,15,20,26,31,32,35>
SMB_CK_CLK1 <21>
SMB_CK_DAT1 <21> USB20_N8 <21>
USB20_P8 <21>
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2008-09-25 2009-09-25
2008-09-25 2009-09-25
2008-09-25 2009-09-25
Deciphered Date
Deciphered Date
Deciphered Date
D
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
401851
401851
401851
28 53Wednesday, January 20, 2010
28 53Wednesday, January 20, 2010
28 53Wednesday, January 20, 2010
E
of
of
of
A
A
A
+1.5VS
1
CM1
CM1
0.01U_0402_25V7K
0.01U_0402_25V7K
2
3 3
E51_TXD<31> E51_RXD<31>
4 4
A
1
CM2
CM2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
CLKREQ_MCARD2#<16>
CLK_PCIE_MCARD2#<16> CLK_PCIE_MCARD2<16>
PCIE_PTX_C_IRX_N2<11> PCIE_PTX_C_IRX_P2<11>
PCIE_ITX_C_PRX_N2<11>
PCIE_ITX_C_PRX_P2<11>
RM1 0_0402_5%RM1 0_0402_5%
E51_RXD E51_RXD_R
1 2
RM2 0_0402_5%RM2 0_0402_5%
1 2
+3VS
1
CM3
CM3
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
BT_CTRL
E51_TXD_RE51_TXD
5
Codec
+DVDD_IO
RA1
RA1
0_0603_1%
0_0603_1%
RA19
@ RA19
@
0_0603_1%
0_0603_1%
RA17
RA17
0_0603_1%
0_0603_1%
12
CA2
CA2
12
12
CA8
CA8
+3VS
D D
+1.5VS
+3VS
place close to chip
Ext. Mic
C C
B B
MIC1_R_L<30> MIC1_R_R<30>
INT_MIC_DATA<18>
INT_MIC_CLK<18>
AZ_RST_HD#<21>
1 2
CA12 100P_0402_50V8JCA12 100P_0402_50V8J
CA47 0.1U_0603_50V7KCA47 0.1U_0603_50V7K
1 2
CA48 0.1U_0603_50V7KCA48 0.1U_0603_50V7K
1 2
CA49 0.1U_0603_50V7KCA49 0.1U_0603_50V7K
1 2
CA50 0.1U_0603_50V7KCA50 0.1U_0603_50V7K
1 2
1 2
RA18 0_0603_5%RA18 0_0603_5%
RA20 FBMA-L10-160808-301LMT_2PRA20 FBMA-L10-160808-301LMT_2P
+MIC1_VREFO_L
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
CA1
CA1
10U_0805_10V4Z
10U_0805_10V4Z
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
CA7
CA7
10U_0805_10V4Z
10U_0805_10V4Z
2
CA234.7U_0805_10V4Z CA234.7U_0805_10V4Z
12 12
CA294.7U_0805_10V4Z CA294.7U_0805_10V4Z
1 2
MONO_IN
SENSE_A
1 2
CA15
CA15
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
DGND
1
+3VS_DVDD
2
35 mA
1
2
1
9
DVDD
DVDD_IO
23
LINE1_L
24
LINE1_R
14
LINE2_L
15
LINE2_R
21
MIC1_L
22
MIC1_R
16
MIC2_L
17
MIC2_R
2
GPIO0/DMIC_DATA
3
GPIO1/DMIC_CLK
4
PD#
11
RESET#
12
PCBEEP
13
SENSE A
18
SENSE B
36
CBP
35
CBN
31
MIC1_VREFO_L
43
PVSS2
42
PVSS1
49
DVSS2
7
DVSS1
4
+PVDD1
JA1
JA1
JUMP_43X39
JUMP_43X39
@
@
+PVDD2
+PVDD2
1
CA61
CA61
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
+AVDD
46
AVDD125AVDD2
PVDD139PVDD2
SPK_OUT_L+
SPK_OUT_L-
SPK_OUT_R+
SPK_OUT_R-
HP_OUT_L
HP_OUT_R
SYNC
BCLK
SDATA_OUT
SDATA_IN
EAPD
SPDIFO
MONO_OUT
MIC2_VREFO
MIC1_VREFO_R
LDO_CAP
VREF JDREF CPVEE AVSS1
ALC259-GR_QFN48_7X7
ALC259-GR_QFN48_7X7
AVSS2
600 mA
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
CA57
CA57
2
2
1
place close to chip
1
68 mA
38
UA1
UA1
40 41
45 44
32 33
10 6
5 8
47 48 20
29 30
28 27 19 34 26
37
2
10U_0805_10V4Z
10U_0805_10V4Z
1
CA3
CA3
CA4
CA4
2
10U_0805_10V4Z
10U_0805_10V4Z
RA4 75_0402_1%RA4 75_0402_1% RA5 75_0402_1%RA5 75_0402_1%
AZ_SDIN0_HD_R
AC_VREF AC_JDREF
RA9 20K_0402_1%RA9 20K_0402_1%
1 2
CA14 2.2U_0603_6.3V4ZCA14 2.2U_0603_6.3V4Z
AGND
1
CA56
CA56
2
10U_0805_10V4Z
10U_0805_10V4Z
1
CA63
@ CA63
@
2
10U_0805_10V4Z
10U_0805_10V4Z
1
1
CA5
CA5
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
RA6 33_0402_5%RA6 33_0402_5%
+MIC1_VREFO_R
12
RA2
RA2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
12
0_0603_1%
0_0603_1%
0_0603_1%
0_0603_1%
0.1U_0402_16V4Z
0.1U_0402_16V4Z
SPKL+ <30> SPKL- <30>
SPKR+ <30> SPKR- <30>
CA44
CA44
RA11
RA11
0.1U_0402_16V4Z
0.1U_0402_16V4Z
12
@
@
CA62
CA62
@
@
1
CA6
CA6
place close to chip
2
12
CA28 10U_0805_10V4ZCA28 10U_0805_10V4Z
1 2
1
CA17
CA17
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
place close to chip
3
1
1
CA43
CA43
2
2
10U_0805_10V4Z
10U_0805_10V4Z
1
1
CA58
@ CA58
@
2
2
10U_0805_10V4Z
10U_0805_10V4Z
RA3
RA3
12
0_0603_1%
0_0603_1%
HP_L <30> HP_R <30>
AZ_SYNC_HD <21>
AZ_BITCLK_HD <21>
AZ_SDOUT_HD <21>
AZ_SDIN0_HD <21>
1
CA16
CA16 10U_0805_10V4Z
10U_0805_10V4Z
2
+5VS
+5VS
+5VS
Beep sound
2
EC Beep
EC_BEEP#<31>
PCI Beep
PCH_SPKR<21>
RA7
RA7
1 2
47K_0402_5%
47K_0402_5%
RA8
RA8
1 2
47K_0402_5%
47K_0402_5%
10K_0402_5%
10K_0402_5%
RA12
RA12
12
CA13
CA13
1 2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
CA18
CA18
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1
MONO_IN
Sense Pin Impedance
39.2K
SENSE A
A A
20K 10K
5.1K
39.2K 20K 10K
Codec Signals
PORT-I (PIN 32, 33) PORT-B (PIN 21, 22) PORT-C (PIN 23, 24) (PIN 48) PORT-E (PIN 14, 15) PORT-F (PIN 16, 17)SENSE B PORT-H (PIN 20)
5
Function
Headphone out Ext. MIC
place close to chip
MIC_SENSE<30>
NBA_PLUG<30>
4
RA10 20K_0402_1%RA10 20K_0402_1%
RA21 39.2K_0402_1%RA21 39.2K_0402_1%
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
12
SENSE_A
Compal Secret Data
Compal Secret Data
2009-02-12 2009-02-12
2009-02-12 2009-02-12
2009-02-12 2009-02-12
3
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
401851
401851
401851
29 53Wednesday, January 20, 2010
29 53Wednesday, January 20, 2010
29 53Wednesday, January 20, 2010
of
of
1
of
A
A
A
Speaker Connector
SPKL+<29>
SPKL-<29>
SPKR+<29>
SPKR-<29>
SPKL+
SPKL-
SPKR+
SPKR-
0_0603_1%
0_0603_1%
0_0603_1%
0_0603_1%
0_0603_1%
0_0603_1%
0_0603_1%
0_0603_1%
placement near Audio Codec
RA13
RA13
12
1
CA22
CA22
10U_0805_10V4Z@
RA14
RA14
RA15
RA15
RA16
RA16
12
12
12
CA21
CA21
CA25
CA25
CA26
CA26
10U_0805_10V4Z@
2 1
10U_0805_10V4Z@
10U_0805_10V4Z@
2
1
10U_0805_10V4Z@
10U_0805_10V4Z@
2 1
10U_0805_10V4Z@
10U_0805_10V4Z@
2
2
CA24
CA24 1U_0402_6.3V4Z
1U_0402_6.3V4Z @
@
1
2
CA27
CA27 1U_0402_6.3V4Z
1U_0402_6.3V4Z @
@
1
SPK_L1
SPK_L2
SPK_R1
SPK_R2
DA9
DA9
3
1
2
PACDN042Y3R_SOT23-3
PACDN042Y3R_SOT23-3
SPK_L1 SPK_L2 SPK_R1 SPK_R2
DA6
DA6
3
1
2
PACDN042Y3R_SOT23-3
PACDN042Y3R_SOT23-3
JSPK
JSPK
1
1
2
2
3
3
4
4
ACES_85204-0400N
ACES_85204-0400N @
@
HeadPhone/LINE Out JACK
Ext.MIC/LINE IN JACK
MIC1_R_R<29>
MIC1_R_L<29>
RA23
RA23
1K_0402_5%
1K_0402_5%
1K_0402_5%
1K_0402_5%
RA24
RA24
RA22
RA22
12
2.2K_0402_5%
12
12
2.2K_0402_5%
RA25
RA25
12
2.2K_0402_5%
2.2K_0402_5%
MIC1_R
MIC1_L
+MIC1_VREFO_R
+MIC1_VREFO_L
+5VALW +USB_VCCA
1.4A
U25
U25
1
GND
VOUT
2
VOUT
VIN
USB_EN#<25,31>
USB20_P0<21>
USB20_N0<21>
USB20_P1<21>
USB20_N1<21>
USB_EN#
VIN3VOUT
4
FLG
EN
G547E2P11U_SO8
G547E2P11U_SO8
L34
L34
4
4
1
1
WCM-2012-900T_0805
WCM-2012-900T_0805
L35
L35
4
4
1
1
WCM-2012-900T_0805
WCM-2012-900T_0805
W=60mils
C446 4.7U_0805_10V4Z
C446 4.7U_0805_10V4Z
8 7 6 5
3
3
2
2
3
3
2
2
1 2
@
@
USB20_P0_R
USB20_N0_R
USB20_P1_R
USB20_N1_R
USB_OC#0 <21,31>
Security Classification
Security Classification
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Issued Date
Issued Date
Compal Secret Data
Compal Secret Data
2009-02-12 2009-02-12
2009-02-12 2009-02-12
2009-02-12 2009-02-12
Compal Secret Data
Audio & USB Sub-Board Conn.
W=80mils
USB20_N0_R USB20_P0_R
USB20_N1_R USB20_P1_R
HP_R HP_L
MIC1_L MIC1_R NBA_PLUG MIC_SENSE
NBA_PLUG<29>
MIC_SENSE<29>
Deciphered Date
Deciphered Date
Deciphered Date
HP_R<29>
HP_L<29>
+USB_VCCA
JUSBB
JUSBB
1 2 3 4 5 6 7 8 9 10 11 12 13 14
AGND
15 16 17 18 19 20
ACES_85201-20051@
ACES_85201-20051@
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
401851
401851
401851
30 53Wednesday, January 20, 2010
30 53Wednesday, January 20, 2010
30 53Wednesday, January 20, 2010
A
A
A
of
of
of
A
B
C
D
E
+3VL +3VL_EC
C55
@C55
@
1 1
10P_0402_50V8J
10P_0402_50V8J
EC_SMB_DA2
EC_SMB_CK2
EC_SMB_DA1
EC_SMB_CK1
2 2
TP_CLK
TP_DATA
SYSON
SUSP#
LID_SW#
ON/OFFBTN#
KSO1
KSO2
3 3
ACIN_D
4 4
R44
@R44
@
12
1 2
10_0402_5%
10_0402_5%
R210 2.2K_0402_5%R210 2.2K_0402_5%
1 2
R211 2.2K_0402_5%R211 2.2K_0402_5%
1 2
R212 2.2K_0402_5%R212 2.2K_0402_5%
1 2
R213 2.2K_0402_5%R213 2.2K_0402_5%
1 2
R215 4.7K_0402_5%R215 4.7K_0402_5%
1 2
R216 4.7K_0402_5%R216 4.7K_0402_5%
1 2
R217 10K_0402_5%R217 10K_0402_5%
1 2
R218 10K_0402_5%R218 10K_0402_5%
1 2
R220 100K_0402_5%R220 100K_0402_5%
R221 100K_0402_5%R221 100K_0402_5%
R222 47K_0402_5%R222 47K_0402_5%
R223 47K_0402_5%R223 47K_0402_5%
R782
R782
100K_0402_5%
100K_0402_5%
1 2
1 2
D15
D15 CH751H-40PT_SOD323-2
CH751H-40PT_SOD323-2
C394
C394
12
100P_0402_50V8J
100P_0402_50V8J
12
R227
R227 150K_0402_5%
150K_0402_5%
R783 100K_0402_5%R783 100K_0402_5%
2 1
CLK_PCI_EC
CLK_PCI_EC<20,24>
+3VS
+3VL
+5VS
12
12
12
12
+3VALW
+3VL
E51_TXD
PLT_RST#
+3VL
ACIN <22,33,44>
R209 47K_0402_5%R209 47K_0402_5%
+3VL
C388 0.1U_0402_16V4ZC388 0.1U_0402_16V4Z
1 2
12
PLT_RST#<12,15,20,26,28,32,35>
KSI[0..7]<32,33>
KSO[0..17]<32,33>
1 2
Y10
Y10
2
NC
3
NC
32.768KHZ_12.5PF_Q13MC14610002
32.768KHZ_12.5PF_Q13MC14610002
1 2
GATEA20<21>
KB_RST#<21>
SERIRQ<20,32>
LPC_FRAME#<20,32>
LPC_AD3<20,32> LPC_AD2<20,32> LPC_AD1<20,32> LPC_AD0<20,32>
R8 0_0402_5%R8 0_0402_5%
EC_SCI#<21>
WL_BT_LED#<33>
KSI[0..7] KSO[0..17]
EC_SMB_CK1<45> EC_SMB_DA1<45> EC_SMB_CK2<7,43> EC_SMB_DA2<7,43>
PM_SLP_S3#<21> PM_SLP_S5#<21> EC_LID_OUT# <21> EC_SMI#<21>
EC_INVT_PWM<18> FAN_SPEED1<5>
E51_TXD<28> E51_RXD<28>
ON/OFFBTN#<33>
PWR_SUSP_LED#<33>
NUM_LED#<32>
C390
C390 15P_0402_50V8J
15P_0402_50V8J
1
OSC
4
OSC
C392
C392 15P_0402_50V8J
15P_0402_50V8J
1 2
@ R224
@
+3VL_EC
+EC_AVCC
12
R224 20M_0402_5%
20M_0402_5%
GATEA20
R330 0_0402_5%R330 0_0402_5%
1 2 SERIRQ LPC_FRAME# LPC_AD3 LPC_AD2 LPC_AD1 LPC_AD0
CLK_PCI_EC ECRST#
EC_SCI# WL_BT_LED#
KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7 KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15 KSO16 KSO17
EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2
PM_SLP_S3# PM_SLP_S5# EC_SMI#
FAN_SPEED1 E51_TXD
E51_RXD ON/OFFBTN# PWR_SUSP_LED# NUM_LED#
CRY1
CRY2
+3VL_EC
1
2
10 12
13 37 20 38
55 56 57 58 59 60 61 62 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 81 82
77 78 79 80
14 15 16 17 18 19 25 28 29 30 31 32 34 36
122 123
L37 0_0603_5%L37 0_0603_5%
1 2
C395
C395
0.1U_0402_16V4Z
0.1U_0402_16V4Z
L36
L36 0_0603_5%
0_0603_5%
12
U14
U14
1
GA20/GPIO00
2
KBRST#/GPIO01
3
SERIRQ#
4
LFRAME#
5
LAD3
7
LAD2
8
LAD1
LPC & MISC
LPC & MISC
LAD0 PCICLK
PCIRST#/GPIO05 ECRST# SCI#/GPIO0E CLKRUN#/GPIO1D
KSI0/GPIO30 KSI1/GPIO31 KSI2/GPIO32 KSI3/GPIO33 KSI4/GPIO34 KSI5/GPIO35 KSI6/GPIO36 KSI7/GPIO37 KSO0/GPIO20 KSO1/GPIO21 KSO2/GPIO22 KSO3/GPIO23 KSO4/GPIO24
Int. K/B
Int. K/B
KSO5/GPIO25
Matrix
Matrix
KSO6/GPIO26 KSO7/GPIO27 KSO8/GPIO28 KSO9/GPIO29 KSO10/GPIO2A KSO11/GPIO2B KSO12/GPIO2C KSO13/GPIO2D KSO14/GPIO2E KSO15/GPIO2F KSO16/GPIO48 KSO17/GPIO49
SCL1/GPIO44 SDA1/GPIO45 SCL2/GPIO46 SDA2/GPIO47
6
PM_SLP_S3#/GPIO04 PM_SLP_S5#/GPIO07 EC_SMI#/GPIO08 LID_SW#/GPIO0A SUSP#/GPIO0B PBTN_OUT#/GPIO0C EC_PME#/GPIO0D EC_THERM#/GPIO11 FAN_SPEED1/FANFB1/GPIO14 FANFB2/GPIO15 EC_TX/GPIO16 EC_RX/GPIO17 ON_OFF/GPIO18 PWR_LED#/GPIO19 NUMLED#/GPIO1A
XCLK1 XCLK0
1 2
1
C396
C396
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
SM Bus
SM Bus
1 2
+EC_AVCC
9
22
33
96
111
125
VCC
VCC
VCC
VCC
VCC
VCC
INVT_PWM/PWM1/GPIO0F
ACOFF/FANPWM2/GPIO13
PWM Output
PWM Output
AD Input
AD Input
DA Output
DA Output
PS2 Interface
PS2 Interface
TP_DATA/PSDAT3/GPIO4F
SPI Device Interface
SPI Device Interface
SPI Flash ROM
SPI Flash ROM
GPIO
GPIO
GPO
GPO
GPIO
GPIO
GPI
GPI
GND
GND
GND
GND
GND
11
24
35
94
113
C393
C393
0.1U_0402_16V4Z
0.1U_0402_16V4Z
L380_0603_5% L380_0603_5%
1
C397
C397 1000P_0402_50V7K
1000P_0402_50V7K
2
67
AVCC
BEEP#/PWM2/GPIO10
FANPWM1/GPIO12
BATT_TEMP/AD0/GPIO38
BATT_OVP/AD1/GPIO39
ADP_I/AD2/GPIO3A
AD3/GPIO3B AD4/GPIO42
SELIO2#/AD5/GPIO43
DAC_BRIG/DA0/GPIO3C EN_DFAN1/DA1/GPIO3D
IREF/DA2/GPIO3E
DA3/GPIO3F
PSCLK1/GPIO4A PSDAT1/GPIO4B PSCLK2/GPIO4C
PSDAT2/GPIO4D
TP_CLK/PSCLK3/GPIO4E
SDICS#/GPXOA00 SDICLK/GPXOA01
SDIDO/GPXOA02
SDIDI/GPXID0
SPIDI/RD#
SPIDO/WR#
SPICLK/GPIO58
SPICS#
CIR_RX/GPIO40
CIR_RLC_TX/GPIO41
FSTCHG/SELIO#/GPIO50
BATT_CHGI_LED#/GPIO52
CAPS_LED#/GPIO53
BATT_LOW_LED#/GPIO54
SUSP_LED#/GPIO55
SYSON/GPIO56
VR_ON/XCLK32K/GPIO57
AC_IN/GPIO59
EC_RSMRST#/GPXO03 EC_LID_OUT#/GPXO04
EC_ON/GPXO05
EC_SWI#/GPXO06
ICH_PWROK/GPXO06
BKOFF#/GPXO08
WL_OFF#/GPXO09
GPXO10 GPXO11
PM_SLP_S4#/GPXID1
ENBKL/GPXID2
GPXID3 GPXID4 GPXID5 GPXID6 GPXID7
V18R
AGND
KB926QFD3_LQFP128_14X14
KB926QFD3_LQFP128_14X14
69
ECAGND
1
C398
C398
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
21 23 26
ACOFF
27
BATT_TEMPA
63 64 65 66 75 76
68
EN_DFAN1
70
IREF
71
CHGVADJ
72
83 84 85 86
TP_CLK
87
TP_DATA
88
97 98 99
LID_SW#
109
119 120 126 128
73 74
FSTCHG
89
BATT_FULL_LED#
90 91
BATT_LOW_LED#
92 93
SYSON
95
VR_ON
121
ACIN_D
127
EC_RSMRST#
100 101 102 103
SB_PWRGD
104
BKOFF#
105
WL_OFF#
106 107
EC_SEL
108
110
ENBKL
112
USB_OC#2
114 115
SUSP#
116
PBTN_OUT#
117
USB_OC#0
118
C391 4.7U_0805_10V4ZC391 4.7U_0805_10V4Z
124
1
2
C399
C399 1000P_0402_50V7K
1000P_0402_50V7K
12
EC_SEL
EC_BEEP# <29> ACOFF <46>
BATT_TEMPA <45>
ADP_V <46>
EN_DFAN1 <5> IREF <46> CHGVADJ <46>
USB_EN# <25,30>
TP_CLK <33>
TP_DATA <33>
VGATE <34,50> WOL_EN# <26> VLDT_EN <34>
EC_SI_SPI_SO <32>
EC_SO_SPI_SI <32>
SPI_CLK <32>
SPI_CS# <32>
FSTCHG <46>
BATT_FULL_LED# <33>
CAPS_LED# <32>
BATT_CHG_LOW_LED# <33>
PWR_ON_LED# <33>
SYSON <34,48>
EC_RSMRST# <21>
EC_ON <33>
SB_PWRGD <21> BKOFF# <18> WL_OFF# <28>
ENBKL <36>
USB_OC#2 <21,25>
SUSP# <28,34,46,49,51>
PBTN_OUT# <21>
USB_OC#0 <21,30>
1 2
LID_SW# <33>
+3VL
12
R270
R270 100K_0402_5%
100K_0402_5%
12
R272 100K_0402_5%
100K_0402_5%
1 2
1 2
@R272
@
C389
C389 100P_0402_50V8J
100P_0402_50V8J
R208
R208 100K_0402_5%
100K_0402_5% C387
C387
0.22U_0603_16V4Z
0.22U_0603_16V4Z
R219
R219 10K_0402_5%
10K_0402_5%
12
ECAGND
VR_ON <34,50>
EC_SEL EC_VERSION
HIGH
LOW
KB926D3
KB926E0
ADP_I <46>
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2008-09-25 2009-09-25
2008-09-25 2009-09-25
2008-09-25 2009-09-25
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
D
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
401851
401851
401851
31 53Wednesday, January 20, 2010
31 53Wednesday, January 20, 2010
31 53Wednesday, January 20, 2010
E
A
A
A
of
of
of
A
+3VL
U46
U46
SPI_CS#
R230
R230 10_0402_5%
10_0402_5%
1
CS#
2
SO
3
WP#
4
GND
MX25L2005CMI-12G_SO8
MX25L2005CMI-12G_SO8
1 2
SPI_CS#<31>
EC_SI_SPI_SO<31>
+3VL
1 1
EC_SPICLK
1 2
8
VCC
7
HOLD#
6
SCLK
5
SI
C403
C403 10P_0402_50V8C
10P_0402_50V8C
EC_SPICLK
10P_0402_50V8J
10P_0402_50V8J
EC_SO_SPI_SI <31>
C400
C400
SPI_CLK <31>
B
1
@
@
10P_0402_50V8J
10P_0402_50V8J
2
C402
C402
1
@
@
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
C401
C401
1
2
+3VALW
+1.5VS
@R82
@
R81
R81
R82
< MDC 1.5 Conn >< ROM Part >
0_0603_5%
0_0603_5%
1 2
0_0603_5%
0_0603_5%
1 2
C
HDA_SDOUT_MDC<21>
HDA_SYNC_MDC<21>
HDA_SDIN1<21>
HDA_RST#_MDC<21>
1
C405
C405 1000P_0402_50V7K
1000P_0402_50V7K
2
R231 33_0402_5%R231 33_0402_5%
1 2
+MDC_VCC
1
C406
C406
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
HDA_SDOUT_MDC HDA_SYNC_MDC
HDA_SDIN1_MDC
1
C407
C407
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
D
JMDC
JMDC
1
GND1
3
IAC_SDATA_OUT
5
GND2
7
IAC_SYNC
9
IAC_SDATA_IN
11
IAC_RESET#
Connector for MDC Rev1.5
Connector for MDC Rev1.5
IAC_BITCLK
GND13GND14GND15GND16GND17GND
ACES_88018-124G@
ACES_88018-124G@ 18
RES0 RES1
3.3V GND3 GND4
E
2
+MDC_VCC
4 6
+3VALW 8 10
12
12
@
@
2
@
@
1
R232
R232 10_0402_5%
10_0402_5%
C404
C404 10P_0402_50V8J
10P_0402_50V8J
HDA_BITCLK_MDC <21>
< LPC Debug Port >
SERIRQ<20,31>
2 2
LPC_AD3<20,31>
LPC_AD1<20,31>
LPC_FRAME#<20,31>
SERIRQ
LPC_AD3
LPC_AD1
LPC_FRAME#
< KEYBOARD Conn > < For EMI >
JKB
JKB
34
KSO16
33 32
KSO17
31
3 3
30 29
KSO2
28
KSO1
27
KSO0
26
KSO4
25
KSO3
24
KSO5
23
KSO14
22
KSO6
21
KSO7
20
KSO13
19
KSO8
18
KSO9
17
KSO10
16
KSO11
15
KSO12
14
KSO15
13
KSI7
12
KSI2
11
KSI3
10
KSI4
9
KSI0
8
KSI5
7
KSI6
6
KSI1
5 4 3 2 1
ACES_88170-3400@
ACES_88170-3400@
4 4
1 2
CAPS_LED# <31> NUM_LED# <31>
Please place the PAD under DDR DIMM.
H50
H50
+3VS
7
8
9
10
DEBUG_PAD@
DEBUG_PAD@
R235300_0402_5% R235300_0402_5%
12
KSI[0..7] KSO[0..17]
R252300_0402_5% R252300_0402_5%
KSI[0..7] <31,33> KSO[0..17] <31,33>
+3VS
+3VS
56
4
3
2
1
KSO16 KSO17
KSO2 KSO1 KSO0 KSO4 KSO3 KSO5
KSO14
KSO6 KSO7
KSO13
KSO8
KSO9 KSO10 KSO11 KSO12 KSO15 KSI7 KSI2 KSI3 KSI4 KSI0 KSI5 KSI6 KSI1 CAPS_LED# NUM_LED#
PLT_RST#
LPC_AD2
LPC_AD0
1 2 2
1
PLT_RST# <12,15,20,26,28,31,35>
LPC_AD2 <20,31>
LPC_AD0 <20,31>
CLK_PCI_SIO <20,24>
R234
R234 22_0402_5%
22_0402_5%
C408
C408 22P_0402_50V8J
22P_0402_50V8J
C438 100P_0402_50V8JC438 100P_0402_50V8J
1 2
C439 100P_0402_50V8JC439 100P_0402_50V8J
1 2
C409 100P_0402_50V8JC409 100P_0402_50V8J
1 2
C410 100P_0402_50V8JC410 100P_0402_50V8J
1 2
C411 100P_0402_50V8JC411 100P_0402_50V8J
1 2
C412 100P_0402_50V8JC412 100P_0402_50V8J
1 2
C413 100P_0402_50V8JC413 100P_0402_50V8J
1 2
C414 100P_0402_50V8JC414 100P_0402_50V8J
1 2
C418 100P_0402_50V8JC418 100P_0402_50V8J
1 2
C419 100P_0402_50V8JC419 100P_0402_50V8J
1 2
C420 100P_0402_50V8JC420 100P_0402_50V8J
1 2
C421 100P_0402_50V8JC421 100P_0402_50V8J
1 2
C422 100P_0402_50V8JC422 100P_0402_50V8J
1 2
C423 100P_0402_50V8JC423 100P_0402_50V8J
1 2
C424 100P_0402_50V8JC424 100P_0402_50V8J
1 2
C425 100P_0402_50V8JC425 100P_0402_50V8J
1 2
C426 100P_0402_50V8JC426 100P_0402_50V8J
1 2
C427 100P_0402_50V8JC427 100P_0402_50V8J
1 2
C428 100P_0402_50V8JC428 100P_0402_50V8J
1 2
C429 100P_0402_50V8JC429 100P_0402_50V8J
1 2
C430 100P_0402_50V8JC430 100P_0402_50V8J
1 2
C431 100P_0402_50V8JC431 100P_0402_50V8J
1 2
C432 100P_0402_50V8JC432 100P_0402_50V8J
1 2
C433 100P_0402_50V8JC433 100P_0402_50V8J
1 2
C434 100P_0402_50V8JC434 100P_0402_50V8J
1 2
C435 100P_0402_50V8JC435 100P_0402_50V8J
1 2
C436 100P_0402_50V8JC436 100P_0402_50V8J
1 2
C437 100P_0402_50V8JC437 100P_0402_50V8J
1 2
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2008-09-25 2009-09-25
2008-09-25 2009-09-25
2008-09-25 2009-09-25
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
D
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
401851
401851
401851
32 53Wednesday, January 20, 2010
32 53Wednesday, January 20, 2010
32 53Wednesday, January 20, 2010
E
A
A
A
of
of
of
A
B
C
D
E
< Power Button for Debug > < Power Button Circuit >
Q17B
R786
R786
10K_0402_5%
10K_0402_5%
Q17B
3
5
4
1 2
SW1
SW1
1 2
SMT1-05-A_4P
SMT1-05-A_4P
5
1 1
6
ON/OFFBTN#
3 4
2N7002KDW_SOT363-6
2N7002KDW_SOT363-6
EC_ON<31>
51_ON# <44>
< TP on & off BTN on M/B>
1 2
SW2
SW2
SMT1-05-A_4P
SMT1-05-A_4P
5
6
KSO0KSI6
3 4
KSO0 <31,32>KSI6<31,32>
Sub-B Connector
JTPB
JLEDB
JLEDB
1
1
2
2
LID_SW#<31> PWR_ON_LED#<31>
PWR_SUSP_LED#<31> CR_LED#<27>
BATT_FULL_LED#<31> BATT_CHG_LOW_LED#<31>
2 2
WL_BT_LED#<31>
+3VALW
+5VS
+5VALW
ACIN_LED#
HDD_LED#
SW_L SW_R
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11 12 13 14 15 16
17
11
GND
18
12
GND 13 14 15 16
ACES_85201-1605N@
ACES_85201-1605N@
ON/OFFBTN#<31>
PACDN042Y3R_SOT23-3
PACDN042Y3R_SOT23-3
D23
D23
ON/OFFBTN#
2
3
1
JPOWER
JPOWER
1
1
2
2
3
3
4
4
5
G1
6
G2
ACES_85201-0405N @
ACES_85201-0405N @
SW_R SW_L
TP_DATA<31> TP_CLK<31>
+5VS
D10
D10
2
1
3
PACDN042Y3R_SOT23-3
PACDN042Y3R_SOT23-3
5 4 3 2 1
P-TWO_161021-06021@
P-TWO_161021-06021@
66G8 5 4 3 2 1
JTOUCH
JTOUCH
8 7
G7
JTPB
1 2 3
4 GND GND
P-TWO_161011-04021@
P-TWO_161011-04021@
KSO0
1
KSI6
2 3 4 5 6
LED Circuit
DC-IN LED
3 3
ACIN_LED#
6 1
Q17A
Q17A 2N7002KDW_SOT363-6
2N7002KDW_SOT363-6
SCREW
4 4
H2
H2
1
H30
H30
1
H_4P7
H_4P7 @
@
H_3P3
H_3P3 @
@
H3
H3
H_4P2
H_4P2
1
@
@
H36
H36
H31
H31
H_3P3
H_3P3
H_3P3
H_3P3
1
1
@
@
@
@
A
2
H4
H4
1
ACIN <22,31,44>
H_4P2X4P7
H_4P2X4P7 @
@
H37
H37
H_3P3
H_3P3
1
@
@
H5
H5
1
H10
H10
1
H_4P2X4P7
H_4P2X4P7 @
@
H_2P9
H_2P9 @
@
H12
H12
1
H13
H13
H_3P0
H_3P0
1
@
@
H_2P9X3P4
H_2P9X3P4 @
@
H11
H11
H_3P2
H_3P2
1
@
@
HDD LED
+3VS
HDD_LED#
H14
H14
H_3P0
H_3P0
1
@
@
PCB Fedical Mark PAD
FD1@FD1
@
1
B
R779
R779
10K_0402_5%
10K_0402_5%
FD2@FD2
@
1
3
FD3@FD3
@
2
6 1
12
5
Q31A
Q31A 2N7002KDW_SOT363-6
2N7002KDW_SOT363-6
4
Q31B 2N7002KDW_SOT363-6Q31B 2N7002KDW_SOT363-6
H16
H16
H_3P0
H_3P0
1
@
@
FD4@FD4
@
1
1
SATA_LED# <22>
H22
H_3P0
H_3P0 @
@
H22
H_3P0
H_3P0
1
@
@
D
H17
H17
H_3P0
H_3P0
1
@
@
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
H18
H18
H_3P0
H_3P0
1
@
@
C
H19
H19
H_3P0
H_3P0
1
@
@
2008-09-25 2009-09-25
2008-09-25 2009-09-25
2008-09-25 2009-09-25
H20
H20
H_3P0
H_3P0
1
@
@
H21
H21
Deciphered Date
Deciphered Date
Deciphered Date
1
H24
H23
H23
H_3P0
H_3P0
1
@
@
H24
1
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
H25
H25
H_6P8
H_6P8 @
@
1
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
H_2P7X3P3N
H_2P7X3P3N @
@
H26
H26
401851
401851
401851
E
1
H_2P7N
H_2P7N @
@
33 53Wednesday, January 20, 2010
33 53Wednesday, January 20, 2010
33 53Wednesday, January 20, 2010
H27
H27
1
H_2P7X3P3N
H_2P7X3P3N @
@
of
of
of
A
A
A
A
< +5VALW TO +5VS >
+5VALW
Q2
Q2
S
D
S
D
S
D
G
D
SI4800BDY_SO8
SI4800BDY_SO8
1 2 3
RUNON
4
8 7 6 5
1
C452
4.7U_0805_10V4Z
4.7U_0805_10V4Z
C452
2
1 1
+5VS
Inrush current = 0A
1
C449
C449 1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
1
C450
C450
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
B
< +1.5V TO +1.5VS >
+5VS
R250
R250 470_0805_5%
470_0805_5%
1 2 3
2N7002KDW_SOT363-6
5
2N7002KDW_SOT363-6 Q34B
Q34B
4
SUSP
C
+1.5V
1
C464
C464
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
Q5
Q5
IRF8113PBF_SO8
IRF8113PBF_SO8
8 7
5
4
1.5VS_ENABLE
1 2 36
12
R286
R286 10M_0402_5%
10M_0402_5%
+1.5VS
D
Inrush current = 0A
1
C462
C462 1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
1
C466
C466
0.01U_0402_25V7K
0.01U_0402_25V7K
2
2
C463
C463 10U_0805_10V4Z
10U_0805_10V4Z
1
1 2
61
2
Q11A
Q11A 2N7002KDW_SOT363-6
2N7002KDW_SOT363-6
R285
R285 750K_0402_1%
750K_0402_1%
SUSP
+VSB
E
1 2 3
5
4
R305
R305 470_0805_5%
470_0805_5%
Q11B
Q11B 2N7002KDW_SOT363-6
2N7002KDW_SOT363-6
< +1.1VALW TO +1.1VS >< +3VALW TO +3VS >
+3VALW +3VS
Q3
Q3
8
S
D
7
S
D
6
S
D
5
G
D
1
C470
C470
SI4800BDY_SO8
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2 2
< +1.1VALW TO +NB_CORE >
+1.1VALW
1
2
3 3
2
Q7
Q7
IRF8113PBF_SO8
IRF8113PBF_SO8
8 7
5
C480
C480
4.7U_0805_10V4Z
4.7U_0805_10V4Z
SI4800BDY_SO8
4
12
R293
R293 10M_0402_5%
10M_0402_5%
1 2 3 4
1
2
1 2 36
1
2
RUNON
C474
C474
0.01U_0402_25V7K
0.01U_0402_25V7K
Inrush current = 0A
+NB_CORE
1
C469
C469
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
C468
C468 1U_0402_6.3V4Z
1U_0402_6.3V4Z
Inrush current = 0A
1
C479
C479 1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
1
C481
C481
0.01U_0402_25V7K
0.01U_0402_25V7K
2
61
Q14A
Q14A 2N7002KDW_SOT363-6
2N7002KDW_SOT363-6
1
C478
C478
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
61
R287
R287 750K_0402_1%
750K_0402_1%
12
2
Q13A
Q13A 2N7002KDW_SOT363-6
2N7002KDW_SOT363-6
SUSP
R292
R292 330K_0402_5%
330K_0402_5%
12
BOOT_ON_NB
2
+VSB
+VSB
5
R251
R251 470_0805_5%
470_0805_5%
1 2 3
Q14B
Q14B 2N7002KDW_SOT363-6
2N7002KDW_SOT363-6
5
4
R306
R306 470_0805_5%
470_0805_5%
1 2 3
Q13B
Q13B 2N7002KDW_SOT363-6
2N7002KDW_SOT363-6
4
+1.1VALW
Q6
Q6
IRF8113PBF_SO8
IRF8113PBF_SO8
8 7
5
1
C475
C475
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
4
12
R291
R291 10M_0402_5%
10M_0402_5%
1 2 36
< Inversion of SYSON, SUSP#, VLDT_EN, EC_ON >
R814
R814
100K_0402_5%
100K_0402_5%
SYSON# SUSP
Q15B
2N7002KDW_SOT363-6
2N7002KDW_SOT363-6
Q15B
5
+1.1VS
Inrush current = 0A
1
C471
C471 1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
1
C476
C476
0.01U_0402_25V7K
0.01U_0402_25V7K
2
+5VALW+5VALW
12
12
R245
R245 100K_0402_5%
100K_0402_5%
61
3
4
Q15A
Q15A 2N7002KDW_SOT363-6
2N7002KDW_SOT363-6
2
1
C472
C472
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
61
SUSP <49>
2
Q12A
Q12A 2N7002KDW_SOT363-6
2N7002KDW_SOT363-6
1
+
+
C158
C158 330U_B2_2.5VM_R15M
330U_B2_2.5VM_R15M
2
R290
R290 330K_0402_5%
330K_0402_5%
12
BOOT_ON_1.1V
+VSB
VLDT_EN<31>SUSP# <28,31,46,49,51>SYSON<31,48>
2N7002KDW_SOT363-6
2N7002KDW_SOT363-6
5
1 2 3
4
100K_0402_5%
100K_0402_5%
VLDT_EN#
VLDT_EN
BOOT_ON_1.1V BOOT_ON_1.1V BOOT_ON_1.1V
R300
R300 470_0805_5%
470_0805_5%
Q12B
Q12B 2N7002KDW_SOT363-6
2N7002KDW_SOT363-6
+5VALW
12
R816
R816
61
2
Q16A
Q16A
R62 0_0402_5%@R62 0_0402_5%@
12
R63 0_0402_5%R63 0_0402_5%
12
R67 0_0402_5%@R67 0_0402_5%@
12
SUSP
VLDT_EN#
VGATE#
< Discharge circuit >
BOOT_ON_NB
4 4
R45 0_0402_5%@R45 0_0402_5%@ R46 0_0402_5%R46 0_0402_5% R47 0_0402_5%@R47 0_0402_5%@
12 12 12
VGATE<31,50>
SUSPBOOT_ON_NB VLDT_EN# VGATE#BOOT_ON_NB
R802
R802
100K_0402_5%
100K_0402_5%
VGATE# VR_ON#
Q35B
2N7002KDW_SOT363-6
2N7002KDW_SOT363-6
Q35B
5
+5VALW +5VALW
12
12
3
61
4
R803
R803 100K_0402_5%
100K_0402_5%
Q35A
Q35A 2N7002KDW_SOT363-6
2N7002KDW_SOT363-6
2
VR_ON# <49>
VR_ON <31,50>
SYSON#
2
G
G
+1.5V
1 2 13
D
D
S
S
R257
R257 470_0805_5%
470_0805_5%
Q9
Q9 2N7002_SOT23-3
2N7002_SOT23-3
SUSP
2
G
G
+0.75VS
1 2 13
D
D
S
S
R258
R258 470_0805_5%
470_0805_5%
Q10
Q10 2N7002_SOT23-3
2N7002_SOT23-3
SUSP
2
G
G
+1.8VS
1 2
13
D
D
S
S
R253
R253 470_0805_5%
470_0805_5%
Q23
Q23 2N7002_SOT23-3
2N7002_SOT23-3
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2008-09-25 2009-09-25
2008-09-25 2009-09-25
2008-09-25 2009-09-25
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
D
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
401851
401851
401851
34 53Wednesday, January 20, 2010
34 53Wednesday, January 20, 2010
34 53Wednesday, January 20, 2010
E
A
A
A
of
of
of
5
4
3
2
1
PCIE_GTX_C_MRX_P[0..15]<11>
PCIE_GTX_C_MRX_N[0..15]<11>
D D
C C
B B
A A
PCIE_MTX_C_GRX_P[0..15]<11>
PCIE_MTX_C_GRX_N[0..15]<11>
PCIE_GTX_C_MRX_P[0..15]
PCIE_GTX_C_MRX_N[0..15]
PCIE_MTX_C_GRX_P[0..15]
PCIE_MTX_C_GRX_N[0..15]
CLK_PCIE_VGA<16> CLK_PCIE_VGA#<16>
RV133 10K_0402_5%
RV133 10K_0402_5%
PLT_RST#<12,15,20,26,28,31,32>
PCIE_MTX_C_GRX_N15 PCIE_MTX_C_GRX_P15
PCIE_MTX_C_GRX_N14 PCIE_MTX_C_GRX_P14
PCIE_MTX_C_GRX_N13 PCIE_MTX_C_GRX_P13
PCIE_MTX_C_GRX_N12 PCIE_MTX_C_GRX_P12
PCIE_MTX_C_GRX_N11 PCIE_MTX_C_GRX_P11
PCIE_MTX_C_GRX_N10 PCIE_MTX_C_GRX_P10
PCIE_MTX_C_GRX_N9 PCIE_MTX_C_GRX_P9
PCIE_MTX_C_GRX_N8 PCIE_MTX_C_GRX_P8
PCIE_MTX_C_GRX_N7 PCIE_MTX_C_GRX_P7
PCIE_MTX_C_GRX_N6 PCIE_MTX_C_GRX_P6
PCIE_MTX_C_GRX_N5 PCIE_MTX_C_GRX_P5
PCIE_MTX_C_GRX_N4 PCIE_MTX_C_GRX_P4
PCIE_MTX_C_GRX_N3 PCIE_MTX_C_GRX_P3
PCIE_MTX_C_GRX_N2 PCIE_MTX_C_GRX_P2
PCIE_MTX_C_GRX_N1 PCIE_MTX_C_GRX_P1
PCIE_MTX_C_GRX_N0 PCIE_MTX_C_GRX_P0
MANHA@
MANHA@
1 2
UV1A
UV1A
AA38
PCIE_RX0P
Y37
PCIE_RX0N
Y35
PCIE_RX1P
W36
PCIE_RX1N
W38
PCIE_RX2P
V37
PCIE_RX2N
V35
PCIE_RX3P
U36
PCIE_RX3N
U38
PCIE_RX4P
T37
PCIE_RX4N
T35
PCIE_RX5P
R36
PCIE_RX5N
R38
PCIE_RX6P
P37
PCIE_RX6N
P35
PCIE_RX7P
N36
PCIE_RX7N
N38
PCIE_RX8P
M37
PCIE_RX8N
M35
PCIE_RX9P
L36
PCIE_RX9N
L38
PCIE_RX10P
K37
PCIE_RX10N
K35
PCIE_RX11P
J36
PCIE_RX11N
J38
PCIE_RX12P
H37
PCIE_RX12N
H35
PCIE_RX13P
G36
PCIE_RX13N
G38
PCIE_RX14P
F37
PCIE_RX14N
F35
PCIE_RX15P
E37
PCIE_RX15N
CLOCK
CLOCK
AB35
PCIE_REFCLKP
AA36
PCIE_REFCLKN
AJ21
NC#1
AK21
NC#2
AH16
NC_PWRGOOD
AA30
PERSTB
216-0729002 A12 M96_BGA962
216-0729002 A12 M96_BGA962
@
@
Close to UV1
PCIE_GTX_MRX_N15
PCIE_TX0P PCIE_TX0N
PCIE_TX1P PCIE_TX1N
PCIE_TX2P PCIE_TX2N
PCIE_TX3P PCIE_TX3N
PCIE_TX4P
PCI EXPRESS INTERFACE
PCI EXPRESS INTERFACE
PCIE_TX4N
PCIE_TX5P PCIE_TX5N
PCIE_TX6P PCIE_TX6N
PCIE_TX7P PCIE_TX7N
PCIE_TX8P PCIE_TX8N
PCIE_TX9P PCIE_TX9N
PCIE_TX10P PCIE_TX10N
PCIE_TX11P PCIE_TX11N
PCIE_TX12P PCIE_TX12N
PCIE_TX13P PCIE_TX13N
PCIE_TX14P PCIE_TX14N
PCIE_TX15P PCIE_TX15N
CALIBRATION
CALIBRATION
PCIE_CALRP PCIE_CALRN
Y33
PCIE_GTX_MRX_P15
Y32
PCIE_GTX_MRX_N14
W33
PCIE_GTX_MRX_P14
W32
PCIE_GTX_MRX_N13
U33
PCIE_GTX_MRX_P13
U32
PCIE_GTX_MRX_N12
U30
PCIE_GTX_MRX_P12
U29
PCIE_GTX_MRX_N11
T33
PCIE_GTX_MRX_P11
T32
PCIE_GTX_MRX_N10
T30
PCIE_GTX_MRX_P10
T29
PCIE_GTX_MRX_N9
P33
PCIE_GTX_MRX_P9
P32
PCIE_GTX_MRX_N8
P30
PCIE_GTX_MRX_P8
P29
PCIE_GTX_MRX_N7
N33
PCIE_GTX_MRX_P7
N32
PCIE_GTX_MRX_N6
N30
PCIE_GTX_MRX_P6
N29
PCIE_GTX_MRX_N5
L33
PCIE_GTX_MRX_P5
L32
PCIE_GTX_MRX_N4
L30
PCIE_GTX_MRX_P4
L29
PCIE_GTX_MRX_N3
K33
PCIE_GTX_MRX_P3
K32
PCIE_GTX_MRX_N2
J33
PCIE_GTX_MRX_P2
J32
PCIE_GTX_MRX_N1
K30
PCIE_GTX_MRX_P1
K29
PCIE_GTX_MRX_N0
H33
PCIE_GTX_MRX_P0
H32
Y30 Y29
RV1 1.27K_0402_1%RV1 1.27K_0402_1% RV2 2K_0402_1%RV2 2K_0402_1%
CV1 0.1U_0402_10V7KCV1 0.1U_0402_10V7K
1 2
CV2 0.1U_0402_10V7KCV2 0.1U_0402_10V7K
1 2
CV3 0.1U_0402_10V7KCV3 0.1U_0402_10V7K
1 2
CV4 0.1U_0402_10V7KCV4 0.1U_0402_10V7K
1 2
CV5 0.1U_0402_10V7KCV5 0.1U_0402_10V7K
1 2
CV6 0.1U_0402_10V7KCV6 0.1U_0402_10V7K
1 2
CV7 0.1U_0402_10V7KCV7 0.1U_0402_10V7K
1 2
CV8 0.1U_0402_10V7KCV8 0.1U_0402_10V7K
1 2
CV9 0.1U_0402_10V7KCV9 0.1U_0402_10V7K
1 2
CV10 0.1U_0402_10V7KCV10 0.1U_0402_10V7K
1 2
CV11 0.1U_0402_10V7KCV11 0.1U_0402_10V7K
1 2
CV12 0.1U_0402_10V7KCV12 0.1U_0402_10V7K
1 2
CV13 0.1U_0402_10V7KCV13 0.1U_0402_10V7K
1 2
CV14 0.1U_0402_10V7KCV14 0.1U_0402_10V7K
1 2
CV15 0.1U_0402_10V7KCV15 0.1U_0402_10V7K
1 2
CV16 0.1U_0402_10V7KCV16 0.1U_0402_10V7K
1 2
CV17 0.1U_0402_10V7KCV17 0.1U_0402_10V7K
1 2
CV18 0.1U_0402_10V7KCV18 0.1U_0402_10V7K
1 2
CV19 0.1U_0402_10V7KCV19 0.1U_0402_10V7K
1 2
CV20 0.1U_0402_10V7KCV20 0.1U_0402_10V7K
1 2
CV21 0.1U_0402_10V7KCV21 0.1U_0402_10V7K
1 2
CV22 0.1U_0402_10V7KCV22 0.1U_0402_10V7K
1 2
CV23 0.1U_0402_10V7KCV23 0.1U_0402_10V7K
1 2
CV24 0.1U_0402_10V7KCV24 0.1U_0402_10V7K
1 2
CV25 0.1U_0402_10V7KCV25 0.1U_0402_10V7K
1 2
CV26 0.1U_0402_10V7KCV26 0.1U_0402_10V7K
1 2
CV27 0.1U_0402_10V7KCV27 0.1U_0402_10V7K
1 2
CV28 0.1U_0402_10V7KCV28 0.1U_0402_10V7K
1 2
CV29 0.1U_0402_10V7KCV29 0.1U_0402_10V7K
1 2
CV30 0.1U_0402_10V7KCV30 0.1U_0402_10V7K
1 2
CV31 0.1U_0402_10V7KCV31 0.1U_0402_10V7K
1 2
CV32 0.1U_0402_10V7KCV32 0.1U_0402_10V7K
1 2
1 2 1 2
+1.0VS
PCIE_GTX_C_MRX_P15 PCIE_GTX_C_MRX_N15
PCIE_GTX_C_MRX_P14 PCIE_GTX_C_MRX_N14
PCIE_GTX_C_MRX_P13 PCIE_GTX_C_MRX_N13
PCIE_GTX_C_MRX_P12 PCIE_GTX_C_MRX_N12
PCIE_GTX_C_MRX_P11 PCIE_GTX_C_MRX_N11
PCIE_GTX_C_MRX_P10 PCIE_GTX_C_MRX_N10
PCIE_GTX_C_MRX_P9 PCIE_GTX_C_MRX_N9
PCIE_GTX_C_MRX_P8 PCIE_GTX_C_MRX_N8
PCIE_GTX_C_MRX_P7 PCIE_GTX_C_MRX_N7
PCIE_GTX_C_MRX_P6 PCIE_GTX_C_MRX_N6
PCIE_GTX_C_MRX_P5 PCIE_GTX_C_MRX_N5
PCIE_GTX_C_MRX_P4 PCIE_GTX_C_MRX_N4
PCIE_GTX_C_MRX_P3 PCIE_GTX_C_MRX_N3
PCIE_GTX_C_MRX_P2 PCIE_GTX_C_MRX_N2
PCIE_GTX_C_MRX_P1 PCIE_GTX_C_MRX_N1
PCIE_GTX_C_MRX_P0 PCIE_GTX_C_MRX_N0
Security Classification
Security Classification
Security Classification
2008-09-25 2009-09-25
2008-09-25 2009-09-25
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2008-09-25 2009-09-25
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
401851
401851
401851
35 53Wednesday, January 20, 2010
35 53Wednesday, January 20, 2010
35 53Wednesday, January 20, 2010
of
of
1
of
A
A
A
5
+3VS_DELAY
VGA_PWRSEL0
RV3010K_0402_5% @RV3010K_0402_5% @
12
VGA_PWRSEL1
RV13110K_0402_5% @RV13110K_0402_5% @
12
THERM#_VGA
RV3210K_0402_5% RV3210K_0402_5%
1 2
+VGA_VREF
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
12
LV3
LV3
10U_0603_6.3V6M
10U_0603_6.3V6M
12
LV5
LV5
12
10U_0603_6.3V6M
10U_0603_6.3V6M
CV49
CV49
1
2
1 CV43
CV43
2
1
2
12 12 12 12
CV40
CV40
CV50
CV50
RV3310K_0402_5% M9X@RV3310K_0402_5% M9X@ RV3410K_0402_5% @RV3410K_0402_5% @
GENERIC_C
RV3510K_0402_5% @RV3510K_0402_5% @
RV1710K_0402_5% RV1710K_0402_5%
0.1U_0402_16V4Z
0.1U_0402_16V4Z 1
CV41
CV41
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z 1
CV44
CV44
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z 1
CV51
CV51
2
5
GPIO23_CLKREQ#
R_AC_IN
ENBKL
LCD
+DPLL_PVDD
1
CV42
CV42 1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
+DPLL_VDDC
1
CV45
CV45
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
CV52
CV52 1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
+TSVDD
VRAM_ID0<43> VRAM_ID1<43> VRAM_ID2<43>
LCD_EDID_CLK<18>
LCD_EDID_DATA<18>
GPU_GPIO0<43> GPU_GPIO1<43> GPU_GPIO2<43>
ENBKL<31>
SOUT_GPIO8<43>
SIN_GPIO9<43>
GPU_GPIO11<43> GPU_GPIO12<43> GPU_GPIO13<43>
VGA_PWRSEL0<51>
27M_SSC<16>
THERM#_VGA<43>
VGA_PWRSEL1<51>
ROMSE_GPIO22<43>
HPD<19>
RV26 47.5_0402_1%RV26 47.5_0402_1%
27M_CLK<16>
1 2
D D
C C
+1.8VS
12
RV20
RV20 499_0402_1%
499_0402_1%
12
RV21
RV21
249_0402_1%
249_0402_1%
B B
BLM18PG121SN1D_0603
BLM18PG121SN1D_0603
+1.8VS
BLM18PG121SN1D_0603
BLM18PG121SN1D_0603
+1.0VS
10U_0603_6.3V6M
+1.8VS
10U_0603_6.3V6M
BLM18PG121SN1D_0603
BLM18PG121SN1D_0603
LV7
LV7
A A
LCD_EDID_CLK LCD_EDID_DATA
GPU_GPIO0 GPU_GPIO1 GPU_GPIO2
SOUT_GPIO8 SIN_GPIO9
GPU_GPIO11 GPU_GPIO12 GPU_GPIO13
VGA_PWRSEL0 27M_SSC THERM#_VGA
VGA_PWRSEL1 ROMSE_GPIO22
GPIO23_CLKREQ#
GENERIC_C
100_0402_1%
100_0402_1%
GPU_THERMAL_D+<43> GPU_THERMAL_D-<43>
4
T9 PADT9 PAD
T10 PADT10 PAD
RV31
RV31
4
R_AC_IN
T15 PADT15 PAD
+VGA_VREF
150mA
+DPLL_PVDD
300mA
+DPLL_VDDC
12
20mA
+TSVDD
XTALIN
UV1B
UV1B
MUTI GFX
MUTI GFX
AR8
DVPCNTL_MVP_0
AU8
DVPCNTL_MVP_1
AP8
DVPCNTL_0
AW8
DVPCNTL_1
AR3
DVPCNTL_2
AR1
DVPCLK
AU1
DVPDATA_0
AU3
DVPDATA_1
AW3
DVPDATA_2
AP6
DVPDATA_3
AW5
DVPDATA_4
AU5
DVPDATA_5
AR6
DVPDATA_6
AW6
DVPDATA_7
AU6
DVPDATA_8
AT7
DVPDATA_9
AV7
DVPDATA_10
AN7
DVPDATA_11
AV9
DVPDATA_12
AT9
DVPDATA_13
AR10
DVPDATA_14
AW10
DVPDATA_15
AU10
DVPDATA_16
AP10
DVPDATA_17
AV11
DVPDATA_18
AT11
DVPDATA_19
AR12
DVPDATA_20
AW12
DVPDATA_21
AU12
DVPDATA_22
AP12
DVPDATA_23
I2C
I2C
AK26
SCL
AJ26
SDA
GENERAL PURPOSE I/O
GENERAL PURPOSE I/O
AH20
GPIO_0
AH18
GPIO_1
AN16
GPIO_2
AH23
GPIO_3_SMBDATA
AJ23
GPIO_4_SMBCLK
AH17
GPIO_5_AC_BATT
AJ17
GPIO_6
AK17
GPIO_7_BLON
AJ13
GPIO_8_ROMSO
AH15
GPIO_9_ROMSI
AJ16
GPIO_10_ROMSCK
AK16
GPIO_11
AL16
GPIO_12
AM16
GPIO_13
AM14
GPIO_14_HPD2
AM13
GPIO_15_PWRCNTL_0
AK14
GPIO_16_SSIN
AG30
GPIO_17_THERMAL_INT
AN14
GPIO_18_HPD3
AM17
GPIO_19_CTF
AL13
GPIO_20_PWRCNTL_1
AJ14
GPIO_21_BB_EN
AK13
GPIO_22_ROMCSB
AN13
GPIO_23_CLKREQB
AM23
JTAG_TRSTB
AN23
JTAG_TDI
AK23
JTAG_TCK
AL24
JTAG_TMS
AM24
JTAG_TDO
AJ19
GENERICA
AK19
GENERICB
AJ20
GENERICC
AK20
GENERICD
AJ24
GENERICE_HPD4
AH26
GENERICF
AH24
GENERICG
AK24
HPD1
AH13
VREFG
PLL/CLOCK
PLL/CLOCK
AM32
DPLL_PVDD
AN32
DPLL_PVSS
AN31
DPLL_VDDC
AV33
XTALIN
AU34
XTALOUT
AF29
DPLUS
AG29
DMINUS
AK32
TS_FDO
AJ32
TSVDD
AJ33
TSVSS
216-0729002 A12 M96_BGA962
216-0729002 A12 M96_BGA962
@
@
THERMAL
THERMAL
TXCAP_DPA3P
TXCAM_DPA3N
TX0P_DPA2P
TX0M_DPA2N
DPA
DPA
TX1P_DPA1P
TX1M_DPA1N
TX2P_DPA0P
TX2M_DPA0N
TXCBP_DPB3P
TXCBM_DPB3N
TX3P_DPB2P
TX3M_DPB2N
DPB
DPB
TX4P_DPB1P
TX4M_DPB1N
TX5P_DPB0P
TX5M_DPB0N
TXCCP_DPC3P TXCCM_DPC3N
TX0P_DPC2P TX0M_DPC2N
DPC
DPC
TX1P_DPC1P TX1M_DPC1N
TX2P_DPC0P TX2M_DPC0N
TXCDP_DPD3P TXCDM_DPD3N
TX3P_DPD2P TX3M_DPD2N
DPD
DPD
TX4P_DPD1P TX4M_DPD1N
TX5P_DPD0P TX5M_DPD0N
DAC1
DAC1
DAC2
DAC2
DDC/AUX
DDC/AUX
DDC1CLK
DDC1DATA
DDC2CLK
DDC2DATA
DDCCLK_AUX3P
DDCDATA_AUX3N
DDCCLK_AUX4P
DDCDATA_AUX4N
DDCCLK_AUX5P
DDCDATA_AUX5N
DDC6CLK
DDC6DATA
NC_DDCCLK_AUX7P
NC_DDCDATA_AUX7N
HSYNC VSYNC
RSET AVDD
AVSSQ
VDD1DI VSS1DI
COMP
H2SYNC V2SYNC
VDD2DI VSS2DI
A2VDD A2VDDQ A2VSSQ
R2SET
AUX1P
AUX1N
AUX2P
AUX2N
RB
GB
BB
R2
R2B
G2
G2B
B2
B2B
AU24 AV23
AT25 AR24
AU26 AV25
AT27 AR26
AR30 AT29
AV31 AU30
AR32 AT31
AT33 AU32
AU14 AV13
AT15 AR14
AU16 AV15
AT17 AR16
AU20 AT19
AT21 AR20
AU22 AV21
AT23 AR22
AD39
R
AD37 AE36
G
AD35 AF37
B
AE38 AC36
AC38
AB34 AD34
AE34 AC33
AC34
AC30 AC31
AD30 AD31
AF30 AF31
AC32
C
AD32
Y
AF32
AD29 AC29
AG31 AG32
AG33 AD33 AF33
AA29
AM26 AN26
AM27 AL27
AM19 AL19
AN20 AM20
AL30 AM30
AL29 AM29
AN21 AM21
AJ30 AJ31
AK30 AK29
3
HDMI_CLK0+ <19> HDMI_CLK0- <19>
HDMI_TXD0+ <19> HDMI_TXD0- <19>
HDMI_TXD1+ <19> HDMI_TXD1- <19>
HDMI_TXD2+ <19> HDMI_TXD2- <19>
RED <17>
GREEN <17>
BLUE <17>
R_HSYNC <17,43> R_VSYNC <17,43>
1 2
RV18 499_0402_1%RV18 499_0402_1%
+AVDD_VGA
+VDD1DI
HSYNC_DAC2 <43> VSYNC_DAC2 <43>
+VDD1DI
+A2VDD
+A2VDDQ
1 2
RV22 715_0402_1%RV22 715_0402_1%
CRT_CLK CRT_DATA
HDMICLK_VGA HDMIDAT_VGA
3
CRT_CLK <17> CRT_DATA <17>
HDMICLK_VGA <19> HDMIDAT_VGA <19>
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
CRT
CRT
HDMI
Compal Secret Data
Compal Secret Data
2008-09-25 2009-09-25
2008-09-25 2009-09-25
2008-09-25 2009-09-25
Compal Secret Data
2
Deciphered Date
Deciphered Date
Deciphered Date
2
RED GREEN BLUE
+AVDD_VGA
1U_0402_6.3V4Z
1U_0402_6.3V4Z
+VDD1DI
1U_0402_6.3V4Z
1U_0402_6.3V4Z
+A2VDD
+A2VDDQ
UV1G
UV1G
LVDS CONTROL
LVDS CONTROL
LVTMDP
LVTMDP
216-0729002 A12 M96_BGA962
216-0729002 A12 M96_BGA962
@
@
Near UV1
1 2
RV11 150_0402_1%RV11 150_0402_1%
1 2
RV12 150_0402_1%RV12 150_0402_1%
1 2
RV13 150_0402_1%RV13 150_0402_1%
70mA
1
CV33
CV33
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
45mA
1
CV36
CV36
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
45mA
10mA
1
CV4610U_0603_6.3V6M CV4610U_0603_6.3V6M
2
TXCLK_UP_DPF3P TXCLK_UN_DPF3N
TXOUT_U0P_DPF2P TXOUT_U0N_DPF2N
TXOUT_U1P_DPF1P TXOUT_U1N_DPF1N
TXOUT_U2P_DPF0P TXOUT_U2N_DPF0N
TXCLK_LP_DPE3P TXCLK_LN_DPE3N
TXOUT_L0P_DPE2P
TXOUT_L0N_DPE2N
TXOUT_L1P_DPE1P
TXOUT_L1N_DPE1N
TXOUT_L2P_DPE0P
TXOUT_L2N_DPE0N
1
1
CV35
CV35
10U_0603_6.3V6M
10U_0603_6.3V6M
2
2
1
CV37
CV37
2
1
CV47
CV47
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
AK27
VARY_BL
AJ27
DIGON
AK35 AL36
AJ38 AK37
AH35 AJ36
AG38 AH37
AF35
TXOUT_U3P
AG36
TXOUT_U3N
AP34 AR34
AW37 AU35
AR37 AU39
AP35 AR35
AN36
TXOUT_L3P
AP37
TXOUT_L3N
BLM18PG121SN1D_0603
BLM18PG121SN1D_0603
12
LV1
LV1
CV34
CV34
BLM18PG121SN1D_0603
BLM18PG121SN1D_0603
12
LV2
LV2
1
CV38
CV38 10U_0603_6.3V6M
10U_0603_6.3V6M
2
1 2
LV4 0_0603_5%LV4 0_0603_5%
BLM18PG121SN1D_0603
BLM18PG121SN1D_0603
12
LV6
LV6
1
CV48
CV48 1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet
Date: Sheet
Date: Sheet
+1.8VS
+1.8VS
+3VS_DELAY
+1.8VS
VGA_INVT_PWM <18> VGA_ENVDD <18>
LCD_TZCLK+ <18> LCD_TZCLK- <18>
LCD_TZOUT0+ <18> LCD_TZOUT0- <18>
LCD_TZOUT1+ <18> LCD_TZOUT1- <18>
LCD_TZOUT2+ <18> LCD_TZOUT2- <18>
LCD_TXCLK+ <18> LCD_TXCLK- <18>
LCD_TXOUT0+ <18> LCD_TXOUT0- <18>
LCD_TXOUT1+ <18> LCD_TXOUT1- <18>
LCD_TXOUT2+ <18> LCD_TXOUT2- <18>
401851
401851
401851
1
A
A
36 53Wednesday, January 20, 2010
36 53Wednesday, January 20, 2010
36 53Wednesday, January 20, 2010
A
of
of
of
5
MANHA@
MANHA@
BLM18PG121SN1D_0603
BLM18PG121SN1D_0603
+1.8VS
D D
BLM18PG121SN1D_0603
BLM18PG121SN1D_0603
+1.8VS
C C
BLM18PG121SN1D_0603
BLM18PG121SN1D_0603
+1.8VS
BLM18PG121SN1D_0603
BLM18PG121SN1D_0603
+1.0VS
B B
BLM18PG121SN1D_0603
BLM18PG121SN1D_0603
+1.8VS
BLM18PG121SN1D_0603
BLM18PG121SN1D_0603
+1.0VS
A A
LV33
LV33
MANHA@
MANHA@
LV34
LV34
LV12
LV12
LV15
LV15
LV17
LV17
LV19
LV19
12
10U_0603_6.3V6M
10U_0603_6.3V6M
12
10U_0603_6.3V6M
10U_0603_6.3V6M
12
12
12
12
2
CV309
CV309 MANHA@
MANHA@
1
2
CV312
CV312 MANHA@
MANHA@
1
2
CV5610U_0603_6.3V6M CV5610U_0603_6.3V6M
1
2
CV6010U_0603_6.3V6M CV6010U_0603_6.3V6M
1
2
CV6510U_0603_6.3V6M CV6510U_0603_6.3V6M
1
2
CV6810U_0603_6.3V6M CV6810U_0603_6.3V6M
1
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
CV57
CV57
1
1U_0402_6.3V4Z
1U_0402_6.3V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
CV64
CV64
1
1U_0402_6.3V4Z
1U_0402_6.3V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
CV66
CV66
1
1U_0402_6.3V4Z
1U_0402_6.3V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
CV69
CV69
1
1U_0402_6.3V4Z
1U_0402_6.3V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
CV308
CV308 MANHA@
MANHA@
1
2
CV311
CV311 MANHA@
MANHA@
1
+DPE_VDD18
2
CV58
CV58
1
+DPE_VDD10
2
CV61
CV61
1
+DPF_VDD18
2
CV67
CV67
1
+DPF_VDD10
2
CV70
CV70
1
+DPC_VDD18
2
CV310
CV310 MANHA@
MANHA@
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+DPD_VDD18
2
CV313
CV313 MANHA@
MANHA@
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+1.0VS
+1.0VS
1 2
LV8 0_0603_5%LV8 0_0603_5%
1 2
LV10 0_0603_5%LV10 0_0603_5%
4
+DPC_VDD18
+DPD_VDD18
+DPD_VDD10
RV36 150_0402_1%RV36 150_0402_1%
200mA
+DPE_VDD18
100mA
+DPE_VDD10
200mA
+DPF_VDD18
100mA
+DPF_VDD10
RV38 150_0402_1%RV38 150_0402_1%
UV1H
UV1H
AP20
NC_DPC_VDD18#1
AP21
NC_DPC_VDD18#2
AP13
DPC_VDD10#1
AT13
DPC_VDD10#2
AN17
DPC_VSSR#1
AP16
DPC_VSSR#2
AP17
DPC_VSSR#3
AW14
DPC_VSSR#4
AW16
DPC_VSSR#5
AP22
NC_DPD_VDD18#1
AP23
NC_DPD_VDD18#2
AP14
DPD_VDD10#1
AP15
DPD_VDD10#2
AN19
DPD_VSSR#1
AP18
DPD_VSSR#2
AP19
DPD_VSSR#3
AW20
DPD_VSSR#4
AW22
DPD_VSSR#5
AW18
12
DPCD_CALR
AH34
DPE_VDD18#1
AJ34
DPE_VDD18#2
AL33
DPE_VDD10#1
AM33
DPE_VDD10#2
AN34
DPE_VSSR#1
AP39
DPE_VSSR#2
AR39
DPE_VSSR#3
AU37
DPE_VSSR#4
AW35
DPE_VSSR#5
AF34
DPF_VDD18#1
AG34
DPF_VDD18#2
AK33
DPF_VDD10#1
AK34
DPF_VDD10#2
AF39
DPF_VSSR#1
AH39
DPF_VSSR#2
AK39
DPF_VSSR#3
AL34
DPF_VSSR#4
AM34
DPF_VSSR#5
AM39
12
DPEF_CALR
216-0729002 A12 M96_BGA962
216-0729002 A12 M96_BGA962
@
@
DP E/F POWER
DP E/F POWER
DP A/B POWERDP C/D POWER
DP A/B POWERDP C/D POWER
NC_DPA_VDD18#1 NC_DPA_VDD18#2
DPA_VDD10#1 DPA_VDD10#2
DPA_VSSR#1 DPA_VSSR#2 DPA_VSSR#3 DPA_VSSR#4 DPA_VSSR#5
NC_DPB_VDD18#1 NC_DPB_VDD18#2
DPB_VDD10#1 DPB_VDD10#2
DPB_VSSR#1 DPB_VSSR#2 DPB_VSSR#3 DPB_VSSR#4 DPB_VSSR#5
DPAB_CALR
DP PLL POWER
DP PLL POWER
DPA_PVDD
DPA_PVSS
DPB_PVDD
DPB_PVSS
DPC_PVDD DPC_PVSS
DPD_PVDD DPD_PVSS
DPE_PVDD
DPE_PVSS
NC_DPF_PVDD NC_DPF_PVSS
3
+DPA_VDD18
AN24 AP24
200mA
+DPA_VDD10+DPC_VDD10
AP31 AP32
AN27 AP27 AP28 AW24 AW26
AP25 AP26
AN33 AP33
AN29 AP29 AP30 AW30 AW32
AW28
AU28 AV27
AV29 AR28
AU18 AV17
AV19 AR18
AM37 AN38
AL38 AM35
+DPB_VDD18
1 2
RV37 150_0402_1%RV37 150_0402_1%
+DPA_PVDD
+DPB_PVDD
+DPC_PVDD
+DPD_PVDD
+DPE_PVDD
1 2
LV9 0_0603_5%LV9 0_0603_5%
+1.0VS
+DPB_VDD10
+DPA_PVDD
+DPB_PVDD
+DPC_PVDD
+DPD_PVDD
+DPE_PVDD
H@
2
20mA
2
CV5310U_0603_6.3V6MH@CV5310U_0603_6.3V6M
1
20mA
20mA
2
CV5910U_0603_6.3V6M CV5910U_0603_6.3V6M
1
20mA
20mA
20mA
1
CV710.1U_0402_16V4Z CV710.1U_0402_16V4Z
2
+DPA_VDD18
+DPB_VDD18
2
CV54
CV54
1
1U_0402_6.3V4Z
1U_0402_6.3V4Z H@
H@
2
CV62
CV62
1
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
CV72
CV72
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
MANHA@
MANHA@
CV316
CV316
1
1U_0402_6.3V4Z
1U_0402_6.3V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
CV319
CV319 MANHA@
MANHA@
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
BLM18PG121SN1D_0603
BLM18PG121SN1D_0603
2
CV55
CV55
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
H@
H@
1 2
LV13 0_0603_5%LV13 0_0603_5%
BLM18PG121SN1D_0603
BLM18PG121SN1D_0603
2
CV63
CV63
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1 2
LV16 0_0603_5%LV16 0_0603_5%
1 2
LV18 0_0603_5%LV18 0_0603_5%
BLM18PG121SN1D_0603
BLM18PG121SN1D_0603
1
CV73
CV73 10U_0603_6.3V6M
10U_0603_6.3V6M
2
CV314
CV314
LV11
LV11
LV14
LV14
LV20
LV20
MANHA@
MANHA@
1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
1
2
CV317
CV317 MANHA@
MANHA@
1
12
12
12
1
MANHA@
MANHA@
BLM18PG121SN1D_0603
BLM18PG121SN1D_0603
1 2
LV35
LV35
2
CV315 10U_0603_6.3V6M
CV315 10U_0603_6.3V6M
MANHA@
MANHA@
1
MANHA@
MANHA@
BLM18PG121SN1D_0603
BLM18PG121SN1D_0603
1 2
LV36
LV36
2
CV318
CV318 MANHA@
MANHA@
1
10U_0603_6.3V6M
10U_0603_6.3V6M
+1.0VS
+1.8VS
+1.8VS
+1.8VS
+1.8VS
+1.8VS
+1.8VS
+1.8VS
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2008-09-25 2009-09-25
2008-09-25 2009-09-25
2008-09-25 2009-09-25
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
401851
401851
401851
37 53Wednesday, January 20, 2010
37 53Wednesday, January 20, 2010
37 53Wednesday, January 20, 2010
1
A
A
A
of
of
of
5
1
+
+
CV78
CV78 330U_X_2VM_R6M
330U_X_2VM_R6M
2
@
@
D D
+1.5VS
1
+
+
CV192
CV192
390U_2.5V_M_R10
390U_2.5V_M_R10
C C
+1.8VS
+1.8VS
B B
+1.8VS
A A
+1.8VS
2
BLM18PG121SN1D_0603
BLM18PG121SN1D_0603
LV23
LV23
10U_0603_6.3V6M
10U_0603_6.3V6M
BLM18PG121SN1D_0603
BLM18PG121SN1D_0603
LV24
LV24
10U_0603_6.3V6M
10U_0603_6.3V6M
MANHA@
MANHA@
BLM18PG121SN1D_0603
BLM18PG121SN1D_0603
BLM18PG121SN1D_0603
BLM18PG121SN1D_0603
12
LV30
LV30
MANHA@
MANHA@
10U_0603_6.3V6M
10U_0603_6.3V6M
MANHA@
MANHA@
12
LV31
LV31
MANHA@ CV307
MANHA@
10U_0603_6.3V6M
10U_0603_6.3V6M
1 2
CV74 10U_0603_6.3V6MCV74 10U_0603_6.3V6M
1 2
CV79 10U_0603_6.3V6MCV79 10U_0603_6.3V6M
1 2
CV83 10U_0603_6.3V6MCV83 10U_0603_6.3V6M
1 2
CV87 10U_0603_6.3V6MCV87 10U_0603_6.3V6M
1 2
CV91 10U_0603_6.3V6MCV91 10U_0603_6.3V6M
0.1U_0402_16V4Z
0.1U_0402_16V4Z
12
1
1
CV156
CV156
CV157
CV157
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
12
1
1
CV171
CV171
CV172
CV172
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z 1
1
CV303
CV303
CV304
CV304
MANHA@
MANHA@
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z 1
1
CV305
CV305
CV307
MANHA@
MANHA@
2
2
5
+1.8VS
1
CV161
CV161 1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
1
CV173
CV173 1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
1
CV302
CV302 1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
1
CV306
CV306 1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
BLM18PG121SN1D_0603
BLM18PG121SN1D_0603
LV22
LV22
+VDDR5
+VDDR4
+1.8VS
MPV18
MANHA@
MANHA@
SPV18
MANHA@
MANHA@
1 2
CV75 1U_0402_6.3V4ZCV75 1U_0402_6.3V4Z
1 2
CV80 1U_0402_6.3V4ZCV80 1U_0402_6.3V4Z
1 2
CV84 1U_0402_6.3V4ZCV84 1U_0402_6.3V4Z
1 2
CV88 1U_0402_6.3V4ZCV88 1U_0402_6.3V4Z
1 2
CV92 1U_0402_6.3V4ZCV92 1U_0402_6.3V4Z
1 2
CV95 1U_0402_6.3V4ZCV95 1U_0402_6.3V4Z
1 2
CV98 1U_0402_6.3V4ZCV98 1U_0402_6.3V4Z
1 2
CV102 1U_0402_6.3V4ZCV102 1U_0402_6.3V4Z
1 2
CV106 1U_0402_6.3V4ZCV106 1U_0402_6.3V4Z
1 2
CV109 1U_0402_6.3V4ZCV109 1U_0402_6.3V4Z
10U_0603_6.3V6M
10U_0603_6.3V6M
12
2
CV119
CV119
1
+3VS_DELAY
BLM18PG121SN1D_0603
BLM18PG121SN1D_0603
LV27
LV27
10U_0603_6.3V6M
10U_0603_6.3V6M
+1.0VS
+VGA_CORE
4
1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
CV127
CV123
CV123
+1.5VS
12
BLM18PG121SN1D_0603
BLM18PG121SN1D_0603
BLM18PG121SN1D_0603
BLM18PG121SN1D_0603
CV127
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
CV186
CV186
CV187
CV187
2
2
MANHA@
MANHA@ LV28
LV28
10U_0603_6.3V6M
10U_0603_6.3V6M
M9X@
M9X@
LV37
LV37
4
4A
1 2
CV76 1U_0402_6.3V4ZCV76 1U_0402_6.3V4Z
1 2
CV81 1U_0402_6.3V4ZCV81 1U_0402_6.3V4Z
1 2
CV85 1U_0402_6.3V4ZCV85 1U_0402_6.3V4Z
1 2
CV89 1U_0402_6.3V4ZCV89 1U_0402_6.3V4Z
1 2
CV93 1U_0402_6.3V4ZCV93 1U_0402_6.3V4Z
1 2
CV96 1U_0402_6.3V4ZCV96 1U_0402_6.3V4Z
1 2
CV99 1U_0402_6.3V4ZCV99 1U_0402_6.3V4Z
1 2
CV103 1U_0402_6.3V4ZCV103 1U_0402_6.3V4Z
1 2
CV107 1U_0402_6.3V4ZCV107 1U_0402_6.3V4Z
1 2
CV110 1U_0402_6.3V4ZCV110 1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
CV131
CV131
12
LV25
Reserve
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1 CV190
CV190
2
+VGA_CORE
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1
1 2
CV148 10U_0603_6.3V6MCV148 10U_0603_6.3V6M
1 2
CV152 1U_0402_6.3V4ZCV152 1U_0402_6.3V4Z
1 2
CV158 1U_0402_6.3V4ZCV158 1U_0402_6.3V4Z
1 2
CV162 1U_0402_6.3V4ZCV162 1U_0402_6.3V4Z
BLM18PG121SN1D_0603
BLM18PG121SN1D_0603
M9X@ LV25
M9X@
1
CV188
CV188 1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
12
1
CV189
CV189
2
12
3
UV1E
+1.5VS
0.1U_0402_16V4Z
0.1U_0402_16V4Z
136mA
+VDD_CT
2
CV135
CV135 1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
60mA
170mA
+VDDR5
170mA
+VDDR4
+VDDRHA
+VDDRHB
68mA
+PCIE_PVDD
MPV18 MPV18
414mA
2
CV191
CV191
1
SPV18 +SPV10
2
1
CV195
CV195
CV196
CV196
1
2 1U_0402_6.3V4Z
1U_0402_6.3V4Z
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
UV1E
MEM I/O
MEM I/O
AC7
VDDR1#1
AD11
VDDR1#2
AF7
VDDR1#3
AG10
VDDR1#4
AJ7
VDDR1#5
AK8
VDDR1#6
AL9
VDDR1#7
G11
VDDR1#8
G14
VDDR1#9
G17
VDDR1#10
G20
VDDR1#11
G23
VDDR1#12
G26
VDDR1#13
G29
VDDR1#14
H10
VDDR1#15
J7
VDDR1#16
J9
VDDR1#17
K11
VDDR1#18
K13
VDDR1#19
K8
VDDR1#20
L12
VDDR1#21
L16
VDDR1#22
L21
VDDR1#23
L23
VDDR1#24
L26
VDDR1#25
L7
VDDR1#26
M11
VDDR1#27
N11
VDDR1#28
P7
VDDR1#29
R11
VDDR1#30
U11
VDDR1#31
U7
VDDR1#32
Y11
VDDR1#33
Y7
VDDR1#34
LEVEL
LEVEL TRANSLATION
TRANSLATION
AF26
VDD_CT#1
AF27
VDD_CT#2
AG26
VDD_CT#3
AG27
VDD_CT#4
I/O
I/O
AF23
VDDR3#1
AF24
VDDR3#2
AG23
VDDR3#3
AG24
VDDR3#4
AF13
VDDR5#1
AF15
VDDR5#2
AG13
VDDR5#3
AG15
VDDR5#4
AD12
VDDR4#1
AF11
VDDR4#2
AF12
VDDR4#3
AG11
VDDR4#4
MEM CLK
MEM CLK
M20
VDDRHA
M21
VSSRHA
V12
VDDRHB
U12
VSSRHB
PLL
PLL
AB37
PCIE_PVDD
H7
NC_MPV18#1
H8
NC_MPV18#2
AM10
NC_SPV18
AN9
SPV10
AN10
SPVSS
BACK BIAS
BACK BIAS
AA13
BBP#1
Y13
BBP#2
216-0729002 A12 M96_BGA962
216-0729002 A12 M96_BGA962
@
@
2008-09-25 2009-09-25
2008-09-25 2009-09-25
2008-09-25 2009-09-25
3
PCIE
PCIE
PCIE_VDDR#1 PCIE_VDDR#2 PCIE_VDDR#3 PCIE_VDDR#4 PCIE_VDDR#5 PCIE_VDDR#6 PCIE_VDDR#7 PCIE_VDDR#8
PCIE_VDDC#1 PCIE_VDDC#2 PCIE_VDDC#3 PCIE_VDDC#4 PCIE_VDDC#5 PCIE_VDDC#6 PCIE_VDDC#7 PCIE_VDDC#8
PCIE_VDDC#9 PCIE_VDDC#10 PCIE_VDDC#11 PCIE_VDDC#12
VDDC#1
CORE
CORE
VDDC#2 VDDC#3 VDDC#4 VDDC#5 VDDC#6 VDDC#7 VDDC#8
VDDC#9 VDDC#10 VDDC#11 VDDC#12 VDDC#13 VDDC#14 VDDC#15
POWER
POWER
VDDC#16 VDDC#17 VDDC#18 VDDC#19 VDDC#20 VDDC#21 VDDC#22 VDDC#23 VDDC#24 VDDC#25 VDDC#26 VDDC#27 VDDC#28 VDDC#29 VDDC#30 VDDC#31 VDDC#32 VDDC#33 VDDC#34 VDDC#35 VDDC#36 VDDC#37 VDDC#38 VDDC#39 VDDC#40 VDDC#41 VDDC#42 VDDC#43 VDDC#44 VDDC#45 VDDC#46 VDDC#47 VDDC#48 VDDC#49 VDDC#50 VDDC#51 VDDC#52 VDDC#53 VDDC#54 VDDC#55 VDDC#56 VDDC#57 VDDC#58 VDDC#59 VDDC#60 VDDC#61 VDDC#62 VDDC#63 VDDC#64 VDDC#65 VDDC#66 VDDC#67 VDDC#68 VDDC#69 VDDC#70 VDDC#71 VDDC#72 VDDC#73 VDDC#74
VDDCI#1
ISOLATED
ISOLATED
VDDCI#2
CORE I/O
CORE I/O
VDDCI#3 VDDCI#4
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
+PCIE_VDDR_VGA
AA31 AA32 AA33 AA34 V28 W29 W30 Y31
G30 G31 H29 H30 J29 J30 L28 M28 N28 R28 T28 U28
AA15 AA17 AA20 AA22 AA24 AA27 AB13 AB16 AB18 AB21 AB23 AB26 AB28 AC12 AC15 AC17 AC20 AC22 AC24 AC27 AD13 AD16 AD18 AD21 AD23 AD26 AF17 AF20 AF22 AG16 AG18 AG21 AH22 M16 M18 M23 M26 N15 N17 N20 N22 N24 N27 R13 R16 R18 R21 R23 R26 T15 T17 T20 T22 T24 T27 U16 U18 U21 U23 U26 V15 V17 V20 V22 V24 V27 Y16 Y18 Y21 Y23 Y26 Y28 AH27 AH28
M15 N13 R12 T12
2
CV120 10U_0603_6.3V6MCV120 10U_0603_6.3V6M CV124 10U_0603_6.3V6MCV124 10U_0603_6.3V6M CV128 10U_0603_6.3V6MCV128 10U_0603_6.3V6M CV132 10U_0603_6.3V6MCV132 10U_0603_6.3V6M CV136 10U_0603_6.3V6MCV136 10U_0603_6.3V6M CV139 10U_0603_6.3V6MCV139 10U_0603_6.3V6M CV142 10U_0603_6.3V6MCV142 10U_0603_6.3V6M CV145 1U_0402_6.3V4ZCV145 1U_0402_6.3V4Z CV149 1U_0402_6.3V4ZCV149 1U_0402_6.3V4Z CV153 1U_0402_6.3V4ZCV153 1U_0402_6.3V4Z
+VDDCI
2
500mA
2A
1 2
CV100 10U_0603_6.3V6MCV100 10U_0603_6.3V6M
1 2
CV104 1U_0402_6.3V4ZCV104 1U_0402_6.3V4Z
1 2
CV108 1U_0402_6.3V4ZCV108 1U_0402_6.3V4Z
1 2
CV111 1U_0402_6.3V4ZCV111 1U_0402_6.3V4Z
1 2
CV112 1U_0402_6.3V4ZCV112 1U_0402_6.3V4Z
1 2
CV113 1U_0402_6.3V4ZCV113 1U_0402_6.3V4Z
1 2
CV115 1U_0402_6.3V4ZCV115 1U_0402_6.3V4Z
1 2
CV118 1U_0402_6.3V4ZCV118 1U_0402_6.3V4Z
1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2
1
CV197
CV197
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
1 2
LV21 BLM18PG121SN1D_0603LV21 BLM18PG121SN1D_0603
1 2
CV77 10U_0603_6.3V6MCV77 10U_0603_6.3V6M
1 2
CV82 1U_0402_6.3V4ZCV82 1U_0402_6.3V4Z
1 2
CV86 1U_0402_6.3V4ZCV86 1U_0402_6.3V4Z
1 2
CV90 1U_0402_6.3V4ZCV90 1U_0402_6.3V4Z
1 2
CV94 1U_0402_6.3V4ZCV94 1U_0402_6.3V4Z
+1.0VS
1
+
+
CV116
CV116
2
330U_X_2VM_R6M
330U_X_2VM_R6M
1 2
CV121 1U_0402_6.3V4ZCV121 1U_0402_6.3V4Z
1 2
CV125 1U_0402_6.3V4ZCV125 1U_0402_6.3V4Z
1 2
CV129 1U_0402_6.3V4ZCV129 1U_0402_6.3V4Z
1 2
CV133 1U_0402_6.3V4ZCV133 1U_0402_6.3V4Z
1 2
CV137 1U_0402_6.3V4ZCV137 1U_0402_6.3V4Z
1 2
CV140 1U_0402_6.3V4ZCV140 1U_0402_6.3V4Z
1 2
CV143 1U_0402_6.3V4ZCV143 1U_0402_6.3V4Z
1 2
CV146 1U_0402_6.3V4ZCV146 1U_0402_6.3V4Z
1 2
CV150 1U_0402_6.3V4ZCV150 1U_0402_6.3V4Z
1 2
CV154 1U_0402_6.3V4ZCV154 1U_0402_6.3V4Z
1 2
CV159 1U_0402_6.3V4ZCV159 1U_0402_6.3V4Z
1 2
CV163 1U_0402_6.3V4ZCV163 1U_0402_6.3V4Z
1 2
CV165 1U_0402_6.3V4ZCV165 1U_0402_6.3V4Z
1 2
CV167 1U_0402_6.3V4ZCV167 1U_0402_6.3V4Z
1 2
CV169 1U_0402_6.3V4ZCV169 1U_0402_6.3V4Z
1 2
CV174 1U_0402_6.3V4ZCV174 1U_0402_6.3V4Z
1 2
CV176 1U_0402_6.3V4ZCV176 1U_0402_6.3V4Z
1 2
CV178 1U_0402_6.3V4ZCV178 1U_0402_6.3V4Z
1 2
CV181 1U_0402_6.3V4ZCV181 1U_0402_6.3V4Z
1 2
CV183 1U_0402_6.3V4ZCV183 1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
1
2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
CV198
CV198
CV199
CV199
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
1 2
CV97 1U_0402_6.3V4ZCV97 1U_0402_6.3V4Z
1 2
CV101 0.1U_0402_16V4ZCV101 0.1U_0402_16V4Z
1 2
CV105 0.1U_0402_16V4ZCV105 0.1U_0402_16V4Z
1
1
+
+
+
@
@
2
390U_2.5V_M_R10
390U_2.5V_M_R10
1
CV200
CV200
2
10U_0603_6.3V6M
10U_0603_6.3V6M
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
+
CV324
CV324
CV114
CV114
2
330U_X_2VM_R6M
330U_X_2VM_R6M
CV122 1U_0402_6.3V4ZCV122 1U_0402_6.3V4Z CV126 1U_0402_6.3V4ZCV126 1U_0402_6.3V4Z CV130 1U_0402_6.3V4ZCV130 1U_0402_6.3V4Z CV134 1U_0402_6.3V4ZCV134 1U_0402_6.3V4Z CV138 1U_0402_6.3V4ZCV138 1U_0402_6.3V4Z CV141 1U_0402_6.3V4ZCV141 1U_0402_6.3V4Z CV144 1U_0402_6.3V4ZCV144 1U_0402_6.3V4Z CV147 1U_0402_6.3V4ZCV147 1U_0402_6.3V4Z CV151 1U_0402_6.3V4ZCV151 1U_0402_6.3V4Z CV155 1U_0402_6.3V4ZCV155 1U_0402_6.3V4Z CV160 1U_0402_6.3V4ZCV160 1U_0402_6.3V4Z CV164 1U_0402_6.3V4ZCV164 1U_0402_6.3V4Z CV166 1U_0402_6.3V4ZCV166 1U_0402_6.3V4Z CV168 1U_0402_6.3V4ZCV168 1U_0402_6.3V4Z CV170 1U_0402_6.3V4ZCV170 1U_0402_6.3V4Z CV175 1U_0402_6.3V4ZCV175 1U_0402_6.3V4Z CV177 1U_0402_6.3V4ZCV177 1U_0402_6.3V4Z CV179 1U_0402_6.3V4ZCV179 1U_0402_6.3V4Z CV182 1U_0402_6.3V4ZCV182 1U_0402_6.3V4Z CV184 1U_0402_6.3V4ZCV184 1U_0402_6.3V4Z
1 2
LV29 PBY201209T-300Y-N_2PLV29 PBY201209T-300Y-N_2P
401851
401851
401851
1
@
@
1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2
25A
4A
390U_2.5V_M_R10
390U_2.5V_M_R10
38 53Wednesday, January 20, 2010
38 53Wednesday, January 20, 2010
38 53Wednesday, January 20, 2010
1
2
+
+
CV323
CV323
+1.8VS
of
of
of
+VGA_CORE
+VGA_CORE
A
A
A
5
UV1F
UV1F
4
3
2
1
AB39
PCIE_VSS#1
E39
PCIE_VSS#2
F34
PCIE_VSS#3
F39
PCIE_VSS#4
G33
PCIE_VSS#5
G34
PCIE_VSS#6
H31
PCIE_VSS#7
H34
PCIE_VSS#8
H39
PCIE_VSS#9
J31
D D
C C
B B
A A
5
PCIE_VSS#10
J34
PCIE_VSS#11
K31
PCIE_VSS#12
K34
PCIE_VSS#13
K39
PCIE_VSS#14
L31
PCIE_VSS#15
L34
PCIE_VSS#16
M34
PCIE_VSS#17
M39
PCIE_VSS#18
N31
PCIE_VSS#19
N34
PCIE_VSS#20
P31
PCIE_VSS#21
P34
PCIE_VSS#22
P39
PCIE_VSS#23
R34
PCIE_VSS#24
T31
PCIE_VSS#25
T34
PCIE_VSS#26
T39
PCIE_VSS#27
U31
PCIE_VSS#28
U34
PCIE_VSS#29
V34
PCIE_VSS#30
V39
PCIE_VSS#31
W31
PCIE_VSS#32
W34
PCIE_VSS#33
Y34
PCIE_VSS#34
Y39
PCIE_VSS#35
F15
GND#101
F17
GND#102
F19
GND#103
F21
GND#104
F23
GND#105
F25
GND#106
F27
GND#107
F29
GND#108
F31
GND#109
F33
GND#110
F7
GND#111
F9
GND#112
G2
GND#113
G6
GND#114
H9
GND#115
J2
GND#116
J27
GND#117
J6
GND#118
J8
GND#119
K14
GND#120
K7
GND#121
L11
GND#122
L17
GND#123
L2
GND#124
L22
GND#125
L24
GND#126
L6
GND#127
M17
GND#128
M22
GND#129
M24
GND#130
N16
GND#131
N18
GND#132
N2
GND#133
N21
GND#134
N23
GND#135
N26
GND#136
N6
GND#137
R15
GND#138
R17
GND#139
R2
GND#140
R20
GND#141
R22
GND#142
R24
GND#143
R27
GND#144
R6
GND#145
T11
GND#146
T13
GND#147
T16
GND#148
T18
GND#149
T21
GND#150
T23
GND#151
T26
GND#152
U15
GND#153
U17
GND#154
U2
GND#155
U20
GND#156
U22
GND#157
U24
GND#158
U27
GND#159
U6
GND#160
V11
GND#161
V16
GND#162
V18
GND#163
V21
GND#164
V23
GND#165
V26
GND#166
W2
GND#167
W6
GND#168
Y15
GND#169
Y17
GND#170
Y20
GND#171
Y22
GND#172
Y24
GND#173
Y27
GND#174
U13
GND#175
V13
GND#176
216-0729002 A12 M96_BGA962
216-0729002 A12 M96_BGA962
@
@
4
GND
GND
VSS_MECH#1 VSS_MECH#2 VSS_MECH#3
GND#1 GND#2 GND#3 GND#4 GND#5 GND#6 GND#7 GND#8
GND#9 GND#10 GND#11 GND#12 GND#13 GND#14 GND#15 GND#16 GND#17 GND#18 GND#19 GND#20 GND#21 GND#22 GND#23 GND#24 GND#25 GND#26 GND#27 GND#28 GND#29 GND#30 GND#31 GND#32 GND#33 GND#34 GND#35 GND#36 GND#37 GND#38 GND#39 GND#40 GND#41 GND#42 GND#43 GND#44 GND#45 GND#46 GND#47 GND#48 GND#49 GND#50 GND#51 GND#52 GND#53 GND#54 GND#55 GND#56 GND#57 GND#58 GND#59 GND#60 GND#61 GND#62 GND#63 GND#64 GND#65 GND#66 GND#67 GND#68 GND#69 GND#70 GND#71 GND#72 GND#73 GND#74 GND#75 GND#76 GND#77 GND#78 GND#79 GND#80 GND#81 GND#82 GND#83 GND#84 GND#85 GND#86 GND#87 GND#88 GND#89 GND#90 GND#91 GND#92 GND#93 GND#94 GND#95 GND#96 GND#97 GND#98 GND#99
GND#100
A3 A37 AA16 AA18 AA2 AA21 AA23 AA26 AA28 AA6 AB12 AB15 AB17 AB20 AB22 AB24 AB27 AC11 AC13 AC16 AC18 AC2 AC21 AC23 AC26 AC28 AC6 AD15 AD17 AD20 AD22 AD24 AD27 AD9 AE2 AE6 AF10 AF16 AF18 AF21 AG17 AG2 AG20 AG22 AG6 AG9 AH21 AH29 AJ10 AJ11 AJ2 AJ28 AJ6 AK11 AK31 AK7 AL11 AL14 AL17 AL2 AL20 AL21 AL23 AL26 AL32 AL6 AL8 AM11 AM31 AM9 AN11 AN2 AN30 AN6 AN8 AP11 AP7 AP9 AR5 AW34 B11 B13 B15 B17 B19 B21 B23 B25 B27 B29 B31 B33 B7 B9 C1 C39 E35 E5 F11 F13
A39 AW1 AW39
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2008-09-25 2009-09-25
2008-09-25 2009-09-25
2008-09-25 2009-09-25
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
401851
401851
401851
1
39 53Wednesday, January 20, 2010
39 53Wednesday, January 20, 2010
39 53Wednesday, January 20, 2010
of
of
of
A
A
A
5
4
3
2
1
MDB0 MDB1 MDB2 MDB3 MDB4 MDB5 MDB6 MDB7 MDB8
MDB9 MDB10 MDB11 MDB12 MDB13 MDB14 MDB15 MDB16 MDB17 MDB18 MDB19 MDB20 MDB21 MDB22 MDB23 MDB24 MDB25 MDB26 MDB27 MDB28 MDB29 MDB30 MDB31 MDB32 MDB33 MDB34 MDB35 MDB36 MDB37 MDB38 MDB39 MDB40 MDB41 MDB42 MDB43 MDB44 MDB45 MDB46 MDB47 MDB48 MDB49 MDB50 MDB51 MDB52 MDB53 MDB54 MDB55 MDB56 MDB57 MDB58 MDB59 MDB60 MDB61 MDB62 MDB63
TESTA TESTB
MDB[0..63]
C5 C3
G4 H5 H6
M6 M1 M3 M5 N4
R4
U4
AA4 AB6 AB1
AB3 AD6 AD1 AD3 AD5
AF1
AF3
AF6 AG4 AH5 AH6
AJ4
AK3
AF8
AF9 AG8 AG7
AK9
AL7 AM8 AM7
AK1
AL4 AM6 AM1 AN4
AP3
AP1
AP5
Y12
AA12
AD28 AK10
AL10
2
E3 E1 F1 F3 F5
J4 K6 K5 L4
P6 P5
T6 T1
V6 V1 V3 Y6 Y1 Y3 Y5
MDA[0..63]
D D
C C
Close to pin L18
+1.5VS
12
RV41
RV41
40.2_0402_1%
40.2_0402_1%
+MVREFDA
1
12
CV202
12
12
CV202
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1
CV204
CV204
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
5
+1.5VS
+MVREFSA
1 2 1 2 1 2
1 2 1 2 1 2
RV43
RV43
100_0402_1%
100_0402_1%
B B
Close to pin L20
A A
RV45
RV45
40.2_0402_1%
40.2_0402_1%
RV47
RV47
100_0402_1%
100_0402_1%
+1.5VS
MDA[0..63] <41>
MDA0 MDA1 MDA2 MDA3 MDA4 MDA5 MDA6 MDA7 MDA8
MDA9 MDA10 MDA11 MDA12 MDA13 MDA14 MDA15 MDA16 MDA17 MDA18 MDA19 MDA20 MDA21 MDA22 MDA23 MDA24 MDA25 MDA26 MDA27 MDA28 MDA29 MDA30 MDA31 MDA32 MDA33 MDA34 MDA35 MDA36 MDA37 MDA38 MDA39 MDA40 MDA41 MDA42 MDA43 MDA44 MDA45 MDA46 MDA47 MDA48 MDA49 MDA50 MDA51 MDA52 MDA53 MDA54 MDA55 MDA56 MDA57 MDA58 MDA59 MDA60 MDA61 MDA62 MDA63
+MVREFDA +MVREFSA
RV48 243_0402_1%MANHA@ RV48 243_0402_1%MANHA@ RV49 243_0402_1%MANHA@ RV49 243_0402_1%MANHA@ RV50 243_0402_1%MANHA@ RV50 243_0402_1%MANHA@
RV51 243_0402_1%RV51 243_0402_1% RV53 243_0402_1%MANHA@ RV53 243_0402_1%MANHA@ RV55 243_0402_1%MANHA@ RV55 243_0402_1%MANHA@
UV1C
UV1C
C37
DQA_0
C35
DQA_1
A35
DQA_2
E34
DQA_3
G32
DQA_4
D33
DQA_5
F32
DQA_6
E32
DQA_7
D31
DQA_8
F30
DQA_9
C30
DQA_10
A30
DQA_11
F28
DQA_12
C28
DQA_13
A28
DQA_14
E28
DQA_15
D27
DQA_16
F26
DQA_17
C26
DQA_18
A26
DQA_19
F24
DQA_20
C24
DQA_21
A24
DQA_22
E24
DQA_23
C22
DQA_24
A22
DQA_25
F22
DQA_26
D21
DQA_27
A20
DQA_28
F20
DQA_29
D19
DQA_30
E18
DQA_31
C18
DQA_32
A18
DQA_33
F18
DQA_34
D17
DQA_35
A16
DQA_36
F16
DQA_37
D15
DQA_38
E14
DQA_39
F14
DQA_40
D13
DQA_41
F12
DQA_42
A12
DQA_43
D11
DQA_44
F10
DQA_45
A10
DQA_46
C10
DQA_47
G13
DQA_48
H13
DQA_49
J13
DQA_50
H11
DQA_51
G10
DQA_52
G8
DQA_53
K9
DQA_54
K10
DQA_55
G9
DQA_56
A8
DQA_57
C8
DQA_58
E8
DQA_59
A6
DQA_60
C6
DQA_61
E6
DQA_62
A5
DQA_63
L18
MVREFDA
L20
MVREFSA
L27
NC_MEM_CALRN0
N12
NC_MEM_CALRN1
AG12
NC_MEM_CALRN2
M12
MEM_CALRP1
M27
NC_MEM_CALRP0
AH12
NC_MEM_CALRP2
216-0729002 A12 M96_BGA962
216-0729002 A12 M96_BGA962
@
@
MAA_0 MAA_1 MAA_2 MAA_3 MAA_4 MAA_5 MAA_6 MAA_7 MAA_8
MAA_9 MAA_10 MAA_11 MAA_12
MAA_13/BA2 MAA_14/BA0 MAA_15/BA1
DQMA_0 DQMA_1 DQMA_2 DQMA_3 DQMA_4 DQMA_5 DQMA_6
MEMORY INTERFACE A
MEMORY INTERFACE A
DQMA_7
QSA_0/RDQSA_0 QSA_1/RDQSA_1 QSA_2/RDQSA_2 QSA_3/RDQSA_3 QSA_4/RDQSA_4 QSA_5/RDQSA_5 QSA_6/RDQSA_6 QSA_7/RDQSA_7
QSA_0B/WDQSA_0 QSA_1B/WDQSA_1 QSA_2B/WDQSA_2 QSA_3B/WDQSA_3 QSA_4B/WDQSA_4 QSA_5B/WDQSA_5 QSA_6B/WDQSA_6 QSA_7B/WDQSA_7
ODTA0
ODTA1
CLKA0
CLKA0B
CLKA1
CLKA1B
RASA0B RASA1B
CASA0B CASA1B
CSA0B_0 CSA0B_1
CSA1B_0 CSA1B_1
CKEA0
CKEA1
WEA0B WEA1B
RSVD#1 RSVD#2 RSVD#3
RSVD#5 RSVD#6
RSVD#9
RSVD#11
4
MAA1
J23
MAA2
H24
MAA3
J24
MAA4
H26
MAA5 MAB4
J26
MAA6
H21
MAA7
G21
MAA8
H19
MAA9
H20
MAA10
L13
MAA11
G16
MAA12
J16
A_BA2
H16
A_BA0
J17
A_BA1
H17
DQMA#0
A32
DQMA#1
C32
DQMA#2
D23
DQMA#3
E22
DQMA#4
C14
DQMA#5
A14
DQMA#6
E10
DQMA#7
D9
QSA0
C34
QSA1
D29
QSA2
D25
QSA3
E20
QSA4
E16
QSA5
E12
QSA6
J10
QSA7
D7
QSA#0
A34
QSA#1
E30
QSA#2
E26
QSA#3
C20
QSA#4
C16
QSA#5
C12
QSA#6
J11
QSA#7
F8
ODTA0
J21
ODTA1
G19
CLKA0
H27
CLKA0#
G27
CLKA1
J14
CLKA1#
H14
RASA0#
K23
RASA1#
K19
CASA0#
K20
CASA1#
K17
CSA0#_0
K24 K27
CSA1#_0
M13 K16
CKEA0
K21
CKEA1
J20
WEA0#
K26
WEA1#
L15 AF28
AG28 AL31
MAA13
H23 J19
MAB13
T8 W8
MAA0
G24
MAA[13..0]
A_BA[2..0]
ODTA0 <41> ODTA1 <41>
CLKA0 <41> CLKA0# <41>
CLKA1 <41> CLKA1# <41>
RASA0# <41> RASA1# <41>
CASA0# <41> CASA1# <41>
CSA0#_0 <41>
CSA1#_0 <41>
CKEA0 <41> CKEA1 <41>
WEA0# <41> WEA1# <41>
MAA[13..0] <41>
A_BA[2..0] <41>
DQMA#[7..0] <41>
Close to pin Y12
+1.5VS
QSA[7..0] <41>
40.2_0402_1%
40.2_0402_1%
QSA#[7..0] <41>
Close to pin AA12
+1.5VS
12
RV46 40.2_0402_1%RV46 40.2_0402_1%
12 RV52
RV52
+3VS_DELAY
12
RV56
@ RV56
@
10K_0402_5%
10K_0402_5%
TESTEN
12
RV23
RV23 10K_0402_5%
10K_0402_5%
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
12
RV42
RV42
12 RV44
RV44
100_0402_1%
100_0402_1%
1
CV205
CV205
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
100_0402_1%
100_0402_1%
RV57 51_0402_5%
RV57 51_0402_5% RV58 51_0402_5%
RV58 51_0402_5%
2008-09-25 2009-09-25
2008-09-25 2009-09-25
2008-09-25 2009-09-25
1
CV203
CV203
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
+MVREFSB
MANHA@
MANHA@
MANHA@
MANHA@
+MVREFDB
CV320 0.1U_0402_16V4Z
CV320 0.1U_0402_16V4Z 12 12
CV321 0.1U_0402_16V4Z
CV321 0.1U_0402_16V4Z
RV125 4.7K_0402_5%M9X@ RV125 4.7K_0402_5%M9X@ RV129 4.7K_0402_5%M9X@ RV129 4.7K_0402_5%M9X@
Compal Secret Data
Compal Secret Data
Compal Secret Data
+MVREFDB +MVREFSB
TESTEN
1 2 1 2
MANHA@
MANHA@ MANHA@
MANHA@
12 12
Deciphered Date
Deciphered Date
Deciphered Date
TESTA TESTB
MDB[0..63] <42>
UV1D
UV1D
DQB_0 DQB_1 DQB_2 DQB_3 DQB_4 DQB_5 DQB_6 DQB_7 DQB_8 DQB_9 DQB_10 DQB_11 DQB_12 DQB_13 DQB_14 DQB_15 DQB_16 DQB_17 DQB_18 DQB_19 DQB_20 DQB_21 DQB_22 DQB_23 DQB_24 DQB_25 DQB_26 DQB_27 DQB_28 DQB_29 DQB_30 DQB_31 DQB_32 DQB_33 DQB_34 DQB_35 DQB_36 DQB_37 DQB_38 DQB_39 DQB_40 DQB_41 DQB_42 DQB_43 DQB_44 DQB_45 DQB_46 DQB_47 DQB_48 DQB_49 DQB_50 DQB_51 DQB_52 DQB_53 DQB_54 DQB_55 DQB_56 DQB_57 DQB_58 DQB_59 DQB_60 DQB_61 DQB_62 DQB_63
MVREFDB MVREFSB
TESTEN CLKTESTA
CLKTESTB
216-0729002 A12 M96_BGA962
216-0729002 A12 M96_BGA962
@
@
MEMORY INTERFACE B
MEMORY INTERFACE B
QSB_0/RDQSB_0 QSB_1/RDQSB_1 QSB_2/RDQSB_2 QSB_3/RDQSB_3 QSB_4/RDQSB_4 QSB_5/RDQSB_5 QSB_6/RDQSB_6 QSB_7/RDQSB_7
QSB_0B/WDQSB_0 QSB_1B/WDQSB_1 QSB_2B/WDQSB_2 QSB_3B/WDQSB_3 QSB_4B/WDQSB_4 QSB_5B/WDQSB_5 QSB_6B/WDQSB_6 QSB_7B/WDQSB_7
Park uses memory group B only
MAB_0 MAB_1 MAB_2 MAB_3 MAB_4 MAB_5 MAB_6 MAB_7 MAB_8
MAB_9 MAB_10 MAB_11 MAB_12
MAB_13/BA2 MAB_14/BA0 MAB_15/BA1
DQMB_0 DQMB_1 DQMB_2 DQMB_3 DQMB_4 DQMB_5 DQMB_6 DQMB_7
ODTB0 ODTB1
CLKB0 CLKB0B
CLKB1 CLKB1B
RASB0B RASB1B
CASB0B CASB1B
CSB0B_0 CSB0B_1
CSB1B_0 CSB1B_1
CKEB0 CKEB1
WEB0B WEB1B
DRAM_RST
68P_0402_50V8J
68P_0402_50V8J
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
MAB1
T9
MAB2
P9
MAB3
N7 N8
MAB5
N9
MAB6
U9
MAB7
U8
MAB8
Y9
MAB9
W9
MAB10
AC8
MAB11
AC9
MAB12
AA7
B_BA2
AA8
B_BA0
Y8
B_BA1
AA9
DQMB#0
H3
DQMB#1
H1
DQMB#2
T3
DQMB#3
T5
DQMB#4
AE4
DQMB#5
AF5
DQMB#6
AK6
DQMB#7
AK5
QSB0
F6
QSB1
K3
QSB2
P3
QSB3
V5
QSB4
AB5
QSB5
AH1
QSB6
AJ9
QSB7
AM5
QSB#0
G7
QSB#1
K1
QSB#2
P1
QSB#3
W4
QSB#4
AC4
QSB#5
AH3
QSB#6
AJ8
QSB#7
AM3
ODTB0
T7
ODTB1
W7
CLKB0
L9
CLKB0#
L8
CLKB1
AD8
CLKB1#
AD7
RASB0#
T10
RASB1#
Y10
CASB0#
W10
CASB1#
AA10
CSB0#_0
P10 L10
CSB1#_0
AD10 AC10
CKEB0
U10
CKEB1
AA11
WEB0#
N10
WEB1#
AB11
M9X@
M9X@ RV132 0_0402_5%
RV132 0_0402_5%
MANHA@RV132
MANHA@
AH11
1
CV206
CV206
MANHA@
MANHA@
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
MAB0
P8
MAB[13..0]
B_BA[2..0]
ODTB0 <42> ODTB1 <42>
CLKB0 <42> CLKB0# <42>
CLKB1 <42> CLKB1# <42>
RASB0# <42> RASB1# <42>
CASB0# <42> CASB1# <42>
CSB0#_0 <42>
CSB1#_0 <42>
CKEB0 <42> CKEB1 <42>
WEB0# <42> WEB1# <42>
RV54
M9X@ RV54
RV132
12
CV206
M9X@
401851
401851
401851
4.7K_0402_5%
4.7K_0402_5%
12
MANHA@
MANHA@ RV59
RV59 10K_0402_5%
10K_0402_5%
1
51_0402_5%
51_0402_5% M9X@ CV206
M9X@
0.01U_0402_25V7K
0.01U_0402_25V7K
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
MAB[13..0] <42>
B_BA[2..0] <42>
DQMB#[7..0] <42>
QSB[7..0] <42>
QSB#[7..0] <42>
12
+1.5VS
DRAM_RST# <41,42>
40 53Wednesday, January 20, 2010
40 53Wednesday, January 20, 2010
40 53Wednesday, January 20, 2010
of
of
of
A
A
A
5
UV2
+VREFC_A1 +VREFD_A1
MAA[13..0]<40>
QSA[7..0]<40>
A_BA[2..0]
RV81 56_0402_1%
RV81 56_0402_1%
RV82 56_0402_1%
RV82 56_0402_1%
1 2
RV83 56_0402_1%
RV83 56_0402_1%
1 2
RV84 56_0402_1%
RV84 56_0402_1%
5
MDA[0..63]
1 2
8PCS@
8PCS@
1 2
8PCS@
8PCS@
8PCS@
8PCS@
8PCS@
8PCS@
DRAM_RST#<40,42>
RV61
RV61
243_0402_1%
243_0402_1%
4.99K_0402_1%
4.99K_0402_1%
4.99K_0402_1%
4.99K_0402_1%
1
CV234
CV234
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
8PCS@
8PCS@
1
CV252
CV252
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
8PCS@
8PCS@
A_BA0<40> A_BA1<40> A_BA2<40>
CLKA0<40> CLKA0#<40> CKEA0<40>
ODTA0<40> CSA0#_0<40> RASA0#<40> CASA0#<40> WEA0#<40>
QSA2 QSA0
DQMA#2 DQMA#0
QSA#2 QSA#0
12
8PCS@
8PCS@
+1.5VS +1.5VS +1.5VS +1.5VS
RV65
RV65
RV73
RV73
8PCS@
8PCS@
+1.5VS
8PCS@
8PCS@
MDA[0..63]<40>
D D
DQMA#[7..0]<40>
QSA#[7..0]<40>
A_BA[2..0]<40>
C C
B B
CLKA0
CLKA0#
CLKA1
A A
CLKA1#
UV2
M8
VREFCA
H1
VREFDQ
MAA0
N3
A0
MAA1
P7
A1
MAA2
P3
A2
MAA3
N2
A3
MAA4
P8
A4
MAA5
P2
A5
MAA6
R8
A6
MAA7
R2
A7
T8
A8
MAA9
R3
L7 R7 N7
T3
M2 N8 M3
J7
K7
K9
K1
L2
J3
K3
L3
F3 C7
E7 D3
G3
B7
T2
L8
J1
L1
J9
L9 M7
T7
12
8PCS@
8PCS@
+VREFC_A1
12
1
CV209
CV209
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
8PCS@
8PCS@
1U_0402_6.3V4Z
1U_0402_6.3V4Z
CV231
CV231
1
1
2
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
8PCS@
8PCS@
8PCS@
8PCS@
A9 A10/AP A11 A12/BC A13
BA0 BA1 BA2
CK CK CKE
ODT CS RAS CAS WE
DQSL DQSU
DML DMU
DQSL DQSU
RESET ZQ
NC NC NC NC
NC NC
K4W2G1646B-HC12_FBGA96~D
K4W2G1646B-HC12_FBGA96~D
@
@
CV215
CV215
1U_0402_6.3V4Z
1U_0402_6.3V4Z
MAA10 MAA11 MDA3 MAA12 MAA13 MAA13 MAA13 MAA13
96-BALL
96-BALL SDRAM DDR3
SDRAM DDR3
4.99K_0402_1%
4.99K_0402_1%
4.99K_0402_1%
4.99K_0402_1%
1U_0402_6.3V4Z
1U_0402_6.3V4Z
CV232
CV232
CV216
CV216
1
1
2
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
8PCS@
8PCS@
8PCS@
8PCS@
+1.5VS
4
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
B2
VDD
D9
VDD
G7
VDD
K2
VDD
K8
VDD
N1
VDD
N9
VDD
R1
VDD
R9
VDD
A1
VDDQ
A8
VDDQ
C1
VDDQ
C9
VDDQ
D2
VDDQ
E9
VDDQ
F1
VDDQ
H2
VDDQ
H9
VDDQ
A9
VSS
B3
VSS
E1
VSS
G8
VSS
J2
VSS
J8
VSS
M1
VSS
M9
VSS
P1
VSS
P9
VSS
T1
VSS
T9
VSS
B1
VSSQ
B9
VSSQ
D1
VSSQ
D8
VSSQ
E2
VSSQ
E8
VSSQ
F9
VSSQ
G1
VSSQ
G9
VSSQ
RV66
RV66
RV76
RV76
8PCS@
8PCS@
1U_0402_6.3V4Z
1U_0402_6.3V4Z
CV233
CV233
CV235
CV235
1
1
2
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
8PCS@
8PCS@
10U_0603_6.3V
10U_0603_6.3V
CV246
CV246
4
12
12
MDA23 MDA18 MDA22 MDA19 MDA20 MDA17 MDA21 MDA16
MDA0 MDA5MAA8 MDA1 MDA7
MDA4 MDA2 MDA6
8PCS@
8PCS@
8PCS@
8PCS@
CV236
CV236
1
2
8PCS@
8PCS@
8PCS@
8PCS@
Group2
Group0
+1.5VS
+1.5VS
RV62
RV62 243_0402_1%
243_0402_1%
+VREFD_A1
1 CV210
CV210
0.1U_0402_16V4Z
0.1U_0402_16V4Z 2
1
1
CV247
CV247
2
2
10U_0603_6.3V
10U_0603_6.3V
8PCS@
8PCS@
3
UV3
+VREFC_A2 +VREFD_A2
12
8PCS@
8PCS@
4.99K_0402_1%
4.99K_0402_1%
4.99K_0402_1%
4.99K_0402_1%
8PCS@
8PCS@
10U_0603_6.3V
10U_0603_6.3V
CV248
CV248
8PCS@
8PCS@
MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8
MAA9 MAA10 MAA11 MAA12
A_BA0 A_BA1 A_BA2
CLKA0 CLKA0# CKEA0
ODTA0 CSA0#_0 RASA0# CASA0# WEA0#
QSA3 QSA1
DQMA#3 DQMA#1
QSA#3 QSA#1
DRAM_RST#
8PCS@
8PCS@
1
CV249
CV249
2
10U_0603_6.3V
10U_0603_6.3V
UV3
M8
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
K1
ODT
L2
CS
J3
RAS
K3
CAS
L3
WE
F3
DQSL
C7
DQSU
E7
DML
D3
DMU
G3
DQSL
B7
DQSU
T2
RESET
L8
ZQ
J1
NC
L1
NC
J9
NC
L9
NC
M7
NC
T7
NC
K4W2G1646B-HC12_FBGA96~D
K4W2G1646B-HC12_FBGA96~D
@
@
12
RV67
8PCS@RV67
8PCS@
+VREFC_A2 +VREFD_A2
12
1 CV207
8PCS@
8PCS@
1U_0402_6.3V4Z
1U_0402_6.3V4Z
CV217
CV217
1
1
2
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
8PCS@
8PCS@
1
2
8PCS@
8PCS@
CV207
0.1U_0402_16V4Z
0.1U_0402_16V4Z 2
1U_0402_6.3V4Z
1U_0402_6.3V4Z 8PCS@
8PCS@
RV77
RV77
8PCS@
8PCS@
+1.5VS +1.5VS
DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7
DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ
96-BALL
96-BALL SDRAM DDR3
SDRAM DDR3
1U_0402_6.3V4Z
1U_0402_6.3V4Z
CV219
CV219
CV218
CV218
CV220
CV220
1
1
2
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
8PCS@
8PCS@
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
E3 F7 F2 F8 H3 H8 G2 H7
D7 C3 C8 C2 A7 A2 B8 A3
B2
VDD
D9
VDD
G7
VDD
K2
VDD
K8
VDD
N1
VDD
N9
VDD
R1
VDD
R9
VDD
A1 A8 C1 C9 D2 E9 F1 H2 H9
A9
VSS
B3
VSS
E1
VSS
G8
VSS
J2
VSS
J8
VSS
M1
VSS
M9
VSS
P1
VSS
P9
VSS
T1
VSS
T9
VSS
B1 B9 D1 D8 E2 E8 F9 G1 G9
RV68
4.99K_0402_1%
4.99K_0402_1%
RV78
RV78
4.99K_0402_1%
4.99K_0402_1%
8PCS@
8PCS@
1U_0402_6.3V4Z
1U_0402_6.3V4Z
CV221
CV221
1
1
2
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
8PCS@
8PCS@
8PCS@
8PCS@
3
CV222
CV222
MDA25 MDA30 MDA24 MDA29 MDA26 MDA31 MDA27 MDA28
MDA15 MDA11 MDA14 MDA10 MDA13
MDA9
MDA12
MDA8
12
12
1
2
8PCS@RV68
8PCS@
8PCS@
8PCS@
CV223
CV223
2
UV4
+VREFC_A3 +VREFD_A3
MAA0
Group3
Group1
+1.5VS
+1.5VS
RV63
RV63 243_0402_1%
243_0402_1%
1 CV211
CV211
0.1U_0402_16V4Z
0.1U_0402_16V4Z 2
2008-09-25 2009-09-25
2008-09-25 2009-09-25
2008-09-25 2009-09-25
MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8
MAA9 MAA10 MAA11 MAA12
A_BA0 A_BA1 A_BA2
CLKA1<40> CLKA1#<40> CKEA1<40>
ODTA1<40> CSA1#_0<40> RASA1#<40> CASA1#<40> WEA1#<40>
QSA4 QSA5
DQMA#4 DQMA#5
QSA#4 QSA#5
DRAM_RST# DRAM_RST#
12
8PCS@
8PCS@
4.99K_0402_1%
4.99K_0402_1%
4.99K_0402_1%
4.99K_0402_1%
UV4
M8
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
K1
ODT
L2
CS
J3
RAS
K3
CAS
L3
WE
F3
DQSL
C7
DQSU
E7
DML
D3
DMU
G3
DQSL
B7
DQSU
T2
RESET
L8
ZQ
J1
NC
L1
NC
J9
NC
L9
NC
M7
NC
T7
NC
K4W2G1646B-HC12_FBGA96~D
K4W2G1646B-HC12_FBGA96~D
+1.5VS +1.5VS +1.5VS +1.5VS
@
@
12
RV69
8PCS@RV69
8PCS@
12
1 CV208
RV79
RV79
8PCS@
8PCS@
1U_0402_6.3V4Z
1U_0402_6.3V4Z 8PCS@
8PCS@
CV208
0.1U_0402_16V4Z
0.1U_0402_16V4Z 2
8PCS@
8PCS@
1U_0402_6.3V4Z
1U_0402_6.3V4Z
CV237
CV237
CV224
CV224
1
1
2
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z 8PCS@
8PCS@
8PCS@
8PCS@
Deciphered Date
Deciphered Date
Deciphered Date
96-BALL
96-BALL SDRAM DDR3
SDRAM DDR3
4.99K_0402_1%
4.99K_0402_1%
4.99K_0402_1%
4.99K_0402_1%
1U_0402_6.3V4Z
1U_0402_6.3V4Z
CV226
CV226
CV225
CV225
1
1
2
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z 8PCS@
8PCS@
8PCS@
8PCS@
+1.5VS
DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7
DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7
VDD VDD VDD VDD VDD VDD VDD VDD VDD
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ
RV70
RV74
RV74
8PCS@
8PCS@
1U_0402_6.3V4Z
1U_0402_6.3V4Z
CV238
CV238
1
1
2
2
8PCS@
8PCS@
2
MDA35
E3
MDA32
F7
MDA38
F2
MDA34
F8
MDA37
H3
MDA36
H8
MDA39
G2
MDA33
H7
MDA43
D7
MDA44
C3
MDA40
C8
MDA45
C2
MDA42
A7
MDA46
A2
MDA41
B8
MDA47
A3
B2 D9 G7 K2 K8 N1 N9 R1 R9
A1 A8 C1 C9 D2 E9 F1 H2 H9
A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9
B1 B9 D1 D8 E2 E8 F9 G1 G9
12
8PCS@RV70
8PCS@
+VREFD_A3+VREFC_A3
12
1 CV212
CV212
0.1U_0402_16V4Z
0.1U_0402_16V4Z 2
8PCS@
8PCS@
CV239
CV239
CV227
CV227
1
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z 8PCS@
8PCS@
10U_0603_6.3V
10U_0603_6.3V
1
CV250
CV250
2
8PCS@
8PCS@
Group4
Group5
+1.5VS
+1.5VS
RV64
RV64 243_0402_1%
243_0402_1%
1
CV251
CV251
2
10U_0603_6.3V
10U_0603_6.3V
8PCS@
8PCS@
1
UV5
+VREFC_A4 +VREFD_A4
MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8
MAA9 MAA10 MAA11 MAA12
A_BA0 A_BA1 A_BA2
CLKA1 CLKA1# CKEA1
ODTA1 CSA1#_0 RASA1# CASA1# WEA1#
QSA6 QSA7
DQMA#6 DQMA#7
QSA#6 QSA#7
12
8PCS@
8PCS@
RV71
4.99K_0402_1%
4.99K_0402_1%
RV75
RV75
4.99K_0402_1%
4.99K_0402_1%
8PCS@
8PCS@
+1.5VS
8PCS@
8PCS@
10U_0603_6.3V
10U_0603_6.3V
1
CV245
CV245
CV244
CV244
2
10U_0603_6.3V
10U_0603_6.3V
8PCS@
8PCS@
8PCS@
8PCS@
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
M8 H1
N3
P7 P3
N2
P8
P2 R8 R2
T8 R3
L7 R7 N7
T3
M2 N8 M3
J7
K7
K9
K1
L2
J3
K3
L3
F3 C7
E7 D3
G3
B7
T2
L8
J1
L1
J9
L9 M7
T7
12
8PCS@RV71
8PCS@
12
1 CV213
CV213
0.1U_0402_16V4Z
0.1U_0402_16V4Z 2
8PCS@
8PCS@
1U_0402_6.3V4Z
1U_0402_6.3V4Z
CV240
CV240
1
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
8PCS@
8PCS@
8PCS@
8PCS@
1
2
Title
Title
Title
UV5
VREFCA VREFDQ
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13
BA0 BA1 BA2
CK CK CKE
ODT CS RAS CAS WE
DQSL DQSU
DML DMU
DQSL DQSU
RESET ZQ
NC NC NC NC
NC NC
96-BALL
96-BALL SDRAM DDR3
SDRAM DDR3
K4W2G1646B-HC12_FBGA96~D
K4W2G1646B-HC12_FBGA96~D
@
@
1U_0402_6.3V4Z
1U_0402_6.3V4Z
CV241
CV241
CV228
CV228
1
1
2
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
8PCS@
8PCS@
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
B2
VDD
D9
VDD
G7
VDD
K2
VDD
K8
VDD
N1
VDD
N9
VDD
R1
VDD
R9
VDD
A1
VDDQ
A8
VDDQ
C1
VDDQ
C9
VDDQ
D2
VDDQ
E9
VDDQ
F1
VDDQ
H2
VDDQ
H9
VDDQ
A9
VSS
B3
VSS
E1
VSS
G8
VSS
J2
VSS
J8
VSS
M1
VSS
M9
VSS
P1
VSS
P9
VSS
T1
VSS
T9
VSS
B1
VSSQ
B9
VSSQ
D1
VSSQ
D8
VSSQ
E2
VSSQ
E8
VSSQ
F9
VSSQ
G1
VSSQ
G9
VSSQ
12
RV72
8PCS@RV72
4.99K_0402_1%
4.99K_0402_1%
4.99K_0402_1%
4.99K_0402_1%
CV229
CV229
1
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z 8PCS@
8PCS@
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
8PCS@
12
RV80
RV80
8PCS@
8PCS@
1U_0402_6.3V4Z
1U_0402_6.3V4Z
CV242
CV242
CV243
CV243
1
1
2
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
8PCS@
8PCS@
401851
401851
401851
1
MDA48 MDA51 MDA55 MDA54 MDA50 MDA52 MDA49
MDA53
MDA63 MDA58 MDA60 MDA59 MDA61 MDA56 MDA62 MDA57
+1.5VS
+1.5VS
+VREFD_A4+VREFC_A4
1 CV214
CV214
0.1U_0402_16V4Z
0.1U_0402_16V4Z 2
8PCS@
8PCS@
CV230
CV230
1
2
8PCS@
8PCS@
41 53Wednesday, January 20, 2010
41 53Wednesday, January 20, 2010
41 53Wednesday, January 20, 2010
Group6
Group7
of
of
of
A
A
A
5
UV6
+VREFC_B1 +VREFD_B1 MDB20 MDB51
MAB0 MAB1 MAB2 MAB3 MAB4 MAB5 MAB6 MAB7 MAB8 MAB9 MAB10 MAB11 MAB12 MAB13 MAB13 MAB13 MAB13
B_BA0<40> B_BA1<40> B_BA2<40>
CLKB0<40> CLKB0#<40> CKEB0<40>
ODTB0<40> CSB0#_0<40> RASB0#<40> CASB0#<40> WEB0#<40>
QSB3 QSB1
DQMB#3 DQMB#1
QSB#3 QSB#1
12
RV85
RV85 243_0402_1%
243_0402_1%
4PCS@
4PCS@
RV89
RV89
4.99K_0402_1% 4PCS@
4.99K_0402_1% 4PCS@
RV97
RV97
4.99K_0402_1%
4.99K_0402_1% 4PCS@
4PCS@
1
CV289
CV289
2
1
CV299
CV299
4PCS@
4PCS@
2
CLKB0
CLKB0#
CLKB1
CLKB1#
MDB[0..63]
DRAM_RST#<40,41>
1 2
RV105 56_0402_1%
RV105 56_0402_1%
4PCS@
4PCS@
1 2
RV106 56_0402_1%
RV106 56_0402_1%
4PCS@
4PCS@
0.1U_0402_16V4Z 4PCS@
0.1U_0402_16V4Z 4PCS@
1 2
RV107 56_0402_1%
RV107 56_0402_1%
4PCS@
4PCS@
1 2
RV108 56_0402_1%
RV108 56_0402_1%
4PCS@
4PCS@
0.1U_0402_16V4Z
0.1U_0402_16V4Z
5
MDB[0..63]<40>
D D
C C
B B
A A
MAB[13..0]<40>
DQMB#[7..0]<40>
QSB[7..0]<40>
QSB#[7..0]<40>
UV6
M8
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
K1
ODT
L2
CS
J3
RAS
K3
CAS
L3
WE
F3
DQSL
C7
DQSU
E7
DML
D3
DMU
G3
DQSL
B7
DQSU
T2
RESET
L8
ZQ
J1
NC
L1
NC
J9
NC
L9
NC
M7
NC
T7
NC
K4W2G1646B-HC12_FBGA96~D
K4W2G1646B-HC12_FBGA96~D
+1.5VS +1.5VS +1.5VS +1.5VS +1.5VS +1.5VS +1.5VS +1.5VS
@
@
12
12
1 CV253
CV253
0.1U_0402_16V4Z
0.1U_0402_16V4Z 2
4PCS@
4PCS@
+1.5VS
1U_0402_6.3V4Z
1U_0402_6.3V4Z
CV261
CV261
1
1
2
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
4PCS@
4PCS@
4PCS@
4PCS@
4PCS@
4PCS@
96-BALL
96-BALL SDRAM DDR3
SDRAM DDR3
4.99K_0402_1% 4PCS@
4.99K_0402_1% 4PCS@
4.99K_0402_1%
4.99K_0402_1%
1U_0402_6.3V4Z
1U_0402_6.3V4Z
CV262
CV262
CV263
CV263
1
1
2
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
4PCS@
4PCS@
4PCS@
4PCS@
DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7
DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7
VDD VDD VDD VDD VDD VDD VDD VDD VDD
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ
CV264
CV264
1U_0402_6.3V4Z
1U_0402_6.3V4Z
4PCS@
4PCS@
+1.5VS
E3 F7 F2 F8 H3 H8 G2 H7
D7 C3 C8 C2 A7 A2 B8 A3
B2 D9 G7 K2 K8 N1 N9 R1 R9
A1 A8 C1 C9 D2 E9 F1 H2 H9
A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9
B1 B9 D1 D8 E2 E8 F9 G1 G9
12
RV90
RV90
12
RV98
RV98
4PCS@
4PCS@
1U_0402_6.3V4Z
1U_0402_6.3V4Z
CV265
CV265
CV266
CV266
1
1
2
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
4PCS@
4PCS@
10U_0603_6.3V
10U_0603_6.3V
CV291
CV291
4
UV7
CV268
CV268
4PCS@
4PCS@
1
2
4PCS@
4PCS@
1
2
M8
H1 N3
P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3
M2
N8
M3
J7 K7 K9
K1 L2 J3 K3 L3
F3 C7
E7 D3
G3
B7
T2 L8
J1 L1 J9 L9
M7
T7
12
12
4PCS@
4PCS@
1U_0402_6.3V4Z
1U_0402_6.3V4Z
CV269
CV269
1
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
4PCS@
4PCS@
UV7
VREFCA VREFDQ
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13
BA0 BA1 BA2
CK CK CKE
ODT CS RAS CAS WE
DQSL DQSU
DML DMU
DQSL DQSU
RESET ZQ
NC NC NC NC
NC NC
K4W2G1646B-HC12_FBGA96~D
K4W2G1646B-HC12_FBGA96~D
@
@
1
CV255
CV255
0.1U_0402_16V4Z
0.1U_0402_16V4Z 2
CV270
CV270
4PCS@
4PCS@
DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7
DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7
VDD VDD VDD VDD VDD VDD VDD VDD VDD
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ
96-BALL
96-BALL SDRAM DDR3
SDRAM DDR3
4.99K_0402_1%
4.99K_0402_1%
4.99K_0402_1%
4.99K_0402_1%
1U_0402_6.3V4Z
1U_0402_6.3V4Z
CV272
CV272
CV273
CV273
CV271
CV271
1
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
4PCS@
4PCS@
1
1
1
2
2
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
4PCS@
4PCS@
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
E3 F7 F2 F8 H3 H8 G2 H7
D7 C3 C8 C2 A7 A2 B8 A3
B2 D9 G7 K2 K8 N1 N9 R1 R9
A1 A8 C1 C9 D2 E9 F1 H2 H9
A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9
B1 B9 D1 D8 E2 E8 F9 G1 G9
RV92
RV100
RV100
4PCS@
4PCS@
CV274
CV274
390U_2.5V_M_R10
390U_2.5V_M_R10
MDB26 MDB28 MDB27 MDB29 MDB25 MDB30 MDB24 MDB31
MDB15 MDB10 MDB12 MDB11 MDB13 MDB9 MDB14 MDB8
+1.5VS +1.5VS
+1.5VS
1 CV254
CV254
0.1U_0402_16V4Z
0.1U_0402_16V4Z 2
4PCS@
4PCS@
CV267
CV267
1
2
1
CV293
CV293
2
10U_0603_6.3V
10U_0603_6.3V
4PCS@
4PCS@
4
+VREFC_B2 +VREFD_B2
MAB0
Group3
Group1
RV86
RV86 243_0402_1%
243_0402_1%
4PCS@
4PCS@
MAB1 MAB2 MAB3 MAB4 MAB5 MAB6 MAB7 MAB8 MAB9 MAB10 MAB11 MAB12
B_BA0 B_BA1 B_BA2
CLKB0 CLKB0# CKEB0
ODTB0 CSB0#_0 RASB0# CASB0# WEB0#
QSB2 QSB0
DQMB#2 DQMB#0
QSB#2 QSB#0
DRAM_RST# DRAM_RST# DRAM_RST#
12
4PCS@
4PCS@
RV91
RV91
4.99K_0402_1% 4PCS@
4.99K_0402_1% 4PCS@
RV99
RV99
4.99K_0402_1%
4.99K_0402_1% 4PCS@
4PCS@
+1.5VS
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
4PCS@
4PCS@
4PCS@
4PCS@
10U_0603_6.3V
10U_0603_6.3V
1
1
CV295
CV295
CV294
CV294
2
2
10U_0603_6.3V
10U_0603_6.3V
4PCS@
4PCS@
3
MDB19
4PCS@
4PCS@
3
MDB23
MDB18 MDB21 MDB17 MDB22 MDB16
MDB2 MDB6 MDB0 MDB5 MDB1 MDB7 MDB3 MDB4
+1.5VS
12
12
4PCS@RV92
4PCS@
4PCS@
4PCS@
CV193
CV193
UV8
+VREFC_B3 +VREFD_B3
MAB0
Group2
Group0
RV87
RV87 243_0402_1%
243_0402_1%
1 CV256
CV256
0.1U_0402_16V4Z
0.1U_0402_16V4Z 2
+1.5VS
1
+
+
2
MAB1 MAB2 MAB3 MAB4 MAB5 MAB6 MAB7 MAB8 MAB9 MAB10 MAB11 MAB12
B_BA0 B_BA1 B_BA2
CLKB1<40> CLKB1#<40> CKEB1<40>
ODTB1<40> CSB1#_0<40> RASB1#<40> CASB1#<40> WEB1#<40>
QSB4 QSB5
DQMB#4 DQMB#5
QSB#4 QSB#5
12
4PCS@
4PCS@
RV93
4.99K_0402_1%
4.99K_0402_1%
RV101
RV101
4.99K_0402_1%
4.99K_0402_1% 4PCS@
4PCS@
+1.5VS
1
+
+
CV290
CV290 330U_X_2VM_R6M
330U_X_2VM_R6M @
@
2
2008-09-25 2009-09-25
2008-09-25 2009-09-25
2008-09-25 2009-09-25
UV8
M8
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
K1
ODT
L2
CS
J3
RAS
K3
CAS
L3
WE
F3
DQSL
C7
DQSU
E7
DML
D3
DMU
G3
DQSL
B7
DQSU
T2
RESET
L8
ZQ
J1
NC
L1
NC
J9
NC
L9
NC
M7
NC
T7
NC
96-BALL
96-BALL SDRAM DDR3
SDRAM DDR3
K4W2G1646B-HC12_FBGA96~D
K4W2G1646B-HC12_FBGA96~D
Default
Default
12
@
@
4PCS@RV93
4PCS@
12
1 CV257
CV257
0.1U_0402_16V4Z
0.1U_0402_16V4Z 2
4PCS@
4PCS@
+1.5VS
1U_0402_6.3V4Z
1U_0402_6.3V4Z
CV275
CV275
CV287
CV287
1
1
2
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
4PCS@
4PCS@
4PCS@
4PCS@
Deciphered Date
Deciphered Date
Deciphered Date
1U_0402_6.3V4Z 4PCS@
4PCS@
4PCS@
4PCS@
RV94
4.99K_0402_1%
4.99K_0402_1%
RV102
RV102
4.99K_0402_1%
4.99K_0402_1% 4PCS@
4PCS@
1U_0402_6.3V4Z
1U_0402_6.3V4Z
CV276
CV276
1
2
4PCS@
4PCS@
2
DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7
DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7
VDD VDD VDD VDD VDD VDD VDD VDD VDD
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ
12
4PCS@RV94
4PCS@
12
1U_0402_6.3V4Z
1U_0402_6.3V4Z
CV277
CV277
CV278
CV278
1
1
2
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
4PCS@
4PCS@
4PCS@
4PCS@
+1.5VS
2
UV9
UV9
M8
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
K1
ODT
L2
CS
J3
RAS
K3
CAS
L3
WE
F3
DQSL
C7
DQSU
E7
DML
D3
DMU
G3
DQSL
B7
DQSU
T2
RESET
L8
ZQ
J1
NC
L1
NC
J9
NC
L9
NC
M7
NC
T7
NC
96-BALL
96-BALL SDRAM DDR3
SDRAM DDR3
K4W2G1646B-HC12_FBGA96~D
K4W2G1646B-HC12_FBGA96~D
@
@
RV96
4.99K_0402_1%
4.99K_0402_1%
RV104
RV104
4.99K_0402_1%
4.99K_0402_1% 4PCS@
4PCS@
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
CV281
CV281
CV282
CV282
CV283
1
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
4PCS@
4PCS@
CV292
CV292
10U_0603_6.3V
10U_0603_6.3V
CV283
1
1
1
2
2
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
4PCS@
4PCS@
4PCS@
4PCS@
4PCS@
4PCS@
1
2
4PCS@
4PCS@
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
Group4
Group5
RV88
RV88 243_0402_1%
243_0402_1%
RV95
RV103
RV103
4PCS@
4PCS@
1
CV297
CV297
2
10U_0603_6.3V
10U_0603_6.3V
4PCS@
4PCS@
+VREFC_B4 +VREFD_B4
MAB0 MAB1 MAB2 MAB3 MAB4 MAB5 MAB6 MAB7 MAB8 MAB9 MAB10 MAB11 MAB12
B_BA0 B_BA1 B_BA2
CLKB1 CLKB1# CKEB1
ODTB1 CSB1#_0 RASB1# CASB1# WEB1#
QSB6 QSB7
DQMB#6 DQMB#7
QSB#6 QSB#7
12
4PCS@
4PCS@
12
4PCS@RV95
4PCS@
12
1 CV259
CV259
0.1U_0402_16V4Z
0.1U_0402_16V4Z 2
4PCS@
4PCS@
+1.5VS
4PCS@
4PCS@
10U_0603_6.3V
10U_0603_6.3V
1
CV298
CV298
2
4PCS@
4PCS@
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
E3
MDB37
F7
MDB32
F2
MDB39
F8
MDB34
H3
MDB38
H8
MDB33
G2
MDB36
H7
MDB45
D7
MDB43
C3
MDB47
C8
MDB41
C2
MDB44
A7
MDB40
A2
MDB46
B8
MDB42
A3
+1.5VS
B2 D9 G7 K2 K8 N1 N9 R1 R9
+1.5VS +1.5VS
A1 A8 C1 C9 D2 E9 F1 H2 H9
A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9
B1 B9 D1 D8 E2 E8 F9 G1 G9
4.99K_0402_1%
4.99K_0402_1%
+VREFD_B3+VREFC_B3 +VREFD_B4+VREFC_B4+VREFC_B2 +VREFD_B2+VREFC_B1 +VREFD_B1
1 CV258
CV258
0.1U_0402_16V4Z
0.1U_0402_16V4Z 2
4PCS@
4PCS@
1
2
CV280
CV280
CV279
CV279
1
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
10U_0603_6.3V
10U_0603_6.3V
CV296
CV296 4PCS@
4PCS@
4.99K_0402_1%
4.99K_0402_1%
1
2
1
DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7
DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7
VDD VDD VDD VDD VDD VDD VDD VDD VDD
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ
12
4PCS@RV96
4PCS@
12
1 CV260
CV260
0.1U_0402_16V4Z
0.1U_0402_16V4Z 2
4PCS@
4PCS@
1U_0402_6.3V4Z
1U_0402_6.3V4Z
CV288
CV288
CV284
CV284
1
1
2
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
4PCS@
4PCS@
4PCS@
4PCS@
401851
401851
401851
1
MDB55MDB35
E3 F7
MDB54
F2
MDB48
F8
MDB53
H3
MDB49
H8
MDB52
G2
MDB50
H7
MDB56
D7
MDB59
C3
MDB63
C8
MDB62
C2
MDB57
A7
MDB61
A2
MDB58
B8
MDB60
A3
B2 D9 G7 K2 K8 N1 N9 R1 R9
A1 A8 C1 C9 D2 E9 F1 H2 H9
A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9
B1 B9 D1 D8 E2 E8 F9 G1 G9
CV286
CV286
CV285
CV285
1
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
42 53Wednesday, January 20, 2010
42 53Wednesday, January 20, 2010
42 53Wednesday, January 20, 2010
+1.5VS
of
of
of
Group6
Group7
A
A
A
5
GPU by the system BIOS GPU by VBIOS
GPIO22 = 0 (BIOS_ROM_EN = 0)
GPIO[13:11]
D D
0 0 0 0 0 1 0 1 0
C C
MEMORY SIZE
128MB 256MB 64MB
PCIE_OK<49>
GPIO22 = 1 (BIOS_ROM_EN = 1)
GPIO[13:11]
1 0 0
(M25P05A)
M9X@
M9X@
CV345
M9X@ CV345
M9X@
1 2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1 2
RV60 0_0402_5%M9X@ RV60 0_0402_5%M9X@
RV135
M9X@ RV135
M9X@ 100K_0402_5%
100K_0402_5%
2
G
G
12
QV1
QV1 AO3413_SOT23
AO3413_SOT23
S
S
G
G
2
M9X@ RV134
M9X@
1 2
13
D
D
S
S
4
GPU_GPIO0<36> GPU_GPIO1<36> GPU_GPIO2<36> SOUT_GPIO8<36> SIN_GPIO9<36>
ROMSE_GPIO22<36>
GPU_GPIO11<36> GPU_GPIO12<36> GPU_GPIO13<36>
R_VSYNC<17,36>
R_HSYNC<17,36> HSYNC_DAC2<36> VSYNC_DAC2<36>
100mA
D
D
13
CV322
M9X@ CV322
M9X@
1 2
0.01U_0402_25V7K
0.01U_0402_25V7K
RV134
47K_0402_5%
47K_0402_5%
QV2
M9X@
QV2
M9X@ SSM3K7002FU_SC70-3
SSM3K7002FU_SC70-3
+3VS_DELAY+3VS
1
CV346
CV346
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
@
@
GPU_GPIO0 GPU_GPIO1 GPU_GPIO2 SOUT_GPIO8 SIN_GPIO9
GPU_GPIO11 GPU_GPIO12 GPU_GPIO13
3
STRAPS
RV109 10K_0402_5%@RV109 10K_0402_5%@ RV110 10K_0402_5%@RV110 10K_0402_5%@ RV111 10K_0402_5%@RV111 10K_0402_5%@ RV112 10K_0402_5%@RV112 10K_0402_5%@ RV113 10K_0402_5%@RV113 10K_0402_5%@ RV114 10K_0402_5%@RV114 10K_0402_5%@
RV115 10K_0402_5%RV115 10K_0402_5% RV116 10K_0402_5%@RV116 10K_0402_5%@ RV117 10K_0402_5%@RV117 10K_0402_5%@
RV118 10K_0402_5%H@ RV118 10K_0402_5%H@ RV119 10K_0402_5%H@ RV119 10K_0402_5%H@ RV120 10K_0402_5%@RV120 10K_0402_5%@ RV121 10K_0402_5%@RV121 10K_0402_5%@
12 12 12 12 12 12
12 12 12
12 12 12 12
GPIO5_AC_BATT TEST
+3VS_DELAY
ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED, THEY MUST NOT CONFLICT DURING RESET
STRAPS
BIF_GEN2_EN_A
BIF_CLK_PM_EN
BIOS_ROM_EN
VIP_DEVICE_STRAP_ENA VSYNC_DAC2 IGNORE VIP DEVICE STRAPS
AUD[1]
RSVD
CONFIGURATION STRAPS
GPIO0 PCIE FULL TX OUTPUT SWINGTX_PWRS_ENB
GPIO1TX_DEEMPH_EN PCIE TRANSMITTER DE-EMPHASIS ENABLED
GPIO2
GPIO8
GPIO9 VGA Controller ENABLEDBIF_VGA DIS
GPIO_22_ROMCSB
GPIO[13:11]ROMIDCFG(2:0)
HSYNC VSYNCAUD[0]
HSYNC_DAC2
GENERICC 0RSVD
2
DESCRIPTION OF DEFAULT SETTINGSPIN
PCIE GNE2 ENABLED
BIF_CLK_PM_EN 0
Enable Extermal BIOS device
ROM Configurations
AUD[1] AUD[0] 0 0 No audio function 0 1 Audio for DisplayPort and HDMI if dongle is detected 1 0 Audio for DisplayPort only 1 1 Audio for both DisplayPort and HDMI
1
RECOMMENDED SETTINGS
0
0
0
0 (Enable)
0
010
0
1 1
0
AMD RESERVED CONFIGURATION STRAPS
ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED, THEY MUST NOT CONFLICT DURING RESET
HSYNC_DAC2
PULLUP PADS ARE NOT REQUIRED FOR THESE STRAPS BUT IF THESE GPIOS ARE USED, THEY MUST NOT CONFLICT DURING RESET
GPIO_28_TDO
GENERICC
GPIO21_BB_EN
+1.8VS
PJ6
PJ6
2
112
JUMP_43X118@
JUMP_43X118@
+3VS_DELAY+3VS
12
RV122
RV122 10K_0402_5%
10K_0402_5% @
@
B B
12
RV126
RV126 10K_0402_5%
10K_0402_5% @
@
12
RV123
RV123 10K_0402_5%
10K_0402_5% @
@
12
RV127
RV127 10K_0402_5%
10K_0402_5% @
@
12
RV124
RV124 10K_0402_5%
10K_0402_5% @
@
12
RV128
RV128 10K_0402_5%
10K_0402_5% @
@
VRAM_ID0 <36> VRAM_ID1 <36> VRAM_ID2 <36>
STRAPS
VRAM_ID[2:0]
PIN
DVPDATA (2,1,0)
GPU VRAM size Compal Part Number#
512M 64Mx16 (x4)
Park M2
512M 64Mx16 (x4)
1G 128Mx16 (x4)
1G 128Mx16 (x4)
1G 64Mx16 (x8)
Madison M2
1G 64Mx16 (x8)
2G 128Mx16 (x8)
2G 128Mx16 (x8)
Vendor Part Number#
HYN H5TQ1G63BFR-12C SA000032400
SAM K4W1G1646E-HC12 SA000035700
HYN
SA00003MQ00SAM K4W2G1646B-HC12
HYN H5TQ1G63BFR-12C SA000032400
SAM K4W1G1646E-HC12 SA000035700
HYN
SAM K4W2G1646B-HC12 SA00003MQ00
VRAM_ID 2,1,0
0 0 0
0 0 1
0 1 0 (Reserve)
0 1 1 (Reserve)
1 0 0
1 0 1
1 1 0 (Reserve)
1 1 1 (Reserve)
External VGA Thermal Sensor
+3VS
1 2
A A
GPU_THERMAL_D+<36>
GPU_THERMAL_D-<36>
RV130 0_0402_5%RV130 0_0402_5%
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2200P_0402_50V7K
2200P_0402_50V7K
5
CV301
CV301
1 2
CV300
CV300
1
UV11
2
UV11
1
VDD
2 3
SCLK
D+
SDATA
ALERT#
D­THERM#4GND
ADM1032ARMZ-2REEL_MSOP8
ADM1032ARMZ-2REEL_MSOP8
8 7 6 5
4
EC_SMB_CK2 <7,31> EC_SMB_DA2 <7,31> THERM#_VGA <36>
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2008-09-25 2009-09-25
2008-09-25 2009-09-25
2008-09-25 2009-09-25
UV1
UV1
M92 XTX
M92 XTX M92@
M92@
Deciphered Date
Deciphered Date
Deciphered Date
UV1
UV1
Madison
Madison MADISON@
MADISON@
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
Compal Electronics, Inc.
UV1
UV1
Park
Park PARK@
PARK@
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
401851
401851
401851
1
of
of
of
43 53Wednesday, January 20, 2010
43 53Wednesday, January 20, 2010
43 53Wednesday, January 20, 2010
A
A
A
A
B
C
D
PD1
PD1
N3
12
PR20
PR20
2.2M_0402_5%
2.2M_0402_5%
5 6
12
+1.0VS+1.0VSP
+VGA_CORE+VGA_COREP
VS
12
PR2
PR2
5.6K_0402_5%
12
5.6K_0402_5% 1 2
12
PR7
PR7 10K_0402_1%
10K_0402_1%
PR4
PR4
10K_0402_1%
10K_0402_1%
PACIN
ACIN <22,31,33>
PACIN <46>
Vin Detector
High 18.384 17.901 17.430 Low 17.728 17.257 16.976
PR13 1K_1206_5%
PR13 1K_1206_5%
1 2
PR14 1K_1206_5%
PR14 1K_1206_5%
1 2
12
PR23
PR23
12
10K_0402_1%
10K_0402_1%
PR25
@ PR25
@
66.5K_0402_1%
66.5K_0402_1%
PR16 1K_1206_5%
PR16 1K_1206_5%
1 2
12
RTCVREF
12
PR26
PR26 191K_0402_1%
191K_0402_1%
13
D
D
2
G
G
PQ2
PQ2
S
S
SSM3K7002FU_SC70-3
SSM3K7002FU_SC70-3
12
PR17
PR17 499K_0402_1%
499K_0402_1%
12
PR24
PR24 499K_0402_1%
499K_0402_1%
47K_0402_1%
47K_0402_1%
13
PQ3
PQ3 DTC115EUA_SC70-3
DTC115EUA_SC70-3
2
B+
PR27
PR27
Precharge detector
15.97V/14.84V FOR ADAPTOR
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
401851
D
12
PC11
PC11 1000P_0402_50V7K
1000P_0402_50V7K
PACIN
12
+5VALWP
44 53Wednesday, January 20, 2010
44 53Wednesday, January 20, 2010
44 53Wednesday, January 20, 2010
A
A
A
of
of
of
PL1
SMB3025500YA_2P
SMB3025500YA_2P
12
PC2
PC2
100P_0402_50V8J
100P_0402_50V8J
PR9
PR9
68_1206_5%
68_1206_5%
PJ2
PJ2
2
JUMP_43X118@
JUMP_43X118@ PJ4
PJ4
2
JUMP_43X118@
JUMP_43X118@
PJ7
PJ7
2
JUMP_43X118@
JUMP_43X118@ PJ19
PJ19
2
JUMP_43X118@
JUMP_43X118@
PJ10
PJ10
2
JUMP_43X79@
JUMP_43X79@
PJ13
PJ13
2
JUMP_43X79@
JUMP_43X79@
PL1
1 2
VIN
1 2 12
13
12
112
112
112
112
112
112
12
PD2
PD2 RLS4148_LL34-2
RLS4148_LL34-2
12
PR10
PR10 68_1206_5%
68_1206_5%
PC8
PC8
0.1U_0603_25V7K
0.1U_0603_25V7K
+1.5V+1.5VP
B
PC3
PC3 1000P_0402_50V7K
1000P_0402_50V7K
RTC Battery
-+
SP093MX0000
PF1
10A_125V_451010MRL
10A_125V_451010MRL
PD3
PD3
RLS4148_LL34-2
RLS4148_LL34-2
PR11
PR11
200_0603_5%
200_0603_5%
1 2
PR12
PR12
100K_0402_1%
100K_0402_1%
1 2
PR15
PR15
22K_0402_1%
22K_0402_1%
3.3V
12
PC9
PC9 10U_0805_10V4Z
10U_0805_10V4Z
PF1
21
12
12
12
PU2 G920AT24U_SOT89-3
PU2 G920AT24U_SOT89-3
3
OUT
GND
DC_IN_S2
12
PC1
PC1 1000P_0402_50V7K
1000P_0402_50V7K
PQ1
PQ1 TP0610K-T1-E3_SOT23-3
TP0610K-T1-E3_SOT23-3
N1
PC7
PC7
0.22U_0603_25V7K
0.22U_0603_25V7K
IN
1
+1.1VALWP +1.1VALW
2
N2
2
12
PR18
PR18 200_0603_5%
200_0603_5%
12
PC10
PC10
1U_0805_25V4Z
1U_0805_25V4Z
DC30100A700
PJP1
PJP1
1
1 1
2 2
+CHGRTC
3 3
+3VALWP +3VALW
+
2
+
3
-
4
-
SINGA_2DW-0005-B03@
SINGA_2DW-0005-B03@
51_ON#<33>
PR21
PR21
560_0603_5%
560_0603_5%
1 2
PJ1
PJ1
2
JUMP_43X118@
(5A,200mils, Via NO.= 10)
JUMP_43X118@
BATT+
CHGRTCP
PR22
PR22
560_0603_5%
560_0603_5%
1 2
112
DC_IN_S1
RTCVREF
OCP(min) = 7.7A
PJ5
PJ5
+5VALWP
+VSBP +VSB
2
112
JUMP_43X118@
(5A,200mils, Via NO.= 10) OCP(min) = 7.9A
JUMP_43X118@
PJ8
PJ8
2
112
JUMP_43X39@
JUMP_43X39@
+5VALW
(120mA,40mils, Via NO.= 1)
PJ11
PJ11
2
4 4
(1A,40mils, Via NO.= 2)
112
JUMP_43X79@
JUMP_43X79@
+0.75VS+0.75VSP
(12A,480mils, Via NO.= 24) OCP(min) = 18.7A
(11A,440mils ,Via NO.= 22) OCP(min) = 19.16A
+1.8VSP +1.8VS
(2.5A,100mils, Via NO.= 5)
+1.05VSP +1.05VS
(1.5A,60mils, Via NO.= 3)
A
VIN
12
PC4
PC4 100P_0402_50V8J
100P_0402_50V8J
PC5
PC5
0.068U_0402_10V6K
0.068U_0402_10V6K
VS
PBJ1
PBJ1
MAXEL_ML1220T10@
MAXEL_ML1220T10@
+3VLP +3VL
+2.5VSP +2.5VS
+VDDNBP +VDDNB
+RTCBATT
12
PJ3
PJ3
2
JUMP_43X39@
(100mA,40mils ,Via NO.= 2)
(1A,40mils ,Via NO.= 2)
(4A,160mils ,Via NO.= 8)
JUMP_43X39@
PJ9
PJ9
2
JUMP_43X39@
JUMP_43X39@
PJ12
PJ12
2
JUMP_43X79@
JUMP_43X79@
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
+RTCBATT
112
112
112
VIN
12
PR3
PR3
84.5K_0402_1%
84.5K_0402_1% PR5
PR5
22K_0402_1%
22K_0402_1% 1 2
12
VL
RB715F_SOT323-3
RB715F_SOT323-3
2 3
1000P_0402_50V7K
1000P_0402_50V7K
PC6
PC6 .1U_0402_16V7K
.1U_0402_16V7K
100K_0402_1%
100K_0402_1%
1 2
PD5
PD5
12
12
PR6
PR6 20K_0402_1%
20K_0402_1%
EN0<47>
ACON<46>
(2.5A,100mils, Via NO.= 5)
(20A,800mils ,Via NO.= 40) OCP(min) = 20.14A
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
C
10K_0402_1%
10K_0402_1%
PR19
PR19
PC12
PC12
3 2
PR8
PR8
VIN
1
2
2
2
PR1
PR1
1M_0402_1%
1M_0402_1%
1 2
N1
8
PU1A
PU1A
P
+
O
-
G
LM393DG_SO8
LM393DG_SO8
4
12
7
12
PJ18
PJ18
JUMP_43X79@
JUMP_43X79@
PJ20
PJ20
JUMP_43X118@
JUMP_43X118@ PJ21
PJ21
JUMP_43X118@
JUMP_43X118@
1
GLZ4.3B_LL34-2
GLZ4.3B_LL34-2
RTCVREF
3.3V
PD4
PD4
RLS4148_LL34-2
RLS4148_LL34-2
LM393DG_SO8
LM393DG_SO8
8
PU1B
PU1B
P
+
O
-
G
4
PC13
PC13
1000P_0402_50V7K
1000P_0402_50V7K
112
112
112
2009/9/252008/9/25
2009/9/252008/9/25
2009/9/252008/9/25
A
B
C
D
PH1 under CPU botten side :
CPU thermal protection at 95 degree C Recovery at 56 degree C
VMB
PL2
PF2
1 1
2 2
PJP2
PJP2
10 11 12 13
SUYIN_200045MR009G171ZR
SUYIN_200045MR009G171ZR
@
@
GND GND GND GND
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
BATT_S1
BATT_P3 BATT_P4
BATT_P5 EC_SMDA EC_SMCA
100_0402_1%
100_0402_1%
PR38
PR38
1 2
PR28
PR28
1K_0402_1%
1K_0402_1%
12
PR32
PD8
PD8
@
@
2 3
PJSOT24C_SOT23-3
PJSOT24C_SOT23-3
12
PR40
PR40 1K_0402_1%
1K_0402_1%
PR32 1K_0402_1%
1K_0402_1%
PR37
PR37
6.49K_0402_1%
6.49K_0402_1%
1
PD6
@PD6
@
PJSOT24C_SOT23-3
PJSOT24C_SOT23-3
2
3
PR39
PR39 100_0402_1%
100_0402_1%
1 2
1 2
15A_65V_451015MRL
15A_65V_451015MRL
1 2
47K_0402_1%
47K_0402_1%
1
12
PF2
PR29
PR29
21
+3VLP
+3VLP
BATT_TEMPA <31>
EC_SMB_DA1 <31>
EC_SMB_CK1 <31>
PL2
SMB3025500YA_2P
SMB3025500YA_2P
1 2
12
PC14
PC14 1000P_0402_50V7K
1000P_0402_50V7K
BATT+
12
PC15
PC15
0.01U_0402_25V7K
0.01U_0402_25V7K
Rset = 3 * Rtmh Rhyst = (Rset* Rtml) / (3*Rtml - Rset)
Rtmh at 95C = 6.64K, Rtml at 57C = 25.1K Rset = 3 * 6.64K = 19.92K ==> 19.6K Rhyst = (20K * 25.1K) / (3 * 25.1K - 20K) = 9.078K ==> 9.09K
VL
12
PC16
PC16
0.1U_0603_25V7K
0.1U_0603_25V7K
PU3
PU3
1
VCC
TMSNS1
2
GND
RHYST1
VS_ON<47>
3
OT1
TMSNS2
4
RHYST2
OT2
G718TM1U_SOT23-8
G718TM1U_SOT23-8
PR30
PR30
19.6K_0402_1%
19.6K_0402_1%
8 7 6 5
12
PH2
PH2 100K_0402_1%_NCP15WF104F03RC
100K_0402_1%_NCP15WF104F03RC
1 2
PR34
PR34
7.87K_0402_1%
7.87K_0402_1%
1 2
12
PR31
PR31
19.6K_0402_1%
19.6K_0402_1%
PR33
PR33
8.66K_0402_1%
8.66K_0402_1%
1 2
12
PH1
PH1 100K_0402_1%_NCP15WF104F03RC
100K_0402_1%_NCP15WF104F03RC
PQ6
PQ6
TP0610K-T1-E3_SOT23-3
TP0610K-T1-E3_SOT23-3
B+
3 3
PR45
PR45
22K_0402_1%
2
G
G
PC22 @ PC22
@
.1U_0402_16V7K
.1U_0402_16V7K
22K_0402_1%
1 2
13
D
D
PQ7
PQ7 SSM3K7002FU_SC70-3
SSM3K7002FU_SC70-3
S
S
VL
PR47
PR47
100K_0402_1%
100K_0402_1%
POK<47,48>
4 4
A
1 2
PR48
PR48 0_0402_5%
0_0402_5%
1 2
12
12
PR43
PR43
100K_0402_1%
100K_0402_1%
12
PC19
@PC19
@
0.22U_0603_25V7K
0.22U_0603_25V7K
B
13
2
+VSBP
12
PC20 @ PC20
@
0.1U_0603_25V7K
0.1U_0603_25V7K
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
PH2 near main Battery CONN :
BAT. thermal protection at 95 degree C Recovery at 48 degree C
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
C
2009/9/252008/9/25
2009/9/252008/9/25
2009/9/252008/9/25
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
401851
D
45 53Wednesday, January 20, 2010
45 53Wednesday, January 20, 2010
45 53Wednesday, January 20, 2010
of
of
of
A
A
A
A
PQ9
PQ9
AO4407A_SO8
AO4407A_SO8
8
DTA144EUA_SC70-3
DTA144EUA_SC70-3
12
PR52
PR52 47K_0402_1%
47K_0402_1%
2
13
D
D
PQ17
PQ17 SSM3K7002FU_SC70-3
SSM3K7002FU_SC70-3
S
S
7 5
PQ13
PQ13
2
13
PACIN
DTC115EUA_SC70-3
DTC115EUA_SC70-3
ACOFF
VIN
1 1
2
G
G
2 2
PACIN<44> ACON<44>
ACOFF<31>
3 3
CP mode
Vaclim=2.39*(Rb//152K/(Rt//152K+Rb//152K)) Iinput=(1/PR49)((0.05*Vaclm)/2.39+0.05)
where Vaclm=1.09986V, Iinput=3.65A Vaclm=0.7717V, Iinput=4.41A Vaclm=0.4204V, Iinput=5.88A
4
PQ15
PQ15 DTC115EUA_SC70-3
DTC115EUA_SC70-3
PR68
PR68
22K_0402_5%
22K_0402_5%
1 2
PQ22
PQ22
2
1 2 36
1 3
P2
12
12
PC26
PC26
0.1U_0603_25V7K
0.1U_0603_25V7K
12
13
2
G
G
13
1 2 3 6
PR50
PR50 200K_0402_1%
200K_0402_1%
PR59
PR59 150K_0402_1%
150K_0402_1%
D
D
PQ20
PQ20 SSM3K7002FU_SC70-3
SSM3K7002FU_SC70-3
S
S
IREF<31>
4
5600P_0402_25V7K
5600P_0402_25V7K
154K_0402_1%
154K_0402_1%
120K_0402_1%
120K_0402_1%
PQ10
PQ10
AO4407A_SO8
AO4407A_SO8
8 7
5
PC25
PC25
FSTCHG<31>
0.01U_0402_25V7K
0.01U_0402_25V7K
PR71
PR71
12
PR73
PR73
1 2
12
PC42
PC42
1 2
1SS355_SOD323-2
1SS355_SOD323-2
.1U_0402_16V7K
.1U_0402_16V7K
PC35
PC35
PC37 .1U_0402_16V7K
PC37 .1U_0402_16V7K
ADP_I<31>
12
0.01U_0402_25V7K
0.01U_0402_25V7K
P3
100K_0402_1%
100K_0402_1%
1 2
10K_0402_1%
10K_0402_1%
1 2
PC28
PC28
PC33 6800P_0402_25V7K
PC33 6800P_0402_25V7K
PR64 6.81K_0402_1%
PR64 6.81K_0402_1%
1 2
100P_0402_50V8J@
100P_0402_50V8J@
CHGVADJ<31>
(75W) Iin = 2.512 ADP_I (120W) Iin = 3.35 ADP_I Vin = 7.57 ADP_V
P3
PR53
PR53
PD12
PD12
PR57
PR57
1 2
1 2
PC36
PC36
6251VREF
15.4K_0402_1%
15.4K_0402_1% 1 2
PR49
PR49
0.015_2512_1%
0.015_2512_1%
1 2
12
12
1 2
PR72
PR72
8.25K_0402_1%
8.25K_0402_1%
1 2
PR75
PR75
26.7K_0402_1%
26.7K_0402_1%
PR76
PR76
PR77
PR77
31.6K_0402_1%
31.6K_0402_1%
6251VDD
12
B
PC164
PC164
10U_1206_25V6M
10U_1206_25V6M
B+
4 3
PQ12 TP0610K-T1-E3_SOT23-3
PQ12 TP0610K-T1-E3_SOT23-3
13
PR55
PR55
100K_0402_1%
100K_0402_1%
2
12
PC27
PC27
PR60
PR60
100K_0402_1%
100K_0402_1%
6251_EN CSON
PR66
PR66
47K_0402_1%
47K_0402_1%
1 2
6251VREF
6251aclim
12
VADJ
12
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
PU4
PU4
1
VDD
2
ACSET
3
EN
4
CELLS
5
ICOMP
6
VCOMP
7
ICM
8
VREF
9
CHLIM
10
ACLIM
11
VADJ
12
GND
ISL6251AHAZ-T_QSOP24
ISL6251AHAZ-T_QSOP24
GLZ4.3B_LL34-2
GLZ4.3B_LL34-2
12
1 2
12
PD15
@ PD15
@
10U_1206_25V6M
10U_1206_25V6M
10U_1206_25V6M
10U_1206_25V6M
PR51
PR51
10_0603_5%
10_0603_5%
DCIN
ACPRN
CSON
CSOP
CSIN
CSIP
PHASE
UGATE
BOOT
VDDP
LGATE
PGND
PC163
PC163
1 2
PC162
PC162
1 2
PQ14
PQ14
13
DTC115EUA_SC70-3
DTC115EUA_SC70-3
24
23
22
21
20
19
18
17
BST_CHG
16
15
DL_CHG
14
13
PR78
PR78
309K_0402_1%
309K_0402_1%
12
47K_0402_1%
47K_0402_1%
DCIN
2
1
0.1U_0603_25V7K
0.1U_0603_25V7K
DCIN
PC30
PC30
0.047U_0603_16V7K
0.047U_0603_16V7K
1 2
PC34
PC34
0.1U_0603_25V7K
0.1U_0603_25V7K
1 2
LX_CHG
DH_CHG
2.2_0603_5%
2.2_0603_5% 1 2
6251VDDP
VIN
12
12
PR80
PR80
PJ22
PJ22
2
112
JUMP_43X79@
JUMP_43X79@
PD10
PD10
FSTCHG
2 3
RB715F_SOT323-3
RB715F_SOT323-3
PC29
PC29
12
PR61
PR61
20_0603_5%
20_0603_5%
1 2
1 2
PR62
PR62
20_0603_5%
20_0603_5%
PR63
PR63
20_0603_5%
20_0603_5%
1 2
PR65
PR65
2.2_0603_5%
2.2_0603_5%
PR70
PR70
BST_CHGA 12
PC43
PC43
1 2
4.7U_0805_6.3V6K
4.7U_0805_6.3V6K
12
.1U_0402_16V7K
.1U_0402_16V7K
0.1U_0603_25V7K
0.1U_0603_25V7K
PD14
PD14 RB751V-40TE17_SOD323-2
RB751V-40TE17_SOD323-2
1 2
PR74
PR74
4.7_0603_5%
4.7_0603_5%
PC44
PC44
C
CSIN
CSIP
PC23
PC23
10U_1206_25V6M
10U_1206_25V6M
SUSP# <28,31,34,49,51>
CSOP
12
PC38
PC38
12
6251VDD
PR79
PR79
10K_0402_1%
10K_0402_1% 1 2
12
PC24
PC24
12
10U_1206_25V6M
10U_1206_25V6M
578
578
ADP_V <31>
CHG_B+
DTC115EUA_SC70-3
DTC115EUA_SC70-3
3 6
241
3 6
241
PR56
PR56
10K_0402_1%
10K_0402_1%
PQ16
PQ16
PQ19
PQ19 AO4466_SO8
AO4466_SO8
10U_LF919AS-100M-P3_4.5A_20%
10U_LF919AS-100M-P3_4.5A_20%
12
PR69
@PR69
@
4.7_1206_5%
4.7_1206_5%
PQ21
PQ21
12
AO4466_SO8
AO4466_SO8
PC41
@PC41
@
680P_0603_50V7K
680P_0603_50V7K
47K_0402_1%
47K_0402_1%
1 2 13
PL4
PL4
1 2
1 2 3 6
4
1 2 3 6
4
PR54
PR54
1 2
PD11
PD11
1 2
1SS355_SOD323-2
1SS355_SOD323-2
PD13
PD13
1 2
2
1SS355_SOD323-2
1SS355_SOD323-2
PC32
PC32
0.1U_0603_25V7K
0.1U_0603_25V7K
PR67
PR67
0.02_1206_1%
0.02_1206_1%
CHG
1 2
D
PQ8
PQ8
AO4407A_SO8
AO4407A_SO8
PQ11
PQ11
AO4407A_SO8
AO4407A_SO8
VIN
ACOFF
PR58
PR58
200K_0402_1%
200K_0402_1%
1 2
12
4 3
8 7
5
8 7
5
VIN
13
D
D
PACIN
2
G
G
PQ18
PQ18
S
S
SSM3K7002FU_SC70-3
SSM3K7002FU_SC70-3
PC39
PC39
10U_1206_25V6M
10U_1206_25V6M
90W 4407A*1 120W 4407A*2
BATT+
12
12
PC40
PC40
10U_1206_25V6M
10U_1206_25V6M
CC=0.25A~3A IREF=0.9133*Icharge IREF=0.228V~2.74V VCHLIM need over 95mV
4 4
CELLS
VDD
CELL number 4
CHGVADJ=(Vcell-4)*9.445
Vcell CHGVADJ 4V
4.2V
4.35V
GND Float
32
A
0V
1.898V
3.315V
Iada=0~3.947A(75W) CP=3.63A Iada=0~4.737A(90W) Iada=0~6.316A(120W)
CP=4.36A CP=5.81A
CP= 92%*Iada
B
PR49=0.02, PR72=75k, PR75=20kIada=0~3.421A(65W) CP=3.15A PR49=0.02, PR72=24k, PR75=20k PR49=0.015, PR72=53.6k, PR75=20k PR49=0.015, PR72=8.25k, PR75=26.7k
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2008/9/25 2009/9/25
2008/9/25 2009/9/25
2008/9/25 2009/9/25
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
C
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
401851
401851
401851
D
46 53Wednesday, January 20, 2010
46 53Wednesday, January 20, 2010
46 53Wednesday, January 20, 2010
of
of
of
A
A
A
5
4
3
2
1
AO4712 Rds(on) = 15/18
Ipeak = 5A
PL6
PL6
1 2
@ PR89
@
4.7_1206_5%
4.7_1206_5%
@ PC57
@
680P_0603_50V7K
680P_0603_50V7K
2
G
G
Imax = 3.5A F = 305K
PQ24
PQ24 AO4466_SO8
AO4466_SO8
12
PR89
12
PC57
13
D
D
PQ28
PQ28
2
G
SSM3K7002FU_SC70-3
G
SSM3K7002FU_SC70-3
S
S
3 6
241
3 6
241
578
578
PQ25
PQ25 AO4712_SO8
AO4712_SO8
ENTRIP2ENTRIP1
.1U_0402_16V7K
.1U_0402_16V7K
499K_0402_1%
499K_0402_1%
B+
PC52
PC52
4.7U_0805_10V6K
4.7U_0805_10V6K
PC53
PC53
1 2
PR91
PR91
1 2
12
+3VLP
EN0<44>
PR92 PR92
PR87
PR87
1 2
0_0603_5%
0_0603_5%
12
100K_0402_1%
100K_0402_1%
D D
B++
PJ24
PJ24
2
B+
C C
112
JUMP_43X118@
JUMP_43X118@
12
PC49
PC49
PC50
PC50
2200P_0402_50V7K
2200P_0402_50V7K
12
PC51
PC51
4.7U_0805_25V6-K
4.7U_0805_25V6-K
12
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7UH_SIL104R-4R7PF_5.7A_30%
4.7UH_SIL104R-4R7PF_5.7A_30%
+3VALWP
1
+
+
PC55
PC55
2
220U_6.3VM_R15
220U_6.3VM_R15
Total capacitor 220uF
B B
ESR = 15mohm
13
D
D
PQ27
SSM3K7002FU_SC70-3
SSM3K7002FU_SC70-3
PQ27
S
S
BST_3V UG_3V LX_3V LG_3V
12
PC59 @ PC59
@
1U_0402_6.3V6K
1U_0402_6.3V6K
2VREF_51125
PR81
PR81
13K_0402_1%
13K_0402_1%
1 2
PR83
PR83
20K_0402_1%
20K_0402_1%
1 2
PR85
PR85
150K_0402_1%
150K_0402_1%
1 2
PU5
PU5
25
P PAD
7
VO2
8
VREG3
9
BOOT2
10
UGATE2
11
PHASE2
12
LGATE2
2VREF_51125
12
PC45
PC45
0.22U_0603_10V7K
0.22U_0603_10V7K
ENTRIP2
6
5
FB2
ENTRIP2
SKIPSEL
EN
14
13
1 2
PR93
PR93
0_0402_5%@
0_0402_5%@
B++
Ipeak = 5A Imax = 3.5A F = 245K
PR82
PR82
30K_0402_1%
30K_0402_1%
1 2
PR84
PR84
19.1K_0402_1%
19.1K_0402_1%
1 2
PR86
PR86
150K_0402_1%
150K_0402_1%
ENTRIP1
1 2
3
1
2
4
FB1
REF
TONSEL
15
ENTRIP1
24
VO1
23
PGOOD
BOOT1 UGATE1 PHASE1
LGATE1
NC18VREG5
VIN16GND
17
12
PC60
PC60
BST_5V
22
UG_5V
21
LX_5V
20
LG_5V
19
RT8205EGQW_WQFN24_4X4
RT8205EGQW_WQFN24_4X4
VL
PC46
PC46
PR88
PR88
1 2
0_0603_5%
0_0603_5%
B++
12
PC47
PC47
4.7U_0805_25V6-K
4.7U_0805_25V6-K
2200P_0402_50V7K
2200P_0402_50V7K
POK <45,48>
PC54
PC54
.1U_0402_16V7K
.1U_0402_16V7K
1 2
12
12
PC48
PC48
4.7U_0805_25V6-K
4.7U_0805_25V6-K
AO4712_SO8
AO4712_SO8
PQ26
PQ26
578
PQ23
PQ23
AO4466_SO8
AO4466_SO8
3 6
241
PL7
PL7
4.7UH_SIL104R-4R7PF_5.7A_30%
4.7UH_SIL104R-4R7PF_5.7A_30%
1 2
578
3 6
12
PR90
@ PR90
@
4.7_1206_5%
4.7_1206_5%
12
PC58
@ PC58
@ 680P_0603_50V7K
241
680P_0603_50V7K
1
+
+
2
+5VALWP
PC56
PC56
220U_6.3VM_R15
220U_6.3VM_R15
Total capacitor 220uF ESR = 15mohm
12
4.7U_0805_10V6K
4.7U_0805_10V6K
PC61
PC61
0.1U_0603_25V7K
0.1U_0603_25V7K
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
Wednesday, January 20, 2010
Wednesday, January 20, 2010
Wednesday, January 20, 2010
401851
1
47 53
47 53
47 53
of
of
of
A
A
A
VL
100K_0402_1%
100K_0402_1%
VS_ON<45>
1 2
VS
PR95
5
PR95
100K_0402_1%
100K_0402_1%
A A
PR94
PR94
12
PR96
PR96
42.2K_0402_1%
42.2K_0402_1%
12
13
D
D
PQ29
PQ29
2
G
SSM3K7002FU_SC70-3
G
SSM3K7002FU_SC70-3
S
S
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2008/9/25 2009/9/25
2008/9/25 2009/9/25
2008/9/25 2009/9/25
3
5
D D
PR98
PR98
0_0402_5%
0_0402_5%
1 2
POK<45,47>
+5VALW
C C
SYSON<31,34>
B B
+5VALW
A A
PR101
PR101
100_0603_1%
100_0603_1%
1 2
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
PR106
PR106
1 2
0_0402_5%
0_0402_5%
PR109
PR109
100_0603_1%
100_0603_1%
1 2
PC76
PC76
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
PC67
PC67
12
12
PC64
@PC64
@
.1U_0402_16V7K
.1U_0402_16V7K
12
PC73
@ PC73
@ .1U_0402_16V7K
.1U_0402_16V7K
12
12
PC70
@ PC70
@ 47P_0402_50V8J
47P_0402_50V8J
1 2
PR103
PR103
4.75K_0402_1%
4.75K_0402_1% 1 2
12
PR104
PR104 10K_0402_1%
10K_0402_1%
PC79
@PC79
@
47P_0402_50V8J
47P_0402_50V8J
1 2
PR111
PR111
10K_0402_1%
10K_0402_1%
1 2
PR112
PR112 10K_0402_1%
10K_0402_1%
4
PR97
PR97
255K_0402_1%
255K_0402_1%
1 2
1
TON VOUT VDD FB PGOOD
15
NC
EN/DEM
GND7PGND
8
PR105
PR105
255K_0402_1%
255K_0402_1%
1 2
1
14
15
NC
EN/DEM
GND7PGND
RT8209BGQW_WQFN14_3P5X3P5
RT8209BGQW_WQFN14_3P5X3P5
8
PU6
PU6
2 3 4 5 6
PU7
PU7
2
TON
3
VOUT
4
VDD
5
FB
6
PGOOD
PR99
PR99
0_0603_5%
0_0603_5%
1 2
14
DH_1.1V
13
BOOT
UGATE PHASE
CS
VDDP
LGATE
RT8209BGQW_WQFN14_3P5X3P5
RT8209BGQW_WQFN14_3P5X3P5
BOOT
UGATE PHASE
CS
VDDP
LGATE
12 11 10 9
PR107
PR107
0_0603_5%
0_0603_5%
1 2
13 12 11
1 2
6.19K_0402_1%
6.19K_0402_1%
10 9
LX_1.1V
1 2
PR102
PR102
6.19K_0402_1%
6.19K_0402_1% DL_1.1V
BST_1.5V DH_1.5V LX_1.5V
PR110
PR110
DL_1.5V
BST_1.1V
0.1U_0603_25V7K
0.1U_0603_25V7K
+5VALW
1 2
0.1U_0603_25V7K
0.1U_0603_25V7K
+5VALW
1 2
12
PC65
PC65
12
PC69
PC69
4.7U_0805_10V6K
4.7U_0805_10V6K
PC74
PC74
PC78
PC78
4.7U_0805_10V6K
4.7U_0805_10V6K
3
PJ25
PJ25
2
JUMP_43X118@
JUMP_43X118@
12
PC63
PC63
4.7U_0805_25V6-K
4.7U_0805_25V6-K
PC66
PC66
PJ26
PJ26
2
JUMP_43X118@
JUMP_43X118@
PC72
PC72
4.7U_0805_25V6-K
4.7U_0805_25V6-K
PC75
PC75
220U_6.3VM_R15
220U_6.3VM_R15
5
4
4
5
4
123
4
123 5
1.1V_B+
12
PC62
PC62
4.7U_0805_25V6-K
4.7U_0805_25V6-K
PQ30
PQ30
TPCA8030-H_SOP-ADV8-5
TPCA8030-H_SOP-ADV8-5
123
PQ31
PQ31
TPCA8028-H_SOP-ADVANCE8-5
TPCA8028-H_SOP-ADVANCE8-5
123 5
PQ32
PQ32
TPCA8030-H_SOP-ADV8-5
TPCA8030-H_SOP-ADV8-5
1UH_FDUE1040D-1R0M-P3_21.3A_20%
1UH_FDUE1040D-1R0M-P3_21.3A_20%
PQ33
PQ33
TPCA8028-H_SOP-ADVANCE8-5
TPCA8028-H_SOP-ADVANCE8-5
PL9
PL9
1UH_FDUE1040D-1R0M-P3_21.3A_20%
1UH_FDUE1040D-1R0M-P3_21.3A_20%
1 2
12
PR100
4.7_1206_5%
4.7_1206_5%
@PR100
@
12
PC68 @ PC68
@
680P_0603_50V7K
680P_0603_50V7K
1.5V_B+
12
12
PC71
PC71
4.7U_0805_25V6-K
4.7U_0805_25V6-K
PL11
PL11
1 2
12
PR108
@ PR108
@
4.7_1206_5%
4.7_1206_5%
12
PC77 @ PC77
@
680P_0603_50V7K
680P_0603_50V7K
220U_6.3VM_R15
220U_6.3VM_R15
1
+
+
2
2
B+
112
+1.1VALWP
(+1.1VALW, +1.1VS, NB_CORE)
1
+
+
2
B+
112
+1.5VP
PJ14
PJ14
+3VS
112
JUMP_43X39@
JUMP_43X39@
Ipeak = 12A Imax = 8.4A F = 315K
Total capacitor 880uF ESR = 5mohm
Ipeak = 11A Imax = 7.7A F = 315K
Total capacitor 1390uF ESR = 2.73mohm
APL5508-25DC-TRL_SOT89-3
APL5508-25DC-TRL_SOT89-3
2
PC80
PC80
1U_0603_10V6K
1U_0603_10V6K
2
IN
12
1
PU8
PU8
GND
3
OUT
1
12
PC81
PC81
4.7U_0805_6.3V6K
4.7U_0805_6.3V6K
+2.5VSP
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2008/9/25 2009/9/25
2008/9/25 2009/9/25
2008/9/25 2009/9/25
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
2
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
401851
48 53Wednesday, January 20, 2010
48 53Wednesday, January 20, 2010
48 53Wednesday, January 20, 2010
1
A
A
A
of
of
of
5
D D
+1.5V
1
PJ15
PJ15
1
JUMP_43X79@
JUMP_43X79@
2
2 12
PR194
@PR194
@
10K_0402_1%
10K_0402_1%
PR195
PR195
10K_0402_1%
10K_0402_1%
PC90
@PC90
@
+5VALW
12
12
12.4K_0402_1%
12.4K_0402_1%
12
2
G
G
PC84
PC84
4.7U_0805_6.3V6K
4.7U_0805_6.3V6K
VDDR_SW<22>
C C
VR_ON#<34>
PR115
PR115
0_0402_5%
0_0402_5%
1 2
.1U_0402_16V7K
.1U_0402_16V7K
12
PR193
PR193
PQ48
PQ48
13
D
D
2
G
G
S
S
SSM3K7002FU_SC70-3
SSM3K7002FU_SC70-3
13
D
D
PR117
PR117
10.5K_0402_1%
10.5K_0402_1%
PQ4
PQ4
S
S
SSM3K7002FU_SC70-3
SSM3K7002FU_SC70-3
12
PR113
PR113
4.42K_0402_1%
4.42K_0402_1%
12
VDDR_SW
HIGH 1.05V
12
PC86
PC86
.1U_0402_16V7K
.1U_0402_16V7K
PU9
PU9
1
VIN
2
GND
3
REFEN
4
VOUT
RT9173DPSP_SO8
RT9173DPSP_SO8
+1.05VSP
12
PC87
PC87 10U_0805_6.3V6M
10U_0805_6.3V6M
4
VDDR
0.9VLOW
VCNTL
GND
3
316K_0402_1%
316K_0402_1% PR116
12
.1U_0402_16V7K
.1U_0402_16V7K
1 2
10U_0805_10V4Z
10U_0805_10V4Z
PR116
1 2
PC85
PC85
1 2
1 2
PR166
PR166
0_0402_5%
0_0402_5%
PC129
PC129
10U_0805_10V4Z
10U_0805_10V4Z
PU10
PU10
1
FB
2
GND
3
SW
4
IN
5
BS
MP2121DQ-LF-Z_QFN10_3X3
MP2121DQ-LF-Z_QFN10_3X3
PR118
PR118
402K_0402_1%
6 5
NC
7
NC
8
NC
9
+5VALW
12
PC82
PC82
1U_0603_6.3V6M
1U_0603_6.3V6M
+5VALW
PJ16
PJ16
112
JUMP_43X79
JUMP_43X79
@
@
402K_0402_1%
2
12
12
PC128
PC128
PC127
PC127
0.1U_0402_25V6
0.1U_0402_25V6
EN/SYNC
GND
POK
2
PR114
PR114
200K_0402_1%
200K_0402_1%
1 2
12
PC83
PC83
0.22U_0402_10V4Z
10 9 8
SW
7
IN
6 11
TP
0.22U_0402_10V4Z
2.2UH_FMJ-0630T-2R2 HF_8A_20%
2.2UH_FMJ-0630T-2R2 HF_8A_20%
12
PD16
PD16
@
@
B340A_SMA2
B340A_SMA2
PL18
PL18
1 2
12
PR165
PR165
4.7_1206_5%
4.7_1206_5%
12
PC91
PC91 680P_0603_50V7K
680P_0603_50V7K
SUSP# <28,31,34,46,51>
1
+1.8VSP
12
PC88
PC88
12
PC89
PC89
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
+1.5V
PC92
PC92
2
G
G
12
Deciphered Date
Deciphered Date
Deciphered Date
1
PJ17
PJ17
1
JUMP_43X79@
JUMP_43X79@
2
2
12
PR119
PR119
1K_0402_1%
1K_0402_1%
13
D
D
PR120
PR120
1K_0402_1%
1K_0402_1%
PQ34
PQ34
S
S
SSM3K7002FU_SC70-3
SSM3K7002FU_SC70-3
2
PU11
PU11
1
VIN
2
12
12
12
PC94
PC94
GND
3
REFEN
4
VOUT
RT9173DPSP_SO8
RT9173DPSP_SO8
+0.75VSP
12
PC95
PC95 10U_0805_6.3V6M
10U_0805_6.3V6M
.1U_0402_16V7K
.1U_0402_16V7K
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
6
VCNTL
5
NC
7
NC
8
NC
9
GND
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
+3VALW
12
PC93
PC93 1U_0603_6.3V6M
1U_0603_6.3V6M
401851
1
A
A
A
of
49 53Wednesday, January 20, 2010
of
49 53Wednesday, January 20, 2010
of
49 53Wednesday, January 20, 2010
+1.5V +5VALW
@ JUMP_43X79
JUMP_43X79
B B
4.7U_0805_6.3V6K
4.7U_0805_6.3V6K
PCIE_OK<43>
SUSP#<28,31,34,46,51>
Madison / Park PCIE : 1.0V
PR170 = 7.32K
A A
5
PC133
PC133
PR169
PR169
0_0402_5%
0_0402_5%
1 2
PC136
@PC136
@
.1U_0402_16V7K
.1U_0402_16V7K
1
2
2 12
M96 / M92 PCIE : 1.1V
PR170 = 4.75K
1
PJ23
@PJ23
12
PC132
PC132
PU14
PU14
1U_0603_6.3V6M
1U_0603_6.3V6M
APL5930KAI-TRG_SO8
APL5930KAI-TRG_SO8
6
VCNTL
5
VIN
9
VIN
8
EN
7
POK
12
3
VOUT
4
VOUT
2
FB
GND
1
4
PR168
PR168
1.82K_0402_1%
1.82K_0402_1%
PR170
PR170
7.32K_0402_1%
7.32K_0402_1%
12
12
PC134
PC134
12
12
0.01U_0402_25V7K
0.01U_0402_25V7K
+1.0VSP
PC135
PC135
22U_0805_6.3V6M
22U_0805_6.3V6M
SUSP<34>
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2008/9/25 2009/9/25
2008/9/25 2009/9/25
2008/9/25 2009/9/25
4.7U_0805_6.3V6K
4.7U_0805_6.3V6K
PR121
PR121
0_0402_5%
0_0402_5%
1 2
PC96
@PC96
@
.1U_0402_16V7K
.1U_0402_16V7K
A
B
C
D
E
CPU_B+
PC97
PC97
33P_0402_50V8J
33P_0402_50V8J
12
PC100
PC100
1000P_0402_50V7K
1000P_0402_50V7K
12
12
PR128
PR128
0_0402_5%
0_0402_5%
11K_0402_1%
11K_0402_1%
40
42
41
RTN_NB
PGND_NB
OCSET_NB
VDIFF1
COMP121ISP1
FB1
19
20
PC123
@PC123
@ 180P_0402_50V8J
180P_0402_50V8J
PR161
@PR161
@
PR164
PR164
36.5K_0402_1%@
36.5K_0402_1%@
12
UGATE_NB
PHASE_NB
PR124
PR124
2.2_0603_1%
2.2_0603_1%
BOOT_NB
1 2
PR187
PR187 10_0402_1%
10_0402_1%
1 2
12
PR129
PR129
39
38
LGATE_NB
PHASE_NB
VW1
22
23
ISP1
COMP1FB_1
12
PC126
@PC126
@
12
1200P_0402_50V7K
1200P_0402_50V7K
+VDDNB
PHASE_NB
12
LGATE_NB PHASE_NB UGATE_NB
12
PR133
PR133
0_0402_5%
0_0402_5%
37
36
BOOT_NB
UGATE_NB
35
BOOT0
34
UGATE0
33
PHASE0
32
PGND0
31
LGATE0
30
PVCC
29
LGATE1
28
PGND1
27
PHASE1
26
UGATE1
25
BOOT1
ISN1
TP
24
49
ISN1
VW1
12
PC124
@PC124
@ 1000P_0402_50V7K
1000P_0402_50V7K
PR162
@PR162
@
6.81K_0402_1%
6.81K_0402_1%
12
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
0.22U_0603_10V7K
LGATE_NB
CPU_VDDNB_RUN_FB_H <7>
BOOT_NB BOOT0 UGATE0 PHASE0
LGATE0
LGATE1
PHASE1 UGATE1 BOOT1
12
C
0.22U_0603_10V7K
PR188
PR188
10_0402_1%
10_0402_1%
1 2
UGATE0
PHASE0
BOOT0
+5VS
12
PC113
PC113 1U_0603_10V6K
1U_0603_10V6K
UGATE1
PHASE1
BOOT1
2008/9/25 2009/9/25
2008/9/25 2009/9/25
2008/9/25 2009/9/25
12
PR122
PR122
44.2K_0402_1%
12
48
VIN
ISP0
13
RTN0
12
@PR160
@
1K_0402_5%
1K_0402_5%
12
47
VCC
ISN0
14
RTN1
12
0_0402_5%
0_0402_5%
DIFF_1
PC122
@PC122
@ 4700P_0402_25V7K
4700P_0402_25V7K
PR160
44.2K_0402_1%
PC102
PC102
1000P_0402_50V7K
1000P_0402_50V7K
PR126
PR126
22K_0402_1%
22K_0402_1%
44
43
45
46
FB_NB
FSET_NB
VSEN_NB
COMP_NB
ISL6265AHRTZ-T_TQFN48_6X6
ISL6265AHRTZ-T_TQFN48_6X6
RTN1
VSEN0
RTN0
VSEN1
17
15
16
18
PR150
PR150
1 2
1K_0402_1%
1K_0402_1%
PR153
PR153
VSEN1
12
12
12
54.9K_0402_1%
54.9K_0402_1% 12
PR123
1 1
CPU_B+
+5VS +3VS
12
PR134
@PR134
@
10K_0402_1%
10K_0402_1%
PR144
PR144
12
+CPU_CORE
CPU_VDD1_RUN_FB_L<7>
CPU_VDD1_RUN_FB_H<7>
COMP0
12
PC125
PC125
12
12
1200P_0402_50V7K
1200P_0402_50V7K
12
PR130
PR130 0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
10_0402_1%
10_0402_1%
+CPU_CORE
1000P_0402_50V7K
1000P_0402_50V7K
6.81K_0402_1%
6.81K_0402_1%
ISL6265_PWROK
PR140
PR140
PR189
PR189
12
PC121
PC121
PR159
PR159
12
PR132
PR132
105K_0402_1%
105K_0402_1%
PR155
PR155
DIFF_0
1K_0402_5%
1K_0402_5%
VGATE<31,34>
CPU_SVD<7> CPU_SVC<7>
VR_ON<31,34>
PR143
PR143
21.5K_0402_1%
21.5K_0402_1%
PC119
PC119
4700P_0402_25V7K
4700P_0402_25V7K
12
12
PR157
PR157
12
12
A
1 2
PR136 0_0402_5%@ PR136 0_0402_5%@
1 2
PR138 0_0402_5%
PR138 0_0402_5%
12
FB_0
PR158
PR158
54.9K_0402_1%
54.9K_0402_1%
PR163
PR163
36.5K_0402_1%@
36.5K_0402_1%@
95.3K_0402_1%
95.3K_0402_1%
CPU_VDD0_RUN_FB_H<7> CPU_VDD0_RUN_FB_L<7>
VW0
PC120
PC120
180P_0402_50V8J
180P_0402_50V8J
2 2
H_PWRGD<7,20>
H_PWRGD_L<20>
3 3
255_0402_1%
255_0402_1%
4 4
+5VS
12
PR131
@PR131
@
105K_0402_1%
105K_0402_1%
12
PR135
PR135 105K_0402_1%@
105K_0402_1%@
12
PR142
PR142
0_0402_5%
0_0402_5%
12
PR190
PR190
10_0402_1%
10_0402_1%
PR192
PR192
10_0402_1%
10_0402_1%
12
PR123
2_0603_5%
2_0603_5%
1 2
0.1U_0603_16V7K
0.1U_0603_16V7K
1 2
PR127
PR127
2_0603_5%
2_0603_5%
PC107
PC107
0.1U_0603_25V7K
0.1U_0603_25V7K
1 2 3 4 5
12
6 7 8
9 10 11 12
PR146
PR146
0_0402_5%
0_0402_5%
VSEN0
12
0_0402_5%
0_0402_5%
12
PR191
@PR191
@ 10_0402_1%
10_0402_1%
12
12
PC103
PC103
12
PU12
PU12
OFS/VFIXEN PGOOD PWROK SVD SVC ENABLE RBIAS OCSET VDIFF0 FB0 COMP0 VW0
ISP0 ISN0
PR147
PR147
PR148 0_0402_5%PR148 0_0402_5%
+1.5V
PR156
@PR156
@
255_0402_1%
255_0402_1%
B
578
PQ35
PQ35 AO4466_SO8
AO4466_SO8
3 6
241
578
1 2
PC104
PC104
CPU_VDDNB_RUN_FB_L <7>
PR137
PR137
0_0603_5%
0_0603_5%
1 2
0.22U_0603_10V7K
0.22U_0603_10V7K
PR149
PR149
0_0603_5%
0_0603_5%
1 2
0.22U_0603_10V7K
0.22U_0603_10V7K
AO4712_SO8
AO4712_SO8
3 6
241
1 2
PC110
PC110
LGATE0
1 2
PC116
PC116
LGATE1
Deciphered Date
Deciphered Date
Deciphered Date
PQ36
PQ36
5
4
4
5
4
4
1
12
+
+
PC98
PC98
PC101
PC101
2
10U_1206_25V6M
10U_1206_25V6M
68U_25V_M_R0.44
68U_25V_M_R0.44
4.7U_LF919AS-4R7M-P3_5.2A_20%
4.7U_LF919AS-4R7M-P3_5.2A_20% 1 2
12
PR125
@PR125
@
4.7_1206_5%
4.7_1206_5%
12
PC106
@PC106
@
680P_0603_50V7K
680P_0603_50V7K
PQ37
PQ37
PC108
PC108
TPCA8030-H_SOP-ADV8-5
TPCA8030-H_SOP-ADV8-5
123
4
PQ38
PQ38
123 5
TPCA8028-H_SOP-ADVANCE8-5
TPCA8028-H_SOP-ADVANCE8-5
PQ40
PQ40
PC114
PC114
TPCA8030-H_SOP-ADV8-5
TPCA8030-H_SOP-ADV8-5
123
4
PQ41
PQ41
123 5
TPCA8028-H_SOP-ADVANCE8-5
TPCA8028-H_SOP-ADVANCE8-5
D
PL13
PL13
PC99
PC99
68U_25V_M_R0.44
68U_25V_M_R0.44
12
10U_1206_25V6M
10U_1206_25V6M
12
10U_1206_25V6M
10U_1206_25V6M
1
1
+
+
PC160
PC160
2
@
@
12
PC109
PC109
10U_1206_25V6M
10U_1206_25V6M
PQ39 @ PQ39
@
123 5
TPCA8028-H_SOP-ADVANCE8-5
TPCA8028-H_SOP-ADVANCE8-5
12
PC115
PC115
10U_1206_25V6M
10U_1206_25V6M
PQ42
PQ42
123 5
TPCA8028-H_SOP-ADVANCE8-5@
TPCA8028-H_SOP-ADVANCE8-5@
1
+
+
+
+
PC161
PC161
2
2
@
@
68U_25V_M_R0.44
68U_25V_M_R0.44
68U_25V_M_R0.44
68U_25V_M_R0.44
1
+
+
PC105
PC105 220U_D2_4VM
220U_D2_4VM
2
CPU_B+
12
PR139
@PR139
@
4.7_1206_5%
4.7_1206_5%
12
PC111
@PC111
@
680P_0603_50V7K
680P_0603_50V7K
CPU_B+
12
PR151
@PR151
@
4.7_1206_5%
4.7_1206_5%
12
PC117
@PC117
@
680P_0603_50V7K
680P_0603_50V7K
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom Date: Sheet
Date: Sheet
Date: Sheet
PL12
PL12
HCB4532KF-800T90_1812
HCB4532KF-800T90_1812
1 2
+VDDNBP
Total capacitor 1320uF ESR = 2.22mohm
PL14
0.36UH_PCMC104T-R36MN1R17_30A_20%
0.36UH_PCMC104T-R36MN1R17_30A_20%
0.36UH_PCMC104T-R36MN1R17_30A_20%
0.36UH_PCMC104T-R36MN1R17_30A_20%
Title
Title
Title
PL14
1 2
PR141
PR141
16.5K_0402_1%
16.5K_0402_1%
1 2
PC112
PC112
0.1U_0603_16V7K
0.1U_0603_16V7K
PR145
PR145
4.02K_0402_1%
4.02K_0402_1%
ISP0
PL15
PL15
1 2
PR152
PR152
16.5K_0402_1%
16.5K_0402_1%
1 2
PC118
PC118
0.1U_0603_16V7K
0.1U_0603_16V7K
PR154
PR154
4.02K_0402_1%
4.02K_0402_1%
ISP1
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
B+
Ipeak = 36A Imax = 25.2A F = 300K
4 3
12
12
4 3
12
12
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
401851
+CPU_CORE
ISN0
+CPU_CORE
ISN1
of
of
of
50 53Wednesday, January 20, 2010
50 53Wednesday, January 20, 2010
50 53Wednesday, January 20, 2010
E
A
A
A
5
PL16
PL16
B+_core
1 2
12
PC137
PC137
10U_1206_25VAK
10U_1206_25VAK
PR175
PR175
0_0402_5%
0_0402_5%
12
PC138
PC138
10U_1206_25VAK
10U_1206_25VAK
4.7U_0805_25V6-K
4.7U_0805_25V6-K
PC147
PC147
12
12
PC139
PC139
12
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
PC152
PC152
.1U_0402_16V7K
.1U_0402_16V7K
1 2
B+
HCB4532KF-800T90_1812
HCB4532KF-800T90_1812
D D
SUSP#<28,31,34,46,49>
C C
PC154
@PC154
@
22P_0402_50V8J
22P_0402_50V8J
4
LX_VCORE
DH_VCORE
1 2
BST_VCORE
PR171
PR171
0_0603_5%
0_0603_5%
+5VALW
12
PU15
PU15
3
VIN
4
VCC
5
EN
12
2
8
GND
PGOOD
APW7138NITRL_SSOP16
APW7138NITRL_SSOP16
NC6FB7FSET
12
PR179
57.6K_0402_1%
57.6K_0402_1%
@ PR179
@
49.9K_0402_1%
49.9K_0402_1%
12
PC156 @ PC156
@
2200P_0402_25V7K
2200P_0402_25V7K
15
1
16
UG
PHASE
BOOT
14
PVCC
PGND
VO
9
10
12
12
@ PC155
@
0.01U_0402_25V7K
PR180
PR180
0.01U_0402_25V7K
ISEN
LG
PC155
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
13
12
ISEN_VCORE
11
PR172
PR172 0_0603_5%
0_0603_5%
1 2
4.7_0603_5%
4.7_0603_5%
DL_VCORE7138_VCC
3
1 2
PC143
PC143
0.1U_0603_25V7K
0.1U_0603_25V7K
7138_VCC
PR173
PR173
PC146
PC146
1 2
1 2
PR176
PR176
5.36K_0402_1%
5.36K_0402_1%
2
1
Ipeak =20A Imax = 14A
5
PQ43
PQ43
4
TPCA8030-H_SOP-ADV8-5
TPCA8030-H_SOP-ADV8-5
123
PQ45
PQ45
@
4
123 5
PQ44
PQ44
4
TPCA8028-H_SOP-ADVANCE8-5
TPCA8028-H_SOP-ADVANCE8-5
@
123 5
TPCA8028-H_SOP-ADVANCE8-5
TPCA8028-H_SOP-ADVANCE8-5
F = 231K
Total capacitor 1170uF ESR = 3.33mohm
PL17
PL17
0.56U_PCMC104T-R56MN_25A_20%
0.56U_PCMC104T-R56MN_25A_20%
1 2
12
PR174
@ PR174
@
4.7_1206_5%
4.7_1206_5%
12
PC153
@ PC153
@
PR177
680P_0603_50V7K
680P_0603_50V7K
PR177
1 2
1
+
+
PC148
PC148
2
0_0402_5%
0_0402_5%
390U_2.5V_M
390U_2.5V_M
12
12
PC149 @ PC149
@
10U_1206_25VAK
10U_1206_25VAK
@PC157
@
+VGA_COREP
12
PC150
PC150
10U_1206_25VAK
10U_1206_25VAK
PR178
PR178
12
10_0402_1%
10_0402_1%
PC157
1000P_0402_50V7K
1000P_0402_50V7K
+VGA_CORE
PR182
PR182
5.9K_0402_1%
SSM3K7002FU_SC70-3
SSM3K7002FU_SC70-3
PQ46
PQ46
1 2 13
D
D
S
S
5.9K_0402_1%
2
G
G
PR185
PR185
10K_0402_1%
10K_0402_1%
1 2
12
PC158
PC158
.1U_0402_16V7K
.1U_0402_16V7K
VGA_PWRSEL1 <36>
B B
VFB(0.6)=Vout*Rbottom/(Rtop+Rbottom)
SEL1 SEL0
LL L
H L
H HH
Madison/Park voltage
1.2
1.12
0.95
0.9
M96/M92 voltage
1.2
1.0
0.95
0.9
PR184
PR184
4.22K_0402_1%
4.22K_0402_1%
PR181
PR181
1 2
4.22K_0402_1%
4.22K_0402_1%
12
SSM3K7002FU_SC70-3
SSM3K7002FU_SC70-3
PQ47
PQ47
1 2 13
D
D
S
S
PR183
PR183 28K_0402_1%
28K_0402_1%
2
G
G
12
PR186
PR186 10K_0402_1%
10K_0402_1%
1 2
PC159
PC159
.1U_0402_16V7K
.1U_0402_16V7K
VGA_PWRSEL0 <36>
FSW=1/(75E-12*57.6K)=231.48KHz
Madison
A A
Park
PR183 = 28K
5
M96 M92
PR183 = 12K
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2008/10/23
2008/10/23
2008/10/23
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2009/10/23
2009/10/23
2009/10/23
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
401851
401851
Wednesday, January 20, 2010
Wednesday, January 20, 2010
Wednesday, January 20, 2010
401851
1
51 53
51 53
51 53
of
of
of
A
A
A
5
4
3
2
1
PIR (Product Improve Record)
NALAE LA-6052P SCHEMATIC CHANGE LIST REVISION CHANGE: 0.1 TO 0.2
NO DATE PAGE MODIFICATION LIST
---------------------------------------------------------------------------------------------------------------------------­1 2009/12/14 33 Change JLEDB pin define as customer request
2 2009/12/14 25,28,30 Delete JODDB, JBT and JUSBB support pin 3 2009/12/14 33 Change JPOWER Pin2 from GND to NC 4 2009/12/15 28 Add R95 at JWLAN Pin5 for BT/WLAN combo Mini Card 5 2009/12/15 25,30 Change U11, U25 P/N from SA00002XX00 to SA000033H00
D D
6 2009/12/15 28 Reverse JBT pin definition 7 2009/12/16 27 Change CC2 from 0.1u to 100P (SE071101J80), and add BOM structure @ 8 2009/12/17 33 Cgange JPOWER footprint to ACES_87151-1207_12P (ZIF_ 9 2009/12/17 33 Cgange JTPB footprint to P-TWO_161011-04021_4P-T (NO ZIF), and reverse pin definition 10 2009/12/17 33 Cgange JLEDB footprint to ACES_85201-1205N_12P (ZIF_ 11 2009/12/17 25 Cgange JUSBB footprint to ACES_85201-20051_20P (ZIF_ 12 2009/12/17 33 Change H36, H37 footprint from H_3P3 to H_3P8
C C
上接點
上接點 上接點
)
) )
B B
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
2008/5/182007/5/18
2008/5/182007/5/18
2008/5/182007/5/18
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
401851
of
52 53Wednesday, January 20, 2010
of
52 53Wednesday, January 20, 2010
of
52 53Wednesday, January 20, 2010
1
A
A
A
5
4
3
2
1
Version Change List ( P. I. R. List ) for Power Circuit
Page# Item Title Solution Description
DVT : modification from EVT P48 change voltage divider to less than 10K change PR104, PR111, PR112 to 10K; PR103 to 4.75K P48 change 1.1V, 1.5V OCP value change PR102, PR110 to 6.19K P49 enlarge output cap change PC88, PC89 to 22uF(SE000000I10)
D D
P50 don't use NIPPON cap change PC98, PC99 to SF000000S80 P50 pull high RTN1 1.5V change PR150 to mount P51 APW7138 pin6 is NC change PR179, PC154, PC156 to unmount P47 choke need to meet thermal module height change PL6, PL7 to SH000006380 P46 change system power from 90W to 120W P50 production line request change PC98, PC99 to 68uF; add PC160, PC161 68uF P46 EMI request for ISN issue add PC162, PC163, PC164 10uF 1206 P49 mount snubber circuit mount PR165, PC91
C C
OTP setting common change PR30 and PR31 to 19.6K; PR34 to 7.87K; PR33 to 8.66KP45 change IC to low cost change PU9 and PU11 to RT9173P49 change VDDR(1.05V) circuit to switchable add PR193, PR194, PR195 & PQ48P49
change PR72 to 8.25K, PR75 to 26.7K; PQ11 to mount
B B
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
2008/5/182007/5/18
2008/5/182007/5/18
2008/5/182007/5/18
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
SCHEMATIC,MB A6052
401851
of
53 53Wednesday, January 20, 2010
of
53 53Wednesday, January 20, 2010
of
53 53Wednesday, January 20, 2010
1
A
A
A
Loading...