COMPAL LA-6042P Schematic

A

1 1

B

C

D

E

NALAA

2 2

LA-6042P Schematic

3 3

Hamburg 10G

REV 1.0

Intel Arrandale / IBEX PEAK

2010-04-12 Rev 1.0

4 4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/10/01 2010/10/01

2009/10/01 2010/10/01

2009/10/01 2010/10/01

C

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC,MB A6042

SCHEMATIC,MB A6042

SCHEMATIC,MB A6042

401849

401849

401849

158Tuesday, May 18, 2010

158Tuesday, May 18, 2010

158Tuesday, May 18, 2010

E

B

B

B

of

of

of

A

Vinafix

B

C

D

E

Compal Confidential

Model Name : NALAA

Intel Arrandale

Fan Control

APL5607KI-TRG

page 6

VGA Thermal Sensor

ADM1032ARMZ-2R

page 21

Clock Generator

RTM890N-631-GRT

page 22

File Name : LA-6042P

1 1

VGA (DDR3)
ATI M92 XTX,64bit with 512MB
ATI Park XT,64bit with 512MB
ATI Madison LP,128bit with 1GB

page 13,14,15,16,17,18,19,20,21

2 2

LCD Conn.

page 22

CRT

page 23

PCIE-Express 16X 2.5GHz

HDMI Conn.

page 24

rPGA-988

page 5,6,7,8,9,10

DMI X4

2.5GHz

Intel Ibex Peak

BGA-951

Memory BUS(DDRIII)

Dual Channel

1.5V DDRIII 800/1066 MT/s

AUDIO & USB/B

USB port 0,1

page 39

3IN1

USB

5V 480MHz

USB

5V 480MHz

PCIe 1x

1.5V 2.5GHz(250MB/s)

SATA port 1

5V 3GHz(300MB/s)

USB port 10

PCIeMini Card
WLAN

SATA HDD0

204pin DDRIII-SO-DIMM X2

page 11,12

page 35

page 22

RTS5138-GR

page 40

USB port 13

page 36

PCIe port 2

page 36

page 34

BANK 0, 1, 2, 3

BT conn

USB port 5

Int. Camera

USB port 11

SATA port 4

5V 3GHz(300MB/s)

3 3

Power/B

AUDIO & USB/B

4 4

ODD/B

LED/B

page 43

page 39

page 34

page 43

DC/DC Interface CKT.

Power Circuit DC/DC

RTC Circuit

A

RJ45

page 37

page 45~54

RTL8105E-VB-GR 10/100M
RTL8111E-VB-GR Giga

PCIe port 1

page 44

page 25

B

page 37

SPI ROM

PCIe 1x

1.5V 2.5GHz(250MB/s)

page 25

SATA port 5

page 25,26,27,28,29,30,31,32,33

HD Audio

3.3V 33 MHz

LPC BUS

5V 3GHz(300MB/s)

USB port 3

5V 480MHz

3.3V/1.5V 24MHz

MDC 1.5 Conn

Debug Port

page 42

Touch Pad

page 35

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

ENE KB926 E0

page 41

Int.KB

page 35

2009/10/01 2010/10/01

2009/10/01 2010/10/01

2009/10/01 2010/10/01

C

EC ROM

page 42

page 35 page 38

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

SATA ODD

page 34

eSATA

page 34

Digital MIC

LCD Conn.

page 22

D

USB

USB port 3

page 34

HDA Codec

ALC259-GR

AUDIO & USB/B

USB port 0,1

page 39

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC,MB A6042

SCHEMATIC,MB A6042

SCHEMATIC,MB A6042

401849

401849

401849

SPK CONN

page 39

258Tuesday, May 18, 2010

258Tuesday, May 18, 2010

258Tuesday, May 18, 2010

E

of

of

of

B

B

B

5

NALAA Hamburg Intel Arrandale (Discrete)

4

3

2

1

B+

Ipeak=5A, Imax=3.5A, Iocp min=7.9

D D

N-CHANNEL

SUSP

SI4800

DESIGN CURRENT 5A

DESIGN CURRENT 4A

+5VALW

+5VS

RT8205EGQW

Ipeak=5A, Imax=3.5A, Iocp min=7.7

WOL_EN#

P-CHANNEL

AO-3413

SUSP

N-CHANNEL

SI4800

C C

P-CHANNEL

AO-3413

P-CHANNEL

AO-3413

P-CHANNEL

AO-3413

VR_ON

ISL62883

Ipeak=48A, Imax=33.6A, Iocp min=57.28

SUSP#

APW7138NITRL

Ipeak=22A, Imax=15.4A, Iocp min=28.71

DESIGN CURRENT 5A

DESIGN CURRENT 330mA

DESIGN CURRENT 4A

VGA_ENVDD

DESIGN CURRENT 1.5A

BT_PWR#

DESIGN CURRENT 180mA

PCIE_OK

DESIGN CURRENT 100mA

DESIGN CURRENT 48A

DESIGN CURRENT 22A

+3VALW

+3V_LAN

+3VS

+LCD_VDD

+BT_VCC

+3VS_DELAY

+CPU_CORE

+VGA_CORE

SUSP#

SUSP#

VTTP_EN#

Ipeak=20A, Imax=14A, Iocp min=27.49

SYSON

Ipeak=14A, Imax=9.8A, Iocp min=18.83

SUSP

N-CHANNEL

SI4856

SUSP#

G2992F1U

SUSP

APL5930KAI

Ipeak=7A, Imax=4.9A, Iocp min=7.7

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/10/01 2010/10/01

2009/10/01 2010/10/01

2009/10/01 2010/10/01

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

DESIGN CURRENT 20A

DESIGN CURRENT 14A

DESIGN CURRENT 12A

DESIGN CURRENT 1.3A

DESIGN CURRENT 1.56A

DESIGN CURRENT 2A

DESIGN CURRENT 7A

2

+VTT

+1.5V

+1.5V_CPU

+1.5VS

+0.75VS

+1.0VS

+1.8VS

+1.05VS

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC,MB A6042

SCHEMATIC,MB A6042

SCHEMATIC,MB A6042

401849

401849

401849

358Tuesday, May 18, 2010

358Tuesday, May 18, 2010

358Tuesday, May 18, 2010

1

of

of

of

B

B

B

B B

APW7138NITRL

RT8209BGQW

MP2121DQ

A A

RT8209BGQW

5

4

A

B

C

D

E

Voltage Rails

1 1

State

2 2

S5 S4/AC

S5 S4/ Battery only

S5 S4/AC & Battery
don't exist

power
plane

S0

S1

S3

( O MEANS ON X MEANS OFF )

+RTCVCC

O
O
O
O
O
O

+B
+3VL

O
O
O
O
O

X

+5VALW
+3VALW
+1.5VALW
+VSB

O
O
O
O

X
XXX

+1.5V

+5VS
+3VS
+1.5VS
+VGA_CORE
+CPU_CORE
+VTT
+1.05VS
+1.8VS
+1.0VS
+0.75VS

OO
OO

O

X
XX
X

X

BTO Option Table

CPU

S3 Reduce

GPU Type

BTO

Function

description

explain

BTO

Function

description

explain

BTO

Function

description

explain

BTO

Manhattan M9X

PS@
MANHA@ MANHA@ MANHA@ MANHA@

(H5) (P5) (M1)

HM55 HM57 PM55

HM55R3@ HM57R3@

(E) (R)

10/100M Giga

8105E@ 8111E@

512M 1G

4PCS@ 8PCS@

Arrandale Clarksfield

Enable Disable

VRAM

M1@
PS@
M9X@

PCH

(H7)

LAN

(C) (Q)

DC JACK

DC JACK

45@

M1@ M1@
NPS@

Park LP Madison LP

PARKLP@ MADISONLP@

HDMI

(Y)

HDMI

HDMI@

Non-HDMI

Enable Disable

M9XManhattan M9XManhattan M9XManhattan

PSM3@M1@
NPS@ NPS@ NPS@PS@ PS@
M9X@ M9X@ M9X@

GPU

(PX5)

Park XT

PARKXT@

Bluetooth

(B)

BT@

MODEM

MDCBluetooth

MDC@

PSM3@ M3@

(925)

M92 XTX

M92XTXR3@

M3@

EC SM Bus1 address

3 3

Device

EC KB926 D3+3VALW EC KB926 D3+3VS
Smart Battery+3VALW VGA THM Sensor

Address Address

PCH SM Bus address

Power

+3VALW
+3VS
+3VS
+3VS
+3VS

4 4

Device

PCH
Clock Generator
DDR DIMM0
DDR DIMM1
WLAN

Address

1101 001x b
1001 000x b
1001 010x b

A

EC SM Bus2 address

Device

PowerPower

+3VS

ADM1032ARMZ

+3VS PCH

B

1001 110x b0001 011x b

0100 110x b

STATE

Full ON

S1(Power On Suspend)

S3 (Suspend to RAM)

S4 (Suspend to Disk)

S5 (Soft OFF)

G3 LOW LOWLOW

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SIGNAL

2009/10/01 2010/10/01

2009/10/01 2010/10/01

2009/10/01 2010/10/01

C

SLP_S3#

SLP_S4# SLP_S5#

HIGH HIGHHIGH

HIGH HIGHHIGH

LOW

LOW LOW

Compal Secret Data

Compal Secret Data

Compal Secret Data

HIGH

LOW LOWLOW

Deciphered Date

Deciphered Date

Deciphered Date

HIGH

HIGH

D

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC,MB A6042

SCHEMATIC,MB A6042

SCHEMATIC,MB A6042

401849

401849

401849

458Tuesday, May 18, 2010

458Tuesday, May 18, 2010

458Tuesday, May 18, 2010

of

of

E

of

B

B

B

5

4

3

2

1

For S3 Reduce

NPS@

JCPUB

JCPUB

AT23

COMP3

AT24

COMP2

G16

COMP1

AT26

COMP0

AH24

SKTOCC#

AK14

CATERR#

AT15

PECI

AN26

PROCHOT#

AK15

THERMTRIP#

AP26

RESET_OBS#

AL15

PM_SYNC

AN14

VCCPWRGOOD_1

AN27

VCCPWRGOOD_0

AK13

SM_DRAMPWROK

AM15

VTTPWRGOOD

AM26

TAPPWRGOOD

AL14

RSTIN#

IC,AUB_CFD_rPGA,R0P9

IC,AUB_CFD_rPGA,R0P9
@

@

MISC THERMAL

MISC THERMAL

CLOCKS

CLOCKS

DDR3

MISC

DDR3

MISC

PWR MANAGEMENT

PWR MANAGEMENT

JTAG & BPM

JTAG & BPM

BCLK

BCLK#

BCLK_ITP

BCLK_ITP#

PEG_CLK

PEG_CLK#

DPLL_REF_SSCLK

DPLL_REF_SSCLK#

SM_DRAMRST#

SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]

PM_EXT_TS#[0]
PM_EXT_TS#[1]

PRDY#

PREQ#

TCK
TMS

TRST#

TDO

TDI_M

TDO_M

DBR#

BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]

TDI

A16
B16

CLK_CPU_XDP_R

AR30

CLK_CPU_XDP#_R

AT30
E16

D16
A18

A17

SM_DRAMRST#_CPU

F6

SM_RCOMP_0

AL1

SM_RCOMP_1

AM1

SM_RCOMP_2

AN1

PM_EXTTS#0

AN15

PM_EXTTS#_R

AP15

XDP_PRDY#

AT28

XDP_PREQ#

AP27

XDP_TCK

AN28

XDP_TMS

AP28

XDP_TRST#

AT27

XDP_TDI_R

AT29

XDP_TDO_R

AR27

XDP_TDI_M

AR29

XDP_TDO_M

AP29
AN25

XDP_BPM#0

AJ22

XDP_BPM#1

AK22

XDP_BPM#2

AK24

XDP_BPM#3

AJ24
AJ25
AH22
AK23
AH23

CLK_CPU_BCLK 30
CLK_CPU_BCLK# 30

1 2

R41 0_0402_5%@R41 0_0402_5%@

1 2

R42 0_0402_5%@R42 0_0402_5%@

CLK_CPU_XDP
CLK_CPU_XDP#

CLK_PEG 26
CLK_PEG# 26

Unused by Clarksfield rPGA989

R6 100_0402_1%R6 100_0402_1%

1 2

R7 24.9_0402_1%R7 24.9_0402_1%

1 2

R8 130_0402_1%R8 130_0402_1%

1 2

12

R12 0_0402_5%R12 0_0402_5%

Routed as a single daisy chain

R312 1K_0402_5%R312 1K_0402_5%

XDP_PRDY#
XDP_PREQ#
XDP_TCK
XDP_TMS
XDP_TRST#
XDP_TDI
XDP_TDO
XDP_DBRESET#

DDR3 Compensation Signals
Layout Note:Please these
resistors near Processor

PM_EXTTS# 11,12

12

+3VS

XDP_DBRESET# 27

1 2

C132 0.1U_0402_10V6K@C132 0.1U_0402_10V6K@

1 2

C93 0.1U_0402_10V6K@C93 0.1U_0402_10V6K@

1 2

C95 0.1U_0402_10V6K@C95 0.1U_0402_10V6K@

1 2

C96 0.1U_0402_10V6K@C96 0.1U_0402_10V6K@

1 2

C130 0.1U_0402_10V6K@C130 0.1U_0402_10V6K@

1 2

C97 0.1U_0402_10V6K@C97 0.1U_0402_10V6K@

1 2

C131 0.1U_0402_10V6K@C131 0.1U_0402_10V6K@

1 2

C149 0.1U_0402_10V6K@C149 0.1U_0402_10V6K@

SM_DRAMRST#_CPU

100K_0402_5%

100K_0402_5%

TP_SKTOCC#

CATERR#

H_PROCHOT#_D

H_CPURST#

H_PWRGOOD1_R

12

R31

R31

H_COMP3
H_COMP2
H_COMP1
H_COMP0

1 2

R1 20_0402_1%R1 20_0402_1%

1 2

R2 20_0402_1%R2 20_0402_1%

1 2

R4 49.9_0402_1%R4 49.9_0402_1%

1 2

D D

For prevent noise issue

PECI

1 2

C414 100P_0402_50V8J@ C414 100P_0402_50V8J@

H_THERMTRIP#30

C C

Close to JCPU

DRAMPWROK
VTTPWROK_CPU

1 2

C384 1000P_0402_50V7KC384 1000P_0402_50V7K

1 2

C382 1000P_0402_50V7KC382 1000P_0402_50V7K

H_PWRGOOD30

+VTT

PECI30

+VTT

+VTT

XDP_RST#_R

PMSYNCH27

H_PWRGOOD

DRAMPWROK27

VTTPWROK_CPU49

BUF_PLT_RST#29

DRAMPWROK

VTTPWROK_CPU

TAPPWRGD

R3 49.9_0402_1%R3 49.9_0402_1%

T41PAD T41PAD

1 2

R18 49.9_0402_1%R18 49.9_0402_1%

1 2

R9 68_0402_5%R9 68_0402_5%

12

R10 68_0402_5%@R10 68_0402_5%@

1 2

R36 1K_0402_5%R36 1K_0402_5%

R25 0_0402_5%R25 0_0402_5%

R30 1.5K_0402_1%R30 1.5K_0402_1%

750_0402_1%

750_0402_1%

EMI reverse, close to JCPU

NPS@

12

R19 0_0402_5%

R19 0_0402_5%

D

S

D

S

13

PS@

12

PS@

PS@

R123

R123

PM_EXTTS#0
PM_EXTTS#_R

XDP_TDI_R XDP_TDI

XDP_TDO_M

0_0402_5%

0_0402_5%

XDP_TDI_M

XDP_TDO_R

PS@
Q41

Q41

G

G

BSS138_NL_SOT23-3

BSS138_NL_SOT23-3

2

12

PS@

PS@
C8

C8

0.047U_0402_16V7K

0.047U_0402_16V7K

R15 10K_0402_5%R15 10K_0402_5%
R13 10K_0402_5%R13 10K_0402_5%

1 2

R20 0_0402_5%R20 0_0402_5%

@

@

1 2

R21 0_0402_5%

R21 0_0402_5%

12

R23

R23

@

@

1 2

R26 0_0402_5%

R26 0_0402_5%

1 2

R27 0_0402_5%R27 0_0402_5%

SM_DRAMRST# 11,12

RST_GATE 11,30

+VTT

12
12

JTAG MAPPING

Scan Chain
(Default)

CPU Only

GMCH Only

STUFF -> R20, R23, R27
NO STUFF -> R21, R26

STUFF -> R20, R21
NO STUFF -> R23, R26, R27

STUFF -> R26, R27
NO STUFF -> R20, R21, R23

XDP_TDO

B B

For S3 Reduce

+3VALW

1

PS@

PS@
C80

C80

0.1U_0402_16V7K

0.1U_0402_16V7K

2

PS@

PS@

5

U10

VTTPWROK44,49

A A

VTTPWROK

5

U10

1

P

IN1

O

2

IN2

G

SN74AHC1G08DCKR_SC70-5

SN74AHC1G08DCKR_SC70-5

3

12

R52 0_0402_5%@R52 0_0402_5%@

4

PS@

PS@

R33 1.5K_0402_1%

R33 1.5K_0402_1%

+1.5V_CPU

4

NPS@

NPS@
R28

R28

1.1K_0402_1%

1.1K_0402_1%

1 2

DRAMPWROK

NPS@

NPS@
R29

R29
3K_0402_1%

3K_0402_1%

1 2

PS@

PS@
R29

R29
750_0402_1%

750_0402_1%

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

XDP Connector

XDP_PREQ#
XDP_PRDY#

XDP_BPM#0
XDP_BPM#1

XDP_BPM#2

2

XDP_BPM#3
H_PWRGOOD_R

TAPPWRGD_R
CLK_CPU_XDP
CLK_CPU_XDP#

XDP_RST#_R
XDP_DBRESET#

XDP_TDO
XDP_TRST#
XDP_TDI
XDP_TMS

XDP_TCK

H_PWRGOOD
TAPPWRGD

+VTT

1

@

@
C1

C1

0.1U_0402_16V7K

0.1U_0402_16V7K

2009/10/01 2010/10/01

2009/10/01 2010/10/01

2009/10/01 2010/10/01

2

Compal Secret Data

Compal Secret Data

Compal Secret Data

R32 1K_0402_5%@R32 1K_0402_5%@

1 2
1 2

R35 0_0402_5%@R35 0_0402_5%@

R1451_0402_5% R1451_0402_5%

R11

R11

51_0402_5%

51_0402_5%

Deciphered Date

Deciphered Date

Deciphered Date

12

12

SFF-24Pin

JXDP

JXDP

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17

17

18

18

19

19

20

20

21

21

22

22

23
24

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

MOLEX_52435-2472@

MOLEX_52435-2472@

Custom

Custom

Custom

25

23

GND

26

24

GND

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

SCHEMATIC,MB A6042

SCHEMATIC,MB A6042

SCHEMATIC,MB A6042

401849

401849

401849

558Tuesday, May 18, 2010

558Tuesday, May 18, 2010

558Tuesday, May 18, 2010

of

of

1

of

B

B

B

5

4

3

2

1

FAN Control Circuit

+5VS

1A

2

C3

D D

1

EN_DFAN141

+FAN1

10mil

JCPUA

JCPUA

DMI_PTX_CRX_N027
DMI_PTX_CRX_N127
DMI_PTX_CRX_N227
DMI_PTX_CRX_N327

DMI_PTX_CRX_P027
DMI_PTX_CRX_P127
DMI_PTX_CRX_P227
DMI_PTX_CRX_P327

DMI_CTX_PRX_N027
DMI_CTX_PRX_N127

C C

DMI_CTX_PRX_N227
DMI_CTX_PRX_N327

DMI_CTX_PRX_P027
DMI_CTX_PRX_P127
DMI_CTX_PRX_P227
DMI_CTX_PRX_P327

B B

A A

12

R686 1K_0402_5%R686 1K_0402_5%

12

R688 1K_0402_5%R688 1K_0402_5%

A24
C23
B22
A21

B24
D23
B23
A22

D24
G24
F23
H23

D25
F24
E23
G23

E22
D21
D19
D18
G21
E19
F21
G18

D22
C21
D20
C18
G22
E20
F20
G19

F17
E17

C17
F18

D17

DMI_RX#[0]
DMI_RX#[1]
DMI_RX#[2]
DMI_RX#[3]

DMI_RX[0]
DMI_RX[1]
DMI_RX[2]
DMI_RX[3]

DMI_TX#[0]
DMI_TX#[1]
DMI_TX#[2]
DMI_TX#[3]

DMI_TX[0]
DMI_TX[1]
DMI_TX[2]
DMI_TX[3]

FDI_TX#[0]
FDI_TX#[1]
FDI_TX#[2]
FDI_TX#[3]
FDI_TX#[4]
FDI_TX#[5]
FDI_TX#[6]
FDI_TX#[7]

FDI_TX[0]
FDI_TX[1]
FDI_TX[2]
FDI_TX[3]
FDI_TX[4]
FDI_TX[5]
FDI_TX[6]
FDI_TX[7]

FDI_FSYNC[0]
FDI_FSYNC[1]

FDI_INT
FDI_LSYNC[0]

FDI_LSYNC[1]

DMI Intel(R) FDI

DMI Intel(R) FDI

PEG_ICOMPI

PEG_ICOMPO

PEG_RCOMPO

PEG_RBIAS
PEG_RX#[0]

PEG_RX#[1]
PEG_RX#[2]
PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]

PEG_RX#[9]
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]

PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]

PEG_RX[9]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]

PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9]

PEG_TX#[10]
PEG_TX#[11]
PEG_TX#[12]
PEG_TX#[13]
PEG_TX#[14]

PCI EXPRESS -- GRAPHICS

PCI EXPRESS -- GRAPHICS

PEG_TX#[15]

PEG_TX[0]

PEG_TX[1]

PEG_TX[2]

PEG_TX[3]

PEG_TX[4]

PEG_TX[5]

PEG_TX[6]

PEG_TX[7]

PEG_TX[8]

PEG_TX[9]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]

PEG_COMP

B26
A26
B27

PEG_RBIAS

A25

PCIE_GTX_C_CRX_N0

K35

PCIE_GTX_C_CRX_N1

J34

PCIE_GTX_C_CRX_N2

J33

PCIE_GTX_C_CRX_N3

G35

PCIE_GTX_C_CRX_N4

G32

PCIE_GTX_C_CRX_N5

F34

PCIE_GTX_C_CRX_N6

F31

PCIE_GTX_C_CRX_N7

D35

PCIE_GTX_C_CRX_N8

E33

PCIE_GTX_C_CRX_N9

C33

PCIE_GTX_C_CRX_N10

D32

PCIE_GTX_C_CRX_N11

B32

PCIE_GTX_C_CRX_N12

C31

PCIE_GTX_C_CRX_N13

B28

PCIE_GTX_C_CRX_N14

B30

PCIE_GTX_C_CRX_N15

A31

PCIE_GTX_C_CRX_P0

J35

PCIE_GTX_C_CRX_P1

H34

PCIE_GTX_C_CRX_P2

H33

PCIE_GTX_C_CRX_P3

F35

PCIE_GTX_C_CRX_P4

G33

PCIE_GTX_C_CRX_P5

E34

PCIE_GTX_C_CRX_P6

F32

PCIE_GTX_C_CRX_P7

D34

PCIE_GTX_C_CRX_P8

F33

PCIE_GTX_C_CRX_P9

B33

PCIE_GTX_C_CRX_P10

D31

PCIE_GTX_C_CRX_P11

A32

PCIE_GTX_C_CRX_P12

C30

PCIE_GTX_C_CRX_P13

A28

PCIE_GTX_C_CRX_P14

B29

PCIE_GTX_C_CRX_P15

A30

PCIE_CTX_GRX_N0

L33

PCIE_CTX_GRX_N1

M35

PCIE_CTX_GRX_N2

M33

PCIE_CTX_GRX_N3

M30

PCIE_CTX_GRX_N4

L31

PCIE_CTX_GRX_N5

K32

PCIE_CTX_GRX_N6

M29

PCIE_CTX_GRX_N7

J31

PCIE_CTX_GRX_N8

K29

PCIE_CTX_GRX_N9

H30

PCIE_CTX_GRX_N10

H29

PCIE_CTX_GRX_N11

F29

PCIE_CTX_GRX_N12

E28

PCIE_CTX_GRX_N13

D29

PCIE_CTX_GRX_N14

D27

PCIE_CTX_GRX_N15

C26

PCIE_CTX_GRX_P0

L34

PCIE_CTX_GRX_P1

M34

PCIE_CTX_GRX_P2

M32

PCIE_CTX_GRX_P3

L30

PCIE_CTX_GRX_P4

M31

PCIE_CTX_GRX_P5

K31

PCIE_CTX_GRX_P6

M28

PCIE_CTX_GRX_P7

H31

PCIE_CTX_GRX_P8

K28

PCIE_CTX_GRX_P9

G30

PCIE_CTX_GRX_P10

G29

PCIE_CTX_GRX_P11

F28

PCIE_CTX_GRX_P12

E27

PCIE_CTX_GRX_P13

D28

PCIE_CTX_GRX_P14

C27

PCIE_CTX_GRX_P15

C25

1 2

R38 49.9_0402_1%R38 49.9_0402_1%

1 2

R39 750_0402_1%R39 750_0402_1%

PCIE_GTX_C_CRX_N[0..15] 13

PCIE_GTX_C_CRX_P[0..15] 13

C39 0.1U_0402_16V7KC39 0.1U_0402_16V7K

1 2

C40 0.1U_0402_16V7KC40 0.1U_0402_16V7K

1 2

C41 0.1U_0402_16V7KC41 0.1U_0402_16V7K

1 2

C42 0.1U_0402_16V7KC42 0.1U_0402_16V7K

1 2

C43 0.1U_0402_16V7KC43 0.1U_0402_16V7K

1 2

C44 0.1U_0402_16V7KC44 0.1U_0402_16V7K

1 2

C45 0.1U_0402_16V7KC45 0.1U_0402_16V7K

1 2

C46 0.1U_0402_16V7KC46 0.1U_0402_16V7K

1 2

C47 0.1U_0402_16V7KC47 0.1U_0402_16V7K

1 2

C48 0.1U_0402_16V7KC48 0.1U_0402_16V7K

1 2

C49 0.1U_0402_16V7KC49 0.1U_0402_16V7K

1 2

C50 0.1U_0402_16V7KC50 0.1U_0402_16V7K

1 2

C51 0.1U_0402_16V7KC51 0.1U_0402_16V7K

1 2

C52 0.1U_0402_16V7KC52 0.1U_0402_16V7K

1 2

C53 0.1U_0402_16V7KC53 0.1U_0402_16V7K

1 2

C54 0.1U_0402_16V7KC54 0.1U_0402_16V7K

1 2

C55 0.1U_0402_16V7KC55 0.1U_0402_16V7K

1 2

C56 0.1U_0402_16V7KC56 0.1U_0402_16V7K

1 2

C57 0.1U_0402_16V7KC57 0.1U_0402_16V7K

1 2

C58 0.1U_0402_16V7KC58 0.1U_0402_16V7K

1 2

C59 0.1U_0402_16V7KC59 0.1U_0402_16V7K

1 2

C60 0.1U_0402_16V7KC60 0.1U_0402_16V7K

1 2

C61 0.1U_0402_16V7KC61 0.1U_0402_16V7K

1 2

C62 0.1U_0402_16V7KC62 0.1U_0402_16V7K

1 2

C63 0.1U_0402_16V7KC63 0.1U_0402_16V7K

1 2

C64 0.1U_0402_16V7KC64 0.1U_0402_16V7K

1 2

C65 0.1U_0402_16V7KC65 0.1U_0402_16V7K

1 2

C66 0.1U_0402_16V7KC66 0.1U_0402_16V7K

1 2

C67 0.1U_0402_16V7KC67 0.1U_0402_16V7K

1 2

C68 0.1U_0402_16V7KC68 0.1U_0402_16V7K

1 2

C69 0.1U_0402_16V7KC69 0.1U_0402_16V7K

1 2

C70 0.1U_0402_16V7KC70 0.1U_0402_16V7K

1 2

PCIE_CTX_C_GRX_N0
PCIE_CTX_C_GRX_N1
PCIE_CTX_C_GRX_N2
PCIE_CTX_C_GRX_N3
PCIE_CTX_C_GRX_N4
PCIE_CTX_C_GRX_N5
PCIE_CTX_C_GRX_N6
PCIE_CTX_C_GRX_N7
PCIE_CTX_C_GRX_N8

PCIE_CTX_C_GRX_N9
PCIE_CTX_C_GRX_N10
PCIE_CTX_C_GRX_N11
PCIE_CTX_C_GRX_N12
PCIE_CTX_C_GRX_N13
PCIE_CTX_C_GRX_N14
PCIE_CTX_C_GRX_N15

PCIE_CTX_C_GRX_P0
PCIE_CTX_C_GRX_P1
PCIE_CTX_C_GRX_P2
PCIE_CTX_C_GRX_P3
PCIE_CTX_C_GRX_P4
PCIE_CTX_C_GRX_P5
PCIE_CTX_C_GRX_P6
PCIE_CTX_C_GRX_P7
PCIE_CTX_C_GRX_P8

PCIE_CTX_C_GRX_P9
PCIE_CTX_C_GRX_P10
PCIE_CTX_C_GRX_P11
PCIE_CTX_C_GRX_P12
PCIE_CTX_C_GRX_P13
PCIE_CTX_C_GRX_P14
PCIE_CTX_C_GRX_P15

2
3
4

1

C5

C5
10U_0805_10V4Z

10U_0805_10V4Z

2

PCIE_CTX_C_GRX_N[0..15] 13

PCIE_CTX_C_GRX_P[0..15] 13

10U_0805_10V4Z

10U_0805_10V4Z

U1

U1

EN

GND

VIN

GND

VOUT

GND

VSET

GND

G996P11U_SO8

G996P11U_SO8

C3

1

8
7
6
5

+FAN1

2

C4

C4
1000P_0402_50V7K

1000P_0402_50V7K

1

@

@

1
2
3

4
5

R34 10K_0402_5%R34 10K_0402_5%

2

C6

C6

0.01U_0402_25V7K

0.01U_0402_25V7K

1

@

@

JFAN

JFAN

1
2
3

GND
GND

ACES_85204-0300N@

ACES_85204-0300N@

12

FAN_SPEED1 41

+3VS

IC,AUB_CFD_rPGA,R0P9

IC,AUB_CFD_rPGA,R0P9
@

@

5

4

Security Classification

Security Classification

Security Classification

2009/10/01 2010/10/01

2009/10/01 2010/10/01

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/10/01 2010/10/01

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.
SCHEMATIC,MB A6042

SCHEMATIC,MB A6042

SCHEMATIC,MB A6042
401849

401849

401849

658Tuesday, May 18, 2010

658Tuesday, May 18, 2010

658Tuesday, May 18, 2010

1

of

of

of

B

B

B

5

JCPUC

JCPUC

DDR_A_D[0..63]11

4

3

JCPUD

JCPUD

DDR_B_D[0..63]12

2

1

AA6

SA_CK[0]

AA7

SA_CK#[0]

P7

DDR_A_D0
DDR_A_D1

D D

C C

B B

DDR_A_BS011
DDR_A_BS111
DDR_A_BS211

DDR_A_CAS#11
DDR_A_RAS#11

DDR_A_WE#11

DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63

A10
C10

B10
D10
E10

F10

H10

G10

AH5

AF5
AK6
AK7

AF6
AG5

AJ7

AJ6

AJ10

AJ9

AL10

AK12

AK8

AL7

AK11

AL8
AN8

AM10
AR11

AL11

AM9
AN9

AT11
AP12
AM12
AN12
AM13
AT14
AT12

AL13
AR14
AP14

AC3
AB2

AE1
AB3
AE9

C7

D8

C6
G8

G7

J10

M6
M8

N8

U7

A7

A8

E6
F7
E9
B7
E7

K7

J8

J7

L7

L9
L6
K8

P9

SA_DQ[0]
SA_DQ[1]
SA_DQ[2]
SA_DQ[3]
SA_DQ[4]
SA_DQ[5]
SA_DQ[6]
SA_DQ[7]
SA_DQ[8]
SA_DQ[9]
SA_DQ[10]
SA_DQ[11]
SA_DQ[12]
SA_DQ[13]
SA_DQ[14]
SA_DQ[15]
SA_DQ[16]
SA_DQ[17]
SA_DQ[18]
SA_DQ[19]
SA_DQ[20]
SA_DQ[21]
SA_DQ[22]
SA_DQ[23]
SA_DQ[24]
SA_DQ[25]
SA_DQ[26]
SA_DQ[27]
SA_DQ[28]
SA_DQ[29]
SA_DQ[30]
SA_DQ[31]
SA_DQ[32]
SA_DQ[33]
SA_DQ[34]
SA_DQ[35]
SA_DQ[36]
SA_DQ[37]
SA_DQ[38]
SA_DQ[39]
SA_DQ[40]
SA_DQ[41]
SA_DQ[42]
SA_DQ[43]
SA_DQ[44]
SA_DQ[45]
SA_DQ[46]
SA_DQ[47]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]

SA_BS[0]
SA_BS[1]
SA_BS[2]

SA_CAS#
SA_RAS#
SA_WE#

SA_CKE[0]

Y6

SA_CK[1]

Y5

SA_CK#[1]

P6

SA_CKE[1]

AE2

SA_CS#[0]

AE8

SA_CS#[1]

AD8

SA_ODT[0]

AF9

SA_ODT[1]

Unused by Clarksfield rPGA989

DDR_A_DM0

B9

SA_DM[0]
SA_DM[1]
SA_DM[2]
SA_DM[3]
SA_DM[4]
SA_DM[5]
SA_DM[6]
SA_DM[7]

SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]

SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]

DDR SYSTEM MEMORY A

DDR SYSTEM MEMORY A

SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]

SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]

D7
H7
M7
AG6
AM7
AN10
AN13

C9
F8
J9
N9
AH7
AK9
AP11
AT13

C8
F9
H9
M9
AH8
AK10
AN11
AR13

Y3
W1
AA8
AA3
V1
AA9
V8
T1
Y9
U6
AD4
T2
U3
AG8
T3
V9

DDR_A_DM1
DDR_A_DM2
DDR_A_DM3
DDR_A_DM4
DDR_A_DM5
DDR_A_DM6
DDR_A_DM7

DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7

DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7

DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8

DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_MA14
DDR_A_MA15

DDRA_CLK0 11 DDRB_CLK0 12
DDRA_CLK0# 11
DDRA_CKE0 11 DDRB_CKE0 12

DDRA_CLK1 11
DDRA_CLK1# 11
DDRA_CKE1 11

DDRA_SCS0# 11
DDRA_SCS1# 11 DDRB_SCS1# 12

DDRA_ODT0 11 DDRB_ODT0 12
DDRA_ODT1 11 DDRB_ODT1 12

DDR_A_DM[0..7] 11

DDR_A_DQS#[0..7] 11

DDR_A_DQS[0..7] 11

DDR_A_MA[0..15] 11

DDR_B_BS012
DDR_B_BS112
DDR_B_BS212

DDR_B_CAS#12
DDR_B_RAS#12

DDR_B_WE#12

DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63

AF3
AG1

AK1
AG4
AG3

AH4
AK3

AK4
AM6
AN2

AK5

AK2
AM4
AM3

AP3
AN5

AT4
AN6
AN4
AN3

AT5

AT6
AN7

AP6

AP8

AT9

AT7

AP9

AR10
AT10

AB1

AC5

AC6

B5
A5
C3
B3
E4
A6
A4
C4
D1
D2
F2
F1
C2
F5
F3

G4

H6

G2

G1
G5

K2

M1

K5
K4

M4

N5

AJ3

AJ4

W5

R7

Y7

J6
J3

J2
J1
J5

L3

SB_DQ[0]
SB_DQ[1]
SB_DQ[2]
SB_DQ[3]
SB_DQ[4]
SB_DQ[5]
SB_DQ[6]
SB_DQ[7]
SB_DQ[8]
SB_DQ[9]
SB_DQ[10]
SB_DQ[11]
SB_DQ[12]
SB_DQ[13]
SB_DQ[14]
SB_DQ[15]
SB_DQ[16]
SB_DQ[17]
SB_DQ[18]
SB_DQ[19]
SB_DQ[20]
SB_DQ[21]
SB_DQ[22]
SB_DQ[23]
SB_DQ[24]
SB_DQ[25]
SB_DQ[26]
SB_DQ[27]
SB_DQ[28]
SB_DQ[29]
SB_DQ[30]
SB_DQ[31]
SB_DQ[32]
SB_DQ[33]
SB_DQ[34]
SB_DQ[35]
SB_DQ[36]
SB_DQ[37]
SB_DQ[38]
SB_DQ[39]
SB_DQ[40]
SB_DQ[41]
SB_DQ[42]
SB_DQ[43]
SB_DQ[44]
SB_DQ[45]
SB_DQ[46]
SB_DQ[47]
SB_DQ[48]
SB_DQ[49]
SB_DQ[50]
SB_DQ[51]
SB_DQ[52]
SB_DQ[53]
SB_DQ[54]
SB_DQ[55]
SB_DQ[56]
SB_DQ[57]
SB_DQ[58]
SB_DQ[59]
SB_DQ[60]
SB_DQ[61]
SB_DQ[62]
SB_DQ[63]

SB_BS[0]
SB_BS[1]
SB_BS[2]

SB_CAS#
SB_RAS#
SB_WE#

SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]

DDR SYSTEM MEMORY - B

DDR SYSTEM MEMORY - B

SB_CK[0]
SB_CK#[0]
SB_CKE[0]

SB_CK[1]
SB_CK#[1]
SB_CKE[1]

SB_CS#[0]
SB_CS#[1]

SB_ODT[0]
SB_ODT[1]

SB_DM[0]
SB_DM[1]
SB_DM[2]
SB_DM[3]
SB_DM[4]
SB_DM[5]
SB_DM[6]
SB_DM[7]

SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]

SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]

SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]

W8
W9
M3

V7
V6
M2

AB8
AD6

AC7
AD1

D4
E1
H3
K1
AH1
AL2
AR4
AT8

DDR_B_DM0
DDR_B_DM1
DDR_B_DM2
DDR_B_DM3
DDR_B_DM4
DDR_B_DM5
DDR_B_DM6
DDR_B_DM7

DDRB_CLK0# 12

DDRB_CLK1 12
DDRB_CLK1# 12
DDRB_CKE1 12

DDRB_SCS0# 12

DDR_B_DM[0..7] 12

Unused by Clarksfield rPGA989

D5
F4
J4
L4
AH2
AL4
AR5
AR8

C5
E3
H4
M5
AG2
AL5
AP5
AR7

U5
V2
T5
V3
R1
T8
R2
R6
R4
R5
AB5
P3
R3
AF7
P5
N1

DDR_B_DQS#0
DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#5
DDR_B_DQS#6
DDR_B_DQS#7

DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7

DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8

DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
DDR_B_MA14
DDR_B_MA15

DDR_B_DQS#[0..7] 12

DDR_B_DQS[0..7] 12

DDR_B_MA[0..15] 12

IC,AUB_CFD_rPGA,R0P9

IC,AUB_CFD_rPGA,R0P9
@

@

A A

Security Classification

Security Classification

Security Classification

2009/10/01 2010/10/01

2009/10/01 2010/10/01

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/10/01 2010/10/01

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

IC,AUB_CFD_rPGA,R0P9

IC,AUB_CFD_rPGA,R0P9
@

@

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC,MB A6042

SCHEMATIC,MB A6042

SCHEMATIC,MB A6042

401849

401849

401849

758Tuesday, May 18, 2010

758Tuesday, May 18, 2010

758Tuesday, May 18, 2010

1

B

B

B

of

of

of

5

4

3

2

1

Material Note (+VTT):

JCPUF

JCPUF

+CPU_CORE

D D

C C

B B

A A

Clarksfield: 65A Clarksfield: 21A
Auburndale:48A

AG35

VCC1

AG34

VCC2

AG33

VCC3

AG32

VCC4

AG31

VCC5

AG30

VCC6

AG29

VCC7

AG28

VCC8

AG27

VCC9

AG26

VCC10

AF35

VCC11

AF34

VCC12

AF33

VCC13

AF32

VCC14

AF31

VCC15

AF30

VCC16

AF29

VCC17

AF28

VCC18

AF27

VCC19

AF26

VCC20

AD35

VCC21

AD34

VCC22

AD33

VCC23

AD32

VCC24

AD31

VCC25

AD30

VCC26

AD29

VCC27

AD28

VCC28

AD27

VCC29

AD26

VCC30

AC35

VCC31

AC34

VCC32

AC33

VCC33

AC32

VCC34

AC31

VCC35

AC30

VCC36

AC29

VCC37

AC28
AC27
AC26
AA35
AA34
AA33
AA32
AA31
AA30
AA29
AA28
AA27
AA26

VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50

Y35

VCC51

Y34

VCC52

Y33

VCC53

Y32

VCC54

Y31

VCC55

Y30

VCC56

Y29

VCC57

Y28

VCC58

Y27

VCC59

Y26

VCC60

V35

VCC61

V34

VCC62

V33

VCC63

V32

VCC64

V31

VCC65

V30

VCC66

V29

VCC67

V28

VCC68

V27

VCC69

V26

VCC70

U35

VCC71

U34

VCC72

U33

VCC73

U32

VCC74

U31

VCC75

U30

VCC76

U29

VCC77

U28

VCC78

U27

VCC79

U26

VCC80

R35

VCC81

R34

VCC82

R33

VCC83

R32

VCC84

R31

VCC85

R30

VCC86

R29

VCC87

R28

VCC88

R27

VCC89

R26

VCC90

P35

VCC91

P34

VCC92

P33

VCC93

P32

VCC94

P31

VCC95

P30

VCC96

P29

VCC97

P28

VCC98

P27

VCC99

P26

VCC100

CPU CORE SUPPLY

CPU CORE SUPPLY

POWER

POWER

SENSE LINES

SENSE LINES

Auburndale:18A

VTT0_1
VTT0_2
VTT0_3
VTT0_4
VTT0_5
VTT0_6
VTT0_7
VTT0_8

VTT0_9
VTT0_10
VTT0_11
VTT0_12
VTT0_13
VTT0_14
VTT0_15
VTT0_16
VTT0_17
VTT0_18
VTT0_19
VTT0_20
VTT0_21
VTT0_22
VTT0_23
VTT0_24
VTT0_25
VTT0_26
VTT0_27
VTT0_28
VTT0_29
VTT0_30
VTT0_31

1.1V RAIL POWER

1.1V RAIL POWER

VTT0_32

VTT0_33
VTT0_34
VTT0_35
VTT0_36
VTT0_37
VTT0_38
VTT0_39
VTT0_40
VTT0_41
VTT0_42
VTT0_43
VTT0_44

PSI#

VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]

PROC_DPRSLPVR

CPU VIDS

CPU VIDS

VTT_SELECT

ISENSE

VCC_SENSE
VSS_SENSE

VTT_SENSE

VSS_SENSE_VTT

AH14
AH12
AH11
AH10
J14
J13
H14
H12
G14
G13
G12
G11
F14
F13
F12
F11
E14
E12
D14
D13
D12
D11
C14
C13
C12
C11
B14
B12
A14
A13
A12
A11

AF10
AE10
AC10
AB10
Y10
W10
U10
T10
J12
J11
J16
J15

AN33

AK35
AK33
AK34
AL35
AL33
AM33
AM35
AM34

G15

AN35

AJ34
AJ35

B15
A15

330uF/ 6mohm, number are 3,
power x1, HW x2

(Place these capacitors under CPU socket Edge, top layer) (Place these capacitors between inductor and socket on Bottom)

+

+

C144 330U_2.5V_M_R15

C144 330U_2.5V_M_R15

1 2

C159 390U_2.5V_M_R10

C159 390U_2.5V_M_R10

1 2

+

+

C87 22U_0805_6.3V6MC87 22U_0805_6.3V6M

1 2

C91 22U_0805_6.3V6MC91 22U_0805_6.3V6M

1 2

H_PSI# 53

CPU_VID0 53
CPU_VID1 53
CPU_VID2 53
CPU_VID3 53
CPU_VID4 53
CPU_VID5 53

H_DPRSLPVR_R

VCCSENSE_R

1 2

R62 0_0402_5%R62 0_0402_5%

R65 0_0402_5%R65 0_0402_5%

1 2

R66 0_0402_5%R66 0_0402_5%

1 2

VTT_SENSE 49
VSS_SENSE_VTT 49

CPU_VID6 53
H_DPRSLPVR 53

H_VTTSELECT 49

IMVP_IMON 53

+VTT

C81 10U_0805_10V4KC81 10U_0805_10V4K

1 2

C83 10U_0805_10V4KC83 10U_0805_10V4K

1 2

C85 10U_0805_10V4KC85 10U_0805_10V4K

1 2

C89 10U_0805_10V4KC89 10U_0805_10V4K

1 2

C88 10U_0805_10V4KC88 10U_0805_10V4K

1 2

C90 10U_0805_10V4KC90 10U_0805_10V4K

1 2

C92 10U_0805_10V4KC92 10U_0805_10V4K

1 2

C94 10U_0805_10V4K@C94 10U_0805_10V4K@

1 2

+CPU_CORE

22U_0805_6.3V6M

22U_0805_6.3V6M

1

C150

C150

C128

C128

2

22U_0805_6.3V6M

22U_0805_6.3V6M

CRB default setting:
VID[6:0]=[0100111]

VTT Rail

Auburndale +1.1VS_VTT=1.05V
Clarksfield +1.1VS_VTT=1.1V

H_VTTSELECT = low, 1.1V
H_VTTSELECT = high, 1.05V

1 2

R64 100_0402_1%R64 100_0402_1%

VCCSENSE
VSSSENSEVSSSENSE_R

1 2

R67 100_0402_1%R67 100_0402_1%

near CPU

5/25: Add for power team request.

22U_0805_6.3V6M

1

1

C158

C158

2

2

22U_0805_6.3V6M

22U_0805_6.3V6M

+CPU_CORE

VCCSENSE 53
VSSSENSE 53

22U_0805_6.3V6M

1

C118

C118

2

22U_0805_6.3V6M

22U_0805_6.3V6M

C119

C119

22U_0805_6.3V6M

22U_0805_6.3V6M

1

C127

C127

2

22U_0805_6.3V6M

22U_0805_6.3V6M

1

C117

C117

2

1

1

C129

C129

2

2

22U_0805_6.3V6M

22U_0805_6.3V6M

+CPU_CORE

10U_0805_10V4K

10U_0805_10V4K

1

C71

C71

2

10U_0805_10V4K

10U_0805_10V4K

1

C72

C72

2

10U_0805_10V4K

10U_0805_10V4K

10U_0805_10V4K

10U_0805_10V4K

1

C73

C73

2

1

2

1

C75

C75

C74

C74

2

10U_0805_10V4K

10U_0805_10V4K

10U_0805_10V4K

10U_0805_10V4K

1

C76

C76

2

10U_0805_10V4K

10U_0805_10V4K

(Place these capacitors under CPU socket, top layer)

+CPU_CORE

10U_0805_10V4K

10U_0805_10V4K

1

C98

C98

2

10U_0805_10V4K

10U_0805_10V4K

1

C99

C99

2

10U_0805_10V4K

10U_0805_10V4K

10U_0805_10V4K

10U_0805_10V4K

1

C100

C100

2

1

C101

C101

2

10U_0805_10V4K

10U_0805_10V4K

10U_0805_10V4K

10U_0805_10V4K

1

C102

C102

2

(Place these capacitors on CPU cavity, Bottom Layer)

+CPU_CORE

22U_0805_6.3V6M

22U_0805_6.3V6M

1

C106

C106

C105

C105

2

22U_0805_6.3V6M

22U_0805_6.3V6M

+CPU_CORE

22U_0805_6.3V6M

22U_0805_6.3V6M

1

C112

C112

C111

C111

2

22U_0805_6.3V6M

22U_0805_6.3V6M

1

1

C107

C107

2

2

22U_0805_6.3V6M

22U_0805_6.3V6M

1

1

C113

C113

2

2

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

1

C108

C108

2

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

1

C114

C114

2

22U_0805_6.3V6M

22U_0805_6.3V6M

C109

C109

C115

C115

22U_0805_6.3V6M

22U_0805_6.3V6M

1

1

C110

C110

2

2

22U_0805_6.3V6M

22U_0805_6.3V6M

1

1

C116

C116

2

2

TOP side (under inductor)

+CPU_CORE

330U_D2_2.5VY_R9M

330U_D2_2.5VY_R9M

1

+

+

C124

C121

C121
330U_D2_2.5VY_R9M

330U_D2_2.5VY_R9M

C124

2

1

+

+

C122

C122

330U_D2_2.5VY_R9M

330U_D2_2.5VY_R9M

2

330U_D2_2.5VY_R9M

330U_D2_2.5VY_R9M

1

+

+

C123

C123

2

1

+

+

2

Check list:

+CPU_CORE: 4x 470uF, 12x 22uF, 16x 10uF
+VTT: 4x 330uF, 7x 22uF, 8x 10uF

10U_0805_10V4K

10U_0805_10V4K

1

1

C77

C77

2

2

1

1

C103

C103

C104

C104

2

2

10U_0805_10V4K

10U_0805_10V4K

1

C78

C78

C79

C79

2

10U_0805_10V4K

10U_0805_10V4K

IC,AUB_CFD_rPGA,R0P9

IC,AUB_CFD_rPGA,R0P9
@

@

5

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/10/01 2010/10/01

2009/10/01 2010/10/01

2009/10/01 2010/10/01

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC,MB A6042

SCHEMATIC,MB A6042

SCHEMATIC,MB A6042

401849

401849

401849

1

858Tuesday, May 18, 2010

858Tuesday, May 18, 2010

858Tuesday, May 18, 2010

B

B

B

of

of

of

5

4

3

2

1

8

D

7

D

6

D

5

D

PS@

PS@
R417

R417
820K_0402_5%

820K_0402_5%

+1.5V+1.5V_CPU

61

+1.5V

PS@

PS@
R418

R418

1 2

220K_0402_5%

220K_0402_5%

PS@

PS@
Q46A

Q46A
2N7002KDW_SOT363-6

2N7002KDW_SOT363-6

SUSP

2

+VSB

SUSP 44,52

PS@

PS@
Q33

Q33

1

S

2

1

2

@PJ30

@

112

@PJ31

@

112

S

3

S

4

G

FDS6676AS_SO8

FDS6676AS_SO8

12

PS@

PS@

PS@
R424

R424

470_0805_5%

470_0805_5%

1 2

PS@

D D

JCPUG

JCPUG

AT21

VAXG1

AT19

VAXG2

AT18

VAXG3

AT16

VAXG4

AR21

R86

R86
0_0402_5%

0_0402_5%

1 2

C C

+VTT

1

2

1

C142

C142
22U_0805_6.3V6M

22U_0805_6.3V6M

2

C141

C141

22U_0805_6.3V6M

B B

22U_0805_6.3V6M

AR19
AR18
AR16
AP21
AP19
AP18
AP16
AN21
AN19
AN18
AN16
AM21
AM19
AM18
AM16

AL21
AL19
AL18

AL16
AK21
AK19
AK18
AK16

AJ21

AJ19

AJ18

AJ16
AH21
AH19
AH18
AH16

H25

VAXG5
VAXG6
VAXG7
VAXG8
VAXG9
VAXG10
VAXG11
VAXG12
VAXG13
VAXG14
VAXG15
VAXG16
VAXG17
VAXG18
VAXG19
VAXG20
VAXG21
VAXG22
VAXG23
VAXG24
VAXG25
VAXG26
VAXG27
VAXG28
VAXG29
VAXG30
VAXG31
VAXG32
VAXG33
VAXG34
VAXG35
VAXG36

J24

VTT1_45

J23

VTT1_46
VTT1_47

GRAPHICS

GRAPHICS

Clarksfield: 5A
Auburndale:3A

FDI PEG & DMI

FDI PEG & DMI

POWER

POWER

VAXG_SENSE

VSSAXG_SENSE

SENSE

LINES

SENSE

LINES

GFX_VID[0]
GFX_VID[1]
GFX_VID[2]
GFX_VID[3]
GFX_VID[4]
GFX_VID[5]
GFX_VID[6]

GFX_VR_EN

GFX_DPRSLPVR

GFX_IMON

GRAPHICS VIDs

GRAPHICS VIDs

DDR3 - 1.5V RAILS

DDR3 - 1.5V RAILS

Clarksfield: 21A

+VTT

1

2

1

C147

C147
22U_0805_6.3V6M

22U_0805_6.3V6M

2

C146

C146

22U_0805_6.3V6M

22U_0805_6.3V6M

(Place these capacitors under CPU socket, top layer)

G28
G27
G26

K26

H27

F26
E26
E25

VTT1_48

J27

VTT1_49

J26

VTT1_50

J25

VTT1_51
VTT1_52
VTT1_53
VTT1_54
VTT1_55
VTT1_56
VTT1_57
VTT1_58

Auburndale:18A

Clarksfield: 1.35A

1.1V1.8V

1.1V1.8V

Auburndale: 1.35A

IC,AUB_CFD_rPGA,R0P9

IC,AUB_CFD_rPGA,R0P9
@

A A

@

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8

VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VDDQ16
VDDQ17
VDDQ18

VTT0_59
VTT0_60
VTT0_61
VTT0_62

VTT1_63
VTT1_64
VTT1_65
VTT1_66
VTT1_67
VTT1_68

VCCPLL1
VCCPLL2
VCCPLL3

AR22
AT22

AM22
AP22
AN22
AP23
AM23
AP24
AN24

AR25
AT25
AM24

AJ1
AF1
AE7
AE4
AC1
AB7
AB4
Y1
W7
W4
U1
T7
T4
P1
N7
N4
L1
H1

P10
N10
L10
K10

J22
J20
J18
H21
H20
H19

L26
L27
M26

1U_0402_6.3V4Z

1U_0402_6.3V4Z

R687 1K_0402_5%R687 1K_0402_5%

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

C133

C133

C134

C134

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

+VTT

1

C143

C143
10U_0805_10V4K

10U_0805_10V4K

2

1

C145

C145
22U_0805_6.3V6M

22U_0805_6.3V6M

2

+1.8VS_H_PLL

C151

C151

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

2

1

2

12

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

1

C135

C135

C136

C136

2

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

(Place these capacitors under CPU socket Edge, top layer)

+VTT

(Place these capacitors under CPU socket, top layer)

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

1

C152

C152

C153

C153

2

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z

1

1

C137

C137

2

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

C154

C154

2N7002KDW_SOT363-6

2N7002KDW_SOT363-6

22U_0805_6.3V6M

22U_0805_6.3V6M

C138

C138

1

2

PS@
Q46B

Q46B

SUSP

1

1

C139

C139

2

2

22U_0805_6.3V6M

22U_0805_6.3V6M

R71 0_0805_5%R71 0_0805_5%

C155

C155
22U_0805_6.3V6M

22U_0805_6.3V6M

5

+1.5V_CPU

1

+

+

2

12

3

4

PS@

1

C179

C179
10U_0805_10V4K

10U_0805_10V4K

2

0.1U_0402_25V6

0.1U_0402_25V6

C205 0.1U_0402_16V4ZC205 0.1U_0402_16V4Z

1 2

C186 0.1U_0402_16V4ZC186 0.1U_0402_16V4Z

1 2

C185 0.1U_0402_16V4ZC185 0.1U_0402_16V4Z

1 2

C180 0.1U_0402_16V4ZC180 0.1U_0402_16V4Z

1 2

2

2

C216

C216
390U_2.5V_M_R10

390U_2.5V_M_R10

+1.8VS

PS@

PS@
C472

C472

PJ30

JUMP_43X79

JUMP_43X79

PJ31

JUMP_43X79

JUMP_43X79

Security Classification

Security Classification

Security Classification

2009/10/01 2010/10/01

2009/10/01 2010/10/01

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/10/01 2010/10/01

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC,MB A6042

SCHEMATIC,MB A6042

SCHEMATIC,MB A6042

401849

401849

401849

958Tuesday, May 18, 2010

958Tuesday, May 18, 2010

958Tuesday, May 18, 2010

1

B

B

B

of

of

of

5

JCPUI

JCPUI

K27

VSS161

K9

VSS162

K6

VSS163

D D

C C

B B

K3

VSS164

J32

VSS165

J30

VSS166

J21

VSS167

J19

VSS168

H35

VSS169

H32

VSS170

H28

VSS171

H26

VSS172

H24

VSS173

H22

VSS174

H18

VSS175

H15

VSS176

H13

VSS177

H11

VSS178

H8

VSS179

H5

VSS180

H2

VSS181

G34

VSS182

G31

VSS183

G20

VSS184

G9

VSS185

G6

VSS186

G3

VSS187

F30

VSS188

F27

VSS189

F25

VSS190

F22

VSS191

F19

VSS192

F16

VSS193

E35

VSS194

E32

VSS195

E29

VSS196

E24

VSS197

E21

VSS198

E18

VSS199

E13

VSS200

E11

VSS201

E8

VSS202

E5

VSS203

E2

VSS204

D33

VSS205

D30

VSS206

D26

VSS207

D9

VSS208

D6

VSS209

D3

VSS210

C34

VSS211

C32

VSS212

C29

VSS213

C28

VSS214

C24

VSS215

C22

VSS216

C20

VSS217

C19

VSS218

C16

VSS219

B31

VSS220

B25

VSS221

B21

VSS222

B18

VSS223

B17

VSS224

B13

VSS225

B11

VSS226

B8

VSS227

B6

VSS228

B4

VSS229

A29

VSS230

A27

VSS231

A23

VSS232

A9

VSS233

IC,AUB_CFD_rPGA,R0P9

IC,AUB_CFD_rPGA,R0P9
@

@

VSS

VSS

NCTF

NCTF

VSS_NCTF1
VSS_NCTF2
VSS_NCTF3
VSS_NCTF4
VSS_NCTF5
VSS_NCTF6
VSS_NCTF7

AT35
AT1
AR34
B34
B2
B1
A35

H_NCTF1
H_NCTF2

H_NCTF6
H_NCTF7

PADT4PAD
PADT5PAD

PADT6PAD
PADT7PAD

4

JCPUH

JCPUH

AT20

VSS1

AT17

VSS2

AR31

VSS3

AR28

VSS4

AR26

VSS5

AR24

VSS6

AR23

VSS7

AR20

VSS8

AR17

VSS9

AR15

VSS10

AR12

VSS11

AR9

VSS12

AR6

VSS13

AR3

VSS14

AP20

VSS15

AP17

VSS16

AP13

VSS17

AP10

VSS18

AP7

VSS19

AP4

VSS20

AP2

VSS21

AN34

VSS22

AN31

VSS23

AN23

VSS24

AN20

VSS25

AN17

VSS26

AM29

VSS27

AM27

VSS28

AM25

VSS29

AM20

VSS30

AM17

VSS31

AM14

VSS32

AM11

VSS33

AM8

VSS34

AM5

VSS35

AM2

VSS36

AL34

VSS37

AL31

VSS38

AL23

VSS39

AL20

VSS40

AL17

VSS41

AL12

VSS42

AL9

VSS43

AL6

VSS44

AL3

VSS45

AK29

T4
T5

T6
T7

VSS46

AK27

VSS47

AK25

VSS48

AK20

VSS49

AK17

VSS50

AJ31

VSS51

AJ23

VSS52

AJ20

VSS53

AJ17

VSS54

AJ14

VSS55

AJ11

VSS56

AJ8

VSS57

AJ5

VSS58

AJ2

VSS59

AH35

VSS60

AH34

VSS61

AH33

VSS62

AH32

VSS63

AH31

VSS64

AH30

VSS65

AH29

VSS66

AH28

VSS67

AH27

VSS68

AH26

VSS69

AH20

VSS70

AH17

VSS71

AH13

VSS72

AH9

VSS73

AH6

VSS74

AH3

VSS75

AG10

VSS76

AF8

VSS77

AF4

VSS78

AF2

VSS79

AE35

VSS80

IC,AUB_CFD_rPGA,R0P9

IC,AUB_CFD_rPGA,R0P9
@

@

VSS

VSS

VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98

VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160

3

AE34
AE33
AE32
AE31
AE30
AE29
AE28
AE27
AE26
AE6
AD10
AC8
AC4
AC2
AB35
AB34
AB33
AB32
AB31
AB30
AB29
AB28
AB27
AB26
AB6
AA10
Y8
Y4
Y2
W35
W34
W33
W32
W31
W30
W29
W28
W27
W26
W6
V10
U8
U4
U2
T35
T34
T33
T32
T31
T30
T29
T28
T27
T26
T6
R10
P8
P4
P2
N35
N34
N33
N32
N31
N30
N29
N28
N27
N26
N6
M10
L35
L32
L29
L8
L5
L2
K34
K33
K30

2

+VREF_DQA_M3
+VREF_DQB_M3

WW41 Recommend not pull down
PCIE2.0 Jitter is over on ES1

R743.01K_0402_1% @R743.01K_0402_1% @

1 2

R753.01K_0402_1% @R753.01K_0402_1% @

1 2

R763.01K_0402_1% @R763.01K_0402_1% @

1 2

Reserve via for test

T43PAD T43PAD
T44PAD T44PAD

CFG0 - PCI-Express Configuration Select

*1:Single PEG
0:Bifurcation enabled

CFG3 - PCI-Express Static Lane Reversal

*1 :Normal Operation
0 :Lane Numbers Reversed
15 -> 0, 14 -> 1, ...

CFG4 - Display Port Presence

*1:Disabled; No Physical Display Port
attached to Embedded Display Port
0:Enabled; An external Display Port
device is connected to the Embedded
Display Port

CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11

CFG13
CFG14
CFG15
CFG16
CFG17
CFG18

RSVD17
RSVD18

JCPUE

JCPUE

AP25

RSVD1

AL25

RSVD2

AL24

RSVD3

AL22

RSVD4

AJ33

RSVD5

AG9

RSVD6

M27

RSVD7

L28

RSVD8

J17

RSVD9

H17

RSVD10

G25

RSVD11

G17

RSVD12

E31

RSVD13

E30

RSVD14

AM30

CFG[0]

AM28

CFG[1]

AP31

CFG[2]

AL32

CFG[3]

AL30

CFG[4]

AM31

CFG[5]

AN29

CFG[6]

AM32

CFG[7]

AK32

CFG[8]

AK31

CFG[9]

AK28

CFG[10]

AJ28

CFG[11]

AN30

CFG[12]

AN32

CFG[13]

AJ32

CFG[14]

AJ29

CFG[15]

AJ30

CFG[16]

AK30

CFG[17]

H16

RSVD_TP_86

B19

RSVD15

A19

RSVD16

A20

RSVD17

B20

RSVD18

U9

RSVD19

T9

RSVD20

AC9

RSVD21

AB9

RSVD22

C1

RSVD_NCTF_23

A3

RSVD_NCTF_24

J29

RSVD26

J28

RSVD27

A34

RSVD_NCTF_28

A33

RSVD_NCTF_29

C35

RSVD_NCTF_30

B35

RSVD_NCTF_31

IC,AUB_CFD_rPGA,R0P9

IC,AUB_CFD_rPGA,R0P9
@

@

(SA_DIMM_VREF)
(SB_DIMM_VREF)

RSVD32
RSVD33

RSVD34
RSVD35

RSVD36

RSVD_NCTF_37

RSVD38
RSVD39

RSVD_NCTF_40
RSVD_NCTF_41

RSVD_NCTF_42
RSVD_NCTF_43

RSVD45
RSVD46
RSVD47
RSVD48
RSVD49
RSVD50
RSVD51
RSVD52

RSVD53
RSVD_NCTF_54
RSVD_NCTF_55
RSVD_NCTF_56
RSVD_NCTF_57

RSVD58

RSVD_TP_59
RSVD_TP_60

RESERVED

RESERVED

RSVD62

RSVD63

RSVD64

RSVD65

RSVD_TP_66
RSVD_TP_67
RSVD_TP_68
RSVD_TP_69
RSVD_TP_70
RSVD_TP_71
RSVD_TP_72
RSVD_TP_73
RSVD_TP_74
RSVD_TP_75

RSVD_TP_76
RSVD_TP_77
RSVD_TP_78
RSVD_TP_79
RSVD_TP_80
RSVD_TP_81
RSVD_TP_82
RSVD_TP_83
RSVD_TP_84
RSVD_TP_85

1

AJ13
AJ12

AH25
AK26

AL26
AR2

AJ26
AJ27

AP1
AT2

AT3
AR1

AL28
AL29
AP30
AP32
AL27
AT31
AT32
AP33
AR33
AT33
AT34
AP35
AR35
AR32

E15
F15
A2

KEY

D15
C15
AJ15
AH15

Reserve via
for test

AA5
AA4
R8
AD3
AD2
AA2
AA1
R9
AG7
AE3

V4
V5
N2
AD5
AD7
W3
W2
N3
AE5
AD9

AP34

VSS

RSVD64
RSVD65

*:Default

A A

Security Classification

Security Classification

Security Classification

2009/10/01 2010/10/01

2009/10/01 2010/10/01

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/10/01 2010/10/01

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.
SCHEMATIC,MB A6042

SCHEMATIC,MB A6042

SCHEMATIC,MB A6042
401849

401849

401849

10 58Tuesday, May 18, 2010

10 58Tuesday, May 18, 2010

10 58Tuesday, May 18, 2010

1

B

B

B

of

of

of

5

+VREF_DQA

1

C157

C157

C156

C156

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

D D

close to JDDRH.1

C C

B B

A A

+3VS

C181

C181

DDR_A_BS27

DDRA_CLK07
DDRA_CLK0#7

DDR_A_BS07

DDR_A_WE#7

DDR_A_CAS#7

DDRA_SCS1#7

1

C182

C182

2

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z

1

2

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z

R90

R90
10K_0402_5%

10K_0402_5%

1

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

5

DDR_A_D0
DDR_A_D1

DDR_A_DM0
DDR_A_D2

DDR_A_D3
DDR_A_D8

DDR_A_D9
DDR_A_DQS#1

DDR_A_DQS1
DDR_A_D10

DDR_A_D11
DDR_A_D16

DDR_A_D17
DDR_A_DQS#2

DDR_A_DQS2
DDR_A_D18

DDR_A_D19
DDR_A_D24

DDR_A_D25
DDR_A_DM3
DDR_A_D26

DDR_A_D27

DDR_A_MA12
DDR_A_MA9

DDR_A_MA8
DDR_A_MA5

DDR_A_MA3
DDR_A_MA1

DDR_A_MA10

DDR_A_MA13

DDR_A_D32
DDR_A_D33

DDR_A_DQS#4
DDR_A_DQS4

DDR_A_D34
DDR_A_D35

DDR_A_D40
DDR_A_D41

DDR_A_DM5
DDR_A_D42

DDR_A_D43
DDR_A_D48

DDR_A_D49
DDR_A_DQS#6

DDR_A_DQS6
DDR_A_D50

DDR_A_D51
DDR_A_D56

DDR_A_D57
DDR_A_DM7
DDR_A_D58

DDR_A_D59

1 2

R91

R91

+0.75VS

12

10K_0402_5%

10K_0402_5%

+1.5V

JDDRH

JDDRH

1

VREF_DQ

3

VSS

5

DQ0

7

DQ1

9

VSS

11

DM0

13

VSS

15

DQ2

17

DQ3

19

VSS

21

DQ8

23

DQ9

25

VSS

27

DQS1#

29

DQS1

31

VSS

33

DQ10

35

DQ11

37

VSS

39

DQ16

41

DQ17

43

VSS

45

DQS2#

47

DQS2

49

VSS

51

DQ18

53

DQ19

55

VSS

57

DQ24

59

DQ25

61

VSS

63

DM3

65

VSS

67

DQ26

69

DQ27

71

VSS

73

CKE0

75

VDD

77

NC

79

BA2

81

VDD

83

A12/BC#

85

A9

87

VDD

89

A8

91

A5

93

VDD

95

A3

97

A1

99

VDD

101

CK0

103

CK0#

105

VDD

107

A10/AP

109

BA0

111

VDD

113

WE#

115

CAS#

117

VDD

119

A13

121

S1#

123

VDD

125

TEST
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SA0
VDDSPD
SA1
VTT

GND1
GND2

VREF_CA

127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
203

205
207

FOX_AS0A626-U2SN-7F_204P

FOX_AS0A626-U2SN-7F_204P
@

@

VSS
DQ4
DQ5
VSS

DQS0#

DQS0

VSS
DQ6
DQ7

VSS
DQ12
DQ13

VSS

DM1

RESET#

VSS
DQ14
DQ15

VSS
DQ20
DQ21

VSS

DM2

VSS
DQ22
DQ23

VSS
DQ28
DQ29

VSS

DQS3#

DQS3

VSS
DQ30
DQ31

VSS

CKE1

VDD

VDD

VDD

VDD

VDD

CK1

CK1#

VDD

BA1

RAS#

VDD
ODT0

VDD
ODT1

VDD

VSS
DQ36
DQ37

VSS

DM4

VSS
DQ38
DQ39

VSS
DQ44
DQ45

VSS

DQS5#

DQS5

VSS
DQ46
DQ47

VSS
DQ52
DQ53

VSS

DM6

VSS
DQ54
DQ55

VSS
DQ60
DQ61

VSS

DQS7#

DQS7

VSS
DQ62
DQ63

VSS

EVENT#

SDA

SCL
VTT

BOSS1
BOSS2

A15
A14

A11

S0#

A7
A6

A4
A2

A0

NC

4

+1.5V

2

DDR_A_D4

4

DDR_A_D5

6
8

DDR_A_DQS#0

10

DDR_A_DQS0

12
14

DDR_A_D6

16

DDR_A_D7

18
20

DDR_A_D12

22

DDR_A_D13

24
26

DDR_A_DM1

28
30
32

DDR_A_D14

34

DDR_A_D15

36
38

DDR_A_D20

40

DDR_A_D21

42
44

DDR_A_DM2

46
48

DDR_A_D22

50

DDR_A_D23

52
54

DDR_A_D28

56

DDR_A_D29

58
60

DDR_A_DQS#3

62

DDR_A_DQS3

64
66

DDR_A_D30

68

DDR_A_D31

70
72

74
76

DDR_A_MA15

78

DDR_A_MA14

80
82

DDR_A_MA11

84

DDR_A_MA7

86
88

DDR_A_MA6

90

DDR_A_MA4

92
94

DDR_A_MA2

96

DDR_A_MA0

98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204

206
208

+DDR_VREF_CA_DIMMA

DDR_A_D36
DDR_A_D37

DDR_A_DM4
DDR_A_D38

DDR_A_D39
DDR_A_D44

DDR_A_D45
DDR_A_DQS#5

DDR_A_DQS5
DDR_A_D46

DDR_A_D47
DDR_A_D52

DDR_A_D53
DDR_A_DM6
DDR_A_D54

DDR_A_D55
DDR_A_D60

DDR_A_D61
DDR_A_DQS#7

DDR_A_DQS7
DDR_A_D62

DDR_A_D63

+0.75VS

4

DDR3 SO-DIMM A
Reverse Type

+1.5V

12

R80

R80
1K_0402_1%

1K_0402_1%
PS@

PS@

For S3 Reduce

DDRA_CKE1 7DDRA_CKE07

DDRA_CLK1 7
DDRA_CLK1# 7

DDR_A_BS1 7
DDR_A_RAS# 7

DDRA_SCS0# 7
DDRA_ODT0 7

DDRA_ODT1 7

C161

C161

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z

close to JDDRH.126

PM_EXTTS# 5,12

PM_SMBDATA 12,22,26,36
PM_SMBCLK 12,22,26,36

+V_DDR3_DIMM_REF

R89

R89

1 2

0_0402_5%

0_0402_5%

1

1

C162

C162

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

DDR_A_DQS[0..7]7

DDR_A_DQS#[0..7]7

DDR_A_D[0..63]7

DDR_A_DM[0..7]7

DDR_A_MA[0..15]7

SM_DRAMRST# 5,12

M3 is for Clarksfield

M3@

M3@

R94 0_0402_5%

R94 0_0402_5%

+VREF_DQA_M3

100K_0402_5%

100K_0402_5%

+VREF_DQB_M3

100K_0402_5%

100K_0402_5%

+1.5V

2009/10/01 2010/10/01

2009/10/01 2010/10/01

2009/10/01 2010/10/01

3

12

PSM3@

PSM3@

R122

R122

12

PSM3@

PSM3@

R121

R121

Layout Note:
Place near JDDRH

+

+

C217 390U_2.5V_M_R10

C217 390U_2.5V_M_R10

1 2

C166 10U_0805_6.3V6MC166 10U_0805_6.3V6M

1 2

C168 10U_0805_6.3V6MC168 10U_0805_6.3V6M

1 2

C171 10U_0805_6.3V6MC171 10U_0805_6.3V6M

1 2

C174 10U_0805_6.3V6MC174 10U_0805_6.3V6M

1 2

C176 10U_0805_6.3V6MC176 10U_0805_6.3V6M

1 2

C178 10U_0805_6.3V6MC178 10U_0805_6.3V6M

1 2

Compal Secret Data

Compal Secret Data

Compal Secret Data

12

Q40

PSM3@

Q40

PSM3@

2N7002_SOT23-3

2N7002_SOT23-3

D

S

D

S

13

G

G

2

RST_GATE

M3@

M3@

Q39

PSM3@

Q39

PSM3@

2N7002_SOT23-3

2N7002_SOT23-3

D

S

D

S

13

G

G

2

Deciphered Date

Deciphered Date

Deciphered Date

12

R95 0_0402_5%

R95 0_0402_5%

2

+1.5V

12

PSM3@

PSM3@
R84

R84

1K_0402_1%

1K_0402_1%

12

PSM3@

PSM3@

R111

R111

1K_0402_1%

1K_0402_1%

+1.5V

12

PSM3@

PSM3@

R114

R114

1K_0402_1%

1K_0402_1%

12

PSM3@

PSM3@

R115

R115

1K_0402_1%

RST_GATE 5,30

Layout Note: Place these 4 Caps near
Command and Control signals of DIMMA

+1.5V +0.75VS

1K_0402_1%

C164 0.1U_0402_16V4ZC164 0.1U_0402_16V4Z

1 2

C167 0.1U_0402_16V4ZC167 0.1U_0402_16V4Z

1 2

C170 0.1U_0402_16V4ZC170 0.1U_0402_16V4Z

1 2

C173 0.1U_0402_16V4ZC173 0.1U_0402_16V4Z

1 2

C255 68P_0402_50V8JC255 68P_0402_50V8J

1 2

+VREF_DQA

+VREF_DQB

M1@

M1@

M1@

M1@

For EMI Request

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

2

Date: Sheet

1

12

R920_0402_5%

R920_0402_5%

+V_DDR3_DIMM_REF

12

R930_0402_5%

R930_0402_5%

Layout Note:
Place near JDDRH1.203 and 204

C165 10U_0805_6.3V6MC165 10U_0805_6.3V6M

1 2

C169 1U_0402_6.3V4ZC169 1U_0402_6.3V4Z

12

C172 1U_0402_6.3V4ZC172 1U_0402_6.3V4Z

12

C175 1U_0402_6.3V4ZC175 1U_0402_6.3V4Z

12

C177 1U_0402_6.3V4ZC177 1U_0402_6.3V4Z

12

C256 68P_0402_50V8JC256 68P_0402_50V8J

1 2

For EMI Request

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

SCHEMATIC,MB A6042

SCHEMATIC,MB A6042

SCHEMATIC,MB A6042

401849

401849

401849

11 58Tuesday, May 18, 2010

11 58Tuesday, May 18, 2010

11 58Tuesday, May 18, 2010

1

+1.5V

12

12

R79

R79

1K_0402_1%

1K_0402_1%

R81

R81

1K_0402_1%

1K_0402_1%

of

of

of

B

B

B

A

+VREF_DQB

1

2

C183

C183

2.2U_0603_6.3V4Z

1 1

2.2U_0603_6.3V4Z

close to JDDRL.1

2 2

3 3

4 4

DDRB_CKE07

DDR_B_BS27

DDRB_CLK07
DDRB_CLK0#7

DDR_B_WE#7
DDR_B_CAS#7

DDRB_SCS1#7

+3VS

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z

1

C207

C207

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C208

C208

2

1

2

C184

C184

0.1U_0402_16V4Z

0.1U_0402_16V4Z

R98

R98
10K_0402_5%

10K_0402_5%

R99

R99

1 2

10K_0402_5%

10K_0402_5%

DDR_B_D0
DDR_B_D1

DDR_B_DM0
DDR_B_D2

DDR_B_D3
DDR_B_D8

DDR_B_D9
DDR_B_DQS#1

DDR_B_DQS1
DDR_B_D10

DDR_B_D11
DDR_B_D16

DDR_B_D17
DDR_B_DQS#2

DDR_B_DQS2
DDR_B_D18

DDR_B_D19
DDR_B_D24

DDR_B_D25
DDR_B_DM3
DDR_B_D26

DDR_B_D27

DDR_B_MA12
DDR_B_MA9

DDR_B_MA8
DDR_B_MA5

DDR_B_MA3
DDR_B_MA1

DDR_B_MA10

DDR_B_MA13

DDR_B_D32
DDR_B_D33

DDR_B_DQS#4
DDR_B_DQS4

DDR_B_D34
DDR_B_D35

DDR_B_D40
DDR_B_D41

DDR_B_DM5
DDR_B_D42

DDR_B_D43
DDR_B_D48

DDR_B_D49
DDR_B_DQS#6

DDR_B_DQS6
DDR_B_D50

DDR_B_D51
DDR_B_D56

DDR_B_D57
DDR_B_DM7
DDR_B_D58

DDR_B_D59

1 2

A

+0.75VS

+1.5V

JDDRL

JDDRL

1

VREF_DQ

3

VSS

5

DQ0

7

DQ1

9

VSS

11

DM0

13

VSS

15

DQ2

17

DQ3

19

VSS

21

DQ8

23

DQ9

25

VSS

27

DQS1#

29

DQS1

31

VSS

33

DQ10

35

DQ11

37

VSS

39

DQ16

41

DQ17

43

VSS

45

DQS2#

47

DQS2

49

VSS

51

DQ18

53

DQ19

55

VSS

57

DQ24

59

DQ25

61

VSS

63

DM3

65

VSS

67

DQ26

69

DQ27

71

VSS

73

CKE0

75

VDD

77

NC

79

BA2

81

VDD

83

A12/BC#

85

A9

87

VDD

89

A8

91

A5

93

VDD

95

A3

97

A1

99

VDD

101

CK0

103

CK0#

105

VDD

107

A10/AP

109

BA0

111

VDD

113

WE#

115

CAS#

117

VDD

119

A13

121

S1#

123

VDD

125

TEST

127

VSS

129

DQ32

131

DQ33

133

VSS

135

DQS4#

137

DQS4

139

VSS

141

DQ34

143

DQ35

145

VSS

147

DQ40

149

DQ41

151

VSS

153

DM5

155

VSS

157

DQ42

159

DQ43

161

VSS

163

DQ48

165

DQ49

167

VSS

169

DQS6#

171

DQS6

173

VSS

175

DQ50

177

DQ51

179

VSS

181

DQ56

183

DQ57

185

VSS

187

DM7

189

VSS

191

DQ58

193

DQ59

195

VSS

197

SA0

199

VDDSPD

201

SA1

203

VTT

205

GND1

207

GND2

FOX_AS0A626-U2RN-7F

FOX_AS0A626-U2RN-7F
@

@

VSS

DQ4

DQ5

VSS

DQS0#

DQS0

VSS

DQ6

DQ7

VSS
DQ12
DQ13

VSS

DM1

RESET#

VSS
DQ14
DQ15

VSS
DQ20
DQ21

VSS

DM2

VSS
DQ22
DQ23

VSS
DQ28
DQ29

VSS

DQS3#

DQS3

VSS
DQ30
DQ31

VSS

CKE1

VDD

VDD

VDD

VDD

VDD

CK1

CK1#

VDD

BA1

RAS#

VDD
ODT0

VDD
ODT1

VDD

VREF_CA

VSS
DQ36
DQ37

VSS

DM4

VSS
DQ38
DQ39

VSS
DQ44
DQ45

VSS

DQS5#

DQS5

VSS
DQ46
DQ47

VSS
DQ52
DQ53

VSS

DM6

VSS
DQ54
DQ55

VSS
DQ60
DQ61

VSS

DQS7#

DQS7

VSS
DQ62
DQ63

VSS

EVENT#

SDA

SCL
VTT

BOSS1
BOSS2

A15
A14

A11

S0#

A7
A6

A4
A2

A0

NC

+1.5V

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72

74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204

206
208

B

DDR_B_D4
DDR_B_D5

DDR_B_DQS#0
DDR_B_DQS0

DDR_B_D6
DDR_B_D7

DDR_B_D12
DDR_B_D13

DDR_B_DM1

DDR_B_D14
DDR_B_D15

DDR_B_D20
DDR_B_D21

DDR_B_DM2
DDR_B_D22

DDR_B_D23
DDR_B_D28

DDR_B_D29
DDR_B_DQS#3

DDR_B_DQS3
DDR_B_D30

DDR_B_D31

DDR_B_MA15
DDR_B_MA14

DDR_B_MA11
DDR_B_MA7

DDR_B_MA6
DDR_B_MA4

DDR_B_MA2
DDR_B_MA0

+DDR_VREF_CA_DIMMB
DDR_B_D36

DDR_B_D37
DDR_B_DM4
DDR_B_D38

DDR_B_D39
DDR_B_D44

DDR_B_D45
DDR_B_DQS#5

DDR_B_DQS5
DDR_B_D46

DDR_B_D47
DDR_B_D52

DDR_B_D53
DDR_B_DM6
DDR_B_D54

DDR_B_D55
DDR_B_D60

DDR_B_D61
DDR_B_DQS#7

DDR_B_DQS7
DDR_B_D62

DDR_B_D63

+0.75VS

B

Standard Type
DDR3 SO-DIMM B

SM_DRAMRST# 5,11

DDRB_CKE1 7

DDRB_CLK1 7
DDRB_CLK1# 7

DDR_B_BS1 7
DDR_B_RAS# 7DDR_B_BS07

DDRB_SCS0# 7
DDRB_ODT0 7

DDRB_ODT1 7

close to JDDRL.126

PM_EXTTS# 5,11

PM_SMBDATA 11,22,26,36
PM_SMBCLK 11,22,26,36

R97

R97

1 2

1

1

2

2

C188

C188

C187

C187

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+V_DDR3_DIMM_REF

0_0402_5%

0_0402_5%

C

DDR_B_DQS#[0..7]7

DDR_B_DQS[0..7]7

DDR_B_D[0..63]7

DDR_B_DM[0..7]7

DDR_B_MA[0..15]7

Layout Note:
Place near JDDRL

+1.5V

2009/10/01 2010/10/01

2009/10/01 2010/10/01

2009/10/01 2010/10/01

C

@

@

+

+

C189 330U_B2_2.5VM_R15M

C189 330U_B2_2.5VM_R15M

1 2

C192 10U_0805_6.3V6MC192 10U_0805_6.3V6M

1 2

C194 10U_0805_6.3V6MC194 10U_0805_6.3V6M

1 2

C197 10U_0805_6.3V6MC197 10U_0805_6.3V6M

1 2

C200 10U_0805_6.3V6MC200 10U_0805_6.3V6M

1 2

C202 10U_0805_6.3V6MC202 10U_0805_6.3V6M

1 2

C204 10U_0805_6.3V6MC204 10U_0805_6.3V6M

1 2

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Layout Note: Place these 4 Caps near
Command and Control signals of DIMMB

D

C190 0.1U_0402_16V4ZC190 0.1U_0402_16V4Z

1 2

C193 0.1U_0402_16V4ZC193 0.1U_0402_16V4Z

1 2

C196 0.1U_0402_16V4ZC196 0.1U_0402_16V4Z

1 2

C199 0.1U_0402_16V4ZC199 0.1U_0402_16V4Z

1 2

C257 68P_0402_50V8JC257 68P_0402_50V8J

1 2

For EMI Request

D

E

Layout Note:
Place near JDDRL.203 and 204

+0.75VS+1.5V

C191 10U_0805_6.3V6MC191 10U_0805_6.3V6M

1 2

C195 1U_0402_6.3V4ZC195 1U_0402_6.3V4Z

12

C198 1U_0402_6.3V4ZC198 1U_0402_6.3V4Z

12

C201 1U_0402_6.3V4ZC201 1U_0402_6.3V4Z

12

C203 1U_0402_6.3V4ZC203 1U_0402_6.3V4Z

12

C258 68P_0402_50V8JC258 68P_0402_50V8J

1 2

For EMI Request

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC,MB A6042

SCHEMATIC,MB A6042

SCHEMATIC,MB A6042

401849

401849

401849

12 58Tuesday, May 18, 2010

12 58Tuesday, May 18, 2010

12 58Tuesday, May 18, 2010

E

of

of

of

B

B

B

5

4

3

2

1

PCIE_GTX_C_CRX_P[0..15]6

PCIE_GTX_C_CRX_N[0..15]6

D D

C C

B B

PCIE_CTX_C_GRX_P[0..15]6

PCIE_CTX_C_GRX_N[0..15]6

PCIE_GTX_C_CRX_P[0..15]

PCIE_GTX_C_CRX_N[0..15]

PCIE_CTX_C_GRX_P[0..15]

PCIE_CTX_C_GRX_N[0..15]

CLK_PCIE_VGA26
CLK_PCIE_VGA#26

RV133 10K_0402_5%

RV133 10K_0402_5%

PLT_RST#29,36,37,41,42

LANE Reversal

PCIE_CTX_C_GRX_P15
PCIE_CTX_C_GRX_N15

PCIE_CTX_C_GRX_P14
PCIE_CTX_C_GRX_N14

PCIE_CTX_C_GRX_P13
PCIE_CTX_C_GRX_N13

PCIE_CTX_C_GRX_P12
PCIE_CTX_C_GRX_N12

PCIE_CTX_C_GRX_P11
PCIE_CTX_C_GRX_N11

PCIE_CTX_C_GRX_P10
PCIE_CTX_C_GRX_N10

PCIE_CTX_C_GRX_P9
PCIE_CTX_C_GRX_N9

PCIE_CTX_C_GRX_P8
PCIE_CTX_C_GRX_N8

PCIE_CTX_C_GRX_P7
PCIE_CTX_C_GRX_N7

PCIE_CTX_C_GRX_P6
PCIE_CTX_C_GRX_N6

PCIE_CTX_C_GRX_P5
PCIE_CTX_C_GRX_N5

PCIE_CTX_C_GRX_P4
PCIE_CTX_C_GRX_N4

PCIE_CTX_C_GRX_P3
PCIE_CTX_C_GRX_N3

PCIE_CTX_C_GRX_P2
PCIE_CTX_C_GRX_N2

PCIE_CTX_C_GRX_P1
PCIE_CTX_C_GRX_N1

PCIE_CTX_C_GRX_P0
PCIE_CTX_C_GRX_N0

MANHA@

MANHA@

1 2

UV1A

UV1A

AA38

PCIE_RX0P

Y37

PCIE_RX0N

Y35

PCIE_RX1P

W36

PCIE_RX1N

W38

PCIE_RX2P

V37

PCIE_RX2N

V35

PCIE_RX3P

U36

PCIE_RX3N

U38

PCIE_RX4P

T37

PCIE_RX4N

T35

PCIE_RX5P

R36

PCIE_RX5N

R38

PCIE_RX6P

P37

PCIE_RX6N

P35

PCIE_RX7P

N36

PCIE_RX7N

N38

PCIE_RX8P

M37

PCIE_RX8N

M35

PCIE_RX9P

L36

PCIE_RX9N

L38

PCIE_RX10P

K37

PCIE_RX10N

K35

PCIE_RX11P

J36

PCIE_RX11N

J38

PCIE_RX12P

H37

PCIE_RX12N

H35

PCIE_RX13P

G36

PCIE_RX13N

G38

PCIE_RX14P

F37

PCIE_RX14N

F35

PCIE_RX15P

E37

PCIE_RX15N

CLOCK

CLOCK

AB35

PCIE_REFCLKP

AA36

PCIE_REFCLKN

AJ21

NC#1

AK21

NC#2

AH16

NC_PWRGOOD

AA30

PERSTB

216-0772000-PRO_FCBGA962

216-0772000-PRO_FCBGA962

LANE Reversal

PCIE_GTX_CRX_P15

PCIE_TX0P
PCIE_TX0N

PCIE_TX1P
PCIE_TX1N

PCIE_TX2P
PCIE_TX2N

PCIE_TX3P
PCIE_TX3N

PCIE_TX4P

PCI EXPRESS INTERFACE

PCI EXPRESS INTERFACE

PCIE_TX4N

PCIE_TX5P
PCIE_TX5N

PCIE_TX6P
PCIE_TX6N

PCIE_TX7P
PCIE_TX7N

PCIE_TX8P
PCIE_TX8N

PCIE_TX9P
PCIE_TX9N

PCIE_TX10P
PCIE_TX10N

PCIE_TX11P
PCIE_TX11N

PCIE_TX12P
PCIE_TX12N

PCIE_TX13P
PCIE_TX13N

PCIE_TX14P
PCIE_TX14N

PCIE_TX15P
PCIE_TX15N

CALIBRATION

CALIBRATION

PCIE_CALRP
PCIE_CALRN

MADISONLP@

MADISONLP@

Y33

PCIE_GTX_CRX_N15

Y32

PCIE_GTX_CRX_P14

W33

PCIE_GTX_CRX_N14

W32

PCIE_GTX_CRX_P13

U33

PCIE_GTX_CRX_N13

U32

PCIE_GTX_CRX_P12

U30

PCIE_GTX_CRX_N12

U29

PCIE_GTX_CRX_P11

T33

PCIE_GTX_CRX_N11

T32

PCIE_GTX_CRX_P10

T30

PCIE_GTX_CRX_N10

T29

PCIE_GTX_CRX_P9

P33

PCIE_GTX_CRX_N9

P32

PCIE_GTX_CRX_P8

P30

PCIE_GTX_CRX_N8

P29

PCIE_GTX_CRX_P7

N33

PCIE_GTX_CRX_N7

N32

PCIE_GTX_CRX_P6

N30

PCIE_GTX_CRX_N6

N29

PCIE_GTX_CRX_P5

L33

PCIE_GTX_CRX_N5

L32

PCIE_GTX_CRX_P4

L30

PCIE_GTX_CRX_N4

L29

PCIE_GTX_CRX_P3

K33

PCIE_GTX_CRX_N3

K32

PCIE_GTX_CRX_P2

J33

PCIE_GTX_CRX_N2

J32

PCIE_GTX_CRX_P1

K30

PCIE_GTX_CRX_N1

K29

PCIE_GTX_CRX_P0

H33

PCIE_GTX_CRX_N0

H32

Y30
Y29

RV1 1.27K_0402_1%RV1 1.27K_0402_1%

1 2

RV2 2K_0402_1%RV2 2K_0402_1%

1 2

Close to UV1

CV1 0.1U_0402_16V7KCV1 0.1U_0402_16V7K

1 2

CV2 0.1U_0402_16V7KCV2 0.1U_0402_16V7K

1 2

CV3 0.1U_0402_16V7KCV3 0.1U_0402_16V7K

1 2

CV4 0.1U_0402_16V7KCV4 0.1U_0402_16V7K

1 2

CV5 0.1U_0402_16V7KCV5 0.1U_0402_16V7K

1 2

CV6 0.1U_0402_16V7KCV6 0.1U_0402_16V7K

1 2

CV7 0.1U_0402_16V7KCV7 0.1U_0402_16V7K

1 2

CV8 0.1U_0402_16V7KCV8 0.1U_0402_16V7K

1 2

CV9 0.1U_0402_16V7KCV9 0.1U_0402_16V7K

1 2

CV10 0.1U_0402_16V7KCV10 0.1U_0402_16V7K

1 2

CV11 0.1U_0402_16V7KCV11 0.1U_0402_16V7K

1 2

CV12 0.1U_0402_16V7KCV12 0.1U_0402_16V7K

1 2

CV13 0.1U_0402_16V7KCV13 0.1U_0402_16V7K

1 2

CV14 0.1U_0402_16V7KCV14 0.1U_0402_16V7K

1 2

CV15 0.1U_0402_16V7KCV15 0.1U_0402_16V7K

1 2

CV16 0.1U_0402_16V7KCV16 0.1U_0402_16V7K

1 2

CV17 0.1U_0402_16V7KCV17 0.1U_0402_16V7K

1 2

CV18 0.1U_0402_16V7KCV18 0.1U_0402_16V7K

1 2

CV19 0.1U_0402_16V7KCV19 0.1U_0402_16V7K

1 2

CV20 0.1U_0402_16V7KCV20 0.1U_0402_16V7K

1 2

CV21 0.1U_0402_16V7KCV21 0.1U_0402_16V7K

1 2

CV22 0.1U_0402_16V7KCV22 0.1U_0402_16V7K

1 2

CV23 0.1U_0402_16V7KCV23 0.1U_0402_16V7K

1 2

CV24 0.1U_0402_16V7KCV24 0.1U_0402_16V7K

1 2

CV25 0.1U_0402_16V7KCV25 0.1U_0402_16V7K

1 2

CV26 0.1U_0402_16V7KCV26 0.1U_0402_16V7K

1 2

CV27 0.1U_0402_16V7KCV27 0.1U_0402_16V7K

1 2

CV28 0.1U_0402_16V7KCV28 0.1U_0402_16V7K

1 2

CV29 0.1U_0402_16V7KCV29 0.1U_0402_16V7K

1 2

CV30 0.1U_0402_16V7KCV30 0.1U_0402_16V7K

1 2

CV31 0.1U_0402_16V7KCV31 0.1U_0402_16V7K

1 2

CV32 0.1U_0402_16V7KCV32 0.1U_0402_16V7K

1 2

+1.0VS

PCIE_GTX_C_CRX_P15
PCIE_GTX_C_CRX_N15

PCIE_GTX_C_CRX_P14
PCIE_GTX_C_CRX_N14

PCIE_GTX_C_CRX_P13
PCIE_GTX_C_CRX_N13

PCIE_GTX_C_CRX_P12
PCIE_GTX_C_CRX_N12

PCIE_GTX_C_CRX_P11
PCIE_GTX_C_CRX_N11

PCIE_GTX_C_CRX_P10
PCIE_GTX_C_CRX_N10

PCIE_GTX_C_CRX_P9
PCIE_GTX_C_CRX_N9

PCIE_GTX_C_CRX_P8
PCIE_GTX_C_CRX_N8

PCIE_GTX_C_CRX_P7
PCIE_GTX_C_CRX_N7

PCIE_GTX_C_CRX_P6
PCIE_GTX_C_CRX_N6

PCIE_GTX_C_CRX_P5
PCIE_GTX_C_CRX_N5

PCIE_GTX_C_CRX_P4
PCIE_GTX_C_CRX_N4

PCIE_GTX_C_CRX_P3

PCIE_GTX_C_CRX_N3

PCIE_GTX_C_CRX_P2
PCIE_GTX_C_CRX_N2

PCIE_GTX_C_CRX_P1
PCIE_GTX_C_CRX_N1

PCIE_GTX_C_CRX_P0

PCIE_GTX_C_CRX_N0

A A

Security Classification

Security Classification

Security Classification

2009/10/01 2010/10/01

2009/10/01 2010/10/01

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/10/01 2010/10/01

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC,MB A6042

SCHEMATIC,MB A6042

SCHEMATIC,MB A6042

401849

401849

401849

13 58Tuesday, May 18, 2010

13 58Tuesday, May 18, 2010

13 58Tuesday, May 18, 2010

1

B

B

B

of

of

of

5

D D

+3VS_DELAY

VGA_PWRSEL0

RV3010K_0402_5%@ RV3010K_0402_5%@

12

VGA_PWRSEL1

RV13110K_0402_5%@ RV13110K_0402_5%@

12

THERM#_VGA

RV3210K_0402_5% RV3210K_0402_5%

12

GPIO23_CLKREQ#

RV3310K_0402_5%M9X@ RV3310K_0402_5%M9X@

12

R_AC_IN

RV3410K_0402_5%@ RV3410K_0402_5%@

12

GENERIC_C

RV3510K_0402_5%@ RV3510K_0402_5%@

12

VGA_ENBKL

RV1710K_0402_5% RV1710K_0402_5%

1 2

VGA_EDID_CLK22

LCD

VGA_EDID_DATA22

C C

B B

+1.8VS

12

RV20

RV20
499_0402_1%

499_0402_1%

+VGA_VREF

12

1

CV49

RV21

RV21

249_0402_1%

249_0402_1%

+1.8VS

A A

BLM18PG121SN1D_0603

BLM18PG121SN1D_0603

+1.0VS

CV49

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

BLM18PG121SN1D_0603

BLM18PG121SN1D_0603

12

LV3

LV3

1

2

10U_0603_6.3V6M

10U_0603_6.3V6M

12

LV5

LV5

1
CV43

CV43

10U_0603_6.3V6M

10U_0603_6.3V6M

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z
1

CV41

CV41

CV40

CV40

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z
1

CV44

CV44

2

5

+DPLL_PVDD

1

CV42

CV42
1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

+DPLL_VDDC

1

CV45

CV45

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

GPU_GPIO021
GPU_GPIO121
GPU_GPIO221

VGA_ENBKL41

SOUT_GPIO821

SIN_GPIO921

GPU_GPIO1121
GPU_GPIO1221
GPU_GPIO1321

VGA_PWRSEL054

27M_SSC22

THERM#_VGA21

VGA_PWRSEL154

ROMSE_GPIO2221

VGA_HDMI_HPD24,30

27M_CLK22

+1.8VS

VRAM_ID021
VRAM_ID121
VRAM_ID221

VGA_EDID_CLK
VGA_EDID_DATA

GPU_GPIO0
GPU_GPIO1
GPU_GPIO2

R_AC_IN

SOUT_GPIO8
SIN_GPIO9

GPU_GPIO11 RSET
GPU_GPIO12
GPU_GPIO13

VGA_PWRSEL0
27M_SSC
THERM#_VGA

VGA_PWRSEL1
ROMSE_GPIO22

GPIO23_CLKREQ#

GENERIC_C

RV26 47.5_0402_1%RV26 47.5_0402_1%

1 2

BLM18PG121SN1D_0603

BLM18PG121SN1D_0603

12

LV7

LV7

1

2

10U_0603_6.3V6M

10U_0603_6.3V6M

RV31

RV31

100_0402_1%

100_0402_1%

GPU_THERMAL_D+21
GPU_THERMAL_D-21

0.1U_0402_16V4Z

0.1U_0402_16V4Z

CV50

CV50

4

T11 PADT11 PAD

T9 PADT9 PAD
T12 PADT12 PAD
T13 PADT13 PAD
T10 PADT10 PAD

+VGA_VREF

150mA

+DPLL_PVDD

300mA

+DPLL_VDDC

XTALIN

12

20mA

+TSVDD

1

1

CV52

CV52

CV51

CV51

1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

2

4

+TSVDD

AW8

AW3
AW5

AW6

AR10
AW10
AU10
AP10
AV11
AT11
AR12
AW12
AU12
AP12

AK26

AJ26

AH20
AH18
AN16
AH23

AJ23

AH17

AJ17

AK17

AJ13

AH15

AJ16

AK16

AL16
AM16
AM14
AM13
AK14
AG30
AN14
AM17

AL13

AJ14
AK13
AN13
AM23
AN23
AK23

AL24
AM24

AJ19
AK19

AJ20
AK20

AJ24
AH26
AH24

AK24

AH13

AM32
AN32

AN31

AV33
AU34

AF29
AG29

AK32

AJ32

AJ33

AR8
AU8
AP8

AR3
AR1
AU1
AU3

AP6
AU5

AR6
AU6

AT7
AV7
AN7
AV9

AT9

UV1B

UV1B

MUTI GFX

MUTI GFX

DVPCNTL_MVP_0
DVPCNTL_MVP_1
DVPCNTL_0
DVPCNTL_1
DVPCNTL_2
DVPCLK
DVPDATA_0
DVPDATA_1
DVPDATA_2
DVPDATA_3
DVPDATA_4
DVPDATA_5
DVPDATA_6
DVPDATA_7
DVPDATA_8
DVPDATA_9
DVPDATA_10
DVPDATA_11
DVPDATA_12
DVPDATA_13
DVPDATA_14
DVPDATA_15
DVPDATA_16
DVPDATA_17
DVPDATA_18
DVPDATA_19
DVPDATA_20
DVPDATA_21
DVPDATA_22
DVPDATA_23

I2C

I2C

SCL
SDA

GENERAL PURPOSE I/O

GENERAL PURPOSE I/O

GPIO_0
GPIO_1
GPIO_2
GPIO_3_SMBDATA
GPIO_4_SMBCLK
GPIO_5_AC_BATT
GPIO_6
GPIO_7_BLON
GPIO_8_ROMSO
GPIO_9_ROMSI
GPIO_10_ROMSCK
GPIO_11
GPIO_12
GPIO_13
GPIO_14_HPD2
GPIO_15_PWRCNTL_0
GPIO_16_SSIN
GPIO_17_THERMAL_INT
GPIO_18_HPD3
GPIO_19_CTF
GPIO_20_PWRCNTL_1
GPIO_21_BB_EN
GPIO_22_ROMCSB
GPIO_23_CLKREQB
JTAG_TRSTB
JTAG_TDI
JTAG_TCK
JTAG_TMS
JTAG_TDO
GENERICA
GENERICB
GENERICC
GENERICD
GENERICE_HPD4
GENERICF
GENERICG

HPD1

VREFG

PLL/CLOCK

PLL/CLOCK

DPLL_PVDD
DPLL_PVSS

DPLL_VDDC

XTALIN
XTALOUT

DPLUS

THERMAL

THERMAL

DMINUS

TS_FDO
TSVDD
TSVSS

216-0772000-PRO_FCBGA962

216-0772000-PRO_FCBGA962

TXCAP_DPA3P
TXCAM_DPA3N

TX0P_DPA2P
TX0M_DPA2N

DPA

DPA

TX1P_DPA1P

TX1M_DPA1N

TX2P_DPA0P

TX2M_DPA0N

TXCBP_DPB3P
TXCBM_DPB3N

TX3P_DPB2P

TX3M_DPB2N

DPB

DPB

TX4P_DPB1P

TX4M_DPB1N

TX5P_DPB0P

TX5M_DPB0N

TXCCP_DPC3P
TXCCM_DPC3N

TX0P_DPC2P
TX0M_DPC2N

DPC

DPC

TX1P_DPC1P
TX1M_DPC1N

TX2P_DPC0P
TX2M_DPC0N

TXCDP_DPD3P
TXCDM_DPD3N

TX3P_DPD2P
TX3M_DPD2N

DPD

DPD

TX4P_DPD1P
TX4M_DPD1N

TX5P_DPD0P
TX5M_DPD0N

DAC1

DAC1

DAC2

DAC2

DDC/AUX

DDC/AUX

DDC1CLK

DDC1DATA

DDC2CLK

DDC2DATA

DDCCLK_AUX3P

DDCDATA_AUX3N

DDCCLK_AUX4P

DDCDATA_AUX4N

DDCCLK_AUX5P

DDCDATA_AUX5N

DDC6CLK

DDC6DATA

NC_DDCCLK_AUX7P

NC_DDCDATA_AUX7N

MADISONLP@

MADISONLP@

HSYNC
VSYNC

RSET
AVDD

AVSSQ
VDD1DI

VSS1DI

COMP

H2SYNC
V2SYNC

VDD2DI
VSS2DI

A2VDD
A2VDDQ
A2VSSQ

R2SET

AUX1P

AUX1N

AUX2P

AUX2N

3

AU24
AV23

AT25
AR24

AU26
AV25

AT27
AR26

AR30
AT29

AV31
AU30

AR32
AT31

AT33
AU32

AU14
AV13

AT15
AR14

AU16
AV15

AT17
AR16

AU20
AT19

AT21
AR20

AU22
AV21

AT23
AR22

AD39

R

AD37

RB

AE36

G

AD35

GB

AF37

B

AE38

BB

AC36
AC38

AB34

+AVDD_VGA

AD34
AE34

+VDD1DI

AC33
AC34

AC30

R2

AC31

R2B

AD30

G2

AD31

G2B

AF30

B2

AF31

B2B

AC32

C

AD32

Y

AF32

AD29
AC29

AG31
AG32

AG33

+A2VDDQ

AD33
AF33

R2SET

AA29

AM26
AN26

AM27
AL27

AM19
AL19

AN20
AM20

AL30
AM30

AL29
AM29

AN21
AM21

AJ30
AJ31

AK30
AK29

3

VGA_HDMI_CLK+ 24
VGA_HDMI_CLK- 24

VGA_HDMI_TX0+ 24
VGA_HDMI_TX0- 24

VGA_HDMI_TX1+ 24
VGA_HDMI_TX1- 24

VGA_HDMI_TX2+ 24
VGA_HDMI_TX2- 24

VGA_CRT_R 23

VGA_CRT_G 23

VGA_CRT_B 23

VGA_CRT_HSYNC 21,23
VGA_CRT_VSYNC 21,23

1 2

RV18 499_0402_1%RV18 499_0402_1%

HSYNC_DAC2 21
VSYNC_DAC2 21

+VDD1DI

+A2VDD

1 2

RV22 715_0402_1%RV22 715_0402_1%

VGA_CRT_CLK 23
VGA_CRT_DATA 23

VGA_HDMI_CLK 24
VGA_HDMI_DATA 24

VGA_CRT_CLK
VGA_CRT_DATA

VGA_HDMI_DATA
VGA_HDMI_CLK

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

CRT

CRT

HDMI

RV134 4.7K_0402_5%RV134 4.7K_0402_5%
RV135 4.7K_0402_5%RV135 4.7K_0402_5%
HDMI@

HDMI@
RV136 4.7K_0402_5%

RV136 4.7K_0402_5%
HDMI@

HDMI@
RV137 4.7K_0402_5%

RV137 4.7K_0402_5%

12
12

1 2
1 2

Compal Secret Data

Compal Secret Data

2009/10/01 2010/10/01

2009/10/01 2010/10/01

2009/10/01 2010/10/01

Compal Secret Data

+3VS_DELAY

Deciphered Date

Deciphered Date

Deciphered Date

2

UV1G

UV1G

LVDS CONTROL

LVDS CONTROL

LVTMDP

LVTMDP

216-0772000-PRO_FCBGA962

216-0772000-PRO_FCBGA962
MADISONLP@

MADISONLP@

VGA_CRT_R
VGA_CRT_G
VGA_CRT_B

+AVDD_VGA

CV33

CV33

1U_0402_6.3V4Z

1U_0402_6.3V4Z

+VDD1DI

CV36

CV36

1U_0402_6.3V4Z

1U_0402_6.3V4Z

+A2VDD

+A2VDDQ

2

AK27

VARY_BL

AJ27

DIGON

TXOUT_U3P

TXOUT_U3N

TXOUT_L3P
TXOUT_L3N

1

1

CV35

CV35

10U_0603_6.3V6M

10U_0603_6.3V6M

2

2

1

CV37

CV37

2

1

CV47

CV47

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

AK35
AL36

AJ38
AK37

AH35
AJ36

AG38
AH37

AF35
AG36

AP34
AR34

AW37
AU35

AR37
AU39

AP35
AR35

AN36
AP37

CV34

CV34

1

CV38

CV38
10U_0603_6.3V6M

10U_0603_6.3V6M

2

1 2

1

2

TXCLK_UP_DPF3P
TXCLK_UN_DPF3N

TXOUT_U0P_DPF2P
TXOUT_U0N_DPF2N

TXOUT_U1P_DPF1P
TXOUT_U1N_DPF1N

TXOUT_U2P_DPF0P
TXOUT_U2N_DPF0N

TXCLK_LP_DPE3P
TXCLK_LN_DPE3N

TXOUT_L0P_DPE2P

TXOUT_L0N_DPE2N

TXOUT_L1P_DPE1P

TXOUT_L1N_DPE1N

TXOUT_L2P_DPE0P

TXOUT_L2N_DPE0N

Near UV1

1 2

RV11 150_0402_1%RV11 150_0402_1%

1 2

RV12 150_0402_1%RV12 150_0402_1%

1 2

RV13 150_0402_1%RV13 150_0402_1%

70mA

1

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

45mA

1

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

45mA

10mA

1

CV4610U_0603_6.3V6M CV4610U_0603_6.3V6M

2

1

VGA_PWM 22
VGA_ENVDD 22

VGA_TZCLK+ 22
VGA_TZCLK- 22

VGA_TZOUT0+ 22
VGA_TZOUT0- 22

VGA_TZOUT1+ 22
VGA_TZOUT1- 22

VGA_TZOUT2+ 22
VGA_TZOUT2- 22

VGA_TXCLK+ 22
VGA_TXCLK- 22

VGA_TXOUT0+ 22
VGA_TXOUT0- 22

VGA_TXOUT1+ 22
VGA_TXOUT1- 22

VGA_TXOUT2+ 22
VGA_TXOUT2- 22

Single channel

BLM18PG121SN1D_0603

BLM18PG121SN1D_0603

12

+1.8VS

LV1

LV1

BLM18PG121SN1D_0603

BLM18PG121SN1D_0603

12

+1.8VS

LV2

LV2

LV4 0_0603_5%LV4 0_0603_5%

BLM18PG121SN1D_0603

BLM18PG121SN1D_0603

CV48

CV48
1U_0402_6.3V4Z

1U_0402_6.3V4Z

+3VS_DELAY

12

+1.8VS

LV6

LV6

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

SCHEMATIC,MB A6042

SCHEMATIC,MB A6042

SCHEMATIC,MB A6042

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

401849

401849

401849

1

B

B

B

of

14 58Tuesday, May 18, 2010

of

14 58Tuesday, May 18, 2010

of

14 58Tuesday, May 18, 2010

5

D D

+1.8VS

+1.8VS

C C

+1.8VS

B B

+1.8VS

A A

LV33

BLM18PG121SN1D_0603

BLM18PG121SN1D_0603

LV34

BLM18PG121SN1D_0603

BLM18PG121SN1D_0603

BLM18PG121SN1D_0603

BLM18PG121SN1D_0603

10U_0603_6.3V6M

10U_0603_6.3V6M

BLM18PG121SN1D_0603

BLM18PG121SN1D_0603

+1.0VS

10U_0603_6.3V6M

10U_0603_6.3V6M

BLM18PG121SN1D_0603

BLM18PG121SN1D_0603

10U_0603_6.3V6M

10U_0603_6.3V6M

BLM18PG121SN1D_0603

BLM18PG121SN1D_0603

+1.0VS

10U_0603_6.3V6M

10U_0603_6.3V6M

MANHA@LV33

MANHA@

12

CV309

CV309

10U_0603_6.3V6M

10U_0603_6.3V6M

MANHA@

MANHA@

MANHA@LV34

MANHA@

12

CV312

CV312

10U_0603_6.3V6M

10U_0603_6.3V6M

MANHA@

MANHA@

12

LV12

LV12

2

CV56

CV56

1

1U_0402_6.3V4Z

1U_0402_6.3V4Z

12

LV15

LV15

2

CV60

CV60

1

12

LV17

LV17

2

CV65

CV65

1

12

LV19

LV19

2

CV68

CV68

1

1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

CV308

CV308

MANHA@

MANHA@

1

1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

CV311

CV311

MANHA@

MANHA@

1

+DPE_VDD18

2

CV57

CV57

1

+DPE_VDD10

2

CV64

CV64

1

1U_0402_6.3V4Z

1U_0402_6.3V4Z

+DPF_VDD18

2

CV66

CV66

1

1U_0402_6.3V4Z

1U_0402_6.3V4Z

+DPF_VDD10

2

CV69

CV69

1

1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

1

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

1

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

CV58

CV58

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

CV61

CV61

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

CV67

CV67

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

CV70

CV70

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

+DPC_VDD18

2

CV310

CV310
MANHA@

MANHA@

1

+DPD_VDD18

2

CV313

CV313
MANHA@

MANHA@

1

+1.0VS

+1.0VS

1 2
LV8 0_0603_5%LV8 0_0603_5%

1 2

LV10 0_0603_5%LV10 0_0603_5%

4

+DPC_VDD18

+DPD_VDD18

+DPD_VDD10

RV36 150_0402_1%RV36 150_0402_1%

200mA

+DPE_VDD18

100mA

+DPE_VDD10

200mA

+DPF_VDD18

100mA

+DPF_VDD10

RV38 150_0402_1%RV38 150_0402_1%

12

UV1H

UV1H

AP20

NC_DPC_VDD18#1

AP21

NC_DPC_VDD18#2

AP13

DPC_VDD10#1

AT13

DPC_VDD10#2

AN17

DPC_VSSR#1

AP16

DPC_VSSR#2

AP17

DPC_VSSR#3

AW14

DPC_VSSR#4

AW16

DPC_VSSR#5

AP22

NC_DPD_VDD18#1

AP23

NC_DPD_VDD18#2

AP14

DPD_VDD10#1

AP15

DPD_VDD10#2

AN19

DPD_VSSR#1

AP18

DPD_VSSR#2

AP19

DPD_VSSR#3

AW20

DPD_VSSR#4

AW22

DPD_VSSR#5

AW18

12

DPCD_CALR

DP E/F POWER

DP E/F POWER

AH34

DPE_VDD18#1

AJ34

DPE_VDD18#2

AL33

DPE_VDD10#1

AM33

DPE_VDD10#2

AN34

DPE_VSSR#1

AP39

DPE_VSSR#2

AR39

DPE_VSSR#3

AU37

DPE_VSSR#4

AW35

DPE_VSSR#5

AF34

DPF_VDD18#1

AG34

DPF_VDD18#2

AK33

DPF_VDD10#1

AK34

DPF_VDD10#2

AF39

DPF_VSSR#1

AH39

DPF_VSSR#2

AK39

DPF_VSSR#3

AL34

DPF_VSSR#4

AM34

DPF_VSSR#5

AM39

DPEF_CALR

216-0772000-PRO_FCBGA962

216-0772000-PRO_FCBGA962
MADISONLP@

MADISONLP@

DP A/B POWERDP C/D POWER

DP A/B POWERDP C/D POWER

NC_DPA_VDD18#1
NC_DPA_VDD18#2

DPA_VDD10#1
DPA_VDD10#2

DPA_VSSR#1
DPA_VSSR#2
DPA_VSSR#3
DPA_VSSR#4
DPA_VSSR#5

NC_DPB_VDD18#1
NC_DPB_VDD18#2

DPB_VDD10#1
DPB_VDD10#2

DPB_VSSR#1
DPB_VSSR#2
DPB_VSSR#3
DPB_VSSR#4
DPB_VSSR#5

DPAB_CALR

DP PLL POWER

DP PLL POWER

DPA_PVDD
DPA_PVSS

DPB_PVDD
DPB_PVSS

DPC_PVDD

DPC_PVSS

DPD_PVDD

DPD_PVSS

DPE_PVDD
DPE_PVSS

NC_DPF_PVDD

NC_DPF_PVSS

AN24
AP24

AP31
AP32

AN27
AP27
AP28
AW24
AW26

AP25
AP26

AN33
AP33

AN29
AP29
AP30
AW30
AW32

AW28

AU28
AV27

AV29
AR28

AU18
AV17

AV19
AR18

AM37
AN38

AL38
AM35

3

+DPA_VDD18

+DPA_VDD10+DPC_VDD10

+DPB_VDD18

1 2

RV37 150_0402_1%RV37 150_0402_1%

+DPA_PVDD

+DPB_PVDD

+DPC_PVDD

+DPD_PVDD

+DPE_PVDD

200mA

1 2

LV9 0_0603_5%LV9 0_0603_5%

+1.0VS

+DPB_VDD10

HDMI@

HDMI@

CV53

CV53

10U_0603_6.3V6M

10U_0603_6.3V6M

+DPA_PVDD

+DPB_PVDD

+DPC_PVDD

+DPD_PVDD

+DPE_PVDD

20mA

2

1

20mA

20mA

2

CV5910U_0603_6.3V6M CV5910U_0603_6.3V6M

1

20mA

20mA

20mA

1

CV710.1U_0402_16V4Z CV710.1U_0402_16V4Z

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

HDMI@

HDMI@
CV54

CV54

1

1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

CV62

CV62

1

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

CV72

CV72

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

+DPA_VDD18

CV316

CV316

MANHA@

MANHA@

+DPB_VDD18

CV319

CV319

MANHA@

MANHA@

BLM18PG121SN1D_0603

BLM18PG121SN1D_0603

2

HDMI@

HDMI@

CV55

CV55

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

BLM18PG121SN1D_0603

BLM18PG121SN1D_0603

2

CV63

CV63

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

BLM18PG121SN1D_0603

BLM18PG121SN1D_0603

1

CV73

CV73
10U_0603_6.3V6M

10U_0603_6.3V6M

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

CV314

CV314

MANHA@

MANHA@

1

1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

CV317

CV317

MANHA@

MANHA@

1

LV11

LV11

1 2

LV13 0_0603_5%LV13 0_0603_5%

LV14

LV14

1 2

LV16 0_0603_5%LV16 0_0603_5%

1 2

LV18 0_0603_5%LV18 0_0603_5%

LV20

LV20

1

LV35

MANHA@LV35

MANHA@

1 2

BLM18PG121SN1D_0603

BLM18PG121SN1D_0603

2

2

1

2

1

12

12

12

CV315

CV315
10U_0603_6.3V6M

10U_0603_6.3V6M

1

MANHA@

MANHA@

LV36

MANHA@LV36

MANHA@

1 2

BLM18PG121SN1D_0603

BLM18PG121SN1D_0603

2

CV318

CV318
10U_0603_6.3V6M

10U_0603_6.3V6M

1

MANHA@

MANHA@

+1.0VS

+1.8VS

+1.8VS

+1.8VS

+1.8VS

+1.8VS

+1.8VS

+1.8VS

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/10/01 2010/10/01

2009/10/01 2010/10/01

2009/10/01 2010/10/01

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC,MB A6042

SCHEMATIC,MB A6042

SCHEMATIC,MB A6042

401849

401849

401849

15 58Tuesday, May 18, 2010

15 58Tuesday, May 18, 2010

15 58Tuesday, May 18, 2010

1

B

B

B

of

of

of

5

1

+

+

CV78

CV78
390U_2.5V_M_R10

390U_2.5V_M_R10

2

D D

C C

BLM18PG121SN1D_0603

BLM18PG121SN1D_0603

+1.8VS

+1.8VS

B B

+1.8VS

A A

+1.8VS

LV23

LV23

10U_0603_6.3V6M

10U_0603_6.3V6M

BLM18PG121SN1D_0603

BLM18PG121SN1D_0603

LV24

LV24

10U_0603_6.3V6M

10U_0603_6.3V6M

LV30

MANHA@LV30

MANHA@

BLM18PG121SN1D_0603

BLM18PG121SN1D_0603

10U_0603_6.3V6M

10U_0603_6.3V6M

MANHA@

MANHA@

LV31

MANHA@LV31

MANHA@

BLM18PG121SN1D_0603

BLM18PG121SN1D_0603

10U_0603_6.3V6M

10U_0603_6.3V6M

MANHA@

MANHA@

1 2

CV74 10U_0603_6.3V6MCV74 10U_0603_6.3V6M

1 2

CV79 10U_0603_6.3V6MCV79 10U_0603_6.3V6M

1 2

CV83 10U_0603_6.3V6MCV83 10U_0603_6.3V6M

1 2

CV87 10U_0603_6.3V6MCV87 10U_0603_6.3V6M

1 2

CV91 10U_0603_6.3V6MCV91 10U_0603_6.3V6M

0.1U_0402_16V4Z

0.1U_0402_16V4Z

12

1

1

CV156

CV156

CV157

CV157

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

12

12

CV304

CV304

12

CV307

CV307

1
CV171

CV171

2

1

2

1

2

5

1
CV172

CV172

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

CV303

CV303

MANHA@

MANHA@

0.1U_0402_16V4Z

0.1U_0402_16V4Z

CV305

CV305

MANHA@

MANHA@

+1.8VS

1

2

1

2

1

2

1

2

BLM18PG121SN1D_0603

BLM18PG121SN1D_0603

+VDDR5

CV161

CV161
1U_0402_6.3V4Z

1U_0402_6.3V4Z

+VDDR4

CV173

CV173
1U_0402_6.3V4Z

1U_0402_6.3V4Z

+1.8VS

+1.0VS

+VGA_CORE

MPV18

1

CV302

CV302
1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

MANHA@

MANHA@

SPV18

1

CV306

CV306
1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

MANHA@

MANHA@

LV22

LV22

1 2

CV75 1U_0402_6.3V4ZCV75 1U_0402_6.3V4Z

1 2

CV80 1U_0402_6.3V4ZCV80 1U_0402_6.3V4Z

1 2

CV84 1U_0402_6.3V4ZCV84 1U_0402_6.3V4Z

1 2

CV88 1U_0402_6.3V4ZCV88 1U_0402_6.3V4Z

1 2

CV92 1U_0402_6.3V4ZCV92 1U_0402_6.3V4Z

1 2

CV95 1U_0402_6.3V4ZCV95 1U_0402_6.3V4Z

1 2

CV98 1U_0402_6.3V4ZCV98 1U_0402_6.3V4Z

1 2

CV102 1U_0402_6.3V4ZCV102 1U_0402_6.3V4Z

1 2

CV106 1U_0402_6.3V4ZCV106 1U_0402_6.3V4Z

1 2

CV109 1U_0402_6.3V4ZCV109 1U_0402_6.3V4Z

10U_0603_6.3V6M

10U_0603_6.3V6M

12

2

CV119

CV119

BLM18PG121SN1D_0603

BLM18PG121SN1D_0603

MANHA@

MANHA@
LV28 BLM18PG121SN1D_0603

LV28 BLM18PG121SN1D_0603
M9X@

M9X@
LV37 BLM18PG121SN1D_0603

LV37 BLM18PG121SN1D_0603

CV123

CV123

1

+3VS_DELAY

+1.5VS

12

LV27

LV27

10U_0603_6.3V6M

10U_0603_6.3V6M

12

12

1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

CV127

CV127

1

0.1U_0402_16V4Z

0.1U_0402_16V4Z
1

1

CV187

CV187

CV186

CV186

2

2

10U_0603_6.3V6M

10U_0603_6.3V6M

4

4A

1 2

CV76 1U_0402_6.3V4ZCV76 1U_0402_6.3V4Z

1 2

CV81 1U_0402_6.3V4ZCV81 1U_0402_6.3V4Z

1 2

CV85 1U_0402_6.3V4ZCV85 1U_0402_6.3V4Z

1 2

CV89 1U_0402_6.3V4ZCV89 1U_0402_6.3V4Z

1 2

CV93 1U_0402_6.3V4ZCV93 1U_0402_6.3V4Z

1 2

CV96 1U_0402_6.3V4ZCV96 1U_0402_6.3V4Z

1 2

CV99 1U_0402_6.3V4ZCV99 1U_0402_6.3V4Z

1 2

CV103 1U_0402_6.3V4ZCV103 1U_0402_6.3V4Z

1 2

CV107 1U_0402_6.3V4ZCV107 1U_0402_6.3V4Z

1 2

CV110 1U_0402_6.3V4ZCV110 1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

1

CV148 10U_0603_6.3V6MCV148 10U_0603_6.3V6M
CV152 1U_0402_6.3V4ZCV152 1U_0402_6.3V4Z
CV158 1U_0402_6.3V4ZCV158 1U_0402_6.3V4Z
CV162 1U_0402_6.3V4ZCV162 1U_0402_6.3V4Z

BLM18PG121SN1D_0603

BLM18PG121SN1D_0603

M9X@ LV25

M9X@

1

CV188

CV188
1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

1

CV189

CV189

2

4

CV131

CV131

1 2
1 2
1 2
1 2

12

LV25

Reserve

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1
CV190

CV190

2

+VGA_CORE

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

2

1

0.1U_0402_16V4Z

0.1U_0402_16V4Z

+1.5VS

0.1U_0402_16V4Z

0.1U_0402_16V4Z

136mA

2

CV135

CV135
1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

60mA

170mA

170mA

+VDDRHA

+VDDRHB

68mA

414mA

CV191

CV191

2

CV195

CV195

1

+VDD_CT

+VDDR5

+VDDR4

+PCIE_PVDD

MPV18
MPV18

SPV18
+SPV10

1

CV196

CV196

2
1U_0402_6.3V4Z

1U_0402_6.3V4Z

3

UV1E

UV1E

MEM I/O

MEM I/O

AC7

VDDR1#1

AD11

VDDR1#2

AF7

VDDR1#3

AG10

VDDR1#4

AJ7

VDDR1#5

AK8

VDDR1#6

AL9

VDDR1#7

G11

VDDR1#8

G14

VDDR1#9

G17

VDDR1#10

G20

VDDR1#11

G23

VDDR1#12

G26

VDDR1#13

G29

VDDR1#14

H10

VDDR1#15

J7

VDDR1#16

J9

VDDR1#17

K11

VDDR1#18

K13

VDDR1#19

K8

VDDR1#20

L12

VDDR1#21

L16

VDDR1#22

L21

VDDR1#23

L23

VDDR1#24

L26

VDDR1#25

L7

VDDR1#26

M11

VDDR1#27

N11

VDDR1#28

P7

VDDR1#29

R11

VDDR1#30

U11

VDDR1#31

U7

VDDR1#32

Y11

VDDR1#33

Y7

VDDR1#34

LEVEL

LEVEL
TRANSLATION

TRANSLATION

AF26

VDD_CT#1

AF27

VDD_CT#2

AG26

VDD_CT#3

AG27

VDD_CT#4

I/O

I/O

AF23

VDDR3#1

AF24

VDDR3#2

AG23

VDDR3#3

AG24

VDDR3#4

AF13

VDDR5#1

AF15

VDDR5#2

AG13

VDDR5#3

AG15

VDDR5#4

AD12

VDDR4#1

AF11

VDDR4#2

AF12

VDDR4#3

AG11

VDDR4#4

MEM CLK

MEM CLK

M20

VDDRHA

M21

VSSRHA

V12

VDDRHB

U12

VSSRHB

PLL

PLL

AB37

PCIE_PVDD

H7

NC_MPV18#1

H8

NC_MPV18#2

AM10

NC_SPV18

AN9

SPV10

AN10

SPVSS

BACK BIAS

BACK BIAS

AA13

BBP#1

Y13

BBP#2

216-0772000-PRO_FCBGA962

216-0772000-PRO_FCBGA962

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

PCIE

PCIE

PCIE_VDDR#1
PCIE_VDDR#2
PCIE_VDDR#3
PCIE_VDDR#4
PCIE_VDDR#5
PCIE_VDDR#6
PCIE_VDDR#7
PCIE_VDDR#8

PCIE_VDDC#1
PCIE_VDDC#2
PCIE_VDDC#3
PCIE_VDDC#4
PCIE_VDDC#5
PCIE_VDDC#6
PCIE_VDDC#7
PCIE_VDDC#8

PCIE_VDDC#9
PCIE_VDDC#10
PCIE_VDDC#11
PCIE_VDDC#12

CORE

CORE

VDDC#10
VDDC#11
VDDC#12
VDDC#13
VDDC#14
VDDC#15

POWER

POWER

VDDC#16
VDDC#17
VDDC#18
VDDC#19
VDDC#20
VDDC#21
VDDC#22
VDDC#23
VDDC#24
VDDC#25
VDDC#26
VDDC#27
VDDC#28
VDDC#29
VDDC#30
VDDC#31
VDDC#32
VDDC#33
VDDC#34
VDDC#35
VDDC#36
VDDC#37
VDDC#38
VDDC#39
VDDC#40
VDDC#41
VDDC#42
VDDC#43
VDDC#44
VDDC#45
VDDC#46
VDDC#47
VDDC#48
VDDC#49
VDDC#50
VDDC#51
VDDC#52
VDDC#53
VDDC#54
VDDC#55
VDDC#56
VDDC#57
VDDC#58
VDDC#59
VDDC#60
VDDC#61
VDDC#62
VDDC#63
VDDC#64
VDDC#65
VDDC#66
VDDC#67
VDDC#68
VDDC#69
VDDC#70
VDDC#71
VDDC#72
VDDC#73
VDDC#74

VDDCI#1

ISOLATED

ISOLATED

VDDCI#2

CORE I/O

CORE I/O

VDDCI#3
VDDCI#4

2009/10/01 2010/10/01

2009/10/01 2010/10/01

2009/10/01 2010/10/01

VDDC#1
VDDC#2
VDDC#3
VDDC#4
VDDC#5
VDDC#6
VDDC#7
VDDC#8
VDDC#9

MADISONLP@

MADISONLP@

+PCIE_VDDR_VGA

AA31
AA32
AA33
AA34
V28
W29
W30
Y31

G30
G31
H29
H30
J29
J30
L28
M28
N28
R28
T28
U28

AA15
AA17
AA20
AA22
AA24
AA27
AB13
AB16
AB18
AB21
AB23
AB26
AB28
AC12
AC15
AC17
AC20
AC22
AC24
AC27
AD13
AD16
AD18
AD21
AD23
AD26
AF17
AF20
AF22
AG16
AG18
AG21
AH22
M16
M18
M23
M26
N15
N17
N20
N22
N24
N27
R13
R16
R18
R21
R23
R26
T15
T17
T20
T22
T24
T27
U16
U18
U21
U23
U26
V15
V17
V20
V22
V24
V27
Y16
Y18
Y21
Y23
Y26
Y28
AH27
AH28

M15
N13
R12
T12

Compal Secret Data

Compal Secret Data

Compal Secret Data

CV120 10U_0603_6.3V6MCV120 10U_0603_6.3V6M
CV124 10U_0603_6.3V6MCV124 10U_0603_6.3V6M
CV128 10U_0603_6.3V6MCV128 10U_0603_6.3V6M
CV132 10U_0603_6.3V6MCV132 10U_0603_6.3V6M
CV136 10U_0603_6.3V6MCV136 10U_0603_6.3V6M
CV139 10U_0603_6.3V6MCV139 10U_0603_6.3V6M
CV142 10U_0603_6.3V6MCV142 10U_0603_6.3V6M
CV145 1U_0402_6.3V4ZCV145 1U_0402_6.3V4Z
CV149 1U_0402_6.3V4ZCV149 1U_0402_6.3V4Z
CV153 1U_0402_6.3V4ZCV153 1U_0402_6.3V4Z

+VDDCI

Deciphered Date

Deciphered Date

Deciphered Date

1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2

2

500mA

2A

1 2

CV100 10U_0603_6.3V6MCV100 10U_0603_6.3V6M

1 2

CV104 1U_0402_6.3V4ZCV104 1U_0402_6.3V4Z

1 2

CV108 1U_0402_6.3V4ZCV108 1U_0402_6.3V4Z

1 2

CV111 1U_0402_6.3V4ZCV111 1U_0402_6.3V4Z

1 2

CV112 1U_0402_6.3V4ZCV112 1U_0402_6.3V4Z

1 2

CV113 1U_0402_6.3V4ZCV113 1U_0402_6.3V4Z

1 2

CV115 1U_0402_6.3V4ZCV115 1U_0402_6.3V4Z

1 2

CV118 1U_0402_6.3V4ZCV118 1U_0402_6.3V4Z

1

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

CV197

CV197

2

1

CV198

CV198

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1 2

LV21 BLM18PG121SN1D_0603LV21 BLM18PG121SN1D_0603

1 2

CV77 10U_0603_6.3V6MCV77 10U_0603_6.3V6M

1 2

CV82 1U_0402_6.3V4ZCV82 1U_0402_6.3V4Z

1 2

CV86 1U_0402_6.3V4ZCV86 1U_0402_6.3V4Z

1 2

CV90 1U_0402_6.3V4ZCV90 1U_0402_6.3V4Z

1 2

CV94 1U_0402_6.3V4ZCV94 1U_0402_6.3V4Z

+1.0VS

1

+

+

2

1 2

CV121 1U_0402_6.3V4ZCV121 1U_0402_6.3V4Z

1 2

CV125 1U_0402_6.3V4ZCV125 1U_0402_6.3V4Z

1 2

CV129 1U_0402_6.3V4ZCV129 1U_0402_6.3V4Z

1 2

CV133 1U_0402_6.3V4ZCV133 1U_0402_6.3V4Z

1 2

CV137 1U_0402_6.3V4ZCV137 1U_0402_6.3V4Z

1 2

CV140 1U_0402_6.3V4ZCV140 1U_0402_6.3V4Z

1 2

CV143 1U_0402_6.3V4ZCV143 1U_0402_6.3V4Z

1 2

CV146 1U_0402_6.3V4ZCV146 1U_0402_6.3V4Z

1 2

CV150 1U_0402_6.3V4ZCV150 1U_0402_6.3V4Z

1 2

CV154 1U_0402_6.3V4ZCV154 1U_0402_6.3V4Z

1 2

CV159 1U_0402_6.3V4ZCV159 1U_0402_6.3V4Z

1 2

CV163 1U_0402_6.3V4ZCV163 1U_0402_6.3V4Z

1 2

CV165 1U_0402_6.3V4ZCV165 1U_0402_6.3V4Z

1 2

CV167 1U_0402_6.3V4ZCV167 1U_0402_6.3V4Z

1 2

CV169 1U_0402_6.3V4ZCV169 1U_0402_6.3V4Z

1 2

CV174 1U_0402_6.3V4ZCV174 1U_0402_6.3V4Z

1 2

CV176 1U_0402_6.3V4ZCV176 1U_0402_6.3V4Z

1 2

CV178 1U_0402_6.3V4ZCV178 1U_0402_6.3V4Z

1 2

CV181 1U_0402_6.3V4ZCV181 1U_0402_6.3V4Z

1 2

CV183 1U_0402_6.3V4ZCV183 1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

CV199

CV199

2

1 2

CV97 1U_0402_6.3V4ZCV97 1U_0402_6.3V4Z

1 2

CV101 0.1U_0402_16V4ZCV101 0.1U_0402_16V4Z

1 2

CV105 0.1U_0402_16V4ZCV105 0.1U_0402_16V4Z

CV116

CV116
390U_2.5V_M_R10

390U_2.5V_M_R10

1

CV200

CV200

2

10U_0603_6.3V6M

10U_0603_6.3V6M

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

1

+1.8VS

25A

1

+

+

CV114

CV114
390U_2.5V_M_R10

390U_2.5V_M_R10

2

CV122 1U_0402_6.3V4ZCV122 1U_0402_6.3V4Z
CV126 1U_0402_6.3V4ZCV126 1U_0402_6.3V4Z
CV130 1U_0402_6.3V4ZCV130 1U_0402_6.3V4Z
CV134 1U_0402_6.3V4ZCV134 1U_0402_6.3V4Z
CV138 1U_0402_6.3V4ZCV138 1U_0402_6.3V4Z
CV141 1U_0402_6.3V4ZCV141 1U_0402_6.3V4Z
CV144 1U_0402_6.3V4ZCV144 1U_0402_6.3V4Z
CV147 1U_0402_6.3V4ZCV147 1U_0402_6.3V4Z
CV151 1U_0402_6.3V4ZCV151 1U_0402_6.3V4Z
CV155 1U_0402_6.3V4ZCV155 1U_0402_6.3V4Z
CV160 1U_0402_6.3V4ZCV160 1U_0402_6.3V4Z
CV164 1U_0402_6.3V4ZCV164 1U_0402_6.3V4Z
CV166 1U_0402_6.3V4ZCV166 1U_0402_6.3V4Z
CV168 1U_0402_6.3V4ZCV168 1U_0402_6.3V4Z
CV170 1U_0402_6.3V4ZCV170 1U_0402_6.3V4Z
CV175 1U_0402_6.3V4ZCV175 1U_0402_6.3V4Z
CV177 1U_0402_6.3V4ZCV177 1U_0402_6.3V4Z
CV179 1U_0402_6.3V4ZCV179 1U_0402_6.3V4Z
CV182 1U_0402_6.3V4ZCV182 1U_0402_6.3V4Z
CV184 1U_0402_6.3V4ZCV184 1U_0402_6.3V4Z

30ohm@100MHz
RDC:0.02ohm 4A

1 2

LV29 PBY201209T-300Y-N_2PLV29 PBY201209T-300Y-N_2P

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

SCHEMATIC,MB A6042

SCHEMATIC,MB A6042

SCHEMATIC,MB A6042

401849

401849

401849

+VGA_CORE

1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2

4A

1

+VGA_CORE

16 58Tuesday, May 18, 2010

16 58Tuesday, May 18, 2010

16 58Tuesday, May 18, 2010

B

B

B

of

of

of

5

UV1F

UV1F

4

3

2

1

AB39

PCIE_VSS#1

E39

PCIE_VSS#2

F34

PCIE_VSS#3

F39

PCIE_VSS#4

G33

PCIE_VSS#5

G34

PCIE_VSS#6

H31

PCIE_VSS#7

H34

PCIE_VSS#8

H39

PCIE_VSS#9

J31

D D

C C

B B

A A

5

PCIE_VSS#10

J34

PCIE_VSS#11

K31

PCIE_VSS#12

K34

PCIE_VSS#13

K39

PCIE_VSS#14

L31

PCIE_VSS#15

L34

PCIE_VSS#16

M34

PCIE_VSS#17

M39

PCIE_VSS#18

N31

PCIE_VSS#19

N34

PCIE_VSS#20

P31

PCIE_VSS#21

P34

PCIE_VSS#22

P39

PCIE_VSS#23

R34

PCIE_VSS#24

T31

PCIE_VSS#25

T34

PCIE_VSS#26

T39

PCIE_VSS#27

U31

PCIE_VSS#28

U34

PCIE_VSS#29

V34

PCIE_VSS#30

V39

PCIE_VSS#31

W31

PCIE_VSS#32

W34

PCIE_VSS#33

Y34

PCIE_VSS#34

Y39

PCIE_VSS#35

F15

GND#101

F17

GND#102

F19

GND#103

F21

GND#104

F23

GND#105

F25

GND#106

F27

GND#107

F29

GND#108

F31

GND#109

F33

GND#110

F7

GND#111

F9

GND#112

G2

GND#113

G6

GND#114

H9

GND#115

J2

GND#116

J27

GND#117

J6

GND#118

J8

GND#119

K14

GND#120

K7

GND#121

L11

GND#122

L17

GND#123

L2

GND#124

L22

GND#125

L24

GND#126

L6

GND#127

M17

GND#128

M22

GND#129

M24

GND#130

N16

GND#131

N18

GND#132

N2

GND#133

N21

GND#134

N23

GND#135

N26

GND#136

N6

GND#137

R15

GND#138

R17

GND#139

R2

GND#140

R20

GND#141

R22

GND#142

R24

GND#143

R27

GND#144

R6

GND#145

T11

GND#146

T13

GND#147

T16

GND#148

T18

GND#149

T21

GND#150

T23

GND#151

T26

GND#152

U15

GND#153

U17

GND#154

U2

GND#155

U20

GND#156

U22

GND#157

U24

GND#158

U27

GND#159

U6

GND#160

V11

GND#161

V16

GND#162

V18

GND#163

V21

GND#164

V23

GND#165

V26

GND#166

W2

GND#167

W6

GND#168

Y15

GND#169

Y17

GND#170

Y20

GND#171

Y22

GND#172

Y24

GND#173

Y27

GND#174

U13

GND#175

V13

GND#176

216-0772000-PRO_FCBGA962

216-0772000-PRO_FCBGA962

4

GND

GND

VSS_MECH#1
VSS_MECH#2
VSS_MECH#3

GND#1
GND#2
GND#3
GND#4
GND#5
GND#6
GND#7
GND#8

GND#9
GND#10
GND#11
GND#12
GND#13
GND#14
GND#15
GND#16
GND#17
GND#18
GND#19
GND#20
GND#21
GND#22
GND#23
GND#24
GND#25
GND#26
GND#27
GND#28
GND#29
GND#30
GND#31
GND#32
GND#33
GND#34
GND#35
GND#36
GND#37
GND#38
GND#39
GND#40
GND#41
GND#42
GND#43
GND#44
GND#45
GND#46
GND#47
GND#48
GND#49
GND#50
GND#51
GND#52
GND#53
GND#54
GND#55
GND#56
GND#57
GND#58
GND#59
GND#60
GND#61
GND#62
GND#63
GND#64
GND#65
GND#66
GND#67
GND#68
GND#69
GND#70
GND#71
GND#72
GND#73
GND#74
GND#75
GND#76
GND#77
GND#78
GND#79
GND#80
GND#81
GND#82
GND#83
GND#84
GND#85
GND#86
GND#87
GND#88
GND#89
GND#90
GND#91
GND#92
GND#93
GND#94
GND#95
GND#96
GND#97
GND#98
GND#99

GND#100

A3
A37
AA16
AA18
AA2
AA21
AA23
AA26
AA28
AA6
AB12
AB15
AB17
AB20
AB22
AB24
AB27
AC11
AC13
AC16
AC18
AC2
AC21
AC23
AC26
AC28
AC6
AD15
AD17
AD20
AD22
AD24
AD27
AD9
AE2
AE6
AF10
AF16
AF18
AF21
AG17
AG2
AG20
AG22
AG6
AG9
AH21
AH29
AJ10
AJ11
AJ2
AJ28
AJ6
AK11
AK31
AK7
AL11
AL14
AL17
AL2
AL20
AL21
AL23
AL26
AL32
AL6
AL8
AM11
AM31
AM9
AN11
AN2
AN30
AN6
AN8
AP11
AP7
AP9
AR5
AW34
B11
B13
B15
B17
B19
B21
B23
B25
B27
B29
B31
B33
B7
B9
C1
C39
E35
E5
F11
F13

A39
AW1
AW39

MADISONLP@

MADISONLP@

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/10/01 2010/10/01

2009/10/01 2010/10/01

2009/10/01 2010/10/01

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC,MB A6042

SCHEMATIC,MB A6042

SCHEMATIC,MB A6042

401849

401849

401849

1

17 58Tuesday, May 18, 2010

17 58Tuesday, May 18, 2010

17 58Tuesday, May 18, 2010

of

of

of

B

B

B

5

4

3

2

1

MDB0
MDB1
MDB2
MDB3
MDB4
MDB5
MDB6
MDB7
MDB8

MDB9
MDB10
MDB11
MDB12
MDB13
MDB14
MDB15
MDB16
MDB17
MDB18
MDB19
MDB20
MDB21
MDB22
MDB23
MDB24
MDB25
MDB26
MDB27
MDB28
MDB29
MDB30
MDB31
MDB32
MDB33
MDB34
MDB35
MDB36
MDB37
MDB38
MDB39
MDB40
MDB41
MDB42
MDB43
MDB44
MDB45
MDB46
MDB47
MDB48
MDB49
MDB50
MDB51
MDB52
MDB53
MDB54
MDB55
MDB56
MDB57
MDB58
MDB59
MDB60
MDB61
MDB62
MDB63

+MVREFDB
+MVREFSB

TESTEN

CV321

CV321
0_0402_5%

0_0402_5%
M9X@

M9X@

MDB[0..63]

AA4
AB6
AB1
AB3
AD6
AD1
AD3
AD5
AF1
AF3
AF6
AG4
AH5
AH6

AJ4
AK3
AF8
AF9
AG8
AG7
AK9
AL7

AM8
AM7

AK1
AL4

AM6
AM1

AN4
AP3
AP1
AP5

Y12

AA12

AD28
AK10

AL10

C5
C3
E3
E1
F1
F3
F5
G4
H5
H6

J4
K6
K5

L4
M6
M1
M3
M5
N4
P6
P5
R4
T6
T1
U4
V6
V1
V3
Y6
Y1
Y3
Y5

MDA[0..63]

D D

Close to pin L18

C C

B B

Close to pin L20

40.2_0402_1%

40.2_0402_1%

100_0402_1%

100_0402_1%

RV41

RV41

40.2_0402_1%

40.2_0402_1%
MANHA@

MANHA@

RV43

RV43

100_0402_1%

100_0402_1%

RV45

RV45

MANHA@

MANHA@

RV47

RV47

+1.5VS

+1.5VS

12

12

12

12

RV41

RV41
100_0402_1%

100_0402_1%
M9X@

M9X@

1

CV202

CV202

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

RV45

RV45
100_0402_1%

100_0402_1%
M9X@

M9X@

1

CV204

CV204

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

+1.5VS

+MVREFDA

+MVREFSA

1 2
1 2
1 2

1 2
1 2
1 2

MDA[0..63] 19

MDA0
MDA1
MDA2
MDA3
MDA4
MDA5
MDA6
MDA7
MDA8

MDA9
MDA10
MDA11
MDA12
MDA13
MDA14
MDA15
MDA16
MDA17
MDA18
MDA19
MDA20
MDA21
MDA22
MDA23
MDA24
MDA25
MDA26
MDA27
MDA28
MDA29
MDA30
MDA31
MDA32
MDA33
MDA34
MDA35
MDA36
MDA37
MDA38
MDA39
MDA40
MDA41
MDA42
MDA43
MDA44
MDA45
MDA46
MDA47
MDA48
MDA49
MDA50
MDA51
MDA52
MDA53
MDA54
MDA55
MDA56
MDA57
MDA58
MDA59
MDA60
MDA61
MDA62
MDA63

+MVREFDA
+MVREFSA

RV48 243_0402_1%MANHA@ RV48 243_0402_1%MANHA@
RV49 243_0402_1%MANHA@ RV49 243_0402_1%MANHA@
RV50 243_0402_1%MANHA@ RV50 243_0402_1%MANHA@

RV51 243_0402_1%RV51 243_0402_1%
RV53 243_0402_1%MANHA@ RV53 243_0402_1%MANHA@
RV55 243_0402_1%MANHA@ RV55 243_0402_1%MANHA@

UV1C

UV1C

C37

DQA_0

C35

DQA_1

A35

DQA_2

E34

DQA_3

G32

DQA_4

D33

DQA_5

F32

DQA_6

E32

DQA_7

D31

DQA_8

F30

DQA_9

C30

DQA_10

A30

DQA_11

F28

DQA_12

C28

DQA_13

A28

DQA_14

E28

DQA_15

D27

DQA_16

F26

DQA_17

C26

DQA_18

A26

DQA_19

F24

DQA_20

C24

DQA_21

A24

DQA_22

E24

DQA_23

C22

DQA_24

A22

DQA_25

F22

DQA_26

D21

DQA_27

A20

DQA_28

F20

DQA_29

D19

DQA_30

E18

DQA_31

C18

DQA_32

A18

DQA_33

F18

DQA_34

D17

DQA_35

A16

DQA_36

F16

DQA_37

D15

DQA_38

E14

DQA_39

F14

DQA_40

D13

DQA_41

F12

DQA_42

A12

DQA_43

D11

DQA_44

F10

DQA_45

A10

DQA_46

C10

DQA_47

G13

DQA_48

H13

DQA_49

J13

DQA_50

H11

DQA_51

G10

DQA_52

G8

DQA_53

K9

DQA_54

K10

DQA_55

G9

DQA_56

A8

DQA_57

C8

DQA_58

E8

DQA_59

A6

DQA_60

C6

DQA_61

E6

DQA_62

A5

DQA_63

L18

MVREFDA

L20

MVREFSA

L27

NC_MEM_CALRN0

N12

NC_MEM_CALRN1

AG12

NC_MEM_CALRN2

M12

MEM_CALRP1

M27

NC_MEM_CALRP0

AH12

NC_MEM_CALRP2

216-0772000-PRO_FCBGA962

216-0772000-PRO_FCBGA962
MADISONLP@

MADISONLP@

MAA_0
MAA_1
MAA_2
MAA_3
MAA_4
MAA_5
MAA_6
MAA_7
MAA_8

MAA_9
MAA_10
MAA_11
MAA_12

MAA_13/BA2
MAA_14/BA0
MAA_15/BA1

DQMA_0
DQMA_1
DQMA_2
DQMA_3
DQMA_4
DQMA_5
DQMA_6

MEMORY INTERFACE A

MEMORY INTERFACE A

DQMA_7

QSA_0/RDQSA_0
QSA_1/RDQSA_1
QSA_2/RDQSA_2
QSA_3/RDQSA_3
QSA_4/RDQSA_4
QSA_5/RDQSA_5
QSA_6/RDQSA_6
QSA_7/RDQSA_7

QSA_0B/WDQSA_0
QSA_1B/WDQSA_1
QSA_2B/WDQSA_2
QSA_3B/WDQSA_3
QSA_4B/WDQSA_4
QSA_5B/WDQSA_5
QSA_6B/WDQSA_6
QSA_7B/WDQSA_7

ODTA0

ODTA1

CLKA0
CLKA0B

CLKA1
CLKA1B

RASA0B
RASA1B

CASA0B
CASA1B

CSA0B_0
CSA0B_1

CSA1B_0
CSA1B_1

CKEA0

CKEA1

WEA0B
WEA1B

RSVD#1
RSVD#2
RSVD#3

RSVD#5
RSVD#6

RSVD#9

RSVD#11

MAA1

J23

MAA2

H24

MAA3

J24

MAA4

H26

MAA5 MAB4

J26

MAA6

H21

MAA7

G21

MAA8

H19

MAA9

H20

MAA10

L13

MAA11

G16

MAA12

J16

A_BA2

H16

A_BA0

J17

A_BA1

H17

DQMA#0

A32

DQMA#1

C32

DQMA#2

D23

DQMA#3

E22

DQMA#4

C14

DQMA#5

A14

DQMA#6

E10

DQMA#7

D9

QSA0

C34

QSA1

D29

QSA2

D25

QSA3

E20

QSA4

E16

QSA5

E12

QSA6

J10

QSA7

D7

QSA#0

A34

QSA#1

E30

QSA#2

E26

QSA#3

C20

QSA#4

C16

QSA#5

C12

QSA#6

J11

QSA#7

F8

ODTA0

J21

ODTA1

G19

CLKA0

H27

CLKA0#

G27

CLKA1

J14

CLKA1#

H14

RASA0#

K23

RASA1#

K19

CASA0#

K20

CASA1#

K17

CSA0#_0

K24
K27

CSA1#_0

M13
K16

CKEA0

K21

CKEA1

J20

WEA0#

K26

WEA1#

L15
AF28

AG28
AL31

MAA13

H23
J19

MAB13

T8
W8

MAA0

G24

MAA[13..0]

A_BA[2..0]

ODTA0 19
ODTA1 19

CLKA0 19
CLKA0# 19

CLKA1 19
CLKA1# 19

RASA0# 19
RASA1# 19

CASA0# 19
CASA1# 19

CSA0#_0 19

CSA1#_0 19

CKEA0 19
CKEA1 19

WEA0# 19
WEA1# 19

DQMA#[7..0] 19

+3VS_DELAY

12

@

@
RV56

RV56
10K_0402_5%

10K_0402_5%

12

RV23

RV23
10K_0402_5%

10K_0402_5%

MAA[13..0] 19

A_BA[2..0] 19

Close to pin Y12

+1.5VS

RV44

RV44

100_0402_1%

100_0402_1%

RV46

RV46

40.2_0402_1%

40.2_0402_1%
MANHA@

MANHA@

1

CV205

CV205

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

12

RV42

RV42

40.2_0402_1%

40.2_0402_1%
MANHA@

MANHA@

12

RV46

RV46
100_0402_1%

100_0402_1%
M9X@

M9X@

+MVREFSB

QSA[7..0] 19

QSA#[7..0] 19

Close to pin AA12

+1.5VS

12

12

RV52

RV52

100_0402_1%

100_0402_1%

Debug Only, for clock observation

@

@
RV57 51_0402_5%

TESTEN

RV57 51_0402_5%
RV58 51_0402_5%

RV58 51_0402_5%
@

@

RV57

RV57

4.7K_0402_5%

4.7K_0402_5%
M9X@

M9X@

12
12

+MVREFDB

1

CV203

CV203

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

RV58

RV58

4.7K_0402_5%

4.7K_0402_5%
M9X@

M9X@

RV42

RV42
100_0402_1%

100_0402_1%
M9X@

M9X@

@

@
CV320 0.1U_0402_16V4Z

CV320 0.1U_0402_16V4Z

1 2
1 2

CV321 0.1U_0402_16V4Z

CV321 0.1U_0402_16V4Z
@

@

CV320

CV320
0_0402_5%

0_0402_5%
M9X@

M9X@

MDB[0..63] 20

UV1D

UV1D

DQB_0
DQB_1
DQB_2
DQB_3
DQB_4
DQB_5
DQB_6
DQB_7
DQB_8
DQB_9
DQB_10
DQB_11
DQB_12
DQB_13
DQB_14
DQB_15
DQB_16
DQB_17
DQB_18
DQB_19
DQB_20
DQB_21
DQB_22
DQB_23
DQB_24
DQB_25
DQB_26
DQB_27
DQB_28
DQB_29
DQB_30
DQB_31
DQB_32
DQB_33
DQB_34
DQB_35
DQB_36
DQB_37
DQB_38
DQB_39
DQB_40
DQB_41
DQB_42
DQB_43
DQB_44
DQB_45
DQB_46
DQB_47
DQB_48
DQB_49
DQB_50
DQB_51
DQB_52
DQB_53
DQB_54
DQB_55
DQB_56
DQB_57
DQB_58
DQB_59
DQB_60
DQB_61
DQB_62
DQB_63

MVREFDB
MVREFSB

TESTEN
CLKTESTA

CLKTESTB

216-0772000-PRO_FCBGA962

216-0772000-PRO_FCBGA962
MADISONLP@

MADISONLP@

MEMORY INTERFACE B

MEMORY INTERFACE B

QSB_0B/WDQSB_0
QSB_1B/WDQSB_1
QSB_2B/WDQSB_2
QSB_3B/WDQSB_3
QSB_4B/WDQSB_4
QSB_5B/WDQSB_5
QSB_6B/WDQSB_6
QSB_7B/WDQSB_7

Park-M2 uses memory group B only

MAB0

P8

MAB_0
MAB_1
MAB_2
MAB_3
MAB_4
MAB_5
MAB_6
MAB_7
MAB_8

MAB_9
MAB_10
MAB_11
MAB_12

MAB_13/BA2
MAB_14/BA0
MAB_15/BA1

DQMB_0
DQMB_1
DQMB_2
DQMB_3
DQMB_4
DQMB_5
DQMB_6
DQMB_7

QSB_0/RDQSB_0
QSB_1/RDQSB_1
QSB_2/RDQSB_2
QSB_3/RDQSB_3
QSB_4/RDQSB_4
QSB_5/RDQSB_5
QSB_6/RDQSB_6
QSB_7/RDQSB_7

ODTB0

ODTB1

CLKB0
CLKB0B

CLKB1
CLKB1B

RASB0B
RASB1B

CASB0B
CASB1B

CSB0B_0
CSB0B_1

CSB1B_0
CSB1B_1

CKEB0

CKEB1

WEB0B
WEB1B

DRAM_RST

T9
P9
N7
N8
N9
U9
U8
Y9
W9
AC8
AC9
AA7
AA8
Y8
AA9

H3
H1
T3
T5
AE4
AF5
AK6
AK5

F6
K3
P3
V5
AB5
AH1
AJ9
AM5

G7
K1
P1
W4
AC4
AH3
AJ8
AM3

T7
W7

L9
L8

AD8
AD7

T10
Y10

W10
AA10

P10
L10

AD10
AC10

U10
AA11

N10
AB11

AH11

RV132

RV132
0_0402_5%

0_0402_5%
M9X@

M9X@

1

2

MAB1
MAB2
MAB3

MAB5
MAB6
MAB7
MAB8
MAB9
MAB10
MAB11
MAB12
B_BA2
B_BA0
B_BA1

DQMB#0
DQMB#1
DQMB#2
DQMB#3
DQMB#4
DQMB#5
DQMB#6
DQMB#7

QSB0
QSB1
QSB2
QSB3
QSB4
QSB5
QSB6
QSB7

QSB#0
QSB#1
QSB#2
QSB#3
QSB#4
QSB#5
QSB#6
QSB#7

ODTB0
ODTB1

CLKB0#

CLKB1#

RASB0#
RASB1#

CASB0#
CASB1#

CSB0#_0

CSB1#_0

CKEB0
CKEB1

WEB0#
WEB1#

CV206

CV206
68P_0402_50V8J

68P_0402_50V8J
MANHA@

MANHA@

CV206

CV206

0.01U_0402_25V7K

0.01U_0402_25V7K
M9X@

M9X@

CLKB0

CLKB1

MANHA@

MANHA@

RV132 51_0402_5%

RV132 51_0402_5%

MAB[13..0]

B_BA[2..0]

ODTB0 20
ODTB1 20

CLKB0 20
CLKB0# 20

CLKB1 20
CLKB1# 20

RASB0# 20
RASB1# 20

CASB0# 20
CASB1# 20

CSB0#_0 20

CSB1#_0 20

CKEB0 20
CKEB1 20

WEB0# 20
WEB1# 20

12

RV54

M9X@RV54

M9X@

4.7K_0402_5%

4.7K_0402_5%

12

RV59

RV59
10K_0402_5%

10K_0402_5%
MANHA@

MANHA@

MAB[13..0] 20

B_BA[2..0] 20

DQMB#[7..0] 20

QSB[7..0] 20

QSB#[7..0] 20

12

+1.5VS

DRAM_RST# 19,20

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/10/01 2010/10/01

2009/10/01 2010/10/01

2009/10/01 2010/10/01

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC,MB A6042

SCHEMATIC,MB A6042

SCHEMATIC,MB A6042

401849

401849

401849

1

18 58Tuesday, May 18, 2010

18 58Tuesday, May 18, 2010

18 58Tuesday, May 18, 2010

B

B

B

of

of

of