Cirrus Logic CS470xx User Manual

CS470xx Data Sheet

CS470xx

Features

 Cost-effective, High-performance 32-bit DSP

 300,000,000 MAC/S (multiply accumulates per second)

 Dual MAC cycles per clock

 72-bit accumulators are the highest precision in the

industry

 32K x 32-bit SRAM with three 2K blocks assignable to

either Y data or program memory

 Integrated DAC and ADC Functionality

†

 8

Channels of 24-bit DAC output: 108dB DR, –98 dB

THD+N

†

 4

Channels of 24-bit ADC input: 105dB DR, –98 dB

THD+N

 Integrated 5:1 analog mux feeds one stereo ADC

 Configurable Serial Audio Inputs and Outputs

 Integrated 192 kHz S/PDIF Rx

 Integrated 192 kHz S/PDIF Tx

 Supports 32-bit serial data @ 192 kHz

 Supports 32-bit audio sample I/O between DSP chips

 TDM I/O modes

 Supports Different Sample Rates (Fs)

 Three integrated hardware SRC blocks

 Output can be master or slave

 Supports dual-domain Fs on S/PDIF vs. I²S inputs

 DSP Tool Set with Private Keys Protect Customer IP

 Integrated Clock Manager/PLL

 Flexibility to operate from internal PLL, external crystal,

external oscillator

 Input Fs Auto Detection w/ µC Acknowledgement

The CS470xx family is a new generation of audio system-on-a-chip (ASOC) processors targeted at high fidelity, cost sensitive designs. Derived from the highly successful CS48500 32-bit fixed-point audio enhancement processor family, the CS470xx further simplifies system design and reduces total system cost by integrating the S/ PDIF Rx, S/PDIF Tx, analog inputs, analog outputs, and SRCs. For example, a hardware SRC can down-sample a 192 kHz S/PDIF stream to a lower Fs to reduce memory and MIPS requirements for processing. This integration effectively reduces the chip count from 3 to 1, which allows smaller, less expensive board designs.

Target applications include:

 Automotive head units and outboard amplifiers

 Automotive processors and automotive integration hubs

 Digital TV

 MP3 docking stations

 AVR and DVD RX

 DSP controlled speakers (subwoofers, sound bars)

The CS470xx is programmed using the simple yet powerful Cirrus proprietary DSP Composer™ GUI development and pre-production tuning tool. Processing chains can be designed using a drag-and-drop interface to place/utilize functional macro audio DSP primitives and custom audio filtering blocks. The end result is a software image that is downloaded to the DSP via serial control port.

The Cirrus Framework™ programming environment offers Assembly and C language compilers and other software development tools for porting existing code to the CS470xx family platform.

The CS470xx is available in a 100-pin LQFP package with exposed pad for better thermal characteristics. Both Commercial (0°C to +70°C) and Automotive (–40°C to +85°C) temperature grades.

 Host Control and Boot via I²C™ or SPI™ Serial Interface

 Configurable GPIOs and External Interrupt Input

 1.8V Core and a 3.3V I/O that is tolerant to 5V input

 Low-power Mode

†”

“

features differ on CS47024, CS47028, or CS47048.

See Table 3-1.

http://www.cirrus.com

Ordering Information:

See Section 6 for ordering information.

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JUL '12

DAC0

text

Coyote 32-bit Core

in the CS47048 DSP

DMA

SPI / I2C

Control

I2S

ADC0/1

I2S

I2S / S/PDIF

PLL

ROM

S R C 2

Peripheral Bus

Clock

Manager

Timers

RAM

GPIO

DAC1 DAC2 DAC3

DAC4

DAC5

DAC6 DAC7

MUX

S R C 1

ROM

RAM

ROM RAM

32K x 32-bit SRAM with three 2K blocks

Assignable to Program or Y Data memory

Memory Bus

I2S /

S/PDIF

Stereo Inputs On Analog in

ADC2/3

DBC

(I2C Slave)

PIC

ADC’s & DAC’s operate

in Single ended or

Differential mode

S R C

8ch

SRC3 has 8

independent Channels

for In or Out

4ch

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CS47048 Block Diagram

Contacting Cirrus Logic Support

For all product questions and inquiries, contact a Cirrus Logic Sales Representative. To find the one nearest you, go to www.cirrus.com.

IMPORTANT NOTICE

Cirrus Logic, Inc. and its subsidiaries (“Cirrus”) believe that the information contained in this document is accurate and reliable. However, the information is subject to change without notice and is provided “AS IS” without warranty of any kind (express or implied). Customers are advised to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, indemnification, and limitation of liability. No responsibility is assumed by Cirrus for the use of this information, including use of this information as the basis for manufacture or sale of any items, or for infringement of patents or other rights of third parties. This document is the property of Cirrus and by furnishing this information, Cirrus grants no license, express or implied under any patents, mask work rights, copyrights, trademarks, trade secrets or other intellectual property rights. Cirrus owns the copyrights associated with the information contained herein and gives consent for copies to be made of the information only for use within your organization with respect to Cirrus integrated circuits or other products of Cirrus. This consent does not extend to other copying such as copying for general distribution, advertising or promotional purposes, or for creating any work for resale.

CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL APPLICATIONS”). CIRRUS PRODUCTS ARE NOT DESIGNED, AUTHORIZED OR WARRANTED FOR USE IN PRODUCTS SURGICALLY IMPLANTED INTO THE BODY, AUTOMOTIVE SAFETY OR SECURITY DEVICES, LIFE SUPPORT PRODUCTS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF CIRRUS PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER’S RISK AND CIRRUS DISCLAIMS AND MAKES NO WARRANTY, EXPRESS, STATUTORY OR IMPLIED, INCLUDING THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR PARTICULAR PURPOSE, WITH REGARD TO ANY CIRRUS PRODUCT THAT IS USED IN SUCH A MANNER. IF THE CUSTOMER OR CUSTOMER’S CUSTOMER USES OR PERMITS THE USE OF CIRRUS PRODUCTS IN CRITICAL APPLICATIONS, CUSTOMER AGREES, BY SUCH USE, TO FULLY INDEMNIFY CIRRUS, ITS OFFICERS, DIRECTORS, EMPLOYEES, DISTRIBUTORS AND OTHER AGENTS FROM ANY AND ALL LIABILITY, INCLUDING ATTORNEYS’ FEES AND COSTS, THAT MAY RESULT FROM OR ARISE IN CONNECTION WITH THESE USES.

Cirrus Logic, Cirrus, the Cirrus Logic logo designs, Framerwork, and DSP Composer are trademarks of Cirrus Logic, Inc. All other brand and product names in this document may be trademarks or service marks of their respective owners.

SPI is a trademark of Motorola, Inc.

I²C is a trademark of Philips Semiconductor.

Dolby, Pro Logic, Dolby Headphone, Virtual Speaker and the double-D symbol are registered trademarks of Dolby Laboratories, Inc. Supply of an implementation of Dolby Technology does not convey a license nor imply a right under any patent, or any other industrial or Intellectual Property Right of Dolby Laboratories, to use the Implementation in any finished end-user or ready-to-use final product. It is hereby notified that a license for such use is required from Dolby Laboratories.

SRS CircleSurround II technology is incorporated under license from SRS Labs, Inc. The SRS Circle Surround II technology/solution rights incorporated in the Cirrus Logic CS470xx products are owned by SRS Labs, a U.S. Corporation and licensed to Cirrus Logic, Inc. Purchaser of the Cirrus Logic CS470xx products must sign a license for use of the chip and display of the SRS Labs trademarks. Any products incorporating the Cirrus Logic CS470xx products must be sent to SRS Labs for review. SRS CircleSurround II is protected under US and foreign patents issued and/or pending. SRS Circle Surround II, SRS and (O) symbol are trademarks of SRS Labs, Inc. in the United States and selected foreign countries. Neither the purchase of the Cirrus Logic CS470xx products, nor the corresponding sale of audio enhancement equipment conveys the right to sell commercialized recordings made with any SRS technology/solution. SRS Labs requires all set makers to comply with all rules and regulations as outlined in the SRS Trademark Usage Manual.

3 DS787PP9

1 Documentation Strategy

The CS470xx Data Sheet describes the CS47048, CS47028, and CS47024 audio processors. This document should be used in conjunction with the following documents when evaluating or designing a system around the CS470xx processors.

Table 1-1. CS470xx Related Documentation

Document Name Description

CS470xx Data Sheet This document

CS470xx Hardware User’s Manual Guide Includes detailed system design information such as typical connection diagrams, boot-proce-

AN333 - CS470xx Firmware User’s Manual Includes a list of firmware modules available on the CS470xx family platform and detailed firm-

DSP Composer User’s Manual Includes detailed configuration and usage information for the GUI development tool

CDB470xx User’s Manual Includes detailed instructions on the use of the CDB470xx development board

dures, and pin descriptions

ware design information including signal processing flow diagrams and control API information

The scope of the CS470xx Data Sheet is primarily the hardware specifications of the CS470xx family of devices. This includes hardware functionality, characteristic data, pinout, and packaging information.

The intended audience for the CS470xx Data Sheet is the system PCB designer, MCU programmer, and the quality control engineer.

2 Overview

The CS470xx DSP is designed to provide high-performance post-processing and mixing of analog and digital audio. Dual clock domains are supported when the DAI and SPDIF RX inputs are used together. Integrated sample rate converters (SRCs) allow audio streams with different sample rates to be mixed. The low-power standby preserves battery life for applications that are always on, but not necessarily processing audio, such as automotive audio systems.

The CS470xx uses voltage-out DACs and is capable of supporting dual input clock domains through the use of the internal SRCs. The CS470xx is available in a 100-pin LQFP package. Refer to Table 3-1 and Table 3-2 for the input, output, and firmware configurations for the CS470xx DSP.

2.1 Licensing

Licenses are required for any third-party audio processing algorithms provided for the CS470xx. Contact your local Cirrus Logic Sales representative for more information.

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3 Code Overlays

The suite of software available for the CS470xx family consists of an operating system (OS) and a library of overlays. The software components for the CS470xx family include:

1. OS/Kernel—Encompasses all non-audio processing tasks, including loading data from external serial memory,

processing host messages, calling audio-processing subroutines, error concealment, etc.

2. Decoder—Any module that performs a compressed audio decode on IEC61937-packed data delivered via S/PDIF

Rx or I²S input, such as Dolby Digital (AC3).

3. Matrix-processor—Any Module that performs a matrix decode on PCM data to produce more output channels than

input channels (2Æn channels). Examples are Dolby speaking, these modules increase the number of valid channels in the audio I/O buffer.

4. Virtualizer-processor—Any module that encodes PCM data into fewer output channels than input channels (nÆ2

channels) with the effect of providing “phantom” speakers to represent the physical audio channels that were eliminated. Examples are Dolby Headphone modules reduce the number of valid channels in the audio I/O buffer.

5. Post-processors—Any module that processes audio I/O buffer PCM data. Examples are bass management, audio

manager, tone control, EQ, delay, customer-specific effects, and any post-processing algorithms available for the CS470xx DSP.

The bulk of standard overlays are stored in ROM within the CS470xx, but a small image is required to configure the overlays and boot the DSP. This small image can either be stored in an external serial flash/EEPROM, or downloaded via a host controller through the SPI/I²C serial port.

2 and Dolby® Virtual Speaker® 2. Generally speaking, these

Pro Logic® IIx and SRS Circle Surround II®. Generally

The overlay structure reduces the time required to reconfigure the DSP when a processing change is requested. Each overlay can be reloaded independently without disturbing the other overlays. For example, when a different post-processor is selected, the OS, does not need to be reloaded—only the new post-processor.

Table 3-1 lists the different configuration options available. Refer to the CS470xx Firmware User’s Manual for the latest

listing of application codes and Cirrus Framework™ modules available. See Table 3-2, which provides a summary of the available channels for each type of input and output communication mode for members of the CS470xx family of DSPs.

5 DS787PP9

Table 3-1. CS470xx Device Selection Guide

3 Code Overlays

Features

Primary Applications • 4-In/8-Out Car Audio

Package 100-pin LQFP with Exposed Pad

DSP Core Cirrus Logic 32-bit Core

SRAM 32K x 32-bit SRAM with three 2K blocks x 32-bit SRAM, assignable to either Y data or program memory

Integrated DAC and ADC • 2 Channels of ADC input: with inte-

Configurable Serial Audio Inputs/Outputs

Supports Different Fs Sample Rates

Other Features • Integrated Clock Manager/PLL with flexibility to operate from internal PLL, external crystal, external oscillator

• High-end Digital TV

• Dual Source/Dual Zone

• 2 additional channels of ADC in-

• 8 channels of DAC output

• Integrated 192 kHz S/PDIF Rx, 2 Integrated 192 kHz S/PDIF Tx

• I2S support for 32-bit Samples @ 192 kHz

• TDM Input modes (Up to 8 channels)

• TDM Output modes (Up to 8 channels)

• Integrated hardware SRC blocks for all ADC and DAC channels

• Additional 8-channel hardware SRC block

• Dual-domain Fs on inputs (I2S and S/PDIF Rx)

• Output can be master or slave

• Host Control and Boot via SPI/I²C Serial Interface

• DSP Tool Set w/ Private Keys Protect Customer IP

• Configurable GPIOs and External Interrupts

• Hardware Watchdog Timer

CS47048-CQZ CS47048-DQZ

• 2-In/8-Out Car Audio

• Sound Bar

•DVD Receiver

• 2 channels of ADC input: with inte-

grated 5:1 analog mux

• 8 channels of DAC output

put: without mux

CS47028-CQZ CS47028-DQZ

grated 5:1 analog mux

CS47024-CQZ CS47024-DQZ

• 2-In/4-Out Car Audio

• Digital TV

• Portable Audio Docking Station

• Portable DVD

• DVD Mini / Receiver

• Multimedia PC Speakers

• 2 channels of ADC input: with integrated 5:1 analog mux

• 4 channels of DAC output

T able 3-2. CS470xx Channel Count

Product

CS47048 • Up to 5 I2S lines, 2 channels per

line or

• 1 TDM line, up to 8 channels per line.

CS47028 • Up to 5 I2S lines, 2 channels per

line or

• 1 TDM line, up to 8 channels per line.

CS47024 • Up to 5 I2S lines, 2 channels per

line or

• 1 TDM line, up to 8 channels per line.

1. Contact your Cirrus Logic representative to determine the TDM modes that are supported. The CS470xx can support up to 8 channels per line, but

the DSP software provided for the IC can restrict this capability.

PCM/TDM In

TDM Out

Up to 8 channels

PCM

Out

ADC with 5:1

Input Mux

82 2812

82 0812

82 0412

ADC with-

out Mux

DAC

Out

S/PDIF In

(Stereo

Pairs)

S/PDIF

Out (Ste-

reo Pairs)

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DAC0

text

32-bit Core

in the CS47048 DSP

DMA

SPI / I2C

Control

I2S

ADC0 /1

I2S

I2S / S/PDIF

PLL

ROM

S R C

Periphe r al Bus

Clock

Manager

Timers

RAM

GPIO

DAC1 DAC2 DAC3

DAC4

DAC5

DAC6 DAC7

MUX

S R C 1

ROM

RAM

ROM RAM

32K x 32-b i t S RA M wi th thr ee 2K blo cks Assignable to Program or Y Data memory

Memory Bus

I2S /

S/PDIF

Stereo Inputs On Analog in

ADC2/ 3

DBC

(I2C Slave )

PIC

ADC’s & DA C’s ope r at e

in Single ended or

Di fferen ti al mo d e

S R C

8ch

SRC3 h as 8

independent Channels

for In or Out

4ch

4 Hardware Functional Description

The CS470xx family, which includes the CS47048, CS47028, and CS47024 DSPs, is a true system-on-a-chip that combines a powerful 32-bit DSP engine with analog/digital audio inputs and analog/digital audio outputs. It can be integrated into a complex multi-DSP processing system, or stand alone in an audio product that requires analog-in and analog-out. A top level block diagram for the CS47048, CS47028, and CS47024 products are shown in Fig. 4-1, Fig. 4-2, and Fig. 4-3 respectively.

7 DS787PP9

Figure 4-1. CS47048 Top-level Block Diagram

DAC0

text

32-bit Core

in the CS47028 DSP

DMA

SPI / I2C

Control

I2S

I2S / S/PDIF

PLL

ROM

S R C

Peripheral Bus

Clock

Manager

Timers

RAM

GPIO

DAC1 DAC2 DAC3

DAC4

DAC5

DAC6 DAC7

MUX

S R C 1

ROM

RAM

ROM RAM

32K x 32-b i t S RA M wi th thr ee 2K blo cks Assignable to Program or Y Data memory

Memory Bus

I2S /

S/PDIF

Stereo Inputs On Analog in

ADC2/ 3

DBC

(I2C Slave )

PIC

ADC’s & DA C’s ope r at e

in Single ended or

Di fferen ti al mo d e

S R C

8ch

SRC3 h as 8

independent Channels

for In or Out

4ch

text

32-bit Core

in the CS47024 DSP

DMA

SPI / I2C

Control

I2S

I2S / S/PDIF

PLL

ROM

S R C

Peripheral Bus

Clock

Manager

Timers

RAM

GPIO

DAC0 DAC1

DAC2 DAC3

MUX

S R C 1

ROM

RAM

ROM RAM

32K x 32-b i t S RA M wi th thr ee 2K blo cks Assignable to Program or Y Data memory

Memory Bus

I2S /

S/PDIF

Stereo Inputs On Analog in

ADC2/ 3

DBC

(I2C Slave )

PIC

ADC’s & DA C’s ope r at e

in Single ended or

Di fferen ti al mo d e

S R C

8ch

SRC3 h as 8

independent Channels

for In or Out

4ch

4 Hardware Functional Description

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Figure 4-2. CS47028 Top-level Block Diagram

Figure 4-3. CS47024 Top-level Block Diagram

4.1 Cirrus Logic 32-bit DSP Core

The CS470xx comes with a Cirrus Logic 32-bit core with separate X and Y data and P code memory spaces. The DSP core is a high-performance, 32-bit, user-programmable, fixed-point DSP that is capable of performing two multiply-and-accumulate (MAC) operations per clock cycle. The DSP core has eight 72-bit accumulators, four X-data and four Y-data registers, and 12 index registers.

The DSP core is coupled to a flexible 8-channel DMA engine. The DMA engine can move data between peripherals such as the serial control port (SCP), digital audio input (DAI) and digital audio output (DAO), sample rate converters (SRC), analog-to-digital converters (ADC), digital-to-analog converters (DAC), or any DSP core memory, all without the intervention of the DSP. The DMA engine off-loads data move instructions from the DSP core, leaving more MIPS available for signal processing instructions.

CS470xx functionality is controlled by application codes that are stored in on-chip ROM or downloaded to the CS470xx from a host controller or external serial flash/EEPROM.

Users can develop applications using the DSP Composer™ tool to create the processing chain and then compile the image into a series of commands that are sent to the CS470xx through the SCP. The processing application can either load modules (post-processors) from the DSPs on-chip ROM, or custom firmware can be downloaded through the SCP.

The CS470xx is suitable for a variety of audio post-processing applications where sound quality via sound enhancement and speaker/cabinet tuning is required to achieve the sound quality consumers expect. Examples of such applications include automotive head-ends, automotive amplifiers, docking stations, sound bars, subwoofers, and boom boxes.

4.2 DSP Memory

The DSP core has its own on-chip data and program RAM and ROM and does not require external memory for post-processing applications.

The Y-RAM and P-RAM share a single block of memory that includes three 2K word blocks (32 bits/word) that are assignable to either Y-RAM or P-RAM as shown in Table 4.

Table 4-1. Memory Configurations for the C470xx

P-RAM X-RAM Y-RAM

14K words 10K words 8K words

12K words 10K words 10K words

10K words 10K words 12K words

8K words 10K words 14K words

4.2.1 DMA Controller

The powerful 8-channel DMA controller can move data between 8 on-chip resources. Each resource has its own arbiter: X, Y, and P RAMs/ROMs and the peripheral bus. Modulo and linear addressing modes are supported, with flexible start address and increment controls. The service intervals for each DMA channel, as well as up to 6 interrupt events, are programmable.

4.3 On-chip DSP Peripherals

4.3.1 Analog to Digital Converter Port (ADC)

The ADCs in the CS470xx devices feature dynamic range performance in excess of 100 dB. See Section 5.16 for more details on CS470xx ADC performance. The CS47024 and CS47028 devices support up to 2 simultaneous channels of analog-to-digital conversion with the input source selectable using an integrated 5:1 stereo analog mux (analog inputs AIN_2A/B through AIN_6A/B). The CS47048 device adds a second pair of ADCs that are directly connected to input pins AIN_1A/B providing a total of 4 simultaneous channels of analog-to-digital conversion. This feature gives the CS47048 the ability to select from a total of six stereo pairs of analog input. A single programmable bit selects single-ended or differential mode signals for all inputs. The conversions are performed with Fs=96 kHz.

9 DS787PP9

4.3 On-chip DSP Peripherals

4.3.2 Digital to Analog Converter Port (DAC)

The DACs in the CS470xx devices feature dynamic range performance in excess of 100 dB. See Section 5.17 for more details on CS470xx DAC performance. The CS47024 device supports four simultaneous channels of digital-to-analog conversion. The CS47028 and CS47048 devices provide eight simultaneous channels of digital-to-analog conversion. The DACs have voltage mode outputs that can be connected either as single-ended or differential signals. The conversions are performed with Fs=96 kHz.

4.3.3 Digital Audio Input Port (DAI)

The input capabilities for each version of the CS470xx are summarized in Table 3-1 and Table 3-2.

Up to five DAI ports are available. Two of the DAI ports can be programmed to implement other functions. If the SPI mode is used, the DAI_DATA4 pin becomes the SCP_CS input. The integrated S/PDIF receiver can be used to take over the DAI_DATA3 pin.

The DAI port PCM inputs have a single slave-only clock domain. The S/PDIF receiver, if used, is a separate clock domain. The output of the S/PDIF Rx can then be converted through one of the internal SRC blocks to synchronize with the PCM input. The sample rate of the input clock domains can be determined automatically by the DSP, off-loading the task of monitoring the S/PDIF Rx from the host. A time-stamping feature provides the ability to also sample-rate convert the input data via software.The DAI port supports PCM format with word lengths up to 32 bits and sample rates as high as 192 kHz.

The DAI also supports a time division multiplexed (TDM) mode that packs up to 10 PCM audio channels on a single data line.

4.3.4 S/PDIF RX Input Port (DAI)

One of the PCM pins of the DAI can also be used as a DC-coupled, TTL-level S/PDIF Rx input capable of receiving and demodulating bi-phase encoded S/PDIF signals with Fs <

192 kHz.

4.3.5 Digital Audio Output Port (DAO)

DAO port supports PCM resolutions of up to 32-bits. The port supports sample rates (Fs) as high as 192 kHz. The port can be configured as an independent clock domain mastered by the DSP, or as a clock slave if an external MCLK or SCLK/ LRCLK source is available.

The DAO also supports a time division multiplexed (TDM) mode, that packs up to 8 channels of PCM audio on a single data line.

4.3.6 S/PDIF TX Output Port (DAO)

Two of the serial audio pins can be re-configured as S/PDIF TX pins that drive a bi-phase encoded S/PDIF signal (data with embedded clock on a single line).

4.3.7 Sample Rate Converters (SRC)

All CS470xx devices have at least two internal hardware SRC modules. One is directly associated with the ADCs and normally serves to convert data from the 96 kHz sampling rate of the ADCs to another Fs appropriate for mixing with other audio in the system.

The other SRC module is directly associated with the DACs and normally serves to convert data from the DSP into the 96 kHz sample rate needed by the DACs.

The CS47024, CS47028, and CS47048 devices have an additional stand-alone 8-channel SRC module. This SRC module can be used to make independent input clock domains synchronous (different Fs on PCM input and S/PDIF Rx).

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